All of lore.kernel.org
 help / color / mirror / Atom feed
From: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
To: jorge.ramirez-ortiz@linaro.org, sboyd@kernel.org,
	bjorn.andersson@linaro.org, david.brown@linaro.org,
	jassisinghbrar@gmail.com, mark.rutland@arm.com,
	mturquette@baylibre.com, robh+dt@kernel.org, will.deacon@arm.com,
	arnd@arndb.de, horms+renesas@verge.net.au, heiko@sntech.de,
	sibis@codeaurora.org, enric.balletbo@collabora.com,
	jagan@amarulasolutions.com, olof@lixom.net
Cc: vkoul@kernel.org, niklas.cassel@linaro.org,
	georgi.djakov@linaro.org, amit.kucheria@linaro.org,
	devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org, linux-clk@vger.kernel.org,
	linux-arm-msm@vger.kernel.org, khasim.mohammed@linaro.org
Subject: [PATCH v3 01/14] clk: qcom: gcc: limit GPLL0_AO_OUT operating frequency
Date: Tue, 25 Jun 2019 18:47:20 +0200	[thread overview]
Message-ID: <20190625164733.11091-2-jorge.ramirez-ortiz@linaro.org> (raw)
In-Reply-To: <20190625164733.11091-1-jorge.ramirez-ortiz@linaro.org>

Limit the GPLL0_AO_OUT_MAIN operating frequency as per its hardware
specifications.

Co-developed-by: Niklas Cassel <niklas.cassel@linaro.org>
Signed-off-by: Niklas Cassel <niklas.cassel@linaro.org>
Signed-off-by: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
Acked-by: Stephen Boyd <sboyd@kernel.org>
---
 drivers/clk/qcom/clk-alpha-pll.c | 8 ++++++++
 drivers/clk/qcom/clk-alpha-pll.h | 1 +
 drivers/clk/qcom/gcc-qcs404.c    | 2 +-
 3 files changed, 10 insertions(+), 1 deletion(-)

diff --git a/drivers/clk/qcom/clk-alpha-pll.c b/drivers/clk/qcom/clk-alpha-pll.c
index 0ced4a5a9a17..ef51f302bdf0 100644
--- a/drivers/clk/qcom/clk-alpha-pll.c
+++ b/drivers/clk/qcom/clk-alpha-pll.c
@@ -730,6 +730,14 @@ static long alpha_pll_huayra_round_rate(struct clk_hw *hw, unsigned long rate,
 	return alpha_huayra_pll_round_rate(rate, *prate, &l, &a);
 }
 
+const struct clk_ops clk_alpha_pll_fixed_ops = {
+	.enable = clk_alpha_pll_enable,
+	.disable = clk_alpha_pll_disable,
+	.is_enabled = clk_alpha_pll_is_enabled,
+	.recalc_rate = clk_alpha_pll_recalc_rate,
+};
+EXPORT_SYMBOL_GPL(clk_alpha_pll_fixed_ops);
+
 const struct clk_ops clk_alpha_pll_ops = {
 	.enable = clk_alpha_pll_enable,
 	.disable = clk_alpha_pll_disable,
diff --git a/drivers/clk/qcom/clk-alpha-pll.h b/drivers/clk/qcom/clk-alpha-pll.h
index 66755f0f84fc..6b4eb74706b4 100644
--- a/drivers/clk/qcom/clk-alpha-pll.h
+++ b/drivers/clk/qcom/clk-alpha-pll.h
@@ -104,6 +104,7 @@ struct alpha_pll_config {
 };
 
 extern const struct clk_ops clk_alpha_pll_ops;
+extern const struct clk_ops clk_alpha_pll_fixed_ops;
 extern const struct clk_ops clk_alpha_pll_hwfsm_ops;
 extern const struct clk_ops clk_alpha_pll_postdiv_ops;
 extern const struct clk_ops clk_alpha_pll_huayra_ops;
diff --git a/drivers/clk/qcom/gcc-qcs404.c b/drivers/clk/qcom/gcc-qcs404.c
index 29cf464dd2c8..18c6563889f3 100644
--- a/drivers/clk/qcom/gcc-qcs404.c
+++ b/drivers/clk/qcom/gcc-qcs404.c
@@ -330,7 +330,7 @@ static struct clk_alpha_pll gpll0_ao_out_main = {
 			.parent_names = (const char *[]){ "cxo" },
 			.num_parents = 1,
 			.flags = CLK_IS_CRITICAL,
-			.ops = &clk_alpha_pll_ops,
+			.ops = &clk_alpha_pll_fixed_ops,
 		},
 	},
 };
-- 
2.21.0


WARNING: multiple messages have this Message-ID (diff)
From: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
To: jorge.ramirez-ortiz@linaro.org, sboyd@kernel.org,
	bjorn.andersson@linaro.org, david.brown@linaro.org,
	jassisinghbrar@gmail.com, mark.rutland@arm.com,
	mturquette@baylibre.com, robh+dt@kernel.org, will.deacon@arm.com,
	arnd@arndb.de, horms+renesas@verge.net.au, heiko@sntech.de,
	sibis@codeaurora.org, enric.balletbo@collabora.com,
	jagan@amarulasolutions.com, olof@lixom.net
Cc: devicetree@vger.kernel.org, linux-arm-msm@vger.kernel.org,
	khasim.mohammed@linaro.org, linux-kernel@vger.kernel.org,
	amit.kucheria@linaro.org, linux-clk@vger.kernel.org,
	vkoul@kernel.org, niklas.cassel@linaro.org,
	georgi.djakov@linaro.org, linux-arm-kernel@lists.infradead.org
Subject: [PATCH v3 01/14] clk: qcom: gcc: limit GPLL0_AO_OUT operating frequency
Date: Tue, 25 Jun 2019 18:47:20 +0200	[thread overview]
Message-ID: <20190625164733.11091-2-jorge.ramirez-ortiz@linaro.org> (raw)
In-Reply-To: <20190625164733.11091-1-jorge.ramirez-ortiz@linaro.org>

Limit the GPLL0_AO_OUT_MAIN operating frequency as per its hardware
specifications.

Co-developed-by: Niklas Cassel <niklas.cassel@linaro.org>
Signed-off-by: Niklas Cassel <niklas.cassel@linaro.org>
Signed-off-by: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
Acked-by: Stephen Boyd <sboyd@kernel.org>
---
 drivers/clk/qcom/clk-alpha-pll.c | 8 ++++++++
 drivers/clk/qcom/clk-alpha-pll.h | 1 +
 drivers/clk/qcom/gcc-qcs404.c    | 2 +-
 3 files changed, 10 insertions(+), 1 deletion(-)

diff --git a/drivers/clk/qcom/clk-alpha-pll.c b/drivers/clk/qcom/clk-alpha-pll.c
index 0ced4a5a9a17..ef51f302bdf0 100644
--- a/drivers/clk/qcom/clk-alpha-pll.c
+++ b/drivers/clk/qcom/clk-alpha-pll.c
@@ -730,6 +730,14 @@ static long alpha_pll_huayra_round_rate(struct clk_hw *hw, unsigned long rate,
 	return alpha_huayra_pll_round_rate(rate, *prate, &l, &a);
 }
 
+const struct clk_ops clk_alpha_pll_fixed_ops = {
+	.enable = clk_alpha_pll_enable,
+	.disable = clk_alpha_pll_disable,
+	.is_enabled = clk_alpha_pll_is_enabled,
+	.recalc_rate = clk_alpha_pll_recalc_rate,
+};
+EXPORT_SYMBOL_GPL(clk_alpha_pll_fixed_ops);
+
 const struct clk_ops clk_alpha_pll_ops = {
 	.enable = clk_alpha_pll_enable,
 	.disable = clk_alpha_pll_disable,
diff --git a/drivers/clk/qcom/clk-alpha-pll.h b/drivers/clk/qcom/clk-alpha-pll.h
index 66755f0f84fc..6b4eb74706b4 100644
--- a/drivers/clk/qcom/clk-alpha-pll.h
+++ b/drivers/clk/qcom/clk-alpha-pll.h
@@ -104,6 +104,7 @@ struct alpha_pll_config {
 };
 
 extern const struct clk_ops clk_alpha_pll_ops;
+extern const struct clk_ops clk_alpha_pll_fixed_ops;
 extern const struct clk_ops clk_alpha_pll_hwfsm_ops;
 extern const struct clk_ops clk_alpha_pll_postdiv_ops;
 extern const struct clk_ops clk_alpha_pll_huayra_ops;
diff --git a/drivers/clk/qcom/gcc-qcs404.c b/drivers/clk/qcom/gcc-qcs404.c
index 29cf464dd2c8..18c6563889f3 100644
--- a/drivers/clk/qcom/gcc-qcs404.c
+++ b/drivers/clk/qcom/gcc-qcs404.c
@@ -330,7 +330,7 @@ static struct clk_alpha_pll gpll0_ao_out_main = {
 			.parent_names = (const char *[]){ "cxo" },
 			.num_parents = 1,
 			.flags = CLK_IS_CRITICAL,
-			.ops = &clk_alpha_pll_ops,
+			.ops = &clk_alpha_pll_fixed_ops,
 		},
 	},
 };
-- 
2.21.0


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

  reply	other threads:[~2019-06-25 16:48 UTC|newest]

Thread overview: 69+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-06-25 16:47 [PATCH v3 00/14] Support CPU frequency scaling on QCS404 Jorge Ramirez-Ortiz
2019-06-25 16:47 ` Jorge Ramirez-Ortiz
2019-06-25 16:47 ` Jorge Ramirez-Ortiz [this message]
2019-06-25 16:47   ` [PATCH v3 01/14] clk: qcom: gcc: limit GPLL0_AO_OUT operating frequency Jorge Ramirez-Ortiz
2019-07-11 15:30   ` Bjorn Andersson
2019-07-11 15:30     ` Bjorn Andersson
2019-06-25 16:47 ` [PATCH v3 02/14] mbox: qcom: add APCS child device for QCS404 Jorge Ramirez-Ortiz
2019-06-25 16:47   ` Jorge Ramirez-Ortiz
2019-07-11 14:44   ` Bjorn Andersson
2019-07-11 14:44     ` Bjorn Andersson
2019-07-31 14:10     ` Jorge Ramirez
2019-07-31 14:10       ` Jorge Ramirez
2019-07-31 14:10       ` Jorge Ramirez
2019-06-25 16:47 ` [PATCH v3 03/14] mbox: qcom: replace integer with valid macro Jorge Ramirez-Ortiz
2019-06-25 16:47   ` Jorge Ramirez-Ortiz
2019-07-11 14:37   ` Bjorn Andersson
2019-07-11 14:37     ` Bjorn Andersson
2019-06-25 16:47 ` [PATCH v3 04/14] dt-bindings: mailbox: qcom: Add clock-name optional property Jorge Ramirez-Ortiz
2019-06-25 16:47   ` Jorge Ramirez-Ortiz
2019-07-11 14:45   ` Bjorn Andersson
2019-07-11 14:45     ` Bjorn Andersson
2019-06-25 16:47 ` [PATCH v3 05/14] clk: qcom: apcs-msm8916: get parent clock names from DT Jorge Ramirez-Ortiz
2019-06-25 16:47   ` Jorge Ramirez-Ortiz
2019-07-11 14:58   ` Bjorn Andersson
2019-07-11 14:58     ` Bjorn Andersson
2019-06-25 16:47 ` [PATCH v3 06/14] clk: qcom: hfpll: " Jorge Ramirez-Ortiz
2019-06-25 16:47   ` Jorge Ramirez-Ortiz
2019-07-11 15:07   ` Bjorn Andersson
2019-07-11 15:07     ` Bjorn Andersson
2019-06-25 16:47 ` [PATCH v3 07/14] clk: qcom: hfpll: register as clock provider Jorge Ramirez-Ortiz
2019-06-25 16:47   ` Jorge Ramirez-Ortiz
2019-07-11 15:07   ` Bjorn Andersson
2019-07-11 15:07     ` Bjorn Andersson
2019-06-25 16:47 ` [PATCH v3 08/14] clk: qcom: hfpll: CLK_IGNORE_UNUSED Jorge Ramirez-Ortiz
2019-06-25 16:47   ` Jorge Ramirez-Ortiz
2019-07-11 15:16   ` Bjorn Andersson
2019-07-11 15:16     ` Bjorn Andersson
2019-07-31 14:30     ` Jorge Ramirez
2019-07-31 14:30       ` Jorge Ramirez
2019-06-25 16:47 ` [PATCH v3 09/14] arm64: dts: qcom: msm8916: Add the clocks for the APCS mux/divider Jorge Ramirez-Ortiz
2019-06-25 16:47   ` Jorge Ramirez-Ortiz
2019-07-11 15:24   ` Bjorn Andersson
2019-07-11 15:24     ` Bjorn Andersson
2019-06-25 16:47 ` [PATCH v3 10/14] arm64: dts: qcom: qcs404: Add OPP table Jorge Ramirez-Ortiz
2019-06-25 16:47   ` Jorge Ramirez-Ortiz
2019-07-11 15:25   ` Bjorn Andersson
2019-07-11 15:25     ` Bjorn Andersson
2019-06-25 16:47 ` [PATCH v3 11/14] arm64: dts: qcom: qcs404: Add HFPLL node Jorge Ramirez-Ortiz
2019-06-25 16:47   ` Jorge Ramirez-Ortiz
2019-07-11 15:25   ` Bjorn Andersson
2019-07-11 15:25     ` Bjorn Andersson
2019-06-25 16:47 ` [PATCH v3 12/14] arm64: dts: qcom: qcs404: Add the clocks for APCS mux/divider Jorge Ramirez-Ortiz
2019-06-25 16:47   ` Jorge Ramirez-Ortiz
2019-07-11 15:27   ` Bjorn Andersson
2019-07-11 15:27     ` Bjorn Andersson
2019-06-25 16:47 ` [PATCH v3 13/14] arm64: dts: qcom: qcs404: Add DVFS support Jorge Ramirez-Ortiz
2019-06-25 16:47   ` Jorge Ramirez-Ortiz
2019-06-26  9:08   ` Niklas Cassel
2019-06-26  9:08     ` Niklas Cassel
2019-06-26  9:08     ` Niklas Cassel
2019-06-26  9:10     ` Niklas Cassel
2019-06-26  9:10       ` Niklas Cassel
2019-06-26  9:10       ` Niklas Cassel
2019-07-11 15:29   ` Bjorn Andersson
2019-07-11 15:29     ` Bjorn Andersson
2019-06-25 16:47 ` [PATCH v3 14/14] arm64: defconfig: Enable HFPLL Jorge Ramirez-Ortiz
2019-06-25 16:47   ` Jorge Ramirez-Ortiz
2019-07-11 15:27   ` Bjorn Andersson
2019-07-11 15:27     ` Bjorn Andersson

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20190625164733.11091-2-jorge.ramirez-ortiz@linaro.org \
    --to=jorge.ramirez-ortiz@linaro.org \
    --cc=amit.kucheria@linaro.org \
    --cc=arnd@arndb.de \
    --cc=bjorn.andersson@linaro.org \
    --cc=david.brown@linaro.org \
    --cc=devicetree@vger.kernel.org \
    --cc=enric.balletbo@collabora.com \
    --cc=georgi.djakov@linaro.org \
    --cc=heiko@sntech.de \
    --cc=horms+renesas@verge.net.au \
    --cc=jagan@amarulasolutions.com \
    --cc=jassisinghbrar@gmail.com \
    --cc=khasim.mohammed@linaro.org \
    --cc=linux-arm-kernel@lists.infradead.org \
    --cc=linux-arm-msm@vger.kernel.org \
    --cc=linux-clk@vger.kernel.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=mark.rutland@arm.com \
    --cc=mturquette@baylibre.com \
    --cc=niklas.cassel@linaro.org \
    --cc=olof@lixom.net \
    --cc=robh+dt@kernel.org \
    --cc=sboyd@kernel.org \
    --cc=sibis@codeaurora.org \
    --cc=vkoul@kernel.org \
    --cc=will.deacon@arm.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.