* [PATCH v3 00/15] hw/i386/pc: Do not restrict the fw_cfg functions to the PC machine
@ 2019-07-01 13:35 ` Philippe Mathieu-Daudé
0 siblings, 0 replies; 36+ messages in thread
From: Philippe Mathieu-Daudé @ 2019-07-01 13:35 UTC (permalink / raw)
To: qemu-devel
Cc: Marcel Apfelbaum, Samuel Ortiz, kvm, Yang Zhong, Paolo Bonzini,
Michael S. Tsirkin, Rob Bradford, Eduardo Habkost,
Marcelo Tosatti, Richard Henderson, Philippe Mathieu-Daudé
Hi,
This is my take at salvaging some NEMU good work.
Samuel worked in adding the fw_cfg device to the x86-virt NEMU machine.
This series is inspired by NEMU's commit 3cb92d080835 [0] and adapted
to upstream style. The result makes the upstream codebase more
modularizable.
There are very little logical changes, this is mostly a cleanup
refactor.
Since v2 [2]:
- Addressed MST comments from v2 (only patch #2 modified)
- do not use unsigned for enum
- do not add unuseful documentation
Since v1 [1]:
- Addressed Li and MST comments
$ git backport-diff -u v2
Key:
[----] : patches are identical
[####] : number of functional differences between upstream/downstream patch
[down] : patch is downstream-only
The flags [FC] indicate (F)unctional and (C)ontextual differences, respectively
001/15:[----] [--] 'hw/i386/pc: Use e820_get_num_entries() to access e820_entries'
002/15:[0131] [FC] 'hw/i386/pc: Extract e820 memory layout code'
003/15:[----] [--] 'hw/i386/pc: Use address_space_memory in place'
004/15:[----] [--] 'hw/i386/pc: Rename bochs_bios_init as more generic fw_cfg_arch_create'
005/15:[----] [--] 'hw/i386/pc: Pass the boot_cpus value by argument'
006/15:[----] [--] 'hw/i386/pc: Pass the apic_id_limit value by argument'
007/15:[----] [--] 'hw/i386/pc: Pass the CPUArchIdList array by argument'
008/15:[----] [--] 'hw/i386/pc: Let fw_cfg_init() use the generic MachineState'
009/15:[----] [--] 'hw/i386/pc: Let pc_build_smbios() take a FWCfgState argument'
010/15:[----] [--] 'hw/i386/pc: Let pc_build_smbios() take a generic MachineState argument'
011/15:[----] [--] 'hw/i386/pc: Rename pc_build_smbios() as generic fw_cfg_build_smbios()'
012/15:[----] [--] 'hw/i386/pc: Let pc_build_feature_control() take a FWCfgState argument'
013/15:[----] [--] 'hw/i386/pc: Let pc_build_feature_control() take a MachineState argument'
014/15:[----] [--] 'hw/i386/pc: Rename pc_build_feature_control() as generic fw_cfg_build_*'
015/15:[----] [--] 'hw/i386/pc: Extract the x86 generic fw_cfg code'
Regards,
Phil.
[0] https://github.com/intel/nemu/commit/3cb92d080835ac8d47c8b713156338afa33cff5c
[1] https://lists.gnu.org/archive/html/qemu-devel/2019-05/msg05759.html
[2] https://lists.gnu.org/archive/html/qemu-devel/2019-06/msg02786.html
Philippe Mathieu-Daudé (15):
hw/i386/pc: Use e820_get_num_entries() to access e820_entries
hw/i386/pc: Extract e820 memory layout code
hw/i386/pc: Use address_space_memory in place
hw/i386/pc: Rename bochs_bios_init as more generic fw_cfg_arch_create
hw/i386/pc: Pass the boot_cpus value by argument
hw/i386/pc: Pass the apic_id_limit value by argument
hw/i386/pc: Pass the CPUArchIdList array by argument
hw/i386/pc: Let fw_cfg_init() use the generic MachineState
hw/i386/pc: Let pc_build_smbios() take a FWCfgState argument
hw/i386/pc: Let pc_build_smbios() take a generic MachineState argument
hw/i386/pc: Rename pc_build_smbios() as generic fw_cfg_build_smbios()
hw/i386/pc: Let pc_build_feature_control() take a FWCfgState argument
hw/i386/pc: Let pc_build_feature_control() take a MachineState
argument
hw/i386/pc: Rename pc_build_feature_control() as generic
fw_cfg_build_*
hw/i386/pc: Extract the x86 generic fw_cfg code
hw/i386/Makefile.objs | 2 +-
hw/i386/e820_memory_layout.c | 59 ++++++++++
hw/i386/e820_memory_layout.h | 42 ++++++++
hw/i386/fw_cfg.c | 137 ++++++++++++++++++++++++
hw/i386/fw_cfg.h | 8 ++
hw/i386/pc.c | 201 ++---------------------------------
include/hw/i386/pc.h | 11 --
target/i386/kvm.c | 1 +
8 files changed, 256 insertions(+), 205 deletions(-)
create mode 100644 hw/i386/e820_memory_layout.c
create mode 100644 hw/i386/e820_memory_layout.h
--
2.20.1
^ permalink raw reply [flat|nested] 36+ messages in thread
* [Qemu-devel] [PATCH v3 00/15] hw/i386/pc: Do not restrict the fw_cfg functions to the PC machine
@ 2019-07-01 13:35 ` Philippe Mathieu-Daudé
0 siblings, 0 replies; 36+ messages in thread
From: Philippe Mathieu-Daudé @ 2019-07-01 13:35 UTC (permalink / raw)
To: qemu-devel
Cc: Yang Zhong, Samuel Ortiz, kvm, Michael S. Tsirkin,
Marcelo Tosatti, Rob Bradford, Paolo Bonzini, Richard Henderson,
Philippe Mathieu-Daudé,
Eduardo Habkost
Hi,
This is my take at salvaging some NEMU good work.
Samuel worked in adding the fw_cfg device to the x86-virt NEMU machine.
This series is inspired by NEMU's commit 3cb92d080835 [0] and adapted
to upstream style. The result makes the upstream codebase more
modularizable.
There are very little logical changes, this is mostly a cleanup
refactor.
Since v2 [2]:
- Addressed MST comments from v2 (only patch #2 modified)
- do not use unsigned for enum
- do not add unuseful documentation
Since v1 [1]:
- Addressed Li and MST comments
$ git backport-diff -u v2
Key:
[----] : patches are identical
[####] : number of functional differences between upstream/downstream patch
[down] : patch is downstream-only
The flags [FC] indicate (F)unctional and (C)ontextual differences, respectively
001/15:[----] [--] 'hw/i386/pc: Use e820_get_num_entries() to access e820_entries'
002/15:[0131] [FC] 'hw/i386/pc: Extract e820 memory layout code'
003/15:[----] [--] 'hw/i386/pc: Use address_space_memory in place'
004/15:[----] [--] 'hw/i386/pc: Rename bochs_bios_init as more generic fw_cfg_arch_create'
005/15:[----] [--] 'hw/i386/pc: Pass the boot_cpus value by argument'
006/15:[----] [--] 'hw/i386/pc: Pass the apic_id_limit value by argument'
007/15:[----] [--] 'hw/i386/pc: Pass the CPUArchIdList array by argument'
008/15:[----] [--] 'hw/i386/pc: Let fw_cfg_init() use the generic MachineState'
009/15:[----] [--] 'hw/i386/pc: Let pc_build_smbios() take a FWCfgState argument'
010/15:[----] [--] 'hw/i386/pc: Let pc_build_smbios() take a generic MachineState argument'
011/15:[----] [--] 'hw/i386/pc: Rename pc_build_smbios() as generic fw_cfg_build_smbios()'
012/15:[----] [--] 'hw/i386/pc: Let pc_build_feature_control() take a FWCfgState argument'
013/15:[----] [--] 'hw/i386/pc: Let pc_build_feature_control() take a MachineState argument'
014/15:[----] [--] 'hw/i386/pc: Rename pc_build_feature_control() as generic fw_cfg_build_*'
015/15:[----] [--] 'hw/i386/pc: Extract the x86 generic fw_cfg code'
Regards,
Phil.
[0] https://github.com/intel/nemu/commit/3cb92d080835ac8d47c8b713156338afa33cff5c
[1] https://lists.gnu.org/archive/html/qemu-devel/2019-05/msg05759.html
[2] https://lists.gnu.org/archive/html/qemu-devel/2019-06/msg02786.html
Philippe Mathieu-Daudé (15):
hw/i386/pc: Use e820_get_num_entries() to access e820_entries
hw/i386/pc: Extract e820 memory layout code
hw/i386/pc: Use address_space_memory in place
hw/i386/pc: Rename bochs_bios_init as more generic fw_cfg_arch_create
hw/i386/pc: Pass the boot_cpus value by argument
hw/i386/pc: Pass the apic_id_limit value by argument
hw/i386/pc: Pass the CPUArchIdList array by argument
hw/i386/pc: Let fw_cfg_init() use the generic MachineState
hw/i386/pc: Let pc_build_smbios() take a FWCfgState argument
hw/i386/pc: Let pc_build_smbios() take a generic MachineState argument
hw/i386/pc: Rename pc_build_smbios() as generic fw_cfg_build_smbios()
hw/i386/pc: Let pc_build_feature_control() take a FWCfgState argument
hw/i386/pc: Let pc_build_feature_control() take a MachineState
argument
hw/i386/pc: Rename pc_build_feature_control() as generic
fw_cfg_build_*
hw/i386/pc: Extract the x86 generic fw_cfg code
hw/i386/Makefile.objs | 2 +-
hw/i386/e820_memory_layout.c | 59 ++++++++++
hw/i386/e820_memory_layout.h | 42 ++++++++
hw/i386/fw_cfg.c | 137 ++++++++++++++++++++++++
hw/i386/fw_cfg.h | 8 ++
hw/i386/pc.c | 201 ++---------------------------------
include/hw/i386/pc.h | 11 --
target/i386/kvm.c | 1 +
8 files changed, 256 insertions(+), 205 deletions(-)
create mode 100644 hw/i386/e820_memory_layout.c
create mode 100644 hw/i386/e820_memory_layout.h
--
2.20.1
^ permalink raw reply [flat|nested] 36+ messages in thread
* [PATCH v3 01/15] hw/i386/pc: Use e820_get_num_entries() to access e820_entries
2019-07-01 13:35 ` [Qemu-devel] " Philippe Mathieu-Daudé
@ 2019-07-01 13:35 ` Philippe Mathieu-Daudé
-1 siblings, 0 replies; 36+ messages in thread
From: Philippe Mathieu-Daudé @ 2019-07-01 13:35 UTC (permalink / raw)
To: qemu-devel
Cc: Marcel Apfelbaum, Samuel Ortiz, kvm, Yang Zhong, Paolo Bonzini,
Michael S. Tsirkin, Rob Bradford, Eduardo Habkost,
Marcelo Tosatti, Richard Henderson, Philippe Mathieu-Daudé,
Li Qiang
To be able to extract the e820* code out of this file (in the next
patch), access e820_entries with its correct helper.
Reviewed-by: Li Qiang <liq3ea@gmail.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
---
hw/i386/pc.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/i386/pc.c b/hw/i386/pc.c
index e96360b47a..691726b85b 100644
--- a/hw/i386/pc.c
+++ b/hw/i386/pc.c
@@ -1020,7 +1020,7 @@ static FWCfgState *bochs_bios_init(AddressSpace *as, PCMachineState *pcms)
fw_cfg_add_bytes(fw_cfg, FW_CFG_E820_TABLE,
&e820_reserve, sizeof(e820_reserve));
fw_cfg_add_file(fw_cfg, "etc/e820", e820_table,
- sizeof(struct e820_entry) * e820_entries);
+ sizeof(struct e820_entry) * e820_get_num_entries());
fw_cfg_add_bytes(fw_cfg, FW_CFG_HPET, &hpet_cfg, sizeof(hpet_cfg));
/* allocate memory for the NUMA channel: one (64bit) word for the number
--
2.20.1
^ permalink raw reply related [flat|nested] 36+ messages in thread
* [Qemu-devel] [PATCH v3 01/15] hw/i386/pc: Use e820_get_num_entries() to access e820_entries
@ 2019-07-01 13:35 ` Philippe Mathieu-Daudé
0 siblings, 0 replies; 36+ messages in thread
From: Philippe Mathieu-Daudé @ 2019-07-01 13:35 UTC (permalink / raw)
To: qemu-devel
Cc: Yang Zhong, Samuel Ortiz, kvm, Michael S. Tsirkin,
Marcelo Tosatti, Li Qiang, Rob Bradford, Paolo Bonzini,
Richard Henderson, Philippe Mathieu-Daudé,
Eduardo Habkost
To be able to extract the e820* code out of this file (in the next
patch), access e820_entries with its correct helper.
Reviewed-by: Li Qiang <liq3ea@gmail.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
---
hw/i386/pc.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/i386/pc.c b/hw/i386/pc.c
index e96360b47a..691726b85b 100644
--- a/hw/i386/pc.c
+++ b/hw/i386/pc.c
@@ -1020,7 +1020,7 @@ static FWCfgState *bochs_bios_init(AddressSpace *as, PCMachineState *pcms)
fw_cfg_add_bytes(fw_cfg, FW_CFG_E820_TABLE,
&e820_reserve, sizeof(e820_reserve));
fw_cfg_add_file(fw_cfg, "etc/e820", e820_table,
- sizeof(struct e820_entry) * e820_entries);
+ sizeof(struct e820_entry) * e820_get_num_entries());
fw_cfg_add_bytes(fw_cfg, FW_CFG_HPET, &hpet_cfg, sizeof(hpet_cfg));
/* allocate memory for the NUMA channel: one (64bit) word for the number
--
2.20.1
^ permalink raw reply related [flat|nested] 36+ messages in thread
* [PATCH v3 02/15] hw/i386/pc: Extract e820 memory layout code
2019-07-01 13:35 ` [Qemu-devel] " Philippe Mathieu-Daudé
@ 2019-07-01 13:35 ` Philippe Mathieu-Daudé
-1 siblings, 0 replies; 36+ messages in thread
From: Philippe Mathieu-Daudé @ 2019-07-01 13:35 UTC (permalink / raw)
To: qemu-devel
Cc: Marcel Apfelbaum, Samuel Ortiz, kvm, Yang Zhong, Paolo Bonzini,
Michael S. Tsirkin, Rob Bradford, Eduardo Habkost,
Marcelo Tosatti, Richard Henderson, Philippe Mathieu-Daudé,
Li Qiang
Suggested-by: Samuel Ortiz <sameo@linux.intel.com>
Reviewed-by: Li Qiang <liq3ea@gmail.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
---
v3: KISS, do not use unsigned, do not add broken documentation
---
hw/i386/Makefile.objs | 2 +-
hw/i386/e820_memory_layout.c | 59 ++++++++++++++++++++++++++++++++++
hw/i386/e820_memory_layout.h | 42 +++++++++++++++++++++++++
hw/i386/pc.c | 61 +-----------------------------------
include/hw/i386/pc.h | 11 -------
target/i386/kvm.c | 1 +
6 files changed, 104 insertions(+), 72 deletions(-)
create mode 100644 hw/i386/e820_memory_layout.c
create mode 100644 hw/i386/e820_memory_layout.h
diff --git a/hw/i386/Makefile.objs b/hw/i386/Makefile.objs
index 5d9c9efd5f..d3374e0831 100644
--- a/hw/i386/Makefile.objs
+++ b/hw/i386/Makefile.objs
@@ -1,5 +1,5 @@
obj-$(CONFIG_KVM) += kvm/
-obj-y += multiboot.o
+obj-y += e820_memory_layout.o multiboot.o
obj-y += pc.o
obj-$(CONFIG_I440FX) += pc_piix.o
obj-$(CONFIG_Q35) += pc_q35.o
diff --git a/hw/i386/e820_memory_layout.c b/hw/i386/e820_memory_layout.c
new file mode 100644
index 0000000000..bcf9eaf837
--- /dev/null
+++ b/hw/i386/e820_memory_layout.c
@@ -0,0 +1,59 @@
+/*
+ * QEMU BIOS e820 routines
+ *
+ * Copyright (c) 2003-2004 Fabrice Bellard
+ *
+ * SPDX-License-Identifier: MIT
+ */
+
+#include "qemu/osdep.h"
+#include "qemu/bswap.h"
+#include "e820_memory_layout.h"
+
+static size_t e820_entries;
+struct e820_table e820_reserve;
+struct e820_entry *e820_table;
+
+int e820_add_entry(uint64_t address, uint64_t length, uint32_t type)
+{
+ int index = le32_to_cpu(e820_reserve.count);
+ struct e820_entry *entry;
+
+ if (type != E820_RAM) {
+ /* old FW_CFG_E820_TABLE entry -- reservations only */
+ if (index >= E820_NR_ENTRIES) {
+ return -EBUSY;
+ }
+ entry = &e820_reserve.entry[index++];
+
+ entry->address = cpu_to_le64(address);
+ entry->length = cpu_to_le64(length);
+ entry->type = cpu_to_le32(type);
+
+ e820_reserve.count = cpu_to_le32(index);
+ }
+
+ /* new "etc/e820" file -- include ram too */
+ e820_table = g_renew(struct e820_entry, e820_table, e820_entries + 1);
+ e820_table[e820_entries].address = cpu_to_le64(address);
+ e820_table[e820_entries].length = cpu_to_le64(length);
+ e820_table[e820_entries].type = cpu_to_le32(type);
+ e820_entries++;
+
+ return e820_entries;
+}
+
+int e820_get_num_entries(void)
+{
+ return e820_entries;
+}
+
+bool e820_get_entry(int idx, uint32_t type, uint64_t *address, uint64_t *length)
+{
+ if (idx < e820_entries && e820_table[idx].type == cpu_to_le32(type)) {
+ *address = le64_to_cpu(e820_table[idx].address);
+ *length = le64_to_cpu(e820_table[idx].length);
+ return true;
+ }
+ return false;
+}
diff --git a/hw/i386/e820_memory_layout.h b/hw/i386/e820_memory_layout.h
new file mode 100644
index 0000000000..2a0ceb8b9c
--- /dev/null
+++ b/hw/i386/e820_memory_layout.h
@@ -0,0 +1,42 @@
+/*
+ * QEMU BIOS e820 routines
+ *
+ * Copyright (c) 2003-2004 Fabrice Bellard
+ *
+ * SPDX-License-Identifier: MIT
+ */
+
+#ifndef HW_I386_E820_H
+#define HW_I386_E820_H
+
+/* e820 types */
+#define E820_RAM 1
+#define E820_RESERVED 2
+#define E820_ACPI 3
+#define E820_NVS 4
+#define E820_UNUSABLE 5
+
+#define E820_NR_ENTRIES 16
+
+struct e820_entry {
+ uint64_t address;
+ uint64_t length;
+ uint32_t type;
+} QEMU_PACKED __attribute((__aligned__(4)));
+
+struct e820_table {
+ uint32_t count;
+ struct e820_entry entry[E820_NR_ENTRIES];
+} QEMU_PACKED __attribute((__aligned__(4)));
+
+extern struct e820_table e820_reserve;
+extern struct e820_entry *e820_table;
+
+int e820_add_entry(uint64_t address, uint64_t length, uint32_t type);
+int e820_get_num_entries(void);
+bool e820_get_entry(int index, uint32_t type,
+ uint64_t *address, uint64_t *length);
+
+
+
+#endif
diff --git a/hw/i386/pc.c b/hw/i386/pc.c
index 691726b85b..8ac85eadf1 100644
--- a/hw/i386/pc.c
+++ b/hw/i386/pc.c
@@ -79,6 +79,7 @@
#include "hw/i386/intel_iommu.h"
#include "hw/net/ne2000-isa.h"
#include "standard-headers/asm-x86/bootparam.h"
+#include "e820_memory_layout.h"
/* debug PC/ISA interrupts */
//#define DEBUG_IRQ
@@ -90,22 +91,6 @@
#define DPRINTF(fmt, ...)
#endif
-#define E820_NR_ENTRIES 16
-
-struct e820_entry {
- uint64_t address;
- uint64_t length;
- uint32_t type;
-} QEMU_PACKED __attribute((__aligned__(4)));
-
-struct e820_table {
- uint32_t count;
- struct e820_entry entry[E820_NR_ENTRIES];
-} QEMU_PACKED __attribute((__aligned__(4)));
-
-static struct e820_table e820_reserve;
-static struct e820_entry *e820_table;
-static unsigned e820_entries;
struct hpet_fw_config hpet_cfg = {.count = UINT8_MAX};
/* Physical Address of PVH entry point read from kernel ELF NOTE */
@@ -869,50 +854,6 @@ static void handle_a20_line_change(void *opaque, int irq, int level)
x86_cpu_set_a20(cpu, level);
}
-int e820_add_entry(uint64_t address, uint64_t length, uint32_t type)
-{
- int index = le32_to_cpu(e820_reserve.count);
- struct e820_entry *entry;
-
- if (type != E820_RAM) {
- /* old FW_CFG_E820_TABLE entry -- reservations only */
- if (index >= E820_NR_ENTRIES) {
- return -EBUSY;
- }
- entry = &e820_reserve.entry[index++];
-
- entry->address = cpu_to_le64(address);
- entry->length = cpu_to_le64(length);
- entry->type = cpu_to_le32(type);
-
- e820_reserve.count = cpu_to_le32(index);
- }
-
- /* new "etc/e820" file -- include ram too */
- e820_table = g_renew(struct e820_entry, e820_table, e820_entries + 1);
- e820_table[e820_entries].address = cpu_to_le64(address);
- e820_table[e820_entries].length = cpu_to_le64(length);
- e820_table[e820_entries].type = cpu_to_le32(type);
- e820_entries++;
-
- return e820_entries;
-}
-
-int e820_get_num_entries(void)
-{
- return e820_entries;
-}
-
-bool e820_get_entry(int idx, uint32_t type, uint64_t *address, uint64_t *length)
-{
- if (idx < e820_entries && e820_table[idx].type == cpu_to_le32(type)) {
- *address = le64_to_cpu(e820_table[idx].address);
- *length = le64_to_cpu(e820_table[idx].length);
- return true;
- }
- return false;
-}
-
/* Enables contiguous-apic-ID mode, for compatibility */
static bool compat_apic_id_mode;
diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h
index c54cc54a47..99b0a2e705 100644
--- a/include/hw/i386/pc.h
+++ b/include/hw/i386/pc.h
@@ -282,17 +282,6 @@ void pc_system_firmware_init(PCMachineState *pcms, MemoryRegion *rom_memory);
void pc_madt_cpu_entry(AcpiDeviceIf *adev, int uid,
const CPUArchIdList *apic_ids, GArray *entry);
-/* e820 types */
-#define E820_RAM 1
-#define E820_RESERVED 2
-#define E820_ACPI 3
-#define E820_NVS 4
-#define E820_UNUSABLE 5
-
-int e820_add_entry(uint64_t, uint64_t, uint32_t);
-int e820_get_num_entries(void);
-bool e820_get_entry(int, uint32_t, uint64_t *, uint64_t *);
-
extern GlobalProperty pc_compat_4_0[];
extern const size_t pc_compat_4_0_len;
diff --git a/target/i386/kvm.c b/target/i386/kvm.c
index e4b4f5756a..cd4eb1ed0d 100644
--- a/target/i386/kvm.c
+++ b/target/i386/kvm.c
@@ -38,6 +38,7 @@
#include "hw/i386/apic-msidef.h"
#include "hw/i386/intel_iommu.h"
#include "hw/i386/x86-iommu.h"
+#include "hw/i386/e820_memory_layout.h"
#include "hw/pci/pci.h"
#include "hw/pci/msi.h"
--
2.20.1
^ permalink raw reply related [flat|nested] 36+ messages in thread
* [Qemu-devel] [PATCH v3 02/15] hw/i386/pc: Extract e820 memory layout code
@ 2019-07-01 13:35 ` Philippe Mathieu-Daudé
0 siblings, 0 replies; 36+ messages in thread
From: Philippe Mathieu-Daudé @ 2019-07-01 13:35 UTC (permalink / raw)
To: qemu-devel
Cc: Yang Zhong, Samuel Ortiz, kvm, Michael S. Tsirkin,
Marcelo Tosatti, Li Qiang, Rob Bradford, Paolo Bonzini,
Richard Henderson, Philippe Mathieu-Daudé,
Eduardo Habkost
Suggested-by: Samuel Ortiz <sameo@linux.intel.com>
Reviewed-by: Li Qiang <liq3ea@gmail.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
---
v3: KISS, do not use unsigned, do not add broken documentation
---
hw/i386/Makefile.objs | 2 +-
hw/i386/e820_memory_layout.c | 59 ++++++++++++++++++++++++++++++++++
hw/i386/e820_memory_layout.h | 42 +++++++++++++++++++++++++
hw/i386/pc.c | 61 +-----------------------------------
include/hw/i386/pc.h | 11 -------
target/i386/kvm.c | 1 +
6 files changed, 104 insertions(+), 72 deletions(-)
create mode 100644 hw/i386/e820_memory_layout.c
create mode 100644 hw/i386/e820_memory_layout.h
diff --git a/hw/i386/Makefile.objs b/hw/i386/Makefile.objs
index 5d9c9efd5f..d3374e0831 100644
--- a/hw/i386/Makefile.objs
+++ b/hw/i386/Makefile.objs
@@ -1,5 +1,5 @@
obj-$(CONFIG_KVM) += kvm/
-obj-y += multiboot.o
+obj-y += e820_memory_layout.o multiboot.o
obj-y += pc.o
obj-$(CONFIG_I440FX) += pc_piix.o
obj-$(CONFIG_Q35) += pc_q35.o
diff --git a/hw/i386/e820_memory_layout.c b/hw/i386/e820_memory_layout.c
new file mode 100644
index 0000000000..bcf9eaf837
--- /dev/null
+++ b/hw/i386/e820_memory_layout.c
@@ -0,0 +1,59 @@
+/*
+ * QEMU BIOS e820 routines
+ *
+ * Copyright (c) 2003-2004 Fabrice Bellard
+ *
+ * SPDX-License-Identifier: MIT
+ */
+
+#include "qemu/osdep.h"
+#include "qemu/bswap.h"
+#include "e820_memory_layout.h"
+
+static size_t e820_entries;
+struct e820_table e820_reserve;
+struct e820_entry *e820_table;
+
+int e820_add_entry(uint64_t address, uint64_t length, uint32_t type)
+{
+ int index = le32_to_cpu(e820_reserve.count);
+ struct e820_entry *entry;
+
+ if (type != E820_RAM) {
+ /* old FW_CFG_E820_TABLE entry -- reservations only */
+ if (index >= E820_NR_ENTRIES) {
+ return -EBUSY;
+ }
+ entry = &e820_reserve.entry[index++];
+
+ entry->address = cpu_to_le64(address);
+ entry->length = cpu_to_le64(length);
+ entry->type = cpu_to_le32(type);
+
+ e820_reserve.count = cpu_to_le32(index);
+ }
+
+ /* new "etc/e820" file -- include ram too */
+ e820_table = g_renew(struct e820_entry, e820_table, e820_entries + 1);
+ e820_table[e820_entries].address = cpu_to_le64(address);
+ e820_table[e820_entries].length = cpu_to_le64(length);
+ e820_table[e820_entries].type = cpu_to_le32(type);
+ e820_entries++;
+
+ return e820_entries;
+}
+
+int e820_get_num_entries(void)
+{
+ return e820_entries;
+}
+
+bool e820_get_entry(int idx, uint32_t type, uint64_t *address, uint64_t *length)
+{
+ if (idx < e820_entries && e820_table[idx].type == cpu_to_le32(type)) {
+ *address = le64_to_cpu(e820_table[idx].address);
+ *length = le64_to_cpu(e820_table[idx].length);
+ return true;
+ }
+ return false;
+}
diff --git a/hw/i386/e820_memory_layout.h b/hw/i386/e820_memory_layout.h
new file mode 100644
index 0000000000..2a0ceb8b9c
--- /dev/null
+++ b/hw/i386/e820_memory_layout.h
@@ -0,0 +1,42 @@
+/*
+ * QEMU BIOS e820 routines
+ *
+ * Copyright (c) 2003-2004 Fabrice Bellard
+ *
+ * SPDX-License-Identifier: MIT
+ */
+
+#ifndef HW_I386_E820_H
+#define HW_I386_E820_H
+
+/* e820 types */
+#define E820_RAM 1
+#define E820_RESERVED 2
+#define E820_ACPI 3
+#define E820_NVS 4
+#define E820_UNUSABLE 5
+
+#define E820_NR_ENTRIES 16
+
+struct e820_entry {
+ uint64_t address;
+ uint64_t length;
+ uint32_t type;
+} QEMU_PACKED __attribute((__aligned__(4)));
+
+struct e820_table {
+ uint32_t count;
+ struct e820_entry entry[E820_NR_ENTRIES];
+} QEMU_PACKED __attribute((__aligned__(4)));
+
+extern struct e820_table e820_reserve;
+extern struct e820_entry *e820_table;
+
+int e820_add_entry(uint64_t address, uint64_t length, uint32_t type);
+int e820_get_num_entries(void);
+bool e820_get_entry(int index, uint32_t type,
+ uint64_t *address, uint64_t *length);
+
+
+
+#endif
diff --git a/hw/i386/pc.c b/hw/i386/pc.c
index 691726b85b..8ac85eadf1 100644
--- a/hw/i386/pc.c
+++ b/hw/i386/pc.c
@@ -79,6 +79,7 @@
#include "hw/i386/intel_iommu.h"
#include "hw/net/ne2000-isa.h"
#include "standard-headers/asm-x86/bootparam.h"
+#include "e820_memory_layout.h"
/* debug PC/ISA interrupts */
//#define DEBUG_IRQ
@@ -90,22 +91,6 @@
#define DPRINTF(fmt, ...)
#endif
-#define E820_NR_ENTRIES 16
-
-struct e820_entry {
- uint64_t address;
- uint64_t length;
- uint32_t type;
-} QEMU_PACKED __attribute((__aligned__(4)));
-
-struct e820_table {
- uint32_t count;
- struct e820_entry entry[E820_NR_ENTRIES];
-} QEMU_PACKED __attribute((__aligned__(4)));
-
-static struct e820_table e820_reserve;
-static struct e820_entry *e820_table;
-static unsigned e820_entries;
struct hpet_fw_config hpet_cfg = {.count = UINT8_MAX};
/* Physical Address of PVH entry point read from kernel ELF NOTE */
@@ -869,50 +854,6 @@ static void handle_a20_line_change(void *opaque, int irq, int level)
x86_cpu_set_a20(cpu, level);
}
-int e820_add_entry(uint64_t address, uint64_t length, uint32_t type)
-{
- int index = le32_to_cpu(e820_reserve.count);
- struct e820_entry *entry;
-
- if (type != E820_RAM) {
- /* old FW_CFG_E820_TABLE entry -- reservations only */
- if (index >= E820_NR_ENTRIES) {
- return -EBUSY;
- }
- entry = &e820_reserve.entry[index++];
-
- entry->address = cpu_to_le64(address);
- entry->length = cpu_to_le64(length);
- entry->type = cpu_to_le32(type);
-
- e820_reserve.count = cpu_to_le32(index);
- }
-
- /* new "etc/e820" file -- include ram too */
- e820_table = g_renew(struct e820_entry, e820_table, e820_entries + 1);
- e820_table[e820_entries].address = cpu_to_le64(address);
- e820_table[e820_entries].length = cpu_to_le64(length);
- e820_table[e820_entries].type = cpu_to_le32(type);
- e820_entries++;
-
- return e820_entries;
-}
-
-int e820_get_num_entries(void)
-{
- return e820_entries;
-}
-
-bool e820_get_entry(int idx, uint32_t type, uint64_t *address, uint64_t *length)
-{
- if (idx < e820_entries && e820_table[idx].type == cpu_to_le32(type)) {
- *address = le64_to_cpu(e820_table[idx].address);
- *length = le64_to_cpu(e820_table[idx].length);
- return true;
- }
- return false;
-}
-
/* Enables contiguous-apic-ID mode, for compatibility */
static bool compat_apic_id_mode;
diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h
index c54cc54a47..99b0a2e705 100644
--- a/include/hw/i386/pc.h
+++ b/include/hw/i386/pc.h
@@ -282,17 +282,6 @@ void pc_system_firmware_init(PCMachineState *pcms, MemoryRegion *rom_memory);
void pc_madt_cpu_entry(AcpiDeviceIf *adev, int uid,
const CPUArchIdList *apic_ids, GArray *entry);
-/* e820 types */
-#define E820_RAM 1
-#define E820_RESERVED 2
-#define E820_ACPI 3
-#define E820_NVS 4
-#define E820_UNUSABLE 5
-
-int e820_add_entry(uint64_t, uint64_t, uint32_t);
-int e820_get_num_entries(void);
-bool e820_get_entry(int, uint32_t, uint64_t *, uint64_t *);
-
extern GlobalProperty pc_compat_4_0[];
extern const size_t pc_compat_4_0_len;
diff --git a/target/i386/kvm.c b/target/i386/kvm.c
index e4b4f5756a..cd4eb1ed0d 100644
--- a/target/i386/kvm.c
+++ b/target/i386/kvm.c
@@ -38,6 +38,7 @@
#include "hw/i386/apic-msidef.h"
#include "hw/i386/intel_iommu.h"
#include "hw/i386/x86-iommu.h"
+#include "hw/i386/e820_memory_layout.h"
#include "hw/pci/pci.h"
#include "hw/pci/msi.h"
--
2.20.1
^ permalink raw reply related [flat|nested] 36+ messages in thread
* [PATCH v3 03/15] hw/i386/pc: Use address_space_memory in place
2019-07-01 13:35 ` [Qemu-devel] " Philippe Mathieu-Daudé
@ 2019-07-01 13:35 ` Philippe Mathieu-Daudé
-1 siblings, 0 replies; 36+ messages in thread
From: Philippe Mathieu-Daudé @ 2019-07-01 13:35 UTC (permalink / raw)
To: qemu-devel
Cc: Marcel Apfelbaum, Samuel Ortiz, kvm, Yang Zhong, Paolo Bonzini,
Michael S. Tsirkin, Rob Bradford, Eduardo Habkost,
Marcelo Tosatti, Richard Henderson, Philippe Mathieu-Daudé,
Li Qiang
The address_space_memory variable is used once.
Use it in place and remove the argument.
Suggested-by: Samuel Ortiz <sameo@linux.intel.com>
Reviewed-by: Li Qiang <liq3ea@gmail.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
---
hw/i386/pc.c | 7 ++++---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/hw/i386/pc.c b/hw/i386/pc.c
index 8ac85eadf1..ea7422b16c 100644
--- a/hw/i386/pc.c
+++ b/hw/i386/pc.c
@@ -929,7 +929,7 @@ static void pc_build_smbios(PCMachineState *pcms)
}
}
-static FWCfgState *bochs_bios_init(AddressSpace *as, PCMachineState *pcms)
+static FWCfgState *bochs_bios_init(PCMachineState *pcms)
{
FWCfgState *fw_cfg;
uint64_t *numa_fw_cfg;
@@ -937,7 +937,8 @@ static FWCfgState *bochs_bios_init(AddressSpace *as, PCMachineState *pcms)
const CPUArchIdList *cpus;
MachineClass *mc = MACHINE_GET_CLASS(pcms);
- fw_cfg = fw_cfg_init_io_dma(FW_CFG_IO_BASE, FW_CFG_IO_BASE + 4, as);
+ fw_cfg = fw_cfg_init_io_dma(FW_CFG_IO_BASE, FW_CFG_IO_BASE + 4,
+ &address_space_memory);
fw_cfg_add_i16(fw_cfg, FW_CFG_NB_CPUS, pcms->boot_cpus);
/* FW_CFG_MAX_CPUS is a bit confusing/problematic on x86:
@@ -1762,7 +1763,7 @@ void pc_memory_init(PCMachineState *pcms,
option_rom_mr,
1);
- fw_cfg = bochs_bios_init(&address_space_memory, pcms);
+ fw_cfg = bochs_bios_init(pcms);
rom_set_fw(fw_cfg);
--
2.20.1
^ permalink raw reply related [flat|nested] 36+ messages in thread
* [Qemu-devel] [PATCH v3 03/15] hw/i386/pc: Use address_space_memory in place
@ 2019-07-01 13:35 ` Philippe Mathieu-Daudé
0 siblings, 0 replies; 36+ messages in thread
From: Philippe Mathieu-Daudé @ 2019-07-01 13:35 UTC (permalink / raw)
To: qemu-devel
Cc: Yang Zhong, Samuel Ortiz, kvm, Michael S. Tsirkin,
Marcelo Tosatti, Li Qiang, Rob Bradford, Paolo Bonzini,
Richard Henderson, Philippe Mathieu-Daudé,
Eduardo Habkost
The address_space_memory variable is used once.
Use it in place and remove the argument.
Suggested-by: Samuel Ortiz <sameo@linux.intel.com>
Reviewed-by: Li Qiang <liq3ea@gmail.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
---
hw/i386/pc.c | 7 ++++---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/hw/i386/pc.c b/hw/i386/pc.c
index 8ac85eadf1..ea7422b16c 100644
--- a/hw/i386/pc.c
+++ b/hw/i386/pc.c
@@ -929,7 +929,7 @@ static void pc_build_smbios(PCMachineState *pcms)
}
}
-static FWCfgState *bochs_bios_init(AddressSpace *as, PCMachineState *pcms)
+static FWCfgState *bochs_bios_init(PCMachineState *pcms)
{
FWCfgState *fw_cfg;
uint64_t *numa_fw_cfg;
@@ -937,7 +937,8 @@ static FWCfgState *bochs_bios_init(AddressSpace *as, PCMachineState *pcms)
const CPUArchIdList *cpus;
MachineClass *mc = MACHINE_GET_CLASS(pcms);
- fw_cfg = fw_cfg_init_io_dma(FW_CFG_IO_BASE, FW_CFG_IO_BASE + 4, as);
+ fw_cfg = fw_cfg_init_io_dma(FW_CFG_IO_BASE, FW_CFG_IO_BASE + 4,
+ &address_space_memory);
fw_cfg_add_i16(fw_cfg, FW_CFG_NB_CPUS, pcms->boot_cpus);
/* FW_CFG_MAX_CPUS is a bit confusing/problematic on x86:
@@ -1762,7 +1763,7 @@ void pc_memory_init(PCMachineState *pcms,
option_rom_mr,
1);
- fw_cfg = bochs_bios_init(&address_space_memory, pcms);
+ fw_cfg = bochs_bios_init(pcms);
rom_set_fw(fw_cfg);
--
2.20.1
^ permalink raw reply related [flat|nested] 36+ messages in thread
* [PATCH v3 04/15] hw/i386/pc: Rename bochs_bios_init as more generic fw_cfg_arch_create
2019-07-01 13:35 ` [Qemu-devel] " Philippe Mathieu-Daudé
@ 2019-07-01 13:35 ` Philippe Mathieu-Daudé
-1 siblings, 0 replies; 36+ messages in thread
From: Philippe Mathieu-Daudé @ 2019-07-01 13:35 UTC (permalink / raw)
To: qemu-devel
Cc: Marcel Apfelbaum, Samuel Ortiz, kvm, Yang Zhong, Paolo Bonzini,
Michael S. Tsirkin, Rob Bradford, Eduardo Habkost,
Marcelo Tosatti, Richard Henderson, Philippe Mathieu-Daudé,
Li Qiang
The bochs_bios_init() function is not restricted to the Bochs
BIOS and is useful to other BIOS.
Since it is not specific to the PC machine, and can be reused
by other machines of the X86 architecture, rename it as
fw_cfg_arch_create().
Suggested-by: Samuel Ortiz <sameo@linux.intel.com>
Reviewed-by: Li Qiang <liq3ea@gmail.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
---
v2: Rename x86_create_fw_cfg() -> fw_cfg_arch_create() (MST)
---
hw/i386/pc.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/hw/i386/pc.c b/hw/i386/pc.c
index ea7422b16c..5fc52f6a0e 100644
--- a/hw/i386/pc.c
+++ b/hw/i386/pc.c
@@ -929,7 +929,7 @@ static void pc_build_smbios(PCMachineState *pcms)
}
}
-static FWCfgState *bochs_bios_init(PCMachineState *pcms)
+static FWCfgState *fw_cfg_arch_create(PCMachineState *pcms)
{
FWCfgState *fw_cfg;
uint64_t *numa_fw_cfg;
@@ -1509,7 +1509,7 @@ void pc_cpus_init(PCMachineState *pcms)
* Limit for the APIC ID value, so that all
* CPU APIC IDs are < pcms->apic_id_limit.
*
- * This is used for FW_CFG_MAX_CPUS. See comments on bochs_bios_init().
+ * This is used for FW_CFG_MAX_CPUS. See comments on fw_cfg_arch_create().
*/
pcms->apic_id_limit = x86_cpu_apic_id_from_index(max_cpus - 1) + 1;
possible_cpus = mc->possible_cpu_arch_ids(ms);
@@ -1763,7 +1763,7 @@ void pc_memory_init(PCMachineState *pcms,
option_rom_mr,
1);
- fw_cfg = bochs_bios_init(pcms);
+ fw_cfg = fw_cfg_arch_create(pcms);
rom_set_fw(fw_cfg);
--
2.20.1
^ permalink raw reply related [flat|nested] 36+ messages in thread
* [Qemu-devel] [PATCH v3 04/15] hw/i386/pc: Rename bochs_bios_init as more generic fw_cfg_arch_create
@ 2019-07-01 13:35 ` Philippe Mathieu-Daudé
0 siblings, 0 replies; 36+ messages in thread
From: Philippe Mathieu-Daudé @ 2019-07-01 13:35 UTC (permalink / raw)
To: qemu-devel
Cc: Yang Zhong, Samuel Ortiz, kvm, Michael S. Tsirkin,
Marcelo Tosatti, Li Qiang, Rob Bradford, Paolo Bonzini,
Richard Henderson, Philippe Mathieu-Daudé,
Eduardo Habkost
The bochs_bios_init() function is not restricted to the Bochs
BIOS and is useful to other BIOS.
Since it is not specific to the PC machine, and can be reused
by other machines of the X86 architecture, rename it as
fw_cfg_arch_create().
Suggested-by: Samuel Ortiz <sameo@linux.intel.com>
Reviewed-by: Li Qiang <liq3ea@gmail.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
---
v2: Rename x86_create_fw_cfg() -> fw_cfg_arch_create() (MST)
---
hw/i386/pc.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/hw/i386/pc.c b/hw/i386/pc.c
index ea7422b16c..5fc52f6a0e 100644
--- a/hw/i386/pc.c
+++ b/hw/i386/pc.c
@@ -929,7 +929,7 @@ static void pc_build_smbios(PCMachineState *pcms)
}
}
-static FWCfgState *bochs_bios_init(PCMachineState *pcms)
+static FWCfgState *fw_cfg_arch_create(PCMachineState *pcms)
{
FWCfgState *fw_cfg;
uint64_t *numa_fw_cfg;
@@ -1509,7 +1509,7 @@ void pc_cpus_init(PCMachineState *pcms)
* Limit for the APIC ID value, so that all
* CPU APIC IDs are < pcms->apic_id_limit.
*
- * This is used for FW_CFG_MAX_CPUS. See comments on bochs_bios_init().
+ * This is used for FW_CFG_MAX_CPUS. See comments on fw_cfg_arch_create().
*/
pcms->apic_id_limit = x86_cpu_apic_id_from_index(max_cpus - 1) + 1;
possible_cpus = mc->possible_cpu_arch_ids(ms);
@@ -1763,7 +1763,7 @@ void pc_memory_init(PCMachineState *pcms,
option_rom_mr,
1);
- fw_cfg = bochs_bios_init(pcms);
+ fw_cfg = fw_cfg_arch_create(pcms);
rom_set_fw(fw_cfg);
--
2.20.1
^ permalink raw reply related [flat|nested] 36+ messages in thread
* [PATCH v3 05/15] hw/i386/pc: Pass the boot_cpus value by argument
2019-07-01 13:35 ` [Qemu-devel] " Philippe Mathieu-Daudé
@ 2019-07-01 13:35 ` Philippe Mathieu-Daudé
-1 siblings, 0 replies; 36+ messages in thread
From: Philippe Mathieu-Daudé @ 2019-07-01 13:35 UTC (permalink / raw)
To: qemu-devel
Cc: Marcel Apfelbaum, Samuel Ortiz, kvm, Yang Zhong, Paolo Bonzini,
Michael S. Tsirkin, Rob Bradford, Eduardo Habkost,
Marcelo Tosatti, Richard Henderson, Philippe Mathieu-Daudé
The boot_cpus is used once. Pass it by argument, this will
allow us to remove the PCMachineState argument later.
Suggested-by: Samuel Ortiz <sameo@linux.intel.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
---
hw/i386/pc.c | 7 ++++---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/hw/i386/pc.c b/hw/i386/pc.c
index 5fc52f6a0e..eaeb7891dd 100644
--- a/hw/i386/pc.c
+++ b/hw/i386/pc.c
@@ -929,7 +929,8 @@ static void pc_build_smbios(PCMachineState *pcms)
}
}
-static FWCfgState *fw_cfg_arch_create(PCMachineState *pcms)
+static FWCfgState *fw_cfg_arch_create(PCMachineState *pcms,
+ uint16_t boot_cpus)
{
FWCfgState *fw_cfg;
uint64_t *numa_fw_cfg;
@@ -939,7 +940,7 @@ static FWCfgState *fw_cfg_arch_create(PCMachineState *pcms)
fw_cfg = fw_cfg_init_io_dma(FW_CFG_IO_BASE, FW_CFG_IO_BASE + 4,
&address_space_memory);
- fw_cfg_add_i16(fw_cfg, FW_CFG_NB_CPUS, pcms->boot_cpus);
+ fw_cfg_add_i16(fw_cfg, FW_CFG_NB_CPUS, boot_cpus);
/* FW_CFG_MAX_CPUS is a bit confusing/problematic on x86:
*
@@ -1763,7 +1764,7 @@ void pc_memory_init(PCMachineState *pcms,
option_rom_mr,
1);
- fw_cfg = fw_cfg_arch_create(pcms);
+ fw_cfg = fw_cfg_arch_create(pcms, pcms->boot_cpus);
rom_set_fw(fw_cfg);
--
2.20.1
^ permalink raw reply related [flat|nested] 36+ messages in thread
* [Qemu-devel] [PATCH v3 05/15] hw/i386/pc: Pass the boot_cpus value by argument
@ 2019-07-01 13:35 ` Philippe Mathieu-Daudé
0 siblings, 0 replies; 36+ messages in thread
From: Philippe Mathieu-Daudé @ 2019-07-01 13:35 UTC (permalink / raw)
To: qemu-devel
Cc: Yang Zhong, Samuel Ortiz, kvm, Michael S. Tsirkin,
Marcelo Tosatti, Rob Bradford, Paolo Bonzini, Richard Henderson,
Philippe Mathieu-Daudé,
Eduardo Habkost
The boot_cpus is used once. Pass it by argument, this will
allow us to remove the PCMachineState argument later.
Suggested-by: Samuel Ortiz <sameo@linux.intel.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
---
hw/i386/pc.c | 7 ++++---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/hw/i386/pc.c b/hw/i386/pc.c
index 5fc52f6a0e..eaeb7891dd 100644
--- a/hw/i386/pc.c
+++ b/hw/i386/pc.c
@@ -929,7 +929,8 @@ static void pc_build_smbios(PCMachineState *pcms)
}
}
-static FWCfgState *fw_cfg_arch_create(PCMachineState *pcms)
+static FWCfgState *fw_cfg_arch_create(PCMachineState *pcms,
+ uint16_t boot_cpus)
{
FWCfgState *fw_cfg;
uint64_t *numa_fw_cfg;
@@ -939,7 +940,7 @@ static FWCfgState *fw_cfg_arch_create(PCMachineState *pcms)
fw_cfg = fw_cfg_init_io_dma(FW_CFG_IO_BASE, FW_CFG_IO_BASE + 4,
&address_space_memory);
- fw_cfg_add_i16(fw_cfg, FW_CFG_NB_CPUS, pcms->boot_cpus);
+ fw_cfg_add_i16(fw_cfg, FW_CFG_NB_CPUS, boot_cpus);
/* FW_CFG_MAX_CPUS is a bit confusing/problematic on x86:
*
@@ -1763,7 +1764,7 @@ void pc_memory_init(PCMachineState *pcms,
option_rom_mr,
1);
- fw_cfg = fw_cfg_arch_create(pcms);
+ fw_cfg = fw_cfg_arch_create(pcms, pcms->boot_cpus);
rom_set_fw(fw_cfg);
--
2.20.1
^ permalink raw reply related [flat|nested] 36+ messages in thread
* [PATCH v3 06/15] hw/i386/pc: Pass the apic_id_limit value by argument
2019-07-01 13:35 ` [Qemu-devel] " Philippe Mathieu-Daudé
@ 2019-07-01 13:35 ` Philippe Mathieu-Daudé
-1 siblings, 0 replies; 36+ messages in thread
From: Philippe Mathieu-Daudé @ 2019-07-01 13:35 UTC (permalink / raw)
To: qemu-devel
Cc: Marcel Apfelbaum, Samuel Ortiz, kvm, Yang Zhong, Paolo Bonzini,
Michael S. Tsirkin, Rob Bradford, Eduardo Habkost,
Marcelo Tosatti, Richard Henderson, Philippe Mathieu-Daudé
Pass the apic_id_limit value by argument, this will
allow us to remove the PCMachineState argument later.
Suggested-by: Samuel Ortiz <sameo@linux.intel.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
---
hw/i386/pc.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/hw/i386/pc.c b/hw/i386/pc.c
index eaeb7891dd..0248c8dc17 100644
--- a/hw/i386/pc.c
+++ b/hw/i386/pc.c
@@ -930,7 +930,8 @@ static void pc_build_smbios(PCMachineState *pcms)
}
static FWCfgState *fw_cfg_arch_create(PCMachineState *pcms,
- uint16_t boot_cpus)
+ uint16_t boot_cpus,
+ uint16_t apic_id_limit)
{
FWCfgState *fw_cfg;
uint64_t *numa_fw_cfg;
@@ -1764,7 +1765,7 @@ void pc_memory_init(PCMachineState *pcms,
option_rom_mr,
1);
- fw_cfg = fw_cfg_arch_create(pcms, pcms->boot_cpus);
+ fw_cfg = fw_cfg_arch_create(pcms, pcms->boot_cpus, pcms->apic_id_limit);
rom_set_fw(fw_cfg);
--
2.20.1
^ permalink raw reply related [flat|nested] 36+ messages in thread
* [Qemu-devel] [PATCH v3 06/15] hw/i386/pc: Pass the apic_id_limit value by argument
@ 2019-07-01 13:35 ` Philippe Mathieu-Daudé
0 siblings, 0 replies; 36+ messages in thread
From: Philippe Mathieu-Daudé @ 2019-07-01 13:35 UTC (permalink / raw)
To: qemu-devel
Cc: Yang Zhong, Samuel Ortiz, kvm, Michael S. Tsirkin,
Marcelo Tosatti, Rob Bradford, Paolo Bonzini, Richard Henderson,
Philippe Mathieu-Daudé,
Eduardo Habkost
Pass the apic_id_limit value by argument, this will
allow us to remove the PCMachineState argument later.
Suggested-by: Samuel Ortiz <sameo@linux.intel.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
---
hw/i386/pc.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/hw/i386/pc.c b/hw/i386/pc.c
index eaeb7891dd..0248c8dc17 100644
--- a/hw/i386/pc.c
+++ b/hw/i386/pc.c
@@ -930,7 +930,8 @@ static void pc_build_smbios(PCMachineState *pcms)
}
static FWCfgState *fw_cfg_arch_create(PCMachineState *pcms,
- uint16_t boot_cpus)
+ uint16_t boot_cpus,
+ uint16_t apic_id_limit)
{
FWCfgState *fw_cfg;
uint64_t *numa_fw_cfg;
@@ -1764,7 +1765,7 @@ void pc_memory_init(PCMachineState *pcms,
option_rom_mr,
1);
- fw_cfg = fw_cfg_arch_create(pcms, pcms->boot_cpus);
+ fw_cfg = fw_cfg_arch_create(pcms, pcms->boot_cpus, pcms->apic_id_limit);
rom_set_fw(fw_cfg);
--
2.20.1
^ permalink raw reply related [flat|nested] 36+ messages in thread
* [PATCH v3 07/15] hw/i386/pc: Pass the CPUArchIdList array by argument
2019-07-01 13:35 ` [Qemu-devel] " Philippe Mathieu-Daudé
@ 2019-07-01 13:35 ` Philippe Mathieu-Daudé
-1 siblings, 0 replies; 36+ messages in thread
From: Philippe Mathieu-Daudé @ 2019-07-01 13:35 UTC (permalink / raw)
To: qemu-devel
Cc: Marcel Apfelbaum, Samuel Ortiz, kvm, Yang Zhong, Paolo Bonzini,
Michael S. Tsirkin, Rob Bradford, Eduardo Habkost,
Marcelo Tosatti, Richard Henderson, Philippe Mathieu-Daudé
Pass the CPUArchIdList array by argument, this will
allow us to remove the PCMachineState argument later.
Suggested-by: Samuel Ortiz <sameo@linux.intel.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
---
hw/i386/pc.c | 17 ++++++++---------
1 file changed, 8 insertions(+), 9 deletions(-)
diff --git a/hw/i386/pc.c b/hw/i386/pc.c
index 0248c8dc17..1e856704e1 100644
--- a/hw/i386/pc.c
+++ b/hw/i386/pc.c
@@ -930,14 +930,13 @@ static void pc_build_smbios(PCMachineState *pcms)
}
static FWCfgState *fw_cfg_arch_create(PCMachineState *pcms,
+ const CPUArchIdList *cpus,
uint16_t boot_cpus,
uint16_t apic_id_limit)
{
FWCfgState *fw_cfg;
uint64_t *numa_fw_cfg;
int i;
- const CPUArchIdList *cpus;
- MachineClass *mc = MACHINE_GET_CLASS(pcms);
fw_cfg = fw_cfg_init_io_dma(FW_CFG_IO_BASE, FW_CFG_IO_BASE + 4,
&address_space_memory);
@@ -955,7 +954,7 @@ static FWCfgState *fw_cfg_arch_create(PCMachineState *pcms,
* So for compatibility reasons with old BIOSes we are stuck with
* "etc/max-cpus" actually being apic_id_limit
*/
- fw_cfg_add_i16(fw_cfg, FW_CFG_MAX_CPUS, (uint16_t)pcms->apic_id_limit);
+ fw_cfg_add_i16(fw_cfg, FW_CFG_MAX_CPUS, apic_id_limit);
fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, (uint64_t)ram_size);
fw_cfg_add_bytes(fw_cfg, FW_CFG_ACPI_TABLES,
acpi_tables, acpi_tables_len);
@@ -971,20 +970,19 @@ static FWCfgState *fw_cfg_arch_create(PCMachineState *pcms,
* of nodes, one word for each VCPU->node and one word for each node to
* hold the amount of memory.
*/
- numa_fw_cfg = g_new0(uint64_t, 1 + pcms->apic_id_limit + nb_numa_nodes);
+ numa_fw_cfg = g_new0(uint64_t, 1 + apic_id_limit + nb_numa_nodes);
numa_fw_cfg[0] = cpu_to_le64(nb_numa_nodes);
- cpus = mc->possible_cpu_arch_ids(MACHINE(pcms));
for (i = 0; i < cpus->len; i++) {
unsigned int apic_id = cpus->cpus[i].arch_id;
- assert(apic_id < pcms->apic_id_limit);
+ assert(apic_id < apic_id_limit);
numa_fw_cfg[apic_id + 1] = cpu_to_le64(cpus->cpus[i].props.node_id);
}
for (i = 0; i < nb_numa_nodes; i++) {
- numa_fw_cfg[pcms->apic_id_limit + 1 + i] =
+ numa_fw_cfg[apic_id_limit + 1 + i] =
cpu_to_le64(numa_info[i].node_mem);
}
fw_cfg_add_bytes(fw_cfg, FW_CFG_NUMA, numa_fw_cfg,
- (1 + pcms->apic_id_limit + nb_numa_nodes) *
+ (1 + apic_id_limit + nb_numa_nodes) *
sizeof(*numa_fw_cfg));
return fw_cfg;
@@ -1765,7 +1763,8 @@ void pc_memory_init(PCMachineState *pcms,
option_rom_mr,
1);
- fw_cfg = fw_cfg_arch_create(pcms, pcms->boot_cpus, pcms->apic_id_limit);
+ fw_cfg = fw_cfg_arch_create(pcms, mc->possible_cpu_arch_ids(machine),
+ pcms->boot_cpus, pcms->apic_id_limit);
rom_set_fw(fw_cfg);
--
2.20.1
^ permalink raw reply related [flat|nested] 36+ messages in thread
* [Qemu-devel] [PATCH v3 07/15] hw/i386/pc: Pass the CPUArchIdList array by argument
@ 2019-07-01 13:35 ` Philippe Mathieu-Daudé
0 siblings, 0 replies; 36+ messages in thread
From: Philippe Mathieu-Daudé @ 2019-07-01 13:35 UTC (permalink / raw)
To: qemu-devel
Cc: Yang Zhong, Samuel Ortiz, kvm, Michael S. Tsirkin,
Marcelo Tosatti, Rob Bradford, Paolo Bonzini, Richard Henderson,
Philippe Mathieu-Daudé,
Eduardo Habkost
Pass the CPUArchIdList array by argument, this will
allow us to remove the PCMachineState argument later.
Suggested-by: Samuel Ortiz <sameo@linux.intel.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
---
hw/i386/pc.c | 17 ++++++++---------
1 file changed, 8 insertions(+), 9 deletions(-)
diff --git a/hw/i386/pc.c b/hw/i386/pc.c
index 0248c8dc17..1e856704e1 100644
--- a/hw/i386/pc.c
+++ b/hw/i386/pc.c
@@ -930,14 +930,13 @@ static void pc_build_smbios(PCMachineState *pcms)
}
static FWCfgState *fw_cfg_arch_create(PCMachineState *pcms,
+ const CPUArchIdList *cpus,
uint16_t boot_cpus,
uint16_t apic_id_limit)
{
FWCfgState *fw_cfg;
uint64_t *numa_fw_cfg;
int i;
- const CPUArchIdList *cpus;
- MachineClass *mc = MACHINE_GET_CLASS(pcms);
fw_cfg = fw_cfg_init_io_dma(FW_CFG_IO_BASE, FW_CFG_IO_BASE + 4,
&address_space_memory);
@@ -955,7 +954,7 @@ static FWCfgState *fw_cfg_arch_create(PCMachineState *pcms,
* So for compatibility reasons with old BIOSes we are stuck with
* "etc/max-cpus" actually being apic_id_limit
*/
- fw_cfg_add_i16(fw_cfg, FW_CFG_MAX_CPUS, (uint16_t)pcms->apic_id_limit);
+ fw_cfg_add_i16(fw_cfg, FW_CFG_MAX_CPUS, apic_id_limit);
fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, (uint64_t)ram_size);
fw_cfg_add_bytes(fw_cfg, FW_CFG_ACPI_TABLES,
acpi_tables, acpi_tables_len);
@@ -971,20 +970,19 @@ static FWCfgState *fw_cfg_arch_create(PCMachineState *pcms,
* of nodes, one word for each VCPU->node and one word for each node to
* hold the amount of memory.
*/
- numa_fw_cfg = g_new0(uint64_t, 1 + pcms->apic_id_limit + nb_numa_nodes);
+ numa_fw_cfg = g_new0(uint64_t, 1 + apic_id_limit + nb_numa_nodes);
numa_fw_cfg[0] = cpu_to_le64(nb_numa_nodes);
- cpus = mc->possible_cpu_arch_ids(MACHINE(pcms));
for (i = 0; i < cpus->len; i++) {
unsigned int apic_id = cpus->cpus[i].arch_id;
- assert(apic_id < pcms->apic_id_limit);
+ assert(apic_id < apic_id_limit);
numa_fw_cfg[apic_id + 1] = cpu_to_le64(cpus->cpus[i].props.node_id);
}
for (i = 0; i < nb_numa_nodes; i++) {
- numa_fw_cfg[pcms->apic_id_limit + 1 + i] =
+ numa_fw_cfg[apic_id_limit + 1 + i] =
cpu_to_le64(numa_info[i].node_mem);
}
fw_cfg_add_bytes(fw_cfg, FW_CFG_NUMA, numa_fw_cfg,
- (1 + pcms->apic_id_limit + nb_numa_nodes) *
+ (1 + apic_id_limit + nb_numa_nodes) *
sizeof(*numa_fw_cfg));
return fw_cfg;
@@ -1765,7 +1763,8 @@ void pc_memory_init(PCMachineState *pcms,
option_rom_mr,
1);
- fw_cfg = fw_cfg_arch_create(pcms, pcms->boot_cpus, pcms->apic_id_limit);
+ fw_cfg = fw_cfg_arch_create(pcms, mc->possible_cpu_arch_ids(machine),
+ pcms->boot_cpus, pcms->apic_id_limit);
rom_set_fw(fw_cfg);
--
2.20.1
^ permalink raw reply related [flat|nested] 36+ messages in thread
* [PATCH v3 08/15] hw/i386/pc: Let fw_cfg_init() use the generic MachineState
2019-07-01 13:35 ` [Qemu-devel] " Philippe Mathieu-Daudé
@ 2019-07-01 13:35 ` Philippe Mathieu-Daudé
-1 siblings, 0 replies; 36+ messages in thread
From: Philippe Mathieu-Daudé @ 2019-07-01 13:35 UTC (permalink / raw)
To: qemu-devel
Cc: Marcel Apfelbaum, Samuel Ortiz, kvm, Yang Zhong, Paolo Bonzini,
Michael S. Tsirkin, Rob Bradford, Eduardo Habkost,
Marcelo Tosatti, Richard Henderson, Philippe Mathieu-Daudé
We removed the PCMachineState access, we can now let the fw_cfg_init()
function to take a generic MachineState object.
Suggested-by: Samuel Ortiz <sameo@linux.intel.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
---
hw/i386/pc.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/hw/i386/pc.c b/hw/i386/pc.c
index 1e856704e1..60ee71924a 100644
--- a/hw/i386/pc.c
+++ b/hw/i386/pc.c
@@ -929,7 +929,7 @@ static void pc_build_smbios(PCMachineState *pcms)
}
}
-static FWCfgState *fw_cfg_arch_create(PCMachineState *pcms,
+static FWCfgState *fw_cfg_arch_create(MachineState *ms,
const CPUArchIdList *cpus,
uint16_t boot_cpus,
uint16_t apic_id_limit)
@@ -1667,6 +1667,7 @@ void pc_memory_init(PCMachineState *pcms,
MemoryRegion *ram_below_4g, *ram_above_4g;
FWCfgState *fw_cfg;
MachineState *machine = MACHINE(pcms);
+ MachineClass *mc = MACHINE_GET_CLASS(machine);
PCMachineClass *pcmc = PC_MACHINE_GET_CLASS(pcms);
assert(machine->ram_size == pcms->below_4g_mem_size +
@@ -1763,7 +1764,7 @@ void pc_memory_init(PCMachineState *pcms,
option_rom_mr,
1);
- fw_cfg = fw_cfg_arch_create(pcms, mc->possible_cpu_arch_ids(machine),
+ fw_cfg = fw_cfg_arch_create(machine, mc->possible_cpu_arch_ids(machine),
pcms->boot_cpus, pcms->apic_id_limit);
rom_set_fw(fw_cfg);
--
2.20.1
^ permalink raw reply related [flat|nested] 36+ messages in thread
* [Qemu-devel] [PATCH v3 08/15] hw/i386/pc: Let fw_cfg_init() use the generic MachineState
@ 2019-07-01 13:35 ` Philippe Mathieu-Daudé
0 siblings, 0 replies; 36+ messages in thread
From: Philippe Mathieu-Daudé @ 2019-07-01 13:35 UTC (permalink / raw)
To: qemu-devel
Cc: Yang Zhong, Samuel Ortiz, kvm, Michael S. Tsirkin,
Marcelo Tosatti, Rob Bradford, Paolo Bonzini, Richard Henderson,
Philippe Mathieu-Daudé,
Eduardo Habkost
We removed the PCMachineState access, we can now let the fw_cfg_init()
function to take a generic MachineState object.
Suggested-by: Samuel Ortiz <sameo@linux.intel.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
---
hw/i386/pc.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/hw/i386/pc.c b/hw/i386/pc.c
index 1e856704e1..60ee71924a 100644
--- a/hw/i386/pc.c
+++ b/hw/i386/pc.c
@@ -929,7 +929,7 @@ static void pc_build_smbios(PCMachineState *pcms)
}
}
-static FWCfgState *fw_cfg_arch_create(PCMachineState *pcms,
+static FWCfgState *fw_cfg_arch_create(MachineState *ms,
const CPUArchIdList *cpus,
uint16_t boot_cpus,
uint16_t apic_id_limit)
@@ -1667,6 +1667,7 @@ void pc_memory_init(PCMachineState *pcms,
MemoryRegion *ram_below_4g, *ram_above_4g;
FWCfgState *fw_cfg;
MachineState *machine = MACHINE(pcms);
+ MachineClass *mc = MACHINE_GET_CLASS(machine);
PCMachineClass *pcmc = PC_MACHINE_GET_CLASS(pcms);
assert(machine->ram_size == pcms->below_4g_mem_size +
@@ -1763,7 +1764,7 @@ void pc_memory_init(PCMachineState *pcms,
option_rom_mr,
1);
- fw_cfg = fw_cfg_arch_create(pcms, mc->possible_cpu_arch_ids(machine),
+ fw_cfg = fw_cfg_arch_create(machine, mc->possible_cpu_arch_ids(machine),
pcms->boot_cpus, pcms->apic_id_limit);
rom_set_fw(fw_cfg);
--
2.20.1
^ permalink raw reply related [flat|nested] 36+ messages in thread
* [PATCH v3 09/15] hw/i386/pc: Let pc_build_smbios() take a FWCfgState argument
2019-07-01 13:35 ` [Qemu-devel] " Philippe Mathieu-Daudé
@ 2019-07-01 13:35 ` Philippe Mathieu-Daudé
-1 siblings, 0 replies; 36+ messages in thread
From: Philippe Mathieu-Daudé @ 2019-07-01 13:35 UTC (permalink / raw)
To: qemu-devel
Cc: Marcel Apfelbaum, Samuel Ortiz, kvm, Yang Zhong, Paolo Bonzini,
Michael S. Tsirkin, Rob Bradford, Eduardo Habkost,
Marcelo Tosatti, Richard Henderson, Philippe Mathieu-Daudé
Pass the FWCfgState object by argument, this will
allow us to remove the PCMachineState argument later.
Suggested-by: Samuel Ortiz <sameo@linux.intel.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
---
hw/i386/pc.c | 10 +++++-----
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/hw/i386/pc.c b/hw/i386/pc.c
index 60ee71924a..2b6502a38c 100644
--- a/hw/i386/pc.c
+++ b/hw/i386/pc.c
@@ -887,7 +887,7 @@ static uint32_t x86_cpu_apic_id_from_index(unsigned int cpu_index)
}
}
-static void pc_build_smbios(PCMachineState *pcms)
+static void pc_build_smbios(PCMachineState *pcms, FWCfgState *fw_cfg)
{
uint8_t *smbios_tables, *smbios_anchor;
size_t smbios_tables_len, smbios_anchor_len;
@@ -901,7 +901,7 @@ static void pc_build_smbios(PCMachineState *pcms)
smbios_tables = smbios_get_table_legacy(&smbios_tables_len);
if (smbios_tables) {
- fw_cfg_add_bytes(pcms->fw_cfg, FW_CFG_SMBIOS_ENTRIES,
+ fw_cfg_add_bytes(fw_cfg, FW_CFG_SMBIOS_ENTRIES,
smbios_tables, smbios_tables_len);
}
@@ -922,9 +922,9 @@ static void pc_build_smbios(PCMachineState *pcms)
g_free(mem_array);
if (smbios_anchor) {
- fw_cfg_add_file(pcms->fw_cfg, "etc/smbios/smbios-tables",
+ fw_cfg_add_file(fw_cfg, "etc/smbios/smbios-tables",
smbios_tables, smbios_tables_len);
- fw_cfg_add_file(pcms->fw_cfg, "etc/smbios/smbios-anchor",
+ fw_cfg_add_file(fw_cfg, "etc/smbios/smbios-anchor",
smbios_anchor, smbios_anchor_len);
}
}
@@ -1590,7 +1590,7 @@ void pc_machine_done(Notifier *notifier, void *data)
acpi_setup();
if (pcms->fw_cfg) {
- pc_build_smbios(pcms);
+ pc_build_smbios(pcms, pcms->fw_cfg);
pc_build_feature_control_file(pcms);
/* update FW_CFG_NB_CPUS to account for -device added CPUs */
fw_cfg_modify_i16(pcms->fw_cfg, FW_CFG_NB_CPUS, pcms->boot_cpus);
--
2.20.1
^ permalink raw reply related [flat|nested] 36+ messages in thread
* [Qemu-devel] [PATCH v3 09/15] hw/i386/pc: Let pc_build_smbios() take a FWCfgState argument
@ 2019-07-01 13:35 ` Philippe Mathieu-Daudé
0 siblings, 0 replies; 36+ messages in thread
From: Philippe Mathieu-Daudé @ 2019-07-01 13:35 UTC (permalink / raw)
To: qemu-devel
Cc: Yang Zhong, Samuel Ortiz, kvm, Michael S. Tsirkin,
Marcelo Tosatti, Rob Bradford, Paolo Bonzini, Richard Henderson,
Philippe Mathieu-Daudé,
Eduardo Habkost
Pass the FWCfgState object by argument, this will
allow us to remove the PCMachineState argument later.
Suggested-by: Samuel Ortiz <sameo@linux.intel.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
---
hw/i386/pc.c | 10 +++++-----
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/hw/i386/pc.c b/hw/i386/pc.c
index 60ee71924a..2b6502a38c 100644
--- a/hw/i386/pc.c
+++ b/hw/i386/pc.c
@@ -887,7 +887,7 @@ static uint32_t x86_cpu_apic_id_from_index(unsigned int cpu_index)
}
}
-static void pc_build_smbios(PCMachineState *pcms)
+static void pc_build_smbios(PCMachineState *pcms, FWCfgState *fw_cfg)
{
uint8_t *smbios_tables, *smbios_anchor;
size_t smbios_tables_len, smbios_anchor_len;
@@ -901,7 +901,7 @@ static void pc_build_smbios(PCMachineState *pcms)
smbios_tables = smbios_get_table_legacy(&smbios_tables_len);
if (smbios_tables) {
- fw_cfg_add_bytes(pcms->fw_cfg, FW_CFG_SMBIOS_ENTRIES,
+ fw_cfg_add_bytes(fw_cfg, FW_CFG_SMBIOS_ENTRIES,
smbios_tables, smbios_tables_len);
}
@@ -922,9 +922,9 @@ static void pc_build_smbios(PCMachineState *pcms)
g_free(mem_array);
if (smbios_anchor) {
- fw_cfg_add_file(pcms->fw_cfg, "etc/smbios/smbios-tables",
+ fw_cfg_add_file(fw_cfg, "etc/smbios/smbios-tables",
smbios_tables, smbios_tables_len);
- fw_cfg_add_file(pcms->fw_cfg, "etc/smbios/smbios-anchor",
+ fw_cfg_add_file(fw_cfg, "etc/smbios/smbios-anchor",
smbios_anchor, smbios_anchor_len);
}
}
@@ -1590,7 +1590,7 @@ void pc_machine_done(Notifier *notifier, void *data)
acpi_setup();
if (pcms->fw_cfg) {
- pc_build_smbios(pcms);
+ pc_build_smbios(pcms, pcms->fw_cfg);
pc_build_feature_control_file(pcms);
/* update FW_CFG_NB_CPUS to account for -device added CPUs */
fw_cfg_modify_i16(pcms->fw_cfg, FW_CFG_NB_CPUS, pcms->boot_cpus);
--
2.20.1
^ permalink raw reply related [flat|nested] 36+ messages in thread
* [PATCH v3 10/15] hw/i386/pc: Let pc_build_smbios() take a generic MachineState argument
2019-07-01 13:35 ` [Qemu-devel] " Philippe Mathieu-Daudé
@ 2019-07-01 13:35 ` Philippe Mathieu-Daudé
-1 siblings, 0 replies; 36+ messages in thread
From: Philippe Mathieu-Daudé @ 2019-07-01 13:35 UTC (permalink / raw)
To: qemu-devel
Cc: Marcel Apfelbaum, Samuel Ortiz, kvm, Yang Zhong, Paolo Bonzini,
Michael S. Tsirkin, Rob Bradford, Eduardo Habkost,
Marcelo Tosatti, Richard Henderson, Philippe Mathieu-Daudé
Let the pc_build_smbios() function take a generic MachineState
argument.
Suggested-by: Samuel Ortiz <sameo@linux.intel.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
---
hw/i386/pc.c | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/hw/i386/pc.c b/hw/i386/pc.c
index 2b6502a38c..1195394694 100644
--- a/hw/i386/pc.c
+++ b/hw/i386/pc.c
@@ -887,13 +887,12 @@ static uint32_t x86_cpu_apic_id_from_index(unsigned int cpu_index)
}
}
-static void pc_build_smbios(PCMachineState *pcms, FWCfgState *fw_cfg)
+static void pc_build_smbios(MachineState *ms, FWCfgState *fw_cfg)
{
uint8_t *smbios_tables, *smbios_anchor;
size_t smbios_tables_len, smbios_anchor_len;
struct smbios_phys_mem_area *mem_array;
unsigned i, array_count;
- MachineState *ms = MACHINE(pcms);
X86CPU *cpu = X86_CPU(ms->possible_cpus->cpus[0].cpu);
/* tell smbios about cpuid version and features */
@@ -1590,7 +1589,7 @@ void pc_machine_done(Notifier *notifier, void *data)
acpi_setup();
if (pcms->fw_cfg) {
- pc_build_smbios(pcms, pcms->fw_cfg);
+ pc_build_smbios(MACHINE(pcms), pcms->fw_cfg);
pc_build_feature_control_file(pcms);
/* update FW_CFG_NB_CPUS to account for -device added CPUs */
fw_cfg_modify_i16(pcms->fw_cfg, FW_CFG_NB_CPUS, pcms->boot_cpus);
--
2.20.1
^ permalink raw reply related [flat|nested] 36+ messages in thread
* [Qemu-devel] [PATCH v3 10/15] hw/i386/pc: Let pc_build_smbios() take a generic MachineState argument
@ 2019-07-01 13:35 ` Philippe Mathieu-Daudé
0 siblings, 0 replies; 36+ messages in thread
From: Philippe Mathieu-Daudé @ 2019-07-01 13:35 UTC (permalink / raw)
To: qemu-devel
Cc: Yang Zhong, Samuel Ortiz, kvm, Michael S. Tsirkin,
Marcelo Tosatti, Rob Bradford, Paolo Bonzini, Richard Henderson,
Philippe Mathieu-Daudé,
Eduardo Habkost
Let the pc_build_smbios() function take a generic MachineState
argument.
Suggested-by: Samuel Ortiz <sameo@linux.intel.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
---
hw/i386/pc.c | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/hw/i386/pc.c b/hw/i386/pc.c
index 2b6502a38c..1195394694 100644
--- a/hw/i386/pc.c
+++ b/hw/i386/pc.c
@@ -887,13 +887,12 @@ static uint32_t x86_cpu_apic_id_from_index(unsigned int cpu_index)
}
}
-static void pc_build_smbios(PCMachineState *pcms, FWCfgState *fw_cfg)
+static void pc_build_smbios(MachineState *ms, FWCfgState *fw_cfg)
{
uint8_t *smbios_tables, *smbios_anchor;
size_t smbios_tables_len, smbios_anchor_len;
struct smbios_phys_mem_area *mem_array;
unsigned i, array_count;
- MachineState *ms = MACHINE(pcms);
X86CPU *cpu = X86_CPU(ms->possible_cpus->cpus[0].cpu);
/* tell smbios about cpuid version and features */
@@ -1590,7 +1589,7 @@ void pc_machine_done(Notifier *notifier, void *data)
acpi_setup();
if (pcms->fw_cfg) {
- pc_build_smbios(pcms, pcms->fw_cfg);
+ pc_build_smbios(MACHINE(pcms), pcms->fw_cfg);
pc_build_feature_control_file(pcms);
/* update FW_CFG_NB_CPUS to account for -device added CPUs */
fw_cfg_modify_i16(pcms->fw_cfg, FW_CFG_NB_CPUS, pcms->boot_cpus);
--
2.20.1
^ permalink raw reply related [flat|nested] 36+ messages in thread
* [PATCH v3 11/15] hw/i386/pc: Rename pc_build_smbios() as generic fw_cfg_build_smbios()
2019-07-01 13:35 ` [Qemu-devel] " Philippe Mathieu-Daudé
@ 2019-07-01 13:35 ` Philippe Mathieu-Daudé
-1 siblings, 0 replies; 36+ messages in thread
From: Philippe Mathieu-Daudé @ 2019-07-01 13:35 UTC (permalink / raw)
To: qemu-devel
Cc: Marcel Apfelbaum, Samuel Ortiz, kvm, Yang Zhong, Paolo Bonzini,
Michael S. Tsirkin, Rob Bradford, Eduardo Habkost,
Marcelo Tosatti, Richard Henderson, Philippe Mathieu-Daudé
Now that the pc_build_smbios() function has been refactored to not
depend of PC specific types, rename it to a more generic name.
Suggested-by: Samuel Ortiz <sameo@linux.intel.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
---
hw/i386/pc.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/hw/i386/pc.c b/hw/i386/pc.c
index 1195394694..ba476fab7e 100644
--- a/hw/i386/pc.c
+++ b/hw/i386/pc.c
@@ -887,7 +887,7 @@ static uint32_t x86_cpu_apic_id_from_index(unsigned int cpu_index)
}
}
-static void pc_build_smbios(MachineState *ms, FWCfgState *fw_cfg)
+static void fw_cfg_build_smbios(MachineState *ms, FWCfgState *fw_cfg)
{
uint8_t *smbios_tables, *smbios_anchor;
size_t smbios_tables_len, smbios_anchor_len;
@@ -1589,7 +1589,7 @@ void pc_machine_done(Notifier *notifier, void *data)
acpi_setup();
if (pcms->fw_cfg) {
- pc_build_smbios(MACHINE(pcms), pcms->fw_cfg);
+ fw_cfg_build_smbios(MACHINE(pcms), pcms->fw_cfg);
pc_build_feature_control_file(pcms);
/* update FW_CFG_NB_CPUS to account for -device added CPUs */
fw_cfg_modify_i16(pcms->fw_cfg, FW_CFG_NB_CPUS, pcms->boot_cpus);
--
2.20.1
^ permalink raw reply related [flat|nested] 36+ messages in thread
* [Qemu-devel] [PATCH v3 11/15] hw/i386/pc: Rename pc_build_smbios() as generic fw_cfg_build_smbios()
@ 2019-07-01 13:35 ` Philippe Mathieu-Daudé
0 siblings, 0 replies; 36+ messages in thread
From: Philippe Mathieu-Daudé @ 2019-07-01 13:35 UTC (permalink / raw)
To: qemu-devel
Cc: Yang Zhong, Samuel Ortiz, kvm, Michael S. Tsirkin,
Marcelo Tosatti, Rob Bradford, Paolo Bonzini, Richard Henderson,
Philippe Mathieu-Daudé,
Eduardo Habkost
Now that the pc_build_smbios() function has been refactored to not
depend of PC specific types, rename it to a more generic name.
Suggested-by: Samuel Ortiz <sameo@linux.intel.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
---
hw/i386/pc.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/hw/i386/pc.c b/hw/i386/pc.c
index 1195394694..ba476fab7e 100644
--- a/hw/i386/pc.c
+++ b/hw/i386/pc.c
@@ -887,7 +887,7 @@ static uint32_t x86_cpu_apic_id_from_index(unsigned int cpu_index)
}
}
-static void pc_build_smbios(MachineState *ms, FWCfgState *fw_cfg)
+static void fw_cfg_build_smbios(MachineState *ms, FWCfgState *fw_cfg)
{
uint8_t *smbios_tables, *smbios_anchor;
size_t smbios_tables_len, smbios_anchor_len;
@@ -1589,7 +1589,7 @@ void pc_machine_done(Notifier *notifier, void *data)
acpi_setup();
if (pcms->fw_cfg) {
- pc_build_smbios(MACHINE(pcms), pcms->fw_cfg);
+ fw_cfg_build_smbios(MACHINE(pcms), pcms->fw_cfg);
pc_build_feature_control_file(pcms);
/* update FW_CFG_NB_CPUS to account for -device added CPUs */
fw_cfg_modify_i16(pcms->fw_cfg, FW_CFG_NB_CPUS, pcms->boot_cpus);
--
2.20.1
^ permalink raw reply related [flat|nested] 36+ messages in thread
* [PATCH v3 12/15] hw/i386/pc: Let pc_build_feature_control() take a FWCfgState argument
2019-07-01 13:35 ` [Qemu-devel] " Philippe Mathieu-Daudé
@ 2019-07-01 13:35 ` Philippe Mathieu-Daudé
-1 siblings, 0 replies; 36+ messages in thread
From: Philippe Mathieu-Daudé @ 2019-07-01 13:35 UTC (permalink / raw)
To: qemu-devel
Cc: Marcel Apfelbaum, Samuel Ortiz, kvm, Yang Zhong, Paolo Bonzini,
Michael S. Tsirkin, Rob Bradford, Eduardo Habkost,
Marcelo Tosatti, Richard Henderson, Philippe Mathieu-Daudé
Pass the FWCfgState object by argument, this will
allow us to remove the PCMachineState argument later.
Suggested-by: Samuel Ortiz <sameo@linux.intel.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
---
hw/i386/pc.c | 7 ++++---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/hw/i386/pc.c b/hw/i386/pc.c
index ba476fab7e..c49617a3f1 100644
--- a/hw/i386/pc.c
+++ b/hw/i386/pc.c
@@ -1518,7 +1518,8 @@ void pc_cpus_init(PCMachineState *pcms)
}
}
-static void pc_build_feature_control_file(PCMachineState *pcms)
+static void pc_build_feature_control_file(PCMachineState *pcms,
+ FWCfgState *fw_cfg)
{
MachineState *ms = MACHINE(pcms);
X86CPU *cpu = X86_CPU(ms->possible_cpus->cpus[0].cpu);
@@ -1544,7 +1545,7 @@ static void pc_build_feature_control_file(PCMachineState *pcms)
val = g_malloc(sizeof(*val));
*val = cpu_to_le64(feature_control_bits | FEATURE_CONTROL_LOCKED);
- fw_cfg_add_file(pcms->fw_cfg, "etc/msr_feature_control", val, sizeof(*val));
+ fw_cfg_add_file(fw_cfg, "etc/msr_feature_control", val, sizeof(*val));
}
static void rtc_set_cpus_count(ISADevice *rtc, uint16_t cpus_count)
@@ -1590,7 +1591,7 @@ void pc_machine_done(Notifier *notifier, void *data)
acpi_setup();
if (pcms->fw_cfg) {
fw_cfg_build_smbios(MACHINE(pcms), pcms->fw_cfg);
- pc_build_feature_control_file(pcms);
+ pc_build_feature_control_file(pcms, pcms->fw_cfg);
/* update FW_CFG_NB_CPUS to account for -device added CPUs */
fw_cfg_modify_i16(pcms->fw_cfg, FW_CFG_NB_CPUS, pcms->boot_cpus);
}
--
2.20.1
^ permalink raw reply related [flat|nested] 36+ messages in thread
* [Qemu-devel] [PATCH v3 12/15] hw/i386/pc: Let pc_build_feature_control() take a FWCfgState argument
@ 2019-07-01 13:35 ` Philippe Mathieu-Daudé
0 siblings, 0 replies; 36+ messages in thread
From: Philippe Mathieu-Daudé @ 2019-07-01 13:35 UTC (permalink / raw)
To: qemu-devel
Cc: Yang Zhong, Samuel Ortiz, kvm, Michael S. Tsirkin,
Marcelo Tosatti, Rob Bradford, Paolo Bonzini, Richard Henderson,
Philippe Mathieu-Daudé,
Eduardo Habkost
Pass the FWCfgState object by argument, this will
allow us to remove the PCMachineState argument later.
Suggested-by: Samuel Ortiz <sameo@linux.intel.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
---
hw/i386/pc.c | 7 ++++---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/hw/i386/pc.c b/hw/i386/pc.c
index ba476fab7e..c49617a3f1 100644
--- a/hw/i386/pc.c
+++ b/hw/i386/pc.c
@@ -1518,7 +1518,8 @@ void pc_cpus_init(PCMachineState *pcms)
}
}
-static void pc_build_feature_control_file(PCMachineState *pcms)
+static void pc_build_feature_control_file(PCMachineState *pcms,
+ FWCfgState *fw_cfg)
{
MachineState *ms = MACHINE(pcms);
X86CPU *cpu = X86_CPU(ms->possible_cpus->cpus[0].cpu);
@@ -1544,7 +1545,7 @@ static void pc_build_feature_control_file(PCMachineState *pcms)
val = g_malloc(sizeof(*val));
*val = cpu_to_le64(feature_control_bits | FEATURE_CONTROL_LOCKED);
- fw_cfg_add_file(pcms->fw_cfg, "etc/msr_feature_control", val, sizeof(*val));
+ fw_cfg_add_file(fw_cfg, "etc/msr_feature_control", val, sizeof(*val));
}
static void rtc_set_cpus_count(ISADevice *rtc, uint16_t cpus_count)
@@ -1590,7 +1591,7 @@ void pc_machine_done(Notifier *notifier, void *data)
acpi_setup();
if (pcms->fw_cfg) {
fw_cfg_build_smbios(MACHINE(pcms), pcms->fw_cfg);
- pc_build_feature_control_file(pcms);
+ pc_build_feature_control_file(pcms, pcms->fw_cfg);
/* update FW_CFG_NB_CPUS to account for -device added CPUs */
fw_cfg_modify_i16(pcms->fw_cfg, FW_CFG_NB_CPUS, pcms->boot_cpus);
}
--
2.20.1
^ permalink raw reply related [flat|nested] 36+ messages in thread
* [PATCH v3 13/15] hw/i386/pc: Let pc_build_feature_control() take a MachineState argument
2019-07-01 13:35 ` [Qemu-devel] " Philippe Mathieu-Daudé
@ 2019-07-01 13:35 ` Philippe Mathieu-Daudé
-1 siblings, 0 replies; 36+ messages in thread
From: Philippe Mathieu-Daudé @ 2019-07-01 13:35 UTC (permalink / raw)
To: qemu-devel
Cc: Marcel Apfelbaum, Samuel Ortiz, kvm, Yang Zhong, Paolo Bonzini,
Michael S. Tsirkin, Rob Bradford, Eduardo Habkost,
Marcelo Tosatti, Richard Henderson, Philippe Mathieu-Daudé
Let the pc_build_feature_control_file() function take a generic MachineState
argument.
Suggested-by: Samuel Ortiz <sameo@linux.intel.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
---
hw/i386/pc.c | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/hw/i386/pc.c b/hw/i386/pc.c
index c49617a3f1..2ab2c637fd 100644
--- a/hw/i386/pc.c
+++ b/hw/i386/pc.c
@@ -1518,10 +1518,9 @@ void pc_cpus_init(PCMachineState *pcms)
}
}
-static void pc_build_feature_control_file(PCMachineState *pcms,
+static void pc_build_feature_control_file(MachineState *ms,
FWCfgState *fw_cfg)
{
- MachineState *ms = MACHINE(pcms);
X86CPU *cpu = X86_CPU(ms->possible_cpus->cpus[0].cpu);
CPUX86State *env = &cpu->env;
uint32_t unused, ecx, edx;
@@ -1591,7 +1590,7 @@ void pc_machine_done(Notifier *notifier, void *data)
acpi_setup();
if (pcms->fw_cfg) {
fw_cfg_build_smbios(MACHINE(pcms), pcms->fw_cfg);
- pc_build_feature_control_file(pcms, pcms->fw_cfg);
+ pc_build_feature_control_file(MACHINE(pcms), pcms->fw_cfg);
/* update FW_CFG_NB_CPUS to account for -device added CPUs */
fw_cfg_modify_i16(pcms->fw_cfg, FW_CFG_NB_CPUS, pcms->boot_cpus);
}
--
2.20.1
^ permalink raw reply related [flat|nested] 36+ messages in thread
* [Qemu-devel] [PATCH v3 13/15] hw/i386/pc: Let pc_build_feature_control() take a MachineState argument
@ 2019-07-01 13:35 ` Philippe Mathieu-Daudé
0 siblings, 0 replies; 36+ messages in thread
From: Philippe Mathieu-Daudé @ 2019-07-01 13:35 UTC (permalink / raw)
To: qemu-devel
Cc: Yang Zhong, Samuel Ortiz, kvm, Michael S. Tsirkin,
Marcelo Tosatti, Rob Bradford, Paolo Bonzini, Richard Henderson,
Philippe Mathieu-Daudé,
Eduardo Habkost
Let the pc_build_feature_control_file() function take a generic MachineState
argument.
Suggested-by: Samuel Ortiz <sameo@linux.intel.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
---
hw/i386/pc.c | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/hw/i386/pc.c b/hw/i386/pc.c
index c49617a3f1..2ab2c637fd 100644
--- a/hw/i386/pc.c
+++ b/hw/i386/pc.c
@@ -1518,10 +1518,9 @@ void pc_cpus_init(PCMachineState *pcms)
}
}
-static void pc_build_feature_control_file(PCMachineState *pcms,
+static void pc_build_feature_control_file(MachineState *ms,
FWCfgState *fw_cfg)
{
- MachineState *ms = MACHINE(pcms);
X86CPU *cpu = X86_CPU(ms->possible_cpus->cpus[0].cpu);
CPUX86State *env = &cpu->env;
uint32_t unused, ecx, edx;
@@ -1591,7 +1590,7 @@ void pc_machine_done(Notifier *notifier, void *data)
acpi_setup();
if (pcms->fw_cfg) {
fw_cfg_build_smbios(MACHINE(pcms), pcms->fw_cfg);
- pc_build_feature_control_file(pcms, pcms->fw_cfg);
+ pc_build_feature_control_file(MACHINE(pcms), pcms->fw_cfg);
/* update FW_CFG_NB_CPUS to account for -device added CPUs */
fw_cfg_modify_i16(pcms->fw_cfg, FW_CFG_NB_CPUS, pcms->boot_cpus);
}
--
2.20.1
^ permalink raw reply related [flat|nested] 36+ messages in thread
* [PATCH v3 14/15] hw/i386/pc: Rename pc_build_feature_control() as generic fw_cfg_build_*
2019-07-01 13:35 ` [Qemu-devel] " Philippe Mathieu-Daudé
@ 2019-07-01 13:35 ` Philippe Mathieu-Daudé
-1 siblings, 0 replies; 36+ messages in thread
From: Philippe Mathieu-Daudé @ 2019-07-01 13:35 UTC (permalink / raw)
To: qemu-devel
Cc: Marcel Apfelbaum, Samuel Ortiz, kvm, Yang Zhong, Paolo Bonzini,
Michael S. Tsirkin, Rob Bradford, Eduardo Habkost,
Marcelo Tosatti, Richard Henderson, Philippe Mathieu-Daudé
Now that the pc_build_feature_control_file() function has been
refactored to not depend of PC specific types, rename it to a
more generic name.
Suggested-by: Samuel Ortiz <sameo@linux.intel.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
---
hw/i386/pc.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/hw/i386/pc.c b/hw/i386/pc.c
index 2ab2c637fd..ea895d0192 100644
--- a/hw/i386/pc.c
+++ b/hw/i386/pc.c
@@ -1518,8 +1518,8 @@ void pc_cpus_init(PCMachineState *pcms)
}
}
-static void pc_build_feature_control_file(MachineState *ms,
- FWCfgState *fw_cfg)
+static void fw_cfg_build_feature_control(MachineState *ms,
+ FWCfgState *fw_cfg)
{
X86CPU *cpu = X86_CPU(ms->possible_cpus->cpus[0].cpu);
CPUX86State *env = &cpu->env;
@@ -1590,7 +1590,7 @@ void pc_machine_done(Notifier *notifier, void *data)
acpi_setup();
if (pcms->fw_cfg) {
fw_cfg_build_smbios(MACHINE(pcms), pcms->fw_cfg);
- pc_build_feature_control_file(MACHINE(pcms), pcms->fw_cfg);
+ fw_cfg_build_feature_control(MACHINE(pcms), pcms->fw_cfg);
/* update FW_CFG_NB_CPUS to account for -device added CPUs */
fw_cfg_modify_i16(pcms->fw_cfg, FW_CFG_NB_CPUS, pcms->boot_cpus);
}
--
2.20.1
^ permalink raw reply related [flat|nested] 36+ messages in thread
* [Qemu-devel] [PATCH v3 14/15] hw/i386/pc: Rename pc_build_feature_control() as generic fw_cfg_build_*
@ 2019-07-01 13:35 ` Philippe Mathieu-Daudé
0 siblings, 0 replies; 36+ messages in thread
From: Philippe Mathieu-Daudé @ 2019-07-01 13:35 UTC (permalink / raw)
To: qemu-devel
Cc: Yang Zhong, Samuel Ortiz, kvm, Michael S. Tsirkin,
Marcelo Tosatti, Rob Bradford, Paolo Bonzini, Richard Henderson,
Philippe Mathieu-Daudé,
Eduardo Habkost
Now that the pc_build_feature_control_file() function has been
refactored to not depend of PC specific types, rename it to a
more generic name.
Suggested-by: Samuel Ortiz <sameo@linux.intel.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
---
hw/i386/pc.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/hw/i386/pc.c b/hw/i386/pc.c
index 2ab2c637fd..ea895d0192 100644
--- a/hw/i386/pc.c
+++ b/hw/i386/pc.c
@@ -1518,8 +1518,8 @@ void pc_cpus_init(PCMachineState *pcms)
}
}
-static void pc_build_feature_control_file(MachineState *ms,
- FWCfgState *fw_cfg)
+static void fw_cfg_build_feature_control(MachineState *ms,
+ FWCfgState *fw_cfg)
{
X86CPU *cpu = X86_CPU(ms->possible_cpus->cpus[0].cpu);
CPUX86State *env = &cpu->env;
@@ -1590,7 +1590,7 @@ void pc_machine_done(Notifier *notifier, void *data)
acpi_setup();
if (pcms->fw_cfg) {
fw_cfg_build_smbios(MACHINE(pcms), pcms->fw_cfg);
- pc_build_feature_control_file(MACHINE(pcms), pcms->fw_cfg);
+ fw_cfg_build_feature_control(MACHINE(pcms), pcms->fw_cfg);
/* update FW_CFG_NB_CPUS to account for -device added CPUs */
fw_cfg_modify_i16(pcms->fw_cfg, FW_CFG_NB_CPUS, pcms->boot_cpus);
}
--
2.20.1
^ permalink raw reply related [flat|nested] 36+ messages in thread
* [PATCH v3 15/15] hw/i386/pc: Extract the x86 generic fw_cfg code
2019-07-01 13:35 ` [Qemu-devel] " Philippe Mathieu-Daudé
@ 2019-07-01 13:35 ` Philippe Mathieu-Daudé
-1 siblings, 0 replies; 36+ messages in thread
From: Philippe Mathieu-Daudé @ 2019-07-01 13:35 UTC (permalink / raw)
To: qemu-devel
Cc: Marcel Apfelbaum, Samuel Ortiz, kvm, Yang Zhong, Paolo Bonzini,
Michael S. Tsirkin, Rob Bradford, Eduardo Habkost,
Marcelo Tosatti, Richard Henderson, Philippe Mathieu-Daudé
Extract all the functions that are not PC-machine specific into
the (arch-specific) fw_cfg.c file. This will allow other X86-machine
to reuse these functions.
Suggested-by: Samuel Ortiz <sameo@linux.intel.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
---
hw/i386/fw_cfg.c | 137 +++++++++++++++++++++++++++++++++++++++++++++++
hw/i386/fw_cfg.h | 8 +++
hw/i386/pc.c | 130 +-------------------------------------------
3 files changed, 146 insertions(+), 129 deletions(-)
diff --git a/hw/i386/fw_cfg.c b/hw/i386/fw_cfg.c
index 380a819230..b033d99bc4 100644
--- a/hw/i386/fw_cfg.c
+++ b/hw/i386/fw_cfg.c
@@ -13,8 +13,15 @@
*/
#include "qemu/osdep.h"
+#include "sysemu/numa.h"
+#include "hw/acpi/acpi.h"
+#include "hw/firmware/smbios.h"
+#include "hw/i386/pc.h"
#include "hw/i386/fw_cfg.h"
+#include "hw/timer/hpet.h"
#include "hw/nvram/fw_cfg.h"
+#include "e820_memory_layout.h"
+#include "kvm_i386.h"
const char *fw_cfg_arch_key_name(uint16_t key)
{
@@ -36,3 +43,133 @@ const char *fw_cfg_arch_key_name(uint16_t key)
}
return NULL;
}
+
+FWCfgState *fw_cfg_arch_create(MachineState *ms,
+ const CPUArchIdList *cpus,
+ uint16_t boot_cpus,
+ uint16_t apic_id_limit)
+{
+ FWCfgState *fw_cfg;
+ uint64_t *numa_fw_cfg;
+ int i;
+
+ fw_cfg = fw_cfg_init_io_dma(FW_CFG_IO_BASE, FW_CFG_IO_BASE + 4,
+ &address_space_memory);
+ fw_cfg_add_i16(fw_cfg, FW_CFG_NB_CPUS, boot_cpus);
+
+ /*
+ * FW_CFG_MAX_CPUS is a bit confusing/problematic on x86:
+ *
+ * For machine types prior to 1.8, SeaBIOS needs FW_CFG_MAX_CPUS for
+ * building MPTable, ACPI MADT, ACPI CPU hotplug and ACPI SRAT table,
+ * that tables are based on xAPIC ID and QEMU<->SeaBIOS interface
+ * for CPU hotplug also uses APIC ID and not "CPU index".
+ * This means that FW_CFG_MAX_CPUS is not the "maximum number of CPUs",
+ * but the "limit to the APIC ID values SeaBIOS may see".
+ *
+ * So for compatibility reasons with old BIOSes we are stuck with
+ * "etc/max-cpus" actually being apic_id_limit
+ */
+ fw_cfg_add_i16(fw_cfg, FW_CFG_MAX_CPUS, apic_id_limit);
+ fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, (uint64_t)ram_size);
+ fw_cfg_add_bytes(fw_cfg, FW_CFG_ACPI_TABLES,
+ acpi_tables, acpi_tables_len);
+ fw_cfg_add_i32(fw_cfg, FW_CFG_IRQ0_OVERRIDE, kvm_allows_irq0_override());
+
+ fw_cfg_add_bytes(fw_cfg, FW_CFG_E820_TABLE,
+ &e820_reserve, sizeof(e820_reserve));
+ fw_cfg_add_file(fw_cfg, "etc/e820", e820_table,
+ sizeof(struct e820_entry) * e820_get_num_entries());
+
+ fw_cfg_add_bytes(fw_cfg, FW_CFG_HPET, &hpet_cfg, sizeof(hpet_cfg));
+ /*
+ * allocate memory for the NUMA channel: one (64bit) word for the number
+ * of nodes, one word for each VCPU->node and one word for each node to
+ * hold the amount of memory.
+ */
+ numa_fw_cfg = g_new0(uint64_t, 1 + apic_id_limit + nb_numa_nodes);
+ numa_fw_cfg[0] = cpu_to_le64(nb_numa_nodes);
+ for (i = 0; i < cpus->len; i++) {
+ unsigned int apic_id = cpus->cpus[i].arch_id;
+ assert(apic_id < apic_id_limit);
+ numa_fw_cfg[apic_id + 1] = cpu_to_le64(cpus->cpus[i].props.node_id);
+ }
+ for (i = 0; i < nb_numa_nodes; i++) {
+ numa_fw_cfg[apic_id_limit + 1 + i] =
+ cpu_to_le64(numa_info[i].node_mem);
+ }
+ fw_cfg_add_bytes(fw_cfg, FW_CFG_NUMA, numa_fw_cfg,
+ (1 + apic_id_limit + nb_numa_nodes) *
+ sizeof(*numa_fw_cfg));
+
+ return fw_cfg;
+}
+
+void fw_cfg_build_smbios(MachineState *ms, FWCfgState *fw_cfg)
+{
+ uint8_t *smbios_tables, *smbios_anchor;
+ size_t smbios_tables_len, smbios_anchor_len;
+ struct smbios_phys_mem_area *mem_array;
+ unsigned i, array_count;
+ X86CPU *cpu = X86_CPU(ms->possible_cpus->cpus[0].cpu);
+
+ /* tell smbios about cpuid version and features */
+ smbios_set_cpuid(cpu->env.cpuid_version, cpu->env.features[FEAT_1_EDX]);
+
+ smbios_tables = smbios_get_table_legacy(&smbios_tables_len);
+ if (smbios_tables) {
+ fw_cfg_add_bytes(fw_cfg, FW_CFG_SMBIOS_ENTRIES,
+ smbios_tables, smbios_tables_len);
+ }
+
+ /* build the array of physical mem area from e820 table */
+ mem_array = g_malloc0(sizeof(*mem_array) * e820_get_num_entries());
+ for (i = 0, array_count = 0; i < e820_get_num_entries(); i++) {
+ uint64_t addr, len;
+
+ if (e820_get_entry(i, E820_RAM, &addr, &len)) {
+ mem_array[array_count].address = addr;
+ mem_array[array_count].length = len;
+ array_count++;
+ }
+ }
+ smbios_get_tables(mem_array, array_count,
+ &smbios_tables, &smbios_tables_len,
+ &smbios_anchor, &smbios_anchor_len);
+ g_free(mem_array);
+
+ if (smbios_anchor) {
+ fw_cfg_add_file(fw_cfg, "etc/smbios/smbios-tables",
+ smbios_tables, smbios_tables_len);
+ fw_cfg_add_file(fw_cfg, "etc/smbios/smbios-anchor",
+ smbios_anchor, smbios_anchor_len);
+ }
+}
+
+void fw_cfg_build_feature_control(MachineState *ms, FWCfgState *fw_cfg)
+{
+ X86CPU *cpu = X86_CPU(ms->possible_cpus->cpus[0].cpu);
+ CPUX86State *env = &cpu->env;
+ uint32_t unused, ecx, edx;
+ uint64_t feature_control_bits = 0;
+ uint64_t *val;
+
+ cpu_x86_cpuid(env, 1, 0, &unused, &unused, &ecx, &edx);
+ if (ecx & CPUID_EXT_VMX) {
+ feature_control_bits |= FEATURE_CONTROL_VMXON_ENABLED_OUTSIDE_SMX;
+ }
+
+ if ((edx & (CPUID_EXT2_MCE | CPUID_EXT2_MCA)) ==
+ (CPUID_EXT2_MCE | CPUID_EXT2_MCA) &&
+ (env->mcg_cap & MCG_LMCE_P)) {
+ feature_control_bits |= FEATURE_CONTROL_LMCE;
+ }
+
+ if (!feature_control_bits) {
+ return;
+ }
+
+ val = g_malloc(sizeof(*val));
+ *val = cpu_to_le64(feature_control_bits | FEATURE_CONTROL_LOCKED);
+ fw_cfg_add_file(fw_cfg, "etc/msr_feature_control", val, sizeof(*val));
+}
diff --git a/hw/i386/fw_cfg.h b/hw/i386/fw_cfg.h
index 17a4bc32f2..f9047a74e8 100644
--- a/hw/i386/fw_cfg.h
+++ b/hw/i386/fw_cfg.h
@@ -9,6 +9,7 @@
#ifndef HW_I386_FW_CFG_H
#define HW_I386_FW_CFG_H
+#include "hw/boards.h"
#include "hw/nvram/fw_cfg.h"
#define FW_CFG_ACPI_TABLES (FW_CFG_ARCH_LOCAL + 0)
@@ -17,4 +18,11 @@
#define FW_CFG_E820_TABLE (FW_CFG_ARCH_LOCAL + 3)
#define FW_CFG_HPET (FW_CFG_ARCH_LOCAL + 4)
+FWCfgState *fw_cfg_arch_create(MachineState *ms,
+ const CPUArchIdList *cpus,
+ uint16_t boot_cpus,
+ uint16_t apic_id_limit);
+void fw_cfg_build_smbios(MachineState *ms, FWCfgState *fw_cfg);
+void fw_cfg_build_feature_control(MachineState *ms, FWCfgState *fw_cfg);
+
#endif
diff --git a/hw/i386/pc.c b/hw/i386/pc.c
index ea895d0192..d00279bf22 100644
--- a/hw/i386/pc.c
+++ b/hw/i386/pc.c
@@ -80,6 +80,7 @@
#include "hw/net/ne2000-isa.h"
#include "standard-headers/asm-x86/bootparam.h"
#include "e820_memory_layout.h"
+#include "fw_cfg.h"
/* debug PC/ISA interrupts */
//#define DEBUG_IRQ
@@ -887,106 +888,6 @@ static uint32_t x86_cpu_apic_id_from_index(unsigned int cpu_index)
}
}
-static void fw_cfg_build_smbios(MachineState *ms, FWCfgState *fw_cfg)
-{
- uint8_t *smbios_tables, *smbios_anchor;
- size_t smbios_tables_len, smbios_anchor_len;
- struct smbios_phys_mem_area *mem_array;
- unsigned i, array_count;
- X86CPU *cpu = X86_CPU(ms->possible_cpus->cpus[0].cpu);
-
- /* tell smbios about cpuid version and features */
- smbios_set_cpuid(cpu->env.cpuid_version, cpu->env.features[FEAT_1_EDX]);
-
- smbios_tables = smbios_get_table_legacy(&smbios_tables_len);
- if (smbios_tables) {
- fw_cfg_add_bytes(fw_cfg, FW_CFG_SMBIOS_ENTRIES,
- smbios_tables, smbios_tables_len);
- }
-
- /* build the array of physical mem area from e820 table */
- mem_array = g_malloc0(sizeof(*mem_array) * e820_get_num_entries());
- for (i = 0, array_count = 0; i < e820_get_num_entries(); i++) {
- uint64_t addr, len;
-
- if (e820_get_entry(i, E820_RAM, &addr, &len)) {
- mem_array[array_count].address = addr;
- mem_array[array_count].length = len;
- array_count++;
- }
- }
- smbios_get_tables(mem_array, array_count,
- &smbios_tables, &smbios_tables_len,
- &smbios_anchor, &smbios_anchor_len);
- g_free(mem_array);
-
- if (smbios_anchor) {
- fw_cfg_add_file(fw_cfg, "etc/smbios/smbios-tables",
- smbios_tables, smbios_tables_len);
- fw_cfg_add_file(fw_cfg, "etc/smbios/smbios-anchor",
- smbios_anchor, smbios_anchor_len);
- }
-}
-
-static FWCfgState *fw_cfg_arch_create(MachineState *ms,
- const CPUArchIdList *cpus,
- uint16_t boot_cpus,
- uint16_t apic_id_limit)
-{
- FWCfgState *fw_cfg;
- uint64_t *numa_fw_cfg;
- int i;
-
- fw_cfg = fw_cfg_init_io_dma(FW_CFG_IO_BASE, FW_CFG_IO_BASE + 4,
- &address_space_memory);
- fw_cfg_add_i16(fw_cfg, FW_CFG_NB_CPUS, boot_cpus);
-
- /* FW_CFG_MAX_CPUS is a bit confusing/problematic on x86:
- *
- * For machine types prior to 1.8, SeaBIOS needs FW_CFG_MAX_CPUS for
- * building MPTable, ACPI MADT, ACPI CPU hotplug and ACPI SRAT table,
- * that tables are based on xAPIC ID and QEMU<->SeaBIOS interface
- * for CPU hotplug also uses APIC ID and not "CPU index".
- * This means that FW_CFG_MAX_CPUS is not the "maximum number of CPUs",
- * but the "limit to the APIC ID values SeaBIOS may see".
- *
- * So for compatibility reasons with old BIOSes we are stuck with
- * "etc/max-cpus" actually being apic_id_limit
- */
- fw_cfg_add_i16(fw_cfg, FW_CFG_MAX_CPUS, apic_id_limit);
- fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, (uint64_t)ram_size);
- fw_cfg_add_bytes(fw_cfg, FW_CFG_ACPI_TABLES,
- acpi_tables, acpi_tables_len);
- fw_cfg_add_i32(fw_cfg, FW_CFG_IRQ0_OVERRIDE, kvm_allows_irq0_override());
-
- fw_cfg_add_bytes(fw_cfg, FW_CFG_E820_TABLE,
- &e820_reserve, sizeof(e820_reserve));
- fw_cfg_add_file(fw_cfg, "etc/e820", e820_table,
- sizeof(struct e820_entry) * e820_get_num_entries());
-
- fw_cfg_add_bytes(fw_cfg, FW_CFG_HPET, &hpet_cfg, sizeof(hpet_cfg));
- /* allocate memory for the NUMA channel: one (64bit) word for the number
- * of nodes, one word for each VCPU->node and one word for each node to
- * hold the amount of memory.
- */
- numa_fw_cfg = g_new0(uint64_t, 1 + apic_id_limit + nb_numa_nodes);
- numa_fw_cfg[0] = cpu_to_le64(nb_numa_nodes);
- for (i = 0; i < cpus->len; i++) {
- unsigned int apic_id = cpus->cpus[i].arch_id;
- assert(apic_id < apic_id_limit);
- numa_fw_cfg[apic_id + 1] = cpu_to_le64(cpus->cpus[i].props.node_id);
- }
- for (i = 0; i < nb_numa_nodes; i++) {
- numa_fw_cfg[apic_id_limit + 1 + i] =
- cpu_to_le64(numa_info[i].node_mem);
- }
- fw_cfg_add_bytes(fw_cfg, FW_CFG_NUMA, numa_fw_cfg,
- (1 + apic_id_limit + nb_numa_nodes) *
- sizeof(*numa_fw_cfg));
-
- return fw_cfg;
-}
-
static long get_file_size(FILE *f)
{
long where, size;
@@ -1518,35 +1419,6 @@ void pc_cpus_init(PCMachineState *pcms)
}
}
-static void fw_cfg_build_feature_control(MachineState *ms,
- FWCfgState *fw_cfg)
-{
- X86CPU *cpu = X86_CPU(ms->possible_cpus->cpus[0].cpu);
- CPUX86State *env = &cpu->env;
- uint32_t unused, ecx, edx;
- uint64_t feature_control_bits = 0;
- uint64_t *val;
-
- cpu_x86_cpuid(env, 1, 0, &unused, &unused, &ecx, &edx);
- if (ecx & CPUID_EXT_VMX) {
- feature_control_bits |= FEATURE_CONTROL_VMXON_ENABLED_OUTSIDE_SMX;
- }
-
- if ((edx & (CPUID_EXT2_MCE | CPUID_EXT2_MCA)) ==
- (CPUID_EXT2_MCE | CPUID_EXT2_MCA) &&
- (env->mcg_cap & MCG_LMCE_P)) {
- feature_control_bits |= FEATURE_CONTROL_LMCE;
- }
-
- if (!feature_control_bits) {
- return;
- }
-
- val = g_malloc(sizeof(*val));
- *val = cpu_to_le64(feature_control_bits | FEATURE_CONTROL_LOCKED);
- fw_cfg_add_file(fw_cfg, "etc/msr_feature_control", val, sizeof(*val));
-}
-
static void rtc_set_cpus_count(ISADevice *rtc, uint16_t cpus_count)
{
if (cpus_count > 0xff) {
--
2.20.1
^ permalink raw reply related [flat|nested] 36+ messages in thread
* [Qemu-devel] [PATCH v3 15/15] hw/i386/pc: Extract the x86 generic fw_cfg code
@ 2019-07-01 13:35 ` Philippe Mathieu-Daudé
0 siblings, 0 replies; 36+ messages in thread
From: Philippe Mathieu-Daudé @ 2019-07-01 13:35 UTC (permalink / raw)
To: qemu-devel
Cc: Yang Zhong, Samuel Ortiz, kvm, Michael S. Tsirkin,
Marcelo Tosatti, Rob Bradford, Paolo Bonzini, Richard Henderson,
Philippe Mathieu-Daudé,
Eduardo Habkost
Extract all the functions that are not PC-machine specific into
the (arch-specific) fw_cfg.c file. This will allow other X86-machine
to reuse these functions.
Suggested-by: Samuel Ortiz <sameo@linux.intel.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
---
hw/i386/fw_cfg.c | 137 +++++++++++++++++++++++++++++++++++++++++++++++
hw/i386/fw_cfg.h | 8 +++
hw/i386/pc.c | 130 +-------------------------------------------
3 files changed, 146 insertions(+), 129 deletions(-)
diff --git a/hw/i386/fw_cfg.c b/hw/i386/fw_cfg.c
index 380a819230..b033d99bc4 100644
--- a/hw/i386/fw_cfg.c
+++ b/hw/i386/fw_cfg.c
@@ -13,8 +13,15 @@
*/
#include "qemu/osdep.h"
+#include "sysemu/numa.h"
+#include "hw/acpi/acpi.h"
+#include "hw/firmware/smbios.h"
+#include "hw/i386/pc.h"
#include "hw/i386/fw_cfg.h"
+#include "hw/timer/hpet.h"
#include "hw/nvram/fw_cfg.h"
+#include "e820_memory_layout.h"
+#include "kvm_i386.h"
const char *fw_cfg_arch_key_name(uint16_t key)
{
@@ -36,3 +43,133 @@ const char *fw_cfg_arch_key_name(uint16_t key)
}
return NULL;
}
+
+FWCfgState *fw_cfg_arch_create(MachineState *ms,
+ const CPUArchIdList *cpus,
+ uint16_t boot_cpus,
+ uint16_t apic_id_limit)
+{
+ FWCfgState *fw_cfg;
+ uint64_t *numa_fw_cfg;
+ int i;
+
+ fw_cfg = fw_cfg_init_io_dma(FW_CFG_IO_BASE, FW_CFG_IO_BASE + 4,
+ &address_space_memory);
+ fw_cfg_add_i16(fw_cfg, FW_CFG_NB_CPUS, boot_cpus);
+
+ /*
+ * FW_CFG_MAX_CPUS is a bit confusing/problematic on x86:
+ *
+ * For machine types prior to 1.8, SeaBIOS needs FW_CFG_MAX_CPUS for
+ * building MPTable, ACPI MADT, ACPI CPU hotplug and ACPI SRAT table,
+ * that tables are based on xAPIC ID and QEMU<->SeaBIOS interface
+ * for CPU hotplug also uses APIC ID and not "CPU index".
+ * This means that FW_CFG_MAX_CPUS is not the "maximum number of CPUs",
+ * but the "limit to the APIC ID values SeaBIOS may see".
+ *
+ * So for compatibility reasons with old BIOSes we are stuck with
+ * "etc/max-cpus" actually being apic_id_limit
+ */
+ fw_cfg_add_i16(fw_cfg, FW_CFG_MAX_CPUS, apic_id_limit);
+ fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, (uint64_t)ram_size);
+ fw_cfg_add_bytes(fw_cfg, FW_CFG_ACPI_TABLES,
+ acpi_tables, acpi_tables_len);
+ fw_cfg_add_i32(fw_cfg, FW_CFG_IRQ0_OVERRIDE, kvm_allows_irq0_override());
+
+ fw_cfg_add_bytes(fw_cfg, FW_CFG_E820_TABLE,
+ &e820_reserve, sizeof(e820_reserve));
+ fw_cfg_add_file(fw_cfg, "etc/e820", e820_table,
+ sizeof(struct e820_entry) * e820_get_num_entries());
+
+ fw_cfg_add_bytes(fw_cfg, FW_CFG_HPET, &hpet_cfg, sizeof(hpet_cfg));
+ /*
+ * allocate memory for the NUMA channel: one (64bit) word for the number
+ * of nodes, one word for each VCPU->node and one word for each node to
+ * hold the amount of memory.
+ */
+ numa_fw_cfg = g_new0(uint64_t, 1 + apic_id_limit + nb_numa_nodes);
+ numa_fw_cfg[0] = cpu_to_le64(nb_numa_nodes);
+ for (i = 0; i < cpus->len; i++) {
+ unsigned int apic_id = cpus->cpus[i].arch_id;
+ assert(apic_id < apic_id_limit);
+ numa_fw_cfg[apic_id + 1] = cpu_to_le64(cpus->cpus[i].props.node_id);
+ }
+ for (i = 0; i < nb_numa_nodes; i++) {
+ numa_fw_cfg[apic_id_limit + 1 + i] =
+ cpu_to_le64(numa_info[i].node_mem);
+ }
+ fw_cfg_add_bytes(fw_cfg, FW_CFG_NUMA, numa_fw_cfg,
+ (1 + apic_id_limit + nb_numa_nodes) *
+ sizeof(*numa_fw_cfg));
+
+ return fw_cfg;
+}
+
+void fw_cfg_build_smbios(MachineState *ms, FWCfgState *fw_cfg)
+{
+ uint8_t *smbios_tables, *smbios_anchor;
+ size_t smbios_tables_len, smbios_anchor_len;
+ struct smbios_phys_mem_area *mem_array;
+ unsigned i, array_count;
+ X86CPU *cpu = X86_CPU(ms->possible_cpus->cpus[0].cpu);
+
+ /* tell smbios about cpuid version and features */
+ smbios_set_cpuid(cpu->env.cpuid_version, cpu->env.features[FEAT_1_EDX]);
+
+ smbios_tables = smbios_get_table_legacy(&smbios_tables_len);
+ if (smbios_tables) {
+ fw_cfg_add_bytes(fw_cfg, FW_CFG_SMBIOS_ENTRIES,
+ smbios_tables, smbios_tables_len);
+ }
+
+ /* build the array of physical mem area from e820 table */
+ mem_array = g_malloc0(sizeof(*mem_array) * e820_get_num_entries());
+ for (i = 0, array_count = 0; i < e820_get_num_entries(); i++) {
+ uint64_t addr, len;
+
+ if (e820_get_entry(i, E820_RAM, &addr, &len)) {
+ mem_array[array_count].address = addr;
+ mem_array[array_count].length = len;
+ array_count++;
+ }
+ }
+ smbios_get_tables(mem_array, array_count,
+ &smbios_tables, &smbios_tables_len,
+ &smbios_anchor, &smbios_anchor_len);
+ g_free(mem_array);
+
+ if (smbios_anchor) {
+ fw_cfg_add_file(fw_cfg, "etc/smbios/smbios-tables",
+ smbios_tables, smbios_tables_len);
+ fw_cfg_add_file(fw_cfg, "etc/smbios/smbios-anchor",
+ smbios_anchor, smbios_anchor_len);
+ }
+}
+
+void fw_cfg_build_feature_control(MachineState *ms, FWCfgState *fw_cfg)
+{
+ X86CPU *cpu = X86_CPU(ms->possible_cpus->cpus[0].cpu);
+ CPUX86State *env = &cpu->env;
+ uint32_t unused, ecx, edx;
+ uint64_t feature_control_bits = 0;
+ uint64_t *val;
+
+ cpu_x86_cpuid(env, 1, 0, &unused, &unused, &ecx, &edx);
+ if (ecx & CPUID_EXT_VMX) {
+ feature_control_bits |= FEATURE_CONTROL_VMXON_ENABLED_OUTSIDE_SMX;
+ }
+
+ if ((edx & (CPUID_EXT2_MCE | CPUID_EXT2_MCA)) ==
+ (CPUID_EXT2_MCE | CPUID_EXT2_MCA) &&
+ (env->mcg_cap & MCG_LMCE_P)) {
+ feature_control_bits |= FEATURE_CONTROL_LMCE;
+ }
+
+ if (!feature_control_bits) {
+ return;
+ }
+
+ val = g_malloc(sizeof(*val));
+ *val = cpu_to_le64(feature_control_bits | FEATURE_CONTROL_LOCKED);
+ fw_cfg_add_file(fw_cfg, "etc/msr_feature_control", val, sizeof(*val));
+}
diff --git a/hw/i386/fw_cfg.h b/hw/i386/fw_cfg.h
index 17a4bc32f2..f9047a74e8 100644
--- a/hw/i386/fw_cfg.h
+++ b/hw/i386/fw_cfg.h
@@ -9,6 +9,7 @@
#ifndef HW_I386_FW_CFG_H
#define HW_I386_FW_CFG_H
+#include "hw/boards.h"
#include "hw/nvram/fw_cfg.h"
#define FW_CFG_ACPI_TABLES (FW_CFG_ARCH_LOCAL + 0)
@@ -17,4 +18,11 @@
#define FW_CFG_E820_TABLE (FW_CFG_ARCH_LOCAL + 3)
#define FW_CFG_HPET (FW_CFG_ARCH_LOCAL + 4)
+FWCfgState *fw_cfg_arch_create(MachineState *ms,
+ const CPUArchIdList *cpus,
+ uint16_t boot_cpus,
+ uint16_t apic_id_limit);
+void fw_cfg_build_smbios(MachineState *ms, FWCfgState *fw_cfg);
+void fw_cfg_build_feature_control(MachineState *ms, FWCfgState *fw_cfg);
+
#endif
diff --git a/hw/i386/pc.c b/hw/i386/pc.c
index ea895d0192..d00279bf22 100644
--- a/hw/i386/pc.c
+++ b/hw/i386/pc.c
@@ -80,6 +80,7 @@
#include "hw/net/ne2000-isa.h"
#include "standard-headers/asm-x86/bootparam.h"
#include "e820_memory_layout.h"
+#include "fw_cfg.h"
/* debug PC/ISA interrupts */
//#define DEBUG_IRQ
@@ -887,106 +888,6 @@ static uint32_t x86_cpu_apic_id_from_index(unsigned int cpu_index)
}
}
-static void fw_cfg_build_smbios(MachineState *ms, FWCfgState *fw_cfg)
-{
- uint8_t *smbios_tables, *smbios_anchor;
- size_t smbios_tables_len, smbios_anchor_len;
- struct smbios_phys_mem_area *mem_array;
- unsigned i, array_count;
- X86CPU *cpu = X86_CPU(ms->possible_cpus->cpus[0].cpu);
-
- /* tell smbios about cpuid version and features */
- smbios_set_cpuid(cpu->env.cpuid_version, cpu->env.features[FEAT_1_EDX]);
-
- smbios_tables = smbios_get_table_legacy(&smbios_tables_len);
- if (smbios_tables) {
- fw_cfg_add_bytes(fw_cfg, FW_CFG_SMBIOS_ENTRIES,
- smbios_tables, smbios_tables_len);
- }
-
- /* build the array of physical mem area from e820 table */
- mem_array = g_malloc0(sizeof(*mem_array) * e820_get_num_entries());
- for (i = 0, array_count = 0; i < e820_get_num_entries(); i++) {
- uint64_t addr, len;
-
- if (e820_get_entry(i, E820_RAM, &addr, &len)) {
- mem_array[array_count].address = addr;
- mem_array[array_count].length = len;
- array_count++;
- }
- }
- smbios_get_tables(mem_array, array_count,
- &smbios_tables, &smbios_tables_len,
- &smbios_anchor, &smbios_anchor_len);
- g_free(mem_array);
-
- if (smbios_anchor) {
- fw_cfg_add_file(fw_cfg, "etc/smbios/smbios-tables",
- smbios_tables, smbios_tables_len);
- fw_cfg_add_file(fw_cfg, "etc/smbios/smbios-anchor",
- smbios_anchor, smbios_anchor_len);
- }
-}
-
-static FWCfgState *fw_cfg_arch_create(MachineState *ms,
- const CPUArchIdList *cpus,
- uint16_t boot_cpus,
- uint16_t apic_id_limit)
-{
- FWCfgState *fw_cfg;
- uint64_t *numa_fw_cfg;
- int i;
-
- fw_cfg = fw_cfg_init_io_dma(FW_CFG_IO_BASE, FW_CFG_IO_BASE + 4,
- &address_space_memory);
- fw_cfg_add_i16(fw_cfg, FW_CFG_NB_CPUS, boot_cpus);
-
- /* FW_CFG_MAX_CPUS is a bit confusing/problematic on x86:
- *
- * For machine types prior to 1.8, SeaBIOS needs FW_CFG_MAX_CPUS for
- * building MPTable, ACPI MADT, ACPI CPU hotplug and ACPI SRAT table,
- * that tables are based on xAPIC ID and QEMU<->SeaBIOS interface
- * for CPU hotplug also uses APIC ID and not "CPU index".
- * This means that FW_CFG_MAX_CPUS is not the "maximum number of CPUs",
- * but the "limit to the APIC ID values SeaBIOS may see".
- *
- * So for compatibility reasons with old BIOSes we are stuck with
- * "etc/max-cpus" actually being apic_id_limit
- */
- fw_cfg_add_i16(fw_cfg, FW_CFG_MAX_CPUS, apic_id_limit);
- fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, (uint64_t)ram_size);
- fw_cfg_add_bytes(fw_cfg, FW_CFG_ACPI_TABLES,
- acpi_tables, acpi_tables_len);
- fw_cfg_add_i32(fw_cfg, FW_CFG_IRQ0_OVERRIDE, kvm_allows_irq0_override());
-
- fw_cfg_add_bytes(fw_cfg, FW_CFG_E820_TABLE,
- &e820_reserve, sizeof(e820_reserve));
- fw_cfg_add_file(fw_cfg, "etc/e820", e820_table,
- sizeof(struct e820_entry) * e820_get_num_entries());
-
- fw_cfg_add_bytes(fw_cfg, FW_CFG_HPET, &hpet_cfg, sizeof(hpet_cfg));
- /* allocate memory for the NUMA channel: one (64bit) word for the number
- * of nodes, one word for each VCPU->node and one word for each node to
- * hold the amount of memory.
- */
- numa_fw_cfg = g_new0(uint64_t, 1 + apic_id_limit + nb_numa_nodes);
- numa_fw_cfg[0] = cpu_to_le64(nb_numa_nodes);
- for (i = 0; i < cpus->len; i++) {
- unsigned int apic_id = cpus->cpus[i].arch_id;
- assert(apic_id < apic_id_limit);
- numa_fw_cfg[apic_id + 1] = cpu_to_le64(cpus->cpus[i].props.node_id);
- }
- for (i = 0; i < nb_numa_nodes; i++) {
- numa_fw_cfg[apic_id_limit + 1 + i] =
- cpu_to_le64(numa_info[i].node_mem);
- }
- fw_cfg_add_bytes(fw_cfg, FW_CFG_NUMA, numa_fw_cfg,
- (1 + apic_id_limit + nb_numa_nodes) *
- sizeof(*numa_fw_cfg));
-
- return fw_cfg;
-}
-
static long get_file_size(FILE *f)
{
long where, size;
@@ -1518,35 +1419,6 @@ void pc_cpus_init(PCMachineState *pcms)
}
}
-static void fw_cfg_build_feature_control(MachineState *ms,
- FWCfgState *fw_cfg)
-{
- X86CPU *cpu = X86_CPU(ms->possible_cpus->cpus[0].cpu);
- CPUX86State *env = &cpu->env;
- uint32_t unused, ecx, edx;
- uint64_t feature_control_bits = 0;
- uint64_t *val;
-
- cpu_x86_cpuid(env, 1, 0, &unused, &unused, &ecx, &edx);
- if (ecx & CPUID_EXT_VMX) {
- feature_control_bits |= FEATURE_CONTROL_VMXON_ENABLED_OUTSIDE_SMX;
- }
-
- if ((edx & (CPUID_EXT2_MCE | CPUID_EXT2_MCA)) ==
- (CPUID_EXT2_MCE | CPUID_EXT2_MCA) &&
- (env->mcg_cap & MCG_LMCE_P)) {
- feature_control_bits |= FEATURE_CONTROL_LMCE;
- }
-
- if (!feature_control_bits) {
- return;
- }
-
- val = g_malloc(sizeof(*val));
- *val = cpu_to_le64(feature_control_bits | FEATURE_CONTROL_LOCKED);
- fw_cfg_add_file(fw_cfg, "etc/msr_feature_control", val, sizeof(*val));
-}
-
static void rtc_set_cpus_count(ISADevice *rtc, uint16_t cpus_count)
{
if (cpus_count > 0xff) {
--
2.20.1
^ permalink raw reply related [flat|nested] 36+ messages in thread
* Re: [Qemu-devel] [PATCH v3 08/15] hw/i386/pc: Let fw_cfg_init() use the generic MachineState
2019-07-01 13:35 ` [Qemu-devel] " Philippe Mathieu-Daudé
@ 2019-07-01 16:01 ` Christophe de Dinechin
-1 siblings, 0 replies; 36+ messages in thread
From: Christophe de Dinechin @ 2019-07-01 16:01 UTC (permalink / raw)
To: qemu-devel
Cc: Yang Zhong, Samuel Ortiz, kvm, Michael S. Tsirkin,
Marcelo Tosatti, Rob Bradford, Paolo Bonzini, Richard Henderson,
Philippe Mathieu-Daudé,
Eduardo Habkost
Philippe Mathieu-Daudé writes:
> We removed the PCMachineState access, we can now let the fw_cfg_init()
> function to take a generic MachineState object.
to take -> take
>
> Suggested-by: Samuel Ortiz <sameo@linux.intel.com>
> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
> ---
> hw/i386/pc.c | 5 +++--
> 1 file changed, 3 insertions(+), 2 deletions(-)
>
> diff --git a/hw/i386/pc.c b/hw/i386/pc.c
> index 1e856704e1..60ee71924a 100644
> --- a/hw/i386/pc.c
> +++ b/hw/i386/pc.c
> @@ -929,7 +929,7 @@ static void pc_build_smbios(PCMachineState *pcms)
> }
> }
>
> -static FWCfgState *fw_cfg_arch_create(PCMachineState *pcms,
> +static FWCfgState *fw_cfg_arch_create(MachineState *ms,
I don't see where ms is used in the function. Maybe in a later patch,
I did not receive patches 09-15 yet.
> const CPUArchIdList *cpus,
> uint16_t boot_cpus,
> uint16_t apic_id_limit)
> @@ -1667,6 +1667,7 @@ void pc_memory_init(PCMachineState *pcms,
> MemoryRegion *ram_below_4g, *ram_above_4g;
> FWCfgState *fw_cfg;
> MachineState *machine = MACHINE(pcms);
> + MachineClass *mc = MACHINE_GET_CLASS(machine);
> PCMachineClass *pcmc = PC_MACHINE_GET_CLASS(pcms);
>
> assert(machine->ram_size == pcms->below_4g_mem_size +
> @@ -1763,7 +1764,7 @@ void pc_memory_init(PCMachineState *pcms,
> option_rom_mr,
> 1);
>
> - fw_cfg = fw_cfg_arch_create(pcms, mc->possible_cpu_arch_ids(machine),
> + fw_cfg = fw_cfg_arch_create(machine, mc->possible_cpu_arch_ids(machine),
> pcms->boot_cpus, pcms->apic_id_limit);
>
> rom_set_fw(fw_cfg);
--
Cheers,
Christophe de Dinechin (IRC c3d)
^ permalink raw reply [flat|nested] 36+ messages in thread
* Re: [Qemu-devel] [PATCH v3 08/15] hw/i386/pc: Let fw_cfg_init() use the generic MachineState
@ 2019-07-01 16:01 ` Christophe de Dinechin
0 siblings, 0 replies; 36+ messages in thread
From: Christophe de Dinechin @ 2019-07-01 16:01 UTC (permalink / raw)
To: qemu-devel
Cc: Yang Zhong, Samuel Ortiz, Rob Bradford, Michael S. Tsirkin,
Marcelo Tosatti, Eduardo Habkost, kvm, Paolo Bonzini,
Philippe Mathieu-Daudé,
Richard Henderson
Philippe Mathieu-Daudé writes:
> We removed the PCMachineState access, we can now let the fw_cfg_init()
> function to take a generic MachineState object.
to take -> take
>
> Suggested-by: Samuel Ortiz <sameo@linux.intel.com>
> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
> ---
> hw/i386/pc.c | 5 +++--
> 1 file changed, 3 insertions(+), 2 deletions(-)
>
> diff --git a/hw/i386/pc.c b/hw/i386/pc.c
> index 1e856704e1..60ee71924a 100644
> --- a/hw/i386/pc.c
> +++ b/hw/i386/pc.c
> @@ -929,7 +929,7 @@ static void pc_build_smbios(PCMachineState *pcms)
> }
> }
>
> -static FWCfgState *fw_cfg_arch_create(PCMachineState *pcms,
> +static FWCfgState *fw_cfg_arch_create(MachineState *ms,
I don't see where ms is used in the function. Maybe in a later patch,
I did not receive patches 09-15 yet.
> const CPUArchIdList *cpus,
> uint16_t boot_cpus,
> uint16_t apic_id_limit)
> @@ -1667,6 +1667,7 @@ void pc_memory_init(PCMachineState *pcms,
> MemoryRegion *ram_below_4g, *ram_above_4g;
> FWCfgState *fw_cfg;
> MachineState *machine = MACHINE(pcms);
> + MachineClass *mc = MACHINE_GET_CLASS(machine);
> PCMachineClass *pcmc = PC_MACHINE_GET_CLASS(pcms);
>
> assert(machine->ram_size == pcms->below_4g_mem_size +
> @@ -1763,7 +1764,7 @@ void pc_memory_init(PCMachineState *pcms,
> option_rom_mr,
> 1);
>
> - fw_cfg = fw_cfg_arch_create(pcms, mc->possible_cpu_arch_ids(machine),
> + fw_cfg = fw_cfg_arch_create(machine, mc->possible_cpu_arch_ids(machine),
> pcms->boot_cpus, pcms->apic_id_limit);
>
> rom_set_fw(fw_cfg);
--
Cheers,
Christophe de Dinechin (IRC c3d)
^ permalink raw reply [flat|nested] 36+ messages in thread
* Re: [Qemu-devel] [PATCH v3 08/15] hw/i386/pc: Let fw_cfg_init() use the generic MachineState
2019-07-01 16:01 ` Christophe de Dinechin
@ 2019-07-01 19:56 ` Philippe Mathieu-Daudé
-1 siblings, 0 replies; 36+ messages in thread
From: Philippe Mathieu-Daudé @ 2019-07-01 19:56 UTC (permalink / raw)
To: Christophe de Dinechin, qemu-devel
Cc: Yang Zhong, Samuel Ortiz, kvm, Michael S. Tsirkin,
Marcelo Tosatti, Rob Bradford, Paolo Bonzini, Richard Henderson,
Eduardo Habkost
On 7/1/19 6:01 PM, Christophe de Dinechin wrote:
> Philippe Mathieu-Daudé writes:
>
>> We removed the PCMachineState access, we can now let the fw_cfg_init()
>> function to take a generic MachineState object.
>
> to take -> take
>
>>
>> Suggested-by: Samuel Ortiz <sameo@linux.intel.com>
>> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
>> ---
>> hw/i386/pc.c | 5 +++--
>> 1 file changed, 3 insertions(+), 2 deletions(-)
>>
>> diff --git a/hw/i386/pc.c b/hw/i386/pc.c
>> index 1e856704e1..60ee71924a 100644
>> --- a/hw/i386/pc.c
>> +++ b/hw/i386/pc.c
>> @@ -929,7 +929,7 @@ static void pc_build_smbios(PCMachineState *pcms)
>> }
>> }
>>
>> -static FWCfgState *fw_cfg_arch_create(PCMachineState *pcms,
>> +static FWCfgState *fw_cfg_arch_create(MachineState *ms,
>
> I don't see where ms is used in the function. Maybe in a later patch,
> I did not receive patches 09-15 yet.
You are right, it is not used (even if the following patches).
>> const CPUArchIdList *cpus,
>> uint16_t boot_cpus,
>> uint16_t apic_id_limit)
>> @@ -1667,6 +1667,7 @@ void pc_memory_init(PCMachineState *pcms,
>> MemoryRegion *ram_below_4g, *ram_above_4g;
>> FWCfgState *fw_cfg;
>> MachineState *machine = MACHINE(pcms);
>> + MachineClass *mc = MACHINE_GET_CLASS(machine);
>> PCMachineClass *pcmc = PC_MACHINE_GET_CLASS(pcms);
>>
>> assert(machine->ram_size == pcms->below_4g_mem_size +
>> @@ -1763,7 +1764,7 @@ void pc_memory_init(PCMachineState *pcms,
>> option_rom_mr,
>> 1);
>>
>> - fw_cfg = fw_cfg_arch_create(pcms, mc->possible_cpu_arch_ids(machine),
>> + fw_cfg = fw_cfg_arch_create(machine, mc->possible_cpu_arch_ids(machine),
>> pcms->boot_cpus, pcms->apic_id_limit);
>>
>> rom_set_fw(fw_cfg);
^ permalink raw reply [flat|nested] 36+ messages in thread
* Re: [Qemu-devel] [PATCH v3 08/15] hw/i386/pc: Let fw_cfg_init() use the generic MachineState
@ 2019-07-01 19:56 ` Philippe Mathieu-Daudé
0 siblings, 0 replies; 36+ messages in thread
From: Philippe Mathieu-Daudé @ 2019-07-01 19:56 UTC (permalink / raw)
To: Christophe de Dinechin, qemu-devel
Cc: Yang Zhong, Samuel Ortiz, Rob Bradford, Michael S. Tsirkin,
Marcelo Tosatti, Eduardo Habkost, kvm, Paolo Bonzini,
Richard Henderson
On 7/1/19 6:01 PM, Christophe de Dinechin wrote:
> Philippe Mathieu-Daudé writes:
>
>> We removed the PCMachineState access, we can now let the fw_cfg_init()
>> function to take a generic MachineState object.
>
> to take -> take
>
>>
>> Suggested-by: Samuel Ortiz <sameo@linux.intel.com>
>> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
>> ---
>> hw/i386/pc.c | 5 +++--
>> 1 file changed, 3 insertions(+), 2 deletions(-)
>>
>> diff --git a/hw/i386/pc.c b/hw/i386/pc.c
>> index 1e856704e1..60ee71924a 100644
>> --- a/hw/i386/pc.c
>> +++ b/hw/i386/pc.c
>> @@ -929,7 +929,7 @@ static void pc_build_smbios(PCMachineState *pcms)
>> }
>> }
>>
>> -static FWCfgState *fw_cfg_arch_create(PCMachineState *pcms,
>> +static FWCfgState *fw_cfg_arch_create(MachineState *ms,
>
> I don't see where ms is used in the function. Maybe in a later patch,
> I did not receive patches 09-15 yet.
You are right, it is not used (even if the following patches).
>> const CPUArchIdList *cpus,
>> uint16_t boot_cpus,
>> uint16_t apic_id_limit)
>> @@ -1667,6 +1667,7 @@ void pc_memory_init(PCMachineState *pcms,
>> MemoryRegion *ram_below_4g, *ram_above_4g;
>> FWCfgState *fw_cfg;
>> MachineState *machine = MACHINE(pcms);
>> + MachineClass *mc = MACHINE_GET_CLASS(machine);
>> PCMachineClass *pcmc = PC_MACHINE_GET_CLASS(pcms);
>>
>> assert(machine->ram_size == pcms->below_4g_mem_size +
>> @@ -1763,7 +1764,7 @@ void pc_memory_init(PCMachineState *pcms,
>> option_rom_mr,
>> 1);
>>
>> - fw_cfg = fw_cfg_arch_create(pcms, mc->possible_cpu_arch_ids(machine),
>> + fw_cfg = fw_cfg_arch_create(machine, mc->possible_cpu_arch_ids(machine),
>> pcms->boot_cpus, pcms->apic_id_limit);
>>
>> rom_set_fw(fw_cfg);
^ permalink raw reply [flat|nested] 36+ messages in thread
end of thread, other threads:[~2019-07-01 22:05 UTC | newest]
Thread overview: 36+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2019-07-01 13:35 [PATCH v3 00/15] hw/i386/pc: Do not restrict the fw_cfg functions to the PC machine Philippe Mathieu-Daudé
2019-07-01 13:35 ` [Qemu-devel] " Philippe Mathieu-Daudé
2019-07-01 13:35 ` [PATCH v3 01/15] hw/i386/pc: Use e820_get_num_entries() to access e820_entries Philippe Mathieu-Daudé
2019-07-01 13:35 ` [Qemu-devel] " Philippe Mathieu-Daudé
2019-07-01 13:35 ` [PATCH v3 02/15] hw/i386/pc: Extract e820 memory layout code Philippe Mathieu-Daudé
2019-07-01 13:35 ` [Qemu-devel] " Philippe Mathieu-Daudé
2019-07-01 13:35 ` [PATCH v3 03/15] hw/i386/pc: Use address_space_memory in place Philippe Mathieu-Daudé
2019-07-01 13:35 ` [Qemu-devel] " Philippe Mathieu-Daudé
2019-07-01 13:35 ` [PATCH v3 04/15] hw/i386/pc: Rename bochs_bios_init as more generic fw_cfg_arch_create Philippe Mathieu-Daudé
2019-07-01 13:35 ` [Qemu-devel] " Philippe Mathieu-Daudé
2019-07-01 13:35 ` [PATCH v3 05/15] hw/i386/pc: Pass the boot_cpus value by argument Philippe Mathieu-Daudé
2019-07-01 13:35 ` [Qemu-devel] " Philippe Mathieu-Daudé
2019-07-01 13:35 ` [PATCH v3 06/15] hw/i386/pc: Pass the apic_id_limit " Philippe Mathieu-Daudé
2019-07-01 13:35 ` [Qemu-devel] " Philippe Mathieu-Daudé
2019-07-01 13:35 ` [PATCH v3 07/15] hw/i386/pc: Pass the CPUArchIdList array " Philippe Mathieu-Daudé
2019-07-01 13:35 ` [Qemu-devel] " Philippe Mathieu-Daudé
2019-07-01 13:35 ` [PATCH v3 08/15] hw/i386/pc: Let fw_cfg_init() use the generic MachineState Philippe Mathieu-Daudé
2019-07-01 13:35 ` [Qemu-devel] " Philippe Mathieu-Daudé
2019-07-01 16:01 ` Christophe de Dinechin
2019-07-01 16:01 ` Christophe de Dinechin
2019-07-01 19:56 ` Philippe Mathieu-Daudé
2019-07-01 19:56 ` Philippe Mathieu-Daudé
2019-07-01 13:35 ` [PATCH v3 09/15] hw/i386/pc: Let pc_build_smbios() take a FWCfgState argument Philippe Mathieu-Daudé
2019-07-01 13:35 ` [Qemu-devel] " Philippe Mathieu-Daudé
2019-07-01 13:35 ` [PATCH v3 10/15] hw/i386/pc: Let pc_build_smbios() take a generic MachineState argument Philippe Mathieu-Daudé
2019-07-01 13:35 ` [Qemu-devel] " Philippe Mathieu-Daudé
2019-07-01 13:35 ` [PATCH v3 11/15] hw/i386/pc: Rename pc_build_smbios() as generic fw_cfg_build_smbios() Philippe Mathieu-Daudé
2019-07-01 13:35 ` [Qemu-devel] " Philippe Mathieu-Daudé
2019-07-01 13:35 ` [PATCH v3 12/15] hw/i386/pc: Let pc_build_feature_control() take a FWCfgState argument Philippe Mathieu-Daudé
2019-07-01 13:35 ` [Qemu-devel] " Philippe Mathieu-Daudé
2019-07-01 13:35 ` [PATCH v3 13/15] hw/i386/pc: Let pc_build_feature_control() take a MachineState argument Philippe Mathieu-Daudé
2019-07-01 13:35 ` [Qemu-devel] " Philippe Mathieu-Daudé
2019-07-01 13:35 ` [PATCH v3 14/15] hw/i386/pc: Rename pc_build_feature_control() as generic fw_cfg_build_* Philippe Mathieu-Daudé
2019-07-01 13:35 ` [Qemu-devel] " Philippe Mathieu-Daudé
2019-07-01 13:35 ` [PATCH v3 15/15] hw/i386/pc: Extract the x86 generic fw_cfg code Philippe Mathieu-Daudé
2019-07-01 13:35 ` [Qemu-devel] " Philippe Mathieu-Daudé
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