[PATCH 0/4] Modular FIA

[PATCH 0/4] Modular FIA

[Lucas De Marchi]

This has been extracted from the previous longer series to add support
for Tiger Lake: https://patchwork.freedesktop.org/series/62726/

Reviews are being addressed here on this version as well as reworking it
to apply on top of the TC phy split.

Anusha Srivatsa (1):
  drm/i915: Add modular FIA

Lucas De Marchi (3):
  drm/i915: make new intel_tc.c use uncore accessors
  drm/i915: fix include order in intel_tc.*
  drm/i915: move intel_ddi_set_fia_lane_count to intel_tc.c

 drivers/gpu/drm/i915/display/intel_ddi.c |  49 ++-------
 drivers/gpu/drm/i915/display/intel_tc.c  | 125 ++++++++++++++++++-----
 drivers/gpu/drm/i915/display/intel_tc.h  |   7 +-
 drivers/gpu/drm/i915/i915_reg.h          |  13 ++-
 drivers/gpu/drm/i915/intel_device_info.h |   1 +
 drivers/gpu/drm/i915/intel_drv.h         |   1 +
 6 files changed, 120 insertions(+), 76 deletions(-)

-- 
2.21.0

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[PATCH 1/4] drm/i915: make new intel_tc.c use uncore accessors

[Lucas De Marchi]

Let's make the just created intel_tc.c already follow the trend of using
i915 instead of dev_priv and calling the intel_uncore_*() functions.

Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
---
 drivers/gpu/drm/i915/display/intel_tc.c | 57 ++++++++++++++-----------
 1 file changed, 31 insertions(+), 26 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_tc.c b/drivers/gpu/drm/i915/display/intel_tc.c
index 53103a9aa8a7..1a9dd32fb0a5 100644
--- a/drivers/gpu/drm/i915/display/intel_tc.c
+++ b/drivers/gpu/drm/i915/display/intel_tc.c
@@ -24,11 +24,12 @@ static const char *tc_port_mode_name(enum tc_port_mode mode)
 
 u32 intel_tc_port_get_lane_mask(struct intel_digital_port *dig_port)
 {
-	struct drm_i915_private *dev_priv = to_i915(dig_port->base.base.dev);
-	enum tc_port tc_port = intel_port_to_tc(dev_priv, dig_port->base.port);
+	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
+	enum tc_port tc_port = intel_port_to_tc(i915, dig_port->base.port);
+	struct intel_uncore *uncore = &i915->uncore;
 	u32 lane_mask;
 
-	lane_mask = I915_READ(PORT_TX_DFLEXDPSP);
+	lane_mask = intel_uncore_read(uncore, PORT_TX_DFLEXDPSP);
 
 	WARN_ON(lane_mask == 0xffffffff);
 
@@ -38,7 +39,7 @@ u32 intel_tc_port_get_lane_mask(struct intel_digital_port *dig_port)
 
 int intel_tc_port_fia_max_lane_count(struct intel_digital_port *dig_port)
 {
-	struct drm_i915_private *dev_priv = to_i915(dig_port->base.base.dev);
+	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
 	intel_wakeref_t wakeref;
 	u32 lane_mask;
 
@@ -46,7 +47,7 @@ int intel_tc_port_fia_max_lane_count(struct intel_digital_port *dig_port)
 		return 4;
 
 	lane_mask = 0;
-	with_intel_display_power(dev_priv, POWER_DOMAIN_DISPLAY_CORE, wakeref)
+	with_intel_display_power(i915, POWER_DOMAIN_DISPLAY_CORE, wakeref)
 		lane_mask = intel_tc_port_get_lane_mask(dig_port);
 
 	switch (lane_mask) {
@@ -89,12 +90,13 @@ static void tc_port_fixup_legacy_flag(struct intel_digital_port *dig_port,
 
 static u32 tc_port_live_status_mask(struct intel_digital_port *dig_port)
 {
-	struct drm_i915_private *dev_priv = to_i915(dig_port->base.base.dev);
-	enum tc_port tc_port = intel_port_to_tc(dev_priv, dig_port->base.port);
+	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
+	enum tc_port tc_port = intel_port_to_tc(i915, dig_port->base.port);
+	struct intel_uncore *uncore = &i915->uncore;
 	u32 mask = 0;
 	u32 val;
 
-	val = I915_READ(PORT_TX_DFLEXDPSP);
+	val = intel_uncore_read(uncore, PORT_TX_DFLEXDPSP);
 
 	if (val == 0xffffffff) {
 		DRM_DEBUG_KMS("Port %s: PHY in TCCOLD, nothing connected\n",
@@ -107,7 +109,7 @@ static u32 tc_port_live_status_mask(struct intel_digital_port *dig_port)
 	if (val & TC_LIVE_STATE_TC(tc_port))
 		mask |= BIT(TC_PORT_DP_ALT);
 
-	if (I915_READ(SDEISR) & SDE_TC_HOTPLUG_ICP(tc_port))
+	if (intel_uncore_read(uncore, SDEISR) & SDE_TC_HOTPLUG_ICP(tc_port))
 		mask |= BIT(TC_PORT_LEGACY);
 
 	/* The sink can be connected only in a single mode. */
@@ -119,11 +121,12 @@ static u32 tc_port_live_status_mask(struct intel_digital_port *dig_port)
 
 static bool icl_tc_phy_status_complete(struct intel_digital_port *dig_port)
 {
-	struct drm_i915_private *dev_priv = to_i915(dig_port->base.base.dev);
-	enum tc_port tc_port = intel_port_to_tc(dev_priv, dig_port->base.port);
+	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
+	enum tc_port tc_port = intel_port_to_tc(i915, dig_port->base.port);
+	struct intel_uncore *uncore = &i915->uncore;
 	u32 val;
 
-	val = I915_READ(PORT_TX_DFLEXDPPMS);
+	val = intel_uncore_read(uncore, PORT_TX_DFLEXDPPMS);
 	if (val == 0xffffffff) {
 		DRM_DEBUG_KMS("Port %s: PHY in TCCOLD, assuming not complete\n",
 			      dig_port->tc_port_name);
@@ -136,11 +139,12 @@ static bool icl_tc_phy_status_complete(struct intel_digital_port *dig_port)
 static bool icl_tc_phy_set_safe_mode(struct intel_digital_port *dig_port,
 				     bool enable)
 {
-	struct drm_i915_private *dev_priv = to_i915(dig_port->base.base.dev);
-	enum tc_port tc_port = intel_port_to_tc(dev_priv, dig_port->base.port);
+	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
+	enum tc_port tc_port = intel_port_to_tc(i915, dig_port->base.port);
+	struct intel_uncore *uncore = &i915->uncore;
 	u32 val;
 
-	val = I915_READ(PORT_TX_DFLEXDPCSSS);
+	val = intel_uncore_read(uncore, PORT_TX_DFLEXDPCSSS);
 	if (val == 0xffffffff) {
 		DRM_DEBUG_KMS("Port %s: PHY in TCCOLD, can't set safe-mode to %s\n",
 			      dig_port->tc_port_name,
@@ -153,7 +157,7 @@ static bool icl_tc_phy_set_safe_mode(struct intel_digital_port *dig_port,
 	if (!enable)
 		val |= DP_PHY_MODE_STATUS_NOT_SAFE(tc_port);
 
-	I915_WRITE(PORT_TX_DFLEXDPCSSS, val);
+	intel_uncore_write(uncore, PORT_TX_DFLEXDPCSSS, val);
 
 	if (enable && wait_for(!icl_tc_phy_status_complete(dig_port), 10))
 		DRM_DEBUG_KMS("Port %s: PHY complete clear timed out\n",
@@ -164,11 +168,12 @@ static bool icl_tc_phy_set_safe_mode(struct intel_digital_port *dig_port,
 
 static bool icl_tc_phy_is_in_safe_mode(struct intel_digital_port *dig_port)
 {
-	struct drm_i915_private *dev_priv = to_i915(dig_port->base.base.dev);
-	enum tc_port tc_port = intel_port_to_tc(dev_priv, dig_port->base.port);
+	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
+	enum tc_port tc_port = intel_port_to_tc(i915, dig_port->base.port);
+	struct intel_uncore *uncore = &i915->uncore;
 	u32 val;
 
-	val = I915_READ(PORT_TX_DFLEXDPCSSS);
+	val = intel_uncore_read(uncore, PORT_TX_DFLEXDPCSSS);
 	if (val == 0xffffffff) {
 		DRM_DEBUG_KMS("Port %s: PHY in TCCOLD, assume safe mode\n",
 			      dig_port->tc_port_name);
@@ -317,11 +322,11 @@ intel_tc_port_get_target_mode(struct intel_digital_port *dig_port)
 static void intel_tc_port_reset_mode(struct intel_digital_port *dig_port,
 				     int required_lanes)
 {
-	struct drm_i915_private *dev_priv = to_i915(dig_port->base.base.dev);
+	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
 	enum tc_port_mode old_tc_mode = dig_port->tc_mode;
 
-	intel_display_power_flush_work(dev_priv);
-	WARN_ON(intel_display_power_is_enabled(dev_priv,
+	intel_display_power_flush_work(i915);
+	WARN_ON(intel_display_power_is_enabled(i915,
 					       intel_aux_power_domain(dig_port)));
 
 	icl_tc_phy_disconnect(dig_port);
@@ -404,10 +409,10 @@ bool intel_tc_port_connected(struct intel_digital_port *dig_port)
 static void __intel_tc_port_lock(struct intel_digital_port *dig_port,
 				 int required_lanes)
 {
-	struct drm_i915_private *dev_priv = to_i915(dig_port->base.base.dev);
+	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
 	intel_wakeref_t wakeref;
 
-	wakeref = intel_display_power_get(dev_priv, POWER_DOMAIN_DISPLAY_CORE);
+	wakeref = intel_display_power_get(i915, POWER_DOMAIN_DISPLAY_CORE);
 
 	mutex_lock(&dig_port->tc_lock);
 
@@ -426,12 +431,12 @@ void intel_tc_port_lock(struct intel_digital_port *dig_port)
 
 void intel_tc_port_unlock(struct intel_digital_port *dig_port)
 {
-	struct drm_i915_private *dev_priv = to_i915(dig_port->base.base.dev);
+	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
 	intel_wakeref_t wakeref = fetch_and_zero(&dig_port->tc_lock_wakeref);
 
 	mutex_unlock(&dig_port->tc_lock);
 
-	intel_display_power_put_async(dev_priv, POWER_DOMAIN_DISPLAY_CORE,
+	intel_display_power_put_async(i915, POWER_DOMAIN_DISPLAY_CORE,
 				      wakeref);
 }
 
-- 
2.21.0

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[PATCH 2/4] drm/i915: fix include order in intel_tc.*

[Lucas De Marchi]

Make intel_tc.h the first include so we guarantee it's self-contained.
Sort the rest. Same principle applies for includes in the header.

Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
---
 drivers/gpu/drm/i915/display/intel_tc.c | 5 +++--
 drivers/gpu/drm/i915/display/intel_tc.h | 5 +++--
 2 files changed, 6 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_tc.c b/drivers/gpu/drm/i915/display/intel_tc.c
index 1a9dd32fb0a5..e6e6163c1232 100644
--- a/drivers/gpu/drm/i915/display/intel_tc.c
+++ b/drivers/gpu/drm/i915/display/intel_tc.c
@@ -3,10 +3,11 @@
  * Copyright © 2019 Intel Corporation
  */
 
+#include "intel_tc.h"
+
+#include "i915_drv.h"
 #include "intel_display.h"
 #include "intel_dp_mst.h"
-#include "i915_drv.h"
-#include "intel_tc.h"
 
 static const char *tc_port_mode_name(enum tc_port_mode mode)
 {
diff --git a/drivers/gpu/drm/i915/display/intel_tc.h b/drivers/gpu/drm/i915/display/intel_tc.h
index 0d8411d4a91d..45ae30537b78 100644
--- a/drivers/gpu/drm/i915/display/intel_tc.h
+++ b/drivers/gpu/drm/i915/display/intel_tc.h
@@ -6,10 +6,11 @@
 #ifndef __INTEL_TC_H__
 #define __INTEL_TC_H__
 
-#include <linux/types.h>
-#include <linux/mutex.h>
 #include "intel_drv.h"
 
+#include <linux/mutex.h>
+#include <linux/types.h>
+
 bool intel_tc_port_connected(struct intel_digital_port *dig_port);
 u32 intel_tc_port_get_lane_mask(struct intel_digital_port *dig_port);
 int intel_tc_port_fia_max_lane_count(struct intel_digital_port *dig_port);
-- 
2.21.0

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Re: [PATCH 2/4] drm/i915: fix include order in intel_tc.*

[Imre Deak]

On Wed, Jul 03, 2019 at 05:06:47PM -0700, Lucas De Marchi wrote:
> Make intel_tc.h the first include so we guarantee it's self-contained.
> Sort the rest. Same principle applies for includes in the header.
> 
> Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_tc.c | 5 +++--
>  drivers/gpu/drm/i915/display/intel_tc.h | 5 +++--
>  2 files changed, 6 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_tc.c b/drivers/gpu/drm/i915/display/intel_tc.c
> index 1a9dd32fb0a5..e6e6163c1232 100644
> --- a/drivers/gpu/drm/i915/display/intel_tc.c
> +++ b/drivers/gpu/drm/i915/display/intel_tc.c
> @@ -3,10 +3,11 @@
>   * Copyright © 2019 Intel Corporation
>   */
>  
> +#include "intel_tc.h"

I get your point to keep the self-contained check work even without the
header test files, but I'm not sure if we need that, since there is the
header test file approach in place. I haven't seen this done anywhere
else, so we shouldn't make an exception here either imo.

+Jani for that.

Fixing the rest of my ABC screw-up looks ok.

> +
> +#include "i915_drv.h"
>  #include "intel_display.h"
>  #include "intel_dp_mst.h"
> -#include "i915_drv.h"
> -#include "intel_tc.h"
>  
>  static const char *tc_port_mode_name(enum tc_port_mode mode)
>  {
> diff --git a/drivers/gpu/drm/i915/display/intel_tc.h b/drivers/gpu/drm/i915/display/intel_tc.h
> index 0d8411d4a91d..45ae30537b78 100644
> --- a/drivers/gpu/drm/i915/display/intel_tc.h
> +++ b/drivers/gpu/drm/i915/display/intel_tc.h
> @@ -6,10 +6,11 @@
>  #ifndef __INTEL_TC_H__
>  #define __INTEL_TC_H__
>  
> -#include <linux/types.h>
> -#include <linux/mutex.h>
>  #include "intel_drv.h"
>  
> +#include <linux/mutex.h>
> +#include <linux/types.h>
> +
>  bool intel_tc_port_connected(struct intel_digital_port *dig_port);
>  u32 intel_tc_port_get_lane_mask(struct intel_digital_port *dig_port);
>  int intel_tc_port_fia_max_lane_count(struct intel_digital_port *dig_port);
> -- 
> 2.21.0
> 
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Re: [PATCH 2/4] drm/i915: fix include order in intel_tc.*

[Lucas De Marchi]

On Thu, Jul 04, 2019 at 04:56:41PM +0300, Imre Deak wrote:
>On Wed, Jul 03, 2019 at 05:06:47PM -0700, Lucas De Marchi wrote:
>> Make intel_tc.h the first include so we guarantee it's self-contained.
>> Sort the rest. Same principle applies for includes in the header.
>>
>> Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
>> ---
>>  drivers/gpu/drm/i915/display/intel_tc.c | 5 +++--
>>  drivers/gpu/drm/i915/display/intel_tc.h | 5 +++--
>>  2 files changed, 6 insertions(+), 4 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/i915/display/intel_tc.c b/drivers/gpu/drm/i915/display/intel_tc.c
>> index 1a9dd32fb0a5..e6e6163c1232 100644
>> --- a/drivers/gpu/drm/i915/display/intel_tc.c
>> +++ b/drivers/gpu/drm/i915/display/intel_tc.c
>> @@ -3,10 +3,11 @@
>>   * Copyright © 2019 Intel Corporation
>>   */
>>
>> +#include "intel_tc.h"
>
>I get your point to keep the self-contained check work even without the
>header test files, but I'm not sure if we need that, since there is the
>header test file approach in place. I haven't seen this done anywhere
>else, so we shouldn't make an exception here either imo.
>
>+Jani for that.
>
>Fixing the rest of my ABC screw-up looks ok.

I can change this and leave it for later to maintain
consistency across the codebase.

Lucas De Marchi

>
>> +
>> +#include "i915_drv.h"
>>  #include "intel_display.h"
>>  #include "intel_dp_mst.h"
>> -#include "i915_drv.h"
>> -#include "intel_tc.h"
>>
>>  static const char *tc_port_mode_name(enum tc_port_mode mode)
>>  {
>> diff --git a/drivers/gpu/drm/i915/display/intel_tc.h b/drivers/gpu/drm/i915/display/intel_tc.h
>> index 0d8411d4a91d..45ae30537b78 100644
>> --- a/drivers/gpu/drm/i915/display/intel_tc.h
>> +++ b/drivers/gpu/drm/i915/display/intel_tc.h
>> @@ -6,10 +6,11 @@
>>  #ifndef __INTEL_TC_H__
>>  #define __INTEL_TC_H__
>>
>> -#include <linux/types.h>
>> -#include <linux/mutex.h>
>>  #include "intel_drv.h"
>>
>> +#include <linux/mutex.h>
>> +#include <linux/types.h>
>> +
>>  bool intel_tc_port_connected(struct intel_digital_port *dig_port);
>>  u32 intel_tc_port_get_lane_mask(struct intel_digital_port *dig_port);
>>  int intel_tc_port_fia_max_lane_count(struct intel_digital_port *dig_port);
>> --
>> 2.21.0
>>
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Re: [PATCH 2/4] drm/i915: fix include order in intel_tc.*

[Jani Nikula]

On Mon, 08 Jul 2019, Lucas De Marchi <lucas.demarchi@intel.com> wrote:
> On Thu, Jul 04, 2019 at 04:56:41PM +0300, Imre Deak wrote:
>>On Wed, Jul 03, 2019 at 05:06:47PM -0700, Lucas De Marchi wrote:
>>> Make intel_tc.h the first include so we guarantee it's self-contained.
>>> Sort the rest. Same principle applies for includes in the header.
>>>
>>> Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
>>> ---
>>>  drivers/gpu/drm/i915/display/intel_tc.c | 5 +++--
>>>  drivers/gpu/drm/i915/display/intel_tc.h | 5 +++--
>>>  2 files changed, 6 insertions(+), 4 deletions(-)
>>>
>>> diff --git a/drivers/gpu/drm/i915/display/intel_tc.c b/drivers/gpu/drm/i915/display/intel_tc.c
>>> index 1a9dd32fb0a5..e6e6163c1232 100644
>>> --- a/drivers/gpu/drm/i915/display/intel_tc.c
>>> +++ b/drivers/gpu/drm/i915/display/intel_tc.c
>>> @@ -3,10 +3,11 @@
>>>   * Copyright © 2019 Intel Corporation
>>>   */
>>>
>>> +#include "intel_tc.h"
>>
>>I get your point to keep the self-contained check work even without the
>>header test files, but I'm not sure if we need that, since there is the
>>header test file approach in place. I haven't seen this done anywhere
>>else, so we shouldn't make an exception here either imo.
>>
>>+Jani for that.
>>
>>Fixing the rest of my ABC screw-up looks ok.
>
> I can change this and leave it for later to maintain
> consistency across the codebase.

This is what we've ended up with, each block sorted:

#include <linux/...>

#include <drm/...>

#include "..."


BR,
Jani.


>
> Lucas De Marchi
>
>>
>>> +
>>> +#include "i915_drv.h"
>>>  #include "intel_display.h"
>>>  #include "intel_dp_mst.h"
>>> -#include "i915_drv.h"
>>> -#include "intel_tc.h"
>>>
>>>  static const char *tc_port_mode_name(enum tc_port_mode mode)
>>>  {
>>> diff --git a/drivers/gpu/drm/i915/display/intel_tc.h b/drivers/gpu/drm/i915/display/intel_tc.h
>>> index 0d8411d4a91d..45ae30537b78 100644
>>> --- a/drivers/gpu/drm/i915/display/intel_tc.h
>>> +++ b/drivers/gpu/drm/i915/display/intel_tc.h
>>> @@ -6,10 +6,11 @@
>>>  #ifndef __INTEL_TC_H__
>>>  #define __INTEL_TC_H__
>>>
>>> -#include <linux/types.h>
>>> -#include <linux/mutex.h>
>>>  #include "intel_drv.h"
>>>
>>> +#include <linux/mutex.h>
>>> +#include <linux/types.h>
>>> +
>>>  bool intel_tc_port_connected(struct intel_digital_port *dig_port);
>>>  u32 intel_tc_port_get_lane_mask(struct intel_digital_port *dig_port);
>>>  int intel_tc_port_fia_max_lane_count(struct intel_digital_port *dig_port);
>>> --
>>> 2.21.0
>>>

-- 
Jani Nikula, Intel Open Source Graphics Center
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Re: [PATCH 2/4] drm/i915: fix include order in intel_tc.*

[Michal Wajdeczko]

On Thu, 04 Jul 2019 02:06:47 +0200, Lucas De Marchi  
<lucas.demarchi@intel.com> wrote:

> Make intel_tc.h the first include so we guarantee it's self-contained.
> Sort the rest. Same principle applies for includes in the header.
>
> Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_tc.c | 5 +++--
>  drivers/gpu/drm/i915/display/intel_tc.h | 5 +++--
>  2 files changed, 6 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_tc.c  
> b/drivers/gpu/drm/i915/display/intel_tc.c
> index 1a9dd32fb0a5..e6e6163c1232 100644
> --- a/drivers/gpu/drm/i915/display/intel_tc.c
> +++ b/drivers/gpu/drm/i915/display/intel_tc.c
> @@ -3,10 +3,11 @@
>   * Copyright © 2019 Intel Corporation
>   */
> +#include "intel_tc.h"
> +
> +#include "i915_drv.h"

this master header will likely include everything, so while
your .h is now self-contained, .c remains unclean

>  #include "intel_display.h"
>  #include "intel_dp_mst.h"
> -#include "i915_drv.h"
> -#include "intel_tc.h"
> static const char *tc_port_mode_name(enum tc_port_mode mode)
>  {
> diff --git a/drivers/gpu/drm/i915/display/intel_tc.h  
> b/drivers/gpu/drm/i915/display/intel_tc.h
> index 0d8411d4a91d..45ae30537b78 100644
> --- a/drivers/gpu/drm/i915/display/intel_tc.h
> +++ b/drivers/gpu/drm/i915/display/intel_tc.h
> @@ -6,10 +6,11 @@
>  #ifndef __INTEL_TC_H__
>  #define __INTEL_TC_H__
> -#include <linux/types.h>
> -#include <linux/mutex.h>
>  #include "intel_drv.h"

are you sure you want this giant header to be included here?
note that it will #include almost everything (i915_drv.h too)
and may introduce hard to resolve circular dependencies

> +#include <linux/mutex.h>

we don't need mutex definitions here in current header file

> +#include <linux/types.h>
> +

so you need only above types.h and then add forward decl for:

struct intel_digital_port;

>  bool intel_tc_port_connected(struct intel_digital_port *dig_port);
>  u32 intel_tc_port_get_lane_mask(struct intel_digital_port *dig_port);
>  int intel_tc_port_fia_max_lane_count(struct intel_digital_port  
> *dig_port);
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Re: [PATCH 2/4] drm/i915: fix include order in intel_tc.*

[Imre Deak]

On Thu, Jul 04, 2019 at 07:21:38PM +0200, Michal Wajdeczko wrote:
> On Thu, 04 Jul 2019 02:06:47 +0200, Lucas De Marchi
> <lucas.demarchi@intel.com> wrote:
> 
> > Make intel_tc.h the first include so we guarantee it's self-contained.
> > Sort the rest. Same principle applies for includes in the header.
> > 
> > Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
> > ---
> >  drivers/gpu/drm/i915/display/intel_tc.c | 5 +++--
> >  drivers/gpu/drm/i915/display/intel_tc.h | 5 +++--
> >  2 files changed, 6 insertions(+), 4 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/display/intel_tc.c
> > b/drivers/gpu/drm/i915/display/intel_tc.c
> > index 1a9dd32fb0a5..e6e6163c1232 100644
> > --- a/drivers/gpu/drm/i915/display/intel_tc.c
> > +++ b/drivers/gpu/drm/i915/display/intel_tc.c
> > @@ -3,10 +3,11 @@
> >   * Copyright © 2019 Intel Corporation
> >   */
> > +#include "intel_tc.h"
> > +
> > +#include "i915_drv.h"
> 
> this master header will likely include everything, so while
> your .h is now self-contained, .c remains unclean
> 
> >  #include "intel_display.h"
> >  #include "intel_dp_mst.h"
> > -#include "i915_drv.h"
> > -#include "intel_tc.h"
> > static const char *tc_port_mode_name(enum tc_port_mode mode)
> >  {
> > diff --git a/drivers/gpu/drm/i915/display/intel_tc.h
> > b/drivers/gpu/drm/i915/display/intel_tc.h
> > index 0d8411d4a91d..45ae30537b78 100644
> > --- a/drivers/gpu/drm/i915/display/intel_tc.h
> > +++ b/drivers/gpu/drm/i915/display/intel_tc.h
> > @@ -6,10 +6,11 @@
> >  #ifndef __INTEL_TC_H__
> >  #define __INTEL_TC_H__
> > -#include <linux/types.h>
> > -#include <linux/mutex.h>
> >  #include "intel_drv.h"
> 
> are you sure you want this giant header to be included here?
> note that it will #include almost everything (i915_drv.h too)
> and may introduce hard to resolve circular dependencies
> 
> > +#include <linux/mutex.h>
> 
> we don't need mutex definitions here in current header file
> 
> > +#include <linux/types.h>
> > +
> 
> so you need only above types.h and then add forward decl for:
> 
> struct intel_digital_port;

Both the mutex and intel_digital_port definitions are needed by 
intel_tc_port_ref_held() in this header.

> 
> >  bool intel_tc_port_connected(struct intel_digital_port *dig_port);
> >  u32 intel_tc_port_get_lane_mask(struct intel_digital_port *dig_port);
> >  int intel_tc_port_fia_max_lane_count(struct intel_digital_port
> > *dig_port);
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
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Re: [PATCH 2/4] drm/i915: fix include order in intel_tc.*

[Michal Wajdeczko]

On Thu, 04 Jul 2019 19:43:12 +0200, Imre Deak <imre.deak@intel.com> wrote:

> On Thu, Jul 04, 2019 at 07:21:38PM +0200, Michal Wajdeczko wrote:
>> On Thu, 04 Jul 2019 02:06:47 +0200, Lucas De Marchi
>> <lucas.demarchi@intel.com> wrote:
>>
>> > Make intel_tc.h the first include so we guarantee it's self-contained.
>> > Sort the rest. Same principle applies for includes in the header.
>> >
>> > Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
>> > ---
>> >  drivers/gpu/drm/i915/display/intel_tc.c | 5 +++--
>> >  drivers/gpu/drm/i915/display/intel_tc.h | 5 +++--
>> >  2 files changed, 6 insertions(+), 4 deletions(-)
>> >
>> > diff --git a/drivers/gpu/drm/i915/display/intel_tc.c
>> > b/drivers/gpu/drm/i915/display/intel_tc.c
>> > index 1a9dd32fb0a5..e6e6163c1232 100644
>> > --- a/drivers/gpu/drm/i915/display/intel_tc.c
>> > +++ b/drivers/gpu/drm/i915/display/intel_tc.c
>> > @@ -3,10 +3,11 @@
>> >   * Copyright © 2019 Intel Corporation
>> >   */
>> > +#include "intel_tc.h"
>> > +
>> > +#include "i915_drv.h"
>>
>> this master header will likely include everything, so while
>> your .h is now self-contained, .c remains unclean
>>
>> >  #include "intel_display.h"
>> >  #include "intel_dp_mst.h"
>> > -#include "i915_drv.h"
>> > -#include "intel_tc.h"
>> > static const char *tc_port_mode_name(enum tc_port_mode mode)
>> >  {
>> > diff --git a/drivers/gpu/drm/i915/display/intel_tc.h
>> > b/drivers/gpu/drm/i915/display/intel_tc.h
>> > index 0d8411d4a91d..45ae30537b78 100644
>> > --- a/drivers/gpu/drm/i915/display/intel_tc.h
>> > +++ b/drivers/gpu/drm/i915/display/intel_tc.h
>> > @@ -6,10 +6,11 @@
>> >  #ifndef __INTEL_TC_H__
>> >  #define __INTEL_TC_H__
>> > -#include <linux/types.h>
>> > -#include <linux/mutex.h>
>> >  #include "intel_drv.h"
>>
>> are you sure you want this giant header to be included here?
>> note that it will #include almost everything (i915_drv.h too)
>> and may introduce hard to resolve circular dependencies
>>
>> > +#include <linux/mutex.h>
>>
>> we don't need mutex definitions here in current header file
>>
>> > +#include <linux/types.h>
>> > +
>>
>> so you need only above types.h and then add forward decl for:
>>
>> struct intel_digital_port;
>
> Both the mutex and intel_digital_port definitions are needed by
> intel_tc_port_ref_held() in this header.

oops, sorry, didn't scroll down to see intel_tc_port_ref_held() inline.

but wait, it is used only once in intel_display_power.c so
maybe this inline can be moved to one of the .c file ?

also, maybe it's time to move struct intel_digital_port definition
out of intel_drv.h ?

>
>>
>> >  bool intel_tc_port_connected(struct intel_digital_port *dig_port);
>> >  u32 intel_tc_port_get_lane_mask(struct intel_digital_port *dig_port);
>> >  int intel_tc_port_fia_max_lane_count(struct intel_digital_port
>> > *dig_port);
>> _______________________________________________
>> Intel-gfx mailing list
>> Intel-gfx@lists.freedesktop.org
>> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
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Re: [PATCH 2/4] drm/i915: fix include order in intel_tc.*

[Imre Deak]

On Thu, Jul 04, 2019 at 07:56:09PM +0200, Michal Wajdeczko wrote:
> On Thu, 04 Jul 2019 19:43:12 +0200, Imre Deak <imre.deak@intel.com> wrote:
> 
> > On Thu, Jul 04, 2019 at 07:21:38PM +0200, Michal Wajdeczko wrote:
> > > On Thu, 04 Jul 2019 02:06:47 +0200, Lucas De Marchi
> > > <lucas.demarchi@intel.com> wrote:
> > > 
> > > > Make intel_tc.h the first include so we guarantee it's self-contained.
> > > > Sort the rest. Same principle applies for includes in the header.
> > > >
> > > > Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
> > > > ---
> > > >  drivers/gpu/drm/i915/display/intel_tc.c | 5 +++--
> > > >  drivers/gpu/drm/i915/display/intel_tc.h | 5 +++--
> > > >  2 files changed, 6 insertions(+), 4 deletions(-)
> > > >
> > > > diff --git a/drivers/gpu/drm/i915/display/intel_tc.c
> > > > b/drivers/gpu/drm/i915/display/intel_tc.c
> > > > index 1a9dd32fb0a5..e6e6163c1232 100644
> > > > --- a/drivers/gpu/drm/i915/display/intel_tc.c
> > > > +++ b/drivers/gpu/drm/i915/display/intel_tc.c
> > > > @@ -3,10 +3,11 @@
> > > >   * Copyright © 2019 Intel Corporation
> > > >   */
> > > > +#include "intel_tc.h"
> > > > +
> > > > +#include "i915_drv.h"
> > > 
> > > this master header will likely include everything, so while
> > > your .h is now self-contained, .c remains unclean
> > > 
> > > >  #include "intel_display.h"
> > > >  #include "intel_dp_mst.h"
> > > > -#include "i915_drv.h"
> > > > -#include "intel_tc.h"
> > > > static const char *tc_port_mode_name(enum tc_port_mode mode)
> > > >  {
> > > > diff --git a/drivers/gpu/drm/i915/display/intel_tc.h
> > > > b/drivers/gpu/drm/i915/display/intel_tc.h
> > > > index 0d8411d4a91d..45ae30537b78 100644
> > > > --- a/drivers/gpu/drm/i915/display/intel_tc.h
> > > > +++ b/drivers/gpu/drm/i915/display/intel_tc.h
> > > > @@ -6,10 +6,11 @@
> > > >  #ifndef __INTEL_TC_H__
> > > >  #define __INTEL_TC_H__
> > > > -#include <linux/types.h>
> > > > -#include <linux/mutex.h>
> > > >  #include "intel_drv.h"
> > > 
> > > are you sure you want this giant header to be included here?
> > > note that it will #include almost everything (i915_drv.h too)
> > > and may introduce hard to resolve circular dependencies
> > > 
> > > > +#include <linux/mutex.h>
> > > 
> > > we don't need mutex definitions here in current header file
> > > 
> > > > +#include <linux/types.h>
> > > > +
> > > 
> > > so you need only above types.h and then add forward decl for:
> > > 
> > > struct intel_digital_port;
> > 
> > Both the mutex and intel_digital_port definitions are needed by
> > intel_tc_port_ref_held() in this header.
> 
> oops, sorry, didn't scroll down to see intel_tc_port_ref_held() inline.
> 
> but wait, it is used only once in intel_display_power.c so
> maybe this inline can be moved to one of the .c file ?

Imo a simple function is ok as inline and it should be defined with the
rest of TypeC functions.

> also, maybe it's time to move struct intel_digital_port definition
> out of intel_drv.h ?

Not sure what would be a good division, it's used by a few
platforms/output types. But yea, sounds like a good idea as a follow-up.

>
> > > 
> > > >  bool intel_tc_port_connected(struct intel_digital_port *dig_port);
> > > >  u32 intel_tc_port_get_lane_mask(struct intel_digital_port *dig_port);
> > > >  int intel_tc_port_fia_max_lane_count(struct intel_digital_port
> > > > *dig_port);
> > > _______________________________________________
> > > Intel-gfx mailing list
> > > Intel-gfx@lists.freedesktop.org
> > > https://lists.freedesktop.org/mailman/listinfo/intel-gfx
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Re: [PATCH 2/4] drm/i915: fix include order in intel_tc.*

[Lucas De Marchi]

On Thu, Jul 04, 2019 at 07:21:38PM +0200, Michal Wajdeczko wrote:
>On Thu, 04 Jul 2019 02:06:47 +0200, Lucas De Marchi 
><lucas.demarchi@intel.com> wrote:
>
>>Make intel_tc.h the first include so we guarantee it's self-contained.
>>Sort the rest. Same principle applies for includes in the header.
>>
>>Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
>>---
>> drivers/gpu/drm/i915/display/intel_tc.c | 5 +++--
>> drivers/gpu/drm/i915/display/intel_tc.h | 5 +++--
>> 2 files changed, 6 insertions(+), 4 deletions(-)
>>
>>diff --git a/drivers/gpu/drm/i915/display/intel_tc.c 
>>b/drivers/gpu/drm/i915/display/intel_tc.c
>>index 1a9dd32fb0a5..e6e6163c1232 100644
>>--- a/drivers/gpu/drm/i915/display/intel_tc.c
>>+++ b/drivers/gpu/drm/i915/display/intel_tc.c
>>@@ -3,10 +3,11 @@
>>  * Copyright © 2019 Intel Corporation
>>  */
>>+#include "intel_tc.h"
>>+
>>+#include "i915_drv.h"
>
>this master header will likely include everything, so while
>your .h is now self-contained, .c remains unclean

there are 2 different concepts on header organization:
1) being self-contained and 2) include-what-you-use

(2) is not done by this patch... i915_drv.h was already there,
just in the wrong position.

Lucas De Marchi

>
>> #include "intel_display.h"
>> #include "intel_dp_mst.h"
>>-#include "i915_drv.h"
>>-#include "intel_tc.h"
>>static const char *tc_port_mode_name(enum tc_port_mode mode)
>> {
>>diff --git a/drivers/gpu/drm/i915/display/intel_tc.h 
>>b/drivers/gpu/drm/i915/display/intel_tc.h
>>index 0d8411d4a91d..45ae30537b78 100644
>>--- a/drivers/gpu/drm/i915/display/intel_tc.h
>>+++ b/drivers/gpu/drm/i915/display/intel_tc.h
>>@@ -6,10 +6,11 @@
>> #ifndef __INTEL_TC_H__
>> #define __INTEL_TC_H__
>>-#include <linux/types.h>
>>-#include <linux/mutex.h>
>> #include "intel_drv.h"
>
>are you sure you want this giant header to be included here?
>note that it will #include almost everything (i915_drv.h too)
>and may introduce hard to resolve circular dependencies
>
>>+#include <linux/mutex.h>
>
>we don't need mutex definitions here in current header file
>
>>+#include <linux/types.h>
>>+
>
>so you need only above types.h and then add forward decl for:
>
>struct intel_digital_port;
>
>> bool intel_tc_port_connected(struct intel_digital_port *dig_port);
>> u32 intel_tc_port_get_lane_mask(struct intel_digital_port *dig_port);
>> int intel_tc_port_fia_max_lane_count(struct intel_digital_port 
>>*dig_port);
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[PATCH 3/4] drm/i915: move intel_ddi_set_fia_lane_count to intel_tc.c

[Lucas De Marchi]

PORT_TX_DFLEXDPMLE1 is a FIA register so move it to intel_tc.c where we
access other FIA registers. In Tiger Lake we have multiple/modular FIAs
so it makes sense to start moving all access to their registers to a
common place.

While at it, make it clear that we will only ever call this function
for ports with TC phy. Previously we were relying on tc_mode being
TC_PORT_TBT_ALT for combo phy ports. However it's confusing since in
this same function we have checks for is_tc_port. Also, if we manage to
make each phy access only their own field, we may in future add them as
a union inside intel_digital_port.

Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
---
 drivers/gpu/drm/i915/display/intel_ddi.c | 49 ++++--------------------
 drivers/gpu/drm/i915/display/intel_tc.c  | 31 +++++++++++++++
 drivers/gpu/drm/i915/display/intel_tc.h  |  2 +
 3 files changed, 40 insertions(+), 42 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
index a4172595c8d8..f6d60b71da7a 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -3594,37 +3594,6 @@ static void intel_ddi_update_pipe(struct intel_encoder *encoder,
 		intel_hdcp_disable(to_intel_connector(conn_state->connector));
 }
 
-static void intel_ddi_set_fia_lane_count(struct intel_encoder *encoder,
-					 const struct intel_crtc_state *pipe_config,
-					 enum port port)
-{
-	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
-	struct intel_digital_port *dig_port = enc_to_dig_port(&encoder->base);
-	enum tc_port tc_port = intel_port_to_tc(dev_priv, port);
-	u32 val = I915_READ(PORT_TX_DFLEXDPMLE1);
-	bool lane_reversal = dig_port->saved_port_bits & DDI_BUF_PORT_REVERSAL;
-
-	WARN_ON(lane_reversal && dig_port->tc_mode != TC_PORT_LEGACY);
-
-	val &= ~DFLEXDPMLE1_DPMLETC_MASK(tc_port);
-	switch (pipe_config->lane_count) {
-	case 1:
-		val |= (lane_reversal) ? DFLEXDPMLE1_DPMLETC_ML3(tc_port) :
-		DFLEXDPMLE1_DPMLETC_ML0(tc_port);
-		break;
-	case 2:
-		val |= (lane_reversal) ? DFLEXDPMLE1_DPMLETC_ML3_2(tc_port) :
-		DFLEXDPMLE1_DPMLETC_ML1_0(tc_port);
-		break;
-	case 4:
-		val |= DFLEXDPMLE1_DPMLETC_ML3_0(tc_port);
-		break;
-	default:
-		MISSING_CASE(pipe_config->lane_count);
-	}
-	I915_WRITE(PORT_TX_DFLEXDPMLE1, val);
-}
-
 static void
 intel_ddi_update_prepare(struct intel_atomic_state *state,
 			 struct intel_encoder *encoder,
@@ -3657,7 +3626,6 @@ intel_ddi_pre_pll_enable(struct intel_encoder *encoder,
 	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
 	struct intel_digital_port *dig_port = enc_to_dig_port(&encoder->base);
 	bool is_tc_port = intel_port_is_tc(dev_priv, encoder->port);
-	enum port port = encoder->port;
 
 	if (is_tc_port)
 		intel_tc_port_get_link(dig_port, crtc_state->lane_count);
@@ -3666,18 +3634,15 @@ intel_ddi_pre_pll_enable(struct intel_encoder *encoder,
 		intel_display_power_get(dev_priv,
 					intel_ddi_main_link_aux_domain(dig_port));
 
-	if (IS_GEN9_LP(dev_priv))
+	if (is_tc_port && dig_port->tc_mode != TC_PORT_TBT_ALT)
+		/*
+		 * Program the lane count for static/dynamic connections on
+		 * Type-C ports.  Skip this step for TBT.
+		 */
+		intel_tc_port_set_fia_lane_count(dig_port, crtc_state->lane_count);
+	else if (IS_GEN9_LP(dev_priv))
 		bxt_ddi_phy_set_lane_optim_mask(encoder,
 						crtc_state->lane_lat_optim_mask);
-
-	/*
-	 * Program the lane count for static/dynamic connections on Type-C ports.
-	 * Skip this step for TBT.
-	 */
-	if (dig_port->tc_mode == TC_PORT_TBT_ALT)
-		return;
-
-	intel_ddi_set_fia_lane_count(encoder, crtc_state, port);
 }
 
 static void
diff --git a/drivers/gpu/drm/i915/display/intel_tc.c b/drivers/gpu/drm/i915/display/intel_tc.c
index e6e6163c1232..ba6932f48e90 100644
--- a/drivers/gpu/drm/i915/display/intel_tc.c
+++ b/drivers/gpu/drm/i915/display/intel_tc.c
@@ -68,6 +68,37 @@ int intel_tc_port_fia_max_lane_count(struct intel_digital_port *dig_port)
 	}
 }
 
+void intel_tc_port_set_fia_lane_count(struct intel_digital_port *dig_port,
+				      int required_lanes)
+{
+	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
+	enum tc_port tc_port = intel_port_to_tc(i915, dig_port->base.port);
+	bool lane_reversal = dig_port->saved_port_bits & DDI_BUF_PORT_REVERSAL;
+	struct intel_uncore *uncore = &i915->uncore;
+	u32 val = intel_uncore_read(uncore, PORT_TX_DFLEXDPMLE1);
+
+	WARN_ON(lane_reversal && dig_port->tc_mode != TC_PORT_LEGACY);
+
+	val &= ~DFLEXDPMLE1_DPMLETC_MASK(tc_port);
+	switch (required_lanes) {
+	case 1:
+		val |= (lane_reversal) ? DFLEXDPMLE1_DPMLETC_ML3(tc_port) :
+		DFLEXDPMLE1_DPMLETC_ML0(tc_port);
+		break;
+	case 2:
+		val |= (lane_reversal) ? DFLEXDPMLE1_DPMLETC_ML3_2(tc_port) :
+		DFLEXDPMLE1_DPMLETC_ML1_0(tc_port);
+		break;
+	case 4:
+		val |= DFLEXDPMLE1_DPMLETC_ML3_0(tc_port);
+		break;
+	default:
+		MISSING_CASE(required_lanes);
+	}
+
+	intel_uncore_write(uncore, PORT_TX_DFLEXDPMLE1, val);
+}
+
 static void tc_port_fixup_legacy_flag(struct intel_digital_port *dig_port,
 				      u32 live_status_mask)
 {
diff --git a/drivers/gpu/drm/i915/display/intel_tc.h b/drivers/gpu/drm/i915/display/intel_tc.h
index 45ae30537b78..df4d97971354 100644
--- a/drivers/gpu/drm/i915/display/intel_tc.h
+++ b/drivers/gpu/drm/i915/display/intel_tc.h
@@ -14,6 +14,8 @@
 bool intel_tc_port_connected(struct intel_digital_port *dig_port);
 u32 intel_tc_port_get_lane_mask(struct intel_digital_port *dig_port);
 int intel_tc_port_fia_max_lane_count(struct intel_digital_port *dig_port);
+void intel_tc_port_set_fia_lane_count(struct intel_digital_port *dig_port,
+				      int required_lanes);
 
 void intel_tc_port_sanitize(struct intel_digital_port *dig_port);
 void intel_tc_port_lock(struct intel_digital_port *dig_port);
-- 
2.21.0

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Re: [PATCH 3/4] drm/i915: move intel_ddi_set_fia_lane_count to intel_tc.c

[Imre Deak]

On Wed, Jul 03, 2019 at 05:06:48PM -0700, Lucas De Marchi wrote:
> PORT_TX_DFLEXDPMLE1 is a FIA register so move it to intel_tc.c where we
> access other FIA registers. In Tiger Lake we have multiple/modular FIAs
> so it makes sense to start moving all access to their registers to a
> common place.
> 
> While at it, make it clear that we will only ever call this function
> for ports with TC phy. Previously we were relying on tc_mode being
> TC_PORT_TBT_ALT for combo phy ports. However it's confusing since in
> this same function we have checks for is_tc_port. Also, if we manage to
> make each phy access only their own field, we may in future add them as
> a union inside intel_digital_port.
> 
> Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_ddi.c | 49 ++++--------------------
>  drivers/gpu/drm/i915/display/intel_tc.c  | 31 +++++++++++++++
>  drivers/gpu/drm/i915/display/intel_tc.h  |  2 +
>  3 files changed, 40 insertions(+), 42 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
> index a4172595c8d8..f6d60b71da7a 100644
> --- a/drivers/gpu/drm/i915/display/intel_ddi.c
> +++ b/drivers/gpu/drm/i915/display/intel_ddi.c
> @@ -3594,37 +3594,6 @@ static void intel_ddi_update_pipe(struct intel_encoder *encoder,
>  		intel_hdcp_disable(to_intel_connector(conn_state->connector));
>  }
>  
> -static void intel_ddi_set_fia_lane_count(struct intel_encoder *encoder,
> -					 const struct intel_crtc_state *pipe_config,
> -					 enum port port)
> -{
> -	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
> -	struct intel_digital_port *dig_port = enc_to_dig_port(&encoder->base);
> -	enum tc_port tc_port = intel_port_to_tc(dev_priv, port);
> -	u32 val = I915_READ(PORT_TX_DFLEXDPMLE1);
> -	bool lane_reversal = dig_port->saved_port_bits & DDI_BUF_PORT_REVERSAL;
> -
> -	WARN_ON(lane_reversal && dig_port->tc_mode != TC_PORT_LEGACY);
> -
> -	val &= ~DFLEXDPMLE1_DPMLETC_MASK(tc_port);
> -	switch (pipe_config->lane_count) {
> -	case 1:
> -		val |= (lane_reversal) ? DFLEXDPMLE1_DPMLETC_ML3(tc_port) :
> -		DFLEXDPMLE1_DPMLETC_ML0(tc_port);
> -		break;
> -	case 2:
> -		val |= (lane_reversal) ? DFLEXDPMLE1_DPMLETC_ML3_2(tc_port) :
> -		DFLEXDPMLE1_DPMLETC_ML1_0(tc_port);
> -		break;
> -	case 4:
> -		val |= DFLEXDPMLE1_DPMLETC_ML3_0(tc_port);
> -		break;
> -	default:
> -		MISSING_CASE(pipe_config->lane_count);
> -	}
> -	I915_WRITE(PORT_TX_DFLEXDPMLE1, val);
> -}
> -
>  static void
>  intel_ddi_update_prepare(struct intel_atomic_state *state,
>  			 struct intel_encoder *encoder,
> @@ -3657,7 +3626,6 @@ intel_ddi_pre_pll_enable(struct intel_encoder *encoder,
>  	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
>  	struct intel_digital_port *dig_port = enc_to_dig_port(&encoder->base);
>  	bool is_tc_port = intel_port_is_tc(dev_priv, encoder->port);
> -	enum port port = encoder->port;
>  
>  	if (is_tc_port)
>  		intel_tc_port_get_link(dig_port, crtc_state->lane_count);
> @@ -3666,18 +3634,15 @@ intel_ddi_pre_pll_enable(struct intel_encoder *encoder,
>  		intel_display_power_get(dev_priv,
>  					intel_ddi_main_link_aux_domain(dig_port));
>  
> -	if (IS_GEN9_LP(dev_priv))
> +	if (is_tc_port && dig_port->tc_mode != TC_PORT_TBT_ALT)
> +		/*
> +		 * Program the lane count for static/dynamic connections on
> +		 * Type-C ports.  Skip this step for TBT.
> +		 */
> +		intel_tc_port_set_fia_lane_count(dig_port, crtc_state->lane_count);
> +	else if (IS_GEN9_LP(dev_priv))
>  		bxt_ddi_phy_set_lane_optim_mask(encoder,
>  						crtc_state->lane_lat_optim_mask);
> -
> -	/*
> -	 * Program the lane count for static/dynamic connections on Type-C ports.
> -	 * Skip this step for TBT.
> -	 */
> -	if (dig_port->tc_mode == TC_PORT_TBT_ALT)
> -		return;
> -
> -	intel_ddi_set_fia_lane_count(encoder, crtc_state, port);
>  }
>  
>  static void
> diff --git a/drivers/gpu/drm/i915/display/intel_tc.c b/drivers/gpu/drm/i915/display/intel_tc.c
> index e6e6163c1232..ba6932f48e90 100644
> --- a/drivers/gpu/drm/i915/display/intel_tc.c
> +++ b/drivers/gpu/drm/i915/display/intel_tc.c
> @@ -68,6 +68,37 @@ int intel_tc_port_fia_max_lane_count(struct intel_digital_port *dig_port)
>  	}
>  }
>  
> +void intel_tc_port_set_fia_lane_count(struct intel_digital_port *dig_port,
> +				      int required_lanes)
> +{
> +	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
> +	enum tc_port tc_port = intel_port_to_tc(i915, dig_port->base.port);
> +	bool lane_reversal = dig_port->saved_port_bits & DDI_BUF_PORT_REVERSAL;
> +	struct intel_uncore *uncore = &i915->uncore;
> +	u32 val = intel_uncore_read(uncore, PORT_TX_DFLEXDPMLE1);

The rule I follow now is not to do reg read/writes in the declaration
part, based on Jani's suggestion. Could fix that too while at it.

> +
> +	WARN_ON(lane_reversal && dig_port->tc_mode != TC_PORT_LEGACY);
> +
> +	val &= ~DFLEXDPMLE1_DPMLETC_MASK(tc_port);
> +	switch (required_lanes) {
> +	case 1:
> +		val |= (lane_reversal) ? DFLEXDPMLE1_DPMLETC_ML3(tc_port) :
> +		DFLEXDPMLE1_DPMLETC_ML0(tc_port);
> +		break;
> +	case 2:
> +		val |= (lane_reversal) ? DFLEXDPMLE1_DPMLETC_ML3_2(tc_port) :
> +		DFLEXDPMLE1_DPMLETC_ML1_0(tc_port);

Could fix the indent error while at it?

Reviewed-by: Imre Deak <imre.deak@intel.com>

> +		break;
> +	case 4:
> +		val |= DFLEXDPMLE1_DPMLETC_ML3_0(tc_port);
> +		break;
> +	default:
> +		MISSING_CASE(required_lanes);
> +	}
> +
> +	intel_uncore_write(uncore, PORT_TX_DFLEXDPMLE1, val);
> +}
> +
>  static void tc_port_fixup_legacy_flag(struct intel_digital_port *dig_port,
>  				      u32 live_status_mask)
>  {
> diff --git a/drivers/gpu/drm/i915/display/intel_tc.h b/drivers/gpu/drm/i915/display/intel_tc.h
> index 45ae30537b78..df4d97971354 100644
> --- a/drivers/gpu/drm/i915/display/intel_tc.h
> +++ b/drivers/gpu/drm/i915/display/intel_tc.h
> @@ -14,6 +14,8 @@
>  bool intel_tc_port_connected(struct intel_digital_port *dig_port);
>  u32 intel_tc_port_get_lane_mask(struct intel_digital_port *dig_port);
>  int intel_tc_port_fia_max_lane_count(struct intel_digital_port *dig_port);
> +void intel_tc_port_set_fia_lane_count(struct intel_digital_port *dig_port,
> +				      int required_lanes);
>  
>  void intel_tc_port_sanitize(struct intel_digital_port *dig_port);
>  void intel_tc_port_lock(struct intel_digital_port *dig_port);
> -- 
> 2.21.0
> 
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[PATCH 4/4] drm/i915: Add modular FIA

[Lucas De Marchi]

From: Anusha Srivatsa <anusha.srivatsa@intel.com>

Some platforms may have Modular FIA. If Modular FIA is used in the SOC,
then Display Driver will access the additional instances of
FIA based on pre-assigned offset in GTTMADDR space.

Each Modular FIA instance has its own IOSF Sideband Port ID
and it houses only 2 Type-C Port. In SOC that has more than
two Type-C Ports, there are multiple instances of Modular FIA.
Gunit will need to use different destination ID when it access
different pair of Type-C Port.

The DFLEXDPSP register has Modular FIA bit starting on Tiger Lake.  If
Modular FIA is used in the SOC, this register bit exists in all the
instances of Modular FIA. IOM FW is required to program only the MF bit
in first FIA instance that houses the Type-C Port 0 and Port 1, for
Display Driver to read from.

v2 (Lucas):
  - Move all accesses to FIA to be contained in intel_tc.c, along with
    display_fia that is now called tc_phy_fia
  - Save the fia instance number on intel_digital_port, so we don't have
    to query if modular FIA is used on every access

Cc: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
---
 drivers/gpu/drm/i915/display/intel_tc.c  | 48 ++++++++++++++++++++----
 drivers/gpu/drm/i915/i915_reg.h          | 13 +++++--
 drivers/gpu/drm/i915/intel_device_info.h |  1 +
 drivers/gpu/drm/i915/intel_drv.h         |  1 +
 4 files changed, 51 insertions(+), 12 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_tc.c b/drivers/gpu/drm/i915/display/intel_tc.c
index ba6932f48e90..4060b8c8c6f3 100644
--- a/drivers/gpu/drm/i915/display/intel_tc.c
+++ b/drivers/gpu/drm/i915/display/intel_tc.c
@@ -9,6 +9,12 @@
 #include "intel_display.h"
 #include "intel_dp_mst.h"
 
+enum phy_fia {
+	FIA1,
+	FIA2,
+	FIA3,
+};
+
 static const char *tc_port_mode_name(enum tc_port_mode mode)
 {
 	static const char * const names[] = {
@@ -23,6 +29,23 @@ static const char *tc_port_mode_name(enum tc_port_mode mode)
 	return names[mode];
 }
 
+static bool has_modular_fia(struct drm_i915_private *i915)
+{
+	if (!INTEL_INFO(i915)->display.has_modular_fia)
+		return false;
+
+	return intel_uncore_read(&i915->uncore,
+				 PORT_TX_DFLEXDPSP(FIA1)) & MODULAR_FIA_MASK;
+}
+
+enum phy_fia tc_port_to_fia(struct drm_i915_private *i915, enum tc_port tc_port)
+{
+	if (!has_modular_fia(i915))
+		return FIA1;
+
+	return tc_port / 2;
+}
+
 u32 intel_tc_port_get_lane_mask(struct intel_digital_port *dig_port)
 {
 	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
@@ -30,7 +53,8 @@ u32 intel_tc_port_get_lane_mask(struct intel_digital_port *dig_port)
 	struct intel_uncore *uncore = &i915->uncore;
 	u32 lane_mask;
 
-	lane_mask = intel_uncore_read(uncore, PORT_TX_DFLEXDPSP);
+	lane_mask = intel_uncore_read(uncore,
+				      PORT_TX_DFLEXDPSP(dig_port->tc_phy_fia));
 
 	WARN_ON(lane_mask == 0xffffffff);
 
@@ -75,7 +99,8 @@ void intel_tc_port_set_fia_lane_count(struct intel_digital_port *dig_port,
 	enum tc_port tc_port = intel_port_to_tc(i915, dig_port->base.port);
 	bool lane_reversal = dig_port->saved_port_bits & DDI_BUF_PORT_REVERSAL;
 	struct intel_uncore *uncore = &i915->uncore;
-	u32 val = intel_uncore_read(uncore, PORT_TX_DFLEXDPMLE1);
+	u32 val = intel_uncore_read(uncore,
+				    PORT_TX_DFLEXDPMLE1(dig_port->tc_phy_fia));
 
 	WARN_ON(lane_reversal && dig_port->tc_mode != TC_PORT_LEGACY);
 
@@ -96,7 +121,8 @@ void intel_tc_port_set_fia_lane_count(struct intel_digital_port *dig_port,
 		MISSING_CASE(required_lanes);
 	}
 
-	intel_uncore_write(uncore, PORT_TX_DFLEXDPMLE1, val);
+	intel_uncore_write(uncore,
+			   PORT_TX_DFLEXDPMLE1(dig_port->tc_phy_fia), val);
 }
 
 static void tc_port_fixup_legacy_flag(struct intel_digital_port *dig_port,
@@ -128,7 +154,8 @@ static u32 tc_port_live_status_mask(struct intel_digital_port *dig_port)
 	u32 mask = 0;
 	u32 val;
 
-	val = intel_uncore_read(uncore, PORT_TX_DFLEXDPSP);
+	val = intel_uncore_read(uncore,
+				PORT_TX_DFLEXDPSP(dig_port->tc_phy_fia));
 
 	if (val == 0xffffffff) {
 		DRM_DEBUG_KMS("Port %s: PHY in TCCOLD, nothing connected\n",
@@ -158,7 +185,8 @@ static bool icl_tc_phy_status_complete(struct intel_digital_port *dig_port)
 	struct intel_uncore *uncore = &i915->uncore;
 	u32 val;
 
-	val = intel_uncore_read(uncore, PORT_TX_DFLEXDPPMS);
+	val = intel_uncore_read(uncore,
+				PORT_TX_DFLEXDPPMS(dig_port->tc_phy_fia));
 	if (val == 0xffffffff) {
 		DRM_DEBUG_KMS("Port %s: PHY in TCCOLD, assuming not complete\n",
 			      dig_port->tc_port_name);
@@ -176,7 +204,8 @@ static bool icl_tc_phy_set_safe_mode(struct intel_digital_port *dig_port,
 	struct intel_uncore *uncore = &i915->uncore;
 	u32 val;
 
-	val = intel_uncore_read(uncore, PORT_TX_DFLEXDPCSSS);
+	val = intel_uncore_read(uncore,
+				PORT_TX_DFLEXDPCSSS(dig_port->tc_phy_fia));
 	if (val == 0xffffffff) {
 		DRM_DEBUG_KMS("Port %s: PHY in TCCOLD, can't set safe-mode to %s\n",
 			      dig_port->tc_port_name,
@@ -189,7 +218,8 @@ static bool icl_tc_phy_set_safe_mode(struct intel_digital_port *dig_port,
 	if (!enable)
 		val |= DP_PHY_MODE_STATUS_NOT_SAFE(tc_port);
 
-	intel_uncore_write(uncore, PORT_TX_DFLEXDPCSSS, val);
+	intel_uncore_write(uncore,
+			   PORT_TX_DFLEXDPCSSS(dig_port->tc_phy_fia), val);
 
 	if (enable && wait_for(!icl_tc_phy_status_complete(dig_port), 10))
 		DRM_DEBUG_KMS("Port %s: PHY complete clear timed out\n",
@@ -205,7 +235,8 @@ static bool icl_tc_phy_is_in_safe_mode(struct intel_digital_port *dig_port)
 	struct intel_uncore *uncore = &i915->uncore;
 	u32 val;
 
-	val = intel_uncore_read(uncore, PORT_TX_DFLEXDPCSSS);
+	val = intel_uncore_read(uncore,
+				PORT_TX_DFLEXDPCSSS(dig_port->tc_phy_fia));
 	if (val == 0xffffffff) {
 		DRM_DEBUG_KMS("Port %s: PHY in TCCOLD, assume safe mode\n",
 			      dig_port->tc_port_name);
@@ -502,4 +533,5 @@ void intel_tc_port_init(struct intel_digital_port *dig_port, bool is_legacy)
 	mutex_init(&dig_port->tc_lock);
 	dig_port->tc_legacy_port = is_legacy;
 	dig_port->tc_link_refcount = 0;
+	dig_port->tc_phy_fia = tc_port_to_fia(i915, tc_port);
 }
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index c814cc1b3ae5..186e31e0291c 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -2203,9 +2203,13 @@ enum i915_power_well_id {
 #define   DW6_OLDO_DYN_PWR_DOWN_EN	(1 << 28)
 
 #define FIA1_BASE			0x163000
+#define FIA2_BASE			0x16E000
+#define FIA3_BASE			0x16F000
+#define _FIA(fia)			_PICK((fia), FIA1_BASE, FIA2_BASE, FIA3_BASE)
+#define _MMIO_FIA(fia, off)		_MMIO(_FIA(fia) + (off))
 
 /* ICL PHY DFLEX registers */
-#define PORT_TX_DFLEXDPMLE1		_MMIO(FIA1_BASE + 0x008C0)
+#define PORT_TX_DFLEXDPMLE1(fia)	_MMIO_FIA((fia),  0x008C0)
 #define   DFLEXDPMLE1_DPMLETC_MASK(tc_port)	(0xf << (4 * (tc_port)))
 #define   DFLEXDPMLE1_DPMLETC_ML0(tc_port)	(1 << (4 * (tc_port)))
 #define   DFLEXDPMLE1_DPMLETC_ML1_0(tc_port)	(3 << (4 * (tc_port)))
@@ -11463,17 +11467,18 @@ enum skl_power_gate {
 						_ICL_DSC1_RC_BUF_THRESH_1_UDW_PB, \
 						_ICL_DSC1_RC_BUF_THRESH_1_UDW_PC)
 
-#define PORT_TX_DFLEXDPSP			_MMIO(FIA1_BASE + 0x008A0)
+#define PORT_TX_DFLEXDPSP(fia)			_MMIO_FIA((fia), 0x008A0)
+#define   MODULAR_FIA_MASK			(1 << 4)
 #define   TC_LIVE_STATE_TBT(tc_port)		(1 << ((tc_port) * 8 + 6))
 #define   TC_LIVE_STATE_TC(tc_port)		(1 << ((tc_port) * 8 + 5))
 #define   DP_LANE_ASSIGNMENT_SHIFT(tc_port)	((tc_port) * 8)
 #define   DP_LANE_ASSIGNMENT_MASK(tc_port)	(0xf << ((tc_port) * 8))
 #define   DP_LANE_ASSIGNMENT(tc_port, x)	((x) << ((tc_port) * 8))
 
-#define PORT_TX_DFLEXDPPMS				_MMIO(FIA1_BASE + 0x00890)
+#define PORT_TX_DFLEXDPPMS(fia)			_MMIO_FIA((fia), 0x00890)
 #define   DP_PHY_MODE_STATUS_COMPLETED(tc_port)		(1 << (tc_port))
 
-#define PORT_TX_DFLEXDPCSSS			_MMIO(FIA1_BASE + 0x00894)
+#define PORT_TX_DFLEXDPCSSS(fia)		_MMIO_FIA((fia), 0x00894)
 #define   DP_PHY_MODE_STATUS_NOT_SAFE(tc_port)		(1 << (tc_port))
 
 #endif /* _I915_REG_H_ */
diff --git a/drivers/gpu/drm/i915/intel_device_info.h b/drivers/gpu/drm/i915/intel_device_info.h
index ddafc819bf30..e9dc86ed517b 100644
--- a/drivers/gpu/drm/i915/intel_device_info.h
+++ b/drivers/gpu/drm/i915/intel_device_info.h
@@ -136,6 +136,7 @@ enum intel_ppgtt_type {
 	func(has_gmch); \
 	func(has_hotplug); \
 	func(has_ipc); \
+	func(has_modular_fia); \
 	func(has_overlay); \
 	func(has_psr); \
 	func(overlay_needs_physical); \
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index 24c63ed45c6f..7ea979c8c5f7 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -1245,6 +1245,7 @@ struct intel_digital_port {
 	bool tc_legacy_port:1;
 	char tc_port_name[8];
 	enum tc_port_mode tc_mode;
+	u8 tc_phy_fia;
 
 	void (*write_infoframe)(struct intel_encoder *encoder,
 				const struct intel_crtc_state *crtc_state,
-- 
2.21.0

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✗ Fi.CI.SPARSE: warning for Modular FIA

[Patchwork]

== Series Details ==

Series: Modular FIA
URL   : https://patchwork.freedesktop.org/series/63175/
State : warning

== Summary ==

$ dim sparse origin/drm-tip
Sparse version: v0.5.2
Commit: drm/i915: make new intel_tc.c use uncore accessors
Okay!

Commit: drm/i915: fix include order in intel_tc.*
Okay!

Commit: drm/i915: move intel_ddi_set_fia_lane_count to intel_tc.c
Okay!

Commit: drm/i915: Add modular FIA
+drivers/gpu/drm/i915/display/intel_tc.c:41:14: warning: symbol 'tc_port_to_fia' was not declared. Should it be static?

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✓ Fi.CI.BAT: success for Modular FIA

[Patchwork]

== Series Details ==

Series: Modular FIA
URL   : https://patchwork.freedesktop.org/series/63175/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_6405 -> Patchwork_13521
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13521/

Known issues
------------

  Here are the changes found in Patchwork_13521 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@gem_exec_suspend@basic-s3:
    - fi-blb-e6850:       [PASS][1] -> [INCOMPLETE][2] ([fdo#107718])
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6405/fi-blb-e6850/igt@gem_exec_suspend@basic-s3.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13521/fi-blb-e6850/igt@gem_exec_suspend@basic-s3.html

  * igt@kms_chamelium@hdmi-hpd-fast:
    - fi-kbl-7500u:       [PASS][3] -> [FAIL][4] ([fdo#109485])
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6405/fi-kbl-7500u/igt@kms_chamelium@hdmi-hpd-fast.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13521/fi-kbl-7500u/igt@kms_chamelium@hdmi-hpd-fast.html

  
#### Possible fixes ####

  * {igt@gem_ctx_switch@rcs0}:
    - fi-icl-guc:         [INCOMPLETE][5] ([fdo#107713]) -> [PASS][6]
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6405/fi-icl-guc/igt@gem_ctx_switch@rcs0.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13521/fi-icl-guc/igt@gem_ctx_switch@rcs0.html

  * igt@prime_vgem@basic-read:
    - fi-icl-u3:          [DMESG-WARN][7] ([fdo#107724]) -> [PASS][8]
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6405/fi-icl-u3/igt@prime_vgem@basic-read.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13521/fi-icl-u3/igt@prime_vgem@basic-read.html

  
#### Warnings ####

  * igt@kms_chamelium@hdmi-crc-fast:
    - fi-icl-dsi:         [SKIP][9] ([fdo#109284]) -> [INCOMPLETE][10] ([fdo#107713])
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6405/fi-icl-dsi/igt@kms_chamelium@hdmi-crc-fast.html
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13521/fi-icl-dsi/igt@kms_chamelium@hdmi-crc-fast.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#102505]: https://bugs.freedesktop.org/show_bug.cgi?id=102505
  [fdo#105602]: https://bugs.freedesktop.org/show_bug.cgi?id=105602
  [fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713
  [fdo#107718]: https://bugs.freedesktop.org/show_bug.cgi?id=107718
  [fdo#107724]: https://bugs.freedesktop.org/show_bug.cgi?id=107724
  [fdo#109284]: https://bugs.freedesktop.org/show_bug.cgi?id=109284
  [fdo#109485]: https://bugs.freedesktop.org/show_bug.cgi?id=109485
  [fdo#110566]: https://bugs.freedesktop.org/show_bug.cgi?id=110566
  [fdo#111045]: https://bugs.freedesktop.org/show_bug.cgi?id=111045
  [fdo#111049]: https://bugs.freedesktop.org/show_bug.cgi?id=111049


Participating hosts (53 -> 47)
------------------------------

  Additional (2): fi-hsw-4770r fi-cml-u2 
  Missing    (8): fi-kbl-soraka fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-icl-y fi-byt-clapper fi-bdw-samus 


Build changes
-------------

  * Linux: CI_DRM_6405 -> Patchwork_13521

  CI_DRM_6405: d395f3e20d154dfeabb95117f388f2e953c12ac9 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_5082: f7c51e6fbf8da0784b64a1edaee5266aa9b9f829 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_13521: 322b0bdf15e3285d636851db7177c55a07400e60 @ git://anongit.freedesktop.org/gfx-ci/linux


== Kernel 32bit build ==

Warning: Kernel 32bit buildtest failed:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13521/build_32bit.log

  CALL    scripts/checksyscalls.sh
  CALL    scripts/atomic/check-atomics.sh
  CHK     include/generated/compile.h
Kernel: arch/x86/boot/bzImage is ready  (#1)
  Building modules, stage 2.
  MODPOST 112 modules
ERROR: "__udivdi3" [drivers/gpu/drm/amd/amdgpu/amdgpu.ko] undefined!
ERROR: "__divdi3" [drivers/gpu/drm/amd/amdgpu/amdgpu.ko] undefined!
scripts/Makefile.modpost:91: recipe for target '__modpost' failed
make[1]: *** [__modpost] Error 1
Makefile:1287: recipe for target 'modules' failed
make: *** [modules] Error 2


== Linux commits ==

322b0bdf15e3 drm/i915: Add modular FIA
aec84a06b507 drm/i915: move intel_ddi_set_fia_lane_count to intel_tc.c
964106f003f2 drm/i915: fix include order in intel_tc.*
1324062349e5 drm/i915: make new intel_tc.c use uncore accessors

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13521/
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

✓ Fi.CI.IGT: success for Modular FIA

[Patchwork]

== Series Details ==

Series: Modular FIA
URL   : https://patchwork.freedesktop.org/series/63175/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_6405_full -> Patchwork_13521_full
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  

Known issues
------------

  Here are the changes found in Patchwork_13521_full that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@gem_busy@close-race:
    - shard-skl:          [PASS][1] -> [DMESG-FAIL][2] ([fdo#111063])
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6405/shard-skl8/igt@gem_busy@close-race.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13521/shard-skl9/igt@gem_busy@close-race.html
    - shard-iclb:         [PASS][3] -> [DMESG-FAIL][4] ([fdo#111063])
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6405/shard-iclb6/igt@gem_busy@close-race.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13521/shard-iclb2/igt@gem_busy@close-race.html

  * igt@gem_exec_balancer@smoke:
    - shard-iclb:         [PASS][5] -> [SKIP][6] ([fdo#110854])
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6405/shard-iclb4/igt@gem_exec_balancer@smoke.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13521/shard-iclb6/igt@gem_exec_balancer@smoke.html

  * igt@gem_pwrite@big-cpu-forwards:
    - shard-apl:          [PASS][7] -> [INCOMPLETE][8] ([fdo#103927])
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6405/shard-apl5/igt@gem_pwrite@big-cpu-forwards.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13521/shard-apl8/igt@gem_pwrite@big-cpu-forwards.html

  * igt@gem_workarounds@suspend-resume-context:
    - shard-apl:          [PASS][9] -> [DMESG-WARN][10] ([fdo#108566]) +1 similar issue
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6405/shard-apl6/igt@gem_workarounds@suspend-resume-context.html
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13521/shard-apl3/igt@gem_workarounds@suspend-resume-context.html

  * igt@i915_selftest@mock_fence:
    - shard-iclb:         [PASS][11] -> [INCOMPLETE][12] ([fdo#107713])
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6405/shard-iclb6/igt@i915_selftest@mock_fence.html
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13521/shard-iclb7/igt@i915_selftest@mock_fence.html

  * igt@kms_cursor_legacy@2x-long-cursor-vs-flip-atomic:
    - shard-hsw:          [PASS][13] -> [FAIL][14] ([fdo#105767])
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6405/shard-hsw5/igt@kms_cursor_legacy@2x-long-cursor-vs-flip-atomic.html
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13521/shard-hsw8/igt@kms_cursor_legacy@2x-long-cursor-vs-flip-atomic.html

  * igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-shrfb-plflip-blt:
    - shard-iclb:         [PASS][15] -> [FAIL][16] ([fdo#103167]) +5 similar issues
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6405/shard-iclb2/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-shrfb-plflip-blt.html
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13521/shard-iclb6/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-shrfb-plflip-blt.html

  * igt@kms_plane_alpha_blend@pipe-b-coverage-7efc:
    - shard-skl:          [PASS][17] -> [FAIL][18] ([fdo#108145] / [fdo#110403])
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6405/shard-skl10/igt@kms_plane_alpha_blend@pipe-b-coverage-7efc.html
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13521/shard-skl1/igt@kms_plane_alpha_blend@pipe-b-coverage-7efc.html

  * igt@kms_plane_alpha_blend@pipe-c-constant-alpha-min:
    - shard-skl:          [PASS][19] -> [FAIL][20] ([fdo#108145])
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6405/shard-skl8/igt@kms_plane_alpha_blend@pipe-c-constant-alpha-min.html
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13521/shard-skl8/igt@kms_plane_alpha_blend@pipe-c-constant-alpha-min.html

  * igt@kms_psr@psr2_primary_mmap_cpu:
    - shard-iclb:         [PASS][21] -> [SKIP][22] ([fdo#109441]) +3 similar issues
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6405/shard-iclb2/igt@kms_psr@psr2_primary_mmap_cpu.html
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13521/shard-iclb3/igt@kms_psr@psr2_primary_mmap_cpu.html

  * igt@kms_setmode@basic:
    - shard-apl:          [PASS][23] -> [FAIL][24] ([fdo#99912])
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6405/shard-apl4/igt@kms_setmode@basic.html
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13521/shard-apl8/igt@kms_setmode@basic.html

  * igt@perf@blocking:
    - shard-skl:          [PASS][25] -> [FAIL][26] ([fdo#110728])
   [25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6405/shard-skl1/igt@perf@blocking.html
   [26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13521/shard-skl10/igt@perf@blocking.html

  
#### Possible fixes ####

  * igt@gem_eio@in-flight-suspend:
    - shard-apl:          [DMESG-WARN][27] ([fdo#108566]) -> [PASS][28] +2 similar issues
   [27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6405/shard-apl5/igt@gem_eio@in-flight-suspend.html
   [28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13521/shard-apl6/igt@gem_eio@in-flight-suspend.html

  * igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-shrfb-draw-pwrite:
    - shard-iclb:         [FAIL][29] ([fdo#103167]) -> [PASS][30] +1 similar issue
   [29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6405/shard-iclb6/igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-shrfb-draw-pwrite.html
   [30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13521/shard-iclb8/igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-shrfb-draw-pwrite.html

  * igt@kms_plane_alpha_blend@pipe-c-coverage-7efc:
    - shard-skl:          [FAIL][31] ([fdo#108145] / [fdo#110403]) -> [PASS][32]
   [31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6405/shard-skl3/igt@kms_plane_alpha_blend@pipe-c-coverage-7efc.html
   [32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13521/shard-skl9/igt@kms_plane_alpha_blend@pipe-c-coverage-7efc.html

  * igt@kms_psr2_su@frontbuffer:
    - shard-iclb:         [SKIP][33] ([fdo#109642] / [fdo#111068]) -> [PASS][34]
   [33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6405/shard-iclb7/igt@kms_psr2_su@frontbuffer.html
   [34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13521/shard-iclb2/igt@kms_psr2_su@frontbuffer.html

  * igt@kms_psr@psr2_cursor_blt:
    - shard-iclb:         [SKIP][35] ([fdo#109441]) -> [PASS][36] +1 similar issue
   [35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6405/shard-iclb1/igt@kms_psr@psr2_cursor_blt.html
   [36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13521/shard-iclb2/igt@kms_psr@psr2_cursor_blt.html

  * igt@kms_setmode@basic:
    - shard-kbl:          [FAIL][37] ([fdo#99912]) -> [PASS][38]
   [37]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6405/shard-kbl4/igt@kms_setmode@basic.html
   [38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13521/shard-kbl2/igt@kms_setmode@basic.html

  
  [fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167
  [fdo#103927]: https://bugs.freedesktop.org/show_bug.cgi?id=103927
  [fdo#105767]: https://bugs.freedesktop.org/show_bug.cgi?id=105767
  [fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713
  [fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145
  [fdo#108566]: https://bugs.freedesktop.org/show_bug.cgi?id=108566
  [fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441
  [fdo#109642]: https://bugs.freedesktop.org/show_bug.cgi?id=109642
  [fdo#110403]: https://bugs.freedesktop.org/show_bug.cgi?id=110403
  [fdo#110728]: https://bugs.freedesktop.org/show_bug.cgi?id=110728
  [fdo#110854]: https://bugs.freedesktop.org/show_bug.cgi?id=110854
  [fdo#111063]: https://bugs.freedesktop.org/show_bug.cgi?id=111063
  [fdo#111068]: https://bugs.freedesktop.org/show_bug.cgi?id=111068
  [fdo#99912]: https://bugs.freedesktop.org/show_bug.cgi?id=99912


Participating hosts (10 -> 10)
------------------------------

  No changes in participating hosts


Build changes
-------------

  * Linux: CI_DRM_6405 -> Patchwork_13521

  CI_DRM_6405: d395f3e20d154dfeabb95117f388f2e953c12ac9 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_5082: f7c51e6fbf8da0784b64a1edaee5266aa9b9f829 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_13521: 322b0bdf15e3285d636851db7177c55a07400e60 @ git://anongit.freedesktop.org/gfx-ci/linux
  piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13521/
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx