* [PATCH 1/2] clk: imx8mq: set correct parent for usb ctrl clocks
@ 2019-07-10 11:19 ` jun.li
0 siblings, 0 replies; 12+ messages in thread
From: jun.li @ 2019-07-10 11:19 UTC (permalink / raw)
To: shawnguo, sboyd, robh+dt
Cc: mark.rutland, peter.chen, agx, ping.bai, Anson.Huang, ccaione,
andrew.smirnov, mturquette, angus, linux-clk, abel.vesa,
devicetree, linux-imx, kernel, l.stach, festevam, s.hauer,
linux-arm-kernel, jun.li
From: Li Jun <jun.li@nxp.com>
Per latest imx8mq datasheet of CCM, the parent of usb1_ctrl_root_clk
and usb2_ctrl_root_clk is usb_bus.
Signed-off-by: Li Jun <jun.li@nxp.com>
---
drivers/clk/imx/clk-imx8mq.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/clk/imx/clk-imx8mq.c b/drivers/clk/imx/clk-imx8mq.c
index d407a07..c7d1546 100644
--- a/drivers/clk/imx/clk-imx8mq.c
+++ b/drivers/clk/imx/clk-imx8mq.c
@@ -523,8 +523,8 @@ static int imx8mq_clocks_probe(struct platform_device *pdev)
clks[IMX8MQ_CLK_UART2_ROOT] = imx_clk_gate4("uart2_root_clk", "uart2", base + 0x44a0, 0);
clks[IMX8MQ_CLK_UART3_ROOT] = imx_clk_gate4("uart3_root_clk", "uart3", base + 0x44b0, 0);
clks[IMX8MQ_CLK_UART4_ROOT] = imx_clk_gate4("uart4_root_clk", "uart4", base + 0x44c0, 0);
- clks[IMX8MQ_CLK_USB1_CTRL_ROOT] = imx_clk_gate4("usb1_ctrl_root_clk", "usb_core_ref", base + 0x44d0, 0);
- clks[IMX8MQ_CLK_USB2_CTRL_ROOT] = imx_clk_gate4("usb2_ctrl_root_clk", "usb_core_ref", base + 0x44e0, 0);
+ clks[IMX8MQ_CLK_USB1_CTRL_ROOT] = imx_clk_gate4("usb1_ctrl_root_clk", "usb_bus", base + 0x44d0, 0);
+ clks[IMX8MQ_CLK_USB2_CTRL_ROOT] = imx_clk_gate4("usb2_ctrl_root_clk", "usb_bus", base + 0x44e0, 0);
clks[IMX8MQ_CLK_USB1_PHY_ROOT] = imx_clk_gate4("usb1_phy_root_clk", "usb_phy_ref", base + 0x44f0, 0);
clks[IMX8MQ_CLK_USB2_PHY_ROOT] = imx_clk_gate4("usb2_phy_root_clk", "usb_phy_ref", base + 0x4500, 0);
clks[IMX8MQ_CLK_USDHC1_ROOT] = imx_clk_gate4("usdhc1_root_clk", "usdhc1", base + 0x4510, 0);
--
2.7.4
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 12+ messages in thread* [PATCH 1/2] clk: imx8mq: set correct parent for usb ctrl clocks
@ 2019-07-10 11:19 ` jun.li
0 siblings, 0 replies; 12+ messages in thread
From: jun.li @ 2019-07-10 11:19 UTC (permalink / raw)
To: shawnguo, sboyd, robh+dt
Cc: mark.rutland, s.hauer, kernel, festevam, linux-imx, mturquette,
peter.chen, ping.bai, jun.li, Anson.Huang, l.stach, abel.vesa,
andrew.smirnov, ccaione, angus, agx, devicetree,
linux-arm-kernel, linux-clk
From: Li Jun <jun.li@nxp.com>
Per latest imx8mq datasheet of CCM, the parent of usb1_ctrl_root_clk
and usb2_ctrl_root_clk is usb_bus.
Signed-off-by: Li Jun <jun.li@nxp.com>
---
drivers/clk/imx/clk-imx8mq.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/clk/imx/clk-imx8mq.c b/drivers/clk/imx/clk-imx8mq.c
index d407a07..c7d1546 100644
--- a/drivers/clk/imx/clk-imx8mq.c
+++ b/drivers/clk/imx/clk-imx8mq.c
@@ -523,8 +523,8 @@ static int imx8mq_clocks_probe(struct platform_device *pdev)
clks[IMX8MQ_CLK_UART2_ROOT] = imx_clk_gate4("uart2_root_clk", "uart2", base + 0x44a0, 0);
clks[IMX8MQ_CLK_UART3_ROOT] = imx_clk_gate4("uart3_root_clk", "uart3", base + 0x44b0, 0);
clks[IMX8MQ_CLK_UART4_ROOT] = imx_clk_gate4("uart4_root_clk", "uart4", base + 0x44c0, 0);
- clks[IMX8MQ_CLK_USB1_CTRL_ROOT] = imx_clk_gate4("usb1_ctrl_root_clk", "usb_core_ref", base + 0x44d0, 0);
- clks[IMX8MQ_CLK_USB2_CTRL_ROOT] = imx_clk_gate4("usb2_ctrl_root_clk", "usb_core_ref", base + 0x44e0, 0);
+ clks[IMX8MQ_CLK_USB1_CTRL_ROOT] = imx_clk_gate4("usb1_ctrl_root_clk", "usb_bus", base + 0x44d0, 0);
+ clks[IMX8MQ_CLK_USB2_CTRL_ROOT] = imx_clk_gate4("usb2_ctrl_root_clk", "usb_bus", base + 0x44e0, 0);
clks[IMX8MQ_CLK_USB1_PHY_ROOT] = imx_clk_gate4("usb1_phy_root_clk", "usb_phy_ref", base + 0x44f0, 0);
clks[IMX8MQ_CLK_USB2_PHY_ROOT] = imx_clk_gate4("usb2_phy_root_clk", "usb_phy_ref", base + 0x4500, 0);
clks[IMX8MQ_CLK_USDHC1_ROOT] = imx_clk_gate4("usdhc1_root_clk", "usdhc1", base + 0x4510, 0);
--
2.7.4
^ permalink raw reply related [flat|nested] 12+ messages in thread* [PATCH 2/2] arm64: dts: imx8mq: correct usb controller clocks
2019-07-10 11:19 ` jun.li
(?)
@ 2019-07-10 11:19 ` jun.li
-1 siblings, 0 replies; 12+ messages in thread
From: jun.li @ 2019-07-10 11:19 UTC (permalink / raw)
To: shawnguo, sboyd, robh+dt
Cc: mark.rutland, peter.chen, agx, ping.bai, Anson.Huang, ccaione,
andrew.smirnov, mturquette, angus, linux-clk, abel.vesa,
devicetree, linux-imx, kernel, l.stach, festevam, s.hauer,
linux-arm-kernel, jun.li
From: Li Jun <jun.li@nxp.com>
The correct clock for "bus_early", "ref", "suspend" should be:
IMX8MQ_CLK_USB1_CTRL_ROOT, IMX8MQ_CLK_USB_CORE_REF, IMX8MQ_CLK_32K,
especially we may need the right suspend clock rate to set register
in controller driver.
Signed-off-by: Li Jun <jun.li@nxp.com>
---
arch/arm64/boot/dts/freescale/imx8mq.dtsi | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
index d09b808..a43ddac 100644
--- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
@@ -901,9 +901,9 @@
usb_dwc3_0: usb@38100000 {
compatible = "fsl,imx8mq-dwc3", "snps,dwc3";
reg = <0x38100000 0x10000>;
- clocks = <&clk IMX8MQ_CLK_USB_BUS>,
+ clocks = <&clk IMX8MQ_CLK_USB1_CTRL_ROOT>,
<&clk IMX8MQ_CLK_USB_CORE_REF>,
- <&clk IMX8MQ_CLK_USB1_CTRL_ROOT>;
+ <&clk IMX8MQ_CLK_32K>;
clock-names = "bus_early", "ref", "suspend";
assigned-clocks = <&clk IMX8MQ_CLK_USB_BUS>,
<&clk IMX8MQ_CLK_USB_CORE_REF>;
@@ -933,9 +933,9 @@
usb_dwc3_1: usb@38200000 {
compatible = "fsl,imx8mq-dwc3", "snps,dwc3";
reg = <0x38200000 0x10000>;
- clocks = <&clk IMX8MQ_CLK_USB_BUS>,
+ clocks = <&clk IMX8MQ_CLK_USB2_CTRL_ROOT>,
<&clk IMX8MQ_CLK_USB_CORE_REF>,
- <&clk IMX8MQ_CLK_USB2_CTRL_ROOT>;
+ <&clk IMX8MQ_CLK_32K>;
clock-names = "bus_early", "ref", "suspend";
assigned-clocks = <&clk IMX8MQ_CLK_USB_BUS>,
<&clk IMX8MQ_CLK_USB_CORE_REF>;
--
2.7.4
^ permalink raw reply related [flat|nested] 12+ messages in thread* [PATCH 2/2] arm64: dts: imx8mq: correct usb controller clocks
@ 2019-07-10 11:19 ` jun.li
0 siblings, 0 replies; 12+ messages in thread
From: jun.li @ 2019-07-10 11:19 UTC (permalink / raw)
To: shawnguo, sboyd, robh+dt
Cc: mark.rutland, peter.chen, agx, ping.bai, Anson.Huang, ccaione,
andrew.smirnov, mturquette, angus, linux-clk, abel.vesa,
devicetree, linux-imx, kernel, l.stach, festevam, s.hauer,
linux-arm-kernel, jun.li
From: Li Jun <jun.li@nxp.com>
The correct clock for "bus_early", "ref", "suspend" should be:
IMX8MQ_CLK_USB1_CTRL_ROOT, IMX8MQ_CLK_USB_CORE_REF, IMX8MQ_CLK_32K,
especially we may need the right suspend clock rate to set register
in controller driver.
Signed-off-by: Li Jun <jun.li@nxp.com>
---
arch/arm64/boot/dts/freescale/imx8mq.dtsi | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
index d09b808..a43ddac 100644
--- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
@@ -901,9 +901,9 @@
usb_dwc3_0: usb@38100000 {
compatible = "fsl,imx8mq-dwc3", "snps,dwc3";
reg = <0x38100000 0x10000>;
- clocks = <&clk IMX8MQ_CLK_USB_BUS>,
+ clocks = <&clk IMX8MQ_CLK_USB1_CTRL_ROOT>,
<&clk IMX8MQ_CLK_USB_CORE_REF>,
- <&clk IMX8MQ_CLK_USB1_CTRL_ROOT>;
+ <&clk IMX8MQ_CLK_32K>;
clock-names = "bus_early", "ref", "suspend";
assigned-clocks = <&clk IMX8MQ_CLK_USB_BUS>,
<&clk IMX8MQ_CLK_USB_CORE_REF>;
@@ -933,9 +933,9 @@
usb_dwc3_1: usb@38200000 {
compatible = "fsl,imx8mq-dwc3", "snps,dwc3";
reg = <0x38200000 0x10000>;
- clocks = <&clk IMX8MQ_CLK_USB_BUS>,
+ clocks = <&clk IMX8MQ_CLK_USB2_CTRL_ROOT>,
<&clk IMX8MQ_CLK_USB_CORE_REF>,
- <&clk IMX8MQ_CLK_USB2_CTRL_ROOT>;
+ <&clk IMX8MQ_CLK_32K>;
clock-names = "bus_early", "ref", "suspend";
assigned-clocks = <&clk IMX8MQ_CLK_USB_BUS>,
<&clk IMX8MQ_CLK_USB_CORE_REF>;
--
2.7.4
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 12+ messages in thread* [PATCH 2/2] arm64: dts: imx8mq: correct usb controller clocks
@ 2019-07-10 11:19 ` jun.li
0 siblings, 0 replies; 12+ messages in thread
From: jun.li @ 2019-07-10 11:19 UTC (permalink / raw)
To: shawnguo, sboyd, robh+dt
Cc: mark.rutland, s.hauer, kernel, festevam, linux-imx, mturquette,
peter.chen, ping.bai, jun.li, Anson.Huang, l.stach, abel.vesa,
andrew.smirnov, ccaione, angus, agx, devicetree,
linux-arm-kernel, linux-clk
From: Li Jun <jun.li@nxp.com>
The correct clock for "bus_early", "ref", "suspend" should be:
IMX8MQ_CLK_USB1_CTRL_ROOT, IMX8MQ_CLK_USB_CORE_REF, IMX8MQ_CLK_32K,
especially we may need the right suspend clock rate to set register
in controller driver.
Signed-off-by: Li Jun <jun.li@nxp.com>
---
arch/arm64/boot/dts/freescale/imx8mq.dtsi | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
index d09b808..a43ddac 100644
--- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
@@ -901,9 +901,9 @@
usb_dwc3_0: usb@38100000 {
compatible = "fsl,imx8mq-dwc3", "snps,dwc3";
reg = <0x38100000 0x10000>;
- clocks = <&clk IMX8MQ_CLK_USB_BUS>,
+ clocks = <&clk IMX8MQ_CLK_USB1_CTRL_ROOT>,
<&clk IMX8MQ_CLK_USB_CORE_REF>,
- <&clk IMX8MQ_CLK_USB1_CTRL_ROOT>;
+ <&clk IMX8MQ_CLK_32K>;
clock-names = "bus_early", "ref", "suspend";
assigned-clocks = <&clk IMX8MQ_CLK_USB_BUS>,
<&clk IMX8MQ_CLK_USB_CORE_REF>;
@@ -933,9 +933,9 @@
usb_dwc3_1: usb@38200000 {
compatible = "fsl,imx8mq-dwc3", "snps,dwc3";
reg = <0x38200000 0x10000>;
- clocks = <&clk IMX8MQ_CLK_USB_BUS>,
+ clocks = <&clk IMX8MQ_CLK_USB2_CTRL_ROOT>,
<&clk IMX8MQ_CLK_USB_CORE_REF>,
- <&clk IMX8MQ_CLK_USB2_CTRL_ROOT>;
+ <&clk IMX8MQ_CLK_32K>;
clock-names = "bus_early", "ref", "suspend";
assigned-clocks = <&clk IMX8MQ_CLK_USB_BUS>,
<&clk IMX8MQ_CLK_USB_CORE_REF>;
--
2.7.4
^ permalink raw reply related [flat|nested] 12+ messages in thread
* Re: [PATCH 1/2] clk: imx8mq: set correct parent for usb ctrl clocks
2019-07-10 11:19 ` jun.li
(?)
@ 2019-07-11 8:16 ` Abel Vesa
-1 siblings, 0 replies; 12+ messages in thread
From: Abel Vesa @ 2019-07-11 8:16 UTC (permalink / raw)
To: Jun Li
Cc: mark.rutland, Peter Chen, agx, Jacky Bai, Anson Huang, ccaione,
sboyd, festevam, s.hauer, angus, linux-clk, andrew.smirnov,
devicetree, robh+dt, dl-linux-imx, kernel, shawnguo, mturquette,
linux-arm-kernel, l.stach
On 19-07-10 19:19:16, jun.li@nxp.com wrote:
> From: Li Jun <jun.li@nxp.com>
>
> Per latest imx8mq datasheet of CCM, the parent of usb1_ctrl_root_clk
> and usb2_ctrl_root_clk is usb_bus.
>
> Signed-off-by: Li Jun <jun.li@nxp.com>
For the entire series.
Reviewed-by: Abel Vesa <abel.vesa@nxp.com>
> ---
> drivers/clk/imx/clk-imx8mq.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/clk/imx/clk-imx8mq.c b/drivers/clk/imx/clk-imx8mq.c
> index d407a07..c7d1546 100644
> --- a/drivers/clk/imx/clk-imx8mq.c
> +++ b/drivers/clk/imx/clk-imx8mq.c
> @@ -523,8 +523,8 @@ static int imx8mq_clocks_probe(struct platform_device *pdev)
> clks[IMX8MQ_CLK_UART2_ROOT] = imx_clk_gate4("uart2_root_clk", "uart2", base + 0x44a0, 0);
> clks[IMX8MQ_CLK_UART3_ROOT] = imx_clk_gate4("uart3_root_clk", "uart3", base + 0x44b0, 0);
> clks[IMX8MQ_CLK_UART4_ROOT] = imx_clk_gate4("uart4_root_clk", "uart4", base + 0x44c0, 0);
> - clks[IMX8MQ_CLK_USB1_CTRL_ROOT] = imx_clk_gate4("usb1_ctrl_root_clk", "usb_core_ref", base + 0x44d0, 0);
> - clks[IMX8MQ_CLK_USB2_CTRL_ROOT] = imx_clk_gate4("usb2_ctrl_root_clk", "usb_core_ref", base + 0x44e0, 0);
> + clks[IMX8MQ_CLK_USB1_CTRL_ROOT] = imx_clk_gate4("usb1_ctrl_root_clk", "usb_bus", base + 0x44d0, 0);
> + clks[IMX8MQ_CLK_USB2_CTRL_ROOT] = imx_clk_gate4("usb2_ctrl_root_clk", "usb_bus", base + 0x44e0, 0);
> clks[IMX8MQ_CLK_USB1_PHY_ROOT] = imx_clk_gate4("usb1_phy_root_clk", "usb_phy_ref", base + 0x44f0, 0);
> clks[IMX8MQ_CLK_USB2_PHY_ROOT] = imx_clk_gate4("usb2_phy_root_clk", "usb_phy_ref", base + 0x4500, 0);
> clks[IMX8MQ_CLK_USDHC1_ROOT] = imx_clk_gate4("usdhc1_root_clk", "usdhc1", base + 0x4510, 0);
> --
> 2.7.4
>
^ permalink raw reply [flat|nested] 12+ messages in thread* Re: [PATCH 1/2] clk: imx8mq: set correct parent for usb ctrl clocks
@ 2019-07-11 8:16 ` Abel Vesa
0 siblings, 0 replies; 12+ messages in thread
From: Abel Vesa @ 2019-07-11 8:16 UTC (permalink / raw)
To: Jun Li
Cc: mark.rutland, Peter Chen, agx, Jacky Bai, Anson Huang, ccaione,
sboyd, festevam, s.hauer, angus, linux-clk, andrew.smirnov,
devicetree, robh+dt, dl-linux-imx, kernel, shawnguo, mturquette,
linux-arm-kernel, l.stach
On 19-07-10 19:19:16, jun.li@nxp.com wrote:
> From: Li Jun <jun.li@nxp.com>
>
> Per latest imx8mq datasheet of CCM, the parent of usb1_ctrl_root_clk
> and usb2_ctrl_root_clk is usb_bus.
>
> Signed-off-by: Li Jun <jun.li@nxp.com>
For the entire series.
Reviewed-by: Abel Vesa <abel.vesa@nxp.com>
> ---
> drivers/clk/imx/clk-imx8mq.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/clk/imx/clk-imx8mq.c b/drivers/clk/imx/clk-imx8mq.c
> index d407a07..c7d1546 100644
> --- a/drivers/clk/imx/clk-imx8mq.c
> +++ b/drivers/clk/imx/clk-imx8mq.c
> @@ -523,8 +523,8 @@ static int imx8mq_clocks_probe(struct platform_device *pdev)
> clks[IMX8MQ_CLK_UART2_ROOT] = imx_clk_gate4("uart2_root_clk", "uart2", base + 0x44a0, 0);
> clks[IMX8MQ_CLK_UART3_ROOT] = imx_clk_gate4("uart3_root_clk", "uart3", base + 0x44b0, 0);
> clks[IMX8MQ_CLK_UART4_ROOT] = imx_clk_gate4("uart4_root_clk", "uart4", base + 0x44c0, 0);
> - clks[IMX8MQ_CLK_USB1_CTRL_ROOT] = imx_clk_gate4("usb1_ctrl_root_clk", "usb_core_ref", base + 0x44d0, 0);
> - clks[IMX8MQ_CLK_USB2_CTRL_ROOT] = imx_clk_gate4("usb2_ctrl_root_clk", "usb_core_ref", base + 0x44e0, 0);
> + clks[IMX8MQ_CLK_USB1_CTRL_ROOT] = imx_clk_gate4("usb1_ctrl_root_clk", "usb_bus", base + 0x44d0, 0);
> + clks[IMX8MQ_CLK_USB2_CTRL_ROOT] = imx_clk_gate4("usb2_ctrl_root_clk", "usb_bus", base + 0x44e0, 0);
> clks[IMX8MQ_CLK_USB1_PHY_ROOT] = imx_clk_gate4("usb1_phy_root_clk", "usb_phy_ref", base + 0x44f0, 0);
> clks[IMX8MQ_CLK_USB2_PHY_ROOT] = imx_clk_gate4("usb2_phy_root_clk", "usb_phy_ref", base + 0x4500, 0);
> clks[IMX8MQ_CLK_USDHC1_ROOT] = imx_clk_gate4("usdhc1_root_clk", "usdhc1", base + 0x4510, 0);
> --
> 2.7.4
>
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 12+ messages in thread* Re: [PATCH 1/2] clk: imx8mq: set correct parent for usb ctrl clocks
@ 2019-07-11 8:16 ` Abel Vesa
0 siblings, 0 replies; 12+ messages in thread
From: Abel Vesa @ 2019-07-11 8:16 UTC (permalink / raw)
To: Jun Li
Cc: shawnguo, sboyd, robh+dt, mark.rutland, s.hauer, kernel,
festevam, dl-linux-imx, mturquette, Peter Chen, Jacky Bai,
Anson Huang, l.stach, andrew.smirnov, ccaione, angus, agx,
devicetree, linux-arm-kernel, linux-clk
On 19-07-10 19:19:16, jun.li@nxp.com wrote:
> From: Li Jun <jun.li@nxp.com>
>
> Per latest imx8mq datasheet of CCM, the parent of usb1_ctrl_root_clk
> and usb2_ctrl_root_clk is usb_bus.
>
> Signed-off-by: Li Jun <jun.li@nxp.com>
For the entire series.
Reviewed-by: Abel Vesa <abel.vesa@nxp.com>
> ---
> drivers/clk/imx/clk-imx8mq.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/clk/imx/clk-imx8mq.c b/drivers/clk/imx/clk-imx8mq.c
> index d407a07..c7d1546 100644
> --- a/drivers/clk/imx/clk-imx8mq.c
> +++ b/drivers/clk/imx/clk-imx8mq.c
> @@ -523,8 +523,8 @@ static int imx8mq_clocks_probe(struct platform_device *pdev)
> clks[IMX8MQ_CLK_UART2_ROOT] = imx_clk_gate4("uart2_root_clk", "uart2", base + 0x44a0, 0);
> clks[IMX8MQ_CLK_UART3_ROOT] = imx_clk_gate4("uart3_root_clk", "uart3", base + 0x44b0, 0);
> clks[IMX8MQ_CLK_UART4_ROOT] = imx_clk_gate4("uart4_root_clk", "uart4", base + 0x44c0, 0);
> - clks[IMX8MQ_CLK_USB1_CTRL_ROOT] = imx_clk_gate4("usb1_ctrl_root_clk", "usb_core_ref", base + 0x44d0, 0);
> - clks[IMX8MQ_CLK_USB2_CTRL_ROOT] = imx_clk_gate4("usb2_ctrl_root_clk", "usb_core_ref", base + 0x44e0, 0);
> + clks[IMX8MQ_CLK_USB1_CTRL_ROOT] = imx_clk_gate4("usb1_ctrl_root_clk", "usb_bus", base + 0x44d0, 0);
> + clks[IMX8MQ_CLK_USB2_CTRL_ROOT] = imx_clk_gate4("usb2_ctrl_root_clk", "usb_bus", base + 0x44e0, 0);
> clks[IMX8MQ_CLK_USB1_PHY_ROOT] = imx_clk_gate4("usb1_phy_root_clk", "usb_phy_ref", base + 0x44f0, 0);
> clks[IMX8MQ_CLK_USB2_PHY_ROOT] = imx_clk_gate4("usb2_phy_root_clk", "usb_phy_ref", base + 0x4500, 0);
> clks[IMX8MQ_CLK_USDHC1_ROOT] = imx_clk_gate4("usdhc1_root_clk", "usdhc1", base + 0x4510, 0);
> --
> 2.7.4
>
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH 1/2] clk: imx8mq: set correct parent for usb ctrl clocks
2019-07-10 11:19 ` jun.li
(?)
@ 2019-07-23 5:53 ` Shawn Guo
-1 siblings, 0 replies; 12+ messages in thread
From: Shawn Guo @ 2019-07-23 5:53 UTC (permalink / raw)
To: jun.li
Cc: mark.rutland, peter.chen, agx, ping.bai, Anson.Huang, ccaione,
sboyd, s.hauer, angus, linux-clk, abel.vesa, andrew.smirnov,
devicetree, robh+dt, linux-imx, kernel, festevam, mturquette,
linux-arm-kernel, l.stach
On Wed, Jul 10, 2019 at 07:19:16PM +0800, jun.li@nxp.com wrote:
> From: Li Jun <jun.li@nxp.com>
>
> Per latest imx8mq datasheet of CCM, the parent of usb1_ctrl_root_clk
> and usb2_ctrl_root_clk is usb_bus.
>
> Signed-off-by: Li Jun <jun.li@nxp.com>
Applied both, thanks.
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH 1/2] clk: imx8mq: set correct parent for usb ctrl clocks
@ 2019-07-23 5:53 ` Shawn Guo
0 siblings, 0 replies; 12+ messages in thread
From: Shawn Guo @ 2019-07-23 5:53 UTC (permalink / raw)
To: jun.li
Cc: mark.rutland, peter.chen, agx, ping.bai, Anson.Huang, ccaione,
sboyd, s.hauer, angus, linux-clk, abel.vesa, andrew.smirnov,
devicetree, robh+dt, linux-imx, kernel, festevam, mturquette,
linux-arm-kernel, l.stach
On Wed, Jul 10, 2019 at 07:19:16PM +0800, jun.li@nxp.com wrote:
> From: Li Jun <jun.li@nxp.com>
>
> Per latest imx8mq datasheet of CCM, the parent of usb1_ctrl_root_clk
> and usb2_ctrl_root_clk is usb_bus.
>
> Signed-off-by: Li Jun <jun.li@nxp.com>
Applied both, thanks.
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^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH 1/2] clk: imx8mq: set correct parent for usb ctrl clocks
@ 2019-07-23 5:53 ` Shawn Guo
0 siblings, 0 replies; 12+ messages in thread
From: Shawn Guo @ 2019-07-23 5:53 UTC (permalink / raw)
To: jun.li
Cc: sboyd, robh+dt, mark.rutland, s.hauer, kernel, festevam,
linux-imx, mturquette, peter.chen, ping.bai, Anson.Huang,
l.stach, abel.vesa, andrew.smirnov, ccaione, angus, agx,
devicetree, linux-arm-kernel, linux-clk
On Wed, Jul 10, 2019 at 07:19:16PM +0800, jun.li@nxp.com wrote:
> From: Li Jun <jun.li@nxp.com>
>
> Per latest imx8mq datasheet of CCM, the parent of usb1_ctrl_root_clk
> and usb2_ctrl_root_clk is usb_bus.
>
> Signed-off-by: Li Jun <jun.li@nxp.com>
Applied both, thanks.
^ permalink raw reply [flat|nested] 12+ messages in thread