* [PATCH] drm/dp/dsc: Add Support for all BPCs supported by TGL @ 2019-07-10 23:09 Anusha Srivatsa 2019-07-10 23:31 ` ✗ Fi.CI.SPARSE: warning for " Patchwork ` (3 more replies) 0 siblings, 4 replies; 9+ messages in thread From: Anusha Srivatsa @ 2019-07-10 23:09 UTC (permalink / raw) To: intel-gfx DSC engine on ICL supports only 8 and 10 BPC as the input BPC. But DSC engine in TGL supports 8, 10 and 12 BPC. Add 12 BPC support for DSC while calculating compression configuration. Cc: Manasi Navare <manasi.d.navare@intel.com> Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com> --- drivers/gpu/drm/i915/display/intel_dp.c | 9 +++++++-- 1 file changed, 7 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c index 0bdb7ecc5a81..cd089643c80d 100644 --- a/drivers/gpu/drm/i915/display/intel_dp.c +++ b/drivers/gpu/drm/i915/display/intel_dp.c @@ -71,6 +71,7 @@ #define DP_DSC_MAX_SMALL_JOINER_RAM_BUFFER 61440 #define DP_DSC_MIN_SUPPORTED_BPC 8 #define DP_DSC_MAX_SUPPORTED_BPC 10 +#define TGL_DP_DSC_MAX_SUPPORTED_BPC 12 /* DP DSC throughput values used for slice count calculations KPixels/s */ #define DP_DSC_PEAK_PIXEL_RATE 2720000 @@ -1911,8 +1912,12 @@ static int intel_dp_dsc_compute_config(struct intel_dp *intel_dp, if (!intel_dp_supports_dsc(intel_dp, pipe_config)) return -EINVAL; - dsc_max_bpc = min_t(u8, DP_DSC_MAX_SUPPORTED_BPC, - conn_state->max_requested_bpc); + if (INTEL_GEN(dev_priv) > 11) + dsc_max_bpc = min_t(u8, TGL_DP_DSC_MAX_SUPPORTED_BPC, + conn_state->max_requested_bpc); + else + dsc_max_bpc = min_t(u8, DP_DSC_MAX_SUPPORTED_BPC, + conn_state->max_requested_bpc); pipe_bpp = intel_dp_dsc_compute_bpp(intel_dp, dsc_max_bpc); if (pipe_bpp < DP_DSC_MIN_SUPPORTED_BPC * 3) { -- 2.21.0 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply related [flat|nested] 9+ messages in thread
* ✗ Fi.CI.SPARSE: warning for drm/dp/dsc: Add Support for all BPCs supported by TGL 2019-07-10 23:09 [PATCH] drm/dp/dsc: Add Support for all BPCs supported by TGL Anusha Srivatsa @ 2019-07-10 23:31 ` Patchwork 2019-07-11 12:32 ` ✓ Fi.CI.BAT: success " Patchwork ` (2 subsequent siblings) 3 siblings, 0 replies; 9+ messages in thread From: Patchwork @ 2019-07-10 23:31 UTC (permalink / raw) To: Anusha Srivatsa; +Cc: intel-gfx == Series Details == Series: drm/dp/dsc: Add Support for all BPCs supported by TGL URL : https://patchwork.freedesktop.org/series/63526/ State : warning == Summary == $ dim sparse origin/drm-tip Sparse version: v0.5.2 Commit: drm/dp/dsc: Add Support for all BPCs supported by TGL -O:drivers/gpu/drm/i915/display/intel_dp.c:1914:23: warning: expression using sizeof(void) +drivers/gpu/drm/i915/display/intel_dp.c:1916:31: warning: expression using sizeof(void) +drivers/gpu/drm/i915/display/intel_dp.c:1919:31: warning: expression using sizeof(void) _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 9+ messages in thread
* ✓ Fi.CI.BAT: success for drm/dp/dsc: Add Support for all BPCs supported by TGL 2019-07-10 23:09 [PATCH] drm/dp/dsc: Add Support for all BPCs supported by TGL Anusha Srivatsa 2019-07-10 23:31 ` ✗ Fi.CI.SPARSE: warning for " Patchwork @ 2019-07-11 12:32 ` Patchwork 2019-07-11 13:47 ` [PATCH] " Ville Syrjälä 2019-07-11 23:30 ` ✓ Fi.CI.IGT: success for " Patchwork 3 siblings, 0 replies; 9+ messages in thread From: Patchwork @ 2019-07-11 12:32 UTC (permalink / raw) To: Anusha Srivatsa; +Cc: intel-gfx == Series Details == Series: drm/dp/dsc: Add Support for all BPCs supported by TGL URL : https://patchwork.freedesktop.org/series/63526/ State : success == Summary == CI Bug Log - changes from CI_DRM_6453 -> Patchwork_13615 ==================================================== Summary ------- **SUCCESS** No regressions found. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13615/ Known issues ------------ Here are the changes found in Patchwork_13615 that come from known issues: ### IGT changes ### #### Issues hit #### * igt@i915_selftest@live_contexts: - fi-skl-iommu: [PASS][1] -> [INCOMPLETE][2] ([fdo#111050]) [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6453/fi-skl-iommu/igt@i915_selftest@live_contexts.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13615/fi-skl-iommu/igt@i915_selftest@live_contexts.html * igt@kms_frontbuffer_tracking@basic: - fi-hsw-peppy: [PASS][3] -> [DMESG-WARN][4] ([fdo#102614]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6453/fi-hsw-peppy/igt@kms_frontbuffer_tracking@basic.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13615/fi-hsw-peppy/igt@kms_frontbuffer_tracking@basic.html #### Possible fixes #### * igt@gem_basic@create-fd-close: - fi-icl-u3: [DMESG-WARN][5] ([fdo#107724]) -> [PASS][6] [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6453/fi-icl-u3/igt@gem_basic@create-fd-close.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13615/fi-icl-u3/igt@gem_basic@create-fd-close.html * igt@i915_selftest@live_execlists: - fi-skl-gvtdvm: [DMESG-FAIL][7] -> [PASS][8] [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6453/fi-skl-gvtdvm/igt@i915_selftest@live_execlists.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13615/fi-skl-gvtdvm/igt@i915_selftest@live_execlists.html * igt@kms_chamelium@hdmi-edid-read: - {fi-icl-u4}: [FAIL][9] ([fdo#111045] / [fdo#111046 ]) -> [PASS][10] [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6453/fi-icl-u4/igt@kms_chamelium@hdmi-edid-read.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13615/fi-icl-u4/igt@kms_chamelium@hdmi-edid-read.html * igt@kms_chamelium@hdmi-hpd-fast: - fi-kbl-7567u: [FAIL][11] ([fdo#109485]) -> [PASS][12] [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6453/fi-kbl-7567u/igt@kms_chamelium@hdmi-hpd-fast.html [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13615/fi-kbl-7567u/igt@kms_chamelium@hdmi-hpd-fast.html * igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a: - fi-blb-e6850: [INCOMPLETE][13] ([fdo#107718]) -> [PASS][14] [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6453/fi-blb-e6850/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a.html [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13615/fi-blb-e6850/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a.html * igt@prime_vgem@basic-fence-flip: - fi-ilk-650: [DMESG-WARN][15] ([fdo#106387]) -> [PASS][16] +1 similar issue [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6453/fi-ilk-650/igt@prime_vgem@basic-fence-flip.html [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13615/fi-ilk-650/igt@prime_vgem@basic-fence-flip.html #### Warnings #### * igt@i915_selftest@live_hangcheck: - fi-icl-dsi: [INCOMPLETE][17] ([fdo#107713] / [fdo#108569]) -> [DMESG-WARN][18] ([fdo#110801]) [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6453/fi-icl-dsi/igt@i915_selftest@live_hangcheck.html [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13615/fi-icl-dsi/igt@i915_selftest@live_hangcheck.html {name}: This element is suppressed. This means it is ignored when computing the status of the difference (SUCCESS, WARNING, or FAILURE). [fdo#102614]: https://bugs.freedesktop.org/show_bug.cgi?id=102614 [fdo#106387]: https://bugs.freedesktop.org/show_bug.cgi?id=106387 [fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713 [fdo#107718]: https://bugs.freedesktop.org/show_bug.cgi?id=107718 [fdo#107724]: https://bugs.freedesktop.org/show_bug.cgi?id=107724 [fdo#108569]: https://bugs.freedesktop.org/show_bug.cgi?id=108569 [fdo#109485]: https://bugs.freedesktop.org/show_bug.cgi?id=109485 [fdo#110566]: https://bugs.freedesktop.org/show_bug.cgi?id=110566 [fdo#110801]: https://bugs.freedesktop.org/show_bug.cgi?id=110801 [fdo#111045]: https://bugs.freedesktop.org/show_bug.cgi?id=111045 [fdo#111046 ]: https://bugs.freedesktop.org/show_bug.cgi?id=111046 [fdo#111050]: https://bugs.freedesktop.org/show_bug.cgi?id=111050 Participating hosts (53 -> 45) ------------------------------ Missing (8): fi-kbl-soraka fi-byt-squawks fi-bsw-cyan fi-snb-2520m fi-pnv-d510 fi-icl-y fi-byt-clapper fi-bdw-samus Build changes ------------- * Linux: CI_DRM_6453 -> Patchwork_13615 CI_DRM_6453: ee7ea857b5d32c7b58b5994201e0e1e194266206 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_5092: 2a66ae6626d5583240509f84117d1345a799b75a @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_13615: f45cdc40da3992713b4ad632a5276ddd97b02931 @ git://anongit.freedesktop.org/gfx-ci/linux == Kernel 32bit build == Warning: Kernel 32bit buildtest failed: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13615/build_32bit.log CALL scripts/checksyscalls.sh CALL scripts/atomic/check-atomics.sh CHK include/generated/compile.h Kernel: arch/x86/boot/bzImage is ready (#1) Building modules, stage 2. MODPOST 112 modules ERROR: "__udivdi3" [drivers/gpu/drm/amd/amdgpu/amdgpu.ko] undefined! ERROR: "__divdi3" [drivers/gpu/drm/amd/amdgpu/amdgpu.ko] undefined! scripts/Makefile.modpost:91: recipe for target '__modpost' failed make[1]: *** [__modpost] Error 1 Makefile:1287: recipe for target 'modules' failed make: *** [modules] Error 2 == Linux commits == f45cdc40da39 drm/dp/dsc: Add Support for all BPCs supported by TGL == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13615/ _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH] drm/dp/dsc: Add Support for all BPCs supported by TGL 2019-07-10 23:09 [PATCH] drm/dp/dsc: Add Support for all BPCs supported by TGL Anusha Srivatsa 2019-07-10 23:31 ` ✗ Fi.CI.SPARSE: warning for " Patchwork 2019-07-11 12:32 ` ✓ Fi.CI.BAT: success " Patchwork @ 2019-07-11 13:47 ` Ville Syrjälä 2019-07-11 17:24 ` Manasi Navare 2019-07-11 23:30 ` ✓ Fi.CI.IGT: success for " Patchwork 3 siblings, 1 reply; 9+ messages in thread From: Ville Syrjälä @ 2019-07-11 13:47 UTC (permalink / raw) To: Anusha Srivatsa; +Cc: intel-gfx On Wed, Jul 10, 2019 at 04:09:21PM -0700, Anusha Srivatsa wrote: > DSC engine on ICL supports only 8 and 10 BPC as the input > BPC. But DSC engine in TGL supports 8, 10 and 12 BPC. > Add 12 BPC support for DSC while calculating compression > configuration. > > Cc: Manasi Navare <manasi.d.navare@intel.com> > Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com> > --- > drivers/gpu/drm/i915/display/intel_dp.c | 9 +++++++-- > 1 file changed, 7 insertions(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c > index 0bdb7ecc5a81..cd089643c80d 100644 > --- a/drivers/gpu/drm/i915/display/intel_dp.c > +++ b/drivers/gpu/drm/i915/display/intel_dp.c > @@ -71,6 +71,7 @@ > #define DP_DSC_MAX_SMALL_JOINER_RAM_BUFFER 61440 > #define DP_DSC_MIN_SUPPORTED_BPC 8 > #define DP_DSC_MAX_SUPPORTED_BPC 10 > +#define TGL_DP_DSC_MAX_SUPPORTED_BPC 12 These defines aren't doing any good IMO. I'd just nuke them. > > /* DP DSC throughput values used for slice count calculations KPixels/s */ > #define DP_DSC_PEAK_PIXEL_RATE 2720000 > @@ -1911,8 +1912,12 @@ static int intel_dp_dsc_compute_config(struct intel_dp *intel_dp, > if (!intel_dp_supports_dsc(intel_dp, pipe_config)) > return -EINVAL; > > - dsc_max_bpc = min_t(u8, DP_DSC_MAX_SUPPORTED_BPC, > - conn_state->max_requested_bpc); > + if (INTEL_GEN(dev_priv) > 11) More customarily >= 12 > + dsc_max_bpc = min_t(u8, TGL_DP_DSC_MAX_SUPPORTED_BPC, > + conn_state->max_requested_bpc); > + else > + dsc_max_bpc = min_t(u8, DP_DSC_MAX_SUPPORTED_BPC, > + conn_state->max_requested_bpc); > > pipe_bpp = intel_dp_dsc_compute_bpp(intel_dp, dsc_max_bpc); > if (pipe_bpp < DP_DSC_MIN_SUPPORTED_BPC * 3) { > -- > 2.21.0 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/intel-gfx -- Ville Syrjälä Intel _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH] drm/dp/dsc: Add Support for all BPCs supported by TGL 2019-07-11 13:47 ` [PATCH] " Ville Syrjälä @ 2019-07-11 17:24 ` Manasi Navare 2019-07-12 17:29 ` Srivatsa, Anusha 0 siblings, 1 reply; 9+ messages in thread From: Manasi Navare @ 2019-07-11 17:24 UTC (permalink / raw) To: Ville Syrjälä; +Cc: intel-gfx On Thu, Jul 11, 2019 at 04:47:17PM +0300, Ville Syrjälä wrote: > On Wed, Jul 10, 2019 at 04:09:21PM -0700, Anusha Srivatsa wrote: > > DSC engine on ICL supports only 8 and 10 BPC as the input > > BPC. But DSC engine in TGL supports 8, 10 and 12 BPC. > > Add 12 BPC support for DSC while calculating compression > > configuration. > > > > Cc: Manasi Navare <manasi.d.navare@intel.com> > > Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com> > > --- > > drivers/gpu/drm/i915/display/intel_dp.c | 9 +++++++-- > > 1 file changed, 7 insertions(+), 2 deletions(-) > > > > diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c > > index 0bdb7ecc5a81..cd089643c80d 100644 > > --- a/drivers/gpu/drm/i915/display/intel_dp.c > > +++ b/drivers/gpu/drm/i915/display/intel_dp.c > > @@ -71,6 +71,7 @@ > > #define DP_DSC_MAX_SMALL_JOINER_RAM_BUFFER 61440 > > #define DP_DSC_MIN_SUPPORTED_BPC 8 > > #define DP_DSC_MAX_SUPPORTED_BPC 10 > > +#define TGL_DP_DSC_MAX_SUPPORTED_BPC 12 > > These defines aren't doing any good IMO. I'd just nuke them. So just remove all the #defines and use the values directly? > > > > > /* DP DSC throughput values used for slice count calculations KPixels/s */ > > #define DP_DSC_PEAK_PIXEL_RATE 2720000 > > @@ -1911,8 +1912,12 @@ static int intel_dp_dsc_compute_config(struct intel_dp *intel_dp, > > if (!intel_dp_supports_dsc(intel_dp, pipe_config)) > > return -EINVAL; > > > > - dsc_max_bpc = min_t(u8, DP_DSC_MAX_SUPPORTED_BPC, > > - conn_state->max_requested_bpc); > > + if (INTEL_GEN(dev_priv) > 11) > > More customarily >= 12 I agree Manasi > > > + dsc_max_bpc = min_t(u8, TGL_DP_DSC_MAX_SUPPORTED_BPC, > > + conn_state->max_requested_bpc); > > + else > > + dsc_max_bpc = min_t(u8, DP_DSC_MAX_SUPPORTED_BPC, > > + conn_state->max_requested_bpc); > > > > pipe_bpp = intel_dp_dsc_compute_bpp(intel_dp, dsc_max_bpc); > > if (pipe_bpp < DP_DSC_MIN_SUPPORTED_BPC * 3) { > > -- > > 2.21.0 > > > > _______________________________________________ > > Intel-gfx mailing list > > Intel-gfx@lists.freedesktop.org > > https://lists.freedesktop.org/mailman/listinfo/intel-gfx > > -- > Ville Syrjälä > Intel > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/intel-gfx _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH] drm/dp/dsc: Add Support for all BPCs supported by TGL 2019-07-11 17:24 ` Manasi Navare @ 2019-07-12 17:29 ` Srivatsa, Anusha 2019-07-12 17:34 ` Ville Syrjälä 0 siblings, 1 reply; 9+ messages in thread From: Srivatsa, Anusha @ 2019-07-12 17:29 UTC (permalink / raw) To: Navare, Manasi D, Ville Syrjälä; +Cc: intel-gfx >-----Original Message----- >From: Navare, Manasi D >Sent: Thursday, July 11, 2019 10:24 AM >To: Ville Syrjälä <ville.syrjala@linux.intel.com> >Cc: Srivatsa, Anusha <anusha.srivatsa@intel.com>; intel- >gfx@lists.freedesktop.org >Subject: Re: [Intel-gfx] [PATCH] drm/dp/dsc: Add Support for all BPCs supported >by TGL > >On Thu, Jul 11, 2019 at 04:47:17PM +0300, Ville Syrjälä wrote: >> On Wed, Jul 10, 2019 at 04:09:21PM -0700, Anusha Srivatsa wrote: >> > DSC engine on ICL supports only 8 and 10 BPC as the input BPC. But >> > DSC engine in TGL supports 8, 10 and 12 BPC. >> > Add 12 BPC support for DSC while calculating compression >> > configuration. >> > >> > Cc: Manasi Navare <manasi.d.navare@intel.com> >> > Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com> >> > --- >> > drivers/gpu/drm/i915/display/intel_dp.c | 9 +++++++-- >> > 1 file changed, 7 insertions(+), 2 deletions(-) >> > >> > diff --git a/drivers/gpu/drm/i915/display/intel_dp.c >> > b/drivers/gpu/drm/i915/display/intel_dp.c >> > index 0bdb7ecc5a81..cd089643c80d 100644 >> > --- a/drivers/gpu/drm/i915/display/intel_dp.c >> > +++ b/drivers/gpu/drm/i915/display/intel_dp.c >> > @@ -71,6 +71,7 @@ >> > #define DP_DSC_MAX_SMALL_JOINER_RAM_BUFFER 61440 >> > #define DP_DSC_MIN_SUPPORTED_BPC 8 >> > #define DP_DSC_MAX_SUPPORTED_BPC 10 >> > +#define TGL_DP_DSC_MAX_SUPPORTED_BPC 12 >> >> These defines aren't doing any good IMO. I'd just nuke them. > >So just remove all the #defines and use the values directly? Wont it make it less readable? >> >> > >> > /* DP DSC throughput values used for slice count calculations KPixels/s */ >> > #define DP_DSC_PEAK_PIXEL_RATE 2720000 >> > @@ -1911,8 +1912,12 @@ static int intel_dp_dsc_compute_config(struct >intel_dp *intel_dp, >> > if (!intel_dp_supports_dsc(intel_dp, pipe_config)) >> > return -EINVAL; >> > >> > - dsc_max_bpc = min_t(u8, DP_DSC_MAX_SUPPORTED_BPC, >> > - conn_state->max_requested_bpc); >> > + if (INTEL_GEN(dev_priv) > 11) >> >> More customarily >= 12 > >I agree Makes sense. Anusha >Manasi > >> >> > + dsc_max_bpc = min_t(u8, TGL_DP_DSC_MAX_SUPPORTED_BPC, >> > + conn_state->max_requested_bpc); >> > + else >> > + dsc_max_bpc = min_t(u8, DP_DSC_MAX_SUPPORTED_BPC, >> > + conn_state->max_requested_bpc); >> > >> > pipe_bpp = intel_dp_dsc_compute_bpp(intel_dp, dsc_max_bpc); >> > if (pipe_bpp < DP_DSC_MIN_SUPPORTED_BPC * 3) { >> > -- >> > 2.21.0 >> > >> > _______________________________________________ >> > Intel-gfx mailing list >> > Intel-gfx@lists.freedesktop.org >> > https://lists.freedesktop.org/mailman/listinfo/intel-gfx >> >> -- >> Ville Syrjälä >> Intel >> _______________________________________________ >> Intel-gfx mailing list >> Intel-gfx@lists.freedesktop.org >> https://lists.freedesktop.org/mailman/listinfo/intel-gfx _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH] drm/dp/dsc: Add Support for all BPCs supported by TGL 2019-07-12 17:29 ` Srivatsa, Anusha @ 2019-07-12 17:34 ` Ville Syrjälä 2019-07-12 18:11 ` Srivatsa, Anusha 0 siblings, 1 reply; 9+ messages in thread From: Ville Syrjälä @ 2019-07-12 17:34 UTC (permalink / raw) To: Srivatsa, Anusha; +Cc: intel-gfx On Fri, Jul 12, 2019 at 05:29:16PM +0000, Srivatsa, Anusha wrote: > > > >-----Original Message----- > >From: Navare, Manasi D > >Sent: Thursday, July 11, 2019 10:24 AM > >To: Ville Syrjälä <ville.syrjala@linux.intel.com> > >Cc: Srivatsa, Anusha <anusha.srivatsa@intel.com>; intel- > >gfx@lists.freedesktop.org > >Subject: Re: [Intel-gfx] [PATCH] drm/dp/dsc: Add Support for all BPCs supported > >by TGL > > > >On Thu, Jul 11, 2019 at 04:47:17PM +0300, Ville Syrjälä wrote: > >> On Wed, Jul 10, 2019 at 04:09:21PM -0700, Anusha Srivatsa wrote: > >> > DSC engine on ICL supports only 8 and 10 BPC as the input BPC. But > >> > DSC engine in TGL supports 8, 10 and 12 BPC. > >> > Add 12 BPC support for DSC while calculating compression > >> > configuration. > >> > > >> > Cc: Manasi Navare <manasi.d.navare@intel.com> > >> > Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com> > >> > --- > >> > drivers/gpu/drm/i915/display/intel_dp.c | 9 +++++++-- > >> > 1 file changed, 7 insertions(+), 2 deletions(-) > >> > > >> > diff --git a/drivers/gpu/drm/i915/display/intel_dp.c > >> > b/drivers/gpu/drm/i915/display/intel_dp.c > >> > index 0bdb7ecc5a81..cd089643c80d 100644 > >> > --- a/drivers/gpu/drm/i915/display/intel_dp.c > >> > +++ b/drivers/gpu/drm/i915/display/intel_dp.c > >> > @@ -71,6 +71,7 @@ > >> > #define DP_DSC_MAX_SMALL_JOINER_RAM_BUFFER 61440 > >> > #define DP_DSC_MIN_SUPPORTED_BPC 8 > >> > #define DP_DSC_MAX_SUPPORTED_BPC 10 > >> > +#define TGL_DP_DSC_MAX_SUPPORTED_BPC 12 > >> > >> These defines aren't doing any good IMO. I'd just nuke them. > > > >So just remove all the #defines and use the values directly? > > Wont it make it less readable? It will be more readable because you don't have to go looking for those defines. > > >> > >> > > >> > /* DP DSC throughput values used for slice count calculations KPixels/s */ > >> > #define DP_DSC_PEAK_PIXEL_RATE 2720000 > >> > @@ -1911,8 +1912,12 @@ static int intel_dp_dsc_compute_config(struct > >intel_dp *intel_dp, > >> > if (!intel_dp_supports_dsc(intel_dp, pipe_config)) > >> > return -EINVAL; > >> > > >> > - dsc_max_bpc = min_t(u8, DP_DSC_MAX_SUPPORTED_BPC, > >> > - conn_state->max_requested_bpc); > >> > + if (INTEL_GEN(dev_priv) > 11) > >> > >> More customarily >= 12 > > > >I agree > > Makes sense. > > Anusha > >Manasi > > > >> > >> > + dsc_max_bpc = min_t(u8, TGL_DP_DSC_MAX_SUPPORTED_BPC, > >> > + conn_state->max_requested_bpc); > >> > + else > >> > + dsc_max_bpc = min_t(u8, DP_DSC_MAX_SUPPORTED_BPC, > >> > + conn_state->max_requested_bpc); > >> > > >> > pipe_bpp = intel_dp_dsc_compute_bpp(intel_dp, dsc_max_bpc); > >> > if (pipe_bpp < DP_DSC_MIN_SUPPORTED_BPC * 3) { > >> > -- > >> > 2.21.0 > >> > > >> > _______________________________________________ > >> > Intel-gfx mailing list > >> > Intel-gfx@lists.freedesktop.org > >> > https://lists.freedesktop.org/mailman/listinfo/intel-gfx > >> > >> -- > >> Ville Syrjälä > >> Intel > >> _______________________________________________ > >> Intel-gfx mailing list > >> Intel-gfx@lists.freedesktop.org > >> https://lists.freedesktop.org/mailman/listinfo/intel-gfx -- Ville Syrjälä Intel _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH] drm/dp/dsc: Add Support for all BPCs supported by TGL 2019-07-12 17:34 ` Ville Syrjälä @ 2019-07-12 18:11 ` Srivatsa, Anusha 0 siblings, 0 replies; 9+ messages in thread From: Srivatsa, Anusha @ 2019-07-12 18:11 UTC (permalink / raw) To: Ville Syrjälä; +Cc: intel-gfx >-----Original Message----- >From: Ville Syrjälä [mailto:ville.syrjala@linux.intel.com] >Sent: Friday, July 12, 2019 10:34 AM >To: Srivatsa, Anusha <anusha.srivatsa@intel.com> >Cc: Navare, Manasi D <manasi.d.navare@intel.com>; intel- >gfx@lists.freedesktop.org >Subject: Re: [Intel-gfx] [PATCH] drm/dp/dsc: Add Support for all BPCs supported >by TGL > >On Fri, Jul 12, 2019 at 05:29:16PM +0000, Srivatsa, Anusha wrote: >> >> >> >-----Original Message----- >> >From: Navare, Manasi D >> >Sent: Thursday, July 11, 2019 10:24 AM >> >To: Ville Syrjälä <ville.syrjala@linux.intel.com> >> >Cc: Srivatsa, Anusha <anusha.srivatsa@intel.com>; intel- >> >gfx@lists.freedesktop.org >> >Subject: Re: [Intel-gfx] [PATCH] drm/dp/dsc: Add Support for all BPCs >> >supported by TGL >> > >> >On Thu, Jul 11, 2019 at 04:47:17PM +0300, Ville Syrjälä wrote: >> >> On Wed, Jul 10, 2019 at 04:09:21PM -0700, Anusha Srivatsa wrote: >> >> > DSC engine on ICL supports only 8 and 10 BPC as the input BPC. >> >> > But DSC engine in TGL supports 8, 10 and 12 BPC. >> >> > Add 12 BPC support for DSC while calculating compression >> >> > configuration. >> >> > >> >> > Cc: Manasi Navare <manasi.d.navare@intel.com> >> >> > Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com> >> >> > --- >> >> > drivers/gpu/drm/i915/display/intel_dp.c | 9 +++++++-- >> >> > 1 file changed, 7 insertions(+), 2 deletions(-) >> >> > >> >> > diff --git a/drivers/gpu/drm/i915/display/intel_dp.c >> >> > b/drivers/gpu/drm/i915/display/intel_dp.c >> >> > index 0bdb7ecc5a81..cd089643c80d 100644 >> >> > --- a/drivers/gpu/drm/i915/display/intel_dp.c >> >> > +++ b/drivers/gpu/drm/i915/display/intel_dp.c >> >> > @@ -71,6 +71,7 @@ >> >> > #define DP_DSC_MAX_SMALL_JOINER_RAM_BUFFER 61440 >> >> > #define DP_DSC_MIN_SUPPORTED_BPC 8 >> >> > #define DP_DSC_MAX_SUPPORTED_BPC 10 >> >> > +#define TGL_DP_DSC_MAX_SUPPORTED_BPC 12 >> >> >> >> These defines aren't doing any good IMO. I'd just nuke them. >> > >> >So just remove all the #defines and use the values directly? >> >> Wont it make it less readable? > >It will be more readable because you don't have to go looking for those defines. Ok. Then remove all #defines like Manasi pointed out? Anusha >> >> >> >> >> > >> >> > /* DP DSC throughput values used for slice count calculations KPixels/s */ >> >> > #define DP_DSC_PEAK_PIXEL_RATE 2720000 >> >> > @@ -1911,8 +1912,12 @@ static int >> >> > intel_dp_dsc_compute_config(struct >> >intel_dp *intel_dp, >> >> > if (!intel_dp_supports_dsc(intel_dp, pipe_config)) >> >> > return -EINVAL; >> >> > >> >> > - dsc_max_bpc = min_t(u8, DP_DSC_MAX_SUPPORTED_BPC, >> >> > - conn_state->max_requested_bpc); >> >> > + if (INTEL_GEN(dev_priv) > 11) >> >> >> >> More customarily >= 12 >> > >> >I agree >> >> Makes sense. >> >> Anusha >> >Manasi >> > >> >> >> >> > + dsc_max_bpc = min_t(u8, TGL_DP_DSC_MAX_SUPPORTED_BPC, >> >> > + conn_state->max_requested_bpc); >> >> > + else >> >> > + dsc_max_bpc = min_t(u8, DP_DSC_MAX_SUPPORTED_BPC, >> >> > + conn_state->max_requested_bpc); >> >> > >> >> > pipe_bpp = intel_dp_dsc_compute_bpp(intel_dp, dsc_max_bpc); >> >> > if (pipe_bpp < DP_DSC_MIN_SUPPORTED_BPC * 3) { >> >> > -- >> >> > 2.21.0 >> >> > >> >> > _______________________________________________ >> >> > Intel-gfx mailing list >> >> > Intel-gfx@lists.freedesktop.org >> >> > https://lists.freedesktop.org/mailman/listinfo/intel-gfx >> >> >> >> -- >> >> Ville Syrjälä >> >> Intel >> >> _______________________________________________ >> >> Intel-gfx mailing list >> >> Intel-gfx@lists.freedesktop.org >> >> https://lists.freedesktop.org/mailman/listinfo/intel-gfx > >-- >Ville Syrjälä >Intel _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 9+ messages in thread
* ✓ Fi.CI.IGT: success for drm/dp/dsc: Add Support for all BPCs supported by TGL 2019-07-10 23:09 [PATCH] drm/dp/dsc: Add Support for all BPCs supported by TGL Anusha Srivatsa ` (2 preceding siblings ...) 2019-07-11 13:47 ` [PATCH] " Ville Syrjälä @ 2019-07-11 23:30 ` Patchwork 3 siblings, 0 replies; 9+ messages in thread From: Patchwork @ 2019-07-11 23:30 UTC (permalink / raw) To: Anusha Srivatsa; +Cc: intel-gfx == Series Details == Series: drm/dp/dsc: Add Support for all BPCs supported by TGL URL : https://patchwork.freedesktop.org/series/63526/ State : success == Summary == CI Bug Log - changes from CI_DRM_6453_full -> Patchwork_13615_full ==================================================== Summary ------- **SUCCESS** No regressions found. Known issues ------------ Here are the changes found in Patchwork_13615_full that come from known issues: ### IGT changes ### #### Issues hit #### * igt@gem_ctx_engines@independent: - shard-glk: [PASS][1] -> [FAIL][2] ([fdo#110987]) [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6453/shard-glk9/igt@gem_ctx_engines@independent.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13615/shard-glk5/igt@gem_ctx_engines@independent.html * igt@i915_pm_rps@min-max-config-idle: - shard-iclb: [PASS][3] -> [INCOMPLETE][4] ([fdo#107713]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6453/shard-iclb1/igt@i915_pm_rps@min-max-config-idle.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13615/shard-iclb7/igt@i915_pm_rps@min-max-config-idle.html * igt@kms_cursor_legacy@2x-long-cursor-vs-flip-legacy: - shard-hsw: [PASS][5] -> [FAIL][6] ([fdo#105767]) [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6453/shard-hsw7/igt@kms_cursor_legacy@2x-long-cursor-vs-flip-legacy.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13615/shard-hsw8/igt@kms_cursor_legacy@2x-long-cursor-vs-flip-legacy.html * igt@kms_flip@blocking-absolute-wf_vblank: - shard-apl: [PASS][7] -> [INCOMPLETE][8] ([fdo#103927]) [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6453/shard-apl4/igt@kms_flip@blocking-absolute-wf_vblank.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13615/shard-apl5/igt@kms_flip@blocking-absolute-wf_vblank.html * igt@kms_flip@blocking-wf_vblank: - shard-glk: [PASS][9] -> [FAIL][10] ([fdo#100368]) [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6453/shard-glk3/igt@kms_flip@blocking-wf_vblank.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13615/shard-glk3/igt@kms_flip@blocking-wf_vblank.html * igt@kms_flip@flip-vs-expired-vblank-interruptible: - shard-glk: [PASS][11] -> [FAIL][12] ([fdo#105363]) [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6453/shard-glk1/igt@kms_flip@flip-vs-expired-vblank-interruptible.html [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13615/shard-glk6/igt@kms_flip@flip-vs-expired-vblank-interruptible.html * igt@kms_flip@flip-vs-suspend-interruptible: - shard-apl: [PASS][13] -> [DMESG-WARN][14] ([fdo#108566]) +2 similar issues [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6453/shard-apl1/igt@kms_flip@flip-vs-suspend-interruptible.html [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13615/shard-apl8/igt@kms_flip@flip-vs-suspend-interruptible.html * igt@kms_flip_tiling@flip-changes-tiling-yf: - shard-skl: [PASS][15] -> [FAIL][16] ([fdo#108228] / [fdo#108303]) [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6453/shard-skl10/igt@kms_flip_tiling@flip-changes-tiling-yf.html [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13615/shard-skl3/igt@kms_flip_tiling@flip-changes-tiling-yf.html * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-shrfb-plflip-blt: - shard-iclb: [PASS][17] -> [FAIL][18] ([fdo#103167]) +3 similar issues [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6453/shard-iclb5/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-shrfb-plflip-blt.html [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13615/shard-iclb8/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-shrfb-plflip-blt.html * igt@kms_frontbuffer_tracking@fbc-2p-primscrn-cur-indfb-draw-blt: - shard-hsw: [PASS][19] -> [SKIP][20] ([fdo#109271]) [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6453/shard-hsw7/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-cur-indfb-draw-blt.html [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13615/shard-hsw7/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-cur-indfb-draw-blt.html * igt@kms_plane@plane-panning-bottom-right-suspend-pipe-c-planes: - shard-skl: [PASS][21] -> [INCOMPLETE][22] ([fdo#104108]) [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6453/shard-skl1/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-c-planes.html [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13615/shard-skl3/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-c-planes.html * igt@kms_plane_alpha_blend@pipe-c-coverage-7efc: - shard-skl: [PASS][23] -> [FAIL][24] ([fdo#108145] / [fdo#110403]) [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6453/shard-skl8/igt@kms_plane_alpha_blend@pipe-c-coverage-7efc.html [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13615/shard-skl10/igt@kms_plane_alpha_blend@pipe-c-coverage-7efc.html * igt@kms_plane_lowres@pipe-a-tiling-x: - shard-iclb: [PASS][25] -> [FAIL][26] ([fdo#103166]) [25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6453/shard-iclb6/igt@kms_plane_lowres@pipe-a-tiling-x.html [26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13615/shard-iclb4/igt@kms_plane_lowres@pipe-a-tiling-x.html * igt@kms_psr@psr2_sprite_render: - shard-iclb: [PASS][27] -> [SKIP][28] ([fdo#109441]) [27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6453/shard-iclb2/igt@kms_psr@psr2_sprite_render.html [28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13615/shard-iclb6/igt@kms_psr@psr2_sprite_render.html * igt@kms_setmode@basic: - shard-apl: [PASS][29] -> [FAIL][30] ([fdo#99912]) [29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6453/shard-apl5/igt@kms_setmode@basic.html [30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13615/shard-apl3/igt@kms_setmode@basic.html * igt@perf_pmu@rc6: - shard-kbl: [PASS][31] -> [SKIP][32] ([fdo#109271]) [31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6453/shard-kbl3/igt@perf_pmu@rc6.html [32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13615/shard-kbl7/igt@perf_pmu@rc6.html #### Possible fixes #### * igt@gem_softpin@noreloc-s3: - shard-skl: [INCOMPLETE][33] ([fdo#104108] / [fdo#107773]) -> [PASS][34] [33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6453/shard-skl9/igt@gem_softpin@noreloc-s3.html [34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13615/shard-skl2/igt@gem_softpin@noreloc-s3.html * igt@i915_pm_rpm@debugfs-read: - shard-iclb: [INCOMPLETE][35] ([fdo#107713] / [fdo#108840]) -> [PASS][36] [35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6453/shard-iclb7/igt@i915_pm_rpm@debugfs-read.html [36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13615/shard-iclb5/igt@i915_pm_rpm@debugfs-read.html * igt@kms_cursor_crc@pipe-c-cursor-suspend: - shard-kbl: [DMESG-WARN][37] ([fdo#108566]) -> [PASS][38] +2 similar issues [37]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6453/shard-kbl3/igt@kms_cursor_crc@pipe-c-cursor-suspend.html [38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13615/shard-kbl7/igt@kms_cursor_crc@pipe-c-cursor-suspend.html * igt@kms_cursor_legacy@2x-long-flip-vs-cursor-legacy: - shard-glk: [FAIL][39] ([fdo#104873]) -> [PASS][40] [39]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6453/shard-glk8/igt@kms_cursor_legacy@2x-long-flip-vs-cursor-legacy.html [40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13615/shard-glk8/igt@kms_cursor_legacy@2x-long-flip-vs-cursor-legacy.html * igt@kms_draw_crc@draw-method-rgb565-mmap-wc-ytiled: - shard-skl: [FAIL][41] ([fdo#103184] / [fdo#103232]) -> [PASS][42] [41]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6453/shard-skl10/igt@kms_draw_crc@draw-method-rgb565-mmap-wc-ytiled.html [42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13615/shard-skl3/igt@kms_draw_crc@draw-method-rgb565-mmap-wc-ytiled.html * igt@kms_flip@modeset-vs-vblank-race: - shard-apl: [FAIL][43] ([fdo#103060]) -> [PASS][44] [43]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6453/shard-apl6/igt@kms_flip@modeset-vs-vblank-race.html [44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13615/shard-apl6/igt@kms_flip@modeset-vs-vblank-race.html * igt@kms_frontbuffer_tracking@fbc-1p-indfb-fliptrack: - shard-skl: [FAIL][45] ([fdo#103167]) -> [PASS][46] +1 similar issue [45]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6453/shard-skl7/igt@kms_frontbuffer_tracking@fbc-1p-indfb-fliptrack.html [46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13615/shard-skl1/igt@kms_frontbuffer_tracking@fbc-1p-indfb-fliptrack.html * igt@kms_frontbuffer_tracking@fbc-1p-pri-indfb-multidraw: - shard-iclb: [FAIL][47] ([fdo#103167]) -> [PASS][48] +2 similar issues [47]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6453/shard-iclb8/igt@kms_frontbuffer_tracking@fbc-1p-pri-indfb-multidraw.html [48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13615/shard-iclb3/igt@kms_frontbuffer_tracking@fbc-1p-pri-indfb-multidraw.html * igt@kms_plane@plane-panning-bottom-right-suspend-pipe-b-planes: - shard-apl: [DMESG-WARN][49] ([fdo#108566]) -> [PASS][50] +3 similar issues [49]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6453/shard-apl5/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-b-planes.html [50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13615/shard-apl3/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-b-planes.html * igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min: - shard-skl: [FAIL][51] ([fdo#108145]) -> [PASS][52] +1 similar issue [51]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6453/shard-skl7/igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min.html [52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13615/shard-skl1/igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min.html * igt@kms_psr@psr2_no_drrs: - shard-iclb: [SKIP][53] ([fdo#109441]) -> [PASS][54] +1 similar issue [53]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6453/shard-iclb7/igt@kms_psr@psr2_no_drrs.html [54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13615/shard-iclb2/igt@kms_psr@psr2_no_drrs.html * igt@kms_setmode@basic: - shard-skl: [FAIL][55] ([fdo#99912]) -> [PASS][56] [55]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6453/shard-skl8/igt@kms_setmode@basic.html [56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13615/shard-skl10/igt@kms_setmode@basic.html - shard-kbl: [FAIL][57] ([fdo#99912]) -> [PASS][58] [57]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6453/shard-kbl7/igt@kms_setmode@basic.html [58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13615/shard-kbl1/igt@kms_setmode@basic.html * igt@kms_vblank@pipe-c-ts-continuation-suspend: - shard-skl: [INCOMPLETE][59] ([fdo#104108]) -> [PASS][60] +1 similar issue [59]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6453/shard-skl5/igt@kms_vblank@pipe-c-ts-continuation-suspend.html [60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13615/shard-skl6/igt@kms_vblank@pipe-c-ts-continuation-suspend.html * igt@perf@polling: - shard-skl: [FAIL][61] ([fdo#110728]) -> [PASS][62] [61]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6453/shard-skl8/igt@perf@polling.html [62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13615/shard-skl4/igt@perf@polling.html * igt@tools_test@tools_test: - shard-snb: [SKIP][63] ([fdo#109271]) -> [PASS][64] [63]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6453/shard-snb2/igt@tools_test@tools_test.html [64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13615/shard-snb7/igt@tools_test@tools_test.html #### Warnings #### * igt@kms_dp_dsc@basic-dsc-enable-edp: - shard-iclb: [SKIP][65] ([fdo#109349]) -> [DMESG-WARN][66] ([fdo#107724]) [65]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6453/shard-iclb4/igt@kms_dp_dsc@basic-dsc-enable-edp.html [66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13615/shard-iclb2/igt@kms_dp_dsc@basic-dsc-enable-edp.html [fdo#100368]: https://bugs.freedesktop.org/show_bug.cgi?id=100368 [fdo#103060]: https://bugs.freedesktop.org/show_bug.cgi?id=103060 [fdo#103166]: https://bugs.freedesktop.org/show_bug.cgi?id=103166 [fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167 [fdo#103184]: https://bugs.freedesktop.org/show_bug.cgi?id=103184 [fdo#103232]: https://bugs.freedesktop.org/show_bug.cgi?id=103232 [fdo#103927]: https://bugs.freedesktop.org/show_bug.cgi?id=103927 [fdo#104108]: https://bugs.freedesktop.org/show_bug.cgi?id=104108 [fdo#104873]: https://bugs.freedesktop.org/show_bug.cgi?id=104873 [fdo#105363]: https://bugs.freedesktop.org/show_bug.cgi?id=105363 [fdo#105767]: https://bugs.freedesktop.org/show_bug.cgi?id=105767 [fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713 [fdo#107724]: https://bugs.freedesktop.org/show_bug.cgi?id=107724 [fdo#107773]: https://bugs.freedesktop.org/show_bug.cgi?id=107773 [fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145 [fdo#108228]: https://bugs.freedesktop.org/show_bug.cgi?id=108228 [fdo#108303]: https://bugs.freedesktop.org/show_bug.cgi?id=108303 [fdo#108566]: https://bugs.freedesktop.org/show_bug.cgi?id=108566 [fdo#108840]: https://bugs.freedesktop.org/show_bug.cgi?id=108840 [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271 [fdo#109349]: https://bugs.freedesktop.org/show_bug.cgi?id=109349 [fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441 [fdo#110403]: https://bugs.freedesktop.org/show_bug.cgi?id=110403 [fdo#110728]: https://bugs.freedesktop.org/show_bug.cgi?id=110728 [fdo#110987]: https://bugs.freedesktop.org/show_bug.cgi?id=110987 [fdo#99912]: https://bugs.freedesktop.org/show_bug.cgi?id=99912 Participating hosts (10 -> 10) ------------------------------ No changes in participating hosts Build changes ------------- * Linux: CI_DRM_6453 -> Patchwork_13615 CI_DRM_6453: ee7ea857b5d32c7b58b5994201e0e1e194266206 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_5092: 2a66ae6626d5583240509f84117d1345a799b75a @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_13615: f45cdc40da3992713b4ad632a5276ddd97b02931 @ git://anongit.freedesktop.org/gfx-ci/linux piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13615/ _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 9+ messages in thread
end of thread, other threads:[~2019-07-12 18:11 UTC | newest] Thread overview: 9+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2019-07-10 23:09 [PATCH] drm/dp/dsc: Add Support for all BPCs supported by TGL Anusha Srivatsa 2019-07-10 23:31 ` ✗ Fi.CI.SPARSE: warning for " Patchwork 2019-07-11 12:32 ` ✓ Fi.CI.BAT: success " Patchwork 2019-07-11 13:47 ` [PATCH] " Ville Syrjälä 2019-07-11 17:24 ` Manasi Navare 2019-07-12 17:29 ` Srivatsa, Anusha 2019-07-12 17:34 ` Ville Syrjälä 2019-07-12 18:11 ` Srivatsa, Anusha 2019-07-11 23:30 ` ✓ Fi.CI.IGT: success for " Patchwork
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