[igt-dev] [PATCH i-g-t 1/2] tools/vbt_decode: Fix VBT parsing for the PSR section

[igt-dev] [PATCH i-g-t 1/2] tools/vbt_decode: Fix VBT parsing for the PSR section

[Dhinakaran Pandiyan]

A single 32-bit PSR2 training pattern field follows the sixteen element
array of PSR table entries as per VBT spec. But, we incorrectly define
this PSR2 field for each of PSR table entries. The result of this is
that the PSR1 training pattern duration for any panel_type != 0 will be
parsed incorrectly.

Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: José Roberto de Souza <jose.souza@intel.com>
Signed-off-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
---
 tools/intel_vbt_defs.h | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/tools/intel_vbt_defs.h b/tools/intel_vbt_defs.h
index 89ef14ca..c903cda3 100644
--- a/tools/intel_vbt_defs.h
+++ b/tools/intel_vbt_defs.h
@@ -475,13 +475,13 @@ struct psr_table {
 	/* TP wake up time in multiple of 100 */
 	u16 tp1_wakeup_time;
 	u16 tp2_tp3_wakeup_time;
-
-	/* PSR2 TP2/TP3 wakeup time for 16 panels */
-	u32 psr2_tp2_tp3_wakeup_time;
 } __packed;
 
 struct bdb_psr {
 	struct psr_table psr_table[16];
+
+	/* PSR2 TP2/TP3 wakeup time for 16 panels */
+	u32 psr2_tp2_tp3_wakeup_time;
 } __packed;
 
 /*
-- 
2.17.1

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[igt-dev] [PATCH i-g-t 2/2] tooks/vbt_decode: Print PSR2 training pattern durations.

[Dhinakaran Pandiyan]

There is a new field for PSR2 training pattern duration in VBT versions
>= 226, decode that.

Signed-off-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
---
 tools/intel_vbt_decode.c | 11 +++++++++++
 1 file changed, 11 insertions(+)

diff --git a/tools/intel_vbt_decode.c b/tools/intel_vbt_decode.c
index 38eccc48..4004762c 100644
--- a/tools/intel_vbt_decode.c
+++ b/tools/intel_vbt_decode.c
@@ -944,11 +944,13 @@ static void dump_psr(struct context *context,
 {
 	const struct bdb_psr *psr_block = block->data;
 	int i;
+	int psr2_tp_time;
 
 	/* The same block ID was used for something else before? */
 	if (context->bdb->version < 165)
 		return;
 
+	psr2_tp_time = psr_block->psr2_tp2_tp3_wakeup_time;
 	for (i = 0; i < 16; i++) {
 		const struct psr_table *psr = &psr_block->psr_table[i];
 
@@ -987,6 +989,15 @@ static void dump_psr(struct context *context,
 		printf("\t\tTP2/TP3 wakeup time: %d usec (0x%x)\n",
 		       psr->tp2_tp3_wakeup_time * 100,
 		       psr->tp2_tp3_wakeup_time);
+
+		if (context->bdb->version >= 226) {
+			int index;
+			static const int psr2_tp_times[] = {500, 100, 2500, 5};
+
+			index = (psr2_tp_time >> (i * 2)) & 0x3;
+			printf("\t\tPSR2 TP2/TP3 wakeup time: %d usec (0x%x)\n",
+			       psr2_tp_times[index], index);
+		}
 	}
 }
 
-- 
2.17.1

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[igt-dev] ✓ Fi.CI.BAT: success for series starting with [i-g-t,1/2] tools/vbt_decode: Fix VBT parsing for the PSR section

[Patchwork]

== Series Details ==

Series: series starting with [i-g-t,1/2] tools/vbt_decode: Fix VBT parsing for the PSR section
URL   : https://patchwork.freedesktop.org/series/63842/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_6503 -> IGTPW_3275
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  External URL: https://patchwork.freedesktop.org/api/1.0/series/63842/revisions/1/mbox/

Known issues
------------

  Here are the changes found in IGTPW_3275 that come from known issues:

### IGT changes ###

#### Possible fixes ####

  * igt@kms_chamelium@hdmi-hpd-fast:
    - fi-kbl-7500u:       [FAIL][1] ([fdo#109485]) -> [PASS][2]
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6503/fi-kbl-7500u/igt@kms_chamelium@hdmi-hpd-fast.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3275/fi-kbl-7500u/igt@kms_chamelium@hdmi-hpd-fast.html

  
  [fdo#109485]: https://bugs.freedesktop.org/show_bug.cgi?id=109485


Participating hosts (53 -> 47)
------------------------------

  Additional (2): fi-byt-j1900 fi-cml-u 
  Missing    (8): fi-kbl-soraka fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-icl-y fi-byt-clapper fi-bdw-samus 


Build changes
-------------

  * IGT: IGT_5102 -> IGTPW_3275

  CI_DRM_6503: 40ef4755f8a1f2fc49001b67358dc83c71492d4b @ git://anongit.freedesktop.org/gfx-ci/linux
  IGTPW_3275: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3275/
  IGT_5102: 6038ace76016d8892f4d13aef5301f71ca1a6e2d @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3275/
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[igt-dev] ✗ Fi.CI.IGT: failure for series starting with [i-g-t,1/2] tools/vbt_decode: Fix VBT parsing for the PSR section

[Patchwork]

== Series Details ==

Series: series starting with [i-g-t,1/2] tools/vbt_decode: Fix VBT parsing for the PSR section
URL   : https://patchwork.freedesktop.org/series/63842/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_6503_full -> IGTPW_3275_full
====================================================

Summary
-------

  **FAILURE**

  Serious unknown changes coming with IGTPW_3275_full absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in IGTPW_3275_full, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  External URL: https://patchwork.freedesktop.org/api/1.0/series/63842/revisions/1/mbox/

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in IGTPW_3275_full:

### IGT changes ###

#### Possible regressions ####

  * igt@i915_suspend@debugfs-reader:
    - shard-iclb:         [PASS][1] -> [DMESG-WARN][2]
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6503/shard-iclb1/igt@i915_suspend@debugfs-reader.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3275/shard-iclb2/igt@i915_suspend@debugfs-reader.html

  
Known issues
------------

  Here are the changes found in IGTPW_3275_full that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@i915_selftest@live_hangcheck:
    - shard-iclb:         [PASS][3] -> [INCOMPLETE][4] ([fdo#107713] / [fdo#108569])
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6503/shard-iclb5/igt@i915_selftest@live_hangcheck.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3275/shard-iclb5/igt@i915_selftest@live_hangcheck.html

  * igt@i915_suspend@fence-restore-tiled2untiled:
    - shard-apl:          [PASS][5] -> [DMESG-WARN][6] ([fdo#108566]) +3 similar issues
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6503/shard-apl1/igt@i915_suspend@fence-restore-tiled2untiled.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3275/shard-apl1/igt@i915_suspend@fence-restore-tiled2untiled.html

  * igt@kms_cursor_legacy@2x-long-cursor-vs-flip-legacy:
    - shard-hsw:          [PASS][7] -> [FAIL][8] ([fdo#105767])
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6503/shard-hsw1/igt@kms_cursor_legacy@2x-long-cursor-vs-flip-legacy.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3275/shard-hsw1/igt@kms_cursor_legacy@2x-long-cursor-vs-flip-legacy.html

  * igt@kms_flip@2x-modeset-vs-vblank-race-interruptible:
    - shard-glk:          [PASS][9] -> [FAIL][10] ([fdo#103060])
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6503/shard-glk3/igt@kms_flip@2x-modeset-vs-vblank-race-interruptible.html
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3275/shard-glk8/igt@kms_flip@2x-modeset-vs-vblank-race-interruptible.html

  * igt@kms_frontbuffer_tracking@fbc-badstride:
    - shard-iclb:         [PASS][11] -> [FAIL][12] ([fdo#103167]) +4 similar issues
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6503/shard-iclb1/igt@kms_frontbuffer_tracking@fbc-badstride.html
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3275/shard-iclb4/igt@kms_frontbuffer_tracking@fbc-badstride.html

  * igt@kms_frontbuffer_tracking@fbc-suspend:
    - shard-kbl:          [PASS][13] -> [DMESG-WARN][14] ([fdo#108566]) +1 similar issue
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6503/shard-kbl2/igt@kms_frontbuffer_tracking@fbc-suspend.html
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3275/shard-kbl7/igt@kms_frontbuffer_tracking@fbc-suspend.html

  * igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a:
    - shard-kbl:          [PASS][15] -> [INCOMPLETE][16] ([fdo#103665])
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6503/shard-kbl1/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a.html
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3275/shard-kbl4/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a.html

  * igt@kms_plane@pixel-format-pipe-b-planes-source-clamping:
    - shard-iclb:         [PASS][17] -> [INCOMPLETE][18] ([fdo#107713] / [fdo#110036 ])
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6503/shard-iclb4/igt@kms_plane@pixel-format-pipe-b-planes-source-clamping.html
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3275/shard-iclb6/igt@kms_plane@pixel-format-pipe-b-planes-source-clamping.html

  * igt@kms_plane_lowres@pipe-a-tiling-y:
    - shard-iclb:         [PASS][19] -> [FAIL][20] ([fdo#103166])
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6503/shard-iclb3/igt@kms_plane_lowres@pipe-a-tiling-y.html
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3275/shard-iclb8/igt@kms_plane_lowres@pipe-a-tiling-y.html

  * igt@kms_psr2_su@frontbuffer:
    - shard-iclb:         [PASS][21] -> [SKIP][22] ([fdo#109642] / [fdo#111068])
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6503/shard-iclb2/igt@kms_psr2_su@frontbuffer.html
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3275/shard-iclb7/igt@kms_psr2_su@frontbuffer.html

  * igt@perf_pmu@rc6:
    - shard-kbl:          [PASS][23] -> [SKIP][24] ([fdo#109271])
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6503/shard-kbl6/igt@perf_pmu@rc6.html
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3275/shard-kbl7/igt@perf_pmu@rc6.html
    - shard-iclb:         [PASS][25] -> [SKIP][26] ([fdo#110877])
   [25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6503/shard-iclb2/igt@perf_pmu@rc6.html
   [26]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3275/shard-iclb8/igt@perf_pmu@rc6.html

  
#### Possible fixes ####

  * igt@gem_ctx_isolation@bcs0-s3:
    - shard-kbl:          [DMESG-WARN][27] ([fdo#108566]) -> [PASS][28] +3 similar issues
   [27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6503/shard-kbl7/igt@gem_ctx_isolation@bcs0-s3.html
   [28]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3275/shard-kbl1/igt@gem_ctx_isolation@bcs0-s3.html

  * igt@kms_cursor_legacy@2x-long-cursor-vs-flip-atomic:
    - shard-hsw:          [FAIL][29] ([fdo#105767]) -> [PASS][30]
   [29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6503/shard-hsw8/igt@kms_cursor_legacy@2x-long-cursor-vs-flip-atomic.html
   [30]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3275/shard-hsw8/igt@kms_cursor_legacy@2x-long-cursor-vs-flip-atomic.html

  * igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions:
    - shard-hsw:          [INCOMPLETE][31] ([fdo#103540]) -> [PASS][32]
   [31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6503/shard-hsw4/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html
   [32]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3275/shard-hsw2/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html

  * igt@kms_flip@2x-flip-vs-expired-vblank:
    - shard-hsw:          [FAIL][33] ([fdo#102887]) -> [PASS][34]
   [33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6503/shard-hsw7/igt@kms_flip@2x-flip-vs-expired-vblank.html
   [34]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3275/shard-hsw1/igt@kms_flip@2x-flip-vs-expired-vblank.html

  * igt@kms_flip@flip-vs-suspend:
    - shard-apl:          [DMESG-WARN][35] ([fdo#108566]) -> [PASS][36]
   [35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6503/shard-apl7/igt@kms_flip@flip-vs-suspend.html
   [36]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3275/shard-apl6/igt@kms_flip@flip-vs-suspend.html

  * igt@kms_flip@flip-vs-suspend-interruptible:
    - shard-snb:          [INCOMPLETE][37] ([fdo#105411]) -> [PASS][38]
   [37]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6503/shard-snb1/igt@kms_flip@flip-vs-suspend-interruptible.html
   [38]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3275/shard-snb4/igt@kms_flip@flip-vs-suspend-interruptible.html

  * igt@kms_flip@plain-flip-ts-check-interruptible:
    - shard-apl:          [FAIL][39] ([fdo#100368]) -> [PASS][40]
   [39]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6503/shard-apl7/igt@kms_flip@plain-flip-ts-check-interruptible.html
   [40]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3275/shard-apl2/igt@kms_flip@plain-flip-ts-check-interruptible.html

  * igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-shrfb-draw-pwrite:
    - shard-iclb:         [FAIL][41] ([fdo#103167]) -> [PASS][42] +4 similar issues
   [41]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6503/shard-iclb4/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-shrfb-draw-pwrite.html
   [42]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3275/shard-iclb3/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-shrfb-draw-pwrite.html

  * igt@kms_psr@psr2_primary_page_flip:
    - shard-iclb:         [SKIP][43] ([fdo#109441]) -> [PASS][44] +2 similar issues
   [43]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6503/shard-iclb3/igt@kms_psr@psr2_primary_page_flip.html
   [44]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3275/shard-iclb2/igt@kms_psr@psr2_primary_page_flip.html

  
#### Warnings ####

  * igt@kms_dp_dsc@basic-dsc-enable-edp:
    - shard-iclb:         [SKIP][45] ([fdo#109349]) -> [DMESG-WARN][46] ([fdo#107724])
   [45]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6503/shard-iclb5/igt@kms_dp_dsc@basic-dsc-enable-edp.html
   [46]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3275/shard-iclb2/igt@kms_dp_dsc@basic-dsc-enable-edp.html

  
  [fdo#100368]: https://bugs.freedesktop.org/show_bug.cgi?id=100368
  [fdo#102887]: https://bugs.freedesktop.org/show_bug.cgi?id=102887
  [fdo#103060]: https://bugs.freedesktop.org/show_bug.cgi?id=103060
  [fdo#103166]: https://bugs.freedesktop.org/show_bug.cgi?id=103166
  [fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167
  [fdo#103540]: https://bugs.freedesktop.org/show_bug.cgi?id=103540
  [fdo#103665]: https://bugs.freedesktop.org/show_bug.cgi?id=103665
  [fdo#105411]: https://bugs.freedesktop.org/show_bug.cgi?id=105411
  [fdo#105767]: https://bugs.freedesktop.org/show_bug.cgi?id=105767
  [fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713
  [fdo#107724]: https://bugs.freedesktop.org/show_bug.cgi?id=107724
  [fdo#108566]: https://bugs.freedesktop.org/show_bug.cgi?id=108566
  [fdo#108569]: https://bugs.freedesktop.org/show_bug.cgi?id=108569
  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [fdo#109349]: https://bugs.freedesktop.org/show_bug.cgi?id=109349
  [fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441
  [fdo#109642]: https://bugs.freedesktop.org/show_bug.cgi?id=109642
  [fdo#110036 ]: https://bugs.freedesktop.org/show_bug.cgi?id=110036 
  [fdo#110877]: https://bugs.freedesktop.org/show_bug.cgi?id=110877
  [fdo#111068]: https://bugs.freedesktop.org/show_bug.cgi?id=111068


Participating hosts (10 -> 6)
------------------------------

  Missing    (4): pig-skl-6260u shard-skl pig-hsw-4770r pig-glk-j5005 


Build changes
-------------

  * IGT: IGT_5102 -> IGTPW_3275
  * Piglit: piglit_4509 -> None

  CI_DRM_6503: 40ef4755f8a1f2fc49001b67358dc83c71492d4b @ git://anongit.freedesktop.org/gfx-ci/linux
  IGTPW_3275: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3275/
  IGT_5102: 6038ace76016d8892f4d13aef5301f71ca1a6e2d @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3275/
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Re: [igt-dev] [PATCH i-g-t 1/2] tools/vbt_decode: Fix VBT parsing for the PSR section

[Ville Syrjälä]

On Wed, Jul 17, 2019 at 05:43:30PM -0700, Dhinakaran Pandiyan wrote:
> A single 32-bit PSR2 training pattern field follows the sixteen element
> array of PSR table entries as per VBT spec. But, we incorrectly define
> this PSR2 field for each of PSR table entries. The result of this is
> that the PSR1 training pattern duration for any panel_type != 0 will be
> parsed incorrectly.
> 
> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Cc: José Roberto de Souza <jose.souza@intel.com>
> Signed-off-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>

Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

> ---
>  tools/intel_vbt_defs.h | 6 +++---
>  1 file changed, 3 insertions(+), 3 deletions(-)
> 
> diff --git a/tools/intel_vbt_defs.h b/tools/intel_vbt_defs.h
> index 89ef14ca..c903cda3 100644
> --- a/tools/intel_vbt_defs.h
> +++ b/tools/intel_vbt_defs.h
> @@ -475,13 +475,13 @@ struct psr_table {
>  	/* TP wake up time in multiple of 100 */
>  	u16 tp1_wakeup_time;
>  	u16 tp2_tp3_wakeup_time;
> -
> -	/* PSR2 TP2/TP3 wakeup time for 16 panels */
> -	u32 psr2_tp2_tp3_wakeup_time;
>  } __packed;
>  
>  struct bdb_psr {
>  	struct psr_table psr_table[16];
> +
> +	/* PSR2 TP2/TP3 wakeup time for 16 panels */
> +	u32 psr2_tp2_tp3_wakeup_time;
>  } __packed;
>  
>  /*
> -- 
> 2.17.1

-- 
Ville Syrjälä
Intel
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Re: [igt-dev] [PATCH i-g-t 2/2] tooks/vbt_decode: Print PSR2 training pattern durations.

[Ville Syrjälä]

On Wed, Jul 17, 2019 at 05:43:31PM -0700, Dhinakaran Pandiyan wrote:
> There is a new field for PSR2 training pattern duration in VBT versions
> >= 226, decode that.
> 
> Signed-off-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
> ---
>  tools/intel_vbt_decode.c | 11 +++++++++++
>  1 file changed, 11 insertions(+)
> 
> diff --git a/tools/intel_vbt_decode.c b/tools/intel_vbt_decode.c
> index 38eccc48..4004762c 100644
> --- a/tools/intel_vbt_decode.c
> +++ b/tools/intel_vbt_decode.c
> @@ -944,11 +944,13 @@ static void dump_psr(struct context *context,
>  {
>  	const struct bdb_psr *psr_block = block->data;
>  	int i;
> +	int psr2_tp_time;

uint32_t

>  
>  	/* The same block ID was used for something else before? */
>  	if (context->bdb->version < 165)
>  		return;
>  
> +	psr2_tp_time = psr_block->psr2_tp2_tp3_wakeup_time;
>  	for (i = 0; i < 16; i++) {
>  		const struct psr_table *psr = &psr_block->psr_table[i];
>  
> @@ -987,6 +989,15 @@ static void dump_psr(struct context *context,
>  		printf("\t\tTP2/TP3 wakeup time: %d usec (0x%x)\n",
>  		       psr->tp2_tp3_wakeup_time * 100,
>  		       psr->tp2_tp3_wakeup_time);
> +
> +		if (context->bdb->version >= 226) {
> +			int index;
> +			static const int psr2_tp_times[] = {500, 100, 2500, 5};

Everthing fits into uint16_t.

Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

Oh, and the psr1 parsing doesn't seem to be following this silly
new style of putting the hw register value directly into the vbt.
Would be nice to fix that too. Actually, since the spec is a mess
and it's not 100% clear which VBTs might follow which style maybe
we should in fact decode both ways?

> +
> +			index = (psr2_tp_time >> (i * 2)) & 0x3;
> +			printf("\t\tPSR2 TP2/TP3 wakeup time: %d usec (0x%x)\n",
> +			       psr2_tp_times[index], index);
> +		}
>  	}
>  }
>  
> -- 
> 2.17.1
> 
> _______________________________________________
> igt-dev mailing list
> igt-dev@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/igt-dev

-- 
Ville Syrjälä
Intel
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[igt-dev] [PATCH i-g-t v2 2/2] tools/vbt_decode: Print PSR2 training pattern duration

[Dhinakaran Pandiyan]

There is a new field for PSR2 training pattern duration in VBT versions
>= 226, decode that.

v2: Changed to fixed-width types(Ville)

Signed-off-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 tools/intel_vbt_decode.c | 11 +++++++++++
 1 file changed, 11 insertions(+)

diff --git a/tools/intel_vbt_decode.c b/tools/intel_vbt_decode.c
index 38eccc48..3b9006f5 100644
--- a/tools/intel_vbt_decode.c
+++ b/tools/intel_vbt_decode.c
@@ -944,11 +944,13 @@ static void dump_psr(struct context *context,
 {
 	const struct bdb_psr *psr_block = block->data;
 	int i;
+	uint32_t psr2_tp_time;
 
 	/* The same block ID was used for something else before? */
 	if (context->bdb->version < 165)
 		return;
 
+	psr2_tp_time = psr_block->psr2_tp2_tp3_wakeup_time;
 	for (i = 0; i < 16; i++) {
 		const struct psr_table *psr = &psr_block->psr_table[i];
 
@@ -987,6 +989,15 @@ static void dump_psr(struct context *context,
 		printf("\t\tTP2/TP3 wakeup time: %d usec (0x%x)\n",
 		       psr->tp2_tp3_wakeup_time * 100,
 		       psr->tp2_tp3_wakeup_time);
+
+		if (context->bdb->version >= 226) {
+			int index;
+			static const uint16_t psr2_tp_times[] = {500, 100, 2500, 5};
+
+			index = (psr2_tp_time >> (i * 2)) & 0x3;
+			printf("\t\tPSR2 TP2/TP3 wakeup time: %d usec (0x%x)\n",
+			       psr2_tp_times[index], index);
+		}
 	}
 }
 
-- 
2.17.1

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Re: [igt-dev] [PATCH i-g-t 2/2] tooks/vbt_decode: Print PSR2 training pattern durations.

[Dhinakaran Pandiyan]

On Thu, 2019-07-18 at 14:35 +0300, Ville Syrjälä wrote:
> On Wed, Jul 17, 2019 at 05:43:31PM -0700, Dhinakaran Pandiyan wrote:
> > There is a new field for PSR2 training pattern duration in VBT versions
> > > = 226, decode that.
> > 
> > Signed-off-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
> > ---
> >  tools/intel_vbt_decode.c | 11 +++++++++++
> >  1 file changed, 11 insertions(+)
> > 
> > diff --git a/tools/intel_vbt_decode.c b/tools/intel_vbt_decode.c
> > index 38eccc48..4004762c 100644
> > --- a/tools/intel_vbt_decode.c
> > +++ b/tools/intel_vbt_decode.c
> > @@ -944,11 +944,13 @@ static void dump_psr(struct context *context,
> >  {
> >  	const struct bdb_psr *psr_block = block->data;
> >  	int i;
> > +	int psr2_tp_time;
> 
> uint32_t
> 
> >  
> >  	/* The same block ID was used for something else before? */
> >  	if (context->bdb->version < 165)
> >  		return;
> >  
> > +	psr2_tp_time = psr_block->psr2_tp2_tp3_wakeup_time;
> >  	for (i = 0; i < 16; i++) {
> >  		const struct psr_table *psr = &psr_block->psr_table[i];
> >  
> > @@ -987,6 +989,15 @@ static void dump_psr(struct context *context,
> >  		printf("\t\tTP2/TP3 wakeup time: %d usec (0x%x)\n",
> >  		       psr->tp2_tp3_wakeup_time * 100,
> >  		       psr->tp2_tp3_wakeup_time);
> > +
> > +		if (context->bdb->version >= 226) {
> > +			int index;
> > +			static const int psr2_tp_times[] = {500, 100, 2500, 5};
> 
> Everthing fits into uint16_t.
Do we want a fixed-width type for values that are not read from/written to HW?
I changed it in the second version anyway. 
> 
> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> Oh, and the psr1 parsing doesn't seem to be following this silly
> new style of putting the hw register value directly into the vbt.
> Would be nice to fix that too. Actually, since the spec is a mess
> and it's not 100% clear which VBTs might follow which style maybe
> we should in fact decode both ways?
I thought of fixing it, but left it alone because it is a mess as you said.
Are suggesting something like this - "TP2/TP3 wakeup time: 200 usec/2500 usec (0x02)"?
I feel the ambiguity makes decoding useless as it requires someone to go read
the driver code to know what will get programmed. Might as well avoid decoding and
just print the raw value. The other option is to replicate the platform checks used in
the driver.

-DK

> 
> > +
> > +			index = (psr2_tp_time >> (i * 2)) & 0x3;
> > +			printf("\t\tPSR2 TP2/TP3 wakeup time: %d usec (0x%x)\n",
> > +			       psr2_tp_times[index], index);
> > +		}
> >  	}
> >  }
> >  
> > -- 
> > 2.17.1
> > 
> > _______________________________________________
> > igt-dev mailing list
> > igt-dev@lists.freedesktop.org
> > https://lists.freedesktop.org/mailman/listinfo/igt-dev
> 
> 

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Re: [igt-dev] [PATCH i-g-t 2/2] tooks/vbt_decode: Print PSR2 training pattern durations.

[Ville Syrjälä]

On Fri, Jul 19, 2019 at 08:12:07AM -0700, Dhinakaran Pandiyan wrote:
> On Thu, 2019-07-18 at 14:35 +0300, Ville Syrjälä wrote:
> > On Wed, Jul 17, 2019 at 05:43:31PM -0700, Dhinakaran Pandiyan wrote:
> > > There is a new field for PSR2 training pattern duration in VBT versions
> > > > = 226, decode that.
> > > 
> > > Signed-off-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
> > > ---
> > >  tools/intel_vbt_decode.c | 11 +++++++++++
> > >  1 file changed, 11 insertions(+)
> > > 
> > > diff --git a/tools/intel_vbt_decode.c b/tools/intel_vbt_decode.c
> > > index 38eccc48..4004762c 100644
> > > --- a/tools/intel_vbt_decode.c
> > > +++ b/tools/intel_vbt_decode.c
> > > @@ -944,11 +944,13 @@ static void dump_psr(struct context *context,
> > >  {
> > >  	const struct bdb_psr *psr_block = block->data;
> > >  	int i;
> > > +	int psr2_tp_time;
> > 
> > uint32_t
> > 
> > >  
> > >  	/* The same block ID was used for something else before? */
> > >  	if (context->bdb->version < 165)
> > >  		return;
> > >  
> > > +	psr2_tp_time = psr_block->psr2_tp2_tp3_wakeup_time;
> > >  	for (i = 0; i < 16; i++) {
> > >  		const struct psr_table *psr = &psr_block->psr_table[i];
> > >  
> > > @@ -987,6 +989,15 @@ static void dump_psr(struct context *context,
> > >  		printf("\t\tTP2/TP3 wakeup time: %d usec (0x%x)\n",
> > >  		       psr->tp2_tp3_wakeup_time * 100,
> > >  		       psr->tp2_tp3_wakeup_time);
> > > +
> > > +		if (context->bdb->version >= 226) {
> > > +			int index;
> > > +			static const int psr2_tp_times[] = {500, 100, 2500, 5};
> > 
> > Everthing fits into uint16_t.
> Do we want a fixed-width type for values that are not read from/written to HW?
> I changed it in the second version anyway. 
> > 
> > Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > 
> > Oh, and the psr1 parsing doesn't seem to be following this silly
> > new style of putting the hw register value directly into the vbt.
> > Would be nice to fix that too. Actually, since the spec is a mess
> > and it's not 100% clear which VBTs might follow which style maybe
> > we should in fact decode both ways?
> I thought of fixing it, but left it alone because it is a mess as you said.
> Are suggesting something like this - "TP2/TP3 wakeup time: 200 usec/2500 usec (0x02)"?

Yeah something like that, but with maybe a bit more verbosity to explain
the two values.

> I feel the ambiguity makes decoding useless as it requires someone to go read
> the driver code to know what will get programmed. Might as well avoid decoding and
> just print the raw value. The other option is to replicate the platform checks used in
> the driver.

I don't think we have platform infomation beyond what the
signature + version gives us. And IIRC all SKL derivatives
use the  "$VBT SKYLAKE" signature so we can't actually tell
those apart. So I guess we'd just have to decode based on
the version number for all those.

But maybe we can tell BXT apart from the rest based on the
signature?

So we could do:
if !BXT && v >= 205
	new deocde
else
	old decode

-- 
Ville Syrjälä
Intel
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[igt-dev] ✓ Fi.CI.BAT: success for series starting with [i-g-t,1/2] tools/vbt_decode: Fix VBT parsing for the PSR section (rev2)

[Patchwork]

== Series Details ==

Series: series starting with [i-g-t,1/2] tools/vbt_decode: Fix VBT parsing for the PSR section (rev2)
URL   : https://patchwork.freedesktop.org/series/63842/
State : success

== Summary ==

CI Bug Log - changes from IGT_5104 -> IGTPW_3281
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  External URL: https://patchwork.freedesktop.org/api/1.0/series/63842/revisions/2/mbox/

Known issues
------------

  Here are the changes found in IGTPW_3281 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@kms_chamelium@hdmi-hpd-fast:
    - fi-kbl-7500u:       [PASS][1] -> [FAIL][2] ([fdo#109485])
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5104/fi-kbl-7500u/igt@kms_chamelium@hdmi-hpd-fast.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3281/fi-kbl-7500u/igt@kms_chamelium@hdmi-hpd-fast.html
    - fi-kbl-7567u:       [PASS][3] -> [FAIL][4] ([fdo#109485])
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5104/fi-kbl-7567u/igt@kms_chamelium@hdmi-hpd-fast.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3281/fi-kbl-7567u/igt@kms_chamelium@hdmi-hpd-fast.html

  * igt@kms_frontbuffer_tracking@basic:
    - fi-hsw-peppy:       [PASS][5] -> [DMESG-WARN][6] ([fdo#102614])
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5104/fi-hsw-peppy/igt@kms_frontbuffer_tracking@basic.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3281/fi-hsw-peppy/igt@kms_frontbuffer_tracking@basic.html

  
#### Possible fixes ####

  * igt@i915_selftest@live_client:
    - fi-icl-dsi:         [INCOMPLETE][7] ([fdo#107713]) -> [PASS][8]
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5104/fi-icl-dsi/igt@i915_selftest@live_client.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3281/fi-icl-dsi/igt@i915_selftest@live_client.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#102614]: https://bugs.freedesktop.org/show_bug.cgi?id=102614
  [fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713
  [fdo#109100]: https://bugs.freedesktop.org/show_bug.cgi?id=109100
  [fdo#109485]: https://bugs.freedesktop.org/show_bug.cgi?id=109485


Participating hosts (52 -> 46)
------------------------------

  Additional (1): fi-gdg-551 
  Missing    (7): fi-kbl-soraka fi-byt-squawks fi-bsw-cyan fi-whl-u fi-icl-y fi-byt-clapper fi-bdw-samus 


Build changes
-------------

  * IGT: IGT_5104 -> IGTPW_3281

  CI_DRM_6511: dbedd493118204a194fbc480f86866ddebbc4723 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGTPW_3281: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3281/
  IGT_5104: 10288a94dccead63efbd59d872c8c4ce9cf19788 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3281/
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Re: [igt-dev] [PATCH i-g-t 2/2] tooks/vbt_decode: Print PSR2 training pattern durations.

[Ville Syrjälä]

On Fri, Jul 19, 2019 at 08:12:07AM -0700, Dhinakaran Pandiyan wrote:
> On Thu, 2019-07-18 at 14:35 +0300, Ville Syrjälä wrote:
> > On Wed, Jul 17, 2019 at 05:43:31PM -0700, Dhinakaran Pandiyan wrote:
> > > There is a new field for PSR2 training pattern duration in VBT versions
> > > > = 226, decode that.
> > > 
> > > Signed-off-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
> > > ---
> > >  tools/intel_vbt_decode.c | 11 +++++++++++
> > >  1 file changed, 11 insertions(+)
> > > 
> > > diff --git a/tools/intel_vbt_decode.c b/tools/intel_vbt_decode.c
> > > index 38eccc48..4004762c 100644
> > > --- a/tools/intel_vbt_decode.c
> > > +++ b/tools/intel_vbt_decode.c
> > > @@ -944,11 +944,13 @@ static void dump_psr(struct context *context,
> > >  {
> > >  	const struct bdb_psr *psr_block = block->data;
> > >  	int i;
> > > +	int psr2_tp_time;
> > 
> > uint32_t
> > 
> > >  
> > >  	/* The same block ID was used for something else before? */
> > >  	if (context->bdb->version < 165)
> > >  		return;
> > >  
> > > +	psr2_tp_time = psr_block->psr2_tp2_tp3_wakeup_time;
> > >  	for (i = 0; i < 16; i++) {
> > >  		const struct psr_table *psr = &psr_block->psr_table[i];
> > >  
> > > @@ -987,6 +989,15 @@ static void dump_psr(struct context *context,
> > >  		printf("\t\tTP2/TP3 wakeup time: %d usec (0x%x)\n",
> > >  		       psr->tp2_tp3_wakeup_time * 100,
> > >  		       psr->tp2_tp3_wakeup_time);
> > > +
> > > +		if (context->bdb->version >= 226) {
> > > +			int index;
> > > +			static const int psr2_tp_times[] = {500, 100, 2500, 5};
> > 
> > Everthing fits into uint16_t.
> Do we want a fixed-width type for values that are not read from/written to HW?
> I changed it in the second version anyway. 

The field in the VBT has a fixed size, hence the uint32_t. And as for
the array, I generally just minimize their size.

-- 
Ville Syrjälä
Intel
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Re: [igt-dev] [PATCH i-g-t 2/2] tooks/vbt_decode: Print PSR2 training pattern durations.

[Pandiyan, Dhinakaran]

> -----Original Message-----
> From: Ville Syrjälä [mailto:ville.syrjala@linux.intel.com]
> Sent: Friday, July 19, 2019 9:18 AM
> To: Pandiyan, Dhinakaran <dhinakaran.pandiyan@intel.com>
> Cc: igt-dev@lists.freedesktop.org
> Subject: Re: [igt-dev] [PATCH i-g-t 2/2] tooks/vbt_decode: Print PSR2
> training pattern durations.
> 
> On Fri, Jul 19, 2019 at 08:12:07AM -0700, Dhinakaran Pandiyan wrote:
> > On Thu, 2019-07-18 at 14:35 +0300, Ville Syrjälä wrote:
> > > On Wed, Jul 17, 2019 at 05:43:31PM -0700, Dhinakaran Pandiyan wrote:
> > > > There is a new field for PSR2 training pattern duration in VBT
> versions
> > > > > = 226, decode that.
> > > >
> > > > Signed-off-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
> > > > ---
> > > >  tools/intel_vbt_decode.c | 11 +++++++++++
> > > >  1 file changed, 11 insertions(+)
> > > >
> > > > diff --git a/tools/intel_vbt_decode.c b/tools/intel_vbt_decode.c
> > > > index 38eccc48..4004762c 100644
> > > > --- a/tools/intel_vbt_decode.c
> > > > +++ b/tools/intel_vbt_decode.c
> > > > @@ -944,11 +944,13 @@ static void dump_psr(struct context *context,
> > > >  {
> > > >  	const struct bdb_psr *psr_block = block->data;
> > > >  	int i;
> > > > +	int psr2_tp_time;
> > >
> > > uint32_t
> > >
> > > >
> > > >  	/* The same block ID was used for something else before? */
> > > >  	if (context->bdb->version < 165)
> > > >  		return;
> > > >
> > > > +	psr2_tp_time = psr_block->psr2_tp2_tp3_wakeup_time;
> > > >  	for (i = 0; i < 16; i++) {
> > > >  		const struct psr_table *psr = &psr_block->psr_table[i];
> > > >
> > > > @@ -987,6 +989,15 @@ static void dump_psr(struct context *context,
> > > >  		printf("\t\tTP2/TP3 wakeup time: %d usec (0x%x)\n",
> > > >  		       psr->tp2_tp3_wakeup_time * 100,
> > > >  		       psr->tp2_tp3_wakeup_time);
> > > > +
> > > > +		if (context->bdb->version >= 226) {
> > > > +			int index;
> > > > +			static const int psr2_tp_times[] = {500, 100,
> 2500, 5};
> > >
> > > Everthing fits into uint16_t.
> > Do we want a fixed-width type for values that are not read from/written to
> HW?
> > I changed it in the second version anyway.
> 
> The field in the VBT has a fixed size, hence the uint32_t. And as for
> the array, I generally just minimize their size.
I was curious about the array specifically, thanks for the reviews.

-DK
> 
> --
> Ville Syrjälä
> Intel
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Re: [igt-dev] [PATCH i-g-t 2/2] tooks/vbt_decode: Print PSR2 training pattern durations.

[Dhinakaran Pandiyan]

On Fri, 2019-07-19 at 19:15 +0300, Ville Syrjälä wrote:
> On Fri, Jul 19, 2019 at 08:12:07AM -0700, Dhinakaran Pandiyan wrote:
> > On Thu, 2019-07-18 at 14:35 +0300, Ville Syrjälä wrote:
> > > On Wed, Jul 17, 2019 at 05:43:31PM -0700, Dhinakaran Pandiyan wrote:
> > > > There is a new field for PSR2 training pattern duration in VBT versions
> > > > > = 226, decode that.
> > > > 
> > > > Signed-off-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
> > > > ---
> > > >  tools/intel_vbt_decode.c | 11 +++++++++++
> > > >  1 file changed, 11 insertions(+)
> > > > 
> > > > diff --git a/tools/intel_vbt_decode.c b/tools/intel_vbt_decode.c
> > > > index 38eccc48..4004762c 100644
> > > > --- a/tools/intel_vbt_decode.c
> > > > +++ b/tools/intel_vbt_decode.c
> > > > @@ -944,11 +944,13 @@ static void dump_psr(struct context *context,
> > > >  {
> > > >  	const struct bdb_psr *psr_block = block->data;
> > > >  	int i;
> > > > +	int psr2_tp_time;
> > > 
> > > uint32_t
> > > 
> > > >  
> > > >  	/* The same block ID was used for something else before? */
> > > >  	if (context->bdb->version < 165)
> > > >  		return;
> > > >  
> > > > +	psr2_tp_time = psr_block->psr2_tp2_tp3_wakeup_time;
> > > >  	for (i = 0; i < 16; i++) {
> > > >  		const struct psr_table *psr = &psr_block->psr_table[i];
> > > >  
> > > > @@ -987,6 +989,15 @@ static void dump_psr(struct context *context,
> > > >  		printf("\t\tTP2/TP3 wakeup time: %d usec (0x%x)\n",
> > > >  		       psr->tp2_tp3_wakeup_time * 100,
> > > >  		       psr->tp2_tp3_wakeup_time);
> > > > +
> > > > +		if (context->bdb->version >= 226) {
> > > > +			int index;
> > > > +			static const int psr2_tp_times[] = {500, 100, 2500, 5};
> > > 
> > > Everthing fits into uint16_t.
> > 
> > Do we want a fixed-width type for values that are not read from/written to HW?
> > I changed it in the second version anyway. 
> > > 
> > > Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > > 
> > > Oh, and the psr1 parsing doesn't seem to be following this silly
> > > new style of putting the hw register value directly into the vbt.
> > > Would be nice to fix that too. Actually, since the spec is a mess
> > > and it's not 100% clear which VBTs might follow which style maybe
> > > we should in fact decode both ways?
> > 
> > I thought of fixing it, but left it alone because it is a mess as you said.
> > Are suggesting something like this - "TP2/TP3 wakeup time: 200 usec/2500 usec (0x02)"?
> 
> Yeah something like that, but with maybe a bit more verbosity to explain
> the two values.
> 
> > I feel the ambiguity makes decoding useless as it requires someone to go read
> > the driver code to know what will get programmed. Might as well avoid decoding and
> > just print the raw value. The other option is to replicate the platform checks used in
> > the driver.
> 
> I don't think we have platform infomation beyond what the
> signature + version gives us. And IIRC all SKL derivatives
> use the  "$VBT SKYLAKE" signature so we can't actually tell
> those apart. So I guess we'd just have to decode based on
> the version number for all those.
> 
> But maybe we can tell BXT apart from the rest based on the
> signature?
> 
> So we could do:
> if !BXT && v >= 205
> 	new deocde
> else
> 	old decode

I like this better. Got a BXT to see what the signature actually looks like, "$VBT BROXTON" it is.

-DK
> 

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[igt-dev] ✓ Fi.CI.IGT: success for series starting with [i-g-t,1/2] tools/vbt_decode: Fix VBT parsing for the PSR section (rev2)

[Patchwork]

== Series Details ==

Series: series starting with [i-g-t,1/2] tools/vbt_decode: Fix VBT parsing for the PSR section (rev2)
URL   : https://patchwork.freedesktop.org/series/63842/
State : success

== Summary ==

CI Bug Log - changes from IGT_5104_full -> IGTPW_3281_full
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  External URL: https://patchwork.freedesktop.org/api/1.0/series/63842/revisions/2/mbox/

Known issues
------------

  Here are the changes found in IGTPW_3281_full that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@i915_suspend@forcewake:
    - shard-kbl:          [PASS][1] -> [INCOMPLETE][2] ([fdo#103665])
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5104/shard-kbl6/igt@i915_suspend@forcewake.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3281/shard-kbl4/igt@i915_suspend@forcewake.html

  * igt@kms_cursor_crc@pipe-b-cursor-256x256-onscreen:
    - shard-kbl:          [PASS][3] -> [FAIL][4] ([fdo#103232])
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5104/shard-kbl6/igt@kms_cursor_crc@pipe-b-cursor-256x256-onscreen.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3281/shard-kbl1/igt@kms_cursor_crc@pipe-b-cursor-256x256-onscreen.html
    - shard-apl:          [PASS][5] -> [FAIL][6] ([fdo#103232])
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5104/shard-apl4/igt@kms_cursor_crc@pipe-b-cursor-256x256-onscreen.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3281/shard-apl2/igt@kms_cursor_crc@pipe-b-cursor-256x256-onscreen.html

  * igt@kms_flip@flip-vs-suspend:
    - shard-snb:          [PASS][7] -> [INCOMPLETE][8] ([fdo#105411])
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5104/shard-snb6/igt@kms_flip@flip-vs-suspend.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3281/shard-snb1/igt@kms_flip@flip-vs-suspend.html

  * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-blt:
    - shard-iclb:         [PASS][9] -> [FAIL][10] ([fdo#103167]) +7 similar issues
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5104/shard-iclb7/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-blt.html
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3281/shard-iclb2/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-blt.html

  * igt@kms_psr@psr2_basic:
    - shard-iclb:         [PASS][11] -> [SKIP][12] ([fdo#109441]) +1 similar issue
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5104/shard-iclb2/igt@kms_psr@psr2_basic.html
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3281/shard-iclb4/igt@kms_psr@psr2_basic.html

  * igt@kms_setmode@basic:
    - shard-kbl:          [PASS][13] -> [FAIL][14] ([fdo#99912])
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5104/shard-kbl6/igt@kms_setmode@basic.html
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3281/shard-kbl2/igt@kms_setmode@basic.html

  * igt@kms_vblank@pipe-b-ts-continuation-suspend:
    - shard-apl:          [PASS][15] -> [DMESG-WARN][16] ([fdo#108566])
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5104/shard-apl3/igt@kms_vblank@pipe-b-ts-continuation-suspend.html
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3281/shard-apl2/igt@kms_vblank@pipe-b-ts-continuation-suspend.html

  * igt@tools_test@tools_test:
    - shard-apl:          [PASS][17] -> [SKIP][18] ([fdo#109271])
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5104/shard-apl1/igt@tools_test@tools_test.html
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3281/shard-apl8/igt@tools_test@tools_test.html

  
#### Possible fixes ####

  * igt@gem_exec_balancer@smoke:
    - shard-iclb:         [SKIP][19] ([fdo#110854]) -> [PASS][20]
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5104/shard-iclb7/igt@gem_exec_balancer@smoke.html
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3281/shard-iclb2/igt@gem_exec_balancer@smoke.html

  * igt@gem_tiled_swapping@non-threaded:
    - shard-apl:          [DMESG-WARN][21] ([fdo#108686]) -> [PASS][22]
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5104/shard-apl3/igt@gem_tiled_swapping@non-threaded.html
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3281/shard-apl2/igt@gem_tiled_swapping@non-threaded.html

  * igt@kms_flip@2x-flip-vs-expired-vblank-interruptible:
    - shard-glk:          [FAIL][23] ([fdo#105363]) -> [PASS][24]
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5104/shard-glk1/igt@kms_flip@2x-flip-vs-expired-vblank-interruptible.html
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3281/shard-glk2/igt@kms_flip@2x-flip-vs-expired-vblank-interruptible.html

  * igt@kms_flip@wf_vblank-ts-check:
    - shard-iclb:         [INCOMPLETE][25] ([fdo#107713]) -> [PASS][26]
   [25]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5104/shard-iclb1/igt@kms_flip@wf_vblank-ts-check.html
   [26]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3281/shard-iclb3/igt@kms_flip@wf_vblank-ts-check.html

  * igt@kms_frontbuffer_tracking@fbcpsr-1p-pri-indfb-multidraw:
    - shard-iclb:         [FAIL][27] ([fdo#103167]) -> [PASS][28] +2 similar issues
   [27]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5104/shard-iclb7/igt@kms_frontbuffer_tracking@fbcpsr-1p-pri-indfb-multidraw.html
   [28]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3281/shard-iclb5/igt@kms_frontbuffer_tracking@fbcpsr-1p-pri-indfb-multidraw.html

  * igt@kms_plane_lowres@pipe-a-tiling-x:
    - shard-iclb:         [FAIL][29] ([fdo#103166]) -> [PASS][30]
   [29]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5104/shard-iclb4/igt@kms_plane_lowres@pipe-a-tiling-x.html
   [30]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3281/shard-iclb6/igt@kms_plane_lowres@pipe-a-tiling-x.html

  * igt@kms_psr@psr2_cursor_render:
    - shard-iclb:         [SKIP][31] ([fdo#109441]) -> [PASS][32]
   [31]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5104/shard-iclb4/igt@kms_psr@psr2_cursor_render.html
   [32]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3281/shard-iclb2/igt@kms_psr@psr2_cursor_render.html

  * igt@kms_setmode@basic:
    - shard-apl:          [FAIL][33] ([fdo#99912]) -> [PASS][34]
   [33]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5104/shard-apl6/igt@kms_setmode@basic.html
   [34]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3281/shard-apl6/igt@kms_setmode@basic.html

  * igt@kms_vblank@pipe-c-ts-continuation-suspend:
    - shard-apl:          [DMESG-WARN][35] ([fdo#108566]) -> [PASS][36] +5 similar issues
   [35]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_5104/shard-apl7/igt@kms_vblank@pipe-c-ts-continuation-suspend.html
   [36]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3281/shard-apl7/igt@kms_vblank@pipe-c-ts-continuation-suspend.html

  
  [fdo#103166]: https://bugs.freedesktop.org/show_bug.cgi?id=103166
  [fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167
  [fdo#103232]: https://bugs.freedesktop.org/show_bug.cgi?id=103232
  [fdo#103665]: https://bugs.freedesktop.org/show_bug.cgi?id=103665
  [fdo#105363]: https://bugs.freedesktop.org/show_bug.cgi?id=105363
  [fdo#105411]: https://bugs.freedesktop.org/show_bug.cgi?id=105411
  [fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713
  [fdo#108566]: https://bugs.freedesktop.org/show_bug.cgi?id=108566
  [fdo#108686]: https://bugs.freedesktop.org/show_bug.cgi?id=108686
  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441
  [fdo#110854]: https://bugs.freedesktop.org/show_bug.cgi?id=110854
  [fdo#99912]: https://bugs.freedesktop.org/show_bug.cgi?id=99912


Participating hosts (7 -> 6)
------------------------------

  Missing    (1): shard-skl 


Build changes
-------------

  * IGT: IGT_5104 -> IGTPW_3281

  CI_DRM_6511: dbedd493118204a194fbc480f86866ddebbc4723 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGTPW_3281: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3281/
  IGT_5104: 10288a94dccead63efbd59d872c8c4ce9cf19788 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3281/
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