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From: Julien Grall <julien.grall@arm.com>
To: xen-devel@lists.xenproject.org
Cc: Julien Grall <julien.grall@arm.com>,
	Stefano Stabellini <sstabellini@kernel.org>,
	Volodymyr Babchuk <Volodymyr_Babchuk@epam.com>
Subject: [Xen-devel] [PATCH v2 31/35] xen/arm32: head: Remove 1:1 mapping as soon as it is not used
Date: Mon, 22 Jul 2019 22:39:54 +0100	[thread overview]
Message-ID: <20190722213958.5761-32-julien.grall@arm.com> (raw)
In-Reply-To: <20190722213958.5761-1-julien.grall@arm.com>

The 1:1 mapping may clash with other parts of the Xen virtual memory
layout. At the moment, Xen is handling the clash by only creating a
mapping to the runtime virtual address before enabling the MMU.

The rest of the mappings (such as the fixmap) will be mapped after the
MMU is enabled. However, the code doing the mapping is not safe as it
replace mapping without using the Break-Before-Make sequence.

As the 1:1 mapping can be anywhere in the memory, it is easier to remove
all the entries added as soon as the 1:1 mapping is not used rather than
adding the Break-Before-Make sequence everywhere.

It is difficult to track where exactly the 1:1 mapping was created
without a full rework of create_page_tables(). Instead, introduce a new
function remove_identity_mapping() will look where is the top-level entry
for the 1:1 mapping and remove it.

The new function is only called for the boot CPU. Secondary CPUs will
switch directly to the runtime page-tables so there are no need to
remove the 1:1 mapping. Note that this still doesn't make the Secondary
CPUs path safe but it is not making it worst.

Signed-off-by: Julien Grall <julien.grall@arm.com>

---
    It is very likely we will need to re-introduce the 1:1 mapping to cater
    secondary CPUs boot and suspend/resume. For now, the attempt is to make
    boot CPU path fully Arm Arm compliant.

    Changes in v2:
        - Patch added
---
 xen/arch/arm/arm32/head.S | 80 +++++++++++++++++++++++++++++++++++++----------
 1 file changed, 64 insertions(+), 16 deletions(-)

diff --git a/xen/arch/arm/arm32/head.S b/xen/arch/arm/arm32/head.S
index 0a5c3a8525..56e2d09ed4 100644
--- a/xen/arch/arm/arm32/head.S
+++ b/xen/arch/arm/arm32/head.S
@@ -158,6 +158,13 @@ past_zImage:
         ldr   r0, =primary_switched
         mov   pc, r0
 primary_switched:
+        /*
+         * The 1:1 map may clash with other parts of the Xen virtual memory
+         * layout. As it is not used anymore, remove it completely to
+         * avoid having to worry about replacing existing mapping
+         * afterwards.
+         */
+        bl    remove_identity_mapping
         bl    setup_fixmap
 #ifdef CONFIG_EARLY_PRINTK
         /* Use a virtual address to access the UART. */
@@ -474,12 +481,62 @@ enable_mmu:
         mov   pc, lr
 ENDPROC(enable_mmu)
 
-setup_fixmap:
+/*
+ * Remove the 1:1 map for the page-tables. It is not easy to keep track
+ * where the 1:1 map was mapped, so we will look for the top-level entry
+ * exclusive to the 1:1 map and remove it.
+ *
+ * Inputs:
+ *   r9 : paddr(start)
+ *
+ * Clobbers r0 - r3
+ */
+remove_identity_mapping:
+        /* r2:r3 := invalid page-table entry */
+        mov   r2, #0x0
+        mov   r3, #0x0
         /*
-         * Now we can install the fixmap and dtb mappings, since we
-         * don't need the 1:1 map any more
+         * Find the first slot used. Remove the entry for the first
+         * table if the slot is not 0. For slot 0, the 1:1 mapping was
+         * done in the second table.
          */
-        dsb
+        lsr   r1, r9, #FIRST_SHIFT
+        mov_w r0, LPAE_ENTRY_MASK
+        ands  r1, r1, r0             /* r1 := first slot */
+        beq   1f
+        /* It is not in slot 0, remove the entry */
+        ldr   r0, =boot_pgtable      /* r0 := root table */
+        lsl   r1, r1, #3             /* r1 := Slot offset */
+        strd  r2, r3, [r0, r1]
+        b     identity_mapping_removed
+
+1:
+        /*
+         * Find the second slot used. Remove the entry for the first
+         * table if the slot is not 1 (runtime Xen mapping is 2M - 4M).
+         * For slot 1, it means the 1:1 mapping was not created.
+         */
+        lsr   r1, r9, #SECOND_SHIFT
+        mov_w r0, LPAE_ENTRY_MASK
+        and   r1, r1, r0             /* r1 := second slot */
+        cmp   r1, #1
+        beq   identity_mapping_removed
+        /* It is not in slot 1, remove the entry */
+        ldr   r0, =boot_second       /* r0 := second table */
+        lsl   r1, r1, #3             /* r1 := Slot offset */
+        strd  r2, r3, [r0, r1]
+
+identity_mapping_removed:
+        /* See asm-arm/arm32/flushtlb.h for the explanation of the sequence. */
+        dsb   nshst
+        mcr   CP32(r0, TLBIALLH)
+        dsb   nsh
+        isb
+
+        mov   pc, lr
+ENDPROC(remove_identity_mapping)
+
+setup_fixmap:
 #if defined(CONFIG_EARLY_PRINTK) /* Fixmap is only used by early printk */
         /* Add UART to the fixmap table */
         ldr   r1, =xen_fixmap        /* r1 := vaddr (xen_fixmap) */
@@ -501,19 +558,10 @@ setup_fixmap:
         mov   r4, r4, lsr #(SECOND_SHIFT - 3)   /* r4 := Slot for FIXMAP(0) */
         mov   r3, #0x0
         strd  r2, r3, [r1, r4]       /* Map it in the fixmap's slot */
-#endif
-
-        /*
-         * Flush the TLB in case the 1:1 mapping happens to clash with
-         * the virtual addresses used by the fixmap or DTB.
-         */
-        dsb                          /* Ensure any page table updates made above
-                                      * have occurred. */
 
-        isb
-        mcr   CP32(r0, TLBIALLH)     /* Flush hypervisor TLB */
-        dsb                          /* Ensure completion of TLB flush */
-        isb
+        /* Ensure any page table updates made above have occurred. */
+        dsb   nshst
+#endif
         mov   pc, lr
 ENDPROC(setup_fixmap)
 
-- 
2.11.0


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  parent reply	other threads:[~2019-07-22 21:40 UTC|newest]

Thread overview: 74+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-07-22 21:39 [Xen-devel] [PATCH v2 00/35] xen/arm: Rework head.S to make it more compliant with the Arm Arm Julien Grall
2019-07-22 21:39 ` [Xen-devel] [PATCH v2 01/35] xen/arm64: macros: Introduce an assembly macro to alias x30 Julien Grall
2019-07-26 14:28   ` Volodymyr Babchuk
2019-07-29 23:11   ` Stefano Stabellini
2019-07-22 21:39 ` [Xen-devel] [PATCH v2 02/35] xen/arm64: head: Mark the end of subroutines with ENDPROC Julien Grall
2019-07-22 21:39 ` [Xen-devel] [PATCH v2 03/35] xen/arm64: head: Don't clobber x30/lr in the macro PRINT Julien Grall
2019-07-22 21:39 ` [Xen-devel] [PATCH v2 04/35] xen/arm64: head: Rework UART initialization on boot CPU Julien Grall
2019-07-29 23:19   ` Stefano Stabellini
2019-07-22 21:39 ` [Xen-devel] [PATCH v2 05/35] xen/arm64: head: Introduce print_reg Julien Grall
2019-07-29 23:36   ` Stefano Stabellini
2019-07-22 21:39 ` [Xen-devel] [PATCH v2 06/35] xen/arm64: head: Introduce distinct paths for the boot CPU and secondary CPUs Julien Grall
2019-07-30 17:06   ` Stefano Stabellini
2019-07-22 21:39 ` [Xen-devel] [PATCH v2 07/35] xen/arm64: head: Rework and document check_cpu_mode() Julien Grall
2019-07-22 21:39 ` [Xen-devel] [PATCH v2 08/35] xen/arm64: head: Rework and document zero_bss() Julien Grall
2019-07-30 17:13   ` Stefano Stabellini
2019-07-22 21:39 ` [Xen-devel] [PATCH v2 09/35] xen/arm64: head: Improve coding style and document cpu_init() Julien Grall
2019-07-30 17:14   ` Stefano Stabellini
2019-07-22 21:39 ` [Xen-devel] [PATCH v2 10/35] xen/arm64: head: Improve coding style and document create_pages_tables() Julien Grall
2019-07-30 17:15   ` Stefano Stabellini
2019-07-22 21:39 ` [Xen-devel] [PATCH v2 11/35] xen/arm64: head: Document enable_mmu() Julien Grall
2019-07-30 17:20   ` Stefano Stabellini
2019-07-22 21:39 ` [Xen-devel] [PATCH v2 12/35] xen/arm64: head: Move assembly switch to the runtime PT in secondary CPUs path Julien Grall
2019-07-22 21:39 ` [Xen-devel] [PATCH v2 13/35] xen/arm64: head: Don't setup the fixmap on secondary CPUs Julien Grall
2019-07-22 21:39 ` [Xen-devel] [PATCH v2 14/35] xen/arm64: head: Remove 1:1 mapping as soon as it is not used Julien Grall
2019-07-22 21:39 ` [Xen-devel] [PATCH v2 15/35] xen/arm64: head: Rework and document setup_fixmap() Julien Grall
2019-07-30 17:40   ` Stefano Stabellini
2019-07-22 21:39 ` [Xen-devel] [PATCH v2 16/35] xen/arm64: head: Rework and document launch() Julien Grall
2019-07-30 17:45   ` Stefano Stabellini
2019-07-31 20:13     ` Julien Grall
2019-07-22 21:39 ` [Xen-devel] [PATCH v2 17/35] xen/arm64: head: Setup TTBR_EL2 in enable_mmu() and add missing isb Julien Grall
2019-07-30 18:20   ` Stefano Stabellini
2019-07-22 21:39 ` [Xen-devel] [PATCH v2 18/35] xen/arm64: head: Introduce a macro to get a PC-relative address of a symbol Julien Grall
2019-07-30 18:24   ` Stefano Stabellini
2019-07-30 19:55     ` Julien Grall
2019-07-22 21:39 ` [Xen-devel] [PATCH v2 19/35] xen/arm32: head: Add a macro to move an immediate constant into a 32-bit register Julien Grall
2019-07-30 21:11   ` Stefano Stabellini
2019-07-22 21:39 ` [Xen-devel] [PATCH v2 20/35] xen/arm32: head: Mark the end of subroutines with ENDPROC Julien Grall
2019-07-30 19:22   ` Stefano Stabellini
2019-07-22 21:39 ` [Xen-devel] [PATCH v2 21/35] xen/arm32: head: Don't clobber r14/lr in the macro PRINT Julien Grall
2019-07-30 19:34   ` Stefano Stabellini
2019-07-22 21:39 ` [Xen-devel] [PATCH v2 22/35] xen/arm32: head: Rework UART initialization on boot CPU Julien Grall
2019-07-30 19:40   ` Stefano Stabellini
2019-07-31 20:18     ` Julien Grall
2019-07-22 21:39 ` [Xen-devel] [PATCH v2 23/35] xen/arm32: head: Introduce print_reg Julien Grall
2019-07-30 19:43   ` Stefano Stabellini
2019-07-22 21:39 ` [Xen-devel] [PATCH v2 24/35] xen/arm32: head: Introduce distinct paths for the boot CPU and secondary CPUs Julien Grall
2019-07-30 20:07   ` Stefano Stabellini
2019-07-31 20:31     ` Julien Grall
2019-07-22 21:39 ` [Xen-devel] [PATCH v2 25/35] xen/arm32: head: Rework and document check_cpu_mode() Julien Grall
2019-07-30 20:10   ` Stefano Stabellini
2019-07-22 21:39 ` [Xen-devel] [PATCH v2 26/35] xen/arm32: head: Rework and document zero_bss() Julien Grall
2019-07-30 20:14   ` Stefano Stabellini
2019-07-22 21:39 ` [Xen-devel] [PATCH v2 27/35] xen/arm32: head: Document create_pages_tables() Julien Grall
2019-07-30 20:18   ` Stefano Stabellini
2019-07-22 21:39 ` [Xen-devel] [PATCH v2 28/35] xen/arm32: head: Document enable_mmu() Julien Grall
2019-07-30 20:19   ` Stefano Stabellini
2019-07-22 21:39 ` [Xen-devel] [PATCH v2 29/35] xen/arm32: head: Move assembly switch to the runtime PT in secondary CPUs path Julien Grall
2019-07-30 20:25   ` Stefano Stabellini
2019-07-30 20:54     ` Julien Grall
2019-07-22 21:39 ` [Xen-devel] [PATCH v2 30/35] xen/arm32: head: Don't setup the fixmap on secondary CPUs Julien Grall
2019-07-30 20:38   ` Stefano Stabellini
2019-07-22 21:39 ` Julien Grall [this message]
2019-07-22 21:39 ` [Xen-devel] [PATCH v2 32/35] xen/arm32: head: Rework and document setup_fixmap() Julien Grall
2019-07-30 21:14   ` Stefano Stabellini
2019-07-31 20:42     ` Julien Grall
2019-07-22 21:39 ` [Xen-devel] [PATCH v2 33/35] xen/arm32: head: Rework and document launch() Julien Grall
2019-07-30 21:21   ` Stefano Stabellini
2019-07-30 21:34     ` Julien Grall
2019-07-31 20:27       ` Stefano Stabellini
2019-07-22 21:39 ` [Xen-devel] [PATCH v2 34/35] xen/arm32: head: Setup HTTBR in enable_mmu() and add missing isb Julien Grall
2019-07-30 21:26   ` Stefano Stabellini
2019-07-31 21:01     ` Julien Grall
2019-07-22 21:39 ` [Xen-devel] [PATCH v2 35/35] xen/arm: Zero BSS after the MMU and D-cache is turned on Julien Grall
2019-07-30 21:30   ` Stefano Stabellini

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