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From: Jonathan Chocron <jonnyc@amazon.com>
To: <lorenzo.pieralisi@arm.com>, <bhelgaas@google.com>,
	<jingoohan1@gmail.com>, <gustavo.pimentel@synopsys.com>,
	<robh+dt@kernel.org>, <mark.rutland@arm.com>
Cc: <dwmw@amazon.co.uk>, <benh@kernel.crashing.org>,
	<alisaidi@amazon.com>, <ronenk@amazon.com>, <barakw@amazon.com>,
	<talel@amazon.com>, <hanochu@amazon.com>, <hhhawa@amazon.com>,
	<linux-pci@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
	<devicetree@vger.kernel.org>, <jonnyc@amazon.com>
Subject: [PATCH v3 8/8] PCI: dw: Add support for PCI_PROBE_ONLY/PCI_REASSIGN_ALL_BUS flags
Date: Tue, 23 Jul 2019 12:27:11 +0300	[thread overview]
Message-ID: <20190723092711.11786-4-jonnyc@amazon.com> (raw)
In-Reply-To: <20190723092529.11310-1-jonnyc@amazon.com>

This basically aligns the usage of PCI_PROBE_ONLY and
PCI_REASSIGN_ALL_BUS in dw_pcie_host_init() with the logic in
pci_host_common_probe().

Now it will be possible to control via the devicetree whether to just
probe the PCI bus (in cases where FW already configured it) or to fully
configure it.

Signed-off-by: Jonathan Chocron <jonnyc@amazon.com>
---
 .../pci/controller/dwc/pcie-designware-host.c | 23 +++++++++++++++----
 1 file changed, 19 insertions(+), 4 deletions(-)

diff --git a/drivers/pci/controller/dwc/pcie-designware-host.c b/drivers/pci/controller/dwc/pcie-designware-host.c
index d2ca748e4c85..0a294d8aa21a 100644
--- a/drivers/pci/controller/dwc/pcie-designware-host.c
+++ b/drivers/pci/controller/dwc/pcie-designware-host.c
@@ -342,6 +342,8 @@ int dw_pcie_host_init(struct pcie_port *pp)
 	if (!bridge)
 		return -ENOMEM;
 
+	of_pci_check_probe_only();
+
 	ret = devm_of_pci_get_host_bridge_resources(dev, 0, 0xff,
 					&bridge->windows, &pp->io_base);
 	if (ret)
@@ -474,6 +476,10 @@ int dw_pcie_host_init(struct pcie_port *pp)
 
 	pp->root_bus_nr = pp->busn->start;
 
+	/* Do not reassign bus nums if probe only */
+	if (!pci_has_flag(PCI_PROBE_ONLY))
+		pci_add_flags(PCI_REASSIGN_ALL_BUS);
+
 	bridge->dev.parent = dev;
 	bridge->sysdata = pp;
 	bridge->busnr = pp->root_bus_nr;
@@ -490,11 +496,20 @@ int dw_pcie_host_init(struct pcie_port *pp)
 	if (pp->ops->scan_bus)
 		pp->ops->scan_bus(pp);
 
-	pci_bus_size_bridges(pp->root_bus);
-	pci_bus_assign_resources(pp->root_bus);
+	/*
+	 * We insert PCI resources into the iomem_resource and
+	 * ioport_resource trees in either pci_bus_claim_resources()
+	 * or pci_bus_assign_resources().
+	 */
+	if (pci_has_flag(PCI_PROBE_ONLY)) {
+		pci_bus_claim_resources(pp->root_bus);
+	} else {
+		pci_bus_size_bridges(pp->root_bus);
+		pci_bus_assign_resources(pp->root_bus);
 
-	list_for_each_entry(child, &pp->root_bus->children, node)
-		pcie_bus_configure_settings(child);
+		list_for_each_entry(child, &pp->root_bus->children, node)
+			pcie_bus_configure_settings(child);
+	}
 
 	pci_bus_add_devices(pp->root_bus);
 	return 0;
-- 
2.17.1


WARNING: multiple messages have this Message-ID (diff)
From: Jonathan Chocron <jonnyc@amazon.com>
To: lorenzo.pieralisi@arm.com, bhelgaas@google.com,
	jingoohan1@gmail.com, gustavo.pimentel@synopsys.com,
	robh+dt@kernel.org, mark.rutland@arm.com
Cc: dwmw@amazon.co.uk, benh@kernel.crashing.org, alisaidi@amazon.com,
	ronenk@amazon.com, barakw@amazon.com, talel@amazon.com,
	hanochu@amazon.com, hhhawa@amazon.com, linux-pci@vger.kernel.org,
	linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
	jonnyc@amazon.com
Subject: [PATCH v3 8/8] PCI: dw: Add support for PCI_PROBE_ONLY/PCI_REASSIGN_ALL_BUS flags
Date: Tue, 23 Jul 2019 12:27:11 +0300	[thread overview]
Message-ID: <20190723092711.11786-4-jonnyc@amazon.com> (raw)
In-Reply-To: <20190723092529.11310-1-jonnyc@amazon.com>

This basically aligns the usage of PCI_PROBE_ONLY and
PCI_REASSIGN_ALL_BUS in dw_pcie_host_init() with the logic in
pci_host_common_probe().

Now it will be possible to control via the devicetree whether to just
probe the PCI bus (in cases where FW already configured it) or to fully
configure it.

Signed-off-by: Jonathan Chocron <jonnyc@amazon.com>
---
 .../pci/controller/dwc/pcie-designware-host.c | 23 +++++++++++++++----
 1 file changed, 19 insertions(+), 4 deletions(-)

diff --git a/drivers/pci/controller/dwc/pcie-designware-host.c b/drivers/pci/controller/dwc/pcie-designware-host.c
index d2ca748e4c85..0a294d8aa21a 100644
--- a/drivers/pci/controller/dwc/pcie-designware-host.c
+++ b/drivers/pci/controller/dwc/pcie-designware-host.c
@@ -342,6 +342,8 @@ int dw_pcie_host_init(struct pcie_port *pp)
 	if (!bridge)
 		return -ENOMEM;
 
+	of_pci_check_probe_only();
+
 	ret = devm_of_pci_get_host_bridge_resources(dev, 0, 0xff,
 					&bridge->windows, &pp->io_base);
 	if (ret)
@@ -474,6 +476,10 @@ int dw_pcie_host_init(struct pcie_port *pp)
 
 	pp->root_bus_nr = pp->busn->start;
 
+	/* Do not reassign bus nums if probe only */
+	if (!pci_has_flag(PCI_PROBE_ONLY))
+		pci_add_flags(PCI_REASSIGN_ALL_BUS);
+
 	bridge->dev.parent = dev;
 	bridge->sysdata = pp;
 	bridge->busnr = pp->root_bus_nr;
@@ -490,11 +496,20 @@ int dw_pcie_host_init(struct pcie_port *pp)
 	if (pp->ops->scan_bus)
 		pp->ops->scan_bus(pp);
 
-	pci_bus_size_bridges(pp->root_bus);
-	pci_bus_assign_resources(pp->root_bus);
+	/*
+	 * We insert PCI resources into the iomem_resource and
+	 * ioport_resource trees in either pci_bus_claim_resources()
+	 * or pci_bus_assign_resources().
+	 */
+	if (pci_has_flag(PCI_PROBE_ONLY)) {
+		pci_bus_claim_resources(pp->root_bus);
+	} else {
+		pci_bus_size_bridges(pp->root_bus);
+		pci_bus_assign_resources(pp->root_bus);
 
-	list_for_each_entry(child, &pp->root_bus->children, node)
-		pcie_bus_configure_settings(child);
+		list_for_each_entry(child, &pp->root_bus->children, node)
+			pcie_bus_configure_settings(child);
+	}
 
 	pci_bus_add_devices(pp->root_bus);
 	return 0;
-- 
2.17.1

  parent reply	other threads:[~2019-07-23  9:27 UTC|newest]

Thread overview: 45+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-07-23  9:25 [PATCH v3 0/8] Amazon's Annapurna Labs DT-based PCIe host controller driver Jonathan Chocron
2019-07-23  9:25 ` Jonathan Chocron
2019-07-23  9:25 ` [PATCH v3 1/8] PCI: Add Amazon's Annapurna Labs vendor ID Jonathan Chocron
2019-07-23  9:25   ` Jonathan Chocron
2019-08-19 17:51   ` Andrew Murray
2019-07-23  9:25 ` [PATCH v3 2/8] PCI: Add ACS quirk for Amazon Annapurna Labs root ports Jonathan Chocron
2019-07-23  9:25   ` Jonathan Chocron
2019-07-23  9:25 ` [PATCH v3 3/8] PCI/VPD: Add VPD release quirk for Amazon's Annapurna Labs Root Port Jonathan Chocron
2019-07-23  9:25   ` Jonathan Chocron
2019-07-23  9:25 ` [PATCH v3 4/8] PCI: Add quirk to disable MSI-X support " Jonathan Chocron
2019-07-23  9:25   ` Jonathan Chocron
2019-08-19 18:23   ` Andrew Murray
2019-08-20 14:52     ` Chocron, Jonathan
2019-08-20 14:52       ` Chocron, Jonathan
2019-08-20 15:25       ` Andrew Murray
2019-08-20 15:25         ` Andrew Murray
2019-08-20 17:06         ` Chocron, Jonathan
2019-08-20 17:06           ` Chocron, Jonathan
2019-08-20 19:54           ` Andrew Murray
2019-08-20 19:54             ` Andrew Murray
2019-08-21 10:30             ` Chocron, Jonathan
2019-08-21 10:30               ` Chocron, Jonathan
2019-07-23  9:27 ` [PATCH v3 5/8] dt-bindings: PCI: Add Amazon's Annapurna Labs PCIe host bridge binding Jonathan Chocron
2019-07-23  9:27   ` Jonathan Chocron
2019-08-13 15:30   ` Rob Herring
2019-08-13 16:48     ` Chocron, Jonathan
2019-08-13 16:48       ` Chocron, Jonathan
2019-08-13 20:46       ` Rob Herring
2019-08-19 16:15         ` Chocron, Jonathan
2019-08-19 16:15           ` Chocron, Jonathan
2019-07-23  9:27 ` [PATCH v3 6/8] PCI: al: Add support for DW based driver type Jonathan Chocron
2019-07-23  9:27   ` Jonathan Chocron
2019-07-23  9:40   ` Gustavo Pimentel
2019-08-12 17:03   ` Lorenzo Pieralisi
2019-08-14 11:39     ` Chocron, Jonathan
2019-08-14 11:39       ` Chocron, Jonathan
2019-07-23  9:27 ` [PATCH v3 7/8] PCI: dw: Add validation that PCIe core is set to correct mode Jonathan Chocron
2019-07-23  9:27   ` Jonathan Chocron
2019-07-23  9:27 ` Jonathan Chocron [this message]
2019-07-23  9:27   ` [PATCH v3 8/8] PCI: dw: Add support for PCI_PROBE_ONLY/PCI_REASSIGN_ALL_BUS flags Jonathan Chocron
2019-08-07 16:36   ` Lorenzo Pieralisi
2019-08-08  9:30     ` Chocron, Jonathan
2019-08-08 10:58       ` Lorenzo Pieralisi
2019-08-12 18:05         ` Chocron, Jonathan
2019-08-12 18:05           ` Chocron, Jonathan

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