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* [BOOTWRAPPER][PATCH v2] Make GICv3.1 extended ranges available to non-secure
@ 2019-07-23 15:00 Marc Zyngier
  2019-07-23 15:56 ` Mark Rutland
  0 siblings, 1 reply; 2+ messages in thread
From: Marc Zyngier @ 2019-07-23 15:00 UTC (permalink / raw)
  To: linux-arm-kernel; +Cc: Mark Rutland

If we have a GICv3.1-capable system, configure the EPPI/ESPI ranges
to be accessible from the non-secure world.

Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
---

Notes:
    v2: Added GICR_TYPER_PPInum and GICD_TYPER_ESPI_range macros to
        make the loops more readable

 gic-v3.c | 14 ++++++++++++--
 1 file changed, 12 insertions(+), 2 deletions(-)

diff --git a/gic-v3.c b/gic-v3.c
index 476f703..ae2d2bc 100644
--- a/gic-v3.c
+++ b/gic-v3.c
@@ -17,6 +17,8 @@
 #define GICD_TYPER			0x4
 #define GICD_IGROUP0			0x80
 #define GICD_IGRPMOD0			0xd00
+#define GICD_IGROUPR0E			0x1000
+#define GICD_IGRPMODR0E			0x3400
 
 #define GICD_CTLR_EnableGrp0		(1 << 0)
 #define GICD_CTLR_EnableGrp1ns		(1 << 1)
@@ -24,10 +26,12 @@
 #define GICD_CTLR_ARE_S			(1 << 4)
 #define GICD_CTLR_ARE_NS		(1 << 5)
 #define GICD_TYPER_ITLineNumber		0x1f
+#define GICD_TYPER_ESPI_range(r)	(((r) >> 27) & 0x1f)
 
 #define GICR_WAKER			0x14
 
 #define GICR_TYPER			0x8
+#define GICR_TYPER_PPInum(r)		(((r) >> 27) & 0x1f)
 #define GICR_IGROUP0			0x80
 #define GICR_IGRPMOD0			0xD00
 
@@ -72,8 +76,10 @@ void gic_secure_init_primary(void)
 		typer = raw_readl(gicr_ptr + GICR_TYPER);
 
 		gicr_ptr += 0x10000; /* Go to SGI_Base */
-		raw_writel(~0x0, gicr_ptr + GICR_IGROUP0);
-		raw_writel(0x0, gicr_ptr + GICR_IGRPMOD0);
+		for (i = 0; i < (1 + GICR_TYPER_PPInum(typer)); i++) {
+			raw_writel(~0x0, gicr_ptr + GICR_IGROUP0 + i * 4);
+			raw_writel(0x0, gicr_ptr + GICR_IGRPMOD0 + i * 4);
+		}
 
 		/* Next redist */
 		gicr_ptr += 0x10000;
@@ -87,6 +93,10 @@ void gic_secure_init_primary(void)
 		raw_writel(~0x0, gicd_base + GICD_IGROUP0 + i * 4);
 		raw_writel(0x0, gicd_base + GICD_IGRPMOD0 + i * 4);
 	}
+	for (i = 0; i < GICD_TYPER_ESPI_range(typer); i++) {
+		raw_writel(~0x0, gicd_base + GICD_IGROUPR0E + i * 4);
+		raw_writel(0x0, gicd_base + GICD_IGRPMODR0E + i * 4);
+	}
 }
 
 void gic_secure_init(void)
-- 
2.18.0


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^ permalink raw reply related	[flat|nested] 2+ messages in thread

* Re: [BOOTWRAPPER][PATCH v2] Make GICv3.1 extended ranges available to non-secure
  2019-07-23 15:00 [BOOTWRAPPER][PATCH v2] Make GICv3.1 extended ranges available to non-secure Marc Zyngier
@ 2019-07-23 15:56 ` Mark Rutland
  0 siblings, 0 replies; 2+ messages in thread
From: Mark Rutland @ 2019-07-23 15:56 UTC (permalink / raw)
  To: Marc Zyngier; +Cc: linux-arm-kernel

On Tue, Jul 23, 2019 at 04:00:04PM +0100, Marc Zyngier wrote:
> If we have a GICv3.1-capable system, configure the EPPI/ESPI ranges
> to be accessible from the non-secure world.
> 
> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
> ---
> 
> Notes:
>     v2: Added GICR_TYPER_PPInum and GICD_TYPER_ESPI_range macros to
>         make the loops more readable
> 
>  gic-v3.c | 14 ++++++++++++--
>  1 file changed, 12 insertions(+), 2 deletions(-)

Thanks, applied.

Mark.

> 
> diff --git a/gic-v3.c b/gic-v3.c
> index 476f703..ae2d2bc 100644
> --- a/gic-v3.c
> +++ b/gic-v3.c
> @@ -17,6 +17,8 @@
>  #define GICD_TYPER			0x4
>  #define GICD_IGROUP0			0x80
>  #define GICD_IGRPMOD0			0xd00
> +#define GICD_IGROUPR0E			0x1000
> +#define GICD_IGRPMODR0E			0x3400
>  
>  #define GICD_CTLR_EnableGrp0		(1 << 0)
>  #define GICD_CTLR_EnableGrp1ns		(1 << 1)
> @@ -24,10 +26,12 @@
>  #define GICD_CTLR_ARE_S			(1 << 4)
>  #define GICD_CTLR_ARE_NS		(1 << 5)
>  #define GICD_TYPER_ITLineNumber		0x1f
> +#define GICD_TYPER_ESPI_range(r)	(((r) >> 27) & 0x1f)
>  
>  #define GICR_WAKER			0x14
>  
>  #define GICR_TYPER			0x8
> +#define GICR_TYPER_PPInum(r)		(((r) >> 27) & 0x1f)
>  #define GICR_IGROUP0			0x80
>  #define GICR_IGRPMOD0			0xD00
>  
> @@ -72,8 +76,10 @@ void gic_secure_init_primary(void)
>  		typer = raw_readl(gicr_ptr + GICR_TYPER);
>  
>  		gicr_ptr += 0x10000; /* Go to SGI_Base */
> -		raw_writel(~0x0, gicr_ptr + GICR_IGROUP0);
> -		raw_writel(0x0, gicr_ptr + GICR_IGRPMOD0);
> +		for (i = 0; i < (1 + GICR_TYPER_PPInum(typer)); i++) {
> +			raw_writel(~0x0, gicr_ptr + GICR_IGROUP0 + i * 4);
> +			raw_writel(0x0, gicr_ptr + GICR_IGRPMOD0 + i * 4);
> +		}
>  
>  		/* Next redist */
>  		gicr_ptr += 0x10000;
> @@ -87,6 +93,10 @@ void gic_secure_init_primary(void)
>  		raw_writel(~0x0, gicd_base + GICD_IGROUP0 + i * 4);
>  		raw_writel(0x0, gicd_base + GICD_IGRPMOD0 + i * 4);
>  	}
> +	for (i = 0; i < GICD_TYPER_ESPI_range(typer); i++) {
> +		raw_writel(~0x0, gicd_base + GICD_IGROUPR0E + i * 4);
> +		raw_writel(0x0, gicd_base + GICD_IGRPMODR0E + i * 4);
> +	}
>  }
>  
>  void gic_secure_init(void)
> -- 
> 2.18.0
> 

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http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

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2019-07-23 15:00 [BOOTWRAPPER][PATCH v2] Make GICv3.1 extended ranges available to non-secure Marc Zyngier
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