[Qemu-devel] [RFC PATCH v1 00/22] reimplement (some) x86 vector instructions using tcg-gvec

[Qemu-devel] [RFC PATCH v1 00/22] reimplement (some) x86 vector instructions using tcg-gvec

[Jan Bobek]

This patch series is an early work-in-progress snapshot of my efforts
to utilize the TCG gvec infrastracture in x86 frontend. Only a handful
of instructions have been converted (those which have a direct gvec
equivalent).

The dispatch switch for the converted instructions is sort of hacked
into gen_sse; this is obviously intended for development only.
Eventually, everything that follows this switch will be removed,
along with the SSE tables and all that goes along with it.

Cheers,
  -Jan

Jan Bobek (18):
  target/i386: introduce gen_ld_modrm_* helpers
  target/i386: introduce gen_gvec_ld_modrm_* helpers
  target/i386: add vector register file alignment constraints
  target/i386: reimplement (V)PAND, (V)ANDPS, (V)ANDPD
  target/i386: reimplement (V)POR, (V)ORPS, (V)ORPD
  target/i386: reimplement (V)PXOR, (V)XORPS, (V)XORPD
  target/i386: reimplement (V)PANDN, (V)ANDNPS, (V)ANDNPD
  target/i386: reimplement (V)PADD(B,W,D,Q)
  target/i386: reimplement (V)PSUB(B,W,D,Q)
  target/i386: reimplement (V)PADDS(B,W)
  target/i386: reimplement (V)PADDUS(B,W)
  target/i386: reimplement (V)PSUBS(B,W)
  target/i386: reimplement (V)PSUBUS(B,W)
  target/i386: reimplement (V)PMINSW
  target/i386: reimplement (V)PMINUB
  target/i386: reimplement (V)PMAXSW
  target/i386: reimplement (V)PMAXUB
  target/i386: reimplement (V)P(EQ,CMP)(B,W,D)

Richard Henderson (4):
  target/i386: Push rex_r into DisasContext
  target/i386: Push rex_w into DisasContext
  target/i386: Use prefix, aflag and dflag from DisasContext
  target/i386: Simplify gen_exception arguments

 target/i386/cpu.h            |   6 +-
 target/i386/ops_sse.h        |  65 ---
 target/i386/ops_sse_header.h |  39 --
 target/i386/translate.c      | 990 +++++++++++++++++++++++++----------
 4 files changed, 723 insertions(+), 377 deletions(-)

-- 
2.20.1

[Qemu-devel] [RFC PATCH v1 01/22] target/i386: Push rex_r into DisasContext

[Jan Bobek]

From: Richard Henderson <rth@twiddle.net>

Treat this value the same as we do for rex_b and rex_x.

Signed-off-by: Richard Henderson <rth@twiddle.net>
---
 target/i386/translate.c | 85 +++++++++++++++++++++--------------------
 1 file changed, 44 insertions(+), 41 deletions(-)

diff --git a/target/i386/translate.c b/target/i386/translate.c
index 03150a86e2..d74dbfd585 100644
--- a/target/i386/translate.c
+++ b/target/i386/translate.c
@@ -43,10 +43,12 @@
 #define CODE64(s) ((s)->code64)
 #define REX_X(s) ((s)->rex_x)
 #define REX_B(s) ((s)->rex_b)
+#define REX_R(s) ((s)->rex_r)
 #else
 #define CODE64(s) 0
 #define REX_X(s) 0
 #define REX_B(s) 0
+#define REX_R(s) 0
 #endif
 
 #ifdef TARGET_X86_64
@@ -98,7 +100,7 @@ typedef struct DisasContext {
 #ifdef TARGET_X86_64
     int lma;    /* long mode active */
     int code64; /* 64 bit code segment */
-    int rex_x, rex_b;
+    int rex_x, rex_b, rex_r;
 #endif
     int vex_l;  /* vex vector length */
     int vex_v;  /* vex vvvv register, without 1's complement.  */
@@ -3037,7 +3039,7 @@ static const struct SSEOpHelper_eppi sse_op_table7[256] = {
 };
 
 static void gen_sse(CPUX86State *env, DisasContext *s, int b,
-                    target_ulong pc_start, int rex_r)
+                    target_ulong pc_start)
 {
     int b1, op1_offset, op2_offset, is_xmm, val;
     int modrm, mod, rm, reg;
@@ -3107,8 +3109,9 @@ static void gen_sse(CPUX86State *env, DisasContext *s, int b,
 
     modrm = x86_ldub_code(env, s);
     reg = ((modrm >> 3) & 7);
-    if (is_xmm)
-        reg |= rex_r;
+    if (is_xmm) {
+        reg |= REX_R(s);
+    }
     mod = (modrm >> 6) & 3;
     if (sse_fn_epp == SSE_SPECIAL) {
         b |= (b1 << 8);
@@ -3642,7 +3645,7 @@ static void gen_sse(CPUX86State *env, DisasContext *s, int b,
                 tcg_gen_ld16u_tl(s->T0, cpu_env,
                                 offsetof(CPUX86State,fpregs[rm].mmx.MMX_W(val)));
             }
-            reg = ((modrm >> 3) & 7) | rex_r;
+            reg = ((modrm >> 3) & 7) | REX_R(s);
             gen_op_mov_reg_v(s, ot, reg, s->T0);
             break;
         case 0x1d6: /* movq ea, xmm */
@@ -3686,7 +3689,7 @@ static void gen_sse(CPUX86State *env, DisasContext *s, int b,
                                  offsetof(CPUX86State, fpregs[rm].mmx));
                 gen_helper_pmovmskb_mmx(s->tmp2_i32, cpu_env, s->ptr0);
             }
-            reg = ((modrm >> 3) & 7) | rex_r;
+            reg = ((modrm >> 3) & 7) | REX_R(s);
             tcg_gen_extu_i32_tl(cpu_regs[reg], s->tmp2_i32);
             break;
 
@@ -3698,7 +3701,7 @@ static void gen_sse(CPUX86State *env, DisasContext *s, int b,
             }
             modrm = x86_ldub_code(env, s);
             rm = modrm & 7;
-            reg = ((modrm >> 3) & 7) | rex_r;
+            reg = ((modrm >> 3) & 7) | REX_R(s);
             mod = (modrm >> 6) & 3;
             if (b1 >= 2) {
                 goto unknown_op;
@@ -3774,7 +3777,7 @@ static void gen_sse(CPUX86State *env, DisasContext *s, int b,
             /* Various integer extensions at 0f 38 f[0-f].  */
             b = modrm | (b1 << 8);
             modrm = x86_ldub_code(env, s);
-            reg = ((modrm >> 3) & 7) | rex_r;
+            reg = ((modrm >> 3) & 7) | REX_R(s);
 
             switch (b) {
             case 0x3f0: /* crc32 Gd,Eb */
@@ -4128,7 +4131,7 @@ static void gen_sse(CPUX86State *env, DisasContext *s, int b,
             b = modrm;
             modrm = x86_ldub_code(env, s);
             rm = modrm & 7;
-            reg = ((modrm >> 3) & 7) | rex_r;
+            reg = ((modrm >> 3) & 7) | REX_R(s);
             mod = (modrm >> 6) & 3;
             if (b1 >= 2) {
                 goto unknown_op;
@@ -4148,7 +4151,7 @@ static void gen_sse(CPUX86State *env, DisasContext *s, int b,
                 rm = (modrm & 7) | REX_B(s);
                 if (mod != 3)
                     gen_lea_modrm(env, s, modrm);
-                reg = ((modrm >> 3) & 7) | rex_r;
+                reg = ((modrm >> 3) & 7) | REX_R(s);
                 val = x86_ldub_code(env, s);
                 switch (b) {
                 case 0x14: /* pextrb */
@@ -4317,7 +4320,7 @@ static void gen_sse(CPUX86State *env, DisasContext *s, int b,
             /* Various integer extensions at 0f 3a f[0-f].  */
             b = modrm | (b1 << 8);
             modrm = x86_ldub_code(env, s);
-            reg = ((modrm >> 3) & 7) | rex_r;
+            reg = ((modrm >> 3) & 7) | REX_R(s);
 
             switch (b) {
             case 0x3f0: /* rorx Gy,Ey, Ib */
@@ -4491,14 +4494,15 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
     TCGMemOp ot, aflag, dflag;
     int modrm, reg, rm, mod, op, opreg, val;
     target_ulong next_eip, tval;
-    int rex_w, rex_r;
     target_ulong pc_start = s->base.pc_next;
+    int rex_w;
 
     s->pc_start = s->pc = pc_start;
     s->override = -1;
 #ifdef TARGET_X86_64
     s->rex_x = 0;
     s->rex_b = 0;
+    s->rex_r = 0;
     s->x86_64_hregs = false;
 #endif
     s->rip_offset = 0; /* for relative ip address */
@@ -4511,7 +4515,6 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
 
     prefixes = 0;
     rex_w = -1;
-    rex_r = 0;
 
  next_byte:
     b = x86_ldub_code(env, s);
@@ -4555,9 +4558,9 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
         if (CODE64(s)) {
             /* REX prefix */
             rex_w = (b >> 3) & 1;
-            rex_r = (b & 0x4) << 1;
+            s->rex_r = (b & 0x4) << 1;
             s->rex_x = (b & 0x2) << 2;
-            REX_B(s) = (b & 0x1) << 3;
+            s->rex_b = (b & 0x1) << 3;
             /* select uniform byte register addressing */
             s->x86_64_hregs = true;
             goto next_byte;
@@ -4590,8 +4593,8 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
             if (s->x86_64_hregs) {
                 goto illegal_op;
             }
+            s->rex_r = (~vex2 >> 4) & 8;
 #endif
-            rex_r = (~vex2 >> 4) & 8;
             if (b == 0xc5) {
                 /* 2-byte VEX prefix: RVVVVlpp, implied 0f leading opcode byte */
                 vex3 = vex2;
@@ -4681,7 +4684,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
             switch(f) {
             case 0: /* OP Ev, Gv */
                 modrm = x86_ldub_code(env, s);
-                reg = ((modrm >> 3) & 7) | rex_r;
+                reg = ((modrm >> 3) & 7) | REX_R(s);
                 mod = (modrm >> 6) & 3;
                 rm = (modrm & 7) | REX_B(s);
                 if (mod != 3) {
@@ -4703,7 +4706,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
             case 1: /* OP Gv, Ev */
                 modrm = x86_ldub_code(env, s);
                 mod = (modrm >> 6) & 3;
-                reg = ((modrm >> 3) & 7) | rex_r;
+                reg = ((modrm >> 3) & 7) | REX_R(s);
                 rm = (modrm & 7) | REX_B(s);
                 if (mod != 3) {
                     gen_lea_modrm(env, s, modrm);
@@ -5123,7 +5126,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
         ot = mo_b_d(b, dflag);
 
         modrm = x86_ldub_code(env, s);
-        reg = ((modrm >> 3) & 7) | rex_r;
+        reg = ((modrm >> 3) & 7) | REX_R(s);
 
         gen_ldst_modrm(env, s, modrm, ot, OR_TMP0, 0);
         gen_op_mov_v_reg(s, ot, s->T1, reg);
@@ -5195,7 +5198,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
     case 0x6b:
         ot = dflag;
         modrm = x86_ldub_code(env, s);
-        reg = ((modrm >> 3) & 7) | rex_r;
+        reg = ((modrm >> 3) & 7) | REX_R(s);
         if (b == 0x69)
             s->rip_offset = insn_const_size(ot);
         else if (b == 0x6b)
@@ -5247,7 +5250,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
     case 0x1c1: /* xadd Ev, Gv */
         ot = mo_b_d(b, dflag);
         modrm = x86_ldub_code(env, s);
-        reg = ((modrm >> 3) & 7) | rex_r;
+        reg = ((modrm >> 3) & 7) | REX_R(s);
         mod = (modrm >> 6) & 3;
         gen_op_mov_v_reg(s, ot, s->T0, reg);
         if (mod == 3) {
@@ -5279,7 +5282,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
 
             ot = mo_b_d(b, dflag);
             modrm = x86_ldub_code(env, s);
-            reg = ((modrm >> 3) & 7) | rex_r;
+            reg = ((modrm >> 3) & 7) | REX_R(s);
             mod = (modrm >> 6) & 3;
             oldv = tcg_temp_new();
             newv = tcg_temp_new();
@@ -5502,7 +5505,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
     case 0x89: /* mov Gv, Ev */
         ot = mo_b_d(b, dflag);
         modrm = x86_ldub_code(env, s);
-        reg = ((modrm >> 3) & 7) | rex_r;
+        reg = ((modrm >> 3) & 7) | REX_R(s);
 
         /* generate a generic store */
         gen_ldst_modrm(env, s, modrm, ot, reg, 1);
@@ -5528,7 +5531,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
     case 0x8b: /* mov Ev, Gv */
         ot = mo_b_d(b, dflag);
         modrm = x86_ldub_code(env, s);
-        reg = ((modrm >> 3) & 7) | rex_r;
+        reg = ((modrm >> 3) & 7) | REX_R(s);
 
         gen_ldst_modrm(env, s, modrm, ot, OR_TMP0, 0);
         gen_op_mov_reg_v(s, ot, reg, s->T0);
@@ -5578,7 +5581,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
             s_ot = b & 8 ? MO_SIGN | ot : ot;
 
             modrm = x86_ldub_code(env, s);
-            reg = ((modrm >> 3) & 7) | rex_r;
+            reg = ((modrm >> 3) & 7) | REX_R(s);
             mod = (modrm >> 6) & 3;
             rm = (modrm & 7) | REX_B(s);
 
@@ -5617,7 +5620,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
         mod = (modrm >> 6) & 3;
         if (mod == 3)
             goto illegal_op;
-        reg = ((modrm >> 3) & 7) | rex_r;
+        reg = ((modrm >> 3) & 7) | REX_R(s);
         {
             AddressParts a = gen_lea_modrm_0(env, s, modrm);
             TCGv ea = gen_lea_modrm_1(s, a);
@@ -5699,7 +5702,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
     case 0x87: /* xchg Ev, Gv */
         ot = mo_b_d(b, dflag);
         modrm = x86_ldub_code(env, s);
-        reg = ((modrm >> 3) & 7) | rex_r;
+        reg = ((modrm >> 3) & 7) | REX_R(s);
         mod = (modrm >> 6) & 3;
         if (mod == 3) {
             rm = (modrm & 7) | REX_B(s);
@@ -5736,7 +5739,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
     do_lxx:
         ot = dflag != MO_16 ? MO_32 : MO_16;
         modrm = x86_ldub_code(env, s);
-        reg = ((modrm >> 3) & 7) | rex_r;
+        reg = ((modrm >> 3) & 7) | REX_R(s);
         mod = (modrm >> 6) & 3;
         if (mod == 3)
             goto illegal_op;
@@ -5819,7 +5822,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
         modrm = x86_ldub_code(env, s);
         mod = (modrm >> 6) & 3;
         rm = (modrm & 7) | REX_B(s);
-        reg = ((modrm >> 3) & 7) | rex_r;
+        reg = ((modrm >> 3) & 7) | REX_R(s);
         if (mod != 3) {
             gen_lea_modrm(env, s, modrm);
             opreg = OR_TMP0;
@@ -6674,7 +6677,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
         }
         ot = dflag;
         modrm = x86_ldub_code(env, s);
-        reg = ((modrm >> 3) & 7) | rex_r;
+        reg = ((modrm >> 3) & 7) | REX_R(s);
         gen_cmovcc1(env, s, ot, b, modrm, reg);
         break;
 
@@ -6824,7 +6827,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
     do_btx:
         ot = dflag;
         modrm = x86_ldub_code(env, s);
-        reg = ((modrm >> 3) & 7) | rex_r;
+        reg = ((modrm >> 3) & 7) | REX_R(s);
         mod = (modrm >> 6) & 3;
         rm = (modrm & 7) | REX_B(s);
         gen_op_mov_v_reg(s, MO_32, s->T1, reg);
@@ -6929,7 +6932,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
     case 0x1bd: /* bsr / lzcnt */
         ot = dflag;
         modrm = x86_ldub_code(env, s);
-        reg = ((modrm >> 3) & 7) | rex_r;
+        reg = ((modrm >> 3) & 7) | REX_R(s);
         gen_ldst_modrm(env, s, modrm, ot, OR_TMP0, 0);
         gen_extu(ot, s->T0);
 
@@ -7693,7 +7696,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
             d_ot = dflag;
 
             modrm = x86_ldub_code(env, s);
-            reg = ((modrm >> 3) & 7) | rex_r;
+            reg = ((modrm >> 3) & 7) | REX_R(s);
             mod = (modrm >> 6) & 3;
             rm = (modrm & 7) | REX_B(s);
 
@@ -7767,7 +7770,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
                 goto illegal_op;
             ot = dflag != MO_16 ? MO_32 : MO_16;
             modrm = x86_ldub_code(env, s);
-            reg = ((modrm >> 3) & 7) | rex_r;
+            reg = ((modrm >> 3) & 7) | REX_R(s);
             gen_ldst_modrm(env, s, modrm, MO_16, OR_TMP0, 0);
             t0 = tcg_temp_local_new();
             gen_update_cc_op(s);
@@ -7808,7 +7811,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
         modrm = x86_ldub_code(env, s);
         if (s->flags & HF_MPX_EN_MASK) {
             mod = (modrm >> 6) & 3;
-            reg = ((modrm >> 3) & 7) | rex_r;
+            reg = ((modrm >> 3) & 7) | REX_R(s);
             if (prefixes & PREFIX_REPZ) {
                 /* bndcl */
                 if (reg >= 4
@@ -7898,7 +7901,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
         modrm = x86_ldub_code(env, s);
         if (s->flags & HF_MPX_EN_MASK) {
             mod = (modrm >> 6) & 3;
-            reg = ((modrm >> 3) & 7) | rex_r;
+            reg = ((modrm >> 3) & 7) | REX_R(s);
             if (mod != 3 && (prefixes & PREFIX_REPZ)) {
                 /* bndmk */
                 if (reg >= 4
@@ -8012,7 +8015,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
              * are assumed to be 1's, regardless of actual values.
              */
             rm = (modrm & 7) | REX_B(s);
-            reg = ((modrm >> 3) & 7) | rex_r;
+            reg = ((modrm >> 3) & 7) | REX_R(s);
             if (CODE64(s))
                 ot = MO_64;
             else
@@ -8069,7 +8072,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
              * are assumed to be 1's, regardless of actual values.
              */
             rm = (modrm & 7) | REX_B(s);
-            reg = ((modrm >> 3) & 7) | rex_r;
+            reg = ((modrm >> 3) & 7) | REX_R(s);
             if (CODE64(s))
                 ot = MO_64;
             else
@@ -8112,7 +8115,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
         mod = (modrm >> 6) & 3;
         if (mod == 3)
             goto illegal_op;
-        reg = ((modrm >> 3) & 7) | rex_r;
+        reg = ((modrm >> 3) & 7) | REX_R(s);
         /* generate a generic store */
         gen_ldst_modrm(env, s, modrm, ot, reg, 1);
         break;
@@ -8338,7 +8341,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
             goto illegal_op;
 
         modrm = x86_ldub_code(env, s);
-        reg = ((modrm >> 3) & 7) | rex_r;
+        reg = ((modrm >> 3) & 7) | REX_R(s);
 
         if (s->prefix & PREFIX_DATA) {
             ot = MO_16;
@@ -8366,7 +8369,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
     case 0x1c2:
     case 0x1c4 ... 0x1c6:
     case 0x1d0 ... 0x1fe:
-        gen_sse(env, s, b, pc_start, rex_r);
+        gen_sse(env, s, b, pc_start);
         break;
     default:
         goto unknown_op;
-- 
2.20.1

[Qemu-devel] [RFC PATCH v1 02/22] target/i386: Push rex_w into DisasContext

[Jan Bobek]

From: Richard Henderson <rth@twiddle.net>

Treat this the same as we already do for other rex bits.

Signed-off-by: Richard Henderson <rth@twiddle.net>
---
 target/i386/translate.c | 19 +++++++++++--------
 1 file changed, 11 insertions(+), 8 deletions(-)

diff --git a/target/i386/translate.c b/target/i386/translate.c
index d74dbfd585..c0866c2797 100644
--- a/target/i386/translate.c
+++ b/target/i386/translate.c
@@ -44,11 +44,13 @@
 #define REX_X(s) ((s)->rex_x)
 #define REX_B(s) ((s)->rex_b)
 #define REX_R(s) ((s)->rex_r)
+#define REX_W(s) ((s)->rex_w)
 #else
 #define CODE64(s) 0
 #define REX_X(s) 0
 #define REX_B(s) 0
 #define REX_R(s) 0
+#define REX_W(s) -1
 #endif
 
 #ifdef TARGET_X86_64
@@ -100,7 +102,7 @@ typedef struct DisasContext {
 #ifdef TARGET_X86_64
     int lma;    /* long mode active */
     int code64; /* 64 bit code segment */
-    int rex_x, rex_b, rex_r;
+    int rex_x, rex_b, rex_r, rex_w;
 #endif
     int vex_l;  /* vex vector length */
     int vex_v;  /* vex vvvv register, without 1's complement.  */
@@ -4495,7 +4497,6 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
     int modrm, reg, rm, mod, op, opreg, val;
     target_ulong next_eip, tval;
     target_ulong pc_start = s->base.pc_next;
-    int rex_w;
 
     s->pc_start = s->pc = pc_start;
     s->override = -1;
@@ -4503,6 +4504,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
     s->rex_x = 0;
     s->rex_b = 0;
     s->rex_r = 0;
+    s->rex_w = -1;
     s->x86_64_hregs = false;
 #endif
     s->rip_offset = 0; /* for relative ip address */
@@ -4514,7 +4516,6 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
     }
 
     prefixes = 0;
-    rex_w = -1;
 
  next_byte:
     b = x86_ldub_code(env, s);
@@ -4557,7 +4558,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
     case 0x40 ... 0x4f:
         if (CODE64(s)) {
             /* REX prefix */
-            rex_w = (b >> 3) & 1;
+            s->rex_w = (b >> 3) & 1;
             s->rex_r = (b & 0x4) << 1;
             s->rex_x = (b & 0x2) << 2;
             s->rex_b = (b & 0x1) << 3;
@@ -4606,7 +4607,9 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
                 s->rex_b = (~vex2 >> 2) & 8;
 #endif
                 vex3 = x86_ldub_code(env, s);
-                rex_w = (vex3 >> 7) & 1;
+#ifdef TARGET_X86_64
+                s->rex_w = (vex3 >> 7) & 1;
+#endif
                 switch (vex2 & 0x1f) {
                 case 0x01: /* Implied 0f leading opcode bytes.  */
                     b = x86_ldub_code(env, s) | 0x100;
@@ -4631,9 +4634,9 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
     /* Post-process prefixes.  */
     if (CODE64(s)) {
         /* In 64-bit mode, the default data size is 32-bit.  Select 64-bit
-           data with rex_w, and 16-bit data with 0x66; rex_w takes precedence
+           data with REX_W, and 16-bit data with 0x66; REX_W takes precedence
            over 0x66 if both are present.  */
-        dflag = (rex_w > 0 ? MO_64 : prefixes & PREFIX_DATA ? MO_16 : MO_32);
+        dflag = (REX_W(s) > 0 ? MO_64 : prefixes & PREFIX_DATA ? MO_16 : MO_32);
         /* In 64-bit mode, 0x67 selects 32-bit addressing.  */
         aflag = (prefixes & PREFIX_ADR ? MO_32 : MO_64);
     } else {
@@ -5029,7 +5032,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
                 /* operand size for jumps is 64 bit */
                 ot = MO_64;
             } else if (op == 3 || op == 5) {
-                ot = dflag != MO_16 ? MO_32 + (rex_w == 1) : MO_16;
+                ot = dflag != MO_16 ? MO_32 + (REX_W(s) == 1) : MO_16;
             } else if (op == 6) {
                 /* default push size is 64 bit */
                 ot = mo_pushpop(s, dflag);
-- 
2.20.1

[Qemu-devel] [RFC PATCH v1 03/22] target/i386: Use prefix, aflag and dflag from DisasContext

[Jan Bobek]

From: Richard Henderson <rth@twiddle.net>

The variables are already there, we just have to hide the ones
in disas_insn so that we are forced to use them.

Signed-off-by: Richard Henderson <rth@twiddle.net>
---
 target/i386/translate.c | 299 ++++++++++++++++++++--------------------
 1 file changed, 152 insertions(+), 147 deletions(-)

diff --git a/target/i386/translate.c b/target/i386/translate.c
index c0866c2797..692261f73f 100644
--- a/target/i386/translate.c
+++ b/target/i386/translate.c
@@ -4491,13 +4491,17 @@ static void gen_sse(CPUX86State *env, DisasContext *s, int b,
 static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
 {
     CPUX86State *env = cpu->env_ptr;
-    int b, prefixes;
+    int b;
     int shift;
-    TCGMemOp ot, aflag, dflag;
+    TCGMemOp ot;
     int modrm, reg, rm, mod, op, opreg, val;
     target_ulong next_eip, tval;
     target_ulong pc_start = s->base.pc_next;
 
+    {
+    int prefixes;
+    TCGMemOp aflag, dflag;
+
     s->pc_start = s->pc = pc_start;
     s->override = -1;
 #ifdef TARGET_X86_64
@@ -4657,6 +4661,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
     s->prefix = prefixes;
     s->aflag = aflag;
     s->dflag = dflag;
+    }
 
     /* now check op code */
  reswitch:
@@ -4682,7 +4687,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
             op = (b >> 3) & 7;
             f = (b >> 1) & 3;
 
-            ot = mo_b_d(b, dflag);
+            ot = mo_b_d(b, s->dflag);
 
             switch(f) {
             case 0: /* OP Ev, Gv */
@@ -4740,7 +4745,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
         {
             int val;
 
-            ot = mo_b_d(b, dflag);
+            ot = mo_b_d(b, s->dflag);
 
             modrm = x86_ldub_code(env, s);
             mod = (modrm >> 6) & 3;
@@ -4777,16 +4782,16 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
         /**************************/
         /* inc, dec, and other misc arith */
     case 0x40 ... 0x47: /* inc Gv */
-        ot = dflag;
+        ot = s->dflag;
         gen_inc(s, ot, OR_EAX + (b & 7), 1);
         break;
     case 0x48 ... 0x4f: /* dec Gv */
-        ot = dflag;
+        ot = s->dflag;
         gen_inc(s, ot, OR_EAX + (b & 7), -1);
         break;
     case 0xf6: /* GRP3 */
     case 0xf7:
-        ot = mo_b_d(b, dflag);
+        ot = mo_b_d(b, s->dflag);
 
         modrm = x86_ldub_code(env, s);
         mod = (modrm >> 6) & 3;
@@ -5018,7 +5023,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
 
     case 0xfe: /* GRP4 */
     case 0xff: /* GRP5 */
-        ot = mo_b_d(b, dflag);
+        ot = mo_b_d(b, s->dflag);
 
         modrm = x86_ldub_code(env, s);
         mod = (modrm >> 6) & 3;
@@ -5032,10 +5037,10 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
                 /* operand size for jumps is 64 bit */
                 ot = MO_64;
             } else if (op == 3 || op == 5) {
-                ot = dflag != MO_16 ? MO_32 + (REX_W(s) == 1) : MO_16;
+                ot = s->dflag != MO_16 ? MO_32 + (REX_W(s) == 1) : MO_16;
             } else if (op == 6) {
                 /* default push size is 64 bit */
-                ot = mo_pushpop(s, dflag);
+                ot = mo_pushpop(s, s->dflag);
             }
         }
         if (mod != 3) {
@@ -5063,7 +5068,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
             break;
         case 2: /* call Ev */
             /* XXX: optimize if memory (no 'and' is necessary) */
-            if (dflag == MO_16) {
+            if (s->dflag == MO_16) {
                 tcg_gen_ext16u_tl(s->T0, s->T0);
             }
             next_eip = s->pc - s->cs_base;
@@ -5081,19 +5086,19 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
             if (s->pe && !s->vm86) {
                 tcg_gen_trunc_tl_i32(s->tmp2_i32, s->T0);
                 gen_helper_lcall_protected(cpu_env, s->tmp2_i32, s->T1,
-                                           tcg_const_i32(dflag - 1),
+                                           tcg_const_i32(s->dflag - 1),
                                            tcg_const_tl(s->pc - s->cs_base));
             } else {
                 tcg_gen_trunc_tl_i32(s->tmp2_i32, s->T0);
                 gen_helper_lcall_real(cpu_env, s->tmp2_i32, s->T1,
-                                      tcg_const_i32(dflag - 1),
+                                      tcg_const_i32(s->dflag - 1),
                                       tcg_const_i32(s->pc - s->cs_base));
             }
             tcg_gen_ld_tl(s->tmp4, cpu_env, offsetof(CPUX86State, eip));
             gen_jr(s, s->tmp4);
             break;
         case 4: /* jmp Ev */
-            if (dflag == MO_16) {
+            if (s->dflag == MO_16) {
                 tcg_gen_ext16u_tl(s->T0, s->T0);
             }
             gen_op_jmp_v(s->T0);
@@ -5126,7 +5131,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
 
     case 0x84: /* test Ev, Gv */
     case 0x85:
-        ot = mo_b_d(b, dflag);
+        ot = mo_b_d(b, s->dflag);
 
         modrm = x86_ldub_code(env, s);
         reg = ((modrm >> 3) & 7) | REX_R(s);
@@ -5139,7 +5144,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
 
     case 0xa8: /* test eAX, Iv */
     case 0xa9:
-        ot = mo_b_d(b, dflag);
+        ot = mo_b_d(b, s->dflag);
         val = insn_get(env, s, ot);
 
         gen_op_mov_v_reg(s, ot, s->T0, OR_EAX);
@@ -5149,7 +5154,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
         break;
 
     case 0x98: /* CWDE/CBW */
-        switch (dflag) {
+        switch (s->dflag) {
 #ifdef TARGET_X86_64
         case MO_64:
             gen_op_mov_v_reg(s, MO_32, s->T0, R_EAX);
@@ -5172,7 +5177,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
         }
         break;
     case 0x99: /* CDQ/CWD */
-        switch (dflag) {
+        switch (s->dflag) {
 #ifdef TARGET_X86_64
         case MO_64:
             gen_op_mov_v_reg(s, MO_64, s->T0, R_EAX);
@@ -5199,7 +5204,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
     case 0x1af: /* imul Gv, Ev */
     case 0x69: /* imul Gv, Ev, I */
     case 0x6b:
-        ot = dflag;
+        ot = s->dflag;
         modrm = x86_ldub_code(env, s);
         reg = ((modrm >> 3) & 7) | REX_R(s);
         if (b == 0x69)
@@ -5251,7 +5256,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
         break;
     case 0x1c0:
     case 0x1c1: /* xadd Ev, Gv */
-        ot = mo_b_d(b, dflag);
+        ot = mo_b_d(b, s->dflag);
         modrm = x86_ldub_code(env, s);
         reg = ((modrm >> 3) & 7) | REX_R(s);
         mod = (modrm >> 6) & 3;
@@ -5283,7 +5288,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
         {
             TCGv oldv, newv, cmpv;
 
-            ot = mo_b_d(b, dflag);
+            ot = mo_b_d(b, s->dflag);
             modrm = x86_ldub_code(env, s);
             reg = ((modrm >> 3) & 7) | REX_R(s);
             mod = (modrm >> 6) & 3;
@@ -5344,7 +5349,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
                 goto illegal_op;
             }
 #ifdef TARGET_X86_64
-            if (dflag == MO_64) {
+            if (s->dflag == MO_64) {
                 if (!(s->cpuid_ext_features & CPUID_EXT_CX16)) {
                     goto illegal_op;
                 }
@@ -5384,7 +5389,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
             }
             gen_helper_rdrand(s->T0, cpu_env);
             rm = (modrm & 7) | REX_B(s);
-            gen_op_mov_reg_v(s, dflag, rm, s->T0);
+            gen_op_mov_reg_v(s, s->dflag, rm, s->T0);
             set_cc_op(s, CC_OP_EFLAGS);
             if (tb_cflags(s->base.tb) & CF_USE_ICOUNT) {
                 gen_io_end();
@@ -5421,7 +5426,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
         break;
     case 0x68: /* push Iv */
     case 0x6a:
-        ot = mo_pushpop(s, dflag);
+        ot = mo_pushpop(s, s->dflag);
         if (b == 0x68)
             val = insn_get(env, s, ot);
         else
@@ -5506,7 +5511,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
         /* mov */
     case 0x88:
     case 0x89: /* mov Gv, Ev */
-        ot = mo_b_d(b, dflag);
+        ot = mo_b_d(b, s->dflag);
         modrm = x86_ldub_code(env, s);
         reg = ((modrm >> 3) & 7) | REX_R(s);
 
@@ -5515,7 +5520,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
         break;
     case 0xc6:
     case 0xc7: /* mov Ev, Iv */
-        ot = mo_b_d(b, dflag);
+        ot = mo_b_d(b, s->dflag);
         modrm = x86_ldub_code(env, s);
         mod = (modrm >> 6) & 3;
         if (mod != 3) {
@@ -5532,7 +5537,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
         break;
     case 0x8a:
     case 0x8b: /* mov Ev, Gv */
-        ot = mo_b_d(b, dflag);
+        ot = mo_b_d(b, s->dflag);
         modrm = x86_ldub_code(env, s);
         reg = ((modrm >> 3) & 7) | REX_R(s);
 
@@ -5564,7 +5569,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
         if (reg >= 6)
             goto illegal_op;
         gen_op_movl_T0_seg(s, reg);
-        ot = mod == 3 ? dflag : MO_16;
+        ot = mod == 3 ? s->dflag : MO_16;
         gen_ldst_modrm(env, s, modrm, ot, OR_TMP0, 1);
         break;
 
@@ -5577,7 +5582,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
             TCGMemOp s_ot;
 
             /* d_ot is the size of destination */
-            d_ot = dflag;
+            d_ot = s->dflag;
             /* ot is the size of source */
             ot = (b & 1) + MO_8;
             /* s_ot is the sign+size of source */
@@ -5628,7 +5633,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
             AddressParts a = gen_lea_modrm_0(env, s, modrm);
             TCGv ea = gen_lea_modrm_1(s, a);
             gen_lea_v_seg(s, s->aflag, ea, -1, -1);
-            gen_op_mov_reg_v(s, dflag, reg, s->A0);
+            gen_op_mov_reg_v(s, s->dflag, reg, s->A0);
         }
         break;
 
@@ -5639,7 +5644,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
         {
             target_ulong offset_addr;
 
-            ot = mo_b_d(b, dflag);
+            ot = mo_b_d(b, s->dflag);
             switch (s->aflag) {
 #ifdef TARGET_X86_64
             case MO_64:
@@ -5677,7 +5682,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
         break;
     case 0xb8 ... 0xbf: /* mov R, Iv */
 #ifdef TARGET_X86_64
-        if (dflag == MO_64) {
+        if (s->dflag == MO_64) {
             uint64_t tmp;
             /* 64 bit case */
             tmp = x86_ldq_code(env, s);
@@ -5687,7 +5692,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
         } else
 #endif
         {
-            ot = dflag;
+            ot = s->dflag;
             val = insn_get(env, s, ot);
             reg = (b & 7) | REX_B(s);
             tcg_gen_movi_tl(s->T0, val);
@@ -5697,13 +5702,13 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
 
     case 0x91 ... 0x97: /* xchg R, EAX */
     do_xchg_reg_eax:
-        ot = dflag;
+        ot = s->dflag;
         reg = (b & 7) | REX_B(s);
         rm = R_EAX;
         goto do_xchg_reg;
     case 0x86:
     case 0x87: /* xchg Ev, Gv */
-        ot = mo_b_d(b, dflag);
+        ot = mo_b_d(b, s->dflag);
         modrm = x86_ldub_code(env, s);
         reg = ((modrm >> 3) & 7) | REX_R(s);
         mod = (modrm >> 6) & 3;
@@ -5740,7 +5745,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
     case 0x1b5: /* lgs Gv */
         op = R_GS;
     do_lxx:
-        ot = dflag != MO_16 ? MO_32 : MO_16;
+        ot = s->dflag != MO_16 ? MO_32 : MO_16;
         modrm = x86_ldub_code(env, s);
         reg = ((modrm >> 3) & 7) | REX_R(s);
         mod = (modrm >> 6) & 3;
@@ -5768,7 +5773,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
         shift = 2;
     grp2:
         {
-            ot = mo_b_d(b, dflag);
+            ot = mo_b_d(b, s->dflag);
             modrm = x86_ldub_code(env, s);
             mod = (modrm >> 6) & 3;
             op = (modrm >> 3) & 7;
@@ -5821,7 +5826,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
         op = 1;
         shift = 0;
     do_shiftd:
-        ot = dflag;
+        ot = s->dflag;
         modrm = x86_ldub_code(env, s);
         mod = (modrm >> 6) & 3;
         rm = (modrm & 7) | REX_B(s);
@@ -5983,7 +5988,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
                 }
                 break;
             case 0x0c: /* fldenv mem */
-                gen_helper_fldenv(cpu_env, s->A0, tcg_const_i32(dflag - 1));
+                gen_helper_fldenv(cpu_env, s->A0, tcg_const_i32(s->dflag - 1));
                 break;
             case 0x0d: /* fldcw mem */
                 tcg_gen_qemu_ld_i32(s->tmp2_i32, s->A0,
@@ -5991,7 +5996,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
                 gen_helper_fldcw(cpu_env, s->tmp2_i32);
                 break;
             case 0x0e: /* fnstenv mem */
-                gen_helper_fstenv(cpu_env, s->A0, tcg_const_i32(dflag - 1));
+                gen_helper_fstenv(cpu_env, s->A0, tcg_const_i32(s->dflag - 1));
                 break;
             case 0x0f: /* fnstcw mem */
                 gen_helper_fnstcw(s->tmp2_i32, cpu_env);
@@ -6006,10 +6011,10 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
                 gen_helper_fpop(cpu_env);
                 break;
             case 0x2c: /* frstor mem */
-                gen_helper_frstor(cpu_env, s->A0, tcg_const_i32(dflag - 1));
+                gen_helper_frstor(cpu_env, s->A0, tcg_const_i32(s->dflag - 1));
                 break;
             case 0x2e: /* fnsave mem */
-                gen_helper_fsave(cpu_env, s->A0, tcg_const_i32(dflag - 1));
+                gen_helper_fsave(cpu_env, s->A0, tcg_const_i32(s->dflag - 1));
                 break;
             case 0x2f: /* fnstsw mem */
                 gen_helper_fnstsw(s->tmp2_i32, cpu_env);
@@ -6351,8 +6356,8 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
 
     case 0xa4: /* movsS */
     case 0xa5:
-        ot = mo_b_d(b, dflag);
-        if (prefixes & (PREFIX_REPZ | PREFIX_REPNZ)) {
+        ot = mo_b_d(b, s->dflag);
+        if (s->prefix & (PREFIX_REPZ | PREFIX_REPNZ)) {
             gen_repz_movs(s, ot, pc_start - s->cs_base, s->pc - s->cs_base);
         } else {
             gen_movs(s, ot);
@@ -6361,8 +6366,8 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
 
     case 0xaa: /* stosS */
     case 0xab:
-        ot = mo_b_d(b, dflag);
-        if (prefixes & (PREFIX_REPZ | PREFIX_REPNZ)) {
+        ot = mo_b_d(b, s->dflag);
+        if (s->prefix & (PREFIX_REPZ | PREFIX_REPNZ)) {
             gen_repz_stos(s, ot, pc_start - s->cs_base, s->pc - s->cs_base);
         } else {
             gen_stos(s, ot);
@@ -6370,8 +6375,8 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
         break;
     case 0xac: /* lodsS */
     case 0xad:
-        ot = mo_b_d(b, dflag);
-        if (prefixes & (PREFIX_REPZ | PREFIX_REPNZ)) {
+        ot = mo_b_d(b, s->dflag);
+        if (s->prefix & (PREFIX_REPZ | PREFIX_REPNZ)) {
             gen_repz_lods(s, ot, pc_start - s->cs_base, s->pc - s->cs_base);
         } else {
             gen_lods(s, ot);
@@ -6379,10 +6384,10 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
         break;
     case 0xae: /* scasS */
     case 0xaf:
-        ot = mo_b_d(b, dflag);
-        if (prefixes & PREFIX_REPNZ) {
+        ot = mo_b_d(b, s->dflag);
+        if (s->prefix & PREFIX_REPNZ) {
             gen_repz_scas(s, ot, pc_start - s->cs_base, s->pc - s->cs_base, 1);
-        } else if (prefixes & PREFIX_REPZ) {
+        } else if (s->prefix & PREFIX_REPZ) {
             gen_repz_scas(s, ot, pc_start - s->cs_base, s->pc - s->cs_base, 0);
         } else {
             gen_scas(s, ot);
@@ -6391,10 +6396,10 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
 
     case 0xa6: /* cmpsS */
     case 0xa7:
-        ot = mo_b_d(b, dflag);
-        if (prefixes & PREFIX_REPNZ) {
+        ot = mo_b_d(b, s->dflag);
+        if (s->prefix & PREFIX_REPNZ) {
             gen_repz_cmps(s, ot, pc_start - s->cs_base, s->pc - s->cs_base, 1);
-        } else if (prefixes & PREFIX_REPZ) {
+        } else if (s->prefix & PREFIX_REPZ) {
             gen_repz_cmps(s, ot, pc_start - s->cs_base, s->pc - s->cs_base, 0);
         } else {
             gen_cmps(s, ot);
@@ -6402,11 +6407,11 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
         break;
     case 0x6c: /* insS */
     case 0x6d:
-        ot = mo_b_d32(b, dflag);
+        ot = mo_b_d32(b, s->dflag);
         tcg_gen_ext16u_tl(s->T0, cpu_regs[R_EDX]);
         gen_check_io(s, ot, pc_start - s->cs_base, 
-                     SVM_IOIO_TYPE_MASK | svm_is_rep(prefixes) | 4);
-        if (prefixes & (PREFIX_REPZ | PREFIX_REPNZ)) {
+                     SVM_IOIO_TYPE_MASK | svm_is_rep(s->prefix) | 4);
+        if (s->prefix & (PREFIX_REPZ | PREFIX_REPNZ)) {
             gen_repz_ins(s, ot, pc_start - s->cs_base, s->pc - s->cs_base);
         } else {
             gen_ins(s, ot);
@@ -6417,11 +6422,11 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
         break;
     case 0x6e: /* outsS */
     case 0x6f:
-        ot = mo_b_d32(b, dflag);
+        ot = mo_b_d32(b, s->dflag);
         tcg_gen_ext16u_tl(s->T0, cpu_regs[R_EDX]);
         gen_check_io(s, ot, pc_start - s->cs_base,
-                     svm_is_rep(prefixes) | 4);
-        if (prefixes & (PREFIX_REPZ | PREFIX_REPNZ)) {
+                     svm_is_rep(s->prefix) | 4);
+        if (s->prefix & (PREFIX_REPZ | PREFIX_REPNZ)) {
             gen_repz_outs(s, ot, pc_start - s->cs_base, s->pc - s->cs_base);
         } else {
             gen_outs(s, ot);
@@ -6436,11 +6441,11 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
 
     case 0xe4:
     case 0xe5:
-        ot = mo_b_d32(b, dflag);
+        ot = mo_b_d32(b, s->dflag);
         val = x86_ldub_code(env, s);
         tcg_gen_movi_tl(s->T0, val);
         gen_check_io(s, ot, pc_start - s->cs_base,
-                     SVM_IOIO_TYPE_MASK | svm_is_rep(prefixes));
+                     SVM_IOIO_TYPE_MASK | svm_is_rep(s->prefix));
         if (tb_cflags(s->base.tb) & CF_USE_ICOUNT) {
             gen_io_start();
         }
@@ -6455,11 +6460,11 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
         break;
     case 0xe6:
     case 0xe7:
-        ot = mo_b_d32(b, dflag);
+        ot = mo_b_d32(b, s->dflag);
         val = x86_ldub_code(env, s);
         tcg_gen_movi_tl(s->T0, val);
         gen_check_io(s, ot, pc_start - s->cs_base,
-                     svm_is_rep(prefixes));
+                     svm_is_rep(s->prefix));
         gen_op_mov_v_reg(s, ot, s->T1, R_EAX);
 
         if (tb_cflags(s->base.tb) & CF_USE_ICOUNT) {
@@ -6476,10 +6481,10 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
         break;
     case 0xec:
     case 0xed:
-        ot = mo_b_d32(b, dflag);
+        ot = mo_b_d32(b, s->dflag);
         tcg_gen_ext16u_tl(s->T0, cpu_regs[R_EDX]);
         gen_check_io(s, ot, pc_start - s->cs_base,
-                     SVM_IOIO_TYPE_MASK | svm_is_rep(prefixes));
+                     SVM_IOIO_TYPE_MASK | svm_is_rep(s->prefix));
         if (tb_cflags(s->base.tb) & CF_USE_ICOUNT) {
             gen_io_start();
         }
@@ -6494,10 +6499,10 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
         break;
     case 0xee:
     case 0xef:
-        ot = mo_b_d32(b, dflag);
+        ot = mo_b_d32(b, s->dflag);
         tcg_gen_ext16u_tl(s->T0, cpu_regs[R_EDX]);
         gen_check_io(s, ot, pc_start - s->cs_base,
-                     svm_is_rep(prefixes));
+                     svm_is_rep(s->prefix));
         gen_op_mov_v_reg(s, ot, s->T1, R_EAX);
 
         if (tb_cflags(s->base.tb) & CF_USE_ICOUNT) {
@@ -6538,21 +6543,21 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
         if (s->pe && !s->vm86) {
             gen_update_cc_op(s);
             gen_jmp_im(s, pc_start - s->cs_base);
-            gen_helper_lret_protected(cpu_env, tcg_const_i32(dflag - 1),
+            gen_helper_lret_protected(cpu_env, tcg_const_i32(s->dflag - 1),
                                       tcg_const_i32(val));
         } else {
             gen_stack_A0(s);
             /* pop offset */
-            gen_op_ld_v(s, dflag, s->T0, s->A0);
+            gen_op_ld_v(s, s->dflag, s->T0, s->A0);
             /* NOTE: keeping EIP updated is not a problem in case of
                exception */
             gen_op_jmp_v(s->T0);
             /* pop selector */
-            gen_add_A0_im(s, 1 << dflag);
-            gen_op_ld_v(s, dflag, s->T0, s->A0);
+            gen_add_A0_im(s, 1 << s->dflag);
+            gen_op_ld_v(s, s->dflag, s->T0, s->A0);
             gen_op_movl_seg_T0_vm(s, R_CS);
             /* add stack offset */
-            gen_stack_update(s, val + (2 << dflag));
+            gen_stack_update(s, val + (2 << s->dflag));
         }
         gen_eob(s);
         break;
@@ -6563,17 +6568,17 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
         gen_svm_check_intercept(s, pc_start, SVM_EXIT_IRET);
         if (!s->pe) {
             /* real mode */
-            gen_helper_iret_real(cpu_env, tcg_const_i32(dflag - 1));
+            gen_helper_iret_real(cpu_env, tcg_const_i32(s->dflag - 1));
             set_cc_op(s, CC_OP_EFLAGS);
         } else if (s->vm86) {
             if (s->iopl != 3) {
                 gen_exception(s, EXCP0D_GPF, pc_start - s->cs_base);
             } else {
-                gen_helper_iret_real(cpu_env, tcg_const_i32(dflag - 1));
+                gen_helper_iret_real(cpu_env, tcg_const_i32(s->dflag - 1));
                 set_cc_op(s, CC_OP_EFLAGS);
             }
         } else {
-            gen_helper_iret_protected(cpu_env, tcg_const_i32(dflag - 1),
+            gen_helper_iret_protected(cpu_env, tcg_const_i32(s->dflag - 1),
                                       tcg_const_i32(s->pc - s->cs_base));
             set_cc_op(s, CC_OP_EFLAGS);
         }
@@ -6581,14 +6586,14 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
         break;
     case 0xe8: /* call im */
         {
-            if (dflag != MO_16) {
+            if (s->dflag != MO_16) {
                 tval = (int32_t)insn_get(env, s, MO_32);
             } else {
                 tval = (int16_t)insn_get(env, s, MO_16);
             }
             next_eip = s->pc - s->cs_base;
             tval += next_eip;
-            if (dflag == MO_16) {
+            if (s->dflag == MO_16) {
                 tval &= 0xffff;
             } else if (!CODE64(s)) {
                 tval &= 0xffffffff;
@@ -6605,7 +6610,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
 
             if (CODE64(s))
                 goto illegal_op;
-            ot = dflag;
+            ot = s->dflag;
             offset = insn_get(env, s, ot);
             selector = insn_get(env, s, MO_16);
 
@@ -6614,13 +6619,13 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
         }
         goto do_lcall;
     case 0xe9: /* jmp im */
-        if (dflag != MO_16) {
+        if (s->dflag != MO_16) {
             tval = (int32_t)insn_get(env, s, MO_32);
         } else {
             tval = (int16_t)insn_get(env, s, MO_16);
         }
         tval += s->pc - s->cs_base;
-        if (dflag == MO_16) {
+        if (s->dflag == MO_16) {
             tval &= 0xffff;
         } else if (!CODE64(s)) {
             tval &= 0xffffffff;
@@ -6634,7 +6639,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
 
             if (CODE64(s))
                 goto illegal_op;
-            ot = dflag;
+            ot = s->dflag;
             offset = insn_get(env, s, ot);
             selector = insn_get(env, s, MO_16);
 
@@ -6645,7 +6650,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
     case 0xeb: /* jmp Jb */
         tval = (int8_t)insn_get(env, s, MO_8);
         tval += s->pc - s->cs_base;
-        if (dflag == MO_16) {
+        if (s->dflag == MO_16) {
             tval &= 0xffff;
         }
         gen_jmp(s, tval);
@@ -6654,7 +6659,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
         tval = (int8_t)insn_get(env, s, MO_8);
         goto do_jcc;
     case 0x180 ... 0x18f: /* jcc Jv */
-        if (dflag != MO_16) {
+        if (s->dflag != MO_16) {
             tval = (int32_t)insn_get(env, s, MO_32);
         } else {
             tval = (int16_t)insn_get(env, s, MO_16);
@@ -6662,7 +6667,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
     do_jcc:
         next_eip = s->pc - s->cs_base;
         tval += next_eip;
-        if (dflag == MO_16) {
+        if (s->dflag == MO_16) {
             tval &= 0xffff;
         }
         gen_bnd_jmp(s);
@@ -6678,7 +6683,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
         if (!(s->cpuid_features & CPUID_CMOV)) {
             goto illegal_op;
         }
-        ot = dflag;
+        ot = s->dflag;
         modrm = x86_ldub_code(env, s);
         reg = ((modrm >> 3) & 7) | REX_R(s);
         gen_cmovcc1(env, s, ot, b, modrm, reg);
@@ -6703,7 +6708,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
         } else {
             ot = gen_pop_T0(s);
             if (s->cpl == 0) {
-                if (dflag != MO_16) {
+                if (s->dflag != MO_16) {
                     gen_helper_write_eflags(cpu_env, s->T0,
                                             tcg_const_i32((TF_MASK | AC_MASK |
                                                            ID_MASK | NT_MASK |
@@ -6718,7 +6723,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
                 }
             } else {
                 if (s->cpl <= s->iopl) {
-                    if (dflag != MO_16) {
+                    if (s->dflag != MO_16) {
                         gen_helper_write_eflags(cpu_env, s->T0,
                                                 tcg_const_i32((TF_MASK |
                                                                AC_MASK |
@@ -6735,7 +6740,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
                                                               & 0xffff));
                     }
                 } else {
-                    if (dflag != MO_16) {
+                    if (s->dflag != MO_16) {
                         gen_helper_write_eflags(cpu_env, s->T0,
                                            tcg_const_i32((TF_MASK | AC_MASK |
                                                           ID_MASK | NT_MASK)));
@@ -6795,7 +6800,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
         /************************/
         /* bit operations */
     case 0x1ba: /* bt/bts/btr/btc Gv, im */
-        ot = dflag;
+        ot = s->dflag;
         modrm = x86_ldub_code(env, s);
         op = (modrm >> 3) & 7;
         mod = (modrm >> 6) & 3;
@@ -6828,7 +6833,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
     case 0x1bb: /* btc */
         op = 3;
     do_btx:
-        ot = dflag;
+        ot = s->dflag;
         modrm = x86_ldub_code(env, s);
         reg = ((modrm >> 3) & 7) | REX_R(s);
         mod = (modrm >> 6) & 3;
@@ -6933,14 +6938,14 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
         break;
     case 0x1bc: /* bsf / tzcnt */
     case 0x1bd: /* bsr / lzcnt */
-        ot = dflag;
+        ot = s->dflag;
         modrm = x86_ldub_code(env, s);
         reg = ((modrm >> 3) & 7) | REX_R(s);
         gen_ldst_modrm(env, s, modrm, ot, OR_TMP0, 0);
         gen_extu(ot, s->T0);
 
         /* Note that lzcnt and tzcnt are in different extensions.  */
-        if ((prefixes & PREFIX_REPZ)
+        if ((s->prefix & PREFIX_REPZ)
             && (b & 1
                 ? s->cpuid_ext3_features & CPUID_EXT3_ABM
                 : s->cpuid_7_0_ebx_features & CPUID_7_0_EBX_BMI1)) {
@@ -7033,14 +7038,14 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
         /* misc */
     case 0x90: /* nop */
         /* XXX: correct lock test for all insn */
-        if (prefixes & PREFIX_LOCK) {
+        if (s->prefix & PREFIX_LOCK) {
             goto illegal_op;
         }
         /* If REX_B is set, then this is xchg eax, r8d, not a nop.  */
         if (REX_B(s)) {
             goto do_xchg_reg_eax;
         }
-        if (prefixes & PREFIX_REPZ) {
+        if (s->prefix & PREFIX_REPZ) {
             gen_update_cc_op(s);
             gen_jmp_im(s, pc_start - s->cs_base);
             gen_helper_pause(cpu_env, tcg_const_i32(s->pc - pc_start));
@@ -7107,7 +7112,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
     case 0x62: /* bound */
         if (CODE64(s))
             goto illegal_op;
-        ot = dflag;
+        ot = s->dflag;
         modrm = x86_ldub_code(env, s);
         reg = (modrm >> 3) & 7;
         mod = (modrm >> 6) & 3;
@@ -7125,7 +7130,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
     case 0x1c8 ... 0x1cf: /* bswap reg */
         reg = (b & 7) | REX_B(s);
 #ifdef TARGET_X86_64
-        if (dflag == MO_64) {
+        if (s->dflag == MO_64) {
             gen_op_mov_v_reg(s, MO_64, s->T0, reg);
             tcg_gen_bswap64_i64(s->T0, s->T0);
             gen_op_mov_reg_v(s, MO_64, reg, s->T0);
@@ -7155,7 +7160,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
             tval = (int8_t)insn_get(env, s, MO_8);
             next_eip = s->pc - s->cs_base;
             tval += next_eip;
-            if (dflag == MO_16) {
+            if (s->dflag == MO_16) {
                 tval &= 0xffff;
             }
 
@@ -7239,7 +7244,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
         if (!s->pe) {
             gen_exception(s, EXCP0D_GPF, pc_start - s->cs_base);
         } else {
-            gen_helper_sysexit(cpu_env, tcg_const_i32(dflag - 1));
+            gen_helper_sysexit(cpu_env, tcg_const_i32(s->dflag - 1));
             gen_eob(s);
         }
         break;
@@ -7258,7 +7263,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
         if (!s->pe) {
             gen_exception(s, EXCP0D_GPF, pc_start - s->cs_base);
         } else {
-            gen_helper_sysret(cpu_env, tcg_const_i32(dflag - 1));
+            gen_helper_sysret(cpu_env, tcg_const_i32(s->dflag - 1));
             /* condition codes are modified only in long mode */
             if (s->lma) {
                 set_cc_op(s, CC_OP_EFLAGS);
@@ -7297,7 +7302,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
             gen_svm_check_intercept(s, pc_start, SVM_EXIT_LDTR_READ);
             tcg_gen_ld32u_tl(s->T0, cpu_env,
                              offsetof(CPUX86State, ldt.selector));
-            ot = mod == 3 ? dflag : MO_16;
+            ot = mod == 3 ? s->dflag : MO_16;
             gen_ldst_modrm(env, s, modrm, ot, OR_TMP0, 1);
             break;
         case 2: /* lldt */
@@ -7318,7 +7323,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
             gen_svm_check_intercept(s, pc_start, SVM_EXIT_TR_READ);
             tcg_gen_ld32u_tl(s->T0, cpu_env,
                              offsetof(CPUX86State, tr.selector));
-            ot = mod == 3 ? dflag : MO_16;
+            ot = mod == 3 ? s->dflag : MO_16;
             gen_ldst_modrm(env, s, modrm, ot, OR_TMP0, 1);
             break;
         case 3: /* ltr */
@@ -7362,7 +7367,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
             gen_op_st_v(s, MO_16, s->T0, s->A0);
             gen_add_A0_im(s, 2);
             tcg_gen_ld_tl(s->T0, cpu_env, offsetof(CPUX86State, gdt.base));
-            if (dflag == MO_16) {
+            if (s->dflag == MO_16) {
                 tcg_gen_andi_tl(s->T0, s->T0, 0xffffff);
             }
             gen_op_st_v(s, CODE64(s) + MO_32, s->T0, s->A0);
@@ -7417,7 +7422,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
             gen_op_st_v(s, MO_16, s->T0, s->A0);
             gen_add_A0_im(s, 2);
             tcg_gen_ld_tl(s->T0, cpu_env, offsetof(CPUX86State, idt.base));
-            if (dflag == MO_16) {
+            if (s->dflag == MO_16) {
                 tcg_gen_andi_tl(s->T0, s->T0, 0xffffff);
             }
             gen_op_st_v(s, CODE64(s) + MO_32, s->T0, s->A0);
@@ -7567,7 +7572,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
             gen_op_ld_v(s, MO_16, s->T1, s->A0);
             gen_add_A0_im(s, 2);
             gen_op_ld_v(s, CODE64(s) + MO_32, s->T0, s->A0);
-            if (dflag == MO_16) {
+            if (s->dflag == MO_16) {
                 tcg_gen_andi_tl(s->T0, s->T0, 0xffffff);
             }
             tcg_gen_st_tl(s->T0, cpu_env, offsetof(CPUX86State, gdt.base));
@@ -7584,7 +7589,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
             gen_op_ld_v(s, MO_16, s->T1, s->A0);
             gen_add_A0_im(s, 2);
             gen_op_ld_v(s, CODE64(s) + MO_32, s->T0, s->A0);
-            if (dflag == MO_16) {
+            if (s->dflag == MO_16) {
                 tcg_gen_andi_tl(s->T0, s->T0, 0xffffff);
             }
             tcg_gen_st_tl(s->T0, cpu_env, offsetof(CPUX86State, idt.base));
@@ -7603,7 +7608,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
             gen_ldst_modrm(env, s, modrm, ot, OR_TMP0, 1);
             break;
         case 0xee: /* rdpkru */
-            if (prefixes & PREFIX_LOCK) {
+            if (s->prefix & PREFIX_LOCK) {
                 goto illegal_op;
             }
             tcg_gen_trunc_tl_i32(s->tmp2_i32, cpu_regs[R_ECX]);
@@ -7611,7 +7616,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
             tcg_gen_extr_i64_tl(cpu_regs[R_EAX], cpu_regs[R_EDX], s->tmp1_i64);
             break;
         case 0xef: /* wrpkru */
-            if (prefixes & PREFIX_LOCK) {
+            if (s->prefix & PREFIX_LOCK) {
                 goto illegal_op;
             }
             tcg_gen_concat_tl_i64(s->tmp1_i64, cpu_regs[R_EAX],
@@ -7696,7 +7701,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
         if (CODE64(s)) {
             int d_ot;
             /* d_ot is the size of destination */
-            d_ot = dflag;
+            d_ot = s->dflag;
 
             modrm = x86_ldub_code(env, s);
             reg = ((modrm >> 3) & 7) | REX_R(s);
@@ -7771,7 +7776,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
             TCGv t0;
             if (!s->pe || s->vm86)
                 goto illegal_op;
-            ot = dflag != MO_16 ? MO_32 : MO_16;
+            ot = s->dflag != MO_16 ? MO_32 : MO_16;
             modrm = x86_ldub_code(env, s);
             reg = ((modrm >> 3) & 7) | REX_R(s);
             gen_ldst_modrm(env, s, modrm, MO_16, OR_TMP0, 0);
@@ -7815,18 +7820,18 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
         if (s->flags & HF_MPX_EN_MASK) {
             mod = (modrm >> 6) & 3;
             reg = ((modrm >> 3) & 7) | REX_R(s);
-            if (prefixes & PREFIX_REPZ) {
+            if (s->prefix & PREFIX_REPZ) {
                 /* bndcl */
                 if (reg >= 4
-                    || (prefixes & PREFIX_LOCK)
+                    || (s->prefix & PREFIX_LOCK)
                     || s->aflag == MO_16) {
                     goto illegal_op;
                 }
                 gen_bndck(env, s, modrm, TCG_COND_LTU, cpu_bndl[reg]);
-            } else if (prefixes & PREFIX_REPNZ) {
+            } else if (s->prefix & PREFIX_REPNZ) {
                 /* bndcu */
                 if (reg >= 4
-                    || (prefixes & PREFIX_LOCK)
+                    || (s->prefix & PREFIX_LOCK)
                     || s->aflag == MO_16) {
                     goto illegal_op;
                 }
@@ -7834,14 +7839,14 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
                 tcg_gen_not_i64(notu, cpu_bndu[reg]);
                 gen_bndck(env, s, modrm, TCG_COND_GTU, notu);
                 tcg_temp_free_i64(notu);
-            } else if (prefixes & PREFIX_DATA) {
+            } else if (s->prefix & PREFIX_DATA) {
                 /* bndmov -- from reg/mem */
                 if (reg >= 4 || s->aflag == MO_16) {
                     goto illegal_op;
                 }
                 if (mod == 3) {
                     int reg2 = (modrm & 7) | REX_B(s);
-                    if (reg2 >= 4 || (prefixes & PREFIX_LOCK)) {
+                    if (reg2 >= 4 || (s->prefix & PREFIX_LOCK)) {
                         goto illegal_op;
                     }
                     if (s->flags & HF_MPX_IU_MASK) {
@@ -7870,7 +7875,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
                 /* bndldx */
                 AddressParts a = gen_lea_modrm_0(env, s, modrm);
                 if (reg >= 4
-                    || (prefixes & PREFIX_LOCK)
+                    || (s->prefix & PREFIX_LOCK)
                     || s->aflag == MO_16
                     || a.base < -1) {
                     goto illegal_op;
@@ -7905,10 +7910,10 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
         if (s->flags & HF_MPX_EN_MASK) {
             mod = (modrm >> 6) & 3;
             reg = ((modrm >> 3) & 7) | REX_R(s);
-            if (mod != 3 && (prefixes & PREFIX_REPZ)) {
+            if (mod != 3 && (s->prefix & PREFIX_REPZ)) {
                 /* bndmk */
                 if (reg >= 4
-                    || (prefixes & PREFIX_LOCK)
+                    || (s->prefix & PREFIX_LOCK)
                     || s->aflag == MO_16) {
                     goto illegal_op;
                 }
@@ -7933,22 +7938,22 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
                 /* bnd registers are now in-use */
                 gen_set_hflag(s, HF_MPX_IU_MASK);
                 break;
-            } else if (prefixes & PREFIX_REPNZ) {
+            } else if (s->prefix & PREFIX_REPNZ) {
                 /* bndcn */
                 if (reg >= 4
-                    || (prefixes & PREFIX_LOCK)
+                    || (s->prefix & PREFIX_LOCK)
                     || s->aflag == MO_16) {
                     goto illegal_op;
                 }
                 gen_bndck(env, s, modrm, TCG_COND_GTU, cpu_bndu[reg]);
-            } else if (prefixes & PREFIX_DATA) {
+            } else if (s->prefix & PREFIX_DATA) {
                 /* bndmov -- to reg/mem */
                 if (reg >= 4 || s->aflag == MO_16) {
                     goto illegal_op;
                 }
                 if (mod == 3) {
                     int reg2 = (modrm & 7) | REX_B(s);
-                    if (reg2 >= 4 || (prefixes & PREFIX_LOCK)) {
+                    if (reg2 >= 4 || (s->prefix & PREFIX_LOCK)) {
                         goto illegal_op;
                     }
                     if (s->flags & HF_MPX_IU_MASK) {
@@ -7975,7 +7980,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
                 /* bndstx */
                 AddressParts a = gen_lea_modrm_0(env, s, modrm);
                 if (reg >= 4
-                    || (prefixes & PREFIX_LOCK)
+                    || (s->prefix & PREFIX_LOCK)
                     || s->aflag == MO_16
                     || a.base < -1) {
                     goto illegal_op;
@@ -8023,7 +8028,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
                 ot = MO_64;
             else
                 ot = MO_32;
-            if ((prefixes & PREFIX_LOCK) && (reg == 0) &&
+            if ((s->prefix & PREFIX_LOCK) && (reg == 0) &&
                 (s->cpuid_ext3_features & CPUID_EXT3_CR8LEG)) {
                 reg = 8;
             }
@@ -8113,7 +8118,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
     case 0x1c3: /* MOVNTI reg, mem */
         if (!(s->cpuid_features & CPUID_SSE2))
             goto illegal_op;
-        ot = mo_64_32(dflag);
+        ot = mo_64_32(s->dflag);
         modrm = x86_ldub_code(env, s);
         mod = (modrm >> 6) & 3;
         if (mod == 3)
@@ -8127,7 +8132,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
         switch (modrm) {
         CASE_MODRM_MEM_OP(0): /* fxsave */
             if (!(s->cpuid_features & CPUID_FXSR)
-                || (prefixes & PREFIX_LOCK)) {
+                || (s->prefix & PREFIX_LOCK)) {
                 goto illegal_op;
             }
             if ((s->flags & HF_EM_MASK) || (s->flags & HF_TS_MASK)) {
@@ -8140,7 +8145,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
 
         CASE_MODRM_MEM_OP(1): /* fxrstor */
             if (!(s->cpuid_features & CPUID_FXSR)
-                || (prefixes & PREFIX_LOCK)) {
+                || (s->prefix & PREFIX_LOCK)) {
                 goto illegal_op;
             }
             if ((s->flags & HF_EM_MASK) || (s->flags & HF_TS_MASK)) {
@@ -8179,8 +8184,8 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
 
         CASE_MODRM_MEM_OP(4): /* xsave */
             if ((s->cpuid_ext_features & CPUID_EXT_XSAVE) == 0
-                || (prefixes & (PREFIX_LOCK | PREFIX_DATA
-                                | PREFIX_REPZ | PREFIX_REPNZ))) {
+                || (s->prefix & (PREFIX_LOCK | PREFIX_DATA
+                                   | PREFIX_REPZ | PREFIX_REPNZ))) {
                 goto illegal_op;
             }
             gen_lea_modrm(env, s, modrm);
@@ -8191,8 +8196,8 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
 
         CASE_MODRM_MEM_OP(5): /* xrstor */
             if ((s->cpuid_ext_features & CPUID_EXT_XSAVE) == 0
-                || (prefixes & (PREFIX_LOCK | PREFIX_DATA
-                                | PREFIX_REPZ | PREFIX_REPNZ))) {
+                || (s->prefix & (PREFIX_LOCK | PREFIX_DATA
+                                   | PREFIX_REPZ | PREFIX_REPNZ))) {
                 goto illegal_op;
             }
             gen_lea_modrm(env, s, modrm);
@@ -8207,10 +8212,10 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
             break;
 
         CASE_MODRM_MEM_OP(6): /* xsaveopt / clwb */
-            if (prefixes & PREFIX_LOCK) {
+            if (s->prefix & PREFIX_LOCK) {
                 goto illegal_op;
             }
-            if (prefixes & PREFIX_DATA) {
+            if (s->prefix & PREFIX_DATA) {
                 /* clwb */
                 if (!(s->cpuid_7_0_ebx_features & CPUID_7_0_EBX_CLWB)) {
                     goto illegal_op;
@@ -8220,7 +8225,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
                 /* xsaveopt */
                 if ((s->cpuid_ext_features & CPUID_EXT_XSAVE) == 0
                     || (s->cpuid_xsave_features & CPUID_XSAVE_XSAVEOPT) == 0
-                    || (prefixes & (PREFIX_REPZ | PREFIX_REPNZ))) {
+                    || (s->prefix & (PREFIX_REPZ | PREFIX_REPNZ))) {
                     goto illegal_op;
                 }
                 gen_lea_modrm(env, s, modrm);
@@ -8231,10 +8236,10 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
             break;
 
         CASE_MODRM_MEM_OP(7): /* clflush / clflushopt */
-            if (prefixes & PREFIX_LOCK) {
+            if (s->prefix & PREFIX_LOCK) {
                 goto illegal_op;
             }
-            if (prefixes & PREFIX_DATA) {
+            if (s->prefix & PREFIX_DATA) {
                 /* clflushopt */
                 if (!(s->cpuid_7_0_ebx_features & CPUID_7_0_EBX_CLFLUSHOPT)) {
                     goto illegal_op;
@@ -8254,8 +8259,8 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
         case 0xd0 ... 0xd7: /* wrfsbase (f3 0f ae /2) */
         case 0xd8 ... 0xdf: /* wrgsbase (f3 0f ae /3) */
             if (CODE64(s)
-                && (prefixes & PREFIX_REPZ)
-                && !(prefixes & PREFIX_LOCK)
+                && (s->prefix & PREFIX_REPZ)
+                && !(s->prefix & PREFIX_LOCK)
                 && (s->cpuid_7_0_ebx_features & CPUID_7_0_EBX_FSGSBASE)) {
                 TCGv base, treg, src, dst;
 
@@ -8284,10 +8289,10 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
             goto unknown_op;
 
         case 0xf8: /* sfence / pcommit */
-            if (prefixes & PREFIX_DATA) {
+            if (s->prefix & PREFIX_DATA) {
                 /* pcommit */
                 if (!(s->cpuid_7_0_ebx_features & CPUID_7_0_EBX_PCOMMIT)
-                    || (prefixes & PREFIX_LOCK)) {
+                    || (s->prefix & PREFIX_LOCK)) {
                     goto illegal_op;
                 }
                 break;
@@ -8295,21 +8300,21 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
             /* fallthru */
         case 0xf9 ... 0xff: /* sfence */
             if (!(s->cpuid_features & CPUID_SSE)
-                || (prefixes & PREFIX_LOCK)) {
+                || (s->prefix & PREFIX_LOCK)) {
                 goto illegal_op;
             }
             tcg_gen_mb(TCG_MO_ST_ST | TCG_BAR_SC);
             break;
         case 0xe8 ... 0xef: /* lfence */
             if (!(s->cpuid_features & CPUID_SSE)
-                || (prefixes & PREFIX_LOCK)) {
+                || (s->prefix & PREFIX_LOCK)) {
                 goto illegal_op;
             }
             tcg_gen_mb(TCG_MO_LD_LD | TCG_BAR_SC);
             break;
         case 0xf0 ... 0xf7: /* mfence */
             if (!(s->cpuid_features & CPUID_SSE2)
-                || (prefixes & PREFIX_LOCK)) {
+                || (s->prefix & PREFIX_LOCK)) {
                 goto illegal_op;
             }
             tcg_gen_mb(TCG_MO_ALL | TCG_BAR_SC);
@@ -8337,8 +8342,8 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
         gen_eob(s);
         break;
     case 0x1b8: /* SSE4.2 popcnt */
-        if ((prefixes & (PREFIX_REPZ | PREFIX_LOCK | PREFIX_REPNZ)) !=
-             PREFIX_REPZ)
+        if ((s->prefix & (PREFIX_REPZ | PREFIX_LOCK | PREFIX_REPNZ)) !=
+            PREFIX_REPZ)
             goto illegal_op;
         if (!(s->cpuid_ext_features & CPUID_EXT_POPCNT))
             goto illegal_op;
@@ -8349,7 +8354,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
         if (s->prefix & PREFIX_DATA) {
             ot = MO_16;
         } else {
-            ot = mo_64_32(dflag);
+            ot = mo_64_32(s->dflag);
         }
 
         gen_ldst_modrm(env, s, modrm, ot, OR_TMP0, 0);
-- 
2.20.1

Re: [Qemu-devel] [RFC PATCH v1 03/22] target/i386: Use prefix, aflag and dflag from DisasContext

[Aleksandar Markovic]

On Wed, Jul 31, 2019 at 7:59 PM Jan Bobek <jan.bobek@gmail.com> wrote:

> From: Richard Henderson <rth@twiddle.net>
>
> The variables are already there, we just have to hide the ones
> in disas_insn so that we are forced to use them.
>
> Signed-off-by: Richard Henderson <rth@twiddle.net>
> ---
>  target/i386/translate.c | 299 ++++++++++++++++++++--------------------
>  1 file changed, 152 insertions(+), 147 deletions(-)
>
>
Hi, Jan.

The series overall looks great, and hopefully you will refine rough
around the edges parts soon. Thanks for this valuable contribution!

About this patch, I noticed that it mentions "aflag" in the title, but
the patch actually does not change any code related to the variable
"aflag" in the described sense - it looks to me it just reduces the
scope of the local variable "aflag", which is certainly different than
"use aflag from DisasContext" as it could be implied from the
patch title. You definitely should not confuse the readers with
such inaccuracies.

Actually, I think the patch would look much better if split into three
patches (easier for reviewing, and also clearer for future developers),
wouldn't it?

Yours,
Aleksandar

Use prefix, aflag and dflag from DisasContex.



> diff --git a/target/i386/translate.c b/target/i386/translate.c
> index c0866c2797..692261f73f 100644
> --- a/target/i386/translate.c
> +++ b/target/i386/translate.c
> @@ -4491,13 +4491,17 @@ static void gen_sse(CPUX86State *env, DisasContext
> *s, int b,
>  static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
>  {
>      CPUX86State *env = cpu->env_ptr;
> -    int b, prefixes;
> +    int b;
>      int shift;git show
> -    TCGMemOp ot, aflag, dflag;
> +    TCGMemOp ot;
>      int modrm, reg, rm, mod, op, opreg, val;
>      target_ulong next_eip, tval;
>      target_ulong pc_start = s->base.pc_next;
>
> +    {
> +    int prefixes;
> +    TCGMemOp aflag, dflag;
> +
>      s->pc_start = s->pc = pc_start;
>      s->override = -1;
>  #ifdef TARGET_X86_64
> @@ -4657,6 +4661,7 @@ static target_ulong disas_insn(DisasContext *s,
> CPUState *cpu)
>      s->prefix = prefixes;
>      s->aflag = aflag;
>      s->dflag = dflag;
> +    }
>
>      /* now check op code */
>   reswitch:
> @@ -4682,7 +4687,7 @@ static target_ulong disas_insn(DisasContext *s,
> CPUState *cpu)
>              op = (b >> 3) & 7;
>              f = (b >> 1) & 3;
>
> -            ot = mo_b_d(b, dflag);
> +            ot = mo_b_d(b, s->dflag);
>
>              switch(f) {
>              case 0: /* OP Ev, Gv */
> @@ -4740,7 +4745,7 @@ static target_ulong disas_insn(DisasContext *s,
> CPUState *cpu)
>          {
>              int val;
>
> -            ot = mo_b_d(b, dflag);
> +            ot = mo_b_d(b, s->dflag);
>
>              modrm = x86_ldub_code(env, s);
>              mod = (modrm >> 6) & 3;
> @@ -4777,16 +4782,16 @@ static target_ulong disas_insn(DisasContext *s,
> CPUState *cpu)
>          /**************************/
>          /* inc, dec, and other misc arith */
>      case 0x40 ... 0x47: /* inc Gv */
> -        ot = dflag;
> +        ot = s->dflag;
>          gen_inc(s, ot, OR_EAX + (b & 7), 1);
>          break;
>      case 0x48 ... 0x4f: /* dec Gv */
> -        ot = dflag;
> +        ot = s->dflag;
>          gen_inc(s, ot, OR_EAX + (b & 7), -1);
>          break;
>      case 0xf6: /* GRP3 */
>      case 0xf7:
> -        ot = mo_b_d(b, dflag);
> +        ot = mo_b_d(b, s->dflag);
>
>          modrm = x86_ldub_code(env, s);
>          mod = (modrm >> 6) & 3;
> @@ -5018,7 +5023,7 @@ static target_ulong disas_insn(DisasContext *s,
> CPUState *cpu)
>
>      case 0xfe: /* GRP4 */
>      case 0xff: /* GRP5 */
> -        ot = mo_b_d(b, dflag);
> +        ot = mo_b_d(b, s->dflag);
>
>          modrm = x86_ldub_code(env, s);
>          mod = (modrm >> 6) & 3;
> @@ -5032,10 +5037,10 @@ static target_ulong disas_insn(DisasContext *s,
> CPUState *cpu)
>                  /* operand size for jumps is 64 bit */
>                  ot = MO_64;
>              } else if (op == 3 || op == 5) {
> -                ot = dflag != MO_16 ? MO_32 + (REX_W(s) == 1) : MO_16;
> +                ot = s->dflag != MO_16 ? MO_32 + (REX_W(s) == 1) : MO_16;
>              } else if (op == 6) {
>                  /* default push size is 64 bit */
> -                ot = mo_pushpop(s, dflag);
> +                ot = mo_pushpop(s, s->dflag);
>              }
>          }
>          if (mod != 3) {
> @@ -5063,7 +5068,7 @@ static target_ulong disas_insn(DisasContext *s,
> CPUState *cpu)
>              break;
>          case 2: /* call Ev */
>              /* XXX: optimize if memory (no 'and' is necessary) */
> -            if (dflag == MO_16) {
> +            if (s->dflag == MO_16) {
>                  tcg_gen_ext16u_tl(s->T0, s->T0);
>              }
>              next_eip = s->pc - s->cs_base;
> @@ -5081,19 +5086,19 @@ static target_ulong disas_insn(DisasContext *s,
> CPUState *cpu)
>              if (s->pe && !s->vm86) {
>                  tcg_gen_trunc_tl_i32(s->tmp2_i32, s->T0);
>                  gen_helper_lcall_protected(cpu_env, s->tmp2_i32, s->T1,
> -                                           tcg_const_i32(dflag - 1),
> +                                           tcg_const_i32(s->dflag - 1),
>                                             tcg_const_tl(s->pc -
> s->cs_base));
>              } else {
>                  tcg_gen_trunc_tl_i32(s->tmp2_i32, s->T0);
>                  gen_helper_lcall_real(cpu_env, s->tmp2_i32, s->T1,
> -                                      tcg_const_i32(dflag - 1),
> +                                      tcg_const_i32(s->dflag - 1),
>                                        tcg_const_i32(s->pc - s->cs_base));
>              }
>              tcg_gen_ld_tl(s->tmp4, cpu_env, offsetof(CPUX86State, eip));
>              gen_jr(s, s->tmp4);
>              break;
>          case 4: /* jmp Ev */
> -            if (dflag == MO_16) {
> +            if (s->dflag == MO_16) {
>                  tcg_gen_ext16u_tl(s->T0, s->T0);
>              }
>              gen_op_jmp_v(s->T0);
> @@ -5126,7 +5131,7 @@ static target_ulong disas_insn(DisasContext *s,
> CPUState *cpu)
>
>      case 0x84: /* test Ev, Gv */
>      case 0x85:
> -        ot = mo_b_d(b, dflag);
> +        ot = mo_b_d(b, s->dflag);
>
>          modrm = x86_ldub_code(env, s);
>          reg = ((modrm >> 3) & 7) | REX_R(s);
> @@ -5139,7 +5144,7 @@ static target_ulong disas_insn(DisasContext *s,
> CPUState *cpu)
>
>      case 0xa8: /* test eAX, Iv */
>      case 0xa9:
> -        ot = mo_b_d(b, dflag);
> +        ot = mo_b_d(b, s->dflag);
>          val = insn_get(env, s, ot);
>
>          gen_op_mov_v_reg(s, ot, s->T0, OR_EAX);
> @@ -5149,7 +5154,7 @@ static target_ulong disas_insn(DisasContext *s,
> CPUState *cpu)
>          break;
>
>      case 0x98: /* CWDE/CBW */
> -        switch (dflag) {
> +        switch (s->dflag) {
>  #ifdef TARGET_X86_64
>          case MO_64:
>              gen_op_mov_v_reg(s, MO_32, s->T0, R_EAX);
> @@ -5172,7 +5177,7 @@ static target_ulong disas_insn(DisasContext *s,
> CPUState *cpu)
>          }
>          break;
>      case 0x99: /* CDQ/CWD */
> -        switch (dflag) {
> +        switch (s->dflag) {
>  #ifdef TARGET_X86_64
>          case MO_64:
>              gen_op_mov_v_reg(s, MO_64, s->T0, R_EAX);
> @@ -5199,7 +5204,7 @@ static target_ulong disas_insn(DisasContext *s,
> CPUState *cpu)
>      case 0x1af: /* imul Gv, Ev */
>      case 0x69: /* imul Gv, Ev, I */
>      case 0x6b:
> -        ot = dflag;
> +        ot = s->dflag;
>          modrm = x86_ldub_code(env, s);
>          reg = ((modrm >> 3) & 7) | REX_R(s);
>          if (b == 0x69)
> @@ -5251,7 +5256,7 @@ static target_ulong disas_insn(DisasContext *s,
> CPUState *cpu)
>          break;
>      case 0x1c0:
>      case 0x1c1: /* xadd Ev, Gv */
> -        ot = mo_b_d(b, dflag);
> +        ot = mo_b_d(b, s->dflag);
>          modrm = x86_ldub_code(env, s);
>          reg = ((modrm >> 3) & 7) | REX_R(s);
>          mod = (modrm >> 6) & 3;
> @@ -5283,7 +5288,7 @@ static target_ulong disas_insn(DisasContext *s,
> CPUState *cpu)
>          {
>              TCGv oldv, newv, cmpv;
>
> -            ot = mo_b_d(b, dflag);
> +            ot = mo_b_d(b, s->dflag);
>              modrm = x86_ldub_code(env, s);
>              reg = ((modrm >> 3) & 7) | REX_R(s);
>              mod = (modrm >> 6) & 3;
> @@ -5344,7 +5349,7 @@ static target_ulong disas_insn(DisasContext *s,
> CPUState *cpu)
>                  goto illegal_op;
>              }
>  #ifdef TARGET_X86_64
> -            if (dflag == MO_64) {
> +            if (s->dflag == MO_64) {
>                  if (!(s->cpuid_ext_features & CPUID_EXT_CX16)) {
>                      goto illegal_op;
>                  }
> @@ -5384,7 +5389,7 @@ static target_ulong disas_insn(DisasContext *s,
> CPUState *cpu)
>              }
>              gen_helper_rdrand(s->T0, cpu_env);
>              rm = (modrm & 7) | REX_B(s);
> -            gen_op_mov_reg_v(s, dflag, rm, s->T0);
> +            gen_op_mov_reg_v(s, s->dflag, rm, s->T0);
>              set_cc_op(s, CC_OP_EFLAGS);
>              if (tb_cflags(s->base.tb) & CF_USE_ICOUNT) {
>                  gen_io_end();
> @@ -5421,7 +5426,7 @@ static target_ulong disas_insn(DisasContext *s,
> CPUState *cpu)
>          break;
>      case 0x68: /* push Iv */
>      case 0x6a:
> -        ot = mo_pushpop(s, dflag);
> +        ot = mo_pushpop(s, s->dflag);
>          if (b == 0x68)
>              val = insn_get(env, s, ot);
>          else
> @@ -5506,7 +5511,7 @@ static target_ulong disas_insn(DisasContext *s,
> CPUState *cpu)
>          /* mov */
>      case 0x88:
>      case 0x89: /* mov Gv, Ev */
> -        ot = mo_b_d(b, dflag);
> +        ot = mo_b_d(b, s->dflag);
>          modrm = x86_ldub_code(env, s);
>          reg = ((modrm >> 3) & 7) | REX_R(s);
>
> @@ -5515,7 +5520,7 @@ static target_ulong disas_insn(DisasContext *s,
> CPUState *cpu)
>          break;
>      case 0xc6:
>      case 0xc7: /* mov Ev, Iv */
> -        ot = mo_b_d(b, dflag);
> +        ot = mo_b_d(b, s->dflag);
>          modrm = x86_ldub_code(env, s);
>          mod = (modrm >> 6) & 3;
>          if (mod != 3) {
> @@ -5532,7 +5537,7 @@ static target_ulong disas_insn(DisasContext *s,
> CPUState *cpu)
>          break;
>      case 0x8a:
>      case 0x8b: /* mov Ev, Gv */
> -        ot = mo_b_d(b, dflag);
> +        ot = mo_b_d(b, s->dflag);
>          modrm = x86_ldub_code(env, s);
>          reg = ((modrm >> 3) & 7) | REX_R(s);
>
> @@ -5564,7 +5569,7 @@ static target_ulong disas_insn(DisasContext *s,
> CPUState *cpu)
>          if (reg >= 6)
>              goto illegal_op;
>          gen_op_movl_T0_seg(s, reg);
> -        ot = mod == 3 ? dflag : MO_16;
> +        ot = mod == 3 ? s->dflag : MO_16;
>          gen_ldst_modrm(env, s, modrm, ot, OR_TMP0, 1);
>          break;
>
> @@ -5577,7 +5582,7 @@ static target_ulong disas_insn(DisasContext *s,
> CPUState *cpu)
>              TCGMemOp s_ot;
>
>              /* d_ot is the size of destination */
> -            d_ot = dflag;
> +            d_ot = s->dflag;
>              /* ot is the size of source */
>              ot = (b & 1) + MO_8;
>              /* s_ot is the sign+size of source */
> @@ -5628,7 +5633,7 @@ static target_ulong disas_insn(DisasContext *s,
> CPUState *cpu)
>              AddressParts a = gen_lea_modrm_0(env, s, modrm);
>              TCGv ea = gen_lea_modrm_1(s, a);
>              gen_lea_v_seg(s, s->aflag, ea, -1, -1);
> -            gen_op_mov_reg_v(s, dflag, reg, s->A0);
> +            gen_op_mov_reg_v(s, s->dflag, reg, s->A0);
>          }
>          break;
>
> @@ -5639,7 +5644,7 @@ static target_ulong disas_insn(DisasContext *s,
> CPUState *cpu)
>          {
>              target_ulong offset_addr;
>
> -            ot = mo_b_d(b, dflag);
> +            ot = mo_b_d(b, s->dflag);
>              switch (s->aflag) {
>  #ifdef TARGET_X86_64
>              case MO_64:
> @@ -5677,7 +5682,7 @@ static target_ulong disas_insn(DisasContext *s,
> CPUState *cpu)
>          break;
>      case 0xb8 ... 0xbf: /* mov R, Iv */
>  #ifdef TARGET_X86_64
> -        if (dflag == MO_64) {
> +        if (s->dflag == MO_64) {
>              uint64_t tmp;
>              /* 64 bit case */
>              tmp = x86_ldq_code(env, s);
> @@ -5687,7 +5692,7 @@ static target_ulong disas_insn(DisasContext *s,
> CPUState *cpu)
>          } else
>  #endif
>          {
> -            ot = dflag;
> +            ot = s->dflag;
>              val = insn_get(env, s, ot);
>              reg = (b & 7) | REX_B(s);
>              tcg_gen_movi_tl(s->T0, val);
> @@ -5697,13 +5702,13 @@ static target_ulong disas_insn(DisasContext *s,
> CPUState *cpu)
>
>      case 0x91 ... 0x97: /* xchg R, EAX */
>      do_xchg_reg_eax:
> -        ot = dflag;
> +        ot = s->dflag;
>          reg = (b & 7) | REX_B(s);
>          rm = R_EAX;
>          goto do_xchg_reg;
>      case 0x86:
>      case 0x87: /* xchg Ev, Gv */
> -        ot = mo_b_d(b, dflag);
> +        ot = mo_b_d(b, s->dflag);
>          modrm = x86_ldub_code(env, s);
>          reg = ((modrm >> 3) & 7) | REX_R(s);
>          mod = (modrm >> 6) & 3;
> @@ -5740,7 +5745,7 @@ static target_ulong disas_insn(DisasContext *s,
> CPUState *cpu)
>      case 0x1b5: /* lgs Gv */
>          op = R_GS;
>      do_lxx:
> -        ot = dflag != MO_16 ? MO_32 : MO_16;
> +        ot = s->dflag != MO_16 ? MO_32 : MO_16;
>          modrm = x86_ldub_code(env, s);
>          reg = ((modrm >> 3) & 7) | REX_R(s);
>          mod = (modrm >> 6) & 3;
> @@ -5768,7 +5773,7 @@ static target_ulong disas_insn(DisasContext *s,
> CPUState *cpu)
>          shift = 2;
>      grp2:
>          {
> -            ot = mo_b_d(b, dflag);
> +            ot = mo_b_d(b, s->dflag);
>              modrm = x86_ldub_code(env, s);
>              mod = (modrm >> 6) & 3;
>              op = (modrm >> 3) & 7;
> @@ -5821,7 +5826,7 @@ static target_ulong disas_insn(DisasContext *s,
> CPUState *cpu)
>          op = 1;
>          shift = 0;
>      do_shiftd:
> -        ot = dflag;
> +        ot = s->dflag;
>          modrm = x86_ldub_code(env, s);
>          mod = (modrm >> 6) & 3;
>          rm = (modrm & 7) | REX_B(s);
> @@ -5983,7 +5988,7 @@ static target_ulong disas_insn(DisasContext *s,
> CPUState *cpu)
>                  }
>                  break;
>              case 0x0c: /* fldenv mem */
> -                gen_helper_fldenv(cpu_env, s->A0, tcg_const_i32(dflag -
> 1));
> +                gen_helper_fldenv(cpu_env, s->A0, tcg_const_i32(s->dflag
> - 1));
>                  break;
>              case 0x0d: /* fldcw mem */
>                  tcg_gen_qemu_ld_i32(s->tmp2_i32, s->A0,
> @@ -5991,7 +5996,7 @@ static target_ulong disas_insn(DisasContext *s,
> CPUState *cpu)
>                  gen_helper_fldcw(cpu_env, s->tmp2_i32);
>                  break;
>              case 0x0e: /* fnstenv mem */
> -                gen_helper_fstenv(cpu_env, s->A0, tcg_const_i32(dflag -
> 1));
> +                gen_helper_fstenv(cpu_env, s->A0, tcg_const_i32(s->dflag
> - 1));
>                  break;
>              case 0x0f: /* fnstcw mem */
>                  gen_helper_fnstcw(s->tmp2_i32, cpu_env);
> @@ -6006,10 +6011,10 @@ static target_ulong disas_insn(DisasContext *s,
> CPUState *cpu)
>                  gen_helper_fpop(cpu_env);
>                  break;
>              case 0x2c: /* frstor mem */
> -                gen_helper_frstor(cpu_env, s->A0, tcg_const_i32(dflag -
> 1));
> +                gen_helper_frstor(cpu_env, s->A0, tcg_const_i32(s->dflag
> - 1));
>                  break;
>              case 0x2e: /* fnsave mem */
> -                gen_helper_fsave(cpu_env, s->A0, tcg_const_i32(dflag -
> 1));
> +                gen_helper_fsave(cpu_env, s->A0, tcg_const_i32(s->dflag -
> 1));
>                  break;
>              case 0x2f: /* fnstsw mem */
>                  gen_helper_fnstsw(s->tmp2_i32, cpu_env);
> @@ -6351,8 +6356,8 @@ static target_ulong disas_insn(DisasContext *s,
> CPUState *cpu)
>
>      case 0xa4: /* movsS */
>      case 0xa5:
> -        ot = mo_b_d(b, dflag);
> -        if (prefixes & (PREFIX_REPZ | PREFIX_REPNZ)) {
> +        ot = mo_b_d(b, s->dflag);
> +        if (s->prefix & (PREFIX_REPZ | PREFIX_REPNZ)) {
>              gen_repz_movs(s, ot, pc_start - s->cs_base, s->pc -
> s->cs_base);
>          } else {
>              gen_movs(s, ot);
> @@ -6361,8 +6366,8 @@ static target_ulong disas_insn(DisasContext *s,
> CPUState *cpu)
>
>      case 0xaa: /* stosS */
>      case 0xab:
> -        ot = mo_b_d(b, dflag);
> -        if (prefixes & (PREFIX_REPZ | PREFIX_REPNZ)) {
> +        ot = mo_b_d(b, s->dflag);
> +        if (s->prefix & (PREFIX_REPZ | PREFIX_REPNZ)) {
>              gen_repz_stos(s, ot, pc_start - s->cs_base, s->pc -
> s->cs_base);
>          } else {
>              gen_stos(s, ot);
> @@ -6370,8 +6375,8 @@ static target_ulong disas_insn(DisasContext *s,
> CPUState *cpu)
>          break;
>      case 0xac: /* lodsS */
>      case 0xad:
> -        ot = mo_b_d(b, dflag);
> -        if (prefixes & (PREFIX_REPZ | PREFIX_REPNZ)) {
> +        ot = mo_b_d(b, s->dflag);
> +        if (s->prefix & (PREFIX_REPZ | PREFIX_REPNZ)) {
>              gen_repz_lods(s, ot, pc_start - s->cs_base, s->pc -
> s->cs_base);
>          } else {
>              gen_lods(s, ot);
> @@ -6379,10 +6384,10 @@ static target_ulong disas_insn(DisasContext *s,
> CPUState *cpu)
>          break;
>      case 0xae: /* scasS */
>      case 0xaf:
> -        ot = mo_b_d(b, dflag);
> -        if (prefixes & PREFIX_REPNZ) {
> +        ot = mo_b_d(b, s->dflag);
> +        if (s->prefix & PREFIX_REPNZ) {
>              gen_repz_scas(s, ot, pc_start - s->cs_base, s->pc -
> s->cs_base, 1);
> -        } else if (prefixes & PREFIX_REPZ) {
> +        } else if (s->prefix & PREFIX_REPZ) {
>              gen_repz_scas(s, ot, pc_start - s->cs_base, s->pc -
> s->cs_base, 0);
>          } else {
>              gen_scas(s, ot);
> @@ -6391,10 +6396,10 @@ static target_ulong disas_insn(DisasContext *s,
> CPUState *cpu)
>
>      case 0xa6: /* cmpsS */
>      case 0xa7:
> -        ot = mo_b_d(b, dflag);
> -        if (prefixes & PREFIX_REPNZ) {
> +        ot = mo_b_d(b, s->dflag);
> +        if (s->prefix & PREFIX_REPNZ) {
>              gen_repz_cmps(s, ot, pc_start - s->cs_base, s->pc -
> s->cs_base, 1);
> -        } else if (prefixes & PREFIX_REPZ) {
> +        } else if (s->prefix & PREFIX_REPZ) {
>              gen_repz_cmps(s, ot, pc_start - s->cs_base, s->pc -
> s->cs_base, 0);
>          } else {
>              gen_cmps(s, ot);
> @@ -6402,11 +6407,11 @@ static target_ulong disas_insn(DisasContext *s,
> CPUState *cpu)
>          break;
>      case 0x6c: /* insS */
>      case 0x6d:
> -        ot = mo_b_d32(b, dflag);
> +        ot = mo_b_d32(b, s->dflag);
>          tcg_gen_ext16u_tl(s->T0, cpu_regs[R_EDX]);
>          gen_check_io(s, ot, pc_start - s->cs_base,
> -                     SVM_IOIO_TYPE_MASK | svm_is_rep(prefixes) | 4);
> -        if (prefixes & (PREFIX_REPZ | PREFIX_REPNZ)) {
> +                     SVM_IOIO_TYPE_MASK | svm_is_rep(s->prefix) | 4);
> +        if (s->prefix & (PREFIX_REPZ | PREFIX_REPNZ)) {
>              gen_repz_ins(s, ot, pc_start - s->cs_base, s->pc -
> s->cs_base);
>          } else {
>              gen_ins(s, ot);
> @@ -6417,11 +6422,11 @@ static target_ulong disas_insn(DisasContext *s,
> CPUState *cpu)
>          break;
>      case 0x6e: /* outsS */
>      case 0x6f:
> -        ot = mo_b_d32(b, dflag);
> +        ot = mo_b_d32(b, s->dflag);
>          tcg_gen_ext16u_tl(s->T0, cpu_regs[R_EDX]);
>          gen_check_io(s, ot, pc_start - s->cs_base,
> -                     svm_is_rep(prefixes) | 4);
> -        if (prefixes & (PREFIX_REPZ | PREFIX_REPNZ)) {
> +                     svm_is_rep(s->prefix) | 4);
> +        if (s->prefix & (PREFIX_REPZ | PREFIX_REPNZ)) {
>              gen_repz_outs(s, ot, pc_start - s->cs_base, s->pc -
> s->cs_base);
>          } else {
>              gen_outs(s, ot);
> @@ -6436,11 +6441,11 @@ static target_ulong disas_insn(DisasContext *s,
> CPUState *cpu)
>
>      case 0xe4:
>      case 0xe5:
> -        ot = mo_b_d32(b, dflag);
> +        ot = mo_b_d32(b, s->dflag);
>          val = x86_ldub_code(env, s);
>          tcg_gen_movi_tl(s->T0, val);
>          gen_check_io(s, ot, pc_start - s->cs_base,
> -                     SVM_IOIO_TYPE_MASK | svm_is_rep(prefixes));
> +                     SVM_IOIO_TYPE_MASK | svm_is_rep(s->prefix));
>          if (tb_cflags(s->base.tb) & CF_USE_ICOUNT) {
>              gen_io_start();
>          }
> @@ -6455,11 +6460,11 @@ static target_ulong disas_insn(DisasContext *s,
> CPUState *cpu)
>          break;
>      case 0xe6:
>      case 0xe7:
> -        ot = mo_b_d32(b, dflag);
> +        ot = mo_b_d32(b, s->dflag);
>          val = x86_ldub_code(env, s);
>          tcg_gen_movi_tl(s->T0, val);
>          gen_check_io(s, ot, pc_start - s->cs_base,
> -                     svm_is_rep(prefixes));
> +                     svm_is_rep(s->prefix));
>          gen_op_mov_v_reg(s, ot, s->T1, R_EAX);
>
>          if (tb_cflags(s->base.tb) & CF_USE_ICOUNT) {
> @@ -6476,10 +6481,10 @@ static target_ulong disas_insn(DisasContext *s,
> CPUState *cpu)
>          break;
>      case 0xec:
>      case 0xed:
> -        ot = mo_b_d32(b, dflag);
> +        ot = mo_b_d32(b, s->dflag);
>          tcg_gen_ext16u_tl(s->T0, cpu_regs[R_EDX]);
>          gen_check_io(s, ot, pc_start - s->cs_base,
> -                     SVM_IOIO_TYPE_MASK | svm_is_rep(prefixes));
> +                     SVM_IOIO_TYPE_MASK | svm_is_rep(s->prefix));
>          if (tb_cflags(s->base.tb) & CF_USE_ICOUNT) {
>              gen_io_start();
>          }
> @@ -6494,10 +6499,10 @@ static target_ulong disas_insn(DisasContext *s,
> CPUState *cpu)
>          break;
>      case 0xee:
>      case 0xef:
> -        ot = mo_b_d32(b, dflag);
> +        ot = mo_b_d32(b, s->dflag);
>          tcg_gen_ext16u_tl(s->T0, cpu_regs[R_EDX]);
>          gen_check_io(s, ot, pc_start - s->cs_base,
> -                     svm_is_rep(prefixes));
> +                     svm_is_rep(s->prefix));
>          gen_op_mov_v_reg(s, ot, s->T1, R_EAX);
>
>          if (tb_cflags(s->base.tb) & CF_USE_ICOUNT) {
> @@ -6538,21 +6543,21 @@ static target_ulong disas_insn(DisasContext *s,
> CPUState *cpu)
>          if (s->pe && !s->vm86) {
>              gen_update_cc_op(s);
>              gen_jmp_im(s, pc_start - s->cs_base);
> -            gen_helper_lret_protected(cpu_env, tcg_const_i32(dflag - 1),
> +            gen_helper_lret_protected(cpu_env, tcg_const_i32(s->dflag -
> 1),
>                                        tcg_const_i32(val));
>          } else {
>              gen_stack_A0(s);
>              /* pop offset */
> -            gen_op_ld_v(s, dflag, s->T0, s->A0);
> +            gen_op_ld_v(s, s->dflag, s->T0, s->A0);
>              /* NOTE: keeping EIP updated is not a problem in case of
>                 exception */
>              gen_op_jmp_v(s->T0);
>              /* pop selector */
> -            gen_add_A0_im(s, 1 << dflag);
> -            gen_op_ld_v(s, dflag, s->T0, s->A0);
> +            gen_add_A0_im(s, 1 << s->dflag);
> +            gen_op_ld_v(s, s->dflag, s->T0, s->A0);
>              gen_op_movl_seg_T0_vm(s, R_CS);
>              /* add stack offset */
> -            gen_stack_update(s, val + (2 << dflag));
> +            gen_stack_update(s, val + (2 << s->dflag));
>          }
>          gen_eob(s);
>          break;
> @@ -6563,17 +6568,17 @@ static target_ulong disas_insn(DisasContext *s,
> CPUState *cpu)
>          gen_svm_check_intercept(s, pc_start, SVM_EXIT_IRET);
>          if (!s->pe) {
>              /* real mode */
> -            gen_helper_iret_real(cpu_env, tcg_const_i32(dflag - 1));
> +            gen_helper_iret_real(cpu_env, tcg_const_i32(s->dflag - 1));
>              set_cc_op(s, CC_OP_EFLAGS);
>          } else if (s->vm86) {
>              if (s->iopl != 3) {
>                  gen_exception(s, EXCP0D_GPF, pc_start - s->cs_base);
>              } else {
> -                gen_helper_iret_real(cpu_env, tcg_const_i32(dflag - 1));
> +                gen_helper_iret_real(cpu_env, tcg_const_i32(s->dflag -
> 1));
>                  set_cc_op(s, CC_OP_EFLAGS);
>              }
>          } else {
> -            gen_helper_iret_protected(cpu_env, tcg_const_i32(dflag - 1),
> +            gen_helper_iret_protected(cpu_env, tcg_const_i32(s->dflag -
> 1),
>                                        tcg_const_i32(s->pc - s->cs_base));
>              set_cc_op(s, CC_OP_EFLAGS);
>          }
> @@ -6581,14 +6586,14 @@ static target_ulong disas_insn(DisasContext *s,
> CPUState *cpu)
>          break;
>      case 0xe8: /* call im */
>          {
> -            if (dflag != MO_16) {
> +            if (s->dflag != MO_16) {
>                  tval = (int32_t)insn_get(env, s, MO_32);
>              } else {
>                  tval = (int16_t)insn_get(env, s, MO_16);
>              }
>              next_eip = s->pc - s->cs_base;
>              tval += next_eip;
> -            if (dflag == MO_16) {
> +            if (s->dflag == MO_16) {
>                  tval &= 0xffff;
>              } else if (!CODE64(s)) {
>                  tval &= 0xffffffff;
> @@ -6605,7 +6610,7 @@ static target_ulong disas_insn(DisasContext *s,
> CPUState *cpu)
>
>              if (CODE64(s))
>                  goto illegal_op;
> -            ot = dflag;
> +            ot = s->dflag;
>              offset = insn_get(env, s, ot);
>              selector = insn_get(env, s, MO_16);
>
> @@ -6614,13 +6619,13 @@ static target_ulong disas_insn(DisasContext *s,
> CPUState *cpu)
>          }
>          goto do_lcall;
>      case 0xe9: /* jmp im */
> -        if (dflag != MO_16) {
> +        if (s->dflag != MO_16) {
>              tval = (int32_t)insn_get(env, s, MO_32);
>          } else {
>              tval = (int16_t)insn_get(env, s, MO_16);
>          }
>          tval += s->pc - s->cs_base;
> -        if (dflag == MO_16) {
> +        if (s->dflag == MO_16) {
>              tval &= 0xffff;
>          } else if (!CODE64(s)) {
>              tval &= 0xffffffff;
> @@ -6634,7 +6639,7 @@ static target_ulong disas_insn(DisasContext *s,
> CPUState *cpu)
>
>              if (CODE64(s))
>                  goto illegal_op;
> -            ot = dflag;
> +            ot = s->dflag;
>              offset = insn_get(env, s, ot);
>              selector = insn_get(env, s, MO_16);
>
> @@ -6645,7 +6650,7 @@ static target_ulong disas_insn(DisasContext *s,
> CPUState *cpu)
>      case 0xeb: /* jmp Jb */
>          tval = (int8_t)insn_get(env, s, MO_8);
>          tval += s->pc - s->cs_base;
> -        if (dflag == MO_16) {
> +        if (s->dflag == MO_16) {
>              tval &= 0xffff;
>          }
>          gen_jmp(s, tval);
> @@ -6654,7 +6659,7 @@ static target_ulong disas_insn(DisasContext *s,
> CPUState *cpu)
>          tval = (int8_t)insn_get(env, s, MO_8);
>          goto do_jcc;
>      case 0x180 ... 0x18f: /* jcc Jv */
> -        if (dflag != MO_16) {
> +        if (s->dflag != MO_16) {
>              tval = (int32_t)insn_get(env, s, MO_32);
>          } else {
>              tval = (int16_t)insn_get(env, s, MO_16);
> @@ -6662,7 +6667,7 @@ static target_ulong disas_insn(DisasContext *s,
> CPUState *cpu)
>      do_jcc:
>          next_eip = s->pc - s->cs_base;
>          tval += next_eip;
> -        if (dflag == MO_16) {
> +        if (s->dflag == MO_16) {
>              tval &= 0xffff;
>          }
>          gen_bnd_jmp(s);
> @@ -6678,7 +6683,7 @@ static target_ulong disas_insn(DisasContext *s,
> CPUState *cpu)
>          if (!(s->cpuid_features & CPUID_CMOV)) {
>              goto illegal_op;
>          }
> -        ot = dflag;
> +        ot = s->dflag;
>          modrm = x86_ldub_code(env, s);
>          reg = ((modrm >> 3) & 7) | REX_R(s);
>          gen_cmovcc1(env, s, ot, b, modrm, reg);
> @@ -6703,7 +6708,7 @@ static target_ulong disas_insn(DisasContext *s,
> CPUState *cpu)
>          } else {
>              ot = gen_pop_T0(s);
>              if (s->cpl == 0) {
> -                if (dflag != MO_16) {
> +                if (s->dflag != MO_16) {
>                      gen_helper_write_eflags(cpu_env, s->T0,
>                                              tcg_const_i32((TF_MASK |
> AC_MASK |
>                                                             ID_MASK |
> NT_MASK |
> @@ -6718,7 +6723,7 @@ static target_ulong disas_insn(DisasContext *s,
> CPUState *cpu)
>                  }
>              } else {
>                  if (s->cpl <= s->iopl) {
> -                    if (dflag != MO_16) {
> +                    if (s->dflag != MO_16) {
>                          gen_helper_write_eflags(cpu_env, s->T0,
>                                                  tcg_const_i32((TF_MASK |
>                                                                 AC_MASK |
> @@ -6735,7 +6740,7 @@ static target_ulong disas_insn(DisasContext *s,
> CPUState *cpu)
>                                                                & 0xffff));
>                      }
>                  } else {
> -                    if (dflag != MO_16) {
> +                    if (s->dflag != MO_16) {
>                          gen_helper_write_eflags(cpu_env, s->T0,
>                                             tcg_const_i32((TF_MASK |
> AC_MASK |
>                                                            ID_MASK |
> NT_MASK)));
> @@ -6795,7 +6800,7 @@ static target_ulong disas_insn(DisasContext *s,
> CPUState *cpu)
>          /************************/
>          /* bit operations */
>      case 0x1ba: /* bt/bts/btr/btc Gv, im */
> -        ot = dflag;
> +        ot = s->dflag;
>          modrm = x86_ldub_code(env, s);
>          op = (modrm >> 3) & 7;
>          mod = (modrm >> 6) & 3;
> @@ -6828,7 +6833,7 @@ static target_ulong disas_insn(DisasContext *s,
> CPUState *cpu)
>      case 0x1bb: /* btc */
>          op = 3;
>      do_btx:
> -        ot = dflag;
> +        ot = s->dflag;
>          modrm = x86_ldub_code(env, s);
>          reg = ((modrm >> 3) & 7) | REX_R(s);
>          mod = (modrm >> 6) & 3;
> @@ -6933,14 +6938,14 @@ static target_ulong disas_insn(DisasContext *s,
> CPUState *cpu)
>          break;
>      case 0x1bc: /* bsf / tzcnt */
>      case 0x1bd: /* bsr / lzcnt */
> -        ot = dflag;
> +        ot = s->dflag;
>          modrm = x86_ldub_code(env, s);
>          reg = ((modrm >> 3) & 7) | REX_R(s);
>          gen_ldst_modrm(env, s, modrm, ot, OR_TMP0, 0);
>          gen_extu(ot, s->T0);
>
>          /* Note that lzcnt and tzcnt are in different extensions.  */
> -        if ((prefixes & PREFIX_REPZ)
> +        if ((s->prefix & PREFIX_REPZ)
>              && (b & 1
>                  ? s->cpuid_ext3_features & CPUID_EXT3_ABM
>                  : s->cpuid_7_0_ebx_features & CPUID_7_0_EBX_BMI1)) {
> @@ -7033,14 +7038,14 @@ static target_ulong disas_insn(DisasContext *s,
> CPUState *cpu)
>          /* misc */
>      case 0x90: /* nop */
>          /* XXX: correct lock test for all insn */
> -        if (prefixes & PREFIX_LOCK) {
> +        if (s->prefix & PREFIX_LOCK) {
>              goto illegal_op;
>          }
>          /* If REX_B is set, then this is xchg eax, r8d, not a nop.  */
>          if (REX_B(s)) {
>              goto do_xchg_reg_eax;
>          }
> -        if (prefixes & PREFIX_REPZ) {
> +        if (s->prefix & PREFIX_REPZ) {
>              gen_update_cc_op(s);
>              gen_jmp_im(s, pc_start - s->cs_base);
>              gen_helper_pause(cpu_env, tcg_const_i32(s->pc - pc_start));
> @@ -7107,7 +7112,7 @@ static target_ulong disas_insn(DisasContext *s,
> CPUState *cpu)
>      case 0x62: /* bound */
>          if (CODE64(s))
>              goto illegal_op;
> -        ot = dflag;
> +        ot = s->dflag;
>          modrm = x86_ldub_code(env, s);
>          reg = (modrm >> 3) & 7;
>          mod = (modrm >> 6) & 3;
> @@ -7125,7 +7130,7 @@ static target_ulong disas_insn(DisasContext *s,
> CPUState *cpu)
>      case 0x1c8 ... 0x1cf: /* bswap reg */
>          reg = (b & 7) | REX_B(s);
>  #ifdef TARGET_X86_64
> -        if (dflag == MO_64) {
> +        if (s->dflag == MO_64) {
>              gen_op_mov_v_reg(s, MO_64, s->T0, reg);
>              tcg_gen_bswap64_i64(s->T0, s->T0);
>              gen_op_mov_reg_v(s, MO_64, reg, s->T0);
> @@ -7155,7 +7160,7 @@ static target_ulong disas_insn(DisasContext *s,
> CPUState *cpu)
>              tval = (int8_t)insn_get(env, s, MO_8);
>              next_eip = s->pc - s->cs_base;
>              tval += next_eip;
> -            if (dflag == MO_16) {
> +            if (s->dflag == MO_16) {
>                  tval &= 0xffff;
>              }
>
> @@ -7239,7 +7244,7 @@ static target_ulong disas_insn(DisasContext *s,
> CPUState *cpu)
>          if (!s->pe) {
>              gen_exception(s, EXCP0D_GPF, pc_start - s->cs_base);
>          } else {
> -            gen_helper_sysexit(cpu_env, tcg_const_i32(dflag - 1));
> +            gen_helper_sysexit(cpu_env, tcg_const_i32(s->dflag - 1));
>              gen_eob(s);
>          }
>          break;
> @@ -7258,7 +7263,7 @@ static target_ulong disas_insn(DisasContext *s,
> CPUState *cpu)
>          if (!s->pe) {
>              gen_exception(s, EXCP0D_GPF, pc_start - s->cs_base);
>          } else {
> -            gen_helper_sysret(cpu_env, tcg_const_i32(dflag - 1));
> +            gen_helper_sysret(cpu_env, tcg_const_i32(s->dflag - 1));
>              /* condition codes are modified only in long mode */
>              if (s->lma) {
>                  set_cc_op(s, CC_OP_EFLAGS);
> @@ -7297,7 +7302,7 @@ static target_ulong disas_insn(DisasContext *s,
> CPUState *cpu)
>              gen_svm_check_intercept(s, pc_start, SVM_EXIT_LDTR_READ);
>              tcg_gen_ld32u_tl(s->T0, cpu_env,
>                               offsetof(CPUX86State, ldt.selector));
> -            ot = mod == 3 ? dflag : MO_16;
> +            ot = mod == 3 ? s->dflag : MO_16;
>              gen_ldst_modrm(env, s, modrm, ot, OR_TMP0, 1);
>              break;
>          case 2: /* lldt */
> @@ -7318,7 +7323,7 @@ static target_ulong disas_insn(DisasContext *s,
> CPUState *cpu)
>              gen_svm_check_intercept(s, pc_start, SVM_EXIT_TR_READ);
>              tcg_gen_ld32u_tl(s->T0, cpu_env,
>                               offsetof(CPUX86State, tr.selector));
> -            ot = mod == 3 ? dflag : MO_16;
> +            ot = mod == 3 ? s->dflag : MO_16;
>              gen_ldst_modrm(env, s, modrm, ot, OR_TMP0, 1);
>              break;
>          case 3: /* ltr */
> @@ -7362,7 +7367,7 @@ static target_ulong disas_insn(DisasContext *s,
> CPUState *cpu)
>              gen_op_st_v(s, MO_16, s->T0, s->A0);
>              gen_add_A0_im(s, 2);
>              tcg_gen_ld_tl(s->T0, cpu_env, offsetof(CPUX86State,
> gdt.base));
> -            if (dflag == MO_16) {
> +            if (s->dflag == MO_16) {
>                  tcg_gen_andi_tl(s->T0, s->T0, 0xffffff);
>              }
>              gen_op_st_v(s, CODE64(s) + MO_32, s->T0, s->A0);
> @@ -7417,7 +7422,7 @@ static target_ulong disas_insn(DisasContext *s,
> CPUState *cpu)
>              gen_op_st_v(s, MO_16, s->T0, s->A0);
>              gen_add_A0_im(s, 2);
>              tcg_gen_ld_tl(s->T0, cpu_env, offsetof(CPUX86State,
> idt.base));
> -            if (dflag == MO_16) {
> +            if (s->dflag == MO_16) {
>                  tcg_gen_andi_tl(s->T0, s->T0, 0xffffff);
>              }
>              gen_op_st_v(s, CODE64(s) + MO_32, s->T0, s->A0);
> @@ -7567,7 +7572,7 @@ static target_ulong disas_insn(DisasContext *s,
> CPUState *cpu)
>              gen_op_ld_v(s, MO_16, s->T1, s->A0);
>              gen_add_A0_im(s, 2);
>              gen_op_ld_v(s, CODE64(s) + MO_32, s->T0, s->A0);
> -            if (dflag == MO_16) {
> +            if (s->dflag == MO_16) {
>                  tcg_gen_andi_tl(s->T0, s->T0, 0xffffff);
>              }
>              tcg_gen_st_tl(s->T0, cpu_env, offsetof(CPUX86State,
> gdt.base));
> @@ -7584,7 +7589,7 @@ static target_ulong disas_insn(DisasContext *s,
> CPUState *cpu)
>              gen_op_ld_v(s, MO_16, s->T1, s->A0);
>              gen_add_A0_im(s, 2);
>              gen_op_ld_v(s, CODE64(s) + MO_32, s->T0, s->A0);
> -            if (dflag == MO_16) {
> +            if (s->dflag == MO_16) {
>                  tcg_gen_andi_tl(s->T0, s->T0, 0xffffff);
>              }
>              tcg_gen_st_tl(s->T0, cpu_env, offsetof(CPUX86State,
> idt.base));
> @@ -7603,7 +7608,7 @@ static target_ulong disas_insn(DisasContext *s,
> CPUState *cpu)
>              gen_ldst_modrm(env, s, modrm, ot, OR_TMP0, 1);
>              break;
>          case 0xee: /* rdpkru */
> -            if (prefixes & PREFIX_LOCK) {
> +            if (s->prefix & PREFIX_LOCK) {
>                  goto illegal_op;
>              }
>              tcg_gen_trunc_tl_i32(s->tmp2_i32, cpu_regs[R_ECX]);
> @@ -7611,7 +7616,7 @@ static target_ulong disas_insn(DisasContext *s,
> CPUState *cpu)
>              tcg_gen_extr_i64_tl(cpu_regs[R_EAX], cpu_regs[R_EDX],
> s->tmp1_i64);
>              break;
>          case 0xef: /* wrpkru */
> -            if (prefixes & PREFIX_LOCK) {
> +            if (s->prefix & PREFIX_LOCK) {
>                  goto illegal_op;
>              }
>              tcg_gen_concat_tl_i64(s->tmp1_i64, cpu_regs[R_EAX],
> @@ -7696,7 +7701,7 @@ static target_ulong disas_insn(DisasContext *s,
> CPUState *cpu)
>          if (CODE64(s)) {
>              int d_ot;
>              /* d_ot is the size of destination */
> -            d_ot = dflag;
> +            d_ot = s->dflag;
>
>              modrm = x86_ldub_code(env, s);
>              reg = ((modrm >> 3) & 7) | REX_R(s);
> @@ -7771,7 +7776,7 @@ static target_ulong disas_insn(DisasContext *s,
> CPUState *cpu)
>              TCGv t0;
>              if (!s->pe || s->vm86)
>                  goto illegal_op;
> -            ot = dflag != MO_16 ? MO_32 : MO_16;
> +            ot = s->dflag != MO_16 ? MO_32 : MO_16;
>              modrm = x86_ldub_code(env, s);
>              reg = ((modrm >> 3) & 7) | REX_R(s);
>              gen_ldst_modrm(env, s, modrm, MO_16, OR_TMP0, 0);
> @@ -7815,18 +7820,18 @@ static target_ulong disas_insn(DisasContext *s,
> CPUState *cpu)
>          if (s->flags & HF_MPX_EN_MASK) {
>              mod = (modrm >> 6) & 3;
>              reg = ((modrm >> 3) & 7) | REX_R(s);
> -            if (prefixes & PREFIX_REPZ) {
> +            if (s->prefix & PREFIX_REPZ) {
>                  /* bndcl */
>                  if (reg >= 4
> -                    || (prefixes & PREFIX_LOCK)
> +                    || (s->prefix & PREFIX_LOCK)
>                      || s->aflag == MO_16) {
>                      goto illegal_op;
>                  }
>                  gen_bndck(env, s, modrm, TCG_COND_LTU, cpu_bndl[reg]);
> -            } else if (prefixes & PREFIX_REPNZ) {
> +            } else if (s->prefix & PREFIX_REPNZ) {
>                  /* bndcu */
>                  if (reg >= 4
> -                    || (prefixes & PREFIX_LOCK)
> +                    || (s->prefix & PREFIX_LOCK)
>                      || s->aflag == MO_16) {
>                      goto illegal_op;
>                  }
> @@ -7834,14 +7839,14 @@ static target_ulong disas_insn(DisasContext *s,
> CPUState *cpu)
>                  tcg_gen_not_i64(notu, cpu_bndu[reg]);
>                  gen_bndck(env, s, modrm, TCG_COND_GTU, notu);
>                  tcg_temp_free_i64(notu);
> -            } else if (prefixes & PREFIX_DATA) {
> +            } else if (s->prefix & PREFIX_DATA) {
>                  /* bndmov -- from reg/mem */
>                  if (reg >= 4 || s->aflag == MO_16) {
>                      goto illegal_op;
>                  }
>                  if (mod == 3) {
>                      int reg2 = (modrm & 7) | REX_B(s);
> -                    if (reg2 >= 4 || (prefixes & PREFIX_LOCK)) {
> +                    if (reg2 >= 4 || (s->prefix & PREFIX_LOCK)) {
>                          goto illegal_op;
>                      }
>                      if (s->flags & HF_MPX_IU_MASK) {
> @@ -7870,7 +7875,7 @@ static target_ulong disas_insn(DisasContext *s,
> CPUState *cpu)
>                  /* bndldx */
>                  AddressParts a = gen_lea_modrm_0(env, s, modrm);
>                  if (reg >= 4
> -                    || (prefixes & PREFIX_LOCK)
> +                    || (s->prefix & PREFIX_LOCK)
>                      || s->aflag == MO_16
>                      || a.base < -1) {
>                      goto illegal_op;
> @@ -7905,10 +7910,10 @@ static target_ulong disas_insn(DisasContext *s,
> CPUState *cpu)
>          if (s->flags & HF_MPX_EN_MASK) {
>              mod = (modrm >> 6) & 3;
>              reg = ((modrm >> 3) & 7) | REX_R(s);
> -            if (mod != 3 && (prefixes & PREFIX_REPZ)) {
> +            if (mod != 3 && (s->prefix & PREFIX_REPZ)) {
>                  /* bndmk */
>                  if (reg >= 4
> -                    || (prefixes & PREFIX_LOCK)
> +                    || (s->prefix & PREFIX_LOCK)
>                      || s->aflag == MO_16) {
>                      goto illegal_op;
>                  }
> @@ -7933,22 +7938,22 @@ static target_ulong disas_insn(DisasContext *s,
> CPUState *cpu)
>                  /* bnd registers are now in-use */
>                  gen_set_hflag(s, HF_MPX_IU_MASK);
>                  break;
> -            } else if (prefixes & PREFIX_REPNZ) {
> +            } else if (s->prefix & PREFIX_REPNZ) {
>                  /* bndcn */
>                  if (reg >= 4
> -                    || (prefixes & PREFIX_LOCK)
> +                    || (s->prefix & PREFIX_LOCK)
>                      || s->aflag == MO_16) {
>                      goto illegal_op;
>                  }
>                  gen_bndck(env, s, modrm, TCG_COND_GTU, cpu_bndu[reg]);
> -            } else if (prefixes & PREFIX_DATA) {
> +            } else if (s->prefix & PREFIX_DATA) {
>                  /* bndmov -- to reg/mem */
>                  if (reg >= 4 || s->aflag == MO_16) {
>                      goto illegal_op;
>                  }
>                  if (mod == 3) {
>                      int reg2 = (modrm & 7) | REX_B(s);
> -                    if (reg2 >= 4 || (prefixes & PREFIX_LOCK)) {
> +                    if (reg2 >= 4 || (s->prefix & PREFIX_LOCK)) {
>                          goto illegal_op;
>                      }
>                      if (s->flags & HF_MPX_IU_MASK) {
> @@ -7975,7 +7980,7 @@ static target_ulong disas_insn(DisasContext *s,
> CPUState *cpu)
>                  /* bndstx */
>                  AddressParts a = gen_lea_modrm_0(env, s, modrm);
>                  if (reg >= 4
> -                    || (prefixes & PREFIX_LOCK)
> +                    || (s->prefix & PREFIX_LOCK)
>                      || s->aflag == MO_16
>                      || a.base < -1) {
>                      goto illegal_op;
> @@ -8023,7 +8028,7 @@ static target_ulong disas_insn(DisasContext *s,
> CPUState *cpu)
>                  ot = MO_64;
>              else
>                  ot = MO_32;
> -            if ((prefixes & PREFIX_LOCK) && (reg == 0) &&
> +            if ((s->prefix & PREFIX_LOCK) && (reg == 0) &&
>                  (s->cpuid_ext3_features & CPUID_EXT3_CR8LEG)) {
>                  reg = 8;
>              }
> @@ -8113,7 +8118,7 @@ static target_ulong disas_insn(DisasContext *s,
> CPUState *cpu)
>      case 0x1c3: /* MOVNTI reg, mem */
>          if (!(s->cpuid_features & CPUID_SSE2))
>              goto illegal_op;
> -        ot = mo_64_32(dflag);
> +        ot = mo_64_32(s->dflag);
>          modrm = x86_ldub_code(env, s);
>          mod = (modrm >> 6) & 3;
>          if (mod == 3)
> @@ -8127,7 +8132,7 @@ static target_ulong disas_insn(DisasContext *s,
> CPUState *cpu)
>          switch (modrm) {
>          CASE_MODRM_MEM_OP(0): /* fxsave */
>              if (!(s->cpuid_features & CPUID_FXSR)
> -                || (prefixes & PREFIX_LOCK)) {
> +                || (s->prefix & PREFIX_LOCK)) {
>                  goto illegal_op;
>              }
>              if ((s->flags & HF_EM_MASK) || (s->flags & HF_TS_MASK)) {
> @@ -8140,7 +8145,7 @@ static target_ulong disas_insn(DisasContext *s,
> CPUState *cpu)
>
>          CASE_MODRM_MEM_OP(1): /* fxrstor */
>              if (!(s->cpuid_features & CPUID_FXSR)
> -                || (prefixes & PREFIX_LOCK)) {
> +                || (s->prefix & PREFIX_LOCK)) {
>                  goto illegal_op;
>              }
>              if ((s->flags & HF_EM_MASK) || (s->flags & HF_TS_MASK)) {
> @@ -8179,8 +8184,8 @@ static target_ulong disas_insn(DisasContext *s,
> CPUState *cpu)
>
>          CASE_MODRM_MEM_OP(4): /* xsave */
>              if ((s->cpuid_ext_features & CPUID_EXT_XSAVE) == 0
> -                || (prefixes & (PREFIX_LOCK | PREFIX_DATA
> -                                | PREFIX_REPZ | PREFIX_REPNZ))) {
> +                || (s->prefix & (PREFIX_LOCK | PREFIX_DATA
> +                                   | PREFIX_REPZ | PREFIX_REPNZ))) {
>                  goto illegal_op;
>              }
>              gen_lea_modrm(env, s, modrm);
> @@ -8191,8 +8196,8 @@ static target_ulong disas_insn(DisasContext *s,
> CPUState *cpu)
>
>          CASE_MODRM_MEM_OP(5): /* xrstor */
>              if ((s->cpuid_ext_features & CPUID_EXT_XSAVE) == 0
> -                || (prefixes & (PREFIX_LOCK | PREFIX_DATA
> -                                | PREFIX_REPZ | PREFIX_REPNZ))) {
> +                || (s->prefix & (PREFIX_LOCK | PREFIX_DATA
> +                                   | PREFIX_REPZ | PREFIX_REPNZ))) {
>                  goto illegal_op;
>              }
>              gen_lea_modrm(env, s, modrm);
> @@ -8207,10 +8212,10 @@ static target_ulong disas_insn(DisasContext *s,
> CPUState *cpu)
>              break;
>
>          CASE_MODRM_MEM_OP(6): /* xsaveopt / clwb */
> -            if (prefixes & PREFIX_LOCK) {
> +            if (s->prefix & PREFIX_LOCK) {
>                  goto illegal_op;
>              }
> -            if (prefixes & PREFIX_DATA) {
> +            if (s->prefix & PREFIX_DATA) {
>                  /* clwb */
>                  if (!(s->cpuid_7_0_ebx_features & CPUID_7_0_EBX_CLWB)) {
>                      goto illegal_op;
> @@ -8220,7 +8225,7 @@ static target_ulong disas_insn(DisasContext *s,
> CPUState *cpu)
>                  /* xsaveopt */
>                  if ((s->cpuid_ext_features & CPUID_EXT_XSAVE) == 0
>                      || (s->cpuid_xsave_features & CPUID_XSAVE_XSAVEOPT)
> == 0
> -                    || (prefixes & (PREFIX_REPZ | PREFIX_REPNZ))) {
> +                    || (s->prefix & (PREFIX_REPZ | PREFIX_REPNZ))) {
>                      goto illegal_op;
>                  }
>                  gen_lea_modrm(env, s, modrm);
> @@ -8231,10 +8236,10 @@ static target_ulong disas_insn(DisasContext *s,
> CPUState *cpu)
>              break;
>
>          CASE_MODRM_MEM_OP(7): /* clflush / clflushopt */
> -            if (prefixes & PREFIX_LOCK) {
> +            if (s->prefix & PREFIX_LOCK) {
>                  goto illegal_op;
>              }
> -            if (prefixes & PREFIX_DATA) {
> +            if (s->prefix & PREFIX_DATA) {
>                  /* clflushopt */
>                  if (!(s->cpuid_7_0_ebx_features &
> CPUID_7_0_EBX_CLFLUSHOPT)) {
>                      goto illegal_op;
> @@ -8254,8 +8259,8 @@ static target_ulong disas_insn(DisasContext *s,
> CPUState *cpu)
>          case 0xd0 ... 0xd7: /* wrfsbase (f3 0f ae /2) */
>          case 0xd8 ... 0xdf: /* wrgsbase (f3 0f ae /3) */
>              if (CODE64(s)
> -                && (prefixes & PREFIX_REPZ)
> -                && !(prefixes & PREFIX_LOCK)
> +                && (s->prefix & PREFIX_REPZ)
> +                && !(s->prefix & PREFIX_LOCK)
>                  && (s->cpuid_7_0_ebx_features & CPUID_7_0_EBX_FSGSBASE)) {
>                  TCGv base, treg, src, dst;
>
> @@ -8284,10 +8289,10 @@ static target_ulong disas_insn(DisasContext *s,
> CPUState *cpu)
>              goto unknown_op;
>
>          case 0xf8: /* sfence / pcommit */
> -            if (prefixes & PREFIX_DATA) {
> +            if (s->prefix & PREFIX_DATA) {
>                  /* pcommit */
>                  if (!(s->cpuid_7_0_ebx_features & CPUID_7_0_EBX_PCOMMIT)
> -                    || (prefixes & PREFIX_LOCK)) {
> +                    || (s->prefix & PREFIX_LOCK)) {
>                      goto illegal_op;
>                  }
>                  break;
> @@ -8295,21 +8300,21 @@ static target_ulong disas_insn(DisasContext *s,
> CPUState *cpu)
>              /* fallthru */
>          case 0xf9 ... 0xff: /* sfence */
>              if (!(s->cpuid_features & CPUID_SSE)
> -                || (prefixes & PREFIX_LOCK)) {
> +                || (s->prefix & PREFIX_LOCK)) {
>                  goto illegal_op;
>              }
>              tcg_gen_mb(TCG_MO_ST_ST | TCG_BAR_SC);
>              break;
>          case 0xe8 ... 0xef: /* lfence */
>              if (!(s->cpuid_features & CPUID_SSE)
> -                || (prefixes & PREFIX_LOCK)) {
> +                || (s->prefix & PREFIX_LOCK)) {
>                  goto illegal_op;
>              }
>              tcg_gen_mb(TCG_MO_LD_LD | TCG_BAR_SC);
>              break;
>          case 0xf0 ... 0xf7: /* mfence */
>              if (!(s->cpuid_features & CPUID_SSE2)
> -                || (prefixes & PREFIX_LOCK)) {
> +                || (s->prefix & PREFIX_LOCK)) {
>                  goto illegal_op;
>              }
>              tcg_gen_mb(TCG_MO_ALL | TCG_BAR_SC);
> @@ -8337,8 +8342,8 @@ static target_ulong disas_insn(DisasContext *s,
> CPUState *cpu)
>          gen_eob(s);
>          break;
>      case 0x1b8: /* SSE4.2 popcnt */
> -        if ((prefixes & (PREFIX_REPZ | PREFIX_LOCK | PREFIX_REPNZ)) !=
> -             PREFIX_REPZ)
> +        if ((s->prefix & (PREFIX_REPZ | PREFIX_LOCK | PREFIX_REPNZ)) !=
> +            PREFIX_REPZ)
>              goto illegal_op;
>          if (!(s->cpuid_ext_features & CPUID_EXT_POPCNT))
>              goto illegal_op;
> @@ -8349,7 +8354,7 @@ static target_ulong disas_insn(DisasContext *s,
> CPUState *cpu)
>          if (s->prefix & PREFIX_DATA) {
>              ot = MO_16;
>          } else {
> -            ot = mo_64_32(dflag);
> +            ot = mo_64_32(s->dflag);
>          }
>
>          gen_ldst_modrm(env, s, modrm, ot, OR_TMP0, 0);
> --
> 2.20.1
>
>
>

Re: [Qemu-devel] [RFC PATCH v1 03/22] target/i386: Use prefix, aflag and dflag from DisasContext

[Aleksandar Markovic]

On Wed, Jul 31, 2019 at 9:41 PM Aleksandar Markovic <
aleksandar.m.mail@gmail.com> wrote:

>
>
> On Wed, Jul 31, 2019 at 7:59 PM Jan Bobek <jan.bobek@gmail.com> wrote:
>
>> From: Richard Henderson <rth@twiddle.net>
>>
>> The variables are already there, we just have to hide the ones
>> in disas_insn so that we are forced to use them.
>>
>> Signed-off-by: Richard Henderson <rth@twiddle.net>
>> ---
>>  target/i386/translate.c | 299 ++++++++++++++++++++--------------------
>>  1 file changed, 152 insertions(+), 147 deletions(-)
>>
>>
> Hi, Jan.
>
> The series overall looks great, and hopefully you will refine rough
> around the edges parts soon. Thanks for this valuable contribution!
>
> About this patch, I noticed that it mentions "aflag" in the title, but
> the patch actually does not change any code related to the variable
> "aflag" in the described sense - it looks to me it just reduces the
> scope of the local variable "aflag", which is certainly different than
> "use aflag from DisasContext" as it could be implied from the
> patch title. You definitely should not confuse the readers with
> such inaccuracies.
>

Also, Jan, you need to correct the code alignment (indentation), if
you enclose a part of a function to form a new code block. I guess
you just left these cosmetic things for v2 or later.

Sincerely,
Aleksandar


>
> Actually, I think the patch would look much better if split into three
> patches (easier for reviewing, and also clearer for future developers),
> wouldn't it?
>
> Yours,
> Aleksandar
>
> Use prefix, aflag and dflag from DisasContex.
>
>
>
>> diff --git a/target/i386/translate.c b/target/i386/translate.c
>> index c0866c2797..692261f73f 100644
>> --- a/target/i386/translate.c
>> +++ b/target/i386/translate.c
>> @@ -4491,13 +4491,17 @@ static void gen_sse(CPUX86State *env,
>> DisasContext *s, int b,
>>  static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
>>  {
>>      CPUX86State *env = cpu->env_ptr;
>> -    int b, prefixes;
>> +    int b;
>>      int shift;git show
>> -    TCGMemOp ot, aflag, dflag;
>> +    TCGMemOp ot;
>>      int modrm, reg, rm, mod, op, opreg, val;
>>      target_ulong next_eip, tval;
>>      target_ulong pc_start = s->base.pc_next;
>>
>> +    {
>> +    int prefixes;
>> +    TCGMemOp aflag, dflag;
>> +
>>      s->pc_start = s->pc = pc_start;
>>      s->override = -1;
>>  #ifdef TARGET_X86_64
>> @@ -4657,6 +4661,7 @@ static target_ulong disas_insn(DisasContext *s,
>> CPUState *cpu)
>>      s->prefix = prefixes;
>>      s->aflag = aflag;
>>      s->dflag = dflag;
>> +    }
>>
>>      /* now check op code */
>>   reswitch:
>> @@ -4682,7 +4687,7 @@ static target_ulong disas_insn(DisasContext *s,
>> CPUState *cpu)
>>              op = (b >> 3) & 7;
>>              f = (b >> 1) & 3;
>>
>> -            ot = mo_b_d(b, dflag);
>> +            ot = mo_b_d(b, s->dflag);
>>
>>              switch(f) {
>>              case 0: /* OP Ev, Gv */
>> @@ -4740,7 +4745,7 @@ static target_ulong disas_insn(DisasContext *s,
>> CPUState *cpu)
>>          {
>>              int val;
>>
>> -            ot = mo_b_d(b, dflag);
>> +            ot = mo_b_d(b, s->dflag);
>>
>>              modrm = x86_ldub_code(env, s);
>>              mod = (modrm >> 6) & 3;
>> @@ -4777,16 +4782,16 @@ static target_ulong disas_insn(DisasContext *s,
>> CPUState *cpu)
>>          /**************************/
>>          /* inc, dec, and other misc arith */
>>      case 0x40 ... 0x47: /* inc Gv */
>> -        ot = dflag;
>> +        ot = s->dflag;
>>          gen_inc(s, ot, OR_EAX + (b & 7), 1);
>>          break;
>>      case 0x48 ... 0x4f: /* dec Gv */
>> -        ot = dflag;
>> +        ot = s->dflag;
>>          gen_inc(s, ot, OR_EAX + (b & 7), -1);
>>          break;
>>      case 0xf6: /* GRP3 */
>>      case 0xf7:
>> -        ot = mo_b_d(b, dflag);
>> +        ot = mo_b_d(b, s->dflag);
>>
>>          modrm = x86_ldub_code(env, s);
>>          mod = (modrm >> 6) & 3;
>> @@ -5018,7 +5023,7 @@ static target_ulong disas_insn(DisasContext *s,
>> CPUState *cpu)
>>
>>      case 0xfe: /* GRP4 */
>>      case 0xff: /* GRP5 */
>> -        ot = mo_b_d(b, dflag);
>> +        ot = mo_b_d(b, s->dflag);
>>
>>          modrm = x86_ldub_code(env, s);
>>          mod = (modrm >> 6) & 3;
>> @@ -5032,10 +5037,10 @@ static target_ulong disas_insn(DisasContext *s,
>> CPUState *cpu)
>>                  /* operand size for jumps is 64 bit */
>>                  ot = MO_64;
>>              } else if (op == 3 || op == 5) {
>> -                ot = dflag != MO_16 ? MO_32 + (REX_W(s) == 1) : MO_16;
>> +                ot = s->dflag != MO_16 ? MO_32 + (REX_W(s) == 1) : MO_16;
>>              } else if (op == 6) {
>>                  /* default push size is 64 bit */
>> -                ot = mo_pushpop(s, dflag);
>> +                ot = mo_pushpop(s, s->dflag);
>>              }
>>          }
>>          if (mod != 3) {
>> @@ -5063,7 +5068,7 @@ static target_ulong disas_insn(DisasContext *s,
>> CPUState *cpu)
>>              break;
>>          case 2: /* call Ev */
>>              /* XXX: optimize if memory (no 'and' is necessary) */
>> -            if (dflag == MO_16) {
>> +            if (s->dflag == MO_16) {
>>                  tcg_gen_ext16u_tl(s->T0, s->T0);
>>              }
>>              next_eip = s->pc - s->cs_base;
>> @@ -5081,19 +5086,19 @@ static target_ulong disas_insn(DisasContext *s,
>> CPUState *cpu)
>>              if (s->pe && !s->vm86) {
>>                  tcg_gen_trunc_tl_i32(s->tmp2_i32, s->T0);
>>                  gen_helper_lcall_protected(cpu_env, s->tmp2_i32, s->T1,
>> -                                           tcg_const_i32(dflag - 1),
>> +                                           tcg_const_i32(s->dflag - 1),
>>                                             tcg_const_tl(s->pc -
>> s->cs_base));
>>              } else {
>>                  tcg_gen_trunc_tl_i32(s->tmp2_i32, s->T0);
>>                  gen_helper_lcall_real(cpu_env, s->tmp2_i32, s->T1,
>> -                                      tcg_const_i32(dflag - 1),
>> +                                      tcg_const_i32(s->dflag - 1),
>>                                        tcg_const_i32(s->pc - s->cs_base));
>>              }
>>              tcg_gen_ld_tl(s->tmp4, cpu_env, offsetof(CPUX86State, eip));
>>              gen_jr(s, s->tmp4);
>>              break;
>>          case 4: /* jmp Ev */
>> -            if (dflag == MO_16) {
>> +            if (s->dflag == MO_16) {
>>                  tcg_gen_ext16u_tl(s->T0, s->T0);
>>              }
>>              gen_op_jmp_v(s->T0);
>> @@ -5126,7 +5131,7 @@ static target_ulong disas_insn(DisasContext *s,
>> CPUState *cpu)
>>
>>      case 0x84: /* test Ev, Gv */
>>      case 0x85:
>> -        ot = mo_b_d(b, dflag);
>> +        ot = mo_b_d(b, s->dflag);
>>
>>          modrm = x86_ldub_code(env, s);
>>          reg = ((modrm >> 3) & 7) | REX_R(s);
>> @@ -5139,7 +5144,7 @@ static target_ulong disas_insn(DisasContext *s,
>> CPUState *cpu)
>>
>>      case 0xa8: /* test eAX, Iv */
>>      case 0xa9:
>> -        ot = mo_b_d(b, dflag);
>> +        ot = mo_b_d(b, s->dflag);
>>          val = insn_get(env, s, ot);
>>
>>          gen_op_mov_v_reg(s, ot, s->T0, OR_EAX);
>> @@ -5149,7 +5154,7 @@ static target_ulong disas_insn(DisasContext *s,
>> CPUState *cpu)
>>          break;
>>
>>      case 0x98: /* CWDE/CBW */
>> -        switch (dflag) {
>> +        switch (s->dflag) {
>>  #ifdef TARGET_X86_64
>>          case MO_64:
>>              gen_op_mov_v_reg(s, MO_32, s->T0, R_EAX);
>> @@ -5172,7 +5177,7 @@ static target_ulong disas_insn(DisasContext *s,
>> CPUState *cpu)
>>          }
>>          break;
>>      case 0x99: /* CDQ/CWD */
>> -        switch (dflag) {
>> +        switch (s->dflag) {
>>  #ifdef TARGET_X86_64
>>          case MO_64:
>>              gen_op_mov_v_reg(s, MO_64, s->T0, R_EAX);
>> @@ -5199,7 +5204,7 @@ static target_ulong disas_insn(DisasContext *s,
>> CPUState *cpu)
>>      case 0x1af: /* imul Gv, Ev */
>>      case 0x69: /* imul Gv, Ev, I */
>>      case 0x6b:
>> -        ot = dflag;
>> +        ot = s->dflag;
>>          modrm = x86_ldub_code(env, s);
>>          reg = ((modrm >> 3) & 7) | REX_R(s);
>>          if (b == 0x69)
>> @@ -5251,7 +5256,7 @@ static target_ulong disas_insn(DisasContext *s,
>> CPUState *cpu)
>>          break;
>>      case 0x1c0:
>>      case 0x1c1: /* xadd Ev, Gv */
>> -        ot = mo_b_d(b, dflag);
>> +        ot = mo_b_d(b, s->dflag);
>>          modrm = x86_ldub_code(env, s);
>>          reg = ((modrm >> 3) & 7) | REX_R(s);
>>          mod = (modrm >> 6) & 3;
>> @@ -5283,7 +5288,7 @@ static target_ulong disas_insn(DisasContext *s,
>> CPUState *cpu)
>>          {
>>              TCGv oldv, newv, cmpv;
>>
>> -            ot = mo_b_d(b, dflag);
>> +            ot = mo_b_d(b, s->dflag);
>>              modrm = x86_ldub_code(env, s);
>>              reg = ((modrm >> 3) & 7) | REX_R(s);
>>              mod = (modrm >> 6) & 3;
>> @@ -5344,7 +5349,7 @@ static target_ulong disas_insn(DisasContext *s,
>> CPUState *cpu)
>>                  goto illegal_op;
>>              }
>>  #ifdef TARGET_X86_64
>> -            if (dflag == MO_64) {
>> +            if (s->dflag == MO_64) {
>>                  if (!(s->cpuid_ext_features & CPUID_EXT_CX16)) {
>>                      goto illegal_op;
>>                  }
>> @@ -5384,7 +5389,7 @@ static target_ulong disas_insn(DisasContext *s,
>> CPUState *cpu)
>>              }
>>              gen_helper_rdrand(s->T0, cpu_env);
>>              rm = (modrm & 7) | REX_B(s);
>> -            gen_op_mov_reg_v(s, dflag, rm, s->T0);
>> +            gen_op_mov_reg_v(s, s->dflag, rm, s->T0);
>>              set_cc_op(s, CC_OP_EFLAGS);
>>              if (tb_cflags(s->base.tb) & CF_USE_ICOUNT) {
>>                  gen_io_end();
>> @@ -5421,7 +5426,7 @@ static target_ulong disas_insn(DisasContext *s,
>> CPUState *cpu)
>>          break;
>>      case 0x68: /* push Iv */
>>      case 0x6a:
>> -        ot = mo_pushpop(s, dflag);
>> +        ot = mo_pushpop(s, s->dflag);
>>          if (b == 0x68)
>>              val = insn_get(env, s, ot);
>>          else
>> @@ -5506,7 +5511,7 @@ static target_ulong disas_insn(DisasContext *s,
>> CPUState *cpu)
>>          /* mov */
>>      case 0x88:
>>      case 0x89: /* mov Gv, Ev */
>> -        ot = mo_b_d(b, dflag);
>> +        ot = mo_b_d(b, s->dflag);
>>          modrm = x86_ldub_code(env, s);
>>          reg = ((modrm >> 3) & 7) | REX_R(s);
>>
>> @@ -5515,7 +5520,7 @@ static target_ulong disas_insn(DisasContext *s,
>> CPUState *cpu)
>>          break;
>>      case 0xc6:
>>      case 0xc7: /* mov Ev, Iv */
>> -        ot = mo_b_d(b, dflag);
>> +        ot = mo_b_d(b, s->dflag);
>>          modrm = x86_ldub_code(env, s);
>>          mod = (modrm >> 6) & 3;
>>          if (mod != 3) {
>> @@ -5532,7 +5537,7 @@ static target_ulong disas_insn(DisasContext *s,
>> CPUState *cpu)
>>          break;
>>      case 0x8a:
>>      case 0x8b: /* mov Ev, Gv */
>> -        ot = mo_b_d(b, dflag);
>> +        ot = mo_b_d(b, s->dflag);
>>          modrm = x86_ldub_code(env, s);
>>          reg = ((modrm >> 3) & 7) | REX_R(s);
>>
>> @@ -5564,7 +5569,7 @@ static target_ulong disas_insn(DisasContext *s,
>> CPUState *cpu)
>>          if (reg >= 6)
>>              goto illegal_op;
>>          gen_op_movl_T0_seg(s, reg);
>> -        ot = mod == 3 ? dflag : MO_16;
>> +        ot = mod == 3 ? s->dflag : MO_16;
>>          gen_ldst_modrm(env, s, modrm, ot, OR_TMP0, 1);
>>          break;
>>
>> @@ -5577,7 +5582,7 @@ static target_ulong disas_insn(DisasContext *s,
>> CPUState *cpu)
>>              TCGMemOp s_ot;
>>
>>              /* d_ot is the size of destination */
>> -            d_ot = dflag;
>> +            d_ot = s->dflag;
>>              /* ot is the size of source */
>>              ot = (b & 1) + MO_8;
>>              /* s_ot is the sign+size of source */
>> @@ -5628,7 +5633,7 @@ static target_ulong disas_insn(DisasContext *s,
>> CPUState *cpu)
>>              AddressParts a = gen_lea_modrm_0(env, s, modrm);
>>              TCGv ea = gen_lea_modrm_1(s, a);
>>              gen_lea_v_seg(s, s->aflag, ea, -1, -1);
>> -            gen_op_mov_reg_v(s, dflag, reg, s->A0);
>> +            gen_op_mov_reg_v(s, s->dflag, reg, s->A0);
>>          }
>>          break;
>>
>> @@ -5639,7 +5644,7 @@ static target_ulong disas_insn(DisasContext *s,
>> CPUState *cpu)
>>          {
>>              target_ulong offset_addr;
>>
>> -            ot = mo_b_d(b, dflag);
>> +            ot = mo_b_d(b, s->dflag);
>>              switch (s->aflag) {
>>  #ifdef TARGET_X86_64
>>              case MO_64:
>> @@ -5677,7 +5682,7 @@ static target_ulong disas_insn(DisasContext *s,
>> CPUState *cpu)
>>          break;
>>      case 0xb8 ... 0xbf: /* mov R, Iv */
>>  #ifdef TARGET_X86_64
>> -        if (dflag == MO_64) {
>> +        if (s->dflag == MO_64) {
>>              uint64_t tmp;
>>              /* 64 bit case */
>>              tmp = x86_ldq_code(env, s);
>> @@ -5687,7 +5692,7 @@ static target_ulong disas_insn(DisasContext *s,
>> CPUState *cpu)
>>          } else
>>  #endif
>>          {
>> -            ot = dflag;
>> +            ot = s->dflag;
>>              val = insn_get(env, s, ot);
>>              reg = (b & 7) | REX_B(s);
>>              tcg_gen_movi_tl(s->T0, val);
>> @@ -5697,13 +5702,13 @@ static target_ulong disas_insn(DisasContext *s,
>> CPUState *cpu)
>>
>>      case 0x91 ... 0x97: /* xchg R, EAX */
>>      do_xchg_reg_eax:
>> -        ot = dflag;
>> +        ot = s->dflag;
>>          reg = (b & 7) | REX_B(s);
>>          rm = R_EAX;
>>          goto do_xchg_reg;
>>      case 0x86:
>>      case 0x87: /* xchg Ev, Gv */
>> -        ot = mo_b_d(b, dflag);
>> +        ot = mo_b_d(b, s->dflag);
>>          modrm = x86_ldub_code(env, s);
>>          reg = ((modrm >> 3) & 7) | REX_R(s);
>>          mod = (modrm >> 6) & 3;
>> @@ -5740,7 +5745,7 @@ static target_ulong disas_insn(DisasContext *s,
>> CPUState *cpu)
>>      case 0x1b5: /* lgs Gv */
>>          op = R_GS;
>>      do_lxx:
>> -        ot = dflag != MO_16 ? MO_32 : MO_16;
>> +        ot = s->dflag != MO_16 ? MO_32 : MO_16;
>>          modrm = x86_ldub_code(env, s);
>>          reg = ((modrm >> 3) & 7) | REX_R(s);
>>          mod = (modrm >> 6) & 3;
>> @@ -5768,7 +5773,7 @@ static target_ulong disas_insn(DisasContext *s,
>> CPUState *cpu)
>>          shift = 2;
>>      grp2:
>>          {
>> -            ot = mo_b_d(b, dflag);
>> +            ot = mo_b_d(b, s->dflag);
>>              modrm = x86_ldub_code(env, s);
>>              mod = (modrm >> 6) & 3;
>>              op = (modrm >> 3) & 7;
>> @@ -5821,7 +5826,7 @@ static target_ulong disas_insn(DisasContext *s,
>> CPUState *cpu)
>>          op = 1;
>>          shift = 0;
>>      do_shiftd:
>> -        ot = dflag;
>> +        ot = s->dflag;
>>          modrm = x86_ldub_code(env, s);
>>          mod = (modrm >> 6) & 3;
>>          rm = (modrm & 7) | REX_B(s);
>> @@ -5983,7 +5988,7 @@ static target_ulong disas_insn(DisasContext *s,
>> CPUState *cpu)
>>                  }
>>                  break;
>>              case 0x0c: /* fldenv mem */
>> -                gen_helper_fldenv(cpu_env, s->A0, tcg_const_i32(dflag -
>> 1));
>> +                gen_helper_fldenv(cpu_env, s->A0, tcg_const_i32(s->dflag
>> - 1));
>>                  break;
>>              case 0x0d: /* fldcw mem */
>>                  tcg_gen_qemu_ld_i32(s->tmp2_i32, s->A0,
>> @@ -5991,7 +5996,7 @@ static target_ulong disas_insn(DisasContext *s,
>> CPUState *cpu)
>>                  gen_helper_fldcw(cpu_env, s->tmp2_i32);
>>                  break;
>>              case 0x0e: /* fnstenv mem */
>> -                gen_helper_fstenv(cpu_env, s->A0, tcg_const_i32(dflag -
>> 1));
>> +                gen_helper_fstenv(cpu_env, s->A0, tcg_const_i32(s->dflag
>> - 1));
>>                  break;
>>              case 0x0f: /* fnstcw mem */
>>                  gen_helper_fnstcw(s->tmp2_i32, cpu_env);
>> @@ -6006,10 +6011,10 @@ static target_ulong disas_insn(DisasContext *s,
>> CPUState *cpu)
>>                  gen_helper_fpop(cpu_env);
>>                  break;
>>              case 0x2c: /* frstor mem */
>> -                gen_helper_frstor(cpu_env, s->A0, tcg_const_i32(dflag -
>> 1));
>> +                gen_helper_frstor(cpu_env, s->A0, tcg_const_i32(s->dflag
>> - 1));
>>                  break;
>>              case 0x2e: /* fnsave mem */
>> -                gen_helper_fsave(cpu_env, s->A0, tcg_const_i32(dflag -
>> 1));
>> +                gen_helper_fsave(cpu_env, s->A0, tcg_const_i32(s->dflag
>> - 1));
>>                  break;
>>              case 0x2f: /* fnstsw mem */
>>                  gen_helper_fnstsw(s->tmp2_i32, cpu_env);
>> @@ -6351,8 +6356,8 @@ static target_ulong disas_insn(DisasContext *s,
>> CPUState *cpu)
>>
>>      case 0xa4: /* movsS */
>>      case 0xa5:
>> -        ot = mo_b_d(b, dflag);
>> -        if (prefixes & (PREFIX_REPZ | PREFIX_REPNZ)) {
>> +        ot = mo_b_d(b, s->dflag);
>> +        if (s->prefix & (PREFIX_REPZ | PREFIX_REPNZ)) {
>>              gen_repz_movs(s, ot, pc_start - s->cs_base, s->pc -
>> s->cs_base);
>>          } else {
>>              gen_movs(s, ot);
>> @@ -6361,8 +6366,8 @@ static target_ulong disas_insn(DisasContext *s,
>> CPUState *cpu)
>>
>>      case 0xaa: /* stosS */
>>      case 0xab:
>> -        ot = mo_b_d(b, dflag);
>> -        if (prefixes & (PREFIX_REPZ | PREFIX_REPNZ)) {
>> +        ot = mo_b_d(b, s->dflag);
>> +        if (s->prefix & (PREFIX_REPZ | PREFIX_REPNZ)) {
>>              gen_repz_stos(s, ot, pc_start - s->cs_base, s->pc -
>> s->cs_base);
>>          } else {
>>              gen_stos(s, ot);
>> @@ -6370,8 +6375,8 @@ static target_ulong disas_insn(DisasContext *s,
>> CPUState *cpu)
>>          break;
>>      case 0xac: /* lodsS */
>>      case 0xad:
>> -        ot = mo_b_d(b, dflag);
>> -        if (prefixes & (PREFIX_REPZ | PREFIX_REPNZ)) {
>> +        ot = mo_b_d(b, s->dflag);
>> +        if (s->prefix & (PREFIX_REPZ | PREFIX_REPNZ)) {
>>              gen_repz_lods(s, ot, pc_start - s->cs_base, s->pc -
>> s->cs_base);
>>          } else {
>>              gen_lods(s, ot);
>> @@ -6379,10 +6384,10 @@ static target_ulong disas_insn(DisasContext *s,
>> CPUState *cpu)
>>          break;
>>      case 0xae: /* scasS */
>>      case 0xaf:
>> -        ot = mo_b_d(b, dflag);
>> -        if (prefixes & PREFIX_REPNZ) {
>> +        ot = mo_b_d(b, s->dflag);
>> +        if (s->prefix & PREFIX_REPNZ) {
>>              gen_repz_scas(s, ot, pc_start - s->cs_base, s->pc -
>> s->cs_base, 1);
>> -        } else if (prefixes & PREFIX_REPZ) {
>> +        } else if (s->prefix & PREFIX_REPZ) {
>>              gen_repz_scas(s, ot, pc_start - s->cs_base, s->pc -
>> s->cs_base, 0);
>>          } else {
>>              gen_scas(s, ot);
>> @@ -6391,10 +6396,10 @@ static target_ulong disas_insn(DisasContext *s,
>> CPUState *cpu)
>>
>>      case 0xa6: /* cmpsS */
>>      case 0xa7:
>> -        ot = mo_b_d(b, dflag);
>> -        if (prefixes & PREFIX_REPNZ) {
>> +        ot = mo_b_d(b, s->dflag);
>> +        if (s->prefix & PREFIX_REPNZ) {
>>              gen_repz_cmps(s, ot, pc_start - s->cs_base, s->pc -
>> s->cs_base, 1);
>> -        } else if (prefixes & PREFIX_REPZ) {
>> +        } else if (s->prefix & PREFIX_REPZ) {
>>              gen_repz_cmps(s, ot, pc_start - s->cs_base, s->pc -
>> s->cs_base, 0);
>>          } else {
>>              gen_cmps(s, ot);
>> @@ -6402,11 +6407,11 @@ static target_ulong disas_insn(DisasContext *s,
>> CPUState *cpu)
>>          break;
>>      case 0x6c: /* insS */
>>      case 0x6d:
>> -        ot = mo_b_d32(b, dflag);
>> +        ot = mo_b_d32(b, s->dflag);
>>          tcg_gen_ext16u_tl(s->T0, cpu_regs[R_EDX]);
>>          gen_check_io(s, ot, pc_start - s->cs_base,
>> -                     SVM_IOIO_TYPE_MASK | svm_is_rep(prefixes) | 4);
>> -        if (prefixes & (PREFIX_REPZ | PREFIX_REPNZ)) {
>> +                     SVM_IOIO_TYPE_MASK | svm_is_rep(s->prefix) | 4);
>> +        if (s->prefix & (PREFIX_REPZ | PREFIX_REPNZ)) {
>>              gen_repz_ins(s, ot, pc_start - s->cs_base, s->pc -
>> s->cs_base);
>>          } else {
>>              gen_ins(s, ot);
>> @@ -6417,11 +6422,11 @@ static target_ulong disas_insn(DisasContext *s,
>> CPUState *cpu)
>>          break;
>>      case 0x6e: /* outsS */
>>      case 0x6f:
>> -        ot = mo_b_d32(b, dflag);
>> +        ot = mo_b_d32(b, s->dflag);
>>          tcg_gen_ext16u_tl(s->T0, cpu_regs[R_EDX]);
>>          gen_check_io(s, ot, pc_start - s->cs_base,
>> -                     svm_is_rep(prefixes) | 4);
>> -        if (prefixes & (PREFIX_REPZ | PREFIX_REPNZ)) {
>> +                     svm_is_rep(s->prefix) | 4);
>> +        if (s->prefix & (PREFIX_REPZ | PREFIX_REPNZ)) {
>>              gen_repz_outs(s, ot, pc_start - s->cs_base, s->pc -
>> s->cs_base);
>>          } else {
>>              gen_outs(s, ot);
>> @@ -6436,11 +6441,11 @@ static target_ulong disas_insn(DisasContext *s,
>> CPUState *cpu)
>>
>>      case 0xe4:
>>      case 0xe5:
>> -        ot = mo_b_d32(b, dflag);
>> +        ot = mo_b_d32(b, s->dflag);
>>          val = x86_ldub_code(env, s);
>>          tcg_gen_movi_tl(s->T0, val);
>>          gen_check_io(s, ot, pc_start - s->cs_base,
>> -                     SVM_IOIO_TYPE_MASK | svm_is_rep(prefixes));
>> +                     SVM_IOIO_TYPE_MASK | svm_is_rep(s->prefix));
>>          if (tb_cflags(s->base.tb) & CF_USE_ICOUNT) {
>>              gen_io_start();
>>          }
>> @@ -6455,11 +6460,11 @@ static target_ulong disas_insn(DisasContext *s,
>> CPUState *cpu)
>>          break;
>>      case 0xe6:
>>      case 0xe7:
>> -        ot = mo_b_d32(b, dflag);
>> +        ot = mo_b_d32(b, s->dflag);
>>          val = x86_ldub_code(env, s);
>>          tcg_gen_movi_tl(s->T0, val);
>>          gen_check_io(s, ot, pc_start - s->cs_base,
>> -                     svm_is_rep(prefixes));
>> +                     svm_is_rep(s->prefix));
>>          gen_op_mov_v_reg(s, ot, s->T1, R_EAX);
>>
>>          if (tb_cflags(s->base.tb) & CF_USE_ICOUNT) {
>> @@ -6476,10 +6481,10 @@ static target_ulong disas_insn(DisasContext *s,
>> CPUState *cpu)
>>          break;
>>      case 0xec:
>>      case 0xed:
>> -        ot = mo_b_d32(b, dflag);
>> +        ot = mo_b_d32(b, s->dflag);
>>          tcg_gen_ext16u_tl(s->T0, cpu_regs[R_EDX]);
>>          gen_check_io(s, ot, pc_start - s->cs_base,
>> -                     SVM_IOIO_TYPE_MASK | svm_is_rep(prefixes));
>> +                     SVM_IOIO_TYPE_MASK | svm_is_rep(s->prefix));
>>          if (tb_cflags(s->base.tb) & CF_USE_ICOUNT) {
>>              gen_io_start();
>>          }
>> @@ -6494,10 +6499,10 @@ static target_ulong disas_insn(DisasContext *s,
>> CPUState *cpu)
>>          break;
>>      case 0xee:
>>      case 0xef:
>> -        ot = mo_b_d32(b, dflag);
>> +        ot = mo_b_d32(b, s->dflag);
>>          tcg_gen_ext16u_tl(s->T0, cpu_regs[R_EDX]);
>>          gen_check_io(s, ot, pc_start - s->cs_base,
>> -                     svm_is_rep(prefixes));
>> +                     svm_is_rep(s->prefix));
>>          gen_op_mov_v_reg(s, ot, s->T1, R_EAX);
>>
>>          if (tb_cflags(s->base.tb) & CF_USE_ICOUNT) {
>> @@ -6538,21 +6543,21 @@ static target_ulong disas_insn(DisasContext *s,
>> CPUState *cpu)
>>          if (s->pe && !s->vm86) {
>>              gen_update_cc_op(s);
>>              gen_jmp_im(s, pc_start - s->cs_base);
>> -            gen_helper_lret_protected(cpu_env, tcg_const_i32(dflag - 1),
>> +            gen_helper_lret_protected(cpu_env, tcg_const_i32(s->dflag -
>> 1),
>>                                        tcg_const_i32(val));
>>          } else {
>>              gen_stack_A0(s);
>>              /* pop offset */
>> -            gen_op_ld_v(s, dflag, s->T0, s->A0);
>> +            gen_op_ld_v(s, s->dflag, s->T0, s->A0);
>>              /* NOTE: keeping EIP updated is not a problem in case of
>>                 exception */
>>              gen_op_jmp_v(s->T0);
>>              /* pop selector */
>> -            gen_add_A0_im(s, 1 << dflag);
>> -            gen_op_ld_v(s, dflag, s->T0, s->A0);
>> +            gen_add_A0_im(s, 1 << s->dflag);
>> +            gen_op_ld_v(s, s->dflag, s->T0, s->A0);
>>              gen_op_movl_seg_T0_vm(s, R_CS);
>>              /* add stack offset */
>> -            gen_stack_update(s, val + (2 << dflag));
>> +            gen_stack_update(s, val + (2 << s->dflag));
>>          }
>>          gen_eob(s);
>>          break;
>> @@ -6563,17 +6568,17 @@ static target_ulong disas_insn(DisasContext *s,
>> CPUState *cpu)
>>          gen_svm_check_intercept(s, pc_start, SVM_EXIT_IRET);
>>          if (!s->pe) {
>>              /* real mode */
>> -            gen_helper_iret_real(cpu_env, tcg_const_i32(dflag - 1));
>> +            gen_helper_iret_real(cpu_env, tcg_const_i32(s->dflag - 1));
>>              set_cc_op(s, CC_OP_EFLAGS);
>>          } else if (s->vm86) {
>>              if (s->iopl != 3) {
>>                  gen_exception(s, EXCP0D_GPF, pc_start - s->cs_base);
>>              } else {
>> -                gen_helper_iret_real(cpu_env, tcg_const_i32(dflag - 1));
>> +                gen_helper_iret_real(cpu_env, tcg_const_i32(s->dflag -
>> 1));
>>                  set_cc_op(s, CC_OP_EFLAGS);
>>              }
>>          } else {
>> -            gen_helper_iret_protected(cpu_env, tcg_const_i32(dflag - 1),
>> +            gen_helper_iret_protected(cpu_env, tcg_const_i32(s->dflag -
>> 1),
>>                                        tcg_const_i32(s->pc - s->cs_base));
>>              set_cc_op(s, CC_OP_EFLAGS);
>>          }
>> @@ -6581,14 +6586,14 @@ static target_ulong disas_insn(DisasContext *s,
>> CPUState *cpu)
>>          break;
>>      case 0xe8: /* call im */
>>          {
>> -            if (dflag != MO_16) {
>> +            if (s->dflag != MO_16) {
>>                  tval = (int32_t)insn_get(env, s, MO_32);
>>              } else {
>>                  tval = (int16_t)insn_get(env, s, MO_16);
>>              }
>>              next_eip = s->pc - s->cs_base;
>>              tval += next_eip;
>> -            if (dflag == MO_16) {
>> +            if (s->dflag == MO_16) {
>>                  tval &= 0xffff;
>>              } else if (!CODE64(s)) {
>>                  tval &= 0xffffffff;
>> @@ -6605,7 +6610,7 @@ static target_ulong disas_insn(DisasContext *s,
>> CPUState *cpu)
>>
>>              if (CODE64(s))
>>                  goto illegal_op;
>> -            ot = dflag;
>> +            ot = s->dflag;
>>              offset = insn_get(env, s, ot);
>>              selector = insn_get(env, s, MO_16);
>>
>> @@ -6614,13 +6619,13 @@ static target_ulong disas_insn(DisasContext *s,
>> CPUState *cpu)
>>          }
>>          goto do_lcall;
>>      case 0xe9: /* jmp im */
>> -        if (dflag != MO_16) {
>> +        if (s->dflag != MO_16) {
>>              tval = (int32_t)insn_get(env, s, MO_32);
>>          } else {
>>              tval = (int16_t)insn_get(env, s, MO_16);
>>          }
>>          tval += s->pc - s->cs_base;
>> -        if (dflag == MO_16) {
>> +        if (s->dflag == MO_16) {
>>              tval &= 0xffff;
>>          } else if (!CODE64(s)) {
>>              tval &= 0xffffffff;
>> @@ -6634,7 +6639,7 @@ static target_ulong disas_insn(DisasContext *s,
>> CPUState *cpu)
>>
>>              if (CODE64(s))
>>                  goto illegal_op;
>> -            ot = dflag;
>> +            ot = s->dflag;
>>              offset = insn_get(env, s, ot);
>>              selector = insn_get(env, s, MO_16);
>>
>> @@ -6645,7 +6650,7 @@ static target_ulong disas_insn(DisasContext *s,
>> CPUState *cpu)
>>      case 0xeb: /* jmp Jb */
>>          tval = (int8_t)insn_get(env, s, MO_8);
>>          tval += s->pc - s->cs_base;
>> -        if (dflag == MO_16) {
>> +        if (s->dflag == MO_16) {
>>              tval &= 0xffff;
>>          }
>>          gen_jmp(s, tval);
>> @@ -6654,7 +6659,7 @@ static target_ulong disas_insn(DisasContext *s,
>> CPUState *cpu)
>>          tval = (int8_t)insn_get(env, s, MO_8);
>>          goto do_jcc;
>>      case 0x180 ... 0x18f: /* jcc Jv */
>> -        if (dflag != MO_16) {
>> +        if (s->dflag != MO_16) {
>>              tval = (int32_t)insn_get(env, s, MO_32);
>>          } else {
>>              tval = (int16_t)insn_get(env, s, MO_16);
>> @@ -6662,7 +6667,7 @@ static target_ulong disas_insn(DisasContext *s,
>> CPUState *cpu)
>>      do_jcc:
>>          next_eip = s->pc - s->cs_base;
>>          tval += next_eip;
>> -        if (dflag == MO_16) {
>> +        if (s->dflag == MO_16) {
>>              tval &= 0xffff;
>>          }
>>          gen_bnd_jmp(s);
>> @@ -6678,7 +6683,7 @@ static target_ulong disas_insn(DisasContext *s,
>> CPUState *cpu)
>>          if (!(s->cpuid_features & CPUID_CMOV)) {
>>              goto illegal_op;
>>          }
>> -        ot = dflag;
>> +        ot = s->dflag;
>>          modrm = x86_ldub_code(env, s);
>>          reg = ((modrm >> 3) & 7) | REX_R(s);
>>          gen_cmovcc1(env, s, ot, b, modrm, reg);
>> @@ -6703,7 +6708,7 @@ static target_ulong disas_insn(DisasContext *s,
>> CPUState *cpu)
>>          } else {
>>              ot = gen_pop_T0(s);
>>              if (s->cpl == 0) {
>> -                if (dflag != MO_16) {
>> +                if (s->dflag != MO_16) {
>>                      gen_helper_write_eflags(cpu_env, s->T0,
>>                                              tcg_const_i32((TF_MASK |
>> AC_MASK |
>>                                                             ID_MASK |
>> NT_MASK |
>> @@ -6718,7 +6723,7 @@ static target_ulong disas_insn(DisasContext *s,
>> CPUState *cpu)
>>                  }
>>              } else {
>>                  if (s->cpl <= s->iopl) {
>> -                    if (dflag != MO_16) {
>> +                    if (s->dflag != MO_16) {
>>                          gen_helper_write_eflags(cpu_env, s->T0,
>>                                                  tcg_const_i32((TF_MASK |
>>                                                                 AC_MASK |
>> @@ -6735,7 +6740,7 @@ static target_ulong disas_insn(DisasContext *s,
>> CPUState *cpu)
>>                                                                & 0xffff));
>>                      }
>>                  } else {
>> -                    if (dflag != MO_16) {
>> +                    if (s->dflag != MO_16) {
>>                          gen_helper_write_eflags(cpu_env, s->T0,
>>                                             tcg_const_i32((TF_MASK |
>> AC_MASK |
>>                                                            ID_MASK |
>> NT_MASK)));
>> @@ -6795,7 +6800,7 @@ static target_ulong disas_insn(DisasContext *s,
>> CPUState *cpu)
>>          /************************/
>>          /* bit operations */
>>      case 0x1ba: /* bt/bts/btr/btc Gv, im */
>> -        ot = dflag;
>> +        ot = s->dflag;
>>          modrm = x86_ldub_code(env, s);
>>          op = (modrm >> 3) & 7;
>>          mod = (modrm >> 6) & 3;
>> @@ -6828,7 +6833,7 @@ static target_ulong disas_insn(DisasContext *s,
>> CPUState *cpu)
>>      case 0x1bb: /* btc */
>>          op = 3;
>>      do_btx:
>> -        ot = dflag;
>> +        ot = s->dflag;
>>          modrm = x86_ldub_code(env, s);
>>          reg = ((modrm >> 3) & 7) | REX_R(s);
>>          mod = (modrm >> 6) & 3;
>> @@ -6933,14 +6938,14 @@ static target_ulong disas_insn(DisasContext *s,
>> CPUState *cpu)
>>          break;
>>      case 0x1bc: /* bsf / tzcnt */
>>      case 0x1bd: /* bsr / lzcnt */
>> -        ot = dflag;
>> +        ot = s->dflag;
>>          modrm = x86_ldub_code(env, s);
>>          reg = ((modrm >> 3) & 7) | REX_R(s);
>>          gen_ldst_modrm(env, s, modrm, ot, OR_TMP0, 0);
>>          gen_extu(ot, s->T0);
>>
>>          /* Note that lzcnt and tzcnt are in different extensions.  */
>> -        if ((prefixes & PREFIX_REPZ)
>> +        if ((s->prefix & PREFIX_REPZ)
>>              && (b & 1
>>                  ? s->cpuid_ext3_features & CPUID_EXT3_ABM
>>                  : s->cpuid_7_0_ebx_features & CPUID_7_0_EBX_BMI1)) {
>> @@ -7033,14 +7038,14 @@ static target_ulong disas_insn(DisasContext *s,
>> CPUState *cpu)
>>          /* misc */
>>      case 0x90: /* nop */
>>          /* XXX: correct lock test for all insn */
>> -        if (prefixes & PREFIX_LOCK) {
>> +        if (s->prefix & PREFIX_LOCK) {
>>              goto illegal_op;
>>          }
>>          /* If REX_B is set, then this is xchg eax, r8d, not a nop.  */
>>          if (REX_B(s)) {
>>              goto do_xchg_reg_eax;
>>          }
>> -        if (prefixes & PREFIX_REPZ) {
>> +        if (s->prefix & PREFIX_REPZ) {
>>              gen_update_cc_op(s);
>>              gen_jmp_im(s, pc_start - s->cs_base);
>>              gen_helper_pause(cpu_env, tcg_const_i32(s->pc - pc_start));
>> @@ -7107,7 +7112,7 @@ static target_ulong disas_insn(DisasContext *s,
>> CPUState *cpu)
>>      case 0x62: /* bound */
>>          if (CODE64(s))
>>              goto illegal_op;
>> -        ot = dflag;
>> +        ot = s->dflag;
>>          modrm = x86_ldub_code(env, s);
>>          reg = (modrm >> 3) & 7;
>>          mod = (modrm >> 6) & 3;
>> @@ -7125,7 +7130,7 @@ static target_ulong disas_insn(DisasContext *s,
>> CPUState *cpu)
>>      case 0x1c8 ... 0x1cf: /* bswap reg */
>>          reg = (b & 7) | REX_B(s);
>>  #ifdef TARGET_X86_64
>> -        if (dflag == MO_64) {
>> +        if (s->dflag == MO_64) {
>>              gen_op_mov_v_reg(s, MO_64, s->T0, reg);
>>              tcg_gen_bswap64_i64(s->T0, s->T0);
>>              gen_op_mov_reg_v(s, MO_64, reg, s->T0);
>> @@ -7155,7 +7160,7 @@ static target_ulong disas_insn(DisasContext *s,
>> CPUState *cpu)
>>              tval = (int8_t)insn_get(env, s, MO_8);
>>              next_eip = s->pc - s->cs_base;
>>              tval += next_eip;
>> -            if (dflag == MO_16) {
>> +            if (s->dflag == MO_16) {
>>                  tval &= 0xffff;
>>              }
>>
>> @@ -7239,7 +7244,7 @@ static target_ulong disas_insn(DisasContext *s,
>> CPUState *cpu)
>>          if (!s->pe) {
>>              gen_exception(s, EXCP0D_GPF, pc_start - s->cs_base);
>>          } else {
>> -            gen_helper_sysexit(cpu_env, tcg_const_i32(dflag - 1));
>> +            gen_helper_sysexit(cpu_env, tcg_const_i32(s->dflag - 1));
>>              gen_eob(s);
>>          }
>>          break;
>> @@ -7258,7 +7263,7 @@ static target_ulong disas_insn(DisasContext *s,
>> CPUState *cpu)
>>          if (!s->pe) {
>>              gen_exception(s, EXCP0D_GPF, pc_start - s->cs_base);
>>          } else {
>> -            gen_helper_sysret(cpu_env, tcg_const_i32(dflag - 1));
>> +            gen_helper_sysret(cpu_env, tcg_const_i32(s->dflag - 1));
>>              /* condition codes are modified only in long mode */
>>              if (s->lma) {
>>                  set_cc_op(s, CC_OP_EFLAGS);
>> @@ -7297,7 +7302,7 @@ static target_ulong disas_insn(DisasContext *s,
>> CPUState *cpu)
>>              gen_svm_check_intercept(s, pc_start, SVM_EXIT_LDTR_READ);
>>              tcg_gen_ld32u_tl(s->T0, cpu_env,
>>                               offsetof(CPUX86State, ldt.selector));
>> -            ot = mod == 3 ? dflag : MO_16;
>> +            ot = mod == 3 ? s->dflag : MO_16;
>>              gen_ldst_modrm(env, s, modrm, ot, OR_TMP0, 1);
>>              break;
>>          case 2: /* lldt */
>> @@ -7318,7 +7323,7 @@ static target_ulong disas_insn(DisasContext *s,
>> CPUState *cpu)
>>              gen_svm_check_intercept(s, pc_start, SVM_EXIT_TR_READ);
>>              tcg_gen_ld32u_tl(s->T0, cpu_env,
>>                               offsetof(CPUX86State, tr.selector));
>> -            ot = mod == 3 ? dflag : MO_16;
>> +            ot = mod == 3 ? s->dflag : MO_16;
>>              gen_ldst_modrm(env, s, modrm, ot, OR_TMP0, 1);
>>              break;
>>          case 3: /* ltr */
>> @@ -7362,7 +7367,7 @@ static target_ulong disas_insn(DisasContext *s,
>> CPUState *cpu)
>>              gen_op_st_v(s, MO_16, s->T0, s->A0);
>>              gen_add_A0_im(s, 2);
>>              tcg_gen_ld_tl(s->T0, cpu_env, offsetof(CPUX86State,
>> gdt.base));
>> -            if (dflag == MO_16) {
>> +            if (s->dflag == MO_16) {
>>                  tcg_gen_andi_tl(s->T0, s->T0, 0xffffff);
>>              }
>>              gen_op_st_v(s, CODE64(s) + MO_32, s->T0, s->A0);
>> @@ -7417,7 +7422,7 @@ static target_ulong disas_insn(DisasContext *s,
>> CPUState *cpu)
>>              gen_op_st_v(s, MO_16, s->T0, s->A0);
>>              gen_add_A0_im(s, 2);
>>              tcg_gen_ld_tl(s->T0, cpu_env, offsetof(CPUX86State,
>> idt.base));
>> -            if (dflag == MO_16) {
>> +            if (s->dflag == MO_16) {
>>                  tcg_gen_andi_tl(s->T0, s->T0, 0xffffff);
>>              }
>>              gen_op_st_v(s, CODE64(s) + MO_32, s->T0, s->A0);
>> @@ -7567,7 +7572,7 @@ static target_ulong disas_insn(DisasContext *s,
>> CPUState *cpu)
>>              gen_op_ld_v(s, MO_16, s->T1, s->A0);
>>              gen_add_A0_im(s, 2);
>>              gen_op_ld_v(s, CODE64(s) + MO_32, s->T0, s->A0);
>> -            if (dflag == MO_16) {
>> +            if (s->dflag == MO_16) {
>>                  tcg_gen_andi_tl(s->T0, s->T0, 0xffffff);
>>              }
>>              tcg_gen_st_tl(s->T0, cpu_env, offsetof(CPUX86State,
>> gdt.base));
>> @@ -7584,7 +7589,7 @@ static target_ulong disas_insn(DisasContext *s,
>> CPUState *cpu)
>>              gen_op_ld_v(s, MO_16, s->T1, s->A0);
>>              gen_add_A0_im(s, 2);
>>              gen_op_ld_v(s, CODE64(s) + MO_32, s->T0, s->A0);
>> -            if (dflag == MO_16) {
>> +            if (s->dflag == MO_16) {
>>                  tcg_gen_andi_tl(s->T0, s->T0, 0xffffff);
>>              }
>>              tcg_gen_st_tl(s->T0, cpu_env, offsetof(CPUX86State,
>> idt.base));
>> @@ -7603,7 +7608,7 @@ static target_ulong disas_insn(DisasContext *s,
>> CPUState *cpu)
>>              gen_ldst_modrm(env, s, modrm, ot, OR_TMP0, 1);
>>              break;
>>          case 0xee: /* rdpkru */
>> -            if (prefixes & PREFIX_LOCK) {
>> +            if (s->prefix & PREFIX_LOCK) {
>>                  goto illegal_op;
>>              }
>>              tcg_gen_trunc_tl_i32(s->tmp2_i32, cpu_regs[R_ECX]);
>> @@ -7611,7 +7616,7 @@ static target_ulong disas_insn(DisasContext *s,
>> CPUState *cpu)
>>              tcg_gen_extr_i64_tl(cpu_regs[R_EAX], cpu_regs[R_EDX],
>> s->tmp1_i64);
>>              break;
>>          case 0xef: /* wrpkru */
>> -            if (prefixes & PREFIX_LOCK) {
>> +            if (s->prefix & PREFIX_LOCK) {
>>                  goto illegal_op;
>>              }
>>              tcg_gen_concat_tl_i64(s->tmp1_i64, cpu_regs[R_EAX],
>> @@ -7696,7 +7701,7 @@ static target_ulong disas_insn(DisasContext *s,
>> CPUState *cpu)
>>          if (CODE64(s)) {
>>              int d_ot;
>>              /* d_ot is the size of destination */
>> -            d_ot = dflag;
>> +            d_ot = s->dflag;
>>
>>              modrm = x86_ldub_code(env, s);
>>              reg = ((modrm >> 3) & 7) | REX_R(s);
>> @@ -7771,7 +7776,7 @@ static target_ulong disas_insn(DisasContext *s,
>> CPUState *cpu)
>>              TCGv t0;
>>              if (!s->pe || s->vm86)
>>                  goto illegal_op;
>> -            ot = dflag != MO_16 ? MO_32 : MO_16;
>> +            ot = s->dflag != MO_16 ? MO_32 : MO_16;
>>              modrm = x86_ldub_code(env, s);
>>              reg = ((modrm >> 3) & 7) | REX_R(s);
>>              gen_ldst_modrm(env, s, modrm, MO_16, OR_TMP0, 0);
>> @@ -7815,18 +7820,18 @@ static target_ulong disas_insn(DisasContext *s,
>> CPUState *cpu)
>>          if (s->flags & HF_MPX_EN_MASK) {
>>              mod = (modrm >> 6) & 3;
>>              reg = ((modrm >> 3) & 7) | REX_R(s);
>> -            if (prefixes & PREFIX_REPZ) {
>> +            if (s->prefix & PREFIX_REPZ) {
>>                  /* bndcl */
>>                  if (reg >= 4
>> -                    || (prefixes & PREFIX_LOCK)
>> +                    || (s->prefix & PREFIX_LOCK)
>>                      || s->aflag == MO_16) {
>>                      goto illegal_op;
>>                  }
>>                  gen_bndck(env, s, modrm, TCG_COND_LTU, cpu_bndl[reg]);
>> -            } else if (prefixes & PREFIX_REPNZ) {
>> +            } else if (s->prefix & PREFIX_REPNZ) {
>>                  /* bndcu */
>>                  if (reg >= 4
>> -                    || (prefixes & PREFIX_LOCK)
>> +                    || (s->prefix & PREFIX_LOCK)
>>                      || s->aflag == MO_16) {
>>                      goto illegal_op;
>>                  }
>> @@ -7834,14 +7839,14 @@ static target_ulong disas_insn(DisasContext *s,
>> CPUState *cpu)
>>                  tcg_gen_not_i64(notu, cpu_bndu[reg]);
>>                  gen_bndck(env, s, modrm, TCG_COND_GTU, notu);
>>                  tcg_temp_free_i64(notu);
>> -            } else if (prefixes & PREFIX_DATA) {
>> +            } else if (s->prefix & PREFIX_DATA) {
>>                  /* bndmov -- from reg/mem */
>>                  if (reg >= 4 || s->aflag == MO_16) {
>>                      goto illegal_op;
>>                  }
>>                  if (mod == 3) {
>>                      int reg2 = (modrm & 7) | REX_B(s);
>> -                    if (reg2 >= 4 || (prefixes & PREFIX_LOCK)) {
>> +                    if (reg2 >= 4 || (s->prefix & PREFIX_LOCK)) {
>>                          goto illegal_op;
>>                      }
>>                      if (s->flags & HF_MPX_IU_MASK) {
>> @@ -7870,7 +7875,7 @@ static target_ulong disas_insn(DisasContext *s,
>> CPUState *cpu)
>>                  /* bndldx */
>>                  AddressParts a = gen_lea_modrm_0(env, s, modrm);
>>                  if (reg >= 4
>> -                    || (prefixes & PREFIX_LOCK)
>> +                    || (s->prefix & PREFIX_LOCK)
>>                      || s->aflag == MO_16
>>                      || a.base < -1) {
>>                      goto illegal_op;
>> @@ -7905,10 +7910,10 @@ static target_ulong disas_insn(DisasContext *s,
>> CPUState *cpu)
>>          if (s->flags & HF_MPX_EN_MASK) {
>>              mod = (modrm >> 6) & 3;
>>              reg = ((modrm >> 3) & 7) | REX_R(s);
>> -            if (mod != 3 && (prefixes & PREFIX_REPZ)) {
>> +            if (mod != 3 && (s->prefix & PREFIX_REPZ)) {
>>                  /* bndmk */
>>                  if (reg >= 4
>> -                    || (prefixes & PREFIX_LOCK)
>> +                    || (s->prefix & PREFIX_LOCK)
>>                      || s->aflag == MO_16) {
>>                      goto illegal_op;
>>                  }
>> @@ -7933,22 +7938,22 @@ static target_ulong disas_insn(DisasContext *s,
>> CPUState *cpu)
>>                  /* bnd registers are now in-use */
>>                  gen_set_hflag(s, HF_MPX_IU_MASK);
>>                  break;
>> -            } else if (prefixes & PREFIX_REPNZ) {
>> +            } else if (s->prefix & PREFIX_REPNZ) {
>>                  /* bndcn */
>>                  if (reg >= 4
>> -                    || (prefixes & PREFIX_LOCK)
>> +                    || (s->prefix & PREFIX_LOCK)
>>                      || s->aflag == MO_16) {
>>                      goto illegal_op;
>>                  }
>>                  gen_bndck(env, s, modrm, TCG_COND_GTU, cpu_bndu[reg]);
>> -            } else if (prefixes & PREFIX_DATA) {
>> +            } else if (s->prefix & PREFIX_DATA) {
>>                  /* bndmov -- to reg/mem */
>>                  if (reg >= 4 || s->aflag == MO_16) {
>>                      goto illegal_op;
>>                  }
>>                  if (mod == 3) {
>>                      int reg2 = (modrm & 7) | REX_B(s);
>> -                    if (reg2 >= 4 || (prefixes & PREFIX_LOCK)) {
>> +                    if (reg2 >= 4 || (s->prefix & PREFIX_LOCK)) {
>>                          goto illegal_op;
>>                      }
>>                      if (s->flags & HF_MPX_IU_MASK) {
>> @@ -7975,7 +7980,7 @@ static target_ulong disas_insn(DisasContext *s,
>> CPUState *cpu)
>>                  /* bndstx */
>>                  AddressParts a = gen_lea_modrm_0(env, s, modrm);
>>                  if (reg >= 4
>> -                    || (prefixes & PREFIX_LOCK)
>> +                    || (s->prefix & PREFIX_LOCK)
>>                      || s->aflag == MO_16
>>                      || a.base < -1) {
>>                      goto illegal_op;
>> @@ -8023,7 +8028,7 @@ static target_ulong disas_insn(DisasContext *s,
>> CPUState *cpu)
>>                  ot = MO_64;
>>              else
>>                  ot = MO_32;
>> -            if ((prefixes & PREFIX_LOCK) && (reg == 0) &&
>> +            if ((s->prefix & PREFIX_LOCK) && (reg == 0) &&
>>                  (s->cpuid_ext3_features & CPUID_EXT3_CR8LEG)) {
>>                  reg = 8;
>>              }
>> @@ -8113,7 +8118,7 @@ static target_ulong disas_insn(DisasContext *s,
>> CPUState *cpu)
>>      case 0x1c3: /* MOVNTI reg, mem */
>>          if (!(s->cpuid_features & CPUID_SSE2))
>>              goto illegal_op;
>> -        ot = mo_64_32(dflag);
>> +        ot = mo_64_32(s->dflag);
>>          modrm = x86_ldub_code(env, s);
>>          mod = (modrm >> 6) & 3;
>>          if (mod == 3)
>> @@ -8127,7 +8132,7 @@ static target_ulong disas_insn(DisasContext *s,
>> CPUState *cpu)
>>          switch (modrm) {
>>          CASE_MODRM_MEM_OP(0): /* fxsave */
>>              if (!(s->cpuid_features & CPUID_FXSR)
>> -                || (prefixes & PREFIX_LOCK)) {
>> +                || (s->prefix & PREFIX_LOCK)) {
>>                  goto illegal_op;
>>              }
>>              if ((s->flags & HF_EM_MASK) || (s->flags & HF_TS_MASK)) {
>> @@ -8140,7 +8145,7 @@ static target_ulong disas_insn(DisasContext *s,
>> CPUState *cpu)
>>
>>          CASE_MODRM_MEM_OP(1): /* fxrstor */
>>              if (!(s->cpuid_features & CPUID_FXSR)
>> -                || (prefixes & PREFIX_LOCK)) {
>> +                || (s->prefix & PREFIX_LOCK)) {
>>                  goto illegal_op;
>>              }
>>              if ((s->flags & HF_EM_MASK) || (s->flags & HF_TS_MASK)) {
>> @@ -8179,8 +8184,8 @@ static target_ulong disas_insn(DisasContext *s,
>> CPUState *cpu)
>>
>>          CASE_MODRM_MEM_OP(4): /* xsave */
>>              if ((s->cpuid_ext_features & CPUID_EXT_XSAVE) == 0
>> -                || (prefixes & (PREFIX_LOCK | PREFIX_DATA
>> -                                | PREFIX_REPZ | PREFIX_REPNZ))) {
>> +                || (s->prefix & (PREFIX_LOCK | PREFIX_DATA
>> +                                   | PREFIX_REPZ | PREFIX_REPNZ))) {
>>                  goto illegal_op;
>>              }
>>              gen_lea_modrm(env, s, modrm);
>> @@ -8191,8 +8196,8 @@ static target_ulong disas_insn(DisasContext *s,
>> CPUState *cpu)
>>
>>          CASE_MODRM_MEM_OP(5): /* xrstor */
>>              if ((s->cpuid_ext_features & CPUID_EXT_XSAVE) == 0
>> -                || (prefixes & (PREFIX_LOCK | PREFIX_DATA
>> -                                | PREFIX_REPZ | PREFIX_REPNZ))) {
>> +                || (s->prefix & (PREFIX_LOCK | PREFIX_DATA
>> +                                   | PREFIX_REPZ | PREFIX_REPNZ))) {
>>                  goto illegal_op;
>>              }
>>              gen_lea_modrm(env, s, modrm);
>> @@ -8207,10 +8212,10 @@ static target_ulong disas_insn(DisasContext *s,
>> CPUState *cpu)
>>              break;
>>
>>          CASE_MODRM_MEM_OP(6): /* xsaveopt / clwb */
>> -            if (prefixes & PREFIX_LOCK) {
>> +            if (s->prefix & PREFIX_LOCK) {
>>                  goto illegal_op;
>>              }
>> -            if (prefixes & PREFIX_DATA) {
>> +            if (s->prefix & PREFIX_DATA) {
>>                  /* clwb */
>>                  if (!(s->cpuid_7_0_ebx_features & CPUID_7_0_EBX_CLWB)) {
>>                      goto illegal_op;
>> @@ -8220,7 +8225,7 @@ static target_ulong disas_insn(DisasContext *s,
>> CPUState *cpu)
>>                  /* xsaveopt */
>>                  if ((s->cpuid_ext_features & CPUID_EXT_XSAVE) == 0
>>                      || (s->cpuid_xsave_features & CPUID_XSAVE_XSAVEOPT)
>> == 0
>> -                    || (prefixes & (PREFIX_REPZ | PREFIX_REPNZ))) {
>> +                    || (s->prefix & (PREFIX_REPZ | PREFIX_REPNZ))) {
>>                      goto illegal_op;
>>                  }
>>                  gen_lea_modrm(env, s, modrm);
>> @@ -8231,10 +8236,10 @@ static target_ulong disas_insn(DisasContext *s,
>> CPUState *cpu)
>>              break;
>>
>>          CASE_MODRM_MEM_OP(7): /* clflush / clflushopt */
>> -            if (prefixes & PREFIX_LOCK) {
>> +            if (s->prefix & PREFIX_LOCK) {
>>                  goto illegal_op;
>>              }
>> -            if (prefixes & PREFIX_DATA) {
>> +            if (s->prefix & PREFIX_DATA) {
>>                  /* clflushopt */
>>                  if (!(s->cpuid_7_0_ebx_features &
>> CPUID_7_0_EBX_CLFLUSHOPT)) {
>>                      goto illegal_op;
>> @@ -8254,8 +8259,8 @@ static target_ulong disas_insn(DisasContext *s,
>> CPUState *cpu)
>>          case 0xd0 ... 0xd7: /* wrfsbase (f3 0f ae /2) */
>>          case 0xd8 ... 0xdf: /* wrgsbase (f3 0f ae /3) */
>>              if (CODE64(s)
>> -                && (prefixes & PREFIX_REPZ)
>> -                && !(prefixes & PREFIX_LOCK)
>> +                && (s->prefix & PREFIX_REPZ)
>> +                && !(s->prefix & PREFIX_LOCK)
>>                  && (s->cpuid_7_0_ebx_features & CPUID_7_0_EBX_FSGSBASE))
>> {
>>                  TCGv base, treg, src, dst;
>>
>> @@ -8284,10 +8289,10 @@ static target_ulong disas_insn(DisasContext *s,
>> CPUState *cpu)
>>              goto unknown_op;
>>
>>          case 0xf8: /* sfence / pcommit */
>> -            if (prefixes & PREFIX_DATA) {
>> +            if (s->prefix & PREFIX_DATA) {
>>                  /* pcommit */
>>                  if (!(s->cpuid_7_0_ebx_features & CPUID_7_0_EBX_PCOMMIT)
>> -                    || (prefixes & PREFIX_LOCK)) {
>> +                    || (s->prefix & PREFIX_LOCK)) {
>>                      goto illegal_op;
>>                  }
>>                  break;
>> @@ -8295,21 +8300,21 @@ static target_ulong disas_insn(DisasContext *s,
>> CPUState *cpu)
>>              /* fallthru */
>>          case 0xf9 ... 0xff: /* sfence */
>>              if (!(s->cpuid_features & CPUID_SSE)
>> -                || (prefixes & PREFIX_LOCK)) {
>> +                || (s->prefix & PREFIX_LOCK)) {
>>                  goto illegal_op;
>>              }
>>              tcg_gen_mb(TCG_MO_ST_ST | TCG_BAR_SC);
>>              break;
>>          case 0xe8 ... 0xef: /* lfence */
>>              if (!(s->cpuid_features & CPUID_SSE)
>> -                || (prefixes & PREFIX_LOCK)) {
>> +                || (s->prefix & PREFIX_LOCK)) {
>>                  goto illegal_op;
>>              }
>>              tcg_gen_mb(TCG_MO_LD_LD | TCG_BAR_SC);
>>              break;
>>          case 0xf0 ... 0xf7: /* mfence */
>>              if (!(s->cpuid_features & CPUID_SSE2)
>> -                || (prefixes & PREFIX_LOCK)) {
>> +                || (s->prefix & PREFIX_LOCK)) {
>>                  goto illegal_op;
>>              }
>>              tcg_gen_mb(TCG_MO_ALL | TCG_BAR_SC);
>> @@ -8337,8 +8342,8 @@ static target_ulong disas_insn(DisasContext *s,
>> CPUState *cpu)
>>          gen_eob(s);
>>          break;
>>      case 0x1b8: /* SSE4.2 popcnt */
>> -        if ((prefixes & (PREFIX_REPZ | PREFIX_LOCK | PREFIX_REPNZ)) !=
>> -             PREFIX_REPZ)
>> +        if ((s->prefix & (PREFIX_REPZ | PREFIX_LOCK | PREFIX_REPNZ)) !=
>> +            PREFIX_REPZ)
>>              goto illegal_op;
>>          if (!(s->cpuid_ext_features & CPUID_EXT_POPCNT))
>>              goto illegal_op;
>> @@ -8349,7 +8354,7 @@ static target_ulong disas_insn(DisasContext *s,
>> CPUState *cpu)
>>          if (s->prefix & PREFIX_DATA) {
>>              ot = MO_16;
>>          } else {
>> -            ot = mo_64_32(dflag);
>> +            ot = mo_64_32(s->dflag);
>>          }
>>
>>          gen_ldst_modrm(env, s, modrm, ot, OR_TMP0, 0);
>> --
>> 2.20.1
>>
>>
>>

Re: [Qemu-devel] [RFC PATCH v1 03/22] target/i386: Use prefix, aflag and dflag from DisasContext

[Jan Bobek]

[-- Attachment #1.1: Type: text/plain, Size: 2329 bytes --]

Hi Aleksandar,

thanks a lot for your feedback! I have to admit that I paid little
attention to this particular patch, because it was authored by
Richard; I simply included it verbatim. I agree that it would be
clearer if it were split into three patches, and the description could
be made less confusing.  I will make sure to include your suggestions
in v2.

Thanks a lot for looking over my code!

Best,
-Jan

On 7/31/19 4:04 PM, Aleksandar Markovic wrote:
> 
> 
> On Wed, Jul 31, 2019 at 9:41 PM Aleksandar Markovic <aleksandar.m.mail@gmail.com <mailto:aleksandar.m.mail@gmail.com>> wrote:
> 
> 
> 
>     On Wed, Jul 31, 2019 at 7:59 PM Jan Bobek <jan.bobek@gmail.com <mailto:jan.bobek@gmail.com>> wrote:
> 
>         From: Richard Henderson <rth@twiddle.net <mailto:rth@twiddle.net>>
> 
>         The variables are already there, we just have to hide the ones
>         in disas_insn so that we are forced to use them.
> 
>         Signed-off-by: Richard Henderson <rth@twiddle.net <mailto:rth@twiddle.net>>
>         ---
>          target/i386/translate.c | 299 ++++++++++++++++++++--------------------
>          1 file changed, 152 insertions(+), 147 deletions(-)
> 
> 
>     Hi, Jan.
> 
>     The series overall looks great, and hopefully you will refine rough
>     around the edges parts soon. Thanks for this valuable contribution!
> 
>     About this patch, I noticed that it mentions "aflag" in the title, but
>     the patch actually does not change any code related to the variable
>     "aflag" in the described sense - it looks to me it just reduces the
>     scope of the local variable "aflag", which is certainly different than
>     "use aflag from DisasContext" as it could be implied from the
>     patch title. You definitely should not confuse the readers with
>     such inaccuracies.
> 
> 
> Also, Jan, you need to correct the code alignment (indentation), if
> you enclose a part of a function to form a new code block. I guess
> you just left these cosmetic things for v2 or later.
> 
> Sincerely,
> Aleksandar
>  
> 
> 
>     Actually, I think the patch would look much better if split into three
>     patches (easier for reviewing, and also clearer for future developers),
>     wouldn't it?
> 
>     Yours,
>     Aleksandar
> 


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[Qemu-devel] [RFC PATCH v1 04/22] target/i386: Simplify gen_exception arguments

[Jan Bobek]

From: Richard Henderson <rth@twiddle.net>

We can compute cur_eip from values present within DisasContext.

Signed-off-by: Richard Henderson <rth@twiddle.net>
---
 target/i386/translate.c | 89 ++++++++++++++++++++---------------------
 1 file changed, 44 insertions(+), 45 deletions(-)

diff --git a/target/i386/translate.c b/target/i386/translate.c
index 692261f73f..9e22eca2dc 100644
--- a/target/i386/translate.c
+++ b/target/i386/translate.c
@@ -1272,10 +1272,10 @@ static void gen_helper_fp_arith_STN_ST0(int op, int opreg)
     }
 }
 
-static void gen_exception(DisasContext *s, int trapno, target_ulong cur_eip)
+static void gen_exception(DisasContext *s, int trapno)
 {
     gen_update_cc_op(s);
-    gen_jmp_im(s, cur_eip);
+    gen_jmp_im(s, s->pc_start - s->cs_base);
     gen_helper_raise_exception(cpu_env, tcg_const_i32(trapno));
     s->base.is_jmp = DISAS_NORETURN;
 }
@@ -1284,7 +1284,7 @@ static void gen_exception(DisasContext *s, int trapno, target_ulong cur_eip)
    the instruction is known, but it isn't allowed in the current cpu mode.  */
 static void gen_illegal_opcode(DisasContext *s)
 {
-    gen_exception(s, EXCP06_ILLOP, s->pc_start - s->cs_base);
+    gen_exception(s, EXCP06_ILLOP);
 }
 
 /* if d == OR_TMP0, it means memory operand (address in A0) */
@@ -3040,8 +3040,7 @@ static const struct SSEOpHelper_eppi sse_op_table7[256] = {
     [0xdf] = AESNI_OP(aeskeygenassist),
 };
 
-static void gen_sse(CPUX86State *env, DisasContext *s, int b,
-                    target_ulong pc_start)
+static void gen_sse(CPUX86State *env, DisasContext *s, int b)
 {
     int b1, op1_offset, op2_offset, is_xmm, val;
     int modrm, mod, rm, reg;
@@ -3076,7 +3075,7 @@ static void gen_sse(CPUX86State *env, DisasContext *s, int b,
     }
     /* simple MMX/SSE operation */
     if (s->flags & HF_TS_MASK) {
-        gen_exception(s, EXCP07_PREX, pc_start - s->cs_base);
+        gen_exception(s, EXCP07_PREX);
         return;
     }
     if (s->flags & HF_EM_MASK) {
@@ -4515,7 +4514,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
     s->vex_l = 0;
     s->vex_v = 0;
     if (sigsetjmp(s->jmpbuf, 0) != 0) {
-        gen_exception(s, EXCP0D_GPF, pc_start - s->cs_base);
+        gen_exception(s, EXCP0D_GPF);
         return s->pc;
     }
 
@@ -5854,7 +5853,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
         if (s->flags & (HF_EM_MASK | HF_TS_MASK)) {
             /* if CR0.EM or CR0.TS are set, generate an FPU exception */
             /* XXX: what to do if illegal op ? */
-            gen_exception(s, EXCP07_PREX, pc_start - s->cs_base);
+            gen_exception(s, EXCP07_PREX);
             break;
         }
         modrm = x86_ldub_code(env, s);
@@ -6572,7 +6571,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
             set_cc_op(s, CC_OP_EFLAGS);
         } else if (s->vm86) {
             if (s->iopl != 3) {
-                gen_exception(s, EXCP0D_GPF, pc_start - s->cs_base);
+                gen_exception(s, EXCP0D_GPF);
             } else {
                 gen_helper_iret_real(cpu_env, tcg_const_i32(s->dflag - 1));
                 set_cc_op(s, CC_OP_EFLAGS);
@@ -6694,7 +6693,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
     case 0x9c: /* pushf */
         gen_svm_check_intercept(s, pc_start, SVM_EXIT_PUSHF);
         if (s->vm86 && s->iopl != 3) {
-            gen_exception(s, EXCP0D_GPF, pc_start - s->cs_base);
+            gen_exception(s, EXCP0D_GPF);
         } else {
             gen_update_cc_op(s);
             gen_helper_read_eflags(s->T0, cpu_env);
@@ -6704,7 +6703,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
     case 0x9d: /* popf */
         gen_svm_check_intercept(s, pc_start, SVM_EXIT_POPF);
         if (s->vm86 && s->iopl != 3) {
-            gen_exception(s, EXCP0D_GPF, pc_start - s->cs_base);
+            gen_exception(s, EXCP0D_GPF);
         } else {
             ot = gen_pop_T0(s);
             if (s->cpl == 0) {
@@ -7021,7 +7020,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
             goto illegal_op;
         val = x86_ldub_code(env, s);
         if (val == 0) {
-            gen_exception(s, EXCP00_DIVZ, pc_start - s->cs_base);
+            gen_exception(s, EXCP00_DIVZ);
         } else {
             gen_helper_aam(cpu_env, tcg_const_i32(val));
             set_cc_op(s, CC_OP_LOGICB);
@@ -7055,7 +7054,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
     case 0x9b: /* fwait */
         if ((s->flags & (HF_MP_MASK | HF_TS_MASK)) ==
             (HF_MP_MASK | HF_TS_MASK)) {
-            gen_exception(s, EXCP07_PREX, pc_start - s->cs_base);
+            gen_exception(s, EXCP07_PREX);
         } else {
             gen_helper_fwait(cpu_env);
         }
@@ -7066,7 +7065,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
     case 0xcd: /* int N */
         val = x86_ldub_code(env, s);
         if (s->vm86 && s->iopl != 3) {
-            gen_exception(s, EXCP0D_GPF, pc_start - s->cs_base);
+            gen_exception(s, EXCP0D_GPF);
         } else {
             gen_interrupt(s, val, pc_start - s->cs_base, s->pc - s->cs_base);
         }
@@ -7089,13 +7088,13 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
             if (s->cpl <= s->iopl) {
                 gen_helper_cli(cpu_env);
             } else {
-                gen_exception(s, EXCP0D_GPF, pc_start - s->cs_base);
+                gen_exception(s, EXCP0D_GPF);
             }
         } else {
             if (s->iopl == 3) {
                 gen_helper_cli(cpu_env);
             } else {
-                gen_exception(s, EXCP0D_GPF, pc_start - s->cs_base);
+                gen_exception(s, EXCP0D_GPF);
             }
         }
         break;
@@ -7106,7 +7105,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
             gen_jmp_im(s, s->pc - s->cs_base);
             gen_eob_inhibit_irq(s, true);
         } else {
-            gen_exception(s, EXCP0D_GPF, pc_start - s->cs_base);
+            gen_exception(s, EXCP0D_GPF);
         }
         break;
     case 0x62: /* bound */
@@ -7198,7 +7197,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
     case 0x130: /* wrmsr */
     case 0x132: /* rdmsr */
         if (s->cpl != 0) {
-            gen_exception(s, EXCP0D_GPF, pc_start - s->cs_base);
+            gen_exception(s, EXCP0D_GPF);
         } else {
             gen_update_cc_op(s);
             gen_jmp_im(s, pc_start - s->cs_base);
@@ -7231,7 +7230,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
         if (CODE64(s) && env->cpuid_vendor1 != CPUID_VENDOR_INTEL_1)
             goto illegal_op;
         if (!s->pe) {
-            gen_exception(s, EXCP0D_GPF, pc_start - s->cs_base);
+            gen_exception(s, EXCP0D_GPF);
         } else {
             gen_helper_sysenter(cpu_env);
             gen_eob(s);
@@ -7242,7 +7241,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
         if (CODE64(s) && env->cpuid_vendor1 != CPUID_VENDOR_INTEL_1)
             goto illegal_op;
         if (!s->pe) {
-            gen_exception(s, EXCP0D_GPF, pc_start - s->cs_base);
+            gen_exception(s, EXCP0D_GPF);
         } else {
             gen_helper_sysexit(cpu_env, tcg_const_i32(s->dflag - 1));
             gen_eob(s);
@@ -7261,7 +7260,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
         break;
     case 0x107: /* sysret */
         if (!s->pe) {
-            gen_exception(s, EXCP0D_GPF, pc_start - s->cs_base);
+            gen_exception(s, EXCP0D_GPF);
         } else {
             gen_helper_sysret(cpu_env, tcg_const_i32(s->dflag - 1));
             /* condition codes are modified only in long mode */
@@ -7283,7 +7282,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
         break;
     case 0xf4: /* hlt */
         if (s->cpl != 0) {
-            gen_exception(s, EXCP0D_GPF, pc_start - s->cs_base);
+            gen_exception(s, EXCP0D_GPF);
         } else {
             gen_update_cc_op(s);
             gen_jmp_im(s, pc_start - s->cs_base);
@@ -7309,7 +7308,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
             if (!s->pe || s->vm86)
                 goto illegal_op;
             if (s->cpl != 0) {
-                gen_exception(s, EXCP0D_GPF, pc_start - s->cs_base);
+                gen_exception(s, EXCP0D_GPF);
             } else {
                 gen_svm_check_intercept(s, pc_start, SVM_EXIT_LDTR_WRITE);
                 gen_ldst_modrm(env, s, modrm, MO_16, OR_TMP0, 0);
@@ -7330,7 +7329,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
             if (!s->pe || s->vm86)
                 goto illegal_op;
             if (s->cpl != 0) {
-                gen_exception(s, EXCP0D_GPF, pc_start - s->cs_base);
+                gen_exception(s, EXCP0D_GPF);
             } else {
                 gen_svm_check_intercept(s, pc_start, SVM_EXIT_TR_WRITE);
                 gen_ldst_modrm(env, s, modrm, MO_16, OR_TMP0, 0);
@@ -7446,7 +7445,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
                 goto illegal_op;
             }
             if (s->cpl != 0) {
-                gen_exception(s, EXCP0D_GPF, pc_start - s->cs_base);
+                gen_exception(s, EXCP0D_GPF);
                 break;
             }
             tcg_gen_concat_tl_i64(s->tmp1_i64, cpu_regs[R_EAX],
@@ -7463,7 +7462,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
                 goto illegal_op;
             }
             if (s->cpl != 0) {
-                gen_exception(s, EXCP0D_GPF, pc_start - s->cs_base);
+                gen_exception(s, EXCP0D_GPF);
                 break;
             }
             gen_update_cc_op(s);
@@ -7488,7 +7487,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
                 goto illegal_op;
             }
             if (s->cpl != 0) {
-                gen_exception(s, EXCP0D_GPF, pc_start - s->cs_base);
+                gen_exception(s, EXCP0D_GPF);
                 break;
             }
             gen_update_cc_op(s);
@@ -7501,7 +7500,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
                 goto illegal_op;
             }
             if (s->cpl != 0) {
-                gen_exception(s, EXCP0D_GPF, pc_start - s->cs_base);
+                gen_exception(s, EXCP0D_GPF);
                 break;
             }
             gen_update_cc_op(s);
@@ -7516,7 +7515,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
                 goto illegal_op;
             }
             if (s->cpl != 0) {
-                gen_exception(s, EXCP0D_GPF, pc_start - s->cs_base);
+                gen_exception(s, EXCP0D_GPF);
                 break;
             }
             gen_update_cc_op(s);
@@ -7530,7 +7529,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
                 goto illegal_op;
             }
             if (s->cpl != 0) {
-                gen_exception(s, EXCP0D_GPF, pc_start - s->cs_base);
+                gen_exception(s, EXCP0D_GPF);
                 break;
             }
             gen_update_cc_op(s);
@@ -7554,7 +7553,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
                 goto illegal_op;
             }
             if (s->cpl != 0) {
-                gen_exception(s, EXCP0D_GPF, pc_start - s->cs_base);
+                gen_exception(s, EXCP0D_GPF);
                 break;
             }
             gen_update_cc_op(s);
@@ -7564,7 +7563,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
 
         CASE_MODRM_MEM_OP(2): /* lgdt */
             if (s->cpl != 0) {
-                gen_exception(s, EXCP0D_GPF, pc_start - s->cs_base);
+                gen_exception(s, EXCP0D_GPF);
                 break;
             }
             gen_svm_check_intercept(s, pc_start, SVM_EXIT_GDTR_WRITE);
@@ -7581,7 +7580,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
 
         CASE_MODRM_MEM_OP(3): /* lidt */
             if (s->cpl != 0) {
-                gen_exception(s, EXCP0D_GPF, pc_start - s->cs_base);
+                gen_exception(s, EXCP0D_GPF);
                 break;
             }
             gen_svm_check_intercept(s, pc_start, SVM_EXIT_IDTR_WRITE);
@@ -7626,7 +7625,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
             break;
         CASE_MODRM_OP(6): /* lmsw */
             if (s->cpl != 0) {
-                gen_exception(s, EXCP0D_GPF, pc_start - s->cs_base);
+                gen_exception(s, EXCP0D_GPF);
                 break;
             }
             gen_svm_check_intercept(s, pc_start, SVM_EXIT_WRITE_CR0);
@@ -7638,7 +7637,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
 
         CASE_MODRM_MEM_OP(7): /* invlpg */
             if (s->cpl != 0) {
-                gen_exception(s, EXCP0D_GPF, pc_start - s->cs_base);
+                gen_exception(s, EXCP0D_GPF);
                 break;
             }
             gen_update_cc_op(s);
@@ -7653,7 +7652,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
 #ifdef TARGET_X86_64
             if (CODE64(s)) {
                 if (s->cpl != 0) {
-                    gen_exception(s, EXCP0D_GPF, pc_start - s->cs_base);
+                    gen_exception(s, EXCP0D_GPF);
                 } else {
                     tcg_gen_mov_tl(s->T0, cpu_seg_base[R_GS]);
                     tcg_gen_ld_tl(cpu_seg_base[R_GS], cpu_env,
@@ -7690,7 +7689,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
     case 0x108: /* invd */
     case 0x109: /* wbinvd */
         if (s->cpl != 0) {
-            gen_exception(s, EXCP0D_GPF, pc_start - s->cs_base);
+            gen_exception(s, EXCP0D_GPF);
         } else {
             gen_svm_check_intercept(s, pc_start, (b & 2) ? SVM_EXIT_INVD : SVM_EXIT_WBINVD);
             /* nothing to do */
@@ -8014,7 +8013,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
     case 0x120: /* mov reg, crN */
     case 0x122: /* mov crN, reg */
         if (s->cpl != 0) {
-            gen_exception(s, EXCP0D_GPF, pc_start - s->cs_base);
+            gen_exception(s, EXCP0D_GPF);
         } else {
             modrm = x86_ldub_code(env, s);
             /* Ignore the mod bits (assume (modrm&0xc0)==0xc0).
@@ -8071,7 +8070,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
     case 0x121: /* mov reg, drN */
     case 0x123: /* mov drN, reg */
         if (s->cpl != 0) {
-            gen_exception(s, EXCP0D_GPF, pc_start - s->cs_base);
+            gen_exception(s, EXCP0D_GPF);
         } else {
             modrm = x86_ldub_code(env, s);
             /* Ignore the mod bits (assume (modrm&0xc0)==0xc0).
@@ -8105,7 +8104,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
         break;
     case 0x106: /* clts */
         if (s->cpl != 0) {
-            gen_exception(s, EXCP0D_GPF, pc_start - s->cs_base);
+            gen_exception(s, EXCP0D_GPF);
         } else {
             gen_svm_check_intercept(s, pc_start, SVM_EXIT_WRITE_CR0);
             gen_helper_clts(cpu_env);
@@ -8136,7 +8135,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
                 goto illegal_op;
             }
             if ((s->flags & HF_EM_MASK) || (s->flags & HF_TS_MASK)) {
-                gen_exception(s, EXCP07_PREX, pc_start - s->cs_base);
+                gen_exception(s, EXCP07_PREX);
                 break;
             }
             gen_lea_modrm(env, s, modrm);
@@ -8149,7 +8148,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
                 goto illegal_op;
             }
             if ((s->flags & HF_EM_MASK) || (s->flags & HF_TS_MASK)) {
-                gen_exception(s, EXCP07_PREX, pc_start - s->cs_base);
+                gen_exception(s, EXCP07_PREX);
                 break;
             }
             gen_lea_modrm(env, s, modrm);
@@ -8161,7 +8160,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
                 goto illegal_op;
             }
             if (s->flags & HF_TS_MASK) {
-                gen_exception(s, EXCP07_PREX, pc_start - s->cs_base);
+                gen_exception(s, EXCP07_PREX);
                 break;
             }
             gen_lea_modrm(env, s, modrm);
@@ -8174,7 +8173,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
                 goto illegal_op;
             }
             if (s->flags & HF_TS_MASK) {
-                gen_exception(s, EXCP07_PREX, pc_start - s->cs_base);
+                gen_exception(s, EXCP07_PREX);
                 break;
             }
             gen_lea_modrm(env, s, modrm);
@@ -8377,7 +8376,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu)
     case 0x1c2:
     case 0x1c4 ... 0x1c6:
     case 0x1d0 ... 0x1fe:
-        gen_sse(env, s, b, pc_start);
+        gen_sse(env, s, b);
         break;
     default:
         goto unknown_op;
-- 
2.20.1

[Qemu-devel] [RFC PATCH v1 05/22] target/i386: introduce gen_ld_modrm_* helpers

[Jan Bobek]

These help with decoding/loading ModR/M vector operands; the operand's
register offset is returned, which is suitable for use with gvec
infrastructure.

Signed-off-by: Jan Bobek <jan.bobek@gmail.com>
---
 target/i386/translate.c | 47 +++++++++++++++++++++++++++++++++++++++++
 1 file changed, 47 insertions(+)

diff --git a/target/i386/translate.c b/target/i386/translate.c
index 9e22eca2dc..7548677e1f 100644
--- a/target/i386/translate.c
+++ b/target/i386/translate.c
@@ -3040,6 +3040,53 @@ static const struct SSEOpHelper_eppi sse_op_table7[256] = {
     [0xdf] = AESNI_OP(aeskeygenassist),
 };
 
+static inline void gen_ld_modrm_PqQq(CPUX86State *env, DisasContext *s, int modrm,
+                                     uint32_t* dofs, uint32_t* aofs)
+{
+    const int mod = (modrm >> 6) & 3;
+    const int reg = (modrm >> 3) & 7; /* no REX_R */
+    *dofs = offsetof(CPUX86State, fpregs[reg].mmx);
+
+    if(mod == 3) {
+        const int rm = modrm & 7; /* no REX_B */
+
+        *aofs = offsetof(CPUX86State, fpregs[rm].mmx);
+    } else {
+        *aofs = offsetof(CPUX86State, mmx_t0);
+
+        gen_lea_modrm(env, s, modrm);
+        gen_ldq_env_A0(s, *aofs);
+    }
+}
+
+static inline void gen_ld_modrm_VxWx(CPUX86State *env, DisasContext *s, int modrm,
+                                     uint32_t* dofs, uint32_t* aofs)
+{
+    const int mod = (modrm >> 6) & 3;
+    const int reg = ((modrm >> 3) & 7) | REX_R(s);
+    *dofs = offsetof(CPUX86State, xmm_regs[reg]);
+
+    if(mod == 3) {
+        const int rm = (modrm & 7) | REX_B(s);
+
+        *aofs = offsetof(CPUX86State, xmm_regs[rm]);
+    } else {
+        *aofs = offsetof(CPUX86State, xmm_t0);
+
+        gen_lea_modrm(env, s, modrm);
+        gen_ldo_env_A0(s, *aofs); /* FIXME this needs to load 32 bytes for YMM */
+    }
+}
+
+static inline void gen_ld_modrm_VxHxWx(CPUX86State *env, DisasContext *s, int modrm,
+                                       uint32_t* dofs, uint32_t* aofs, uint32_t* bofs)
+{
+    assert(s->prefix & PREFIX_VEX);
+
+    gen_ld_modrm_VxWx(env, s, modrm, dofs, bofs);
+    *aofs = offsetof(CPUX86State, xmm_regs[s->vex_v]);
+}
+
 static void gen_sse(CPUX86State *env, DisasContext *s, int b)
 {
     int b1, op1_offset, op2_offset, is_xmm, val;
-- 
2.20.1

Re: [Qemu-devel] [RFC PATCH v1 05/22] target/i386: introduce gen_ld_modrm_* helpers

[Richard Henderson]

On 7/31/19 10:56 AM, Jan Bobek wrote:
> These help with decoding/loading ModR/M vector operands; the operand's
> register offset is returned, which is suitable for use with gvec
> infrastructure.
> 
> Signed-off-by: Jan Bobek <jan.bobek@gmail.com>
> ---
>  target/i386/translate.c | 47 +++++++++++++++++++++++++++++++++++++++++
>  1 file changed, 47 insertions(+)
> 
> diff --git a/target/i386/translate.c b/target/i386/translate.c
> index 9e22eca2dc..7548677e1f 100644
> --- a/target/i386/translate.c
> +++ b/target/i386/translate.c
> @@ -3040,6 +3040,53 @@ static const struct SSEOpHelper_eppi sse_op_table7[256] = {
>      [0xdf] = AESNI_OP(aeskeygenassist),
>  };
>  
> +static inline void gen_ld_modrm_PqQq(CPUX86State *env, DisasContext *s, int modrm,
> +                                     uint32_t* dofs, uint32_t* aofs)

s/uint32_t* /uint32_t */

Drop the inlines; let the compiler choose.


> +{
> +    const int mod = (modrm >> 6) & 3;
> +    const int reg = (modrm >> 3) & 7; /* no REX_R */
> +    *dofs = offsetof(CPUX86State, fpregs[reg].mmx);
> +
> +    if(mod == 3) {

s/if(/if (/

Both of these errors should be caught by ./scripts/checkpatch.pl.

> +        gen_ldo_env_A0(s, *aofs); /* FIXME this needs to load 32 bytes for YMM 

Better as "TODO", since this isn't broken and in need of fixing, since we do
not yet support AVX.

Otherwise,
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>


r~

Re: [Qemu-devel] [RFC PATCH v1 05/22] target/i386: introduce gen_ld_modrm_* helpers

[Jan Bobek]

[-- Attachment #1.1: Type: text/plain, Size: 1874 bytes --]

On 7/31/19 3:08 PM, Richard Henderson wrote:
> On 7/31/19 10:56 AM, Jan Bobek wrote:
>> These help with decoding/loading ModR/M vector operands; the operand's
>> register offset is returned, which is suitable for use with gvec
>> infrastructure.
>>
>> Signed-off-by: Jan Bobek <jan.bobek@gmail.com>
>> ---
>>  target/i386/translate.c | 47 +++++++++++++++++++++++++++++++++++++++++
>>  1 file changed, 47 insertions(+)
>>
>> diff --git a/target/i386/translate.c b/target/i386/translate.c
>> index 9e22eca2dc..7548677e1f 100644
>> --- a/target/i386/translate.c
>> +++ b/target/i386/translate.c
>> @@ -3040,6 +3040,53 @@ static const struct SSEOpHelper_eppi sse_op_table7[256] = {
>>      [0xdf] = AESNI_OP(aeskeygenassist),
>>  };
>>  
>> +static inline void gen_ld_modrm_PqQq(CPUX86State *env, DisasContext *s, int modrm,
>> +                                     uint32_t* dofs, uint32_t* aofs)
> 
> s/uint32_t* /uint32_t */
> 
> Drop the inlines; let the compiler choose.
> 
> 
>> +{
>> +    const int mod = (modrm >> 6) & 3;
>> +    const int reg = (modrm >> 3) & 7; /* no REX_R */
>> +    *dofs = offsetof(CPUX86State, fpregs[reg].mmx);
>> +
>> +    if(mod == 3) {
> 
> s/if(/if (/
> 
> Both of these errors should be caught by ./scripts/checkpatch.pl.

I have the script set up; I disabled it temporarily (or so I thought)
some time ago when it was preventing me from git stash'ing some
experimental hacks, and never got around to enabling it again.

Anyway, I'll make sure not to forget to run it prior to submission
next time.

>> +        gen_ldo_env_A0(s, *aofs); /* FIXME this needs to load 32 bytes for YMM 
> 
> Better as "TODO", since this isn't broken and in need of fixing, since we do
> not yet support AVX.
> 
> Otherwise,
> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
> 
> 
> r~
> 


[-- Attachment #2: OpenPGP digital signature --]
[-- Type: application/pgp-signature, Size: 833 bytes --]

[Qemu-devel] [RFC PATCH v1 06/22] target/i386: introduce gen_gvec_ld_modrm_* helpers

[Jan Bobek]

gen_gvec_ld_modrm_* helpers tie together a gen_ld_modrm_* helper and a
particular gvec operation, effectively handling a single instruction.

Signed-off-by: Jan Bobek <jan.bobek@gmail.com>
---
 target/i386/translate.c | 77 +++++++++++++++++++++++++++++++++++++++++
 1 file changed, 77 insertions(+)

diff --git a/target/i386/translate.c b/target/i386/translate.c
index 7548677e1f..d576b3345c 100644
--- a/target/i386/translate.c
+++ b/target/i386/translate.c
@@ -3087,6 +3087,83 @@ static inline void gen_ld_modrm_VxHxWx(CPUX86State *env, DisasContext *s, int mo
     *aofs = offsetof(CPUX86State, xmm_regs[s->vex_v]);
 }
 
+typedef void (*gen_ld_modrm_2_fp_t)(CPUX86State *env, DisasContext *s, int modrm,
+                                    uint32_t *dofs, uint32_t *aofs);
+typedef void (*gen_ld_modrm_3_fp_t)(CPUX86State *env, DisasContext *s, int modrm,
+                                    uint32_t *dofs, uint32_t *aofs, uint32_t *bofs);
+typedef void (*gen_gvec_2_fp_t)(unsigned vece, uint32_t dofs, uint32_t aofs,
+                                uint32_t bofs, uint32_t oprsz, uint32_t maxsz);
+
+static inline void gen_gvec_ld_modrm_2(CPUX86State *env, DisasContext *s,
+                                       int modrm, unsigned vece,
+                                       uint32_t oprsz, uint32_t maxsz,
+                                       gen_ld_modrm_2_fp_t gen_ld_modrm_2_fp,
+                                       gen_gvec_2_fp_t gen_gvec_2_fp,
+                                       int opctl)
+{
+    uint32_t ofss[2];
+
+    const int opd = ((opctl >> 6) & 7) - 1;
+    const int opa = ((opctl >> 3) & 7) - 1;
+    const int opb = ((opctl >> 0) & 7) - 1;
+
+    assert(0 <= opd && opd < 2);
+    assert(0 <= opa && opa < 2);
+    assert(0 <= opb && opb < 2);
+
+    (*gen_ld_modrm_2_fp)(env, s, modrm, &ofss[0], &ofss[1]);
+    (*gen_gvec_2_fp)(vece, ofss[opd], ofss[opa], ofss[opb], oprsz, maxsz);
+}
+
+static inline void gen_gvec_ld_modrm_3(CPUX86State *env, DisasContext *s,
+                                       int modrm, unsigned vece,
+                                       uint32_t oprsz, uint32_t maxsz,
+                                       gen_ld_modrm_3_fp_t gen_ld_modrm_3_fp,
+                                       gen_gvec_2_fp_t gen_gvec_2_fp,
+                                       int opctl)
+{
+    uint32_t ofss[3];
+
+    const int opd = ((opctl >> 6) & 7) - 1;
+    const int opa = ((opctl >> 3) & 7) - 1;
+    const int opb = ((opctl >> 0) & 7) - 1;
+
+    assert(0 <= opd && opd < 3);
+    assert(0 <= opa && opa < 3);
+    assert(0 <= opb && opb < 3);
+
+    (*gen_ld_modrm_3_fp)(env, s, modrm, &ofss[0], &ofss[1], &ofss[2]);
+    (*gen_gvec_2_fp)(vece, ofss[opd], ofss[opa], ofss[opb], oprsz, maxsz);
+}
+
+#define gen_gvec_ld_modrm_mm(env, s, modrm, vece,                       \
+                             gen_gvec_2_fp, opctl)                      \
+    gen_gvec_ld_modrm_2((env), (s), (modrm), (vece),                    \
+                        sizeof(MMXReg), sizeof(MMXReg),                 \
+                        gen_ld_modrm_PqQq,                              \
+                        gen_gvec_2_fp, (opctl))
+
+#define gen_gvec_ld_modrm_xmm(env, s, modrm, vece,                      \
+                              gen_gvec_2_fp, opctl)                     \
+    gen_gvec_ld_modrm_2((env), (s), (modrm), (vece),                    \
+                        sizeof(XMMReg), sizeof(XMMReg),                 \
+                        gen_ld_modrm_VxWx,                              \
+                        gen_gvec_2_fp, (opctl))
+
+#define gen_gvec_ld_modrm_vxmm(env, s, modrm, vece,                     \
+                               gen_gvec_2_fp, opctl)                    \
+    gen_gvec_ld_modrm_3((env), (s), (modrm), (vece),                    \
+                        sizeof(XMMReg), sizeof(ZMMReg),                 \
+                        gen_ld_modrm_VxHxWx,                            \
+                        gen_gvec_2_fp, (opctl))
+
+#define gen_gvec_ld_modrm_vymm(env, s, modrm, vece,                     \
+                               gen_gvec_2_fp, opctl)                    \
+    gen_gvec_ld_modrm_3((env), (s), (modrm), (vece),                    \
+                        sizeof(YMMReg), sizeof(ZMMReg),                 \
+                        gen_ld_modrm_VxHxWx,                            \
+                        gen_gvec_2_fp, (opctl))
+
 static void gen_sse(CPUX86State *env, DisasContext *s, int b)
 {
     int b1, op1_offset, op2_offset, is_xmm, val;
-- 
2.20.1

Re: [Qemu-devel] [RFC PATCH v1 06/22] target/i386: introduce gen_gvec_ld_modrm_* helpers

[Richard Henderson]

On 7/31/19 10:56 AM, Jan Bobek wrote:
> +static inline void gen_gvec_ld_modrm_2(CPUX86State *env, DisasContext *s,
> +                                       int modrm, unsigned vece,
> +                                       uint32_t oprsz, uint32_t maxsz,
> +                                       gen_ld_modrm_2_fp_t gen_ld_modrm_2_fp,
> +                                       gen_gvec_2_fp_t gen_gvec_2_fp,
> +                                       int opctl)
> +{
> +    uint32_t ofss[2];
> +
> +    const int opd = ((opctl >> 6) & 7) - 1;
> +    const int opa = ((opctl >> 3) & 7) - 1;
> +    const int opb = ((opctl >> 0) & 7) - 1;
> +
> +    assert(0 <= opd && opd < 2);
> +    assert(0 <= opa && opa < 2);
> +    assert(0 <= opb && opb < 2);
> +
> +    (*gen_ld_modrm_2_fp)(env, s, modrm, &ofss[0], &ofss[1]);
> +    (*gen_gvec_2_fp)(vece, ofss[opd], ofss[opa], ofss[opb], oprsz, maxsz);
> +}
> +
> +static inline void gen_gvec_ld_modrm_3(CPUX86State *env, DisasContext *s,
> +                                       int modrm, unsigned vece,
> +                                       uint32_t oprsz, uint32_t maxsz,
> +                                       gen_ld_modrm_3_fp_t gen_ld_modrm_3_fp,
> +                                       gen_gvec_2_fp_t gen_gvec_2_fp,
> +                                       int opctl)
> +{
> +    uint32_t ofss[3];
> +
> +    const int opd = ((opctl >> 6) & 7) - 1;
> +    const int opa = ((opctl >> 3) & 7) - 1;
> +    const int opb = ((opctl >> 0) & 7) - 1;
> +
> +    assert(0 <= opd && opd < 3);
> +    assert(0 <= opa && opa < 3);
> +    assert(0 <= opb && opb < 3);
> +
> +    (*gen_ld_modrm_3_fp)(env, s, modrm, &ofss[0], &ofss[1], &ofss[2]);
> +    (*gen_gvec_2_fp)(vece, ofss[opd], ofss[opa], ofss[opb], oprsz, maxsz);
> +}
> +> +#define gen_gvec_ld_modrm_mm(env, s, modrm, vece,                       \> +
                            gen_gvec_2_fp, opctl)                      \> +
gen_gvec_ld_modrm_2((env), (s), (modrm), (vece),                    \> +
                 sizeof(MMXReg), sizeof(MMXReg),                 \> +
              gen_ld_modrm_PqQq,                              \> +
           gen_gvec_2_fp, (opctl))> +> +#define gen_gvec_ld_modrm_xmm(env, s,
modrm, vece,                      \> +
gen_gvec_2_fp, opctl)                     \> +    gen_gvec_ld_modrm_2((env),
(s), (modrm), (vece),                    \> +
sizeof(XMMReg), sizeof(XMMReg),                 \> +
gen_ld_modrm_VxWx,                              \> +
gen_gvec_2_fp, (opctl))> +> +#define gen_gvec_ld_modrm_vxmm(env, s, modrm,
vece,                     \> +                               gen_gvec_2_fp,
opctl)                    \> +    gen_gvec_ld_modrm_3((env), (s), (modrm),
(vece),                    \> +                        sizeof(XMMReg),
sizeof(ZMMReg),                 \> +
gen_ld_modrm_VxHxWx,                            \> +
gen_gvec_2_fp, (opctl))> +> +#define gen_gvec_ld_modrm_vymm(env, s, modrm,
vece,                     \> +                               gen_gvec_2_fp,
opctl)                    \> +    gen_gvec_ld_modrm_3((env), (s), (modrm),
(vece),                    \> +                        sizeof(YMMReg),
sizeof(ZMMReg),                 \> +
gen_ld_modrm_VxHxWx,                            \> +
gen_gvec_2_fp, (opctl))

I suppose there aren't so many different combinations, but did you consider
separate callbacks per operand?  If you have

typedef unsigned (*gen_offset)(CPUX86State *, DisasContext *, int);

static unsigned offset_Pq(CPUX86State *env, DisasContext *s, int modrm)
{
    int reg = (modrm >> 3) & 7; /* Ignore REX_R */
    return offsetof(CPUX86State, fpregs[reg].mmx);
}

static unsigned offset_Qq(CPUX86State *env, DisasContext *s, int modrm)
{
    int mod = (modrm >> 6) & 3;
    unsigned ret;

    if (mod == 3) {
        int rm = modrm & 7; /* Ignore REX_B */
        ret = offsetof(CPUX86State, fpregs[rm].mmx);
    } else {
        ret = offsetof(CPUX86State, mmx_t0);
        gen_lea_modrm(env, s, modrm);
        gen_ldq_env_A0(s, ret);
    }
    return ret;
}

static unsigned offset_Vx(CPUX86State *env, DisasContext *s, int modrm)
{
    int reg = ((modrm >> 3) & 7) | REX_R(s);
    return offsetof(CPUX86State, xmm_regs[reg]);
}

static unsigned offset_Wx(CPUX86State *env, DisasContext *s, int modrm)
{
    int mod = (modrm >> 6) & 3;
    unsigned ret;

    if (mod == 3) {
        int rm = (modrm & 7) | REX_B(s);
        ret = offsetof(CPUX86State, xmm_regs[rm]);
    } else {
        ret = offsetof(CPUX86State, xmm_t0);
        gen_lea_modrm(env, s, modrm);
        gen_ldo_env_A0(s, ret);
    }
    return ret;
}

static unsigned offset_Hx(CPUX86State *env, DisasContext *s, int modrm)
{
    return offsetof(CPUX86State, xmm_regs[s->vex_v]);
}

Then you can have

#define GEN_GVEC_3(OP0, OP1, OP2, OPRSZ, MAXSZ)
static void gen_gvec_ld_modrm_##OP0##OP1##OP2(CPUX86State *env,      \
    DisasContext *s, int modrm, unsigned vece,  gen_gvec_2_fp_t gen) \
{                                               \
    int ofd = offset_##OP0(env, s, modrm);      \
    int of1 = offset_##OP1(env, s, modrm);      \
    int of2 = offset_##OP2(env, s, modrm);      \
    gen(vece, opd, opa, opb, OPRSZ, MAXSZ);     \
}

GEN_GVEC_3(Pq, Pq, Qq, sizeof(MMXReg), sizeof(MMXReg))
GEN_GVEC_3(Vx, Vx, Wx, sizeof(XMMReg), max_vec_size(s))
GEN_GVEC_3(Vx, Hx, Wx, sizeof(XMMReg), max_vec_size(s))

The PqPqQq and VxVxWx sub-strings aren't quite canonical, but imo a better fit
to the actual format of the instruction, with 2 inputs and 1 output.

You can also do

GEN_GVEC_3(Pq, Qq, Pq, sizeof(MMXReg), sizeof(MMXReg))

for those rare "reversed" operations like PANDN.  Now you don't need to carry
around the OPCTL argument, which I initially found non-obvious.

I initially thought you'd be able to infer maxsz from the set of arguments, but
since there are vex encoded operations that do not use vex.vvvv that is not
always the case.  Thus I suggest

static size_t max_vec_size(DisasContext *s)
{
    if (s->prefixes & PREFIX_VEX) {
        /*
         * TODO: When avx512 is supported and enabled, sizeof(ZMMReg).
         * In the meantime don't waste time zeroing data that is not
         * architecturally present.
         */
        return sizeof(YMMReg);
    } else {
        /* Without vex encoding, only the low 128 bits are modified. */
        return sizeof(XMMReg);
    }
}


r~

Re: [Qemu-devel] [RFC PATCH v1 06/22] target/i386: introduce gen_gvec_ld_modrm_* helpers

[Jan Bobek]

[-- Attachment #1.1: Type: text/plain, Size: 3595 bytes --]

On 7/31/19 6:47 PM, Richard Henderson wrote:
> I suppose there aren't so many different combinations, but did you consider
> separate callbacks per operand?  If you have
> 
> typedef unsigned (*gen_offset)(CPUX86State *, DisasContext *, int);
> 
> static unsigned offset_Pq(CPUX86State *env, DisasContext *s, int modrm)
> {
>     int reg = (modrm >> 3) & 7; /* Ignore REX_R */
>     return offsetof(CPUX86State, fpregs[reg].mmx);
> }
> 
> static unsigned offset_Qq(CPUX86State *env, DisasContext *s, int modrm)
> {
>     int mod = (modrm >> 6) & 3;
>     unsigned ret;
> 
>     if (mod == 3) {
>         int rm = modrm & 7; /* Ignore REX_B */
>         ret = offsetof(CPUX86State, fpregs[rm].mmx);
>     } else {
>         ret = offsetof(CPUX86State, mmx_t0);
>         gen_lea_modrm(env, s, modrm);
>         gen_ldq_env_A0(s, ret);
>     }
>     return ret;
> }
> 
> static unsigned offset_Vx(CPUX86State *env, DisasContext *s, int modrm)
> {
>     int reg = ((modrm >> 3) & 7) | REX_R(s);
>     return offsetof(CPUX86State, xmm_regs[reg]);
> }
> 
> static unsigned offset_Wx(CPUX86State *env, DisasContext *s, int modrm)
> {
>     int mod = (modrm >> 6) & 3;
>     unsigned ret;
> 
>     if (mod == 3) {
>         int rm = (modrm & 7) | REX_B(s);
>         ret = offsetof(CPUX86State, xmm_regs[rm]);
>     } else {
>         ret = offsetof(CPUX86State, xmm_t0);
>         gen_lea_modrm(env, s, modrm);
>         gen_ldo_env_A0(s, ret);
>     }
>     return ret;
> }
> 
> static unsigned offset_Hx(CPUX86State *env, DisasContext *s, int modrm)
> {
>     return offsetof(CPUX86State, xmm_regs[s->vex_v]);
> }
> 
> Then you can have
> 
> #define GEN_GVEC_3(OP0, OP1, OP2, OPRSZ, MAXSZ)
> static void gen_gvec_ld_modrm_##OP0##OP1##OP2(CPUX86State *env,      \
>     DisasContext *s, int modrm, unsigned vece,  gen_gvec_2_fp_t gen) \
> {                                               \
>     int ofd = offset_##OP0(env, s, modrm);      \
>     int of1 = offset_##OP1(env, s, modrm);      \
>     int of2 = offset_##OP2(env, s, modrm);      \
>     gen(vece, opd, opa, opb, OPRSZ, MAXSZ);     \
> }
> 
> GEN_GVEC_3(Pq, Pq, Qq, sizeof(MMXReg), sizeof(MMXReg))
> GEN_GVEC_3(Vx, Vx, Wx, sizeof(XMMReg), max_vec_size(s))
> GEN_GVEC_3(Vx, Hx, Wx, sizeof(XMMReg), max_vec_size(s))
> 
> The PqPqQq and VxVxWx sub-strings aren't quite canonical, but imo a better fit
> to the actual format of the instruction, with 2 inputs and 1 output.

Funny, I had a similar idea and converged to almost identical
solution. This will be part of v2.

> You can also do
> 
> GEN_GVEC_3(Pq, Qq, Pq, sizeof(MMXReg), sizeof(MMXReg))
> 
> for those rare "reversed" operations like PANDN.  Now you don't need to carry
> around the OPCTL argument, which I initially found non-obvious.

Yup, solves the problem nicely and more clearly.

> I initially thought you'd be able to infer maxsz from the set of arguments, but
> since there are vex encoded operations that do not use vex.vvvv that is not
> always the case.  Thus I suggest
> 
> static size_t max_vec_size(DisasContext *s)
> {
>     if (s->prefixes & PREFIX_VEX) {
>         /*
>          * TODO: When avx512 is supported and enabled, sizeof(ZMMReg).
>          * In the meantime don't waste time zeroing data that is not
>          * architecturally present.
>          */
>         return sizeof(YMMReg);
>     } else {
>         /* Without vex encoding, only the low 128 bits are modified. */
>         return sizeof(XMMReg);
>     }
> }

Looks good.

-Jan


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[Qemu-devel] [RFC PATCH v1 07/22] target/i386: add vector register file alignment constraints

[Jan Bobek]

gvec operations require that all vectors be aligned on 16-byte
boundary; make sure the MM/XMM/YMM/ZMM register file is aligned as
neccessary.

Signed-off-by: Jan Bobek <jan.bobek@gmail.com>
---
 target/i386/cpu.h | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/target/i386/cpu.h b/target/i386/cpu.h
index 8b3dc5533e..cb407b86ba 100644
--- a/target/i386/cpu.h
+++ b/target/i386/cpu.h
@@ -1199,9 +1199,9 @@ typedef struct CPUX86State {
     float_status mmx_status; /* for 3DNow! float ops */
     float_status sse_status;
     uint32_t mxcsr;
-    ZMMReg xmm_regs[CPU_NB_REGS == 8 ? 8 : 32];
-    ZMMReg xmm_t0;
-    MMXReg mmx_t0;
+    ZMMReg xmm_regs[CPU_NB_REGS == 8 ? 8 : 32] QEMU_ALIGNED(16);
+    ZMMReg xmm_t0 QEMU_ALIGNED(16);
+    MMXReg mmx_t0 QEMU_ALIGNED(8);
 
     XMMReg ymmh_regs[CPU_NB_REGS];
 
-- 
2.20.1

Re: [Qemu-devel] [RFC PATCH v1 07/22] target/i386: add vector register file alignment constraints

[Richard Henderson]

On 7/31/19 10:56 AM, Jan Bobek wrote:
> gvec operations require that all vectors be aligned on 16-byte
> boundary; make sure the MM/XMM/YMM/ZMM register file is aligned as
> neccessary.
> 
> Signed-off-by: Jan Bobek <jan.bobek@gmail.com>
> ---
>  target/i386/cpu.h | 6 +++---
>  1 file changed, 3 insertions(+), 3 deletions(-)

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>


r~

[Qemu-devel] [RFC PATCH v1 08/22] target/i386: reimplement (V)PAND, (V)ANDPS, (V)ANDPD

[Jan Bobek]

Use the gvec infrastructure to achieve the desired functionality.

Note: This commit adds several bits which will not be part of the
final patch series and which are only present to allow for incremenal
write-and-test development cycle. Notably, the SSE_TOMBSTONE define
will go away entirely with all of the tables, and nothing will follow
the new dispatch switch in gen_sse.

Signed-off-by: Jan Bobek <jan.bobek@gmail.com>
---
 target/i386/ops_sse.h        |  2 --
 target/i386/ops_sse_header.h |  1 -
 target/i386/translate.c      | 49 ++++++++++++++++++++++++++++++++++--
 3 files changed, 47 insertions(+), 5 deletions(-)

diff --git a/target/i386/ops_sse.h b/target/i386/ops_sse.h
index ed05989768..b3ba23287d 100644
--- a/target/i386/ops_sse.h
+++ b/target/i386/ops_sse.h
@@ -353,7 +353,6 @@ static inline int satsw(int x)
 #define FMAXUB(a, b) ((a) > (b)) ? (a) : (b)
 #define FMAXSW(a, b) ((int16_t)(a) > (int16_t)(b)) ? (a) : (b)
 
-#define FAND(a, b) ((a) & (b))
 #define FANDN(a, b) ((~(a)) & (b))
 #define FOR(a, b) ((a) | (b))
 #define FXOR(a, b) ((a) ^ (b))
@@ -397,7 +396,6 @@ SSE_HELPER_B(helper_pmaxub, FMAXUB)
 SSE_HELPER_W(helper_pminsw, FMINSW)
 SSE_HELPER_W(helper_pmaxsw, FMAXSW)
 
-SSE_HELPER_Q(helper_pand, FAND)
 SSE_HELPER_Q(helper_pandn, FANDN)
 SSE_HELPER_Q(helper_por, FOR)
 SSE_HELPER_Q(helper_pxor, FXOR)
diff --git a/target/i386/ops_sse_header.h b/target/i386/ops_sse_header.h
index 094aafc573..63b4376389 100644
--- a/target/i386/ops_sse_header.h
+++ b/target/i386/ops_sse_header.h
@@ -86,7 +86,6 @@ SSE_HELPER_B(pmaxub, FMAXUB)
 SSE_HELPER_W(pminsw, FMINSW)
 SSE_HELPER_W(pmaxsw, FMAXSW)
 
-SSE_HELPER_Q(pand, FAND)
 SSE_HELPER_Q(pandn, FANDN)
 SSE_HELPER_Q(por, FOR)
 SSE_HELPER_Q(pxor, FXOR)
diff --git a/target/i386/translate.c b/target/i386/translate.c
index d576b3345c..3821733a4e 100644
--- a/target/i386/translate.c
+++ b/target/i386/translate.c
@@ -23,6 +23,7 @@
 #include "disas/disas.h"
 #include "exec/exec-all.h"
 #include "tcg-op.h"
+#include "tcg-op-gvec.h"
 #include "exec/cpu_ldst.h"
 #include "exec/translator.h"
 
@@ -2723,6 +2724,7 @@ typedef void (*SSEFunc_0_eppt)(TCGv_ptr env, TCGv_ptr reg_a, TCGv_ptr reg_b,
 
 #define SSE_SPECIAL ((void *)1)
 #define SSE_DUMMY ((void *)2)
+#define SSE_TOMBSTONE ((void *)3)
 
 #define MMX_OP2(x) { gen_helper_ ## x ## _mmx, gen_helper_ ## x ## _xmm }
 #define SSE_FOP(x) { gen_helper_ ## x ## ps, gen_helper_ ## x ## pd, \
@@ -2754,7 +2756,7 @@ static const SSEFunc_0_epp sse_op_table1[256][4] = {
     [0x51] = SSE_FOP(sqrt),
     [0x52] = { gen_helper_rsqrtps, NULL, gen_helper_rsqrtss, NULL },
     [0x53] = { gen_helper_rcpps, NULL, gen_helper_rcpss, NULL },
-    [0x54] = { gen_helper_pand_xmm, gen_helper_pand_xmm }, /* andps, andpd */
+    [0x54] = { SSE_TOMBSTONE, SSE_TOMBSTONE }, /* andps, andpd */
     [0x55] = { gen_helper_pandn_xmm, gen_helper_pandn_xmm }, /* andnps, andnpd */
     [0x56] = { gen_helper_por_xmm, gen_helper_por_xmm }, /* orps, orpd */
     [0x57] = { gen_helper_pxor_xmm, gen_helper_pxor_xmm }, /* xorps, xorpd */
@@ -2823,7 +2825,7 @@ static const SSEFunc_0_epp sse_op_table1[256][4] = {
     [0xd8] = MMX_OP2(psubusb),
     [0xd9] = MMX_OP2(psubusw),
     [0xda] = MMX_OP2(pminub),
-    [0xdb] = MMX_OP2(pand),
+    [0xdb] = { SSE_TOMBSTONE, SSE_TOMBSTONE },
     [0xdc] = MMX_OP2(paddusb),
     [0xdd] = MMX_OP2(paddusw),
     [0xde] = MMX_OP2(pmaxub),
@@ -3164,6 +3166,17 @@ static inline void gen_gvec_ld_modrm_3(CPUX86State *env, DisasContext *s,
                         gen_ld_modrm_VxHxWx,                            \
                         gen_gvec_2_fp, (opctl))
 
+#define gen_pand_mm(env, s, modrm)   gen_gvec_ld_modrm_mm  ((env), (s), (modrm), MO_64, tcg_gen_gvec_and, 0112)
+#define gen_pand_xmm(env, s, modrm)  gen_gvec_ld_modrm_xmm ((env), (s), (modrm), MO_64, tcg_gen_gvec_and, 0112)
+#define gen_vpand_xmm(env, s, modrm) gen_gvec_ld_modrm_vxmm((env), (s), (modrm), MO_64, tcg_gen_gvec_and, 0123)
+#define gen_vpand_ymm(env, s, modrm) gen_gvec_ld_modrm_vymm((env), (s), (modrm), MO_64, tcg_gen_gvec_and, 0123)
+#define gen_andps_xmm  gen_pand_xmm
+#define gen_vandps_xmm gen_vpand_xmm
+#define gen_vandps_ymm gen_vpand_ymm
+#define gen_andpd_xmm  gen_pand_xmm
+#define gen_vandpd_xmm gen_vpand_xmm
+#define gen_vandpd_ymm gen_vpand_ymm
+
 static void gen_sse(CPUX86State *env, DisasContext *s, int b)
 {
     int b1, op1_offset, op2_offset, is_xmm, val;
@@ -3238,6 +3251,38 @@ static void gen_sse(CPUX86State *env, DisasContext *s, int b)
         reg |= REX_R(s);
     }
     mod = (modrm >> 6) & 3;
+
+    enum {
+        M_0F    = 0x01 << 8,
+        M_0F38  = 0x02 << 8,
+        M_0F3A  = 0x04 << 8,
+        P_66    = 0x08 << 8,
+        P_F3    = 0x10 << 8,
+        P_F2    = 0x20 << 8,
+        VEX_128 = 0x40 << 8,
+        VEX_256 = 0x80 << 8,
+    };
+
+    switch(b | M_0F
+           | (s->prefix & PREFIX_DATA ? P_66 : 0)
+           | (s->prefix & PREFIX_REPZ ? P_F3 : 0)
+           | (s->prefix & PREFIX_REPNZ ? P_F2 : 0)
+           | (s->prefix & PREFIX_VEX ? (s->vex_l ? VEX_256 : VEX_128) : 0)) {
+    case 0xdb | M_0F:                  gen_pand_mm(env, s, modrm); return;
+    case 0xdb | M_0F | P_66:           gen_pand_xmm(env, s, modrm); return;
+    case 0xdb | M_0F | P_66 | VEX_128: gen_vpand_xmm(env, s, modrm); return;
+    case 0xdb | M_0F | P_66 | VEX_256: gen_vpand_ymm(env, s, modrm); return;
+    case 0x54 | M_0F:                  gen_andps_xmm(env, s, modrm); return;
+    case 0x54 | M_0F | VEX_128:        gen_vandps_xmm(env, s, modrm); return;
+    case 0x54 | M_0F | VEX_256:        gen_vandps_ymm(env, s, modrm); return;
+    case 0x54 | M_0F | P_66:           gen_andpd_xmm(env, s, modrm); return;
+    case 0x54 | M_0F | P_66 | VEX_128: gen_vandpd_xmm(env, s, modrm); return;
+    case 0x54 | M_0F | P_66 | VEX_256: gen_vandpd_ymm(env, s, modrm); return;
+    default: break;
+    }
+
+    assert(sse_fn_epp != SSE_TOMBSTONE);
+
     if (sse_fn_epp == SSE_SPECIAL) {
         b |= (b1 << 8);
         switch(b) {
-- 
2.20.1

Re: [Qemu-devel] [RFC PATCH v1 08/22] target/i386: reimplement (V)PAND, (V)ANDPS, (V)ANDPD

[Richard Henderson]

On 7/31/19 10:56 AM, Jan Bobek wrote:
> +#define gen_pand_mm(env, s, modrm)   gen_gvec_ld_modrm_mm  ((env), (s), (modrm), MO_64, tcg_gen_gvec_and, 0112)
> +#define gen_pand_xmm(env, s, modrm)  gen_gvec_ld_modrm_xmm ((env), (s), (modrm), MO_64, tcg_gen_gvec_and, 0112)
> +#define gen_vpand_xmm(env, s, modrm) gen_gvec_ld_modrm_vxmm((env), (s), (modrm), MO_64, tcg_gen_gvec_and, 0123)
> +#define gen_vpand_ymm(env, s, modrm) gen_gvec_ld_modrm_vymm((env), (s), (modrm), MO_64, tcg_gen_gvec_and, 0123)
> +#define gen_andps_xmm  gen_pand_xmm
> +#define gen_vandps_xmm gen_vpand_xmm
> +#define gen_vandps_ymm gen_vpand_ymm
> +#define gen_andpd_xmm  gen_pand_xmm
> +#define gen_vandpd_xmm gen_vpand_xmm
> +#define gen_vandpd_ymm gen_vpand_ymm


Why all of these extra defines?

> +    enum {
> +        M_0F    = 0x01 << 8,
> +        M_0F38  = 0x02 << 8,
> +        M_0F3A  = 0x04 << 8,
> +        P_66    = 0x08 << 8,
> +        P_F3    = 0x10 << 8,
> +        P_F2    = 0x20 << 8,
> +        VEX_128 = 0x40 << 8,
> +        VEX_256 = 0x80 << 8,
> +    };
> +
> +    switch(b | M_0F
> +           | (s->prefix & PREFIX_DATA ? P_66 : 0)
> +           | (s->prefix & PREFIX_REPZ ? P_F3 : 0)
> +           | (s->prefix & PREFIX_REPNZ ? P_F2 : 0)
> +           | (s->prefix & PREFIX_VEX ? (s->vex_l ? VEX_256 : VEX_128) : 0)) {

I think you can move this above almost everything in this function, so that all
of the legacy bits follow this switch.

> +    case 0xdb | M_0F:                  gen_pand_mm(env, s, modrm); return;

You'll want to put these on the next lines -- checkpatch.pl again.

> +    case 0xdb | M_0F | P_66:           gen_pand_xmm(env, s, modrm); return;
> +    case 0xdb | M_0F | P_66 | VEX_128: gen_vpand_xmm(env, s, modrm); return;
> +    case 0xdb | M_0F | P_66 | VEX_256: gen_vpand_ymm(env, s, modrm); return;
> +    case 0x54 | M_0F:                  gen_andps_xmm(env, s, modrm); return;
> +    case 0x54 | M_0F | VEX_128:        gen_vandps_xmm(env, s, modrm); return;
> +    case 0x54 | M_0F | VEX_256:        gen_vandps_ymm(env, s, modrm); return;
> +    case 0x54 | M_0F | P_66:           gen_andpd_xmm(env, s, modrm); return;
> +    case 0x54 | M_0F | P_66 | VEX_128: gen_vandpd_xmm(env, s, modrm); return;
> +    case 0x54 | M_0F | P_66 | VEX_256: gen_vandpd_ymm(env, s, modrm); return;
> +    default: break;
> +    }

Perhaps group cases together?

    case 0xdb | M_0F | P_66:  /* PAND */
    case 0x54 | M_0F:         /* ANDPS */
    case 0x54 | M_0F | P_66:  /* ANDPD */
       gen_gvec_ld_modrm_xmm(env, s, modrm, MO_64, tcg_gen_gvec_and, 0112);
       return;

How are you planning to handle CPUID checks?  I know the currently handling is
quite spotty, but with a reorg we might as well fix that too.


r~

Re: [Qemu-devel] [RFC PATCH v1 08/22] target/i386: reimplement (V)PAND, (V)ANDPS, (V)ANDPD

[Aleksandar Markovic]

On Wed, Jul 31, 2019 at 9:36 PM Richard Henderson <
richard.henderson@linaro.org> wrote:

> On 7/31/19 10:56 AM, Jan Bobek wrote:
> > +#define gen_pand_mm(env, s, modrm)   gen_gvec_ld_modrm_mm  ((env), (s),
> (modrm), MO_64, tcg_gen_gvec_and, 0112)
> > +#define gen_pand_xmm(env, s, modrm)  gen_gvec_ld_modrm_xmm ((env), (s),
> (modrm), MO_64, tcg_gen_gvec_and, 0112)
> > +#define gen_vpand_xmm(env, s, modrm) gen_gvec_ld_modrm_vxmm((env), (s),
> (modrm), MO_64, tcg_gen_gvec_and, 0123)
> > +#define gen_vpand_ymm(env, s, modrm) gen_gvec_ld_modrm_vymm((env), (s),
> (modrm), MO_64, tcg_gen_gvec_and, 0123)
> > +#define gen_andps_xmm  gen_pand_xmm
> > +#define gen_vandps_xmm gen_vpand_xmm
> > +#define gen_vandps_ymm gen_vpand_ymm
> > +#define gen_andpd_xmm  gen_pand_xmm
> > +#define gen_vandpd_xmm gen_vpand_xmm
> > +#define gen_vandpd_ymm gen_vpand_ymm
>
>
> Why all of these extra defines?
>

Because of code clarity and safety, I would say.

This line:

case 0x54 | M_0F:                  gen_andps_xmm(env, s, modrm); return;

looks much clearer than this one:

case 0x54 | M_0F:                  gen_gvec_ld_modrm_mm(env, s, modrm,
MO_64, tcg_gen_gvec_and, 0112)

and such organization is also much less prone to copy/paste bugs etc.

Needless to say there is no performance price at all, so it is a no-brainer.

Sincerely,
Aleksandar


>
> > +    enum {
> > +        M_0F    = 0x01 << 8,
> > +        M_0F38  = 0x02 << 8,
> > +        M_0F3A  = 0x04 << 8,
> > +        P_66    = 0x08 << 8,
> > +        P_F3    = 0x10 << 8,
> > +        P_F2    = 0x20 << 8,
> > +        VEX_128 = 0x40 << 8,
> > +        VEX_256 = 0x80 << 8,
> > +    };
> > +
> > +    switch(b | M_0F
> > +           | (s->prefix & PREFIX_DATA ? P_66 : 0)
> > +           | (s->prefix & PREFIX_REPZ ? P_F3 : 0)
> > +           | (s->prefix & PREFIX_REPNZ ? P_F2 : 0)
> > +           | (s->prefix & PREFIX_VEX ? (s->vex_l ? VEX_256 : VEX_128) :
> 0)) {
>
> I think you can move this above almost everything in this function, so
> that all
> of the legacy bits follow this switch.
>
> > +    case 0xdb | M_0F:                  gen_pand_mm(env, s, modrm);
> return;
>
> You'll want to put these on the next lines -- checkpatch.pl again.
>
> > +    case 0xdb | M_0F | P_66:           gen_pand_xmm(env, s, modrm);
> return;
> > +    case 0xdb | M_0F | P_66 | VEX_128: gen_vpand_xmm(env, s, modrm);
> return;
> > +    case 0xdb | M_0F | P_66 | VEX_256: gen_vpand_ymm(env, s, modrm);
> return;
> > +    case 0x54 | M_0F:                  gen_andps_xmm(env, s, modrm);
> return;
> > +    case 0x54 | M_0F | VEX_128:        gen_vandps_xmm(env, s, modrm);
> return;
> > +    case 0x54 | M_0F | VEX_256:        gen_vandps_ymm(env, s, modrm);
> return;
> > +    case 0x54 | M_0F | P_66:           gen_andpd_xmm(env, s, modrm);
> return;
> > +    case 0x54 | M_0F | P_66 | VEX_128: gen_vandpd_xmm(env, s, modrm);
> return;
> > +    case 0x54 | M_0F | P_66 | VEX_256: gen_vandpd_ymm(env, s, modrm);
> return;
> > +    default: break;
> > +    }
>
> Perhaps group cases together?
>
>     case 0xdb | M_0F | P_66:  /* PAND */
>     case 0x54 | M_0F:         /* ANDPS */
>     case 0x54 | M_0F | P_66:  /* ANDPD */
>        gen_gvec_ld_modrm_xmm(env, s, modrm, MO_64, tcg_gen_gvec_and, 0112);
>        return;
>
> How are you planning to handle CPUID checks?  I know the currently
> handling is
> quite spotty, but with a reorg we might as well fix that too.
>
>
> r~
>
>

Re: [Qemu-devel] [RFC PATCH v1 08/22] target/i386: reimplement (V)PAND, (V)ANDPS, (V)ANDPD

[Richard Henderson]

On 7/31/19 1:27 PM, Aleksandar Markovic wrote:
> 
> 
> On Wed, Jul 31, 2019 at 9:36 PM Richard Henderson <richard.henderson@linaro.org
> <mailto:richard.henderson@linaro.org>> wrote:
> 
>     On 7/31/19 10:56 AM, Jan Bobek wrote:
>     > +#define gen_pand_mm(env, s, modrm)   gen_gvec_ld_modrm_mm  ((env), (s),
>     (modrm), MO_64, tcg_gen_gvec_and, 0112)
>     > +#define gen_pand_xmm(env, s, modrm)  gen_gvec_ld_modrm_xmm ((env), (s),
>     (modrm), MO_64, tcg_gen_gvec_and, 0112)
>     > +#define gen_vpand_xmm(env, s, modrm) gen_gvec_ld_modrm_vxmm((env), (s),
>     (modrm), MO_64, tcg_gen_gvec_and, 0123)
>     > +#define gen_vpand_ymm(env, s, modrm) gen_gvec_ld_modrm_vymm((env), (s),
>     (modrm), MO_64, tcg_gen_gvec_and, 0123)
>     > +#define gen_andps_xmm  gen_pand_xmm
>     > +#define gen_vandps_xmm gen_vpand_xmm
>     > +#define gen_vandps_ymm gen_vpand_ymm
>     > +#define gen_andpd_xmm  gen_pand_xmm
>     > +#define gen_vandpd_xmm gen_vpand_xmm
>     > +#define gen_vandpd_ymm gen_vpand_ymm
> 
> 
>     Why all of these extra defines?
> 
> 
> Because of code clarity and safety, I would say.
> 
> This line:
> 
> case 0x54 | M_0F:                  gen_andps_xmm(env, s, modrm); return;
> 
> looks much clearer than this one:
> 
> case 0x54 | M_0F:                  gen_gvec_ld_modrm_mm(env, s, modrm, MO_64,
> tcg_gen_gvec_and, 0112)
> 
> and such organization is also much less prone to copy/paste bugs etc.

I'm not convinced.  These macros will be used exactly once.  Because there is
no reuse, there is no added safety.  There is only the chance of a typo in a
location removed from the actual use within the switch.

I agree that the goal is to minimize any replication per case.  But I don't
think this particular arrangement of macros is the way to accomplish that.


r~

Re: [Qemu-devel] [RFC PATCH v1 08/22] target/i386: reimplement (V)PAND, (V)ANDPS, (V)ANDPD

[Jan Bobek]

[-- Attachment #1.1: Type: text/plain, Size: 3541 bytes --]

On 7/31/19 3:35 PM, Richard Henderson wrote:
> On 7/31/19 10:56 AM, Jan Bobek wrote:
>> +#define gen_pand_mm(env, s, modrm)   gen_gvec_ld_modrm_mm  ((env), (s), (modrm), MO_64, tcg_gen_gvec_and, 0112)
>> +#define gen_pand_xmm(env, s, modrm)  gen_gvec_ld_modrm_xmm ((env), (s), (modrm), MO_64, tcg_gen_gvec_and, 0112)
>> +#define gen_vpand_xmm(env, s, modrm) gen_gvec_ld_modrm_vxmm((env), (s), (modrm), MO_64, tcg_gen_gvec_and, 0123)
>> +#define gen_vpand_ymm(env, s, modrm) gen_gvec_ld_modrm_vymm((env), (s), (modrm), MO_64, tcg_gen_gvec_and, 0123)
>> +#define gen_andps_xmm  gen_pand_xmm
>> +#define gen_vandps_xmm gen_vpand_xmm
>> +#define gen_vandps_ymm gen_vpand_ymm
>> +#define gen_andpd_xmm  gen_pand_xmm
>> +#define gen_vandpd_xmm gen_vpand_xmm
>> +#define gen_vandpd_ymm gen_vpand_ymm
> 
> 
> Why all of these extra defines?
> 
>> +    enum {
>> +        M_0F    = 0x01 << 8,
>> +        M_0F38  = 0x02 << 8,
>> +        M_0F3A  = 0x04 << 8,
>> +        P_66    = 0x08 << 8,
>> +        P_F3    = 0x10 << 8,
>> +        P_F2    = 0x20 << 8,
>> +        VEX_128 = 0x40 << 8,
>> +        VEX_256 = 0x80 << 8,
>> +    };
>> +
>> +    switch(b | M_0F
>> +           | (s->prefix & PREFIX_DATA ? P_66 : 0)
>> +           | (s->prefix & PREFIX_REPZ ? P_F3 : 0)
>> +           | (s->prefix & PREFIX_REPNZ ? P_F2 : 0)
>> +           | (s->prefix & PREFIX_VEX ? (s->vex_l ? VEX_256 : VEX_128) : 0)) {
> 
> I think you can move this above almost everything in this function, so that all
> of the legacy bits follow this switch.
> 
>> +    case 0xdb | M_0F:                  gen_pand_mm(env, s, modrm); return;
> 
> You'll want to put these on the next lines -- checkpatch.pl again.
> 
>> +    case 0xdb | M_0F | P_66:           gen_pand_xmm(env, s, modrm); return;
>> +    case 0xdb | M_0F | P_66 | VEX_128: gen_vpand_xmm(env, s, modrm); return;
>> +    case 0xdb | M_0F | P_66 | VEX_256: gen_vpand_ymm(env, s, modrm); return;
>> +    case 0x54 | M_0F:                  gen_andps_xmm(env, s, modrm); return;
>> +    case 0x54 | M_0F | VEX_128:        gen_vandps_xmm(env, s, modrm); return;
>> +    case 0x54 | M_0F | VEX_256:        gen_vandps_ymm(env, s, modrm); return;
>> +    case 0x54 | M_0F | P_66:           gen_andpd_xmm(env, s, modrm); return;
>> +    case 0x54 | M_0F | P_66 | VEX_128: gen_vandpd_xmm(env, s, modrm); return;
>> +    case 0x54 | M_0F | P_66 | VEX_256: gen_vandpd_ymm(env, s, modrm); return;
>> +    default: break;
>> +    }
> 
> Perhaps group cases together?
> 
>     case 0xdb | M_0F | P_66:  /* PAND */
>     case 0x54 | M_0F:         /* ANDPS */
>     case 0x54 | M_0F | P_66:  /* ANDPD */
>        gen_gvec_ld_modrm_xmm(env, s, modrm, MO_64, tcg_gen_gvec_and, 0112);
>        return;

As Aleksandar pointed out in his email, the general intuition was to
have self-documenting code. Seeing

case 0x54 | M_0F | VEX_256: gen_vandps_ymm(env, s, modrm); return;

clearly states that this particular case is a VANDPS, and if one wants
to see what we do with it, they can go look gen_vandps_ymm up.

That being said, I have to the conclusion in the meantime that keeping
all the extra macros is just too much code and not worth it, so I'll
do it like you suggest above.

> How are you planning to handle CPUID checks?  I know the currently handling is
> quite spotty, but with a reorg we might as well fix that too.

Good question. CPUID checks are not handled in this patch at all, I
will need to come up with a workable approach.

-Jan


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[Qemu-devel] [RFC PATCH v1 09/22] target/i386: reimplement (V)POR, (V)ORPS, (V)ORPD

[Jan Bobek]

Use the gvec infrastructure to achieve the desired functionality.

Signed-off-by: Jan Bobek <jan.bobek@gmail.com>
---
 target/i386/ops_sse.h        |  2 --
 target/i386/ops_sse_header.h |  1 -
 target/i386/translate.c      | 27 +++++++++++++++++++++++++--
 3 files changed, 25 insertions(+), 5 deletions(-)

diff --git a/target/i386/ops_sse.h b/target/i386/ops_sse.h
index b3ba23287d..8b4ac9115e 100644
--- a/target/i386/ops_sse.h
+++ b/target/i386/ops_sse.h
@@ -354,7 +354,6 @@ static inline int satsw(int x)
 #define FMAXSW(a, b) ((int16_t)(a) > (int16_t)(b)) ? (a) : (b)
 
 #define FANDN(a, b) ((~(a)) & (b))
-#define FOR(a, b) ((a) | (b))
 #define FXOR(a, b) ((a) ^ (b))
 
 #define FCMPGTB(a, b) ((int8_t)(a) > (int8_t)(b) ? -1 : 0)
@@ -397,7 +396,6 @@ SSE_HELPER_W(helper_pminsw, FMINSW)
 SSE_HELPER_W(helper_pmaxsw, FMAXSW)
 
 SSE_HELPER_Q(helper_pandn, FANDN)
-SSE_HELPER_Q(helper_por, FOR)
 SSE_HELPER_Q(helper_pxor, FXOR)
 
 SSE_HELPER_B(helper_pcmpgtb, FCMPGTB)
diff --git a/target/i386/ops_sse_header.h b/target/i386/ops_sse_header.h
index 63b4376389..6a732ee489 100644
--- a/target/i386/ops_sse_header.h
+++ b/target/i386/ops_sse_header.h
@@ -87,7 +87,6 @@ SSE_HELPER_W(pminsw, FMINSW)
 SSE_HELPER_W(pmaxsw, FMAXSW)
 
 SSE_HELPER_Q(pandn, FANDN)
-SSE_HELPER_Q(por, FOR)
 SSE_HELPER_Q(pxor, FXOR)
 
 SSE_HELPER_B(pcmpgtb, FCMPGTB)
diff --git a/target/i386/translate.c b/target/i386/translate.c
index 3821733a4e..28cd84432d 100644
--- a/target/i386/translate.c
+++ b/target/i386/translate.c
@@ -2758,7 +2758,7 @@ static const SSEFunc_0_epp sse_op_table1[256][4] = {
     [0x53] = { gen_helper_rcpps, NULL, gen_helper_rcpss, NULL },
     [0x54] = { SSE_TOMBSTONE, SSE_TOMBSTONE }, /* andps, andpd */
     [0x55] = { gen_helper_pandn_xmm, gen_helper_pandn_xmm }, /* andnps, andnpd */
-    [0x56] = { gen_helper_por_xmm, gen_helper_por_xmm }, /* orps, orpd */
+    [0x56] = { SSE_TOMBSTONE, SSE_TOMBSTONE }, /* orps, orpd */
     [0x57] = { gen_helper_pxor_xmm, gen_helper_pxor_xmm }, /* xorps, xorpd */
     [0x58] = SSE_FOP(add),
     [0x59] = SSE_FOP(mul),
@@ -2841,7 +2841,7 @@ static const SSEFunc_0_epp sse_op_table1[256][4] = {
     [0xe8] = MMX_OP2(psubsb),
     [0xe9] = MMX_OP2(psubsw),
     [0xea] = MMX_OP2(pminsw),
-    [0xeb] = MMX_OP2(por),
+    [0xeb] = { SSE_TOMBSTONE, SSE_TOMBSTONE },
     [0xec] = MMX_OP2(paddsb),
     [0xed] = MMX_OP2(paddsw),
     [0xee] = MMX_OP2(pmaxsw),
@@ -3177,6 +3177,17 @@ static inline void gen_gvec_ld_modrm_3(CPUX86State *env, DisasContext *s,
 #define gen_vandpd_xmm gen_vpand_xmm
 #define gen_vandpd_ymm gen_vpand_ymm
 
+#define gen_por_mm(env, s, modrm)   gen_gvec_ld_modrm_mm  ((env), (s), (modrm), MO_64, tcg_gen_gvec_or, 0112)
+#define gen_por_xmm(env, s, modrm)  gen_gvec_ld_modrm_xmm ((env), (s), (modrm), MO_64, tcg_gen_gvec_or, 0112)
+#define gen_vpor_xmm(env, s, modrm) gen_gvec_ld_modrm_vxmm((env), (s), (modrm), MO_64, tcg_gen_gvec_or, 0123)
+#define gen_vpor_ymm(env, s, modrm) gen_gvec_ld_modrm_vymm((env), (s), (modrm), MO_64, tcg_gen_gvec_or, 0123)
+#define gen_orps_xmm  gen_por_xmm
+#define gen_vorps_xmm gen_vpor_xmm
+#define gen_vorps_ymm gen_vpor_ymm
+#define gen_orpd_xmm  gen_por_xmm
+#define gen_vorpd_xmm gen_vpor_xmm
+#define gen_vorpd_ymm gen_vpor_ymm
+
 static void gen_sse(CPUX86State *env, DisasContext *s, int b)
 {
     int b1, op1_offset, op2_offset, is_xmm, val;
@@ -3278,6 +3289,18 @@ static void gen_sse(CPUX86State *env, DisasContext *s, int b)
     case 0x54 | M_0F | P_66:           gen_andpd_xmm(env, s, modrm); return;
     case 0x54 | M_0F | P_66 | VEX_128: gen_vandpd_xmm(env, s, modrm); return;
     case 0x54 | M_0F | P_66 | VEX_256: gen_vandpd_ymm(env, s, modrm); return;
+
+    case 0xeb | M_0F:                  gen_por_mm(env, s, modrm); return;
+    case 0xeb | M_0F | P_66:           gen_por_xmm(env, s, modrm); return;
+    case 0xeb | M_0F | P_66 | VEX_128: gen_vpor_xmm(env, s, modrm); return;
+    case 0xeb | M_0F | P_66 | VEX_256: gen_vpor_ymm(env, s, modrm); return;
+    case 0x56 | M_0F:                  gen_orps_xmm(env, s, modrm); return;
+    case 0x56 | M_0F | VEX_128:        gen_vorps_xmm(env, s, modrm); return;
+    case 0x56 | M_0F | VEX_256:        gen_vorps_ymm(env, s, modrm); return;
+    case 0x56 | M_0F | P_66:           gen_orpd_xmm(env, s, modrm); return;
+    case 0x56 | M_0F | P_66 | VEX_128: gen_vorpd_xmm(env, s, modrm); return;
+    case 0x56 | M_0F | P_66 | VEX_256: gen_vorpd_ymm(env, s, modrm); return;
+
     default: break;
     }
 
-- 
2.20.1

[Qemu-devel] [RFC PATCH v1 10/22] target/i386: reimplement (V)PXOR, (V)XORPS, (V)XORPD

[Jan Bobek]

Use the gvec infrastructure to achieve the desired functionality.

Signed-off-by: Jan Bobek <jan.bobek@gmail.com>
---
 target/i386/ops_sse.h        |  2 --
 target/i386/ops_sse_header.h |  1 -
 target/i386/translate.c      | 26 ++++++++++++++++++++++++--
 3 files changed, 24 insertions(+), 5 deletions(-)

diff --git a/target/i386/ops_sse.h b/target/i386/ops_sse.h
index 8b4ac9115e..68dbeda047 100644
--- a/target/i386/ops_sse.h
+++ b/target/i386/ops_sse.h
@@ -354,7 +354,6 @@ static inline int satsw(int x)
 #define FMAXSW(a, b) ((int16_t)(a) > (int16_t)(b)) ? (a) : (b)
 
 #define FANDN(a, b) ((~(a)) & (b))
-#define FXOR(a, b) ((a) ^ (b))
 
 #define FCMPGTB(a, b) ((int8_t)(a) > (int8_t)(b) ? -1 : 0)
 #define FCMPGTW(a, b) ((int16_t)(a) > (int16_t)(b) ? -1 : 0)
@@ -396,7 +395,6 @@ SSE_HELPER_W(helper_pminsw, FMINSW)
 SSE_HELPER_W(helper_pmaxsw, FMAXSW)
 
 SSE_HELPER_Q(helper_pandn, FANDN)
-SSE_HELPER_Q(helper_pxor, FXOR)
 
 SSE_HELPER_B(helper_pcmpgtb, FCMPGTB)
 SSE_HELPER_W(helper_pcmpgtw, FCMPGTW)
diff --git a/target/i386/ops_sse_header.h b/target/i386/ops_sse_header.h
index 6a732ee489..a98b9f8f3f 100644
--- a/target/i386/ops_sse_header.h
+++ b/target/i386/ops_sse_header.h
@@ -87,7 +87,6 @@ SSE_HELPER_W(pminsw, FMINSW)
 SSE_HELPER_W(pmaxsw, FMAXSW)
 
 SSE_HELPER_Q(pandn, FANDN)
-SSE_HELPER_Q(pxor, FXOR)
 
 SSE_HELPER_B(pcmpgtb, FCMPGTB)
 SSE_HELPER_W(pcmpgtw, FCMPGTW)
diff --git a/target/i386/translate.c b/target/i386/translate.c
index 28cd84432d..cfe285e3e5 100644
--- a/target/i386/translate.c
+++ b/target/i386/translate.c
@@ -2759,7 +2759,7 @@ static const SSEFunc_0_epp sse_op_table1[256][4] = {
     [0x54] = { SSE_TOMBSTONE, SSE_TOMBSTONE }, /* andps, andpd */
     [0x55] = { gen_helper_pandn_xmm, gen_helper_pandn_xmm }, /* andnps, andnpd */
     [0x56] = { SSE_TOMBSTONE, SSE_TOMBSTONE }, /* orps, orpd */
-    [0x57] = { gen_helper_pxor_xmm, gen_helper_pxor_xmm }, /* xorps, xorpd */
+    [0x57] = { SSE_TOMBSTONE, SSE_TOMBSTONE }, /* xorps, xorpd */
     [0x58] = SSE_FOP(add),
     [0x59] = SSE_FOP(mul),
     [0x5a] = { gen_helper_cvtps2pd, gen_helper_cvtpd2ps,
@@ -2845,7 +2845,7 @@ static const SSEFunc_0_epp sse_op_table1[256][4] = {
     [0xec] = MMX_OP2(paddsb),
     [0xed] = MMX_OP2(paddsw),
     [0xee] = MMX_OP2(pmaxsw),
-    [0xef] = MMX_OP2(pxor),
+    [0xef] = { SSE_TOMBSTONE, SSE_TOMBSTONE },
     [0xf0] = { NULL, NULL, NULL, SSE_SPECIAL }, /* lddqu */
     [0xf1] = MMX_OP2(psllw),
     [0xf2] = MMX_OP2(pslld),
@@ -3188,6 +3188,17 @@ static inline void gen_gvec_ld_modrm_3(CPUX86State *env, DisasContext *s,
 #define gen_vorpd_xmm gen_vpor_xmm
 #define gen_vorpd_ymm gen_vpor_ymm
 
+#define gen_pxor_mm(env, s, modrm)   gen_gvec_ld_modrm_mm  ((env), (s), (modrm), MO_64, tcg_gen_gvec_xor, 0112)
+#define gen_pxor_xmm(env, s, modrm)  gen_gvec_ld_modrm_xmm ((env), (s), (modrm), MO_64, tcg_gen_gvec_xor, 0112)
+#define gen_vpxor_xmm(env, s, modrm) gen_gvec_ld_modrm_vxmm((env), (s), (modrm), MO_64, tcg_gen_gvec_xor, 0123)
+#define gen_vpxor_ymm(env, s, modrm) gen_gvec_ld_modrm_vymm((env), (s), (modrm), MO_64, tcg_gen_gvec_xor, 0123)
+#define gen_xorps_xmm  gen_pxor_xmm
+#define gen_vxorps_xmm gen_vpxor_xmm
+#define gen_vxorps_ymm gen_vpxor_ymm
+#define gen_xorpd_xmm  gen_pxor_xmm
+#define gen_vxorpd_xmm gen_vpxor_xmm
+#define gen_vxorpd_ymm gen_vpxor_ymm
+
 static void gen_sse(CPUX86State *env, DisasContext *s, int b)
 {
     int b1, op1_offset, op2_offset, is_xmm, val;
@@ -3301,6 +3312,17 @@ static void gen_sse(CPUX86State *env, DisasContext *s, int b)
     case 0x56 | M_0F | P_66 | VEX_128: gen_vorpd_xmm(env, s, modrm); return;
     case 0x56 | M_0F | P_66 | VEX_256: gen_vorpd_ymm(env, s, modrm); return;
 
+    case 0xef | M_0F:                  gen_pxor_mm(env, s, modrm); return;
+    case 0xef | M_0F | P_66:           gen_pxor_xmm(env, s, modrm); return;
+    case 0xef | M_0F | P_66 | VEX_128: gen_vpxor_xmm(env, s, modrm); return;
+    case 0xef | M_0F | P_66 | VEX_256: gen_vpxor_ymm(env, s, modrm); return;
+    case 0x57 | M_0F:                  gen_xorps_xmm(env, s, modrm); return;
+    case 0x57 | M_0F | VEX_128:        gen_vxorps_xmm(env, s, modrm); return;
+    case 0x57 | M_0F | VEX_256:        gen_vxorps_ymm(env, s, modrm); return;
+    case 0x57 | M_0F | P_66:           gen_xorpd_xmm(env, s, modrm); return;
+    case 0x57 | M_0F | P_66 | VEX_128: gen_vxorpd_xmm(env, s, modrm); return;
+    case 0x57 | M_0F | P_66 | VEX_256: gen_vxorpd_ymm(env, s, modrm); return;
+
     default: break;
     }
 
-- 
2.20.1

[Qemu-devel] [RFC PATCH v1 11/22] target/i386: reimplement (V)PANDN, (V)ANDNPS, (V)ANDNPD

[Jan Bobek]

Use the gvec infrastructure to achieve the desired functionality.

Signed-off-by: Jan Bobek <jan.bobek@gmail.com>
---
 target/i386/ops_sse.h        |  4 ----
 target/i386/ops_sse_header.h |  2 --
 target/i386/translate.c      | 26 ++++++++++++++++++++++++--
 3 files changed, 24 insertions(+), 8 deletions(-)

diff --git a/target/i386/ops_sse.h b/target/i386/ops_sse.h
index 68dbeda047..84562a4536 100644
--- a/target/i386/ops_sse.h
+++ b/target/i386/ops_sse.h
@@ -353,8 +353,6 @@ static inline int satsw(int x)
 #define FMAXUB(a, b) ((a) > (b)) ? (a) : (b)
 #define FMAXSW(a, b) ((int16_t)(a) > (int16_t)(b)) ? (a) : (b)
 
-#define FANDN(a, b) ((~(a)) & (b))
-
 #define FCMPGTB(a, b) ((int8_t)(a) > (int8_t)(b) ? -1 : 0)
 #define FCMPGTW(a, b) ((int16_t)(a) > (int16_t)(b) ? -1 : 0)
 #define FCMPGTL(a, b) ((int32_t)(a) > (int32_t)(b) ? -1 : 0)
@@ -394,8 +392,6 @@ SSE_HELPER_B(helper_pmaxub, FMAXUB)
 SSE_HELPER_W(helper_pminsw, FMINSW)
 SSE_HELPER_W(helper_pmaxsw, FMAXSW)
 
-SSE_HELPER_Q(helper_pandn, FANDN)
-
 SSE_HELPER_B(helper_pcmpgtb, FCMPGTB)
 SSE_HELPER_W(helper_pcmpgtw, FCMPGTW)
 SSE_HELPER_L(helper_pcmpgtl, FCMPGTL)
diff --git a/target/i386/ops_sse_header.h b/target/i386/ops_sse_header.h
index a98b9f8f3f..abd00ca69d 100644
--- a/target/i386/ops_sse_header.h
+++ b/target/i386/ops_sse_header.h
@@ -86,8 +86,6 @@ SSE_HELPER_B(pmaxub, FMAXUB)
 SSE_HELPER_W(pminsw, FMINSW)
 SSE_HELPER_W(pmaxsw, FMAXSW)
 
-SSE_HELPER_Q(pandn, FANDN)
-
 SSE_HELPER_B(pcmpgtb, FCMPGTB)
 SSE_HELPER_W(pcmpgtw, FCMPGTW)
 SSE_HELPER_L(pcmpgtl, FCMPGTL)
diff --git a/target/i386/translate.c b/target/i386/translate.c
index cfe285e3e5..69e9514679 100644
--- a/target/i386/translate.c
+++ b/target/i386/translate.c
@@ -2757,7 +2757,7 @@ static const SSEFunc_0_epp sse_op_table1[256][4] = {
     [0x52] = { gen_helper_rsqrtps, NULL, gen_helper_rsqrtss, NULL },
     [0x53] = { gen_helper_rcpps, NULL, gen_helper_rcpss, NULL },
     [0x54] = { SSE_TOMBSTONE, SSE_TOMBSTONE }, /* andps, andpd */
-    [0x55] = { gen_helper_pandn_xmm, gen_helper_pandn_xmm }, /* andnps, andnpd */
+    [0x55] = { SSE_TOMBSTONE, SSE_TOMBSTONE }, /* andnps, andnpd */
     [0x56] = { SSE_TOMBSTONE, SSE_TOMBSTONE }, /* orps, orpd */
     [0x57] = { SSE_TOMBSTONE, SSE_TOMBSTONE }, /* xorps, xorpd */
     [0x58] = SSE_FOP(add),
@@ -2829,7 +2829,7 @@ static const SSEFunc_0_epp sse_op_table1[256][4] = {
     [0xdc] = MMX_OP2(paddusb),
     [0xdd] = MMX_OP2(paddusw),
     [0xde] = MMX_OP2(pmaxub),
-    [0xdf] = MMX_OP2(pandn),
+    [0xdf] = { SSE_TOMBSTONE, SSE_TOMBSTONE },
     [0xe0] = MMX_OP2(pavgb),
     [0xe1] = MMX_OP2(psraw),
     [0xe2] = MMX_OP2(psrad),
@@ -3177,6 +3177,17 @@ static inline void gen_gvec_ld_modrm_3(CPUX86State *env, DisasContext *s,
 #define gen_vandpd_xmm gen_vpand_xmm
 #define gen_vandpd_ymm gen_vpand_ymm
 
+#define gen_pandn_mm(env, s, modrm)   gen_gvec_ld_modrm_mm  ((env), (s), (modrm), MO_64, tcg_gen_gvec_andc, 0121)
+#define gen_pandn_xmm(env, s, modrm)  gen_gvec_ld_modrm_xmm ((env), (s), (modrm), MO_64, tcg_gen_gvec_andc, 0121)
+#define gen_vpandn_xmm(env, s, modrm) gen_gvec_ld_modrm_vxmm((env), (s), (modrm), MO_64, tcg_gen_gvec_andc, 0132)
+#define gen_vpandn_ymm(env, s, modrm) gen_gvec_ld_modrm_vymm((env), (s), (modrm), MO_64, tcg_gen_gvec_andc, 0132)
+#define gen_andnps_xmm  gen_pandn_xmm
+#define gen_vandnps_xmm gen_vpandn_xmm
+#define gen_vandnps_ymm gen_vpandn_ymm
+#define gen_andnpd_xmm  gen_pandn_xmm
+#define gen_vandnpd_xmm gen_vpandn_xmm
+#define gen_vandnpd_ymm gen_vpandn_ymm
+
 #define gen_por_mm(env, s, modrm)   gen_gvec_ld_modrm_mm  ((env), (s), (modrm), MO_64, tcg_gen_gvec_or, 0112)
 #define gen_por_xmm(env, s, modrm)  gen_gvec_ld_modrm_xmm ((env), (s), (modrm), MO_64, tcg_gen_gvec_or, 0112)
 #define gen_vpor_xmm(env, s, modrm) gen_gvec_ld_modrm_vxmm((env), (s), (modrm), MO_64, tcg_gen_gvec_or, 0123)
@@ -3301,6 +3312,17 @@ static void gen_sse(CPUX86State *env, DisasContext *s, int b)
     case 0x54 | M_0F | P_66 | VEX_128: gen_vandpd_xmm(env, s, modrm); return;
     case 0x54 | M_0F | P_66 | VEX_256: gen_vandpd_ymm(env, s, modrm); return;
 
+    case 0xdf | M_0F:                  gen_pandn_mm(env, s, modrm); return;
+    case 0xdf | M_0F | P_66:           gen_pandn_xmm(env, s, modrm); return;
+    case 0xdf | M_0F | P_66 | VEX_128: gen_vpandn_xmm(env, s, modrm); return;
+    case 0xdf | M_0F | P_66 | VEX_256: gen_vpandn_ymm(env, s, modrm); return;
+    case 0x55 | M_0F:                  gen_andnps_xmm(env, s, modrm); return;
+    case 0x55 | M_0F | VEX_128:        gen_vandnps_xmm(env, s, modrm); return;
+    case 0x55 | M_0F | VEX_256:        gen_vandnps_ymm(env, s, modrm); return;
+    case 0x55 | M_0F | P_66:           gen_andnpd_xmm(env, s, modrm); return;
+    case 0x55 | M_0F | P_66 | VEX_128: gen_vandnpd_xmm(env, s, modrm); return;
+    case 0x55 | M_0F | P_66 | VEX_256: gen_vandnpd_ymm(env, s, modrm); return;
+
     case 0xeb | M_0F:                  gen_por_mm(env, s, modrm); return;
     case 0xeb | M_0F | P_66:           gen_por_xmm(env, s, modrm); return;
     case 0xeb | M_0F | P_66 | VEX_128: gen_vpor_xmm(env, s, modrm); return;
-- 
2.20.1

[Qemu-devel] [RFC PATCH v1 12/22] target/i386: reimplement (V)PADD(B, W, D, Q)

[Jan Bobek]

Use the gvec infrastructure to achieve the desired functionality.

Signed-off-by: Jan Bobek <jan.bobek@gmail.com>
---
 target/i386/ops_sse.h        |  6 ------
 target/i386/ops_sse_header.h |  5 -----
 target/i386/translate.c      | 33 +++++++++++++++++++++++++++++----
 3 files changed, 29 insertions(+), 15 deletions(-)

diff --git a/target/i386/ops_sse.h b/target/i386/ops_sse.h
index 84562a4536..31a761a89a 100644
--- a/target/i386/ops_sse.h
+++ b/target/i386/ops_sse.h
@@ -337,7 +337,6 @@ static inline int satsw(int x)
     }
 }
 
-#define FADD(a, b) ((a) + (b))
 #define FADDUB(a, b) satub((a) + (b))
 #define FADDUW(a, b) satuw((a) + (b))
 #define FADDSB(a, b) satsb((int8_t)(a) + (int8_t)(b))
@@ -366,11 +365,6 @@ static inline int satsw(int x)
 #define FAVG(a, b) (((a) + (b) + 1) >> 1)
 #endif
 
-SSE_HELPER_B(helper_paddb, FADD)
-SSE_HELPER_W(helper_paddw, FADD)
-SSE_HELPER_L(helper_paddl, FADD)
-SSE_HELPER_Q(helper_paddq, FADD)
-
 SSE_HELPER_B(helper_psubb, FSUB)
 SSE_HELPER_W(helper_psubw, FSUB)
 SSE_HELPER_L(helper_psubl, FSUB)
diff --git a/target/i386/ops_sse_header.h b/target/i386/ops_sse_header.h
index abd00ca69d..5c69ab91d4 100644
--- a/target/i386/ops_sse_header.h
+++ b/target/i386/ops_sse_header.h
@@ -60,11 +60,6 @@ DEF_HELPER_3(glue(pslldq, SUFFIX), void, env, Reg, Reg)
 #define SSE_HELPER_Q(name, F)\
     DEF_HELPER_3(glue(name, SUFFIX), void, env, Reg, Reg)
 
-SSE_HELPER_B(paddb, FADD)
-SSE_HELPER_W(paddw, FADD)
-SSE_HELPER_L(paddl, FADD)
-SSE_HELPER_Q(paddq, FADD)
-
 SSE_HELPER_B(psubb, FSUB)
 SSE_HELPER_W(psubw, FSUB)
 SSE_HELPER_L(psubl, FSUB)
diff --git a/target/i386/translate.c b/target/i386/translate.c
index 69e9514679..1dbeb49066 100644
--- a/target/i386/translate.c
+++ b/target/i386/translate.c
@@ -2818,7 +2818,7 @@ static const SSEFunc_0_epp sse_op_table1[256][4] = {
     [0xd1] = MMX_OP2(psrlw),
     [0xd2] = MMX_OP2(psrld),
     [0xd3] = MMX_OP2(psrlq),
-    [0xd4] = MMX_OP2(paddq),
+    [0xd4] = { SSE_TOMBSTONE, SSE_TOMBSTONE },
     [0xd5] = MMX_OP2(pmullw),
     [0xd6] = { NULL, SSE_SPECIAL, SSE_SPECIAL, SSE_SPECIAL },
     [0xd7] = { SSE_SPECIAL, SSE_SPECIAL }, /* pmovmskb */
@@ -2859,9 +2859,9 @@ static const SSEFunc_0_epp sse_op_table1[256][4] = {
     [0xf9] = MMX_OP2(psubw),
     [0xfa] = MMX_OP2(psubl),
     [0xfb] = MMX_OP2(psubq),
-    [0xfc] = MMX_OP2(paddb),
-    [0xfd] = MMX_OP2(paddw),
-    [0xfe] = MMX_OP2(paddl),
+    [0xfc] = { SSE_TOMBSTONE, SSE_TOMBSTONE },
+    [0xfd] = { SSE_TOMBSTONE, SSE_TOMBSTONE },
+    [0xfe] = { SSE_TOMBSTONE, SSE_TOMBSTONE },
 };
 
 static const SSEFunc_0_epp sse_op_table2[3 * 8][2] = {
@@ -3166,6 +3166,11 @@ static inline void gen_gvec_ld_modrm_3(CPUX86State *env, DisasContext *s,
                         gen_ld_modrm_VxHxWx,                            \
                         gen_gvec_2_fp, (opctl))
 
+#define gen_padd_mm(env, s, modrm, vece)   gen_gvec_ld_modrm_mm  ((env), (s), (modrm), (vece), tcg_gen_gvec_add, 0112)
+#define gen_padd_xmm(env, s, modrm, vece)  gen_gvec_ld_modrm_xmm ((env), (s), (modrm), (vece), tcg_gen_gvec_add, 0112)
+#define gen_vpadd_xmm(env, s, modrm, vece) gen_gvec_ld_modrm_vxmm((env), (s), (modrm), (vece), tcg_gen_gvec_add, 0123)
+#define gen_vpadd_ymm(env, s, modrm, vece) gen_gvec_ld_modrm_vymm((env), (s), (modrm), (vece), tcg_gen_gvec_add, 0123)
+
 #define gen_pand_mm(env, s, modrm)   gen_gvec_ld_modrm_mm  ((env), (s), (modrm), MO_64, tcg_gen_gvec_and, 0112)
 #define gen_pand_xmm(env, s, modrm)  gen_gvec_ld_modrm_xmm ((env), (s), (modrm), MO_64, tcg_gen_gvec_and, 0112)
 #define gen_vpand_xmm(env, s, modrm) gen_gvec_ld_modrm_vxmm((env), (s), (modrm), MO_64, tcg_gen_gvec_and, 0123)
@@ -3301,6 +3306,26 @@ static void gen_sse(CPUX86State *env, DisasContext *s, int b)
            | (s->prefix & PREFIX_REPZ ? P_F3 : 0)
            | (s->prefix & PREFIX_REPNZ ? P_F2 : 0)
            | (s->prefix & PREFIX_VEX ? (s->vex_l ? VEX_256 : VEX_128) : 0)) {
+    case 0xfc | M_0F:                  gen_padd_mm(env, s, modrm, MO_8); return;
+    case 0xfc | M_0F | P_66:           gen_padd_xmm(env, s, modrm, MO_8); return;
+    case 0xfc | M_0F | P_66 | VEX_128: gen_vpadd_xmm(env, s, modrm, MO_8); return;
+    case 0xfc | M_0F | P_66 | VEX_256: gen_vpadd_ymm(env, s, modrm, MO_8); return;
+
+    case 0xfd | M_0F:                  gen_padd_mm(env, s, modrm, MO_16); return;
+    case 0xfd | M_0F | P_66:           gen_padd_xmm(env, s, modrm, MO_16); return;
+    case 0xfd | M_0F | P_66 | VEX_128: gen_vpadd_xmm(env, s, modrm, MO_16); return;
+    case 0xfd | M_0F | P_66 | VEX_256: gen_vpadd_ymm(env, s, modrm, MO_16); return;
+
+    case 0xfe | M_0F:                  gen_padd_mm(env, s, modrm, MO_32); return;
+    case 0xfe | M_0F | P_66:           gen_padd_xmm(env, s, modrm, MO_32); return;
+    case 0xfe | M_0F | P_66 | VEX_128: gen_vpadd_xmm(env, s, modrm, MO_32); return;
+    case 0xfe | M_0F | P_66 | VEX_256: gen_vpadd_ymm(env, s, modrm, MO_32); return;
+
+    case 0xd4 | M_0F:                  gen_padd_mm(env, s, modrm, MO_64); return;
+    case 0xd4 | M_0F | P_66:           gen_padd_xmm(env, s, modrm, MO_64); return;
+    case 0xd4 | M_0F | P_66 | VEX_128: gen_vpadd_xmm(env, s, modrm, MO_64); return;
+    case 0xd4 | M_0F | P_66 | VEX_256: gen_vpadd_ymm(env, s, modrm, MO_64); return;
+
     case 0xdb | M_0F:                  gen_pand_mm(env, s, modrm); return;
     case 0xdb | M_0F | P_66:           gen_pand_xmm(env, s, modrm); return;
     case 0xdb | M_0F | P_66 | VEX_128: gen_vpand_xmm(env, s, modrm); return;
-- 
2.20.1

[Qemu-devel] [RFC PATCH v1 13/22] target/i386: reimplement (V)PSUB(B, W, D, Q)

[Jan Bobek]

Use the gvec infrastructure to achieve the desired functionality.

Signed-off-by: Jan Bobek <jan.bobek@gmail.com>
---
 target/i386/ops_sse.h        |  6 ------
 target/i386/ops_sse_header.h |  5 -----
 target/i386/translate.c      | 33 +++++++++++++++++++++++++++++----
 3 files changed, 29 insertions(+), 15 deletions(-)

diff --git a/target/i386/ops_sse.h b/target/i386/ops_sse.h
index 31a761a89a..59935a65be 100644
--- a/target/i386/ops_sse.h
+++ b/target/i386/ops_sse.h
@@ -342,7 +342,6 @@ static inline int satsw(int x)
 #define FADDSB(a, b) satsb((int8_t)(a) + (int8_t)(b))
 #define FADDSW(a, b) satsw((int16_t)(a) + (int16_t)(b))
 
-#define FSUB(a, b) ((a) - (b))
 #define FSUBUB(a, b) satub((a) - (b))
 #define FSUBUW(a, b) satuw((a) - (b))
 #define FSUBSB(a, b) satsb((int8_t)(a) - (int8_t)(b))
@@ -365,11 +364,6 @@ static inline int satsw(int x)
 #define FAVG(a, b) (((a) + (b) + 1) >> 1)
 #endif
 
-SSE_HELPER_B(helper_psubb, FSUB)
-SSE_HELPER_W(helper_psubw, FSUB)
-SSE_HELPER_L(helper_psubl, FSUB)
-SSE_HELPER_Q(helper_psubq, FSUB)
-
 SSE_HELPER_B(helper_paddusb, FADDUB)
 SSE_HELPER_B(helper_paddsb, FADDSB)
 SSE_HELPER_B(helper_psubusb, FSUBUB)
diff --git a/target/i386/ops_sse_header.h b/target/i386/ops_sse_header.h
index 5c69ab91d4..bcdbac99a0 100644
--- a/target/i386/ops_sse_header.h
+++ b/target/i386/ops_sse_header.h
@@ -60,11 +60,6 @@ DEF_HELPER_3(glue(pslldq, SUFFIX), void, env, Reg, Reg)
 #define SSE_HELPER_Q(name, F)\
     DEF_HELPER_3(glue(name, SUFFIX), void, env, Reg, Reg)
 
-SSE_HELPER_B(psubb, FSUB)
-SSE_HELPER_W(psubw, FSUB)
-SSE_HELPER_L(psubl, FSUB)
-SSE_HELPER_Q(psubq, FSUB)
-
 SSE_HELPER_B(paddusb, FADDUB)
 SSE_HELPER_B(paddsb, FADDSB)
 SSE_HELPER_B(psubusb, FSUBUB)
diff --git a/target/i386/translate.c b/target/i386/translate.c
index 1dbeb49066..6f4dfd06a1 100644
--- a/target/i386/translate.c
+++ b/target/i386/translate.c
@@ -2855,10 +2855,10 @@ static const SSEFunc_0_epp sse_op_table1[256][4] = {
     [0xf6] = MMX_OP2(psadbw),
     [0xf7] = { (SSEFunc_0_epp)gen_helper_maskmov_mmx,
                (SSEFunc_0_epp)gen_helper_maskmov_xmm }, /* XXX: casts */
-    [0xf8] = MMX_OP2(psubb),
-    [0xf9] = MMX_OP2(psubw),
-    [0xfa] = MMX_OP2(psubl),
-    [0xfb] = MMX_OP2(psubq),
+    [0xf8] = { SSE_TOMBSTONE, SSE_TOMBSTONE },
+    [0xf9] = { SSE_TOMBSTONE, SSE_TOMBSTONE },
+    [0xfa] = { SSE_TOMBSTONE, SSE_TOMBSTONE },
+    [0xfb] = { SSE_TOMBSTONE, SSE_TOMBSTONE },
     [0xfc] = { SSE_TOMBSTONE, SSE_TOMBSTONE },
     [0xfd] = { SSE_TOMBSTONE, SSE_TOMBSTONE },
     [0xfe] = { SSE_TOMBSTONE, SSE_TOMBSTONE },
@@ -3171,6 +3171,11 @@ static inline void gen_gvec_ld_modrm_3(CPUX86State *env, DisasContext *s,
 #define gen_vpadd_xmm(env, s, modrm, vece) gen_gvec_ld_modrm_vxmm((env), (s), (modrm), (vece), tcg_gen_gvec_add, 0123)
 #define gen_vpadd_ymm(env, s, modrm, vece) gen_gvec_ld_modrm_vymm((env), (s), (modrm), (vece), tcg_gen_gvec_add, 0123)
 
+#define gen_psub_mm(env, s, modrm, vece)   gen_gvec_ld_modrm_mm  ((env), (s), (modrm), (vece), tcg_gen_gvec_sub, 0112)
+#define gen_psub_xmm(env, s, modrm, vece)  gen_gvec_ld_modrm_xmm ((env), (s), (modrm), (vece), tcg_gen_gvec_sub, 0112)
+#define gen_vpsub_xmm(env, s, modrm, vece) gen_gvec_ld_modrm_vxmm((env), (s), (modrm), (vece), tcg_gen_gvec_sub, 0123)
+#define gen_vpsub_ymm(env, s, modrm, vece) gen_gvec_ld_modrm_vymm((env), (s), (modrm), (vece), tcg_gen_gvec_sub, 0123)
+
 #define gen_pand_mm(env, s, modrm)   gen_gvec_ld_modrm_mm  ((env), (s), (modrm), MO_64, tcg_gen_gvec_and, 0112)
 #define gen_pand_xmm(env, s, modrm)  gen_gvec_ld_modrm_xmm ((env), (s), (modrm), MO_64, tcg_gen_gvec_and, 0112)
 #define gen_vpand_xmm(env, s, modrm) gen_gvec_ld_modrm_vxmm((env), (s), (modrm), MO_64, tcg_gen_gvec_and, 0123)
@@ -3326,6 +3331,26 @@ static void gen_sse(CPUX86State *env, DisasContext *s, int b)
     case 0xd4 | M_0F | P_66 | VEX_128: gen_vpadd_xmm(env, s, modrm, MO_64); return;
     case 0xd4 | M_0F | P_66 | VEX_256: gen_vpadd_ymm(env, s, modrm, MO_64); return;
 
+    case 0xf8 | M_0F:                  gen_psub_mm(env, s, modrm, MO_8); return;
+    case 0xf8 | M_0F | P_66:           gen_psub_xmm(env, s, modrm, MO_8); return;
+    case 0xf8 | M_0F | P_66 | VEX_128: gen_vpsub_xmm(env, s, modrm, MO_8); return;
+    case 0xf8 | M_0F | P_66 | VEX_256: gen_vpsub_ymm(env, s, modrm, MO_8); return;
+
+    case 0xf9 | M_0F:                  gen_psub_mm(env, s, modrm, MO_16); return;
+    case 0xf9 | M_0F | P_66:           gen_psub_xmm(env, s, modrm, MO_16); return;
+    case 0xf9 | M_0F | P_66 | VEX_128: gen_vpsub_xmm(env, s, modrm, MO_16); return;
+    case 0xf9 | M_0F | P_66 | VEX_256: gen_vpsub_ymm(env, s, modrm, MO_16); return;
+
+    case 0xfa | M_0F:                  gen_psub_mm(env, s, modrm, MO_32); return;
+    case 0xfa | M_0F | P_66:           gen_psub_xmm(env, s, modrm, MO_32); return;
+    case 0xfa | M_0F | P_66 | VEX_128: gen_vpsub_xmm(env, s, modrm, MO_32); return;
+    case 0xfa | M_0F | P_66 | VEX_256: gen_vpsub_ymm(env, s, modrm, MO_32); return;
+
+    case 0xfb | M_0F:                  gen_psub_mm(env, s, modrm, MO_64); return;
+    case 0xfb | M_0F | P_66:           gen_psub_xmm(env, s, modrm, MO_64); return;
+    case 0xfb | M_0F | P_66 | VEX_128: gen_vpsub_xmm(env, s, modrm, MO_64); return;
+    case 0xfb | M_0F | P_66 | VEX_256: gen_vpsub_ymm(env, s, modrm, MO_64); return;
+
     case 0xdb | M_0F:                  gen_pand_mm(env, s, modrm); return;
     case 0xdb | M_0F | P_66:           gen_pand_xmm(env, s, modrm); return;
     case 0xdb | M_0F | P_66 | VEX_128: gen_vpand_xmm(env, s, modrm); return;
-- 
2.20.1

[Qemu-devel] [RFC PATCH v1 14/22] target/i386: reimplement (V)PADDS(B, W)

[Jan Bobek]

Use the gvec infrastructure to achieve the desired functionality.

Signed-off-by: Jan Bobek <jan.bobek@gmail.com>
---
 target/i386/ops_sse.h        |  4 ----
 target/i386/ops_sse_header.h |  2 --
 target/i386/translate.c      | 19 +++++++++++++++++--
 3 files changed, 17 insertions(+), 8 deletions(-)

diff --git a/target/i386/ops_sse.h b/target/i386/ops_sse.h
index 59935a65be..8829dcb781 100644
--- a/target/i386/ops_sse.h
+++ b/target/i386/ops_sse.h
@@ -339,8 +339,6 @@ static inline int satsw(int x)
 
 #define FADDUB(a, b) satub((a) + (b))
 #define FADDUW(a, b) satuw((a) + (b))
-#define FADDSB(a, b) satsb((int8_t)(a) + (int8_t)(b))
-#define FADDSW(a, b) satsw((int16_t)(a) + (int16_t)(b))
 
 #define FSUBUB(a, b) satub((a) - (b))
 #define FSUBUW(a, b) satuw((a) - (b))
@@ -365,12 +363,10 @@ static inline int satsw(int x)
 #endif
 
 SSE_HELPER_B(helper_paddusb, FADDUB)
-SSE_HELPER_B(helper_paddsb, FADDSB)
 SSE_HELPER_B(helper_psubusb, FSUBUB)
 SSE_HELPER_B(helper_psubsb, FSUBSB)
 
 SSE_HELPER_W(helper_paddusw, FADDUW)
-SSE_HELPER_W(helper_paddsw, FADDSW)
 SSE_HELPER_W(helper_psubusw, FSUBUW)
 SSE_HELPER_W(helper_psubsw, FSUBSW)
 
diff --git a/target/i386/ops_sse_header.h b/target/i386/ops_sse_header.h
index bcdbac99a0..78203e80a5 100644
--- a/target/i386/ops_sse_header.h
+++ b/target/i386/ops_sse_header.h
@@ -61,12 +61,10 @@ DEF_HELPER_3(glue(pslldq, SUFFIX), void, env, Reg, Reg)
     DEF_HELPER_3(glue(name, SUFFIX), void, env, Reg, Reg)
 
 SSE_HELPER_B(paddusb, FADDUB)
-SSE_HELPER_B(paddsb, FADDSB)
 SSE_HELPER_B(psubusb, FSUBUB)
 SSE_HELPER_B(psubsb, FSUBSB)
 
 SSE_HELPER_W(paddusw, FADDUW)
-SSE_HELPER_W(paddsw, FADDSW)
 SSE_HELPER_W(psubusw, FSUBUW)
 SSE_HELPER_W(psubsw, FSUBSW)
 
diff --git a/target/i386/translate.c b/target/i386/translate.c
index 6f4dfd06a1..5ea5014d99 100644
--- a/target/i386/translate.c
+++ b/target/i386/translate.c
@@ -2842,8 +2842,8 @@ static const SSEFunc_0_epp sse_op_table1[256][4] = {
     [0xe9] = MMX_OP2(psubsw),
     [0xea] = MMX_OP2(pminsw),
     [0xeb] = { SSE_TOMBSTONE, SSE_TOMBSTONE },
-    [0xec] = MMX_OP2(paddsb),
-    [0xed] = MMX_OP2(paddsw),
+    [0xec] = { SSE_TOMBSTONE, SSE_TOMBSTONE },
+    [0xed] = { SSE_TOMBSTONE, SSE_TOMBSTONE },
     [0xee] = MMX_OP2(pmaxsw),
     [0xef] = { SSE_TOMBSTONE, SSE_TOMBSTONE },
     [0xf0] = { NULL, NULL, NULL, SSE_SPECIAL }, /* lddqu */
@@ -3171,6 +3171,11 @@ static inline void gen_gvec_ld_modrm_3(CPUX86State *env, DisasContext *s,
 #define gen_vpadd_xmm(env, s, modrm, vece) gen_gvec_ld_modrm_vxmm((env), (s), (modrm), (vece), tcg_gen_gvec_add, 0123)
 #define gen_vpadd_ymm(env, s, modrm, vece) gen_gvec_ld_modrm_vymm((env), (s), (modrm), (vece), tcg_gen_gvec_add, 0123)
 
+#define gen_padds_mm(env, s, modrm, vece)   gen_gvec_ld_modrm_mm  ((env), (s), (modrm), (vece), tcg_gen_gvec_ssadd, 0112)
+#define gen_padds_xmm(env, s, modrm, vece)  gen_gvec_ld_modrm_xmm ((env), (s), (modrm), (vece), tcg_gen_gvec_ssadd, 0112)
+#define gen_vpadds_xmm(env, s, modrm, vece) gen_gvec_ld_modrm_vxmm((env), (s), (modrm), (vece), tcg_gen_gvec_ssadd, 0123)
+#define gen_vpadds_ymm(env, s, modrm, vece) gen_gvec_ld_modrm_vymm((env), (s), (modrm), (vece), tcg_gen_gvec_ssadd, 0123)
+
 #define gen_psub_mm(env, s, modrm, vece)   gen_gvec_ld_modrm_mm  ((env), (s), (modrm), (vece), tcg_gen_gvec_sub, 0112)
 #define gen_psub_xmm(env, s, modrm, vece)  gen_gvec_ld_modrm_xmm ((env), (s), (modrm), (vece), tcg_gen_gvec_sub, 0112)
 #define gen_vpsub_xmm(env, s, modrm, vece) gen_gvec_ld_modrm_vxmm((env), (s), (modrm), (vece), tcg_gen_gvec_sub, 0123)
@@ -3331,6 +3336,16 @@ static void gen_sse(CPUX86State *env, DisasContext *s, int b)
     case 0xd4 | M_0F | P_66 | VEX_128: gen_vpadd_xmm(env, s, modrm, MO_64); return;
     case 0xd4 | M_0F | P_66 | VEX_256: gen_vpadd_ymm(env, s, modrm, MO_64); return;
 
+    case 0xec | M_0F:                  gen_padds_mm(env, s, modrm, MO_8); return;
+    case 0xec | M_0F | P_66:           gen_padds_xmm(env, s, modrm, MO_8); return;
+    case 0xec | M_0F | P_66 | VEX_128: gen_vpadds_xmm(env, s, modrm, MO_8); return;
+    case 0xec | M_0F | P_66 | VEX_256: gen_vpadds_ymm(env, s, modrm, MO_8); return;
+
+    case 0xed | M_0F:                  gen_padds_mm(env, s, modrm, MO_16); return;
+    case 0xed | M_0F | P_66:           gen_padds_xmm(env, s, modrm, MO_16); return;
+    case 0xed | M_0F | P_66 | VEX_128: gen_vpadds_xmm(env, s, modrm, MO_16); return;
+    case 0xed | M_0F | P_66 | VEX_256: gen_vpadds_ymm(env, s, modrm, MO_16); return;
+
     case 0xf8 | M_0F:                  gen_psub_mm(env, s, modrm, MO_8); return;
     case 0xf8 | M_0F | P_66:           gen_psub_xmm(env, s, modrm, MO_8); return;
     case 0xf8 | M_0F | P_66 | VEX_128: gen_vpsub_xmm(env, s, modrm, MO_8); return;
-- 
2.20.1

[Qemu-devel] [RFC PATCH v1 15/22] target/i386: reimplement (V)PADDUS(B, W)

[Jan Bobek]

Use the gvec infrastructure to achieve the desired functionality.

Signed-off-by: Jan Bobek <jan.bobek@gmail.com>
---
 target/i386/ops_sse.h        |  5 -----
 target/i386/ops_sse_header.h |  2 --
 target/i386/translate.c      | 19 +++++++++++++++++--
 3 files changed, 17 insertions(+), 9 deletions(-)

diff --git a/target/i386/ops_sse.h b/target/i386/ops_sse.h
index 8829dcb781..8c9b47fca4 100644
--- a/target/i386/ops_sse.h
+++ b/target/i386/ops_sse.h
@@ -337,9 +337,6 @@ static inline int satsw(int x)
     }
 }
 
-#define FADDUB(a, b) satub((a) + (b))
-#define FADDUW(a, b) satuw((a) + (b))
-
 #define FSUBUB(a, b) satub((a) - (b))
 #define FSUBUW(a, b) satuw((a) - (b))
 #define FSUBSB(a, b) satsb((int8_t)(a) - (int8_t)(b))
@@ -362,11 +359,9 @@ static inline int satsw(int x)
 #define FAVG(a, b) (((a) + (b) + 1) >> 1)
 #endif
 
-SSE_HELPER_B(helper_paddusb, FADDUB)
 SSE_HELPER_B(helper_psubusb, FSUBUB)
 SSE_HELPER_B(helper_psubsb, FSUBSB)
 
-SSE_HELPER_W(helper_paddusw, FADDUW)
 SSE_HELPER_W(helper_psubusw, FSUBUW)
 SSE_HELPER_W(helper_psubsw, FSUBSW)
 
diff --git a/target/i386/ops_sse_header.h b/target/i386/ops_sse_header.h
index 78203e80a5..8a31ade70c 100644
--- a/target/i386/ops_sse_header.h
+++ b/target/i386/ops_sse_header.h
@@ -60,11 +60,9 @@ DEF_HELPER_3(glue(pslldq, SUFFIX), void, env, Reg, Reg)
 #define SSE_HELPER_Q(name, F)\
     DEF_HELPER_3(glue(name, SUFFIX), void, env, Reg, Reg)
 
-SSE_HELPER_B(paddusb, FADDUB)
 SSE_HELPER_B(psubusb, FSUBUB)
 SSE_HELPER_B(psubsb, FSUBSB)
 
-SSE_HELPER_W(paddusw, FADDUW)
 SSE_HELPER_W(psubusw, FSUBUW)
 SSE_HELPER_W(psubsw, FSUBSW)
 
diff --git a/target/i386/translate.c b/target/i386/translate.c
index 5ea5014d99..e2ed8c20b3 100644
--- a/target/i386/translate.c
+++ b/target/i386/translate.c
@@ -2826,8 +2826,8 @@ static const SSEFunc_0_epp sse_op_table1[256][4] = {
     [0xd9] = MMX_OP2(psubusw),
     [0xda] = MMX_OP2(pminub),
     [0xdb] = { SSE_TOMBSTONE, SSE_TOMBSTONE },
-    [0xdc] = MMX_OP2(paddusb),
-    [0xdd] = MMX_OP2(paddusw),
+    [0xdc] = { SSE_TOMBSTONE, SSE_TOMBSTONE },
+    [0xdd] = { SSE_TOMBSTONE, SSE_TOMBSTONE },
     [0xde] = MMX_OP2(pmaxub),
     [0xdf] = { SSE_TOMBSTONE, SSE_TOMBSTONE },
     [0xe0] = MMX_OP2(pavgb),
@@ -3176,6 +3176,11 @@ static inline void gen_gvec_ld_modrm_3(CPUX86State *env, DisasContext *s,
 #define gen_vpadds_xmm(env, s, modrm, vece) gen_gvec_ld_modrm_vxmm((env), (s), (modrm), (vece), tcg_gen_gvec_ssadd, 0123)
 #define gen_vpadds_ymm(env, s, modrm, vece) gen_gvec_ld_modrm_vymm((env), (s), (modrm), (vece), tcg_gen_gvec_ssadd, 0123)
 
+#define gen_paddus_mm(env, s, modrm, vece)   gen_gvec_ld_modrm_mm  ((env), (s), (modrm), (vece), tcg_gen_gvec_usadd, 0112)
+#define gen_paddus_xmm(env, s, modrm, vece)  gen_gvec_ld_modrm_xmm ((env), (s), (modrm), (vece), tcg_gen_gvec_usadd, 0112)
+#define gen_vpaddus_xmm(env, s, modrm, vece) gen_gvec_ld_modrm_vxmm((env), (s), (modrm), (vece), tcg_gen_gvec_usadd, 0123)
+#define gen_vpaddus_ymm(env, s, modrm, vece) gen_gvec_ld_modrm_vymm((env), (s), (modrm), (vece), tcg_gen_gvec_usadd, 0123)
+
 #define gen_psub_mm(env, s, modrm, vece)   gen_gvec_ld_modrm_mm  ((env), (s), (modrm), (vece), tcg_gen_gvec_sub, 0112)
 #define gen_psub_xmm(env, s, modrm, vece)  gen_gvec_ld_modrm_xmm ((env), (s), (modrm), (vece), tcg_gen_gvec_sub, 0112)
 #define gen_vpsub_xmm(env, s, modrm, vece) gen_gvec_ld_modrm_vxmm((env), (s), (modrm), (vece), tcg_gen_gvec_sub, 0123)
@@ -3336,6 +3341,16 @@ static void gen_sse(CPUX86State *env, DisasContext *s, int b)
     case 0xd4 | M_0F | P_66 | VEX_128: gen_vpadd_xmm(env, s, modrm, MO_64); return;
     case 0xd4 | M_0F | P_66 | VEX_256: gen_vpadd_ymm(env, s, modrm, MO_64); return;
 
+    case 0xdc | M_0F:                  gen_paddus_mm(env, s, modrm, MO_8); return;
+    case 0xdc | M_0F | P_66:           gen_paddus_xmm(env, s, modrm, MO_8); return;
+    case 0xdc | M_0F | P_66 | VEX_128: gen_vpaddus_xmm(env, s, modrm, MO_8); return;
+    case 0xdc | M_0F | P_66 | VEX_256: gen_vpaddus_ymm(env, s, modrm, MO_8); return;
+
+    case 0xdd | M_0F:                  gen_paddus_mm(env, s, modrm, MO_16); return;
+    case 0xdd | M_0F | P_66:           gen_paddus_xmm(env, s, modrm, MO_16); return;
+    case 0xdd | M_0F | P_66 | VEX_128: gen_vpaddus_xmm(env, s, modrm, MO_16); return;
+    case 0xdd | M_0F | P_66 | VEX_256: gen_vpaddus_ymm(env, s, modrm, MO_16); return;
+
     case 0xec | M_0F:                  gen_padds_mm(env, s, modrm, MO_8); return;
     case 0xec | M_0F | P_66:           gen_padds_xmm(env, s, modrm, MO_8); return;
     case 0xec | M_0F | P_66 | VEX_128: gen_vpadds_xmm(env, s, modrm, MO_8); return;
-- 
2.20.1

[Qemu-devel] [RFC PATCH v1 16/22] target/i386: reimplement (V)PSUBS(B, W)

[Jan Bobek]

Use the gvec infrastructure to achieve the desired functionality.

Signed-off-by: Jan Bobek <jan.bobek@gmail.com>
---
 target/i386/ops_sse.h        |  4 ----
 target/i386/ops_sse_header.h |  2 --
 target/i386/translate.c      | 19 +++++++++++++++++--
 3 files changed, 17 insertions(+), 8 deletions(-)

diff --git a/target/i386/ops_sse.h b/target/i386/ops_sse.h
index 8c9b47fca4..f948adbc68 100644
--- a/target/i386/ops_sse.h
+++ b/target/i386/ops_sse.h
@@ -339,8 +339,6 @@ static inline int satsw(int x)
 
 #define FSUBUB(a, b) satub((a) - (b))
 #define FSUBUW(a, b) satuw((a) - (b))
-#define FSUBSB(a, b) satsb((int8_t)(a) - (int8_t)(b))
-#define FSUBSW(a, b) satsw((int16_t)(a) - (int16_t)(b))
 #define FMINUB(a, b) ((a) < (b)) ? (a) : (b)
 #define FMINSW(a, b) ((int16_t)(a) < (int16_t)(b)) ? (a) : (b)
 #define FMAXUB(a, b) ((a) > (b)) ? (a) : (b)
@@ -360,10 +358,8 @@ static inline int satsw(int x)
 #endif
 
 SSE_HELPER_B(helper_psubusb, FSUBUB)
-SSE_HELPER_B(helper_psubsb, FSUBSB)
 
 SSE_HELPER_W(helper_psubusw, FSUBUW)
-SSE_HELPER_W(helper_psubsw, FSUBSW)
 
 SSE_HELPER_B(helper_pminub, FMINUB)
 SSE_HELPER_B(helper_pmaxub, FMAXUB)
diff --git a/target/i386/ops_sse_header.h b/target/i386/ops_sse_header.h
index 8a31ade70c..20fb8aeccc 100644
--- a/target/i386/ops_sse_header.h
+++ b/target/i386/ops_sse_header.h
@@ -61,10 +61,8 @@ DEF_HELPER_3(glue(pslldq, SUFFIX), void, env, Reg, Reg)
     DEF_HELPER_3(glue(name, SUFFIX), void, env, Reg, Reg)
 
 SSE_HELPER_B(psubusb, FSUBUB)
-SSE_HELPER_B(psubsb, FSUBSB)
 
 SSE_HELPER_W(psubusw, FSUBUW)
-SSE_HELPER_W(psubsw, FSUBSW)
 
 SSE_HELPER_B(pminub, FMINUB)
 SSE_HELPER_B(pmaxub, FMAXUB)
diff --git a/target/i386/translate.c b/target/i386/translate.c
index e2ed8c20b3..894471861d 100644
--- a/target/i386/translate.c
+++ b/target/i386/translate.c
@@ -2838,8 +2838,8 @@ static const SSEFunc_0_epp sse_op_table1[256][4] = {
     [0xe5] = MMX_OP2(pmulhw),
     [0xe6] = { NULL, gen_helper_cvttpd2dq, gen_helper_cvtdq2pd, gen_helper_cvtpd2dq },
     [0xe7] = { SSE_SPECIAL , SSE_SPECIAL },  /* movntq, movntq */
-    [0xe8] = MMX_OP2(psubsb),
-    [0xe9] = MMX_OP2(psubsw),
+    [0xe8] = { SSE_TOMBSTONE, SSE_TOMBSTONE },
+    [0xe9] = { SSE_TOMBSTONE, SSE_TOMBSTONE },
     [0xea] = MMX_OP2(pminsw),
     [0xeb] = { SSE_TOMBSTONE, SSE_TOMBSTONE },
     [0xec] = { SSE_TOMBSTONE, SSE_TOMBSTONE },
@@ -3186,6 +3186,11 @@ static inline void gen_gvec_ld_modrm_3(CPUX86State *env, DisasContext *s,
 #define gen_vpsub_xmm(env, s, modrm, vece) gen_gvec_ld_modrm_vxmm((env), (s), (modrm), (vece), tcg_gen_gvec_sub, 0123)
 #define gen_vpsub_ymm(env, s, modrm, vece) gen_gvec_ld_modrm_vymm((env), (s), (modrm), (vece), tcg_gen_gvec_sub, 0123)
 
+#define gen_psubs_mm(env, s, modrm, vece)   gen_gvec_ld_modrm_mm  ((env), (s), (modrm), (vece), tcg_gen_gvec_sssub, 0112)
+#define gen_psubs_xmm(env, s, modrm, vece)  gen_gvec_ld_modrm_xmm ((env), (s), (modrm), (vece), tcg_gen_gvec_sssub, 0112)
+#define gen_vpsubs_xmm(env, s, modrm, vece) gen_gvec_ld_modrm_vxmm((env), (s), (modrm), (vece), tcg_gen_gvec_sssub, 0123)
+#define gen_vpsubs_ymm(env, s, modrm, vece) gen_gvec_ld_modrm_vymm((env), (s), (modrm), (vece), tcg_gen_gvec_sssub, 0123)
+
 #define gen_pand_mm(env, s, modrm)   gen_gvec_ld_modrm_mm  ((env), (s), (modrm), MO_64, tcg_gen_gvec_and, 0112)
 #define gen_pand_xmm(env, s, modrm)  gen_gvec_ld_modrm_xmm ((env), (s), (modrm), MO_64, tcg_gen_gvec_and, 0112)
 #define gen_vpand_xmm(env, s, modrm) gen_gvec_ld_modrm_vxmm((env), (s), (modrm), MO_64, tcg_gen_gvec_and, 0123)
@@ -3381,6 +3386,16 @@ static void gen_sse(CPUX86State *env, DisasContext *s, int b)
     case 0xfb | M_0F | P_66 | VEX_128: gen_vpsub_xmm(env, s, modrm, MO_64); return;
     case 0xfb | M_0F | P_66 | VEX_256: gen_vpsub_ymm(env, s, modrm, MO_64); return;
 
+    case 0xe8 | M_0F:                  gen_psubs_mm(env, s, modrm, MO_8); return;
+    case 0xe8 | M_0F | P_66:           gen_psubs_xmm(env, s, modrm, MO_8); return;
+    case 0xe8 | M_0F | P_66 | VEX_128: gen_vpsubs_xmm(env, s, modrm, MO_8); return;
+    case 0xe8 | M_0F | P_66 | VEX_256: gen_vpsubs_ymm(env, s, modrm, MO_8); return;
+
+    case 0xe9 | M_0F:                  gen_psubs_mm(env, s, modrm, MO_16); return;
+    case 0xe9 | M_0F | P_66:           gen_psubs_xmm(env, s, modrm, MO_16); return;
+    case 0xe9 | M_0F | P_66 | VEX_128: gen_vpsubs_xmm(env, s, modrm, MO_16); return;
+    case 0xe9 | M_0F | P_66 | VEX_256: gen_vpsubs_ymm(env, s, modrm, MO_16); return;
+
     case 0xdb | M_0F:                  gen_pand_mm(env, s, modrm); return;
     case 0xdb | M_0F | P_66:           gen_pand_xmm(env, s, modrm); return;
     case 0xdb | M_0F | P_66 | VEX_128: gen_vpand_xmm(env, s, modrm); return;
-- 
2.20.1

[Qemu-devel] [RFC PATCH v1 17/22] target/i386: reimplement (V)PSUBUS(B, W)

[Jan Bobek]

Use the gvec infrastructure to achieve the desired functionality.

Signed-off-by: Jan Bobek <jan.bobek@gmail.com>
---
 target/i386/ops_sse.h        |  6 ------
 target/i386/ops_sse_header.h |  4 ----
 target/i386/translate.c      | 19 +++++++++++++++++--
 3 files changed, 17 insertions(+), 12 deletions(-)

diff --git a/target/i386/ops_sse.h b/target/i386/ops_sse.h
index f948adbc68..4f00f3273d 100644
--- a/target/i386/ops_sse.h
+++ b/target/i386/ops_sse.h
@@ -337,8 +337,6 @@ static inline int satsw(int x)
     }
 }
 
-#define FSUBUB(a, b) satub((a) - (b))
-#define FSUBUW(a, b) satuw((a) - (b))
 #define FMINUB(a, b) ((a) < (b)) ? (a) : (b)
 #define FMINSW(a, b) ((int16_t)(a) < (int16_t)(b)) ? (a) : (b)
 #define FMAXUB(a, b) ((a) > (b)) ? (a) : (b)
@@ -357,10 +355,6 @@ static inline int satsw(int x)
 #define FAVG(a, b) (((a) + (b) + 1) >> 1)
 #endif
 
-SSE_HELPER_B(helper_psubusb, FSUBUB)
-
-SSE_HELPER_W(helper_psubusw, FSUBUW)
-
 SSE_HELPER_B(helper_pminub, FMINUB)
 SSE_HELPER_B(helper_pmaxub, FMAXUB)
 
diff --git a/target/i386/ops_sse_header.h b/target/i386/ops_sse_header.h
index 20fb8aeccc..829c132ae4 100644
--- a/target/i386/ops_sse_header.h
+++ b/target/i386/ops_sse_header.h
@@ -60,10 +60,6 @@ DEF_HELPER_3(glue(pslldq, SUFFIX), void, env, Reg, Reg)
 #define SSE_HELPER_Q(name, F)\
     DEF_HELPER_3(glue(name, SUFFIX), void, env, Reg, Reg)
 
-SSE_HELPER_B(psubusb, FSUBUB)
-
-SSE_HELPER_W(psubusw, FSUBUW)
-
 SSE_HELPER_B(pminub, FMINUB)
 SSE_HELPER_B(pmaxub, FMAXUB)
 
diff --git a/target/i386/translate.c b/target/i386/translate.c
index 894471861d..5b19e9ac4b 100644
--- a/target/i386/translate.c
+++ b/target/i386/translate.c
@@ -2822,8 +2822,8 @@ static const SSEFunc_0_epp sse_op_table1[256][4] = {
     [0xd5] = MMX_OP2(pmullw),
     [0xd6] = { NULL, SSE_SPECIAL, SSE_SPECIAL, SSE_SPECIAL },
     [0xd7] = { SSE_SPECIAL, SSE_SPECIAL }, /* pmovmskb */
-    [0xd8] = MMX_OP2(psubusb),
-    [0xd9] = MMX_OP2(psubusw),
+    [0xd8] = { SSE_TOMBSTONE, SSE_TOMBSTONE },
+    [0xd9] = { SSE_TOMBSTONE, SSE_TOMBSTONE },
     [0xda] = MMX_OP2(pminub),
     [0xdb] = { SSE_TOMBSTONE, SSE_TOMBSTONE },
     [0xdc] = { SSE_TOMBSTONE, SSE_TOMBSTONE },
@@ -3191,6 +3191,11 @@ static inline void gen_gvec_ld_modrm_3(CPUX86State *env, DisasContext *s,
 #define gen_vpsubs_xmm(env, s, modrm, vece) gen_gvec_ld_modrm_vxmm((env), (s), (modrm), (vece), tcg_gen_gvec_sssub, 0123)
 #define gen_vpsubs_ymm(env, s, modrm, vece) gen_gvec_ld_modrm_vymm((env), (s), (modrm), (vece), tcg_gen_gvec_sssub, 0123)
 
+#define gen_psubus_mm(env, s, modrm, vece)   gen_gvec_ld_modrm_mm  ((env), (s), (modrm), (vece), tcg_gen_gvec_ussub, 0112)
+#define gen_psubus_xmm(env, s, modrm, vece)  gen_gvec_ld_modrm_xmm ((env), (s), (modrm), (vece), tcg_gen_gvec_ussub, 0112)
+#define gen_vpsubus_xmm(env, s, modrm, vece) gen_gvec_ld_modrm_vxmm((env), (s), (modrm), (vece), tcg_gen_gvec_ussub, 0123)
+#define gen_vpsubus_ymm(env, s, modrm, vece) gen_gvec_ld_modrm_vymm((env), (s), (modrm), (vece), tcg_gen_gvec_ussub, 0123)
+
 #define gen_pand_mm(env, s, modrm)   gen_gvec_ld_modrm_mm  ((env), (s), (modrm), MO_64, tcg_gen_gvec_and, 0112)
 #define gen_pand_xmm(env, s, modrm)  gen_gvec_ld_modrm_xmm ((env), (s), (modrm), MO_64, tcg_gen_gvec_and, 0112)
 #define gen_vpand_xmm(env, s, modrm) gen_gvec_ld_modrm_vxmm((env), (s), (modrm), MO_64, tcg_gen_gvec_and, 0123)
@@ -3386,6 +3391,16 @@ static void gen_sse(CPUX86State *env, DisasContext *s, int b)
     case 0xfb | M_0F | P_66 | VEX_128: gen_vpsub_xmm(env, s, modrm, MO_64); return;
     case 0xfb | M_0F | P_66 | VEX_256: gen_vpsub_ymm(env, s, modrm, MO_64); return;
 
+    case 0xd8 | M_0F:                  gen_psubus_mm(env, s, modrm, MO_8); return;
+    case 0xd8 | M_0F | P_66:           gen_psubus_xmm(env, s, modrm, MO_8); return;
+    case 0xd8 | M_0F | P_66 | VEX_128: gen_vpsubus_xmm(env, s, modrm, MO_8); return;
+    case 0xd8 | M_0F | P_66 | VEX_256: gen_vpsubus_ymm(env, s, modrm, MO_8); return;
+
+    case 0xd9 | M_0F:                  gen_psubus_mm(env, s, modrm, MO_16); return;
+    case 0xd9 | M_0F | P_66:           gen_psubus_xmm(env, s, modrm, MO_16); return;
+    case 0xd9 | M_0F | P_66 | VEX_128: gen_vpsubus_xmm(env, s, modrm, MO_16); return;
+    case 0xd9 | M_0F | P_66 | VEX_256: gen_vpsubus_ymm(env, s, modrm, MO_16); return;
+
     case 0xe8 | M_0F:                  gen_psubs_mm(env, s, modrm, MO_8); return;
     case 0xe8 | M_0F | P_66:           gen_psubs_xmm(env, s, modrm, MO_8); return;
     case 0xe8 | M_0F | P_66 | VEX_128: gen_vpsubs_xmm(env, s, modrm, MO_8); return;
-- 
2.20.1

[Qemu-devel] [RFC PATCH v1 18/22] target/i386: reimplement (V)PMINSW

[Jan Bobek]

Use the gvec infrastructure to achieve the desired functionality.

Signed-off-by: Jan Bobek <jan.bobek@gmail.com>
---
 target/i386/ops_sse.h        |  2 --
 target/i386/ops_sse_header.h |  1 -
 target/i386/translate.c      | 12 +++++++++++-
 3 files changed, 11 insertions(+), 4 deletions(-)

diff --git a/target/i386/ops_sse.h b/target/i386/ops_sse.h
index 4f00f3273d..f57eaa2c77 100644
--- a/target/i386/ops_sse.h
+++ b/target/i386/ops_sse.h
@@ -338,7 +338,6 @@ static inline int satsw(int x)
 }
 
 #define FMINUB(a, b) ((a) < (b)) ? (a) : (b)
-#define FMINSW(a, b) ((int16_t)(a) < (int16_t)(b)) ? (a) : (b)
 #define FMAXUB(a, b) ((a) > (b)) ? (a) : (b)
 #define FMAXSW(a, b) ((int16_t)(a) > (int16_t)(b)) ? (a) : (b)
 
@@ -358,7 +357,6 @@ static inline int satsw(int x)
 SSE_HELPER_B(helper_pminub, FMINUB)
 SSE_HELPER_B(helper_pmaxub, FMAXUB)
 
-SSE_HELPER_W(helper_pminsw, FMINSW)
 SSE_HELPER_W(helper_pmaxsw, FMAXSW)
 
 SSE_HELPER_B(helper_pcmpgtb, FCMPGTB)
diff --git a/target/i386/ops_sse_header.h b/target/i386/ops_sse_header.h
index 829c132ae4..a7f99e5427 100644
--- a/target/i386/ops_sse_header.h
+++ b/target/i386/ops_sse_header.h
@@ -63,7 +63,6 @@ DEF_HELPER_3(glue(pslldq, SUFFIX), void, env, Reg, Reg)
 SSE_HELPER_B(pminub, FMINUB)
 SSE_HELPER_B(pmaxub, FMAXUB)
 
-SSE_HELPER_W(pminsw, FMINSW)
 SSE_HELPER_W(pmaxsw, FMAXSW)
 
 SSE_HELPER_B(pcmpgtb, FCMPGTB)
diff --git a/target/i386/translate.c b/target/i386/translate.c
index 5b19e9ac4b..d601c6d4c2 100644
--- a/target/i386/translate.c
+++ b/target/i386/translate.c
@@ -2840,7 +2840,7 @@ static const SSEFunc_0_epp sse_op_table1[256][4] = {
     [0xe7] = { SSE_SPECIAL , SSE_SPECIAL },  /* movntq, movntq */
     [0xe8] = { SSE_TOMBSTONE, SSE_TOMBSTONE },
     [0xe9] = { SSE_TOMBSTONE, SSE_TOMBSTONE },
-    [0xea] = MMX_OP2(pminsw),
+    [0xea] = { SSE_TOMBSTONE, SSE_TOMBSTONE },
     [0xeb] = { SSE_TOMBSTONE, SSE_TOMBSTONE },
     [0xec] = { SSE_TOMBSTONE, SSE_TOMBSTONE },
     [0xed] = { SSE_TOMBSTONE, SSE_TOMBSTONE },
@@ -3196,6 +3196,11 @@ static inline void gen_gvec_ld_modrm_3(CPUX86State *env, DisasContext *s,
 #define gen_vpsubus_xmm(env, s, modrm, vece) gen_gvec_ld_modrm_vxmm((env), (s), (modrm), (vece), tcg_gen_gvec_ussub, 0123)
 #define gen_vpsubus_ymm(env, s, modrm, vece) gen_gvec_ld_modrm_vymm((env), (s), (modrm), (vece), tcg_gen_gvec_ussub, 0123)
 
+#define gen_pmins_mm(env, s, modrm, vece)   gen_gvec_ld_modrm_mm  ((env), (s), (modrm), (vece), tcg_gen_gvec_smin, 0112)
+#define gen_pmins_xmm(env, s, modrm, vece)  gen_gvec_ld_modrm_xmm ((env), (s), (modrm), (vece), tcg_gen_gvec_smin, 0112)
+#define gen_vpmins_xmm(env, s, modrm, vece) gen_gvec_ld_modrm_vxmm((env), (s), (modrm), (vece), tcg_gen_gvec_smin, 0123)
+#define gen_vpmins_ymm(env, s, modrm, vece) gen_gvec_ld_modrm_vymm((env), (s), (modrm), (vece), tcg_gen_gvec_smin, 0123)
+
 #define gen_pand_mm(env, s, modrm)   gen_gvec_ld_modrm_mm  ((env), (s), (modrm), MO_64, tcg_gen_gvec_and, 0112)
 #define gen_pand_xmm(env, s, modrm)  gen_gvec_ld_modrm_xmm ((env), (s), (modrm), MO_64, tcg_gen_gvec_and, 0112)
 #define gen_vpand_xmm(env, s, modrm) gen_gvec_ld_modrm_vxmm((env), (s), (modrm), MO_64, tcg_gen_gvec_and, 0123)
@@ -3411,6 +3416,11 @@ static void gen_sse(CPUX86State *env, DisasContext *s, int b)
     case 0xe9 | M_0F | P_66 | VEX_128: gen_vpsubs_xmm(env, s, modrm, MO_16); return;
     case 0xe9 | M_0F | P_66 | VEX_256: gen_vpsubs_ymm(env, s, modrm, MO_16); return;
 
+    case 0xea | M_0F:                  gen_pmins_mm(env, s, modrm, MO_16); return;
+    case 0xea | M_0F | P_66:           gen_pmins_xmm(env, s, modrm, MO_16); return;
+    case 0xea | M_0F | P_66 | VEX_128: gen_vpmins_xmm(env, s, modrm, MO_16); return;
+    case 0xea | M_0F | P_66 | VEX_256: gen_vpmins_ymm(env, s, modrm, MO_16); return;
+
     case 0xdb | M_0F:                  gen_pand_mm(env, s, modrm); return;
     case 0xdb | M_0F | P_66:           gen_pand_xmm(env, s, modrm); return;
     case 0xdb | M_0F | P_66 | VEX_128: gen_vpand_xmm(env, s, modrm); return;
-- 
2.20.1

[Qemu-devel] [RFC PATCH v1 19/22] target/i386: reimplement (V)PMINUB

[Jan Bobek]

Use the gvec infrastructure to achieve the desired functionality.

Signed-off-by: Jan Bobek <jan.bobek@gmail.com>
---
 target/i386/ops_sse.h        |  2 --
 target/i386/ops_sse_header.h |  1 -
 target/i386/translate.c      | 12 +++++++++++-
 3 files changed, 11 insertions(+), 4 deletions(-)

diff --git a/target/i386/ops_sse.h b/target/i386/ops_sse.h
index f57eaa2c77..058ed5cdfc 100644
--- a/target/i386/ops_sse.h
+++ b/target/i386/ops_sse.h
@@ -337,7 +337,6 @@ static inline int satsw(int x)
     }
 }
 
-#define FMINUB(a, b) ((a) < (b)) ? (a) : (b)
 #define FMAXUB(a, b) ((a) > (b)) ? (a) : (b)
 #define FMAXSW(a, b) ((int16_t)(a) > (int16_t)(b)) ? (a) : (b)
 
@@ -354,7 +353,6 @@ static inline int satsw(int x)
 #define FAVG(a, b) (((a) + (b) + 1) >> 1)
 #endif
 
-SSE_HELPER_B(helper_pminub, FMINUB)
 SSE_HELPER_B(helper_pmaxub, FMAXUB)
 
 SSE_HELPER_W(helper_pmaxsw, FMAXSW)
diff --git a/target/i386/ops_sse_header.h b/target/i386/ops_sse_header.h
index a7f99e5427..3d0e321230 100644
--- a/target/i386/ops_sse_header.h
+++ b/target/i386/ops_sse_header.h
@@ -60,7 +60,6 @@ DEF_HELPER_3(glue(pslldq, SUFFIX), void, env, Reg, Reg)
 #define SSE_HELPER_Q(name, F)\
     DEF_HELPER_3(glue(name, SUFFIX), void, env, Reg, Reg)
 
-SSE_HELPER_B(pminub, FMINUB)
 SSE_HELPER_B(pmaxub, FMAXUB)
 
 SSE_HELPER_W(pmaxsw, FMAXSW)
diff --git a/target/i386/translate.c b/target/i386/translate.c
index d601c6d4c2..893fe1253f 100644
--- a/target/i386/translate.c
+++ b/target/i386/translate.c
@@ -2824,7 +2824,7 @@ static const SSEFunc_0_epp sse_op_table1[256][4] = {
     [0xd7] = { SSE_SPECIAL, SSE_SPECIAL }, /* pmovmskb */
     [0xd8] = { SSE_TOMBSTONE, SSE_TOMBSTONE },
     [0xd9] = { SSE_TOMBSTONE, SSE_TOMBSTONE },
-    [0xda] = MMX_OP2(pminub),
+    [0xda] = { SSE_TOMBSTONE, SSE_TOMBSTONE },
     [0xdb] = { SSE_TOMBSTONE, SSE_TOMBSTONE },
     [0xdc] = { SSE_TOMBSTONE, SSE_TOMBSTONE },
     [0xdd] = { SSE_TOMBSTONE, SSE_TOMBSTONE },
@@ -3201,6 +3201,11 @@ static inline void gen_gvec_ld_modrm_3(CPUX86State *env, DisasContext *s,
 #define gen_vpmins_xmm(env, s, modrm, vece) gen_gvec_ld_modrm_vxmm((env), (s), (modrm), (vece), tcg_gen_gvec_smin, 0123)
 #define gen_vpmins_ymm(env, s, modrm, vece) gen_gvec_ld_modrm_vymm((env), (s), (modrm), (vece), tcg_gen_gvec_smin, 0123)
 
+#define gen_pminu_mm(env, s, modrm, vece)   gen_gvec_ld_modrm_mm  ((env), (s), (modrm), (vece), tcg_gen_gvec_umin, 0112)
+#define gen_pminu_xmm(env, s, modrm, vece)  gen_gvec_ld_modrm_xmm ((env), (s), (modrm), (vece), tcg_gen_gvec_umin, 0112)
+#define gen_vpminu_xmm(env, s, modrm, vece) gen_gvec_ld_modrm_vxmm((env), (s), (modrm), (vece), tcg_gen_gvec_umin, 0123)
+#define gen_vpminu_ymm(env, s, modrm, vece) gen_gvec_ld_modrm_vymm((env), (s), (modrm), (vece), tcg_gen_gvec_umin, 0123)
+
 #define gen_pand_mm(env, s, modrm)   gen_gvec_ld_modrm_mm  ((env), (s), (modrm), MO_64, tcg_gen_gvec_and, 0112)
 #define gen_pand_xmm(env, s, modrm)  gen_gvec_ld_modrm_xmm ((env), (s), (modrm), MO_64, tcg_gen_gvec_and, 0112)
 #define gen_vpand_xmm(env, s, modrm) gen_gvec_ld_modrm_vxmm((env), (s), (modrm), MO_64, tcg_gen_gvec_and, 0123)
@@ -3416,6 +3421,11 @@ static void gen_sse(CPUX86State *env, DisasContext *s, int b)
     case 0xe9 | M_0F | P_66 | VEX_128: gen_vpsubs_xmm(env, s, modrm, MO_16); return;
     case 0xe9 | M_0F | P_66 | VEX_256: gen_vpsubs_ymm(env, s, modrm, MO_16); return;
 
+    case 0xda | M_0F:                  gen_pminu_mm(env, s, modrm, MO_8); return;
+    case 0xda | M_0F | P_66:           gen_pminu_xmm(env, s, modrm, MO_8); return;
+    case 0xda | M_0F | P_66 | VEX_128: gen_vpminu_xmm(env, s, modrm, MO_8); return;
+    case 0xda | M_0F | P_66 | VEX_256: gen_vpminu_ymm(env, s, modrm, MO_8); return;
+
     case 0xea | M_0F:                  gen_pmins_mm(env, s, modrm, MO_16); return;
     case 0xea | M_0F | P_66:           gen_pmins_xmm(env, s, modrm, MO_16); return;
     case 0xea | M_0F | P_66 | VEX_128: gen_vpmins_xmm(env, s, modrm, MO_16); return;
-- 
2.20.1

[Qemu-devel] [RFC PATCH v1 20/22] target/i386: reimplement (V)PMAXSW

[Jan Bobek]

Use the gvec infrastructure to achieve the desired functionality.

Signed-off-by: Jan Bobek <jan.bobek@gmail.com>
---
 target/i386/ops_sse.h        |  3 ---
 target/i386/ops_sse_header.h |  2 --
 target/i386/translate.c      | 12 +++++++++++-
 3 files changed, 11 insertions(+), 6 deletions(-)

diff --git a/target/i386/ops_sse.h b/target/i386/ops_sse.h
index 058ed5cdfc..92d0544474 100644
--- a/target/i386/ops_sse.h
+++ b/target/i386/ops_sse.h
@@ -338,7 +338,6 @@ static inline int satsw(int x)
 }
 
 #define FMAXUB(a, b) ((a) > (b)) ? (a) : (b)
-#define FMAXSW(a, b) ((int16_t)(a) > (int16_t)(b)) ? (a) : (b)
 
 #define FCMPGTB(a, b) ((int8_t)(a) > (int8_t)(b) ? -1 : 0)
 #define FCMPGTW(a, b) ((int16_t)(a) > (int16_t)(b) ? -1 : 0)
@@ -355,8 +354,6 @@ static inline int satsw(int x)
 
 SSE_HELPER_B(helper_pmaxub, FMAXUB)
 
-SSE_HELPER_W(helper_pmaxsw, FMAXSW)
-
 SSE_HELPER_B(helper_pcmpgtb, FCMPGTB)
 SSE_HELPER_W(helper_pcmpgtw, FCMPGTW)
 SSE_HELPER_L(helper_pcmpgtl, FCMPGTL)
diff --git a/target/i386/ops_sse_header.h b/target/i386/ops_sse_header.h
index 3d0e321230..bf38738783 100644
--- a/target/i386/ops_sse_header.h
+++ b/target/i386/ops_sse_header.h
@@ -62,8 +62,6 @@ DEF_HELPER_3(glue(pslldq, SUFFIX), void, env, Reg, Reg)
 
 SSE_HELPER_B(pmaxub, FMAXUB)
 
-SSE_HELPER_W(pmaxsw, FMAXSW)
-
 SSE_HELPER_B(pcmpgtb, FCMPGTB)
 SSE_HELPER_W(pcmpgtw, FCMPGTW)
 SSE_HELPER_L(pcmpgtl, FCMPGTL)
diff --git a/target/i386/translate.c b/target/i386/translate.c
index 893fe1253f..48bfb4e47b 100644
--- a/target/i386/translate.c
+++ b/target/i386/translate.c
@@ -2844,7 +2844,7 @@ static const SSEFunc_0_epp sse_op_table1[256][4] = {
     [0xeb] = { SSE_TOMBSTONE, SSE_TOMBSTONE },
     [0xec] = { SSE_TOMBSTONE, SSE_TOMBSTONE },
     [0xed] = { SSE_TOMBSTONE, SSE_TOMBSTONE },
-    [0xee] = MMX_OP2(pmaxsw),
+    [0xee] = { SSE_TOMBSTONE, SSE_TOMBSTONE },
     [0xef] = { SSE_TOMBSTONE, SSE_TOMBSTONE },
     [0xf0] = { NULL, NULL, NULL, SSE_SPECIAL }, /* lddqu */
     [0xf1] = MMX_OP2(psllw),
@@ -3206,6 +3206,11 @@ static inline void gen_gvec_ld_modrm_3(CPUX86State *env, DisasContext *s,
 #define gen_vpminu_xmm(env, s, modrm, vece) gen_gvec_ld_modrm_vxmm((env), (s), (modrm), (vece), tcg_gen_gvec_umin, 0123)
 #define gen_vpminu_ymm(env, s, modrm, vece) gen_gvec_ld_modrm_vymm((env), (s), (modrm), (vece), tcg_gen_gvec_umin, 0123)
 
+#define gen_pmaxs_mm(env, s, modrm, vece)   gen_gvec_ld_modrm_mm  ((env), (s), (modrm), (vece), tcg_gen_gvec_smax, 0112)
+#define gen_pmaxs_xmm(env, s, modrm, vece)  gen_gvec_ld_modrm_xmm ((env), (s), (modrm), (vece), tcg_gen_gvec_smax, 0112)
+#define gen_vpmaxs_xmm(env, s, modrm, vece) gen_gvec_ld_modrm_vxmm((env), (s), (modrm), (vece), tcg_gen_gvec_smax, 0123)
+#define gen_vpmaxs_ymm(env, s, modrm, vece) gen_gvec_ld_modrm_vymm((env), (s), (modrm), (vece), tcg_gen_gvec_smax, 0123)
+
 #define gen_pand_mm(env, s, modrm)   gen_gvec_ld_modrm_mm  ((env), (s), (modrm), MO_64, tcg_gen_gvec_and, 0112)
 #define gen_pand_xmm(env, s, modrm)  gen_gvec_ld_modrm_xmm ((env), (s), (modrm), MO_64, tcg_gen_gvec_and, 0112)
 #define gen_vpand_xmm(env, s, modrm) gen_gvec_ld_modrm_vxmm((env), (s), (modrm), MO_64, tcg_gen_gvec_and, 0123)
@@ -3431,6 +3436,11 @@ static void gen_sse(CPUX86State *env, DisasContext *s, int b)
     case 0xea | M_0F | P_66 | VEX_128: gen_vpmins_xmm(env, s, modrm, MO_16); return;
     case 0xea | M_0F | P_66 | VEX_256: gen_vpmins_ymm(env, s, modrm, MO_16); return;
 
+    case 0xee | M_0F:                  gen_pmaxs_mm(env, s, modrm, MO_16); return;
+    case 0xee | M_0F | P_66:           gen_pmaxs_xmm(env, s, modrm, MO_16); return;
+    case 0xee | M_0F | P_66 | VEX_128: gen_vpmaxs_xmm(env, s, modrm, MO_16); return;
+    case 0xee | M_0F | P_66 | VEX_256: gen_vpmaxs_ymm(env, s, modrm, MO_16); return;
+
     case 0xdb | M_0F:                  gen_pand_mm(env, s, modrm); return;
     case 0xdb | M_0F | P_66:           gen_pand_xmm(env, s, modrm); return;
     case 0xdb | M_0F | P_66 | VEX_128: gen_vpand_xmm(env, s, modrm); return;
-- 
2.20.1

[Qemu-devel] [RFC PATCH v1 21/22] target/i386: reimplement (V)PMAXUB

[Jan Bobek]

Use the gvec infrastructure to achieve the desired functionality.

Signed-off-by: Jan Bobek <jan.bobek@gmail.com>
---
 target/i386/ops_sse.h        |  4 ----
 target/i386/ops_sse_header.h |  2 --
 target/i386/translate.c      | 12 +++++++++++-
 3 files changed, 11 insertions(+), 7 deletions(-)

diff --git a/target/i386/ops_sse.h b/target/i386/ops_sse.h
index 92d0544474..75ff686bb6 100644
--- a/target/i386/ops_sse.h
+++ b/target/i386/ops_sse.h
@@ -337,8 +337,6 @@ static inline int satsw(int x)
     }
 }
 
-#define FMAXUB(a, b) ((a) > (b)) ? (a) : (b)
-
 #define FCMPGTB(a, b) ((int8_t)(a) > (int8_t)(b) ? -1 : 0)
 #define FCMPGTW(a, b) ((int16_t)(a) > (int16_t)(b) ? -1 : 0)
 #define FCMPGTL(a, b) ((int32_t)(a) > (int32_t)(b) ? -1 : 0)
@@ -352,8 +350,6 @@ static inline int satsw(int x)
 #define FAVG(a, b) (((a) + (b) + 1) >> 1)
 #endif
 
-SSE_HELPER_B(helper_pmaxub, FMAXUB)
-
 SSE_HELPER_B(helper_pcmpgtb, FCMPGTB)
 SSE_HELPER_W(helper_pcmpgtw, FCMPGTW)
 SSE_HELPER_L(helper_pcmpgtl, FCMPGTL)
diff --git a/target/i386/ops_sse_header.h b/target/i386/ops_sse_header.h
index bf38738783..9c7451d28e 100644
--- a/target/i386/ops_sse_header.h
+++ b/target/i386/ops_sse_header.h
@@ -60,8 +60,6 @@ DEF_HELPER_3(glue(pslldq, SUFFIX), void, env, Reg, Reg)
 #define SSE_HELPER_Q(name, F)\
     DEF_HELPER_3(glue(name, SUFFIX), void, env, Reg, Reg)
 
-SSE_HELPER_B(pmaxub, FMAXUB)
-
 SSE_HELPER_B(pcmpgtb, FCMPGTB)
 SSE_HELPER_W(pcmpgtw, FCMPGTW)
 SSE_HELPER_L(pcmpgtl, FCMPGTL)
diff --git a/target/i386/translate.c b/target/i386/translate.c
index 48bfb4e47b..d08d2cedce 100644
--- a/target/i386/translate.c
+++ b/target/i386/translate.c
@@ -2828,7 +2828,7 @@ static const SSEFunc_0_epp sse_op_table1[256][4] = {
     [0xdb] = { SSE_TOMBSTONE, SSE_TOMBSTONE },
     [0xdc] = { SSE_TOMBSTONE, SSE_TOMBSTONE },
     [0xdd] = { SSE_TOMBSTONE, SSE_TOMBSTONE },
-    [0xde] = MMX_OP2(pmaxub),
+    [0xde] = { SSE_TOMBSTONE, SSE_TOMBSTONE },
     [0xdf] = { SSE_TOMBSTONE, SSE_TOMBSTONE },
     [0xe0] = MMX_OP2(pavgb),
     [0xe1] = MMX_OP2(psraw),
@@ -3211,6 +3211,11 @@ static inline void gen_gvec_ld_modrm_3(CPUX86State *env, DisasContext *s,
 #define gen_vpmaxs_xmm(env, s, modrm, vece) gen_gvec_ld_modrm_vxmm((env), (s), (modrm), (vece), tcg_gen_gvec_smax, 0123)
 #define gen_vpmaxs_ymm(env, s, modrm, vece) gen_gvec_ld_modrm_vymm((env), (s), (modrm), (vece), tcg_gen_gvec_smax, 0123)
 
+#define gen_pmaxu_mm(env, s, modrm, vece)   gen_gvec_ld_modrm_mm  ((env), (s), (modrm), (vece), tcg_gen_gvec_umax, 0112)
+#define gen_pmaxu_xmm(env, s, modrm, vece)  gen_gvec_ld_modrm_xmm ((env), (s), (modrm), (vece), tcg_gen_gvec_umax, 0112)
+#define gen_vpmaxu_xmm(env, s, modrm, vece) gen_gvec_ld_modrm_vxmm((env), (s), (modrm), (vece), tcg_gen_gvec_umax, 0123)
+#define gen_vpmaxu_ymm(env, s, modrm, vece) gen_gvec_ld_modrm_vymm((env), (s), (modrm), (vece), tcg_gen_gvec_umax, 0123)
+
 #define gen_pand_mm(env, s, modrm)   gen_gvec_ld_modrm_mm  ((env), (s), (modrm), MO_64, tcg_gen_gvec_and, 0112)
 #define gen_pand_xmm(env, s, modrm)  gen_gvec_ld_modrm_xmm ((env), (s), (modrm), MO_64, tcg_gen_gvec_and, 0112)
 #define gen_vpand_xmm(env, s, modrm) gen_gvec_ld_modrm_vxmm((env), (s), (modrm), MO_64, tcg_gen_gvec_and, 0123)
@@ -3436,6 +3441,11 @@ static void gen_sse(CPUX86State *env, DisasContext *s, int b)
     case 0xea | M_0F | P_66 | VEX_128: gen_vpmins_xmm(env, s, modrm, MO_16); return;
     case 0xea | M_0F | P_66 | VEX_256: gen_vpmins_ymm(env, s, modrm, MO_16); return;
 
+    case 0xde | M_0F:                  gen_pmaxu_mm(env, s, modrm, MO_8); return;
+    case 0xde | M_0F | P_66:           gen_pmaxu_xmm(env, s, modrm, MO_8); return;
+    case 0xde | M_0F | P_66 | VEX_128: gen_vpmaxu_xmm(env, s, modrm, MO_8); return;
+    case 0xde | M_0F | P_66 | VEX_256: gen_vpmaxu_ymm(env, s, modrm, MO_8); return;
+
     case 0xee | M_0F:                  gen_pmaxs_mm(env, s, modrm, MO_16); return;
     case 0xee | M_0F | P_66:           gen_pmaxs_xmm(env, s, modrm, MO_16); return;
     case 0xee | M_0F | P_66 | VEX_128: gen_vpmaxs_xmm(env, s, modrm, MO_16); return;
-- 
2.20.1

[Qemu-devel] [RFC PATCH v1 22/22] target/i386: reimplement (V)P(EQ, CMP)(B, W, D)

[Jan Bobek]

Use the gvec infrastructure to achieve the desired functionality.

Signed-off-by: Jan Bobek <jan.bobek@gmail.com>
---
 target/i386/ops_sse.h        | 13 -------
 target/i386/ops_sse_header.h |  8 -----
 target/i386/translate.c      | 66 ++++++++++++++++++++++++++++++++----
 3 files changed, 60 insertions(+), 27 deletions(-)

diff --git a/target/i386/ops_sse.h b/target/i386/ops_sse.h
index 75ff686bb6..b6ace9410f 100644
--- a/target/i386/ops_sse.h
+++ b/target/i386/ops_sse.h
@@ -337,11 +337,6 @@ static inline int satsw(int x)
     }
 }
 
-#define FCMPGTB(a, b) ((int8_t)(a) > (int8_t)(b) ? -1 : 0)
-#define FCMPGTW(a, b) ((int16_t)(a) > (int16_t)(b) ? -1 : 0)
-#define FCMPGTL(a, b) ((int32_t)(a) > (int32_t)(b) ? -1 : 0)
-#define FCMPEQ(a, b) ((a) == (b) ? -1 : 0)
-
 #define FMULLW(a, b) ((a) * (b))
 #define FMULHRW(a, b) (((int16_t)(a) * (int16_t)(b) + 0x8000) >> 16)
 #define FMULHUW(a, b) ((a) * (b) >> 16)
@@ -350,14 +345,6 @@ static inline int satsw(int x)
 #define FAVG(a, b) (((a) + (b) + 1) >> 1)
 #endif
 
-SSE_HELPER_B(helper_pcmpgtb, FCMPGTB)
-SSE_HELPER_W(helper_pcmpgtw, FCMPGTW)
-SSE_HELPER_L(helper_pcmpgtl, FCMPGTL)
-
-SSE_HELPER_B(helper_pcmpeqb, FCMPEQ)
-SSE_HELPER_W(helper_pcmpeqw, FCMPEQ)
-SSE_HELPER_L(helper_pcmpeql, FCMPEQ)
-
 SSE_HELPER_W(helper_pmullw, FMULLW)
 #if SHIFT == 0
 SSE_HELPER_W(helper_pmulhrw, FMULHRW)
diff --git a/target/i386/ops_sse_header.h b/target/i386/ops_sse_header.h
index 9c7451d28e..d8e33dff6b 100644
--- a/target/i386/ops_sse_header.h
+++ b/target/i386/ops_sse_header.h
@@ -60,14 +60,6 @@ DEF_HELPER_3(glue(pslldq, SUFFIX), void, env, Reg, Reg)
 #define SSE_HELPER_Q(name, F)\
     DEF_HELPER_3(glue(name, SUFFIX), void, env, Reg, Reg)
 
-SSE_HELPER_B(pcmpgtb, FCMPGTB)
-SSE_HELPER_W(pcmpgtw, FCMPGTW)
-SSE_HELPER_L(pcmpgtl, FCMPGTL)
-
-SSE_HELPER_B(pcmpeqb, FCMPEQ)
-SSE_HELPER_W(pcmpeqw, FCMPEQ)
-SSE_HELPER_L(pcmpeql, FCMPEQ)
-
 SSE_HELPER_W(pmullw, FMULLW)
 #if SHIFT == 0
 SSE_HELPER_W(pmulhrw, FMULHRW)
diff --git a/target/i386/translate.c b/target/i386/translate.c
index d08d2cedce..729509e1ff 100644
--- a/target/i386/translate.c
+++ b/target/i386/translate.c
@@ -2783,9 +2783,9 @@ static const SSEFunc_0_epp sse_op_table1[256][4] = {
     [0x61] = MMX_OP2(punpcklwd),
     [0x62] = MMX_OP2(punpckldq),
     [0x63] = MMX_OP2(packsswb),
-    [0x64] = MMX_OP2(pcmpgtb),
-    [0x65] = MMX_OP2(pcmpgtw),
-    [0x66] = MMX_OP2(pcmpgtl),
+    [0x64] = { SSE_TOMBSTONE, SSE_TOMBSTONE },
+    [0x65] = { SSE_TOMBSTONE, SSE_TOMBSTONE },
+    [0x66] = { SSE_TOMBSTONE, SSE_TOMBSTONE },
     [0x67] = MMX_OP2(packuswb),
     [0x68] = MMX_OP2(punpckhbw),
     [0x69] = MMX_OP2(punpckhwd),
@@ -2802,9 +2802,9 @@ static const SSEFunc_0_epp sse_op_table1[256][4] = {
     [0x71] = { SSE_SPECIAL, SSE_SPECIAL }, /* shiftw */
     [0x72] = { SSE_SPECIAL, SSE_SPECIAL }, /* shiftd */
     [0x73] = { SSE_SPECIAL, SSE_SPECIAL }, /* shiftq */
-    [0x74] = MMX_OP2(pcmpeqb),
-    [0x75] = MMX_OP2(pcmpeqw),
-    [0x76] = MMX_OP2(pcmpeql),
+    [0x74] = { SSE_TOMBSTONE, SSE_TOMBSTONE },
+    [0x75] = { SSE_TOMBSTONE, SSE_TOMBSTONE },
+    [0x76] = { SSE_TOMBSTONE, SSE_TOMBSTONE },
     [0x77] = { SSE_DUMMY }, /* emms */
     [0x78] = { NULL, SSE_SPECIAL, NULL, SSE_SPECIAL }, /* extrq_i, insertq_i */
     [0x79] = { NULL, gen_helper_extrq_r, NULL, gen_helper_insertq_r },
@@ -3216,6 +3216,30 @@ static inline void gen_gvec_ld_modrm_3(CPUX86State *env, DisasContext *s,
 #define gen_vpmaxu_xmm(env, s, modrm, vece) gen_gvec_ld_modrm_vxmm((env), (s), (modrm), (vece), tcg_gen_gvec_umax, 0123)
 #define gen_vpmaxu_ymm(env, s, modrm, vece) gen_gvec_ld_modrm_vymm((env), (s), (modrm), (vece), tcg_gen_gvec_umax, 0123)
 
+static inline void gen_gvec_cmpeq(unsigned vece, uint32_t dofs,
+                                  uint32_t aofs, uint32_t bofs,
+                                  uint32_t oprsz, uint32_t maxsz)
+{
+    tcg_gen_gvec_cmp(TCG_COND_EQ, vece, dofs, aofs, bofs, oprsz, maxsz);
+}
+
+#define gen_pcmpeq_mm(env, s, modrm, vece)   gen_gvec_ld_modrm_mm  ((env), (s), (modrm), (vece), gen_gvec_cmpeq, 0112)
+#define gen_pcmpeq_xmm(env, s, modrm, vece)  gen_gvec_ld_modrm_xmm ((env), (s), (modrm), (vece), gen_gvec_cmpeq, 0112)
+#define gen_vpcmpeq_xmm(env, s, modrm, vece) gen_gvec_ld_modrm_vxmm((env), (s), (modrm), (vece), gen_gvec_cmpeq, 0123)
+#define gen_vpcmpeq_ymm(env, s, modrm, vece) gen_gvec_ld_modrm_vymm((env), (s), (modrm), (vece), gen_gvec_cmpeq, 0123)
+
+static inline void gen_gvec_cmpgt(unsigned vece, uint32_t dofs,
+                                  uint32_t aofs, uint32_t bofs,
+                                  uint32_t oprsz, uint32_t maxsz)
+{
+    tcg_gen_gvec_cmp(TCG_COND_GT, vece, dofs, aofs, bofs, oprsz, maxsz);
+}
+
+#define gen_pcmpgt_mm(env, s, modrm, vece)   gen_gvec_ld_modrm_mm  ((env), (s), (modrm), (vece), gen_gvec_cmpgt, 0112)
+#define gen_pcmpgt_xmm(env, s, modrm, vece)  gen_gvec_ld_modrm_xmm ((env), (s), (modrm), (vece), gen_gvec_cmpgt, 0112)
+#define gen_vpcmpgt_xmm(env, s, modrm, vece) gen_gvec_ld_modrm_vxmm((env), (s), (modrm), (vece), gen_gvec_cmpgt, 0123)
+#define gen_vpcmpgt_ymm(env, s, modrm, vece) gen_gvec_ld_modrm_vymm((env), (s), (modrm), (vece), gen_gvec_cmpgt, 0123)
+
 #define gen_pand_mm(env, s, modrm)   gen_gvec_ld_modrm_mm  ((env), (s), (modrm), MO_64, tcg_gen_gvec_and, 0112)
 #define gen_pand_xmm(env, s, modrm)  gen_gvec_ld_modrm_xmm ((env), (s), (modrm), MO_64, tcg_gen_gvec_and, 0112)
 #define gen_vpand_xmm(env, s, modrm) gen_gvec_ld_modrm_vxmm((env), (s), (modrm), MO_64, tcg_gen_gvec_and, 0123)
@@ -3451,6 +3475,36 @@ static void gen_sse(CPUX86State *env, DisasContext *s, int b)
     case 0xee | M_0F | P_66 | VEX_128: gen_vpmaxs_xmm(env, s, modrm, MO_16); return;
     case 0xee | M_0F | P_66 | VEX_256: gen_vpmaxs_ymm(env, s, modrm, MO_16); return;
 
+    case 0x64 | M_0F:                  gen_pcmpgt_mm(env, s, modrm, MO_8); return;
+    case 0x64 | M_0F | P_66:           gen_pcmpgt_xmm(env, s, modrm, MO_8); return;
+    case 0x64 | M_0F | P_66 | VEX_128: gen_vpcmpgt_xmm(env, s, modrm, MO_8); return;
+    case 0x64 | M_0F | P_66 | VEX_256: gen_vpcmpgt_ymm(env, s, modrm, MO_8); return;
+
+    case 0x65 | M_0F:                  gen_pcmpgt_mm(env, s, modrm, MO_16); return;
+    case 0x65 | M_0F | P_66:           gen_pcmpgt_xmm(env, s, modrm, MO_16); return;
+    case 0x65 | M_0F | P_66 | VEX_128: gen_vpcmpgt_xmm(env, s, modrm, MO_16); return;
+    case 0x65 | M_0F | P_66 | VEX_256: gen_vpcmpgt_ymm(env, s, modrm, MO_16); return;
+
+    case 0x66 | M_0F:                  gen_pcmpgt_mm(env, s, modrm, MO_32); return;
+    case 0x66 | M_0F | P_66:           gen_pcmpgt_xmm(env, s, modrm, MO_32); return;
+    case 0x66 | M_0F | P_66 | VEX_128: gen_vpcmpgt_xmm(env, s, modrm, MO_32); return;
+    case 0x66 | M_0F | P_66 | VEX_256: gen_vpcmpgt_ymm(env, s, modrm, MO_32); return;
+
+    case 0x74 | M_0F:                  gen_pcmpeq_mm(env, s, modrm, MO_8); return;
+    case 0x74 | M_0F | P_66:           gen_pcmpeq_xmm(env, s, modrm, MO_8); return;
+    case 0x74 | M_0F | P_66 | VEX_128: gen_vpcmpeq_xmm(env, s, modrm, MO_8); return;
+    case 0x74 | M_0F | P_66 | VEX_256: gen_vpcmpeq_ymm(env, s, modrm, MO_8); return;
+
+    case 0x75 | M_0F:                  gen_pcmpeq_mm(env, s, modrm, MO_16); return;
+    case 0x75 | M_0F | P_66:           gen_pcmpeq_xmm(env, s, modrm, MO_16); return;
+    case 0x75 | M_0F | P_66 | VEX_128: gen_vpcmpeq_xmm(env, s, modrm, MO_16); return;
+    case 0x75 | M_0F | P_66 | VEX_256: gen_vpcmpeq_ymm(env, s, modrm, MO_16); return;
+
+    case 0x76 | M_0F:                  gen_pcmpeq_mm(env, s, modrm, MO_32); return;
+    case 0x76 | M_0F | P_66:           gen_pcmpeq_xmm(env, s, modrm, MO_32); return;
+    case 0x76 | M_0F | P_66 | VEX_128: gen_vpcmpeq_xmm(env, s, modrm, MO_32); return;
+    case 0x76 | M_0F | P_66 | VEX_256: gen_vpcmpeq_ymm(env, s, modrm, MO_32); return;
+
     case 0xdb | M_0F:                  gen_pand_mm(env, s, modrm); return;
     case 0xdb | M_0F | P_66:           gen_pand_xmm(env, s, modrm); return;
     case 0xdb | M_0F | P_66 | VEX_128: gen_vpand_xmm(env, s, modrm); return;
-- 
2.20.1

Re: [Qemu-devel] [RFC PATCH v1 22/22] target/i386: reimplement (V)P(EQ, CMP)(B, W, D)

[Richard Henderson]

On 7/31/19 10:57 AM, Jan Bobek wrote:
> +static inline void gen_gvec_cmpeq(unsigned vece, uint32_t dofs,
> +                                  uint32_t aofs, uint32_t bofs,
> +                                  uint32_t oprsz, uint32_t maxsz)
> +{
> +    tcg_gen_gvec_cmp(TCG_COND_EQ, vece, dofs, aofs, bofs, oprsz, maxsz);
> +}
...
> +static inline void gen_gvec_cmpgt(unsigned vece, uint32_t dofs,
> +                                  uint32_t aofs, uint32_t bofs,
> +                                  uint32_t oprsz, uint32_t maxsz)
> +{
> +    tcg_gen_gvec_cmp(TCG_COND_GT, vece, dofs, aofs, bofs, oprsz, maxsz);
> +}

Drop the inlines.

> +#define gen_pcmpgt_mm(env, s, modrm, vece)   gen_gvec_ld_modrm_mm  ((env), (s), (modrm), (vece), gen_gvec_cmpgt, 0112)
> +#define gen_pcmpgt_xmm(env, s, modrm, vece)  gen_gvec_ld_modrm_xmm ((env), (s), (modrm), (vece), gen_gvec_cmpgt, 0112)
> +#define gen_vpcmpgt_xmm(env, s, modrm, vece) gen_gvec_ld_modrm_vxmm((env), (s), (modrm), (vece), gen_gvec_cmpgt, 0123)
> +#define gen_vpcmpgt_ymm(env, s, modrm, vece) gen_gvec_ld_modrm_vymm((env), (s), (modrm), (vece), gen_gvec_cmpgt, 0123)
...
> +    case 0x64 | M_0F:                  gen_pcmpgt_mm(env, s, modrm, MO_8); return;
> +    case 0x64 | M_0F | P_66:           gen_pcmpgt_xmm(env, s, modrm, MO_8); return;
> +    case 0x64 | M_0F | P_66 | VEX_128: gen_vpcmpgt_xmm(env, s, modrm, MO_8); return;
> +    case 0x64 | M_0F | P_66 | VEX_256: gen_vpcmpgt_ymm(env, s, modrm, MO_8); return;

Looks like my comments vs PAND apply to all of the subsequent patches as well.
 But everything else looks good.


r~

Re: [Qemu-devel] [RFC PATCH v1 22/22] target/i386: reimplement (V)P(EQ, CMP)(B, W, D)

[Aleksandar Markovic]

On Wed, Jul 31, 2019 at 9:51 PM Richard Henderson <
richard.henderson@linaro.org> wrote:

> On 7/31/19 10:57 AM, Jan Bobek wrote:
> > +static inline void gen_gvec_cmpeq(unsigned vece, uint32_t dofs,
> > +                                  uint32_t aofs, uint32_t bofs,
> > +                                  uint32_t oprsz, uint32_t maxsz)
> > +{
> > +    tcg_gen_gvec_cmp(TCG_COND_EQ, vece, dofs, aofs, bofs, oprsz, maxsz);
> > +}
> ...
> > +static inline void gen_gvec_cmpgt(unsigned vece, uint32_t dofs,
> > +                                  uint32_t aofs, uint32_t bofs,
> > +                                  uint32_t oprsz, uint32_t maxsz)
> > +{
> > +    tcg_gen_gvec_cmp(TCG_COND_GT, vece, dofs, aofs, bofs, oprsz, maxsz);
> > +}
>
> Drop the inlines.
>
>
Why? The compiler will decide at the end of the day, but at least "inline"
here
says that the code author thinks that inlining is desirable, logical, and
expected
in these cases, which is in turn a valuable information for the code reader.

Yours,
Aleksandar



> > +#define gen_pcmpgt_mm(env, s, modrm, vece)   gen_gvec_ld_modrm_mm
> ((env), (s), (modrm), (vece), gen_gvec_cmpgt, 0112)
> > +#define gen_pcmpgt_xmm(env, s, modrm, vece)  gen_gvec_ld_modrm_xmm
> ((env), (s), (modrm), (vece), gen_gvec_cmpgt, 0112)
> > +#define gen_vpcmpgt_xmm(env, s, modrm, vece)
> gen_gvec_ld_modrm_vxmm((env), (s), (modrm), (vece), gen_gvec_cmpgt, 0123)
> > +#define gen_vpcmpgt_ymm(env, s, modrm, vece)
> gen_gvec_ld_modrm_vymm((env), (s), (modrm), (vece), gen_gvec_cmpgt, 0123)
> ...
> > +    case 0x64 | M_0F:                  gen_pcmpgt_mm(env, s, modrm,
> MO_8); return;
> > +    case 0x64 | M_0F | P_66:           gen_pcmpgt_xmm(env, s, modrm,
> MO_8); return;
> > +    case 0x64 | M_0F | P_66 | VEX_128: gen_vpcmpgt_xmm(env, s, modrm,
> MO_8); return;
> > +    case 0x64 | M_0F | P_66 | VEX_256: gen_vpcmpgt_ymm(env, s, modrm,
> MO_8); return;
>
> Looks like my comments vs PAND apply to all of the subsequent patches as
> well.
>  But everything else looks good.
>
>
> r~
>
>

Re: [Qemu-devel] [RFC PATCH v1 22/22] target/i386: reimplement (V)P(EQ, CMP)(B, W, D)

[Richard Henderson]

On 7/31/19 1:09 PM, Aleksandar Markovic wrote:
> 
> 
> On Wed, Jul 31, 2019 at 9:51 PM Richard Henderson <richard.henderson@linaro.org
> <mailto:richard.henderson@linaro.org>> wrote:
> 
>     On 7/31/19 10:57 AM, Jan Bobek wrote:
>     > +static inline void gen_gvec_cmpeq(unsigned vece, uint32_t dofs,
>     > +                                  uint32_t aofs, uint32_t bofs,
>     > +                                  uint32_t oprsz, uint32_t maxsz)
>     > +{
>     > +    tcg_gen_gvec_cmp(TCG_COND_EQ, vece, dofs, aofs, bofs, oprsz, maxsz);
>     > +}
>     ...
>     > +static inline void gen_gvec_cmpgt(unsigned vece, uint32_t dofs,
>     > +                                  uint32_t aofs, uint32_t bofs,
>     > +                                  uint32_t oprsz, uint32_t maxsz)
>     > +{
>     > +    tcg_gen_gvec_cmp(TCG_COND_GT, vece, dofs, aofs, bofs, oprsz, maxsz);
>     > +}
> 
>     Drop the inlines.
> 
> 
> Why? The compiler will decide at the end of the day, but at least "inline" here
> says that the code author thinks that inlining is desirable, logical, and expected
> in these cases, which is in turn a valuable information for the code reader.

In this case it is in fact a lie that will only confuse the reader, as it did
you.  Functions whose address are passed as a callback, as these are, are
always forced out of line.

But beyond that, clang diagnoses unused static inline within *.c while gcc does
not (I'm not sure I agree with clang, but it is what it is).  By leaving off
the inline, but compilers will diagnose when code rearrangement leaves a
function unused.


r~

Re: [Qemu-devel] [RFC PATCH v1 22/22] target/i386: reimplement (V)P(EQ, CMP)(B, W, D)

[Jan Bobek]

[-- Attachment #1.1: Type: text/plain, Size: 2059 bytes --]

On 7/31/19 5:31 PM, Richard Henderson wrote:
> On 7/31/19 1:09 PM, Aleksandar Markovic wrote:
>>
>>
>> On Wed, Jul 31, 2019 at 9:51 PM Richard Henderson <richard.henderson@linaro.org
>> <mailto:richard.henderson@linaro.org>> wrote:
>>
>>     On 7/31/19 10:57 AM, Jan Bobek wrote:
>>     > +static inline void gen_gvec_cmpeq(unsigned vece, uint32_t dofs,
>>     > +                                  uint32_t aofs, uint32_t bofs,
>>     > +                                  uint32_t oprsz, uint32_t maxsz)
>>     > +{
>>     > +    tcg_gen_gvec_cmp(TCG_COND_EQ, vece, dofs, aofs, bofs, oprsz, maxsz);
>>     > +}
>>     ...
>>     > +static inline void gen_gvec_cmpgt(unsigned vece, uint32_t dofs,
>>     > +                                  uint32_t aofs, uint32_t bofs,
>>     > +                                  uint32_t oprsz, uint32_t maxsz)
>>     > +{
>>     > +    tcg_gen_gvec_cmp(TCG_COND_GT, vece, dofs, aofs, bofs, oprsz, maxsz);
>>     > +}
>>
>>     Drop the inlines.
>>
>>
>> Why? The compiler will decide at the end of the day, but at least "inline" here
>> says that the code author thinks that inlining is desirable, logical, and expected
>> in these cases, which is in turn a valuable information for the code reader.
> 
> In this case it is in fact a lie that will only confuse the reader, as it did
> you.  Functions whose address are passed as a callback, as these are, are
> always forced out of line.
> 
> But beyond that, clang diagnoses unused static inline within *.c while gcc does
> not (I'm not sure I agree with clang, but it is what it is).  By leaving off
> the inline, but compilers will diagnose when code rearrangement leaves a
> function unused.

Dang, I completely forgot about the function-address vs. inlining rule. I thought
of these as macros, really; they are only functions because I needed to pass
them to the gen_gvec_ld_modrm_* helpers.

I'll drop the inline, compilers ignore it anyway.

-Jan


[-- Attachment #2: OpenPGP digital signature --]
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Re: [Qemu-devel] [RFC PATCH v1 22/22] target/i386: reimplement (V)P(EQ, CMP)(B, W, D)

[Aleksandar Markovic]

>
>
>   Functions whose address are passed as a callback, as these are, are
> always forced out of line.
>
>
OK, Richard. However, on a much higher level than this single patch, I am
really
curious about this: what would be the rationale beyond the use of callbacks
in TCG
vector support interface? What is, in fact, achieved with such interface
design that
could not be achieved with callback-less approach?

Thanks,
Aleksandar

Re: [Qemu-devel] [RFC PATCH v1 00/22] reimplement (some) x86 vector instructions using tcg-gvec

[no-reply]

Patchew URL: https://patchew.org/QEMU/20190731175702.4916-1-jan.bobek@gmail.com/



Hi,

This series seems to have some coding style problems. See output below for
more information:

Type: series
Subject: [Qemu-devel] [RFC PATCH v1 00/22] reimplement (some) x86 vector instructions using tcg-gvec
Message-id: 20190731175702.4916-1-jan.bobek@gmail.com

=== TEST SCRIPT BEGIN ===
#!/bin/bash
git rev-parse base > /dev/null || exit 0
git config --local diff.renamelimit 0
git config --local diff.renames True
git config --local diff.algorithm histogram
./scripts/checkpatch.pl --mailback base..
=== TEST SCRIPT END ===

Updating 3c8cf5a9c21ff8782164d1def7f44bd888713384
From https://github.com/patchew-project/qemu
 * [new tag]         patchew/20190731175702.4916-1-jan.bobek@gmail.com -> patchew/20190731175702.4916-1-jan.bobek@gmail.com
Submodule 'capstone' (https://git.qemu.org/git/capstone.git) registered for path 'capstone'
Submodule 'dtc' (https://git.qemu.org/git/dtc.git) registered for path 'dtc'
Submodule 'roms/QemuMacDrivers' (https://git.qemu.org/git/QemuMacDrivers.git) registered for path 'roms/QemuMacDrivers'
Submodule 'roms/SLOF' (https://git.qemu.org/git/SLOF.git) registered for path 'roms/SLOF'
Submodule 'roms/edk2' (https://git.qemu.org/git/edk2.git) registered for path 'roms/edk2'
Submodule 'roms/ipxe' (https://git.qemu.org/git/ipxe.git) registered for path 'roms/ipxe'
Submodule 'roms/openbios' (https://git.qemu.org/git/openbios.git) registered for path 'roms/openbios'
Submodule 'roms/openhackware' (https://git.qemu.org/git/openhackware.git) registered for path 'roms/openhackware'
Submodule 'roms/opensbi' (https://git.qemu.org/git/opensbi.git) registered for path 'roms/opensbi'
Submodule 'roms/qemu-palcode' (https://git.qemu.org/git/qemu-palcode.git) registered for path 'roms/qemu-palcode'
Submodule 'roms/seabios' (https://git.qemu.org/git/seabios.git/) registered for path 'roms/seabios'
Submodule 'roms/seabios-hppa' (https://git.qemu.org/git/seabios-hppa.git) registered for path 'roms/seabios-hppa'
Submodule 'roms/sgabios' (https://git.qemu.org/git/sgabios.git) registered for path 'roms/sgabios'
Submodule 'roms/skiboot' (https://git.qemu.org/git/skiboot.git) registered for path 'roms/skiboot'
Submodule 'roms/u-boot' (https://git.qemu.org/git/u-boot.git) registered for path 'roms/u-boot'
Submodule 'roms/u-boot-sam460ex' (https://git.qemu.org/git/u-boot-sam460ex.git) registered for path 'roms/u-boot-sam460ex'
Submodule 'slirp' (https://git.qemu.org/git/libslirp.git) registered for path 'slirp'
Submodule 'tests/fp/berkeley-softfloat-3' (https://git.qemu.org/git/berkeley-softfloat-3.git) registered for path 'tests/fp/berkeley-softfloat-3'
Submodule 'tests/fp/berkeley-testfloat-3' (https://git.qemu.org/git/berkeley-testfloat-3.git) registered for path 'tests/fp/berkeley-testfloat-3'
Submodule 'ui/keycodemapdb' (https://git.qemu.org/git/keycodemapdb.git) registered for path 'ui/keycodemapdb'
Cloning into 'capstone'...
Submodule path 'capstone': checked out '22ead3e0bfdb87516656453336160e0a37b066bf'
Cloning into 'dtc'...
Submodule path 'dtc': checked out '88f18909db731a627456f26d779445f84e449536'
Cloning into 'roms/QemuMacDrivers'...
Submodule path 'roms/QemuMacDrivers': checked out '90c488d5f4a407342247b9ea869df1c2d9c8e266'
Cloning into 'roms/SLOF'...
Submodule path 'roms/SLOF': checked out 'ba1ab360eebe6338bb8d7d83a9220ccf7e213af3'
Cloning into 'roms/edk2'...
Submodule path 'roms/edk2': checked out '20d2e5a125e34fc8501026613a71549b2a1a3e54'
Submodule 'SoftFloat' (https://github.com/ucb-bar/berkeley-softfloat-3.git) registered for path 'ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3'
Submodule 'CryptoPkg/Library/OpensslLib/openssl' (https://github.com/openssl/openssl) registered for path 'CryptoPkg/Library/OpensslLib/openssl'
Cloning into 'ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3'...
Submodule path 'roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3': checked out 'b64af41c3276f97f0e181920400ee056b9c88037'
Cloning into 'CryptoPkg/Library/OpensslLib/openssl'...
Submodule path 'roms/edk2/CryptoPkg/Library/OpensslLib/openssl': checked out '50eaac9f3337667259de725451f201e784599687'
Submodule 'boringssl' (https://boringssl.googlesource.com/boringssl) registered for path 'boringssl'
Submodule 'krb5' (https://github.com/krb5/krb5) registered for path 'krb5'
Submodule 'pyca.cryptography' (https://github.com/pyca/cryptography.git) registered for path 'pyca-cryptography'
Cloning into 'boringssl'...
Submodule path 'roms/edk2/CryptoPkg/Library/OpensslLib/openssl/boringssl': checked out '2070f8ad9151dc8f3a73bffaa146b5e6937a583f'
Cloning into 'krb5'...
Submodule path 'roms/edk2/CryptoPkg/Library/OpensslLib/openssl/krb5': checked out 'b9ad6c49505c96a088326b62a52568e3484f2168'
Cloning into 'pyca-cryptography'...
Submodule path 'roms/edk2/CryptoPkg/Library/OpensslLib/openssl/pyca-cryptography': checked out '09403100de2f6f1cdd0d484dcb8e620f1c335c8f'
Cloning into 'roms/ipxe'...
Submodule path 'roms/ipxe': checked out 'de4565cbe76ea9f7913a01f331be3ee901bb6e17'
Cloning into 'roms/openbios'...
Submodule path 'roms/openbios': checked out 'c79e0ecb84f4f1ee3f73f521622e264edd1bf174'
Cloning into 'roms/openhackware'...
Submodule path 'roms/openhackware': checked out 'c559da7c8eec5e45ef1f67978827af6f0b9546f5'
Cloning into 'roms/opensbi'...
Submodule path 'roms/opensbi': checked out 'ce228ee0919deb9957192d723eecc8aaae2697c6'
Cloning into 'roms/qemu-palcode'...
Submodule path 'roms/qemu-palcode': checked out 'bf0e13698872450164fa7040da36a95d2d4b326f'
Cloning into 'roms/seabios'...
Submodule path 'roms/seabios': checked out 'a5cab58e9a3fb6e168aba919c5669bea406573b4'
Cloning into 'roms/seabios-hppa'...
Submodule path 'roms/seabios-hppa': checked out '0f4fe84658165e96ce35870fd19fc634e182e77b'
Cloning into 'roms/sgabios'...
Submodule path 'roms/sgabios': checked out 'cbaee52287e5f32373181cff50a00b6c4ac9015a'
Cloning into 'roms/skiboot'...
Submodule path 'roms/skiboot': checked out '261ca8e779e5138869a45f174caa49be6a274501'
Cloning into 'roms/u-boot'...
Submodule path 'roms/u-boot': checked out 'd3689267f92c5956e09cc7d1baa4700141662bff'
Cloning into 'roms/u-boot-sam460ex'...
Submodule path 'roms/u-boot-sam460ex': checked out '60b3916f33e617a815973c5a6df77055b2e3a588'
Cloning into 'slirp'...
Submodule path 'slirp': checked out 'f0da6726207b740f6101028b2992f918477a4b08'
Cloning into 'tests/fp/berkeley-softfloat-3'...
Submodule path 'tests/fp/berkeley-softfloat-3': checked out 'b64af41c3276f97f0e181920400ee056b9c88037'
Cloning into 'tests/fp/berkeley-testfloat-3'...
Submodule path 'tests/fp/berkeley-testfloat-3': checked out '5a59dcec19327396a011a17fd924aed4fec416b3'
Cloning into 'ui/keycodemapdb'...
Submodule path 'ui/keycodemapdb': checked out '6b3d716e2b6472eb7189d3220552280ef3d832ce'
Switched to a new branch 'test'
e58e2b7 target/i386: reimplement (V)P(EQ, CMP)(B, W, D)
9d73849 target/i386: reimplement (V)PMAXUB
71d68bb target/i386: reimplement (V)PMAXSW
3b59fa3 target/i386: reimplement (V)PMINUB
164d45b target/i386: reimplement (V)PMINSW
913ba56 target/i386: reimplement (V)PSUBUS(B, W)
064acf4 target/i386: reimplement (V)PSUBS(B, W)
c77699e target/i386: reimplement (V)PADDUS(B, W)
6e5b716 target/i386: reimplement (V)PADDS(B, W)
bec162d target/i386: reimplement (V)PSUB(B, W, D, Q)
4373c17 target/i386: reimplement (V)PADD(B, W, D, Q)
0a7f3ff target/i386: reimplement (V)PANDN, (V)ANDNPS, (V)ANDNPD
073a933 target/i386: reimplement (V)PXOR, (V)XORPS, (V)XORPD
e5daaa2 target/i386: reimplement (V)POR, (V)ORPS, (V)ORPD
1600295 target/i386: reimplement (V)PAND, (V)ANDPS, (V)ANDPD
a12af7d target/i386: add vector register file alignment constraints
f2c4d10 target/i386: introduce gen_gvec_ld_modrm_* helpers
24c13f7 target/i386: introduce gen_ld_modrm_* helpers
3c78499 target/i386: Simplify gen_exception arguments
c99d49d target/i386: Use prefix, aflag and dflag from DisasContext
ce19a7c target/i386: Push rex_w into DisasContext
413fc8a target/i386: Push rex_r into DisasContext

=== OUTPUT BEGIN ===
1/22 Checking commit 413fc8adbd85 (target/i386: Push rex_r into DisasContext)
2/22 Checking commit ce19a7cede4d (target/i386: Push rex_w into DisasContext)
3/22 Checking commit c99d49d433f8 (target/i386: Use prefix, aflag and dflag from DisasContext)
4/22 Checking commit 3c7849950e24 (target/i386: Simplify gen_exception arguments)
5/22 Checking commit 24c13f7200d6 (target/i386: introduce gen_ld_modrm_* helpers)
WARNING: line over 80 characters
#22: FILE: target/i386/translate.c:3043:
+static inline void gen_ld_modrm_PqQq(CPUX86State *env, DisasContext *s, int modrm,

ERROR: "foo* bar" should be "foo *bar"
#23: FILE: target/i386/translate.c:3044:
+                                     uint32_t* dofs, uint32_t* aofs)

ERROR: space required before the open parenthesis '('
#29: FILE: target/i386/translate.c:3050:
+    if(mod == 3) {

WARNING: line over 80 characters
#41: FILE: target/i386/translate.c:3062:
+static inline void gen_ld_modrm_VxWx(CPUX86State *env, DisasContext *s, int modrm,

ERROR: "foo* bar" should be "foo *bar"
#42: FILE: target/i386/translate.c:3063:
+                                     uint32_t* dofs, uint32_t* aofs)

ERROR: space required before the open parenthesis '('
#48: FILE: target/i386/translate.c:3069:
+    if(mod == 3) {

WARNING: line over 80 characters
#56: FILE: target/i386/translate.c:3077:
+        gen_ldo_env_A0(s, *aofs); /* FIXME this needs to load 32 bytes for YMM */

WARNING: line over 80 characters
#60: FILE: target/i386/translate.c:3081:
+static inline void gen_ld_modrm_VxHxWx(CPUX86State *env, DisasContext *s, int modrm,

WARNING: line over 80 characters
#61: FILE: target/i386/translate.c:3082:
+                                       uint32_t* dofs, uint32_t* aofs, uint32_t* bofs)

ERROR: "foo* bar" should be "foo *bar"
#61: FILE: target/i386/translate.c:3082:
+                                       uint32_t* dofs, uint32_t* aofs, uint32_t* bofs)

total: 5 errors, 5 warnings, 53 lines checked

Patch 5/22 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

6/22 Checking commit f2c4d10e09d9 (target/i386: introduce gen_gvec_ld_modrm_* helpers)
WARNING: line over 80 characters
#21: FILE: target/i386/translate.c:3090:
+typedef void (*gen_ld_modrm_2_fp_t)(CPUX86State *env, DisasContext *s, int modrm,

WARNING: line over 80 characters
#23: FILE: target/i386/translate.c:3092:
+typedef void (*gen_ld_modrm_3_fp_t)(CPUX86State *env, DisasContext *s, int modrm,

WARNING: line over 80 characters
#24: FILE: target/i386/translate.c:3093:
+                                    uint32_t *dofs, uint32_t *aofs, uint32_t *bofs);

total: 0 errors, 3 warnings, 83 lines checked

Patch 6/22 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
7/22 Checking commit a12af7d26f2a (target/i386: add vector register file alignment constraints)
8/22 Checking commit 160029590cca (target/i386: reimplement (V)PAND, (V)ANDPS, (V)ANDPD)
ERROR: line over 90 characters
#92: FILE: target/i386/translate.c:3169:
+#define gen_pand_mm(env, s, modrm)   gen_gvec_ld_modrm_mm  ((env), (s), (modrm), MO_64, tcg_gen_gvec_and, 0112)

ERROR: space prohibited between function name and open parenthesis '('
#92: FILE: target/i386/translate.c:3169:
+#define gen_pand_mm(env, s, modrm)   gen_gvec_ld_modrm_mm  ((env), (s), (modrm), MO_64, tcg_gen_gvec_and, 0112)

ERROR: line over 90 characters
#93: FILE: target/i386/translate.c:3170:
+#define gen_pand_xmm(env, s, modrm)  gen_gvec_ld_modrm_xmm ((env), (s), (modrm), MO_64, tcg_gen_gvec_and, 0112)

ERROR: space prohibited between function name and open parenthesis '('
#93: FILE: target/i386/translate.c:3170:
+#define gen_pand_xmm(env, s, modrm)  gen_gvec_ld_modrm_xmm ((env), (s), (modrm), MO_64, tcg_gen_gvec_and, 0112)

ERROR: line over 90 characters
#94: FILE: target/i386/translate.c:3171:
+#define gen_vpand_xmm(env, s, modrm) gen_gvec_ld_modrm_vxmm((env), (s), (modrm), MO_64, tcg_gen_gvec_and, 0123)

ERROR: line over 90 characters
#95: FILE: target/i386/translate.c:3172:
+#define gen_vpand_ymm(env, s, modrm) gen_gvec_ld_modrm_vymm((env), (s), (modrm), MO_64, tcg_gen_gvec_and, 0123)

ERROR: space required before the open parenthesis '('
#122: FILE: target/i386/translate.c:3266:
+    switch(b | M_0F

ERROR: trailing statements should be on next line
#127: FILE: target/i386/translate.c:3271:
+    case 0xdb | M_0F:                  gen_pand_mm(env, s, modrm); return;

ERROR: trailing statements should be on next line
#128: FILE: target/i386/translate.c:3272:
+    case 0xdb | M_0F | P_66:           gen_pand_xmm(env, s, modrm); return;

ERROR: trailing statements should be on next line
#129: FILE: target/i386/translate.c:3273:
+    case 0xdb | M_0F | P_66 | VEX_128: gen_vpand_xmm(env, s, modrm); return;

ERROR: trailing statements should be on next line
#130: FILE: target/i386/translate.c:3274:
+    case 0xdb | M_0F | P_66 | VEX_256: gen_vpand_ymm(env, s, modrm); return;

ERROR: trailing statements should be on next line
#131: FILE: target/i386/translate.c:3275:
+    case 0x54 | M_0F:                  gen_andps_xmm(env, s, modrm); return;

ERROR: trailing statements should be on next line
#132: FILE: target/i386/translate.c:3276:
+    case 0x54 | M_0F | VEX_128:        gen_vandps_xmm(env, s, modrm); return;

ERROR: trailing statements should be on next line
#133: FILE: target/i386/translate.c:3277:
+    case 0x54 | M_0F | VEX_256:        gen_vandps_ymm(env, s, modrm); return;

ERROR: trailing statements should be on next line
#134: FILE: target/i386/translate.c:3278:
+    case 0x54 | M_0F | P_66:           gen_andpd_xmm(env, s, modrm); return;

ERROR: trailing statements should be on next line
#135: FILE: target/i386/translate.c:3279:
+    case 0x54 | M_0F | P_66 | VEX_128: gen_vandpd_xmm(env, s, modrm); return;

ERROR: trailing statements should be on next line
#136: FILE: target/i386/translate.c:3280:
+    case 0x54 | M_0F | P_66 | VEX_256: gen_vandpd_ymm(env, s, modrm); return;

ERROR: trailing statements should be on next line
#137: FILE: target/i386/translate.c:3281:
+    default: break;

total: 18 errors, 0 warnings, 106 lines checked

Patch 8/22 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

9/22 Checking commit e5daaa2cba35 (target/i386: reimplement (V)POR, (V)ORPS, (V)ORPD)
ERROR: line over 90 characters
#70: FILE: target/i386/translate.c:3180:
+#define gen_por_mm(env, s, modrm)   gen_gvec_ld_modrm_mm  ((env), (s), (modrm), MO_64, tcg_gen_gvec_or, 0112)

ERROR: space prohibited between function name and open parenthesis '('
#70: FILE: target/i386/translate.c:3180:
+#define gen_por_mm(env, s, modrm)   gen_gvec_ld_modrm_mm  ((env), (s), (modrm), MO_64, tcg_gen_gvec_or, 0112)

ERROR: line over 90 characters
#71: FILE: target/i386/translate.c:3181:
+#define gen_por_xmm(env, s, modrm)  gen_gvec_ld_modrm_xmm ((env), (s), (modrm), MO_64, tcg_gen_gvec_or, 0112)

ERROR: space prohibited between function name and open parenthesis '('
#71: FILE: target/i386/translate.c:3181:
+#define gen_por_xmm(env, s, modrm)  gen_gvec_ld_modrm_xmm ((env), (s), (modrm), MO_64, tcg_gen_gvec_or, 0112)

ERROR: line over 90 characters
#72: FILE: target/i386/translate.c:3182:
+#define gen_vpor_xmm(env, s, modrm) gen_gvec_ld_modrm_vxmm((env), (s), (modrm), MO_64, tcg_gen_gvec_or, 0123)

ERROR: line over 90 characters
#73: FILE: target/i386/translate.c:3183:
+#define gen_vpor_ymm(env, s, modrm) gen_gvec_ld_modrm_vymm((env), (s), (modrm), MO_64, tcg_gen_gvec_or, 0123)

ERROR: trailing statements should be on next line
#89: FILE: target/i386/translate.c:3293:
+    case 0xeb | M_0F:                  gen_por_mm(env, s, modrm); return;

ERROR: trailing statements should be on next line
#90: FILE: target/i386/translate.c:3294:
+    case 0xeb | M_0F | P_66:           gen_por_xmm(env, s, modrm); return;

ERROR: trailing statements should be on next line
#91: FILE: target/i386/translate.c:3295:
+    case 0xeb | M_0F | P_66 | VEX_128: gen_vpor_xmm(env, s, modrm); return;

ERROR: trailing statements should be on next line
#92: FILE: target/i386/translate.c:3296:
+    case 0xeb | M_0F | P_66 | VEX_256: gen_vpor_ymm(env, s, modrm); return;

ERROR: trailing statements should be on next line
#93: FILE: target/i386/translate.c:3297:
+    case 0x56 | M_0F:                  gen_orps_xmm(env, s, modrm); return;

ERROR: trailing statements should be on next line
#94: FILE: target/i386/translate.c:3298:
+    case 0x56 | M_0F | VEX_128:        gen_vorps_xmm(env, s, modrm); return;

ERROR: trailing statements should be on next line
#95: FILE: target/i386/translate.c:3299:
+    case 0x56 | M_0F | VEX_256:        gen_vorps_ymm(env, s, modrm); return;

ERROR: trailing statements should be on next line
#96: FILE: target/i386/translate.c:3300:
+    case 0x56 | M_0F | P_66:           gen_orpd_xmm(env, s, modrm); return;

ERROR: trailing statements should be on next line
#97: FILE: target/i386/translate.c:3301:
+    case 0x56 | M_0F | P_66 | VEX_128: gen_vorpd_xmm(env, s, modrm); return;

ERROR: trailing statements should be on next line
#98: FILE: target/i386/translate.c:3302:
+    case 0x56 | M_0F | P_66 | VEX_256: gen_vorpd_ymm(env, s, modrm); return;

total: 16 errors, 0 warnings, 72 lines checked

Patch 9/22 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

10/22 Checking commit 073a93333641 (target/i386: reimplement (V)PXOR, (V)XORPS, (V)XORPD)
ERROR: line over 90 characters
#70: FILE: target/i386/translate.c:3191:
+#define gen_pxor_mm(env, s, modrm)   gen_gvec_ld_modrm_mm  ((env), (s), (modrm), MO_64, tcg_gen_gvec_xor, 0112)

ERROR: space prohibited between function name and open parenthesis '('
#70: FILE: target/i386/translate.c:3191:
+#define gen_pxor_mm(env, s, modrm)   gen_gvec_ld_modrm_mm  ((env), (s), (modrm), MO_64, tcg_gen_gvec_xor, 0112)

ERROR: line over 90 characters
#71: FILE: target/i386/translate.c:3192:
+#define gen_pxor_xmm(env, s, modrm)  gen_gvec_ld_modrm_xmm ((env), (s), (modrm), MO_64, tcg_gen_gvec_xor, 0112)

ERROR: space prohibited between function name and open parenthesis '('
#71: FILE: target/i386/translate.c:3192:
+#define gen_pxor_xmm(env, s, modrm)  gen_gvec_ld_modrm_xmm ((env), (s), (modrm), MO_64, tcg_gen_gvec_xor, 0112)

ERROR: line over 90 characters
#72: FILE: target/i386/translate.c:3193:
+#define gen_vpxor_xmm(env, s, modrm) gen_gvec_ld_modrm_vxmm((env), (s), (modrm), MO_64, tcg_gen_gvec_xor, 0123)

ERROR: line over 90 characters
#73: FILE: target/i386/translate.c:3194:
+#define gen_vpxor_ymm(env, s, modrm) gen_gvec_ld_modrm_vymm((env), (s), (modrm), MO_64, tcg_gen_gvec_xor, 0123)

ERROR: trailing statements should be on next line
#88: FILE: target/i386/translate.c:3315:
+    case 0xef | M_0F:                  gen_pxor_mm(env, s, modrm); return;

ERROR: trailing statements should be on next line
#89: FILE: target/i386/translate.c:3316:
+    case 0xef | M_0F | P_66:           gen_pxor_xmm(env, s, modrm); return;

ERROR: trailing statements should be on next line
#90: FILE: target/i386/translate.c:3317:
+    case 0xef | M_0F | P_66 | VEX_128: gen_vpxor_xmm(env, s, modrm); return;

ERROR: trailing statements should be on next line
#91: FILE: target/i386/translate.c:3318:
+    case 0xef | M_0F | P_66 | VEX_256: gen_vpxor_ymm(env, s, modrm); return;

ERROR: trailing statements should be on next line
#92: FILE: target/i386/translate.c:3319:
+    case 0x57 | M_0F:                  gen_xorps_xmm(env, s, modrm); return;

ERROR: trailing statements should be on next line
#93: FILE: target/i386/translate.c:3320:
+    case 0x57 | M_0F | VEX_128:        gen_vxorps_xmm(env, s, modrm); return;

ERROR: trailing statements should be on next line
#94: FILE: target/i386/translate.c:3321:
+    case 0x57 | M_0F | VEX_256:        gen_vxorps_ymm(env, s, modrm); return;

ERROR: trailing statements should be on next line
#95: FILE: target/i386/translate.c:3322:
+    case 0x57 | M_0F | P_66:           gen_xorpd_xmm(env, s, modrm); return;

ERROR: trailing statements should be on next line
#96: FILE: target/i386/translate.c:3323:
+    case 0x57 | M_0F | P_66 | VEX_128: gen_vxorpd_xmm(env, s, modrm); return;

ERROR: trailing statements should be on next line
#97: FILE: target/i386/translate.c:3324:
+    case 0x57 | M_0F | P_66 | VEX_256: gen_vxorpd_ymm(env, s, modrm); return;

total: 16 errors, 0 warnings, 71 lines checked

Patch 10/22 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

11/22 Checking commit 0a7f3ff8e39d (target/i386: reimplement (V)PANDN, (V)ANDNPS, (V)ANDNPD)
ERROR: line over 90 characters
#73: FILE: target/i386/translate.c:3180:
+#define gen_pandn_mm(env, s, modrm)   gen_gvec_ld_modrm_mm  ((env), (s), (modrm), MO_64, tcg_gen_gvec_andc, 0121)

ERROR: space prohibited between function name and open parenthesis '('
#73: FILE: target/i386/translate.c:3180:
+#define gen_pandn_mm(env, s, modrm)   gen_gvec_ld_modrm_mm  ((env), (s), (modrm), MO_64, tcg_gen_gvec_andc, 0121)

ERROR: line over 90 characters
#74: FILE: target/i386/translate.c:3181:
+#define gen_pandn_xmm(env, s, modrm)  gen_gvec_ld_modrm_xmm ((env), (s), (modrm), MO_64, tcg_gen_gvec_andc, 0121)

ERROR: space prohibited between function name and open parenthesis '('
#74: FILE: target/i386/translate.c:3181:
+#define gen_pandn_xmm(env, s, modrm)  gen_gvec_ld_modrm_xmm ((env), (s), (modrm), MO_64, tcg_gen_gvec_andc, 0121)

ERROR: line over 90 characters
#75: FILE: target/i386/translate.c:3182:
+#define gen_vpandn_xmm(env, s, modrm) gen_gvec_ld_modrm_vxmm((env), (s), (modrm), MO_64, tcg_gen_gvec_andc, 0132)

ERROR: line over 90 characters
#76: FILE: target/i386/translate.c:3183:
+#define gen_vpandn_ymm(env, s, modrm) gen_gvec_ld_modrm_vymm((env), (s), (modrm), MO_64, tcg_gen_gvec_andc, 0132)

ERROR: trailing statements should be on next line
#91: FILE: target/i386/translate.c:3315:
+    case 0xdf | M_0F:                  gen_pandn_mm(env, s, modrm); return;

ERROR: trailing statements should be on next line
#92: FILE: target/i386/translate.c:3316:
+    case 0xdf | M_0F | P_66:           gen_pandn_xmm(env, s, modrm); return;

ERROR: trailing statements should be on next line
#93: FILE: target/i386/translate.c:3317:
+    case 0xdf | M_0F | P_66 | VEX_128: gen_vpandn_xmm(env, s, modrm); return;

ERROR: trailing statements should be on next line
#94: FILE: target/i386/translate.c:3318:
+    case 0xdf | M_0F | P_66 | VEX_256: gen_vpandn_ymm(env, s, modrm); return;

ERROR: trailing statements should be on next line
#95: FILE: target/i386/translate.c:3319:
+    case 0x55 | M_0F:                  gen_andnps_xmm(env, s, modrm); return;

ERROR: trailing statements should be on next line
#96: FILE: target/i386/translate.c:3320:
+    case 0x55 | M_0F | VEX_128:        gen_vandnps_xmm(env, s, modrm); return;

ERROR: trailing statements should be on next line
#97: FILE: target/i386/translate.c:3321:
+    case 0x55 | M_0F | VEX_256:        gen_vandnps_ymm(env, s, modrm); return;

ERROR: trailing statements should be on next line
#98: FILE: target/i386/translate.c:3322:
+    case 0x55 | M_0F | P_66:           gen_andnpd_xmm(env, s, modrm); return;

ERROR: trailing statements should be on next line
#99: FILE: target/i386/translate.c:3323:
+    case 0x55 | M_0F | P_66 | VEX_128: gen_vandnpd_xmm(env, s, modrm); return;

ERROR: trailing statements should be on next line
#100: FILE: target/i386/translate.c:3324:
+    case 0x55 | M_0F | P_66 | VEX_256: gen_vandnpd_ymm(env, s, modrm); return;

total: 16 errors, 0 warnings, 74 lines checked

Patch 11/22 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

12/22 Checking commit 4373c17e018a (target/i386: reimplement (V)PADD(B, W, D, Q))
ERROR: line over 90 characters
#82: FILE: target/i386/translate.c:3169:
+#define gen_padd_mm(env, s, modrm, vece)   gen_gvec_ld_modrm_mm  ((env), (s), (modrm), (vece), tcg_gen_gvec_add, 0112)

ERROR: space prohibited between function name and open parenthesis '('
#82: FILE: target/i386/translate.c:3169:
+#define gen_padd_mm(env, s, modrm, vece)   gen_gvec_ld_modrm_mm  ((env), (s), (modrm), (vece), tcg_gen_gvec_add, 0112)

ERROR: line over 90 characters
#83: FILE: target/i386/translate.c:3170:
+#define gen_padd_xmm(env, s, modrm, vece)  gen_gvec_ld_modrm_xmm ((env), (s), (modrm), (vece), tcg_gen_gvec_add, 0112)

ERROR: space prohibited between function name and open parenthesis '('
#83: FILE: target/i386/translate.c:3170:
+#define gen_padd_xmm(env, s, modrm, vece)  gen_gvec_ld_modrm_xmm ((env), (s), (modrm), (vece), tcg_gen_gvec_add, 0112)

ERROR: line over 90 characters
#84: FILE: target/i386/translate.c:3171:
+#define gen_vpadd_xmm(env, s, modrm, vece) gen_gvec_ld_modrm_vxmm((env), (s), (modrm), (vece), tcg_gen_gvec_add, 0123)

ERROR: line over 90 characters
#85: FILE: target/i386/translate.c:3172:
+#define gen_vpadd_ymm(env, s, modrm, vece) gen_gvec_ld_modrm_vymm((env), (s), (modrm), (vece), tcg_gen_gvec_add, 0123)

ERROR: trailing statements should be on next line
#94: FILE: target/i386/translate.c:3309:
+    case 0xfc | M_0F:                  gen_padd_mm(env, s, modrm, MO_8); return;

WARNING: line over 80 characters
#95: FILE: target/i386/translate.c:3310:
+    case 0xfc | M_0F | P_66:           gen_padd_xmm(env, s, modrm, MO_8); return;

ERROR: trailing statements should be on next line
#95: FILE: target/i386/translate.c:3310:
+    case 0xfc | M_0F | P_66:           gen_padd_xmm(env, s, modrm, MO_8); return;

WARNING: line over 80 characters
#96: FILE: target/i386/translate.c:3311:
+    case 0xfc | M_0F | P_66 | VEX_128: gen_vpadd_xmm(env, s, modrm, MO_8); return;

ERROR: trailing statements should be on next line
#96: FILE: target/i386/translate.c:3311:
+    case 0xfc | M_0F | P_66 | VEX_128: gen_vpadd_xmm(env, s, modrm, MO_8); return;

WARNING: line over 80 characters
#97: FILE: target/i386/translate.c:3312:
+    case 0xfc | M_0F | P_66 | VEX_256: gen_vpadd_ymm(env, s, modrm, MO_8); return;

ERROR: trailing statements should be on next line
#97: FILE: target/i386/translate.c:3312:
+    case 0xfc | M_0F | P_66 | VEX_256: gen_vpadd_ymm(env, s, modrm, MO_8); return;

WARNING: line over 80 characters
#99: FILE: target/i386/translate.c:3314:
+    case 0xfd | M_0F:                  gen_padd_mm(env, s, modrm, MO_16); return;

ERROR: trailing statements should be on next line
#99: FILE: target/i386/translate.c:3314:
+    case 0xfd | M_0F:                  gen_padd_mm(env, s, modrm, MO_16); return;

WARNING: line over 80 characters
#100: FILE: target/i386/translate.c:3315:
+    case 0xfd | M_0F | P_66:           gen_padd_xmm(env, s, modrm, MO_16); return;

ERROR: trailing statements should be on next line
#100: FILE: target/i386/translate.c:3315:
+    case 0xfd | M_0F | P_66:           gen_padd_xmm(env, s, modrm, MO_16); return;

WARNING: line over 80 characters
#101: FILE: target/i386/translate.c:3316:
+    case 0xfd | M_0F | P_66 | VEX_128: gen_vpadd_xmm(env, s, modrm, MO_16); return;

ERROR: trailing statements should be on next line
#101: FILE: target/i386/translate.c:3316:
+    case 0xfd | M_0F | P_66 | VEX_128: gen_vpadd_xmm(env, s, modrm, MO_16); return;

WARNING: line over 80 characters
#102: FILE: target/i386/translate.c:3317:
+    case 0xfd | M_0F | P_66 | VEX_256: gen_vpadd_ymm(env, s, modrm, MO_16); return;

ERROR: trailing statements should be on next line
#102: FILE: target/i386/translate.c:3317:
+    case 0xfd | M_0F | P_66 | VEX_256: gen_vpadd_ymm(env, s, modrm, MO_16); return;

WARNING: line over 80 characters
#104: FILE: target/i386/translate.c:3319:
+    case 0xfe | M_0F:                  gen_padd_mm(env, s, modrm, MO_32); return;

ERROR: trailing statements should be on next line
#104: FILE: target/i386/translate.c:3319:
+    case 0xfe | M_0F:                  gen_padd_mm(env, s, modrm, MO_32); return;

WARNING: line over 80 characters
#105: FILE: target/i386/translate.c:3320:
+    case 0xfe | M_0F | P_66:           gen_padd_xmm(env, s, modrm, MO_32); return;

ERROR: trailing statements should be on next line
#105: FILE: target/i386/translate.c:3320:
+    case 0xfe | M_0F | P_66:           gen_padd_xmm(env, s, modrm, MO_32); return;

WARNING: line over 80 characters
#106: FILE: target/i386/translate.c:3321:
+    case 0xfe | M_0F | P_66 | VEX_128: gen_vpadd_xmm(env, s, modrm, MO_32); return;

ERROR: trailing statements should be on next line
#106: FILE: target/i386/translate.c:3321:
+    case 0xfe | M_0F | P_66 | VEX_128: gen_vpadd_xmm(env, s, modrm, MO_32); return;

WARNING: line over 80 characters
#107: FILE: target/i386/translate.c:3322:
+    case 0xfe | M_0F | P_66 | VEX_256: gen_vpadd_ymm(env, s, modrm, MO_32); return;

ERROR: trailing statements should be on next line
#107: FILE: target/i386/translate.c:3322:
+    case 0xfe | M_0F | P_66 | VEX_256: gen_vpadd_ymm(env, s, modrm, MO_32); return;

WARNING: line over 80 characters
#109: FILE: target/i386/translate.c:3324:
+    case 0xd4 | M_0F:                  gen_padd_mm(env, s, modrm, MO_64); return;

ERROR: trailing statements should be on next line
#109: FILE: target/i386/translate.c:3324:
+    case 0xd4 | M_0F:                  gen_padd_mm(env, s, modrm, MO_64); return;

WARNING: line over 80 characters
#110: FILE: target/i386/translate.c:3325:
+    case 0xd4 | M_0F | P_66:           gen_padd_xmm(env, s, modrm, MO_64); return;

ERROR: trailing statements should be on next line
#110: FILE: target/i386/translate.c:3325:
+    case 0xd4 | M_0F | P_66:           gen_padd_xmm(env, s, modrm, MO_64); return;

WARNING: line over 80 characters
#111: FILE: target/i386/translate.c:3326:
+    case 0xd4 | M_0F | P_66 | VEX_128: gen_vpadd_xmm(env, s, modrm, MO_64); return;

ERROR: trailing statements should be on next line
#111: FILE: target/i386/translate.c:3326:
+    case 0xd4 | M_0F | P_66 | VEX_128: gen_vpadd_xmm(env, s, modrm, MO_64); return;

WARNING: line over 80 characters
#112: FILE: target/i386/translate.c:3327:
+    case 0xd4 | M_0F | P_66 | VEX_256: gen_vpadd_ymm(env, s, modrm, MO_64); return;

ERROR: trailing statements should be on next line
#112: FILE: target/i386/translate.c:3327:
+    case 0xd4 | M_0F | P_66 | VEX_256: gen_vpadd_ymm(env, s, modrm, MO_64); return;

total: 22 errors, 15 warnings, 86 lines checked

Patch 12/22 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

13/22 Checking commit bec162d2ebfa (target/i386: reimplement (V)PSUB(B, W, D, Q))
ERROR: line over 90 characters
#75: FILE: target/i386/translate.c:3174:
+#define gen_psub_mm(env, s, modrm, vece)   gen_gvec_ld_modrm_mm  ((env), (s), (modrm), (vece), tcg_gen_gvec_sub, 0112)

ERROR: space prohibited between function name and open parenthesis '('
#75: FILE: target/i386/translate.c:3174:
+#define gen_psub_mm(env, s, modrm, vece)   gen_gvec_ld_modrm_mm  ((env), (s), (modrm), (vece), tcg_gen_gvec_sub, 0112)

ERROR: line over 90 characters
#76: FILE: target/i386/translate.c:3175:
+#define gen_psub_xmm(env, s, modrm, vece)  gen_gvec_ld_modrm_xmm ((env), (s), (modrm), (vece), tcg_gen_gvec_sub, 0112)

ERROR: space prohibited between function name and open parenthesis '('
#76: FILE: target/i386/translate.c:3175:
+#define gen_psub_xmm(env, s, modrm, vece)  gen_gvec_ld_modrm_xmm ((env), (s), (modrm), (vece), tcg_gen_gvec_sub, 0112)

ERROR: line over 90 characters
#77: FILE: target/i386/translate.c:3176:
+#define gen_vpsub_xmm(env, s, modrm, vece) gen_gvec_ld_modrm_vxmm((env), (s), (modrm), (vece), tcg_gen_gvec_sub, 0123)

ERROR: line over 90 characters
#78: FILE: target/i386/translate.c:3177:
+#define gen_vpsub_ymm(env, s, modrm, vece) gen_gvec_ld_modrm_vymm((env), (s), (modrm), (vece), tcg_gen_gvec_sub, 0123)

ERROR: trailing statements should be on next line
#87: FILE: target/i386/translate.c:3334:
+    case 0xf8 | M_0F:                  gen_psub_mm(env, s, modrm, MO_8); return;

WARNING: line over 80 characters
#88: FILE: target/i386/translate.c:3335:
+    case 0xf8 | M_0F | P_66:           gen_psub_xmm(env, s, modrm, MO_8); return;

ERROR: trailing statements should be on next line
#88: FILE: target/i386/translate.c:3335:
+    case 0xf8 | M_0F | P_66:           gen_psub_xmm(env, s, modrm, MO_8); return;

WARNING: line over 80 characters
#89: FILE: target/i386/translate.c:3336:
+    case 0xf8 | M_0F | P_66 | VEX_128: gen_vpsub_xmm(env, s, modrm, MO_8); return;

ERROR: trailing statements should be on next line
#89: FILE: target/i386/translate.c:3336:
+    case 0xf8 | M_0F | P_66 | VEX_128: gen_vpsub_xmm(env, s, modrm, MO_8); return;

WARNING: line over 80 characters
#90: FILE: target/i386/translate.c:3337:
+    case 0xf8 | M_0F | P_66 | VEX_256: gen_vpsub_ymm(env, s, modrm, MO_8); return;

ERROR: trailing statements should be on next line
#90: FILE: target/i386/translate.c:3337:
+    case 0xf8 | M_0F | P_66 | VEX_256: gen_vpsub_ymm(env, s, modrm, MO_8); return;

WARNING: line over 80 characters
#92: FILE: target/i386/translate.c:3339:
+    case 0xf9 | M_0F:                  gen_psub_mm(env, s, modrm, MO_16); return;

ERROR: trailing statements should be on next line
#92: FILE: target/i386/translate.c:3339:
+    case 0xf9 | M_0F:                  gen_psub_mm(env, s, modrm, MO_16); return;

WARNING: line over 80 characters
#93: FILE: target/i386/translate.c:3340:
+    case 0xf9 | M_0F | P_66:           gen_psub_xmm(env, s, modrm, MO_16); return;

ERROR: trailing statements should be on next line
#93: FILE: target/i386/translate.c:3340:
+    case 0xf9 | M_0F | P_66:           gen_psub_xmm(env, s, modrm, MO_16); return;

WARNING: line over 80 characters
#94: FILE: target/i386/translate.c:3341:
+    case 0xf9 | M_0F | P_66 | VEX_128: gen_vpsub_xmm(env, s, modrm, MO_16); return;

ERROR: trailing statements should be on next line
#94: FILE: target/i386/translate.c:3341:
+    case 0xf9 | M_0F | P_66 | VEX_128: gen_vpsub_xmm(env, s, modrm, MO_16); return;

WARNING: line over 80 characters
#95: FILE: target/i386/translate.c:3342:
+    case 0xf9 | M_0F | P_66 | VEX_256: gen_vpsub_ymm(env, s, modrm, MO_16); return;

ERROR: trailing statements should be on next line
#95: FILE: target/i386/translate.c:3342:
+    case 0xf9 | M_0F | P_66 | VEX_256: gen_vpsub_ymm(env, s, modrm, MO_16); return;

WARNING: line over 80 characters
#97: FILE: target/i386/translate.c:3344:
+    case 0xfa | M_0F:                  gen_psub_mm(env, s, modrm, MO_32); return;

ERROR: trailing statements should be on next line
#97: FILE: target/i386/translate.c:3344:
+    case 0xfa | M_0F:                  gen_psub_mm(env, s, modrm, MO_32); return;

WARNING: line over 80 characters
#98: FILE: target/i386/translate.c:3345:
+    case 0xfa | M_0F | P_66:           gen_psub_xmm(env, s, modrm, MO_32); return;

ERROR: trailing statements should be on next line
#98: FILE: target/i386/translate.c:3345:
+    case 0xfa | M_0F | P_66:           gen_psub_xmm(env, s, modrm, MO_32); return;

WARNING: line over 80 characters
#99: FILE: target/i386/translate.c:3346:
+    case 0xfa | M_0F | P_66 | VEX_128: gen_vpsub_xmm(env, s, modrm, MO_32); return;

ERROR: trailing statements should be on next line
#99: FILE: target/i386/translate.c:3346:
+    case 0xfa | M_0F | P_66 | VEX_128: gen_vpsub_xmm(env, s, modrm, MO_32); return;

WARNING: line over 80 characters
#100: FILE: target/i386/translate.c:3347:
+    case 0xfa | M_0F | P_66 | VEX_256: gen_vpsub_ymm(env, s, modrm, MO_32); return;

ERROR: trailing statements should be on next line
#100: FILE: target/i386/translate.c:3347:
+    case 0xfa | M_0F | P_66 | VEX_256: gen_vpsub_ymm(env, s, modrm, MO_32); return;

WARNING: line over 80 characters
#102: FILE: target/i386/translate.c:3349:
+    case 0xfb | M_0F:                  gen_psub_mm(env, s, modrm, MO_64); return;

ERROR: trailing statements should be on next line
#102: FILE: target/i386/translate.c:3349:
+    case 0xfb | M_0F:                  gen_psub_mm(env, s, modrm, MO_64); return;

WARNING: line over 80 characters
#103: FILE: target/i386/translate.c:3350:
+    case 0xfb | M_0F | P_66:           gen_psub_xmm(env, s, modrm, MO_64); return;

ERROR: trailing statements should be on next line
#103: FILE: target/i386/translate.c:3350:
+    case 0xfb | M_0F | P_66:           gen_psub_xmm(env, s, modrm, MO_64); return;

WARNING: line over 80 characters
#104: FILE: target/i386/translate.c:3351:
+    case 0xfb | M_0F | P_66 | VEX_128: gen_vpsub_xmm(env, s, modrm, MO_64); return;

ERROR: trailing statements should be on next line
#104: FILE: target/i386/translate.c:3351:
+    case 0xfb | M_0F | P_66 | VEX_128: gen_vpsub_xmm(env, s, modrm, MO_64); return;

WARNING: line over 80 characters
#105: FILE: target/i386/translate.c:3352:
+    case 0xfb | M_0F | P_66 | VEX_256: gen_vpsub_ymm(env, s, modrm, MO_64); return;

ERROR: trailing statements should be on next line
#105: FILE: target/i386/translate.c:3352:
+    case 0xfb | M_0F | P_66 | VEX_256: gen_vpsub_ymm(env, s, modrm, MO_64); return;

total: 22 errors, 15 warnings, 80 lines checked

Patch 13/22 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

14/22 Checking commit 6e5b716a0686 (target/i386: reimplement (V)PADDS(B, W))
ERROR: line over 90 characters
#74: FILE: target/i386/translate.c:3174:
+#define gen_padds_mm(env, s, modrm, vece)   gen_gvec_ld_modrm_mm  ((env), (s), (modrm), (vece), tcg_gen_gvec_ssadd, 0112)

ERROR: space prohibited between function name and open parenthesis '('
#74: FILE: target/i386/translate.c:3174:
+#define gen_padds_mm(env, s, modrm, vece)   gen_gvec_ld_modrm_mm  ((env), (s), (modrm), (vece), tcg_gen_gvec_ssadd, 0112)

ERROR: line over 90 characters
#75: FILE: target/i386/translate.c:3175:
+#define gen_padds_xmm(env, s, modrm, vece)  gen_gvec_ld_modrm_xmm ((env), (s), (modrm), (vece), tcg_gen_gvec_ssadd, 0112)

ERROR: space prohibited between function name and open parenthesis '('
#75: FILE: target/i386/translate.c:3175:
+#define gen_padds_xmm(env, s, modrm, vece)  gen_gvec_ld_modrm_xmm ((env), (s), (modrm), (vece), tcg_gen_gvec_ssadd, 0112)

ERROR: line over 90 characters
#76: FILE: target/i386/translate.c:3176:
+#define gen_vpadds_xmm(env, s, modrm, vece) gen_gvec_ld_modrm_vxmm((env), (s), (modrm), (vece), tcg_gen_gvec_ssadd, 0123)

ERROR: line over 90 characters
#77: FILE: target/i386/translate.c:3177:
+#define gen_vpadds_ymm(env, s, modrm, vece) gen_gvec_ld_modrm_vymm((env), (s), (modrm), (vece), tcg_gen_gvec_ssadd, 0123)

WARNING: line over 80 characters
#86: FILE: target/i386/translate.c:3339:
+    case 0xec | M_0F:                  gen_padds_mm(env, s, modrm, MO_8); return;

ERROR: trailing statements should be on next line
#86: FILE: target/i386/translate.c:3339:
+    case 0xec | M_0F:                  gen_padds_mm(env, s, modrm, MO_8); return;

WARNING: line over 80 characters
#87: FILE: target/i386/translate.c:3340:
+    case 0xec | M_0F | P_66:           gen_padds_xmm(env, s, modrm, MO_8); return;

ERROR: trailing statements should be on next line
#87: FILE: target/i386/translate.c:3340:
+    case 0xec | M_0F | P_66:           gen_padds_xmm(env, s, modrm, MO_8); return;

WARNING: line over 80 characters
#88: FILE: target/i386/translate.c:3341:
+    case 0xec | M_0F | P_66 | VEX_128: gen_vpadds_xmm(env, s, modrm, MO_8); return;

ERROR: trailing statements should be on next line
#88: FILE: target/i386/translate.c:3341:
+    case 0xec | M_0F | P_66 | VEX_128: gen_vpadds_xmm(env, s, modrm, MO_8); return;

WARNING: line over 80 characters
#89: FILE: target/i386/translate.c:3342:
+    case 0xec | M_0F | P_66 | VEX_256: gen_vpadds_ymm(env, s, modrm, MO_8); return;

ERROR: trailing statements should be on next line
#89: FILE: target/i386/translate.c:3342:
+    case 0xec | M_0F | P_66 | VEX_256: gen_vpadds_ymm(env, s, modrm, MO_8); return;

WARNING: line over 80 characters
#91: FILE: target/i386/translate.c:3344:
+    case 0xed | M_0F:                  gen_padds_mm(env, s, modrm, MO_16); return;

ERROR: trailing statements should be on next line
#91: FILE: target/i386/translate.c:3344:
+    case 0xed | M_0F:                  gen_padds_mm(env, s, modrm, MO_16); return;

WARNING: line over 80 characters
#92: FILE: target/i386/translate.c:3345:
+    case 0xed | M_0F | P_66:           gen_padds_xmm(env, s, modrm, MO_16); return;

ERROR: trailing statements should be on next line
#92: FILE: target/i386/translate.c:3345:
+    case 0xed | M_0F | P_66:           gen_padds_xmm(env, s, modrm, MO_16); return;

WARNING: line over 80 characters
#93: FILE: target/i386/translate.c:3346:
+    case 0xed | M_0F | P_66 | VEX_128: gen_vpadds_xmm(env, s, modrm, MO_16); return;

ERROR: trailing statements should be on next line
#93: FILE: target/i386/translate.c:3346:
+    case 0xed | M_0F | P_66 | VEX_128: gen_vpadds_xmm(env, s, modrm, MO_16); return;

WARNING: line over 80 characters
#94: FILE: target/i386/translate.c:3347:
+    case 0xed | M_0F | P_66 | VEX_256: gen_vpadds_ymm(env, s, modrm, MO_16); return;

ERROR: trailing statements should be on next line
#94: FILE: target/i386/translate.c:3347:
+    case 0xed | M_0F | P_66 | VEX_256: gen_vpadds_ymm(env, s, modrm, MO_16); return;

total: 14 errors, 8 warnings, 69 lines checked

Patch 14/22 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

15/22 Checking commit c77699eafa81 (target/i386: reimplement (V)PADDUS(B, W))
ERROR: line over 90 characters
#73: FILE: target/i386/translate.c:3179:
+#define gen_paddus_mm(env, s, modrm, vece)   gen_gvec_ld_modrm_mm  ((env), (s), (modrm), (vece), tcg_gen_gvec_usadd, 0112)

ERROR: space prohibited between function name and open parenthesis '('
#73: FILE: target/i386/translate.c:3179:
+#define gen_paddus_mm(env, s, modrm, vece)   gen_gvec_ld_modrm_mm  ((env), (s), (modrm), (vece), tcg_gen_gvec_usadd, 0112)

ERROR: line over 90 characters
#74: FILE: target/i386/translate.c:3180:
+#define gen_paddus_xmm(env, s, modrm, vece)  gen_gvec_ld_modrm_xmm ((env), (s), (modrm), (vece), tcg_gen_gvec_usadd, 0112)

ERROR: space prohibited between function name and open parenthesis '('
#74: FILE: target/i386/translate.c:3180:
+#define gen_paddus_xmm(env, s, modrm, vece)  gen_gvec_ld_modrm_xmm ((env), (s), (modrm), (vece), tcg_gen_gvec_usadd, 0112)

ERROR: line over 90 characters
#75: FILE: target/i386/translate.c:3181:
+#define gen_vpaddus_xmm(env, s, modrm, vece) gen_gvec_ld_modrm_vxmm((env), (s), (modrm), (vece), tcg_gen_gvec_usadd, 0123)

ERROR: line over 90 characters
#76: FILE: target/i386/translate.c:3182:
+#define gen_vpaddus_ymm(env, s, modrm, vece) gen_gvec_ld_modrm_vymm((env), (s), (modrm), (vece), tcg_gen_gvec_usadd, 0123)

WARNING: line over 80 characters
#85: FILE: target/i386/translate.c:3344:
+    case 0xdc | M_0F:                  gen_paddus_mm(env, s, modrm, MO_8); return;

ERROR: trailing statements should be on next line
#85: FILE: target/i386/translate.c:3344:
+    case 0xdc | M_0F:                  gen_paddus_mm(env, s, modrm, MO_8); return;

WARNING: line over 80 characters
#86: FILE: target/i386/translate.c:3345:
+    case 0xdc | M_0F | P_66:           gen_paddus_xmm(env, s, modrm, MO_8); return;

ERROR: trailing statements should be on next line
#86: FILE: target/i386/translate.c:3345:
+    case 0xdc | M_0F | P_66:           gen_paddus_xmm(env, s, modrm, MO_8); return;

WARNING: line over 80 characters
#87: FILE: target/i386/translate.c:3346:
+    case 0xdc | M_0F | P_66 | VEX_128: gen_vpaddus_xmm(env, s, modrm, MO_8); return;

ERROR: trailing statements should be on next line
#87: FILE: target/i386/translate.c:3346:
+    case 0xdc | M_0F | P_66 | VEX_128: gen_vpaddus_xmm(env, s, modrm, MO_8); return;

WARNING: line over 80 characters
#88: FILE: target/i386/translate.c:3347:
+    case 0xdc | M_0F | P_66 | VEX_256: gen_vpaddus_ymm(env, s, modrm, MO_8); return;

ERROR: trailing statements should be on next line
#88: FILE: target/i386/translate.c:3347:
+    case 0xdc | M_0F | P_66 | VEX_256: gen_vpaddus_ymm(env, s, modrm, MO_8); return;

WARNING: line over 80 characters
#90: FILE: target/i386/translate.c:3349:
+    case 0xdd | M_0F:                  gen_paddus_mm(env, s, modrm, MO_16); return;

ERROR: trailing statements should be on next line
#90: FILE: target/i386/translate.c:3349:
+    case 0xdd | M_0F:                  gen_paddus_mm(env, s, modrm, MO_16); return;

WARNING: line over 80 characters
#91: FILE: target/i386/translate.c:3350:
+    case 0xdd | M_0F | P_66:           gen_paddus_xmm(env, s, modrm, MO_16); return;

ERROR: trailing statements should be on next line
#91: FILE: target/i386/translate.c:3350:
+    case 0xdd | M_0F | P_66:           gen_paddus_xmm(env, s, modrm, MO_16); return;

WARNING: line over 80 characters
#92: FILE: target/i386/translate.c:3351:
+    case 0xdd | M_0F | P_66 | VEX_128: gen_vpaddus_xmm(env, s, modrm, MO_16); return;

ERROR: trailing statements should be on next line
#92: FILE: target/i386/translate.c:3351:
+    case 0xdd | M_0F | P_66 | VEX_128: gen_vpaddus_xmm(env, s, modrm, MO_16); return;

WARNING: line over 80 characters
#93: FILE: target/i386/translate.c:3352:
+    case 0xdd | M_0F | P_66 | VEX_256: gen_vpaddus_ymm(env, s, modrm, MO_16); return;

ERROR: trailing statements should be on next line
#93: FILE: target/i386/translate.c:3352:
+    case 0xdd | M_0F | P_66 | VEX_256: gen_vpaddus_ymm(env, s, modrm, MO_16); return;

total: 14 errors, 8 warnings, 68 lines checked

Patch 15/22 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

16/22 Checking commit 064acf4d1df4 (target/i386: reimplement (V)PSUBS(B, W))
ERROR: line over 90 characters
#70: FILE: target/i386/translate.c:3189:
+#define gen_psubs_mm(env, s, modrm, vece)   gen_gvec_ld_modrm_mm  ((env), (s), (modrm), (vece), tcg_gen_gvec_sssub, 0112)

ERROR: space prohibited between function name and open parenthesis '('
#70: FILE: target/i386/translate.c:3189:
+#define gen_psubs_mm(env, s, modrm, vece)   gen_gvec_ld_modrm_mm  ((env), (s), (modrm), (vece), tcg_gen_gvec_sssub, 0112)

ERROR: line over 90 characters
#71: FILE: target/i386/translate.c:3190:
+#define gen_psubs_xmm(env, s, modrm, vece)  gen_gvec_ld_modrm_xmm ((env), (s), (modrm), (vece), tcg_gen_gvec_sssub, 0112)

ERROR: space prohibited between function name and open parenthesis '('
#71: FILE: target/i386/translate.c:3190:
+#define gen_psubs_xmm(env, s, modrm, vece)  gen_gvec_ld_modrm_xmm ((env), (s), (modrm), (vece), tcg_gen_gvec_sssub, 0112)

ERROR: line over 90 characters
#72: FILE: target/i386/translate.c:3191:
+#define gen_vpsubs_xmm(env, s, modrm, vece) gen_gvec_ld_modrm_vxmm((env), (s), (modrm), (vece), tcg_gen_gvec_sssub, 0123)

ERROR: line over 90 characters
#73: FILE: target/i386/translate.c:3192:
+#define gen_vpsubs_ymm(env, s, modrm, vece) gen_gvec_ld_modrm_vymm((env), (s), (modrm), (vece), tcg_gen_gvec_sssub, 0123)

WARNING: line over 80 characters
#82: FILE: target/i386/translate.c:3389:
+    case 0xe8 | M_0F:                  gen_psubs_mm(env, s, modrm, MO_8); return;

ERROR: trailing statements should be on next line
#82: FILE: target/i386/translate.c:3389:
+    case 0xe8 | M_0F:                  gen_psubs_mm(env, s, modrm, MO_8); return;

WARNING: line over 80 characters
#83: FILE: target/i386/translate.c:3390:
+    case 0xe8 | M_0F | P_66:           gen_psubs_xmm(env, s, modrm, MO_8); return;

ERROR: trailing statements should be on next line
#83: FILE: target/i386/translate.c:3390:
+    case 0xe8 | M_0F | P_66:           gen_psubs_xmm(env, s, modrm, MO_8); return;

WARNING: line over 80 characters
#84: FILE: target/i386/translate.c:3391:
+    case 0xe8 | M_0F | P_66 | VEX_128: gen_vpsubs_xmm(env, s, modrm, MO_8); return;

ERROR: trailing statements should be on next line
#84: FILE: target/i386/translate.c:3391:
+    case 0xe8 | M_0F | P_66 | VEX_128: gen_vpsubs_xmm(env, s, modrm, MO_8); return;

WARNING: line over 80 characters
#85: FILE: target/i386/translate.c:3392:
+    case 0xe8 | M_0F | P_66 | VEX_256: gen_vpsubs_ymm(env, s, modrm, MO_8); return;

ERROR: trailing statements should be on next line
#85: FILE: target/i386/translate.c:3392:
+    case 0xe8 | M_0F | P_66 | VEX_256: gen_vpsubs_ymm(env, s, modrm, MO_8); return;

WARNING: line over 80 characters
#87: FILE: target/i386/translate.c:3394:
+    case 0xe9 | M_0F:                  gen_psubs_mm(env, s, modrm, MO_16); return;

ERROR: trailing statements should be on next line
#87: FILE: target/i386/translate.c:3394:
+    case 0xe9 | M_0F:                  gen_psubs_mm(env, s, modrm, MO_16); return;

WARNING: line over 80 characters
#88: FILE: target/i386/translate.c:3395:
+    case 0xe9 | M_0F | P_66:           gen_psubs_xmm(env, s, modrm, MO_16); return;

ERROR: trailing statements should be on next line
#88: FILE: target/i386/translate.c:3395:
+    case 0xe9 | M_0F | P_66:           gen_psubs_xmm(env, s, modrm, MO_16); return;

WARNING: line over 80 characters
#89: FILE: target/i386/translate.c:3396:
+    case 0xe9 | M_0F | P_66 | VEX_128: gen_vpsubs_xmm(env, s, modrm, MO_16); return;

ERROR: trailing statements should be on next line
#89: FILE: target/i386/translate.c:3396:
+    case 0xe9 | M_0F | P_66 | VEX_128: gen_vpsubs_xmm(env, s, modrm, MO_16); return;

WARNING: line over 80 characters
#90: FILE: target/i386/translate.c:3397:
+    case 0xe9 | M_0F | P_66 | VEX_256: gen_vpsubs_ymm(env, s, modrm, MO_16); return;

ERROR: trailing statements should be on next line
#90: FILE: target/i386/translate.c:3397:
+    case 0xe9 | M_0F | P_66 | VEX_256: gen_vpsubs_ymm(env, s, modrm, MO_16); return;

total: 14 errors, 8 warnings, 65 lines checked

Patch 16/22 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

17/22 Checking commit 913ba569a8d6 (target/i386: reimplement (V)PSUBUS(B, W))
ERROR: line over 90 characters
#70: FILE: target/i386/translate.c:3194:
+#define gen_psubus_mm(env, s, modrm, vece)   gen_gvec_ld_modrm_mm  ((env), (s), (modrm), (vece), tcg_gen_gvec_ussub, 0112)

ERROR: space prohibited between function name and open parenthesis '('
#70: FILE: target/i386/translate.c:3194:
+#define gen_psubus_mm(env, s, modrm, vece)   gen_gvec_ld_modrm_mm  ((env), (s), (modrm), (vece), tcg_gen_gvec_ussub, 0112)

ERROR: line over 90 characters
#71: FILE: target/i386/translate.c:3195:
+#define gen_psubus_xmm(env, s, modrm, vece)  gen_gvec_ld_modrm_xmm ((env), (s), (modrm), (vece), tcg_gen_gvec_ussub, 0112)

ERROR: space prohibited between function name and open parenthesis '('
#71: FILE: target/i386/translate.c:3195:
+#define gen_psubus_xmm(env, s, modrm, vece)  gen_gvec_ld_modrm_xmm ((env), (s), (modrm), (vece), tcg_gen_gvec_ussub, 0112)

ERROR: line over 90 characters
#72: FILE: target/i386/translate.c:3196:
+#define gen_vpsubus_xmm(env, s, modrm, vece) gen_gvec_ld_modrm_vxmm((env), (s), (modrm), (vece), tcg_gen_gvec_ussub, 0123)

ERROR: line over 90 characters
#73: FILE: target/i386/translate.c:3197:
+#define gen_vpsubus_ymm(env, s, modrm, vece) gen_gvec_ld_modrm_vymm((env), (s), (modrm), (vece), tcg_gen_gvec_ussub, 0123)

WARNING: line over 80 characters
#82: FILE: target/i386/translate.c:3394:
+    case 0xd8 | M_0F:                  gen_psubus_mm(env, s, modrm, MO_8); return;

ERROR: trailing statements should be on next line
#82: FILE: target/i386/translate.c:3394:
+    case 0xd8 | M_0F:                  gen_psubus_mm(env, s, modrm, MO_8); return;

WARNING: line over 80 characters
#83: FILE: target/i386/translate.c:3395:
+    case 0xd8 | M_0F | P_66:           gen_psubus_xmm(env, s, modrm, MO_8); return;

ERROR: trailing statements should be on next line
#83: FILE: target/i386/translate.c:3395:
+    case 0xd8 | M_0F | P_66:           gen_psubus_xmm(env, s, modrm, MO_8); return;

WARNING: line over 80 characters
#84: FILE: target/i386/translate.c:3396:
+    case 0xd8 | M_0F | P_66 | VEX_128: gen_vpsubus_xmm(env, s, modrm, MO_8); return;

ERROR: trailing statements should be on next line
#84: FILE: target/i386/translate.c:3396:
+    case 0xd8 | M_0F | P_66 | VEX_128: gen_vpsubus_xmm(env, s, modrm, MO_8); return;

WARNING: line over 80 characters
#85: FILE: target/i386/translate.c:3397:
+    case 0xd8 | M_0F | P_66 | VEX_256: gen_vpsubus_ymm(env, s, modrm, MO_8); return;

ERROR: trailing statements should be on next line
#85: FILE: target/i386/translate.c:3397:
+    case 0xd8 | M_0F | P_66 | VEX_256: gen_vpsubus_ymm(env, s, modrm, MO_8); return;

WARNING: line over 80 characters
#87: FILE: target/i386/translate.c:3399:
+    case 0xd9 | M_0F:                  gen_psubus_mm(env, s, modrm, MO_16); return;

ERROR: trailing statements should be on next line
#87: FILE: target/i386/translate.c:3399:
+    case 0xd9 | M_0F:                  gen_psubus_mm(env, s, modrm, MO_16); return;

WARNING: line over 80 characters
#88: FILE: target/i386/translate.c:3400:
+    case 0xd9 | M_0F | P_66:           gen_psubus_xmm(env, s, modrm, MO_16); return;

ERROR: trailing statements should be on next line
#88: FILE: target/i386/translate.c:3400:
+    case 0xd9 | M_0F | P_66:           gen_psubus_xmm(env, s, modrm, MO_16); return;

WARNING: line over 80 characters
#89: FILE: target/i386/translate.c:3401:
+    case 0xd9 | M_0F | P_66 | VEX_128: gen_vpsubus_xmm(env, s, modrm, MO_16); return;

ERROR: trailing statements should be on next line
#89: FILE: target/i386/translate.c:3401:
+    case 0xd9 | M_0F | P_66 | VEX_128: gen_vpsubus_xmm(env, s, modrm, MO_16); return;

WARNING: line over 80 characters
#90: FILE: target/i386/translate.c:3402:
+    case 0xd9 | M_0F | P_66 | VEX_256: gen_vpsubus_ymm(env, s, modrm, MO_16); return;

ERROR: trailing statements should be on next line
#90: FILE: target/i386/translate.c:3402:
+    case 0xd9 | M_0F | P_66 | VEX_256: gen_vpsubus_ymm(env, s, modrm, MO_16); return;

total: 14 errors, 8 warnings, 65 lines checked

Patch 17/22 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

18/22 Checking commit 164d45b6a753 (target/i386: reimplement (V)PMINSW)
ERROR: line over 90 characters
#61: FILE: target/i386/translate.c:3199:
+#define gen_pmins_mm(env, s, modrm, vece)   gen_gvec_ld_modrm_mm  ((env), (s), (modrm), (vece), tcg_gen_gvec_smin, 0112)

ERROR: space prohibited between function name and open parenthesis '('
#61: FILE: target/i386/translate.c:3199:
+#define gen_pmins_mm(env, s, modrm, vece)   gen_gvec_ld_modrm_mm  ((env), (s), (modrm), (vece), tcg_gen_gvec_smin, 0112)

ERROR: line over 90 characters
#62: FILE: target/i386/translate.c:3200:
+#define gen_pmins_xmm(env, s, modrm, vece)  gen_gvec_ld_modrm_xmm ((env), (s), (modrm), (vece), tcg_gen_gvec_smin, 0112)

ERROR: space prohibited between function name and open parenthesis '('
#62: FILE: target/i386/translate.c:3200:
+#define gen_pmins_xmm(env, s, modrm, vece)  gen_gvec_ld_modrm_xmm ((env), (s), (modrm), (vece), tcg_gen_gvec_smin, 0112)

ERROR: line over 90 characters
#63: FILE: target/i386/translate.c:3201:
+#define gen_vpmins_xmm(env, s, modrm, vece) gen_gvec_ld_modrm_vxmm((env), (s), (modrm), (vece), tcg_gen_gvec_smin, 0123)

ERROR: line over 90 characters
#64: FILE: target/i386/translate.c:3202:
+#define gen_vpmins_ymm(env, s, modrm, vece) gen_gvec_ld_modrm_vymm((env), (s), (modrm), (vece), tcg_gen_gvec_smin, 0123)

WARNING: line over 80 characters
#73: FILE: target/i386/translate.c:3419:
+    case 0xea | M_0F:                  gen_pmins_mm(env, s, modrm, MO_16); return;

ERROR: trailing statements should be on next line
#73: FILE: target/i386/translate.c:3419:
+    case 0xea | M_0F:                  gen_pmins_mm(env, s, modrm, MO_16); return;

WARNING: line over 80 characters
#74: FILE: target/i386/translate.c:3420:
+    case 0xea | M_0F | P_66:           gen_pmins_xmm(env, s, modrm, MO_16); return;

ERROR: trailing statements should be on next line
#74: FILE: target/i386/translate.c:3420:
+    case 0xea | M_0F | P_66:           gen_pmins_xmm(env, s, modrm, MO_16); return;

WARNING: line over 80 characters
#75: FILE: target/i386/translate.c:3421:
+    case 0xea | M_0F | P_66 | VEX_128: gen_vpmins_xmm(env, s, modrm, MO_16); return;

ERROR: trailing statements should be on next line
#75: FILE: target/i386/translate.c:3421:
+    case 0xea | M_0F | P_66 | VEX_128: gen_vpmins_xmm(env, s, modrm, MO_16); return;

WARNING: line over 80 characters
#76: FILE: target/i386/translate.c:3422:
+    case 0xea | M_0F | P_66 | VEX_256: gen_vpmins_ymm(env, s, modrm, MO_16); return;

ERROR: trailing statements should be on next line
#76: FILE: target/i386/translate.c:3422:
+    case 0xea | M_0F | P_66 | VEX_256: gen_vpmins_ymm(env, s, modrm, MO_16); return;

total: 10 errors, 4 warnings, 51 lines checked

Patch 18/22 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

19/22 Checking commit 3b59fa3524ac (target/i386: reimplement (V)PMINUB)
ERROR: line over 90 characters
#61: FILE: target/i386/translate.c:3204:
+#define gen_pminu_mm(env, s, modrm, vece)   gen_gvec_ld_modrm_mm  ((env), (s), (modrm), (vece), tcg_gen_gvec_umin, 0112)

ERROR: space prohibited between function name and open parenthesis '('
#61: FILE: target/i386/translate.c:3204:
+#define gen_pminu_mm(env, s, modrm, vece)   gen_gvec_ld_modrm_mm  ((env), (s), (modrm), (vece), tcg_gen_gvec_umin, 0112)

ERROR: line over 90 characters
#62: FILE: target/i386/translate.c:3205:
+#define gen_pminu_xmm(env, s, modrm, vece)  gen_gvec_ld_modrm_xmm ((env), (s), (modrm), (vece), tcg_gen_gvec_umin, 0112)

ERROR: space prohibited between function name and open parenthesis '('
#62: FILE: target/i386/translate.c:3205:
+#define gen_pminu_xmm(env, s, modrm, vece)  gen_gvec_ld_modrm_xmm ((env), (s), (modrm), (vece), tcg_gen_gvec_umin, 0112)

ERROR: line over 90 characters
#63: FILE: target/i386/translate.c:3206:
+#define gen_vpminu_xmm(env, s, modrm, vece) gen_gvec_ld_modrm_vxmm((env), (s), (modrm), (vece), tcg_gen_gvec_umin, 0123)

ERROR: line over 90 characters
#64: FILE: target/i386/translate.c:3207:
+#define gen_vpminu_ymm(env, s, modrm, vece) gen_gvec_ld_modrm_vymm((env), (s), (modrm), (vece), tcg_gen_gvec_umin, 0123)

WARNING: line over 80 characters
#73: FILE: target/i386/translate.c:3424:
+    case 0xda | M_0F:                  gen_pminu_mm(env, s, modrm, MO_8); return;

ERROR: trailing statements should be on next line
#73: FILE: target/i386/translate.c:3424:
+    case 0xda | M_0F:                  gen_pminu_mm(env, s, modrm, MO_8); return;

WARNING: line over 80 characters
#74: FILE: target/i386/translate.c:3425:
+    case 0xda | M_0F | P_66:           gen_pminu_xmm(env, s, modrm, MO_8); return;

ERROR: trailing statements should be on next line
#74: FILE: target/i386/translate.c:3425:
+    case 0xda | M_0F | P_66:           gen_pminu_xmm(env, s, modrm, MO_8); return;

WARNING: line over 80 characters
#75: FILE: target/i386/translate.c:3426:
+    case 0xda | M_0F | P_66 | VEX_128: gen_vpminu_xmm(env, s, modrm, MO_8); return;

ERROR: trailing statements should be on next line
#75: FILE: target/i386/translate.c:3426:
+    case 0xda | M_0F | P_66 | VEX_128: gen_vpminu_xmm(env, s, modrm, MO_8); return;

WARNING: line over 80 characters
#76: FILE: target/i386/translate.c:3427:
+    case 0xda | M_0F | P_66 | VEX_256: gen_vpminu_ymm(env, s, modrm, MO_8); return;

ERROR: trailing statements should be on next line
#76: FILE: target/i386/translate.c:3427:
+    case 0xda | M_0F | P_66 | VEX_256: gen_vpminu_ymm(env, s, modrm, MO_8); return;

total: 10 errors, 4 warnings, 51 lines checked

Patch 19/22 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

20/22 Checking commit 71d68bb2a0b6 (target/i386: reimplement (V)PMAXSW)
ERROR: line over 90 characters
#63: FILE: target/i386/translate.c:3209:
+#define gen_pmaxs_mm(env, s, modrm, vece)   gen_gvec_ld_modrm_mm  ((env), (s), (modrm), (vece), tcg_gen_gvec_smax, 0112)

ERROR: space prohibited between function name and open parenthesis '('
#63: FILE: target/i386/translate.c:3209:
+#define gen_pmaxs_mm(env, s, modrm, vece)   gen_gvec_ld_modrm_mm  ((env), (s), (modrm), (vece), tcg_gen_gvec_smax, 0112)

ERROR: line over 90 characters
#64: FILE: target/i386/translate.c:3210:
+#define gen_pmaxs_xmm(env, s, modrm, vece)  gen_gvec_ld_modrm_xmm ((env), (s), (modrm), (vece), tcg_gen_gvec_smax, 0112)

ERROR: space prohibited between function name and open parenthesis '('
#64: FILE: target/i386/translate.c:3210:
+#define gen_pmaxs_xmm(env, s, modrm, vece)  gen_gvec_ld_modrm_xmm ((env), (s), (modrm), (vece), tcg_gen_gvec_smax, 0112)

ERROR: line over 90 characters
#65: FILE: target/i386/translate.c:3211:
+#define gen_vpmaxs_xmm(env, s, modrm, vece) gen_gvec_ld_modrm_vxmm((env), (s), (modrm), (vece), tcg_gen_gvec_smax, 0123)

ERROR: line over 90 characters
#66: FILE: target/i386/translate.c:3212:
+#define gen_vpmaxs_ymm(env, s, modrm, vece) gen_gvec_ld_modrm_vymm((env), (s), (modrm), (vece), tcg_gen_gvec_smax, 0123)

WARNING: line over 80 characters
#75: FILE: target/i386/translate.c:3439:
+    case 0xee | M_0F:                  gen_pmaxs_mm(env, s, modrm, MO_16); return;

ERROR: trailing statements should be on next line
#75: FILE: target/i386/translate.c:3439:
+    case 0xee | M_0F:                  gen_pmaxs_mm(env, s, modrm, MO_16); return;

WARNING: line over 80 characters
#76: FILE: target/i386/translate.c:3440:
+    case 0xee | M_0F | P_66:           gen_pmaxs_xmm(env, s, modrm, MO_16); return;

ERROR: trailing statements should be on next line
#76: FILE: target/i386/translate.c:3440:
+    case 0xee | M_0F | P_66:           gen_pmaxs_xmm(env, s, modrm, MO_16); return;

WARNING: line over 80 characters
#77: FILE: target/i386/translate.c:3441:
+    case 0xee | M_0F | P_66 | VEX_128: gen_vpmaxs_xmm(env, s, modrm, MO_16); return;

ERROR: trailing statements should be on next line
#77: FILE: target/i386/translate.c:3441:
+    case 0xee | M_0F | P_66 | VEX_128: gen_vpmaxs_xmm(env, s, modrm, MO_16); return;

WARNING: line over 80 characters
#78: FILE: target/i386/translate.c:3442:
+    case 0xee | M_0F | P_66 | VEX_256: gen_vpmaxs_ymm(env, s, modrm, MO_16); return;

ERROR: trailing statements should be on next line
#78: FILE: target/i386/translate.c:3442:
+    case 0xee | M_0F | P_66 | VEX_256: gen_vpmaxs_ymm(env, s, modrm, MO_16); return;

total: 10 errors, 4 warnings, 53 lines checked

Patch 20/22 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

21/22 Checking commit 9d738494e0de (target/i386: reimplement (V)PMAXUB)
ERROR: line over 90 characters
#64: FILE: target/i386/translate.c:3214:
+#define gen_pmaxu_mm(env, s, modrm, vece)   gen_gvec_ld_modrm_mm  ((env), (s), (modrm), (vece), tcg_gen_gvec_umax, 0112)

ERROR: space prohibited between function name and open parenthesis '('
#64: FILE: target/i386/translate.c:3214:
+#define gen_pmaxu_mm(env, s, modrm, vece)   gen_gvec_ld_modrm_mm  ((env), (s), (modrm), (vece), tcg_gen_gvec_umax, 0112)

ERROR: line over 90 characters
#65: FILE: target/i386/translate.c:3215:
+#define gen_pmaxu_xmm(env, s, modrm, vece)  gen_gvec_ld_modrm_xmm ((env), (s), (modrm), (vece), tcg_gen_gvec_umax, 0112)

ERROR: space prohibited between function name and open parenthesis '('
#65: FILE: target/i386/translate.c:3215:
+#define gen_pmaxu_xmm(env, s, modrm, vece)  gen_gvec_ld_modrm_xmm ((env), (s), (modrm), (vece), tcg_gen_gvec_umax, 0112)

ERROR: line over 90 characters
#66: FILE: target/i386/translate.c:3216:
+#define gen_vpmaxu_xmm(env, s, modrm, vece) gen_gvec_ld_modrm_vxmm((env), (s), (modrm), (vece), tcg_gen_gvec_umax, 0123)

ERROR: line over 90 characters
#67: FILE: target/i386/translate.c:3217:
+#define gen_vpmaxu_ymm(env, s, modrm, vece) gen_gvec_ld_modrm_vymm((env), (s), (modrm), (vece), tcg_gen_gvec_umax, 0123)

WARNING: line over 80 characters
#76: FILE: target/i386/translate.c:3444:
+    case 0xde | M_0F:                  gen_pmaxu_mm(env, s, modrm, MO_8); return;

ERROR: trailing statements should be on next line
#76: FILE: target/i386/translate.c:3444:
+    case 0xde | M_0F:                  gen_pmaxu_mm(env, s, modrm, MO_8); return;

WARNING: line over 80 characters
#77: FILE: target/i386/translate.c:3445:
+    case 0xde | M_0F | P_66:           gen_pmaxu_xmm(env, s, modrm, MO_8); return;

ERROR: trailing statements should be on next line
#77: FILE: target/i386/translate.c:3445:
+    case 0xde | M_0F | P_66:           gen_pmaxu_xmm(env, s, modrm, MO_8); return;

WARNING: line over 80 characters
#78: FILE: target/i386/translate.c:3446:
+    case 0xde | M_0F | P_66 | VEX_128: gen_vpmaxu_xmm(env, s, modrm, MO_8); return;

ERROR: trailing statements should be on next line
#78: FILE: target/i386/translate.c:3446:
+    case 0xde | M_0F | P_66 | VEX_128: gen_vpmaxu_xmm(env, s, modrm, MO_8); return;

WARNING: line over 80 characters
#79: FILE: target/i386/translate.c:3447:
+    case 0xde | M_0F | P_66 | VEX_256: gen_vpmaxu_ymm(env, s, modrm, MO_8); return;

ERROR: trailing statements should be on next line
#79: FILE: target/i386/translate.c:3447:
+    case 0xde | M_0F | P_66 | VEX_256: gen_vpmaxu_ymm(env, s, modrm, MO_8); return;

total: 10 errors, 4 warnings, 54 lines checked

Patch 21/22 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

22/22 Checking commit e58e2b75097e (target/i386: reimplement (V)P(EQ, CMP)(B, W, D))
ERROR: line over 90 characters
#103: FILE: target/i386/translate.c:3226:
+#define gen_pcmpeq_mm(env, s, modrm, vece)   gen_gvec_ld_modrm_mm  ((env), (s), (modrm), (vece), gen_gvec_cmpeq, 0112)

ERROR: space prohibited between function name and open parenthesis '('
#103: FILE: target/i386/translate.c:3226:
+#define gen_pcmpeq_mm(env, s, modrm, vece)   gen_gvec_ld_modrm_mm  ((env), (s), (modrm), (vece), gen_gvec_cmpeq, 0112)

ERROR: line over 90 characters
#104: FILE: target/i386/translate.c:3227:
+#define gen_pcmpeq_xmm(env, s, modrm, vece)  gen_gvec_ld_modrm_xmm ((env), (s), (modrm), (vece), gen_gvec_cmpeq, 0112)

ERROR: space prohibited between function name and open parenthesis '('
#104: FILE: target/i386/translate.c:3227:
+#define gen_pcmpeq_xmm(env, s, modrm, vece)  gen_gvec_ld_modrm_xmm ((env), (s), (modrm), (vece), gen_gvec_cmpeq, 0112)

ERROR: line over 90 characters
#105: FILE: target/i386/translate.c:3228:
+#define gen_vpcmpeq_xmm(env, s, modrm, vece) gen_gvec_ld_modrm_vxmm((env), (s), (modrm), (vece), gen_gvec_cmpeq, 0123)

ERROR: line over 90 characters
#106: FILE: target/i386/translate.c:3229:
+#define gen_vpcmpeq_ymm(env, s, modrm, vece) gen_gvec_ld_modrm_vymm((env), (s), (modrm), (vece), gen_gvec_cmpeq, 0123)

ERROR: line over 90 characters
#115: FILE: target/i386/translate.c:3238:
+#define gen_pcmpgt_mm(env, s, modrm, vece)   gen_gvec_ld_modrm_mm  ((env), (s), (modrm), (vece), gen_gvec_cmpgt, 0112)

ERROR: space prohibited between function name and open parenthesis '('
#115: FILE: target/i386/translate.c:3238:
+#define gen_pcmpgt_mm(env, s, modrm, vece)   gen_gvec_ld_modrm_mm  ((env), (s), (modrm), (vece), gen_gvec_cmpgt, 0112)

ERROR: line over 90 characters
#116: FILE: target/i386/translate.c:3239:
+#define gen_pcmpgt_xmm(env, s, modrm, vece)  gen_gvec_ld_modrm_xmm ((env), (s), (modrm), (vece), gen_gvec_cmpgt, 0112)

ERROR: space prohibited between function name and open parenthesis '('
#116: FILE: target/i386/translate.c:3239:
+#define gen_pcmpgt_xmm(env, s, modrm, vece)  gen_gvec_ld_modrm_xmm ((env), (s), (modrm), (vece), gen_gvec_cmpgt, 0112)

ERROR: line over 90 characters
#117: FILE: target/i386/translate.c:3240:
+#define gen_vpcmpgt_xmm(env, s, modrm, vece) gen_gvec_ld_modrm_vxmm((env), (s), (modrm), (vece), gen_gvec_cmpgt, 0123)

ERROR: line over 90 characters
#118: FILE: target/i386/translate.c:3241:
+#define gen_vpcmpgt_ymm(env, s, modrm, vece) gen_gvec_ld_modrm_vymm((env), (s), (modrm), (vece), gen_gvec_cmpgt, 0123)

WARNING: line over 80 characters
#127: FILE: target/i386/translate.c:3478:
+    case 0x64 | M_0F:                  gen_pcmpgt_mm(env, s, modrm, MO_8); return;

ERROR: trailing statements should be on next line
#127: FILE: target/i386/translate.c:3478:
+    case 0x64 | M_0F:                  gen_pcmpgt_mm(env, s, modrm, MO_8); return;

WARNING: line over 80 characters
#128: FILE: target/i386/translate.c:3479:
+    case 0x64 | M_0F | P_66:           gen_pcmpgt_xmm(env, s, modrm, MO_8); return;

ERROR: trailing statements should be on next line
#128: FILE: target/i386/translate.c:3479:
+    case 0x64 | M_0F | P_66:           gen_pcmpgt_xmm(env, s, modrm, MO_8); return;

WARNING: line over 80 characters
#129: FILE: target/i386/translate.c:3480:
+    case 0x64 | M_0F | P_66 | VEX_128: gen_vpcmpgt_xmm(env, s, modrm, MO_8); return;

ERROR: trailing statements should be on next line
#129: FILE: target/i386/translate.c:3480:
+    case 0x64 | M_0F | P_66 | VEX_128: gen_vpcmpgt_xmm(env, s, modrm, MO_8); return;

WARNING: line over 80 characters
#130: FILE: target/i386/translate.c:3481:
+    case 0x64 | M_0F | P_66 | VEX_256: gen_vpcmpgt_ymm(env, s, modrm, MO_8); return;

ERROR: trailing statements should be on next line
#130: FILE: target/i386/translate.c:3481:
+    case 0x64 | M_0F | P_66 | VEX_256: gen_vpcmpgt_ymm(env, s, modrm, MO_8); return;

WARNING: line over 80 characters
#132: FILE: target/i386/translate.c:3483:
+    case 0x65 | M_0F:                  gen_pcmpgt_mm(env, s, modrm, MO_16); return;

ERROR: trailing statements should be on next line
#132: FILE: target/i386/translate.c:3483:
+    case 0x65 | M_0F:                  gen_pcmpgt_mm(env, s, modrm, MO_16); return;

WARNING: line over 80 characters
#133: FILE: target/i386/translate.c:3484:
+    case 0x65 | M_0F | P_66:           gen_pcmpgt_xmm(env, s, modrm, MO_16); return;

ERROR: trailing statements should be on next line
#133: FILE: target/i386/translate.c:3484:
+    case 0x65 | M_0F | P_66:           gen_pcmpgt_xmm(env, s, modrm, MO_16); return;

WARNING: line over 80 characters
#134: FILE: target/i386/translate.c:3485:
+    case 0x65 | M_0F | P_66 | VEX_128: gen_vpcmpgt_xmm(env, s, modrm, MO_16); return;

ERROR: trailing statements should be on next line
#134: FILE: target/i386/translate.c:3485:
+    case 0x65 | M_0F | P_66 | VEX_128: gen_vpcmpgt_xmm(env, s, modrm, MO_16); return;

WARNING: line over 80 characters
#135: FILE: target/i386/translate.c:3486:
+    case 0x65 | M_0F | P_66 | VEX_256: gen_vpcmpgt_ymm(env, s, modrm, MO_16); return;

ERROR: trailing statements should be on next line
#135: FILE: target/i386/translate.c:3486:
+    case 0x65 | M_0F | P_66 | VEX_256: gen_vpcmpgt_ymm(env, s, modrm, MO_16); return;

WARNING: line over 80 characters
#137: FILE: target/i386/translate.c:3488:
+    case 0x66 | M_0F:                  gen_pcmpgt_mm(env, s, modrm, MO_32); return;

ERROR: trailing statements should be on next line
#137: FILE: target/i386/translate.c:3488:
+    case 0x66 | M_0F:                  gen_pcmpgt_mm(env, s, modrm, MO_32); return;

WARNING: line over 80 characters
#138: FILE: target/i386/translate.c:3489:
+    case 0x66 | M_0F | P_66:           gen_pcmpgt_xmm(env, s, modrm, MO_32); return;

ERROR: trailing statements should be on next line
#138: FILE: target/i386/translate.c:3489:
+    case 0x66 | M_0F | P_66:           gen_pcmpgt_xmm(env, s, modrm, MO_32); return;

WARNING: line over 80 characters
#139: FILE: target/i386/translate.c:3490:
+    case 0x66 | M_0F | P_66 | VEX_128: gen_vpcmpgt_xmm(env, s, modrm, MO_32); return;

ERROR: trailing statements should be on next line
#139: FILE: target/i386/translate.c:3490:
+    case 0x66 | M_0F | P_66 | VEX_128: gen_vpcmpgt_xmm(env, s, modrm, MO_32); return;

WARNING: line over 80 characters
#140: FILE: target/i386/translate.c:3491:
+    case 0x66 | M_0F | P_66 | VEX_256: gen_vpcmpgt_ymm(env, s, modrm, MO_32); return;

ERROR: trailing statements should be on next line
#140: FILE: target/i386/translate.c:3491:
+    case 0x66 | M_0F | P_66 | VEX_256: gen_vpcmpgt_ymm(env, s, modrm, MO_32); return;

WARNING: line over 80 characters
#142: FILE: target/i386/translate.c:3493:
+    case 0x74 | M_0F:                  gen_pcmpeq_mm(env, s, modrm, MO_8); return;

ERROR: trailing statements should be on next line
#142: FILE: target/i386/translate.c:3493:
+    case 0x74 | M_0F:                  gen_pcmpeq_mm(env, s, modrm, MO_8); return;

WARNING: line over 80 characters
#143: FILE: target/i386/translate.c:3494:
+    case 0x74 | M_0F | P_66:           gen_pcmpeq_xmm(env, s, modrm, MO_8); return;

ERROR: trailing statements should be on next line
#143: FILE: target/i386/translate.c:3494:
+    case 0x74 | M_0F | P_66:           gen_pcmpeq_xmm(env, s, modrm, MO_8); return;

WARNING: line over 80 characters
#144: FILE: target/i386/translate.c:3495:
+    case 0x74 | M_0F | P_66 | VEX_128: gen_vpcmpeq_xmm(env, s, modrm, MO_8); return;

ERROR: trailing statements should be on next line
#144: FILE: target/i386/translate.c:3495:
+    case 0x74 | M_0F | P_66 | VEX_128: gen_vpcmpeq_xmm(env, s, modrm, MO_8); return;

WARNING: line over 80 characters
#145: FILE: target/i386/translate.c:3496:
+    case 0x74 | M_0F | P_66 | VEX_256: gen_vpcmpeq_ymm(env, s, modrm, MO_8); return;

ERROR: trailing statements should be on next line
#145: FILE: target/i386/translate.c:3496:
+    case 0x74 | M_0F | P_66 | VEX_256: gen_vpcmpeq_ymm(env, s, modrm, MO_8); return;

WARNING: line over 80 characters
#147: FILE: target/i386/translate.c:3498:
+    case 0x75 | M_0F:                  gen_pcmpeq_mm(env, s, modrm, MO_16); return;

ERROR: trailing statements should be on next line
#147: FILE: target/i386/translate.c:3498:
+    case 0x75 | M_0F:                  gen_pcmpeq_mm(env, s, modrm, MO_16); return;

WARNING: line over 80 characters
#148: FILE: target/i386/translate.c:3499:
+    case 0x75 | M_0F | P_66:           gen_pcmpeq_xmm(env, s, modrm, MO_16); return;

ERROR: trailing statements should be on next line
#148: FILE: target/i386/translate.c:3499:
+    case 0x75 | M_0F | P_66:           gen_pcmpeq_xmm(env, s, modrm, MO_16); return;

WARNING: line over 80 characters
#149: FILE: target/i386/translate.c:3500:
+    case 0x75 | M_0F | P_66 | VEX_128: gen_vpcmpeq_xmm(env, s, modrm, MO_16); return;

ERROR: trailing statements should be on next line
#149: FILE: target/i386/translate.c:3500:
+    case 0x75 | M_0F | P_66 | VEX_128: gen_vpcmpeq_xmm(env, s, modrm, MO_16); return;

WARNING: line over 80 characters
#150: FILE: target/i386/translate.c:3501:
+    case 0x75 | M_0F | P_66 | VEX_256: gen_vpcmpeq_ymm(env, s, modrm, MO_16); return;

ERROR: trailing statements should be on next line
#150: FILE: target/i386/translate.c:3501:
+    case 0x75 | M_0F | P_66 | VEX_256: gen_vpcmpeq_ymm(env, s, modrm, MO_16); return;

WARNING: line over 80 characters
#152: FILE: target/i386/translate.c:3503:
+    case 0x76 | M_0F:                  gen_pcmpeq_mm(env, s, modrm, MO_32); return;

ERROR: trailing statements should be on next line
#152: FILE: target/i386/translate.c:3503:
+    case 0x76 | M_0F:                  gen_pcmpeq_mm(env, s, modrm, MO_32); return;

WARNING: line over 80 characters
#153: FILE: target/i386/translate.c:3504:
+    case 0x76 | M_0F | P_66:           gen_pcmpeq_xmm(env, s, modrm, MO_32); return;

ERROR: trailing statements should be on next line
#153: FILE: target/i386/translate.c:3504:
+    case 0x76 | M_0F | P_66:           gen_pcmpeq_xmm(env, s, modrm, MO_32); return;

WARNING: line over 80 characters
#154: FILE: target/i386/translate.c:3505:
+    case 0x76 | M_0F | P_66 | VEX_128: gen_vpcmpeq_xmm(env, s, modrm, MO_32); return;

ERROR: trailing statements should be on next line
#154: FILE: target/i386/translate.c:3505:
+    case 0x76 | M_0F | P_66 | VEX_128: gen_vpcmpeq_xmm(env, s, modrm, MO_32); return;

WARNING: line over 80 characters
#155: FILE: target/i386/translate.c:3506:
+    case 0x76 | M_0F | P_66 | VEX_256: gen_vpcmpeq_ymm(env, s, modrm, MO_32); return;

ERROR: trailing statements should be on next line
#155: FILE: target/i386/translate.c:3506:
+    case 0x76 | M_0F | P_66 | VEX_256: gen_vpcmpeq_ymm(env, s, modrm, MO_32); return;

total: 36 errors, 24 warnings, 129 lines checked

Patch 22/22 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

=== OUTPUT END ===

Test command exited with code: 1


The full log is available at
http://patchew.org/logs/20190731175702.4916-1-jan.bobek@gmail.com/testing.checkpatch/?type=message.
---
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Please send your feedback to patchew-devel@redhat.com

Re: [Qemu-devel] [RFC PATCH v1 00/22] reimplement (some) x86 vector instructions using tcg-gvec

[no-reply]

Patchew URL: https://patchew.org/QEMU/20190731175702.4916-1-jan.bobek@gmail.com/



Hi,

This series seems to have some coding style problems. See output below for
more information:

Message-id: 20190731175702.4916-1-jan.bobek@gmail.com
Type: series
Subject: [Qemu-devel] [RFC PATCH v1 00/22] reimplement (some) x86 vector instructions using tcg-gvec

=== TEST SCRIPT BEGIN ===
#!/bin/bash
git rev-parse base > /dev/null || exit 0
git config --local diff.renamelimit 0
git config --local diff.renames True
git config --local diff.algorithm histogram
./scripts/checkpatch.pl --mailback base..
=== TEST SCRIPT END ===

From https://github.com/patchew-project/qemu
 t [tag update]            patchew/20190731175702.4916-1-jan.bobek@gmail.com -> patchew/20190731175702.4916-1-jan.bobek@gmail.com
Switched to a new branch 'test'
e2438c48fc target/i386: reimplement (V)P(EQ, CMP)(B, W, D)
4c83ed32e8 target/i386: reimplement (V)PMAXUB
dfde70d5c7 target/i386: reimplement (V)PMAXSW
3062bca413 target/i386: reimplement (V)PMINUB
121c2e52e8 target/i386: reimplement (V)PMINSW
944c0e98d2 target/i386: reimplement (V)PSUBUS(B, W)
34accebf3d target/i386: reimplement (V)PSUBS(B, W)
76c9dc0f39 target/i386: reimplement (V)PADDUS(B, W)
066ed674ee target/i386: reimplement (V)PADDS(B, W)
917f7d51ac target/i386: reimplement (V)PSUB(B, W, D, Q)
9f2a4e2bfa target/i386: reimplement (V)PADD(B, W, D, Q)
ddb637d6a4 target/i386: reimplement (V)PANDN, (V)ANDNPS, (V)ANDNPD
4558786faa target/i386: reimplement (V)PXOR, (V)XORPS, (V)XORPD
fe6b414735 target/i386: reimplement (V)POR, (V)ORPS, (V)ORPD
4cd94d3225 target/i386: reimplement (V)PAND, (V)ANDPS, (V)ANDPD
7c39e7aeaa target/i386: add vector register file alignment constraints
8ce334d91c target/i386: introduce gen_gvec_ld_modrm_* helpers
ec7c250e83 target/i386: introduce gen_ld_modrm_* helpers
eef2fd456b target/i386: Simplify gen_exception arguments
6273f91cf3 target/i386: Use prefix, aflag and dflag from DisasContext
6405677dbd target/i386: Push rex_w into DisasContext
0bac241111 target/i386: Push rex_r into DisasContext

=== OUTPUT BEGIN ===
1/22 Checking commit 0bac2411117e (target/i386: Push rex_r into DisasContext)
2/22 Checking commit 6405677dbd77 (target/i386: Push rex_w into DisasContext)
3/22 Checking commit 6273f91cf368 (target/i386: Use prefix, aflag and dflag from DisasContext)
4/22 Checking commit eef2fd456b74 (target/i386: Simplify gen_exception arguments)
5/22 Checking commit ec7c250e837b (target/i386: introduce gen_ld_modrm_* helpers)
WARNING: line over 80 characters
#22: FILE: target/i386/translate.c:3043:
+static inline void gen_ld_modrm_PqQq(CPUX86State *env, DisasContext *s, int modrm,

ERROR: "foo* bar" should be "foo *bar"
#23: FILE: target/i386/translate.c:3044:
+                                     uint32_t* dofs, uint32_t* aofs)

ERROR: space required before the open parenthesis '('
#29: FILE: target/i386/translate.c:3050:
+    if(mod == 3) {

WARNING: line over 80 characters
#41: FILE: target/i386/translate.c:3062:
+static inline void gen_ld_modrm_VxWx(CPUX86State *env, DisasContext *s, int modrm,

ERROR: "foo* bar" should be "foo *bar"
#42: FILE: target/i386/translate.c:3063:
+                                     uint32_t* dofs, uint32_t* aofs)

ERROR: space required before the open parenthesis '('
#48: FILE: target/i386/translate.c:3069:
+    if(mod == 3) {

WARNING: line over 80 characters
#56: FILE: target/i386/translate.c:3077:
+        gen_ldo_env_A0(s, *aofs); /* FIXME this needs to load 32 bytes for YMM */

WARNING: line over 80 characters
#60: FILE: target/i386/translate.c:3081:
+static inline void gen_ld_modrm_VxHxWx(CPUX86State *env, DisasContext *s, int modrm,

WARNING: line over 80 characters
#61: FILE: target/i386/translate.c:3082:
+                                       uint32_t* dofs, uint32_t* aofs, uint32_t* bofs)

ERROR: "foo* bar" should be "foo *bar"
#61: FILE: target/i386/translate.c:3082:
+                                       uint32_t* dofs, uint32_t* aofs, uint32_t* bofs)

total: 5 errors, 5 warnings, 53 lines checked

Patch 5/22 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

6/22 Checking commit 8ce334d91cad (target/i386: introduce gen_gvec_ld_modrm_* helpers)
WARNING: line over 80 characters
#21: FILE: target/i386/translate.c:3090:
+typedef void (*gen_ld_modrm_2_fp_t)(CPUX86State *env, DisasContext *s, int modrm,

WARNING: line over 80 characters
#23: FILE: target/i386/translate.c:3092:
+typedef void (*gen_ld_modrm_3_fp_t)(CPUX86State *env, DisasContext *s, int modrm,

WARNING: line over 80 characters
#24: FILE: target/i386/translate.c:3093:
+                                    uint32_t *dofs, uint32_t *aofs, uint32_t *bofs);

total: 0 errors, 3 warnings, 83 lines checked

Patch 6/22 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
7/22 Checking commit 7c39e7aeaa89 (target/i386: add vector register file alignment constraints)
8/22 Checking commit 4cd94d32253d (target/i386: reimplement (V)PAND, (V)ANDPS, (V)ANDPD)
ERROR: line over 90 characters
#92: FILE: target/i386/translate.c:3169:
+#define gen_pand_mm(env, s, modrm)   gen_gvec_ld_modrm_mm  ((env), (s), (modrm), MO_64, tcg_gen_gvec_and, 0112)

ERROR: space prohibited between function name and open parenthesis '('
#92: FILE: target/i386/translate.c:3169:
+#define gen_pand_mm(env, s, modrm)   gen_gvec_ld_modrm_mm  ((env), (s), (modrm), MO_64, tcg_gen_gvec_and, 0112)

ERROR: line over 90 characters
#93: FILE: target/i386/translate.c:3170:
+#define gen_pand_xmm(env, s, modrm)  gen_gvec_ld_modrm_xmm ((env), (s), (modrm), MO_64, tcg_gen_gvec_and, 0112)

ERROR: space prohibited between function name and open parenthesis '('
#93: FILE: target/i386/translate.c:3170:
+#define gen_pand_xmm(env, s, modrm)  gen_gvec_ld_modrm_xmm ((env), (s), (modrm), MO_64, tcg_gen_gvec_and, 0112)

ERROR: line over 90 characters
#94: FILE: target/i386/translate.c:3171:
+#define gen_vpand_xmm(env, s, modrm) gen_gvec_ld_modrm_vxmm((env), (s), (modrm), MO_64, tcg_gen_gvec_and, 0123)

ERROR: line over 90 characters
#95: FILE: target/i386/translate.c:3172:
+#define gen_vpand_ymm(env, s, modrm) gen_gvec_ld_modrm_vymm((env), (s), (modrm), MO_64, tcg_gen_gvec_and, 0123)

ERROR: space required before the open parenthesis '('
#122: FILE: target/i386/translate.c:3266:
+    switch(b | M_0F

ERROR: trailing statements should be on next line
#127: FILE: target/i386/translate.c:3271:
+    case 0xdb | M_0F:                  gen_pand_mm(env, s, modrm); return;

ERROR: trailing statements should be on next line
#128: FILE: target/i386/translate.c:3272:
+    case 0xdb | M_0F | P_66:           gen_pand_xmm(env, s, modrm); return;

ERROR: trailing statements should be on next line
#129: FILE: target/i386/translate.c:3273:
+    case 0xdb | M_0F | P_66 | VEX_128: gen_vpand_xmm(env, s, modrm); return;

ERROR: trailing statements should be on next line
#130: FILE: target/i386/translate.c:3274:
+    case 0xdb | M_0F | P_66 | VEX_256: gen_vpand_ymm(env, s, modrm); return;

ERROR: trailing statements should be on next line
#131: FILE: target/i386/translate.c:3275:
+    case 0x54 | M_0F:                  gen_andps_xmm(env, s, modrm); return;

ERROR: trailing statements should be on next line
#132: FILE: target/i386/translate.c:3276:
+    case 0x54 | M_0F | VEX_128:        gen_vandps_xmm(env, s, modrm); return;

ERROR: trailing statements should be on next line
#133: FILE: target/i386/translate.c:3277:
+    case 0x54 | M_0F | VEX_256:        gen_vandps_ymm(env, s, modrm); return;

ERROR: trailing statements should be on next line
#134: FILE: target/i386/translate.c:3278:
+    case 0x54 | M_0F | P_66:           gen_andpd_xmm(env, s, modrm); return;

ERROR: trailing statements should be on next line
#135: FILE: target/i386/translate.c:3279:
+    case 0x54 | M_0F | P_66 | VEX_128: gen_vandpd_xmm(env, s, modrm); return;

ERROR: trailing statements should be on next line
#136: FILE: target/i386/translate.c:3280:
+    case 0x54 | M_0F | P_66 | VEX_256: gen_vandpd_ymm(env, s, modrm); return;

ERROR: trailing statements should be on next line
#137: FILE: target/i386/translate.c:3281:
+    default: break;

total: 18 errors, 0 warnings, 106 lines checked

Patch 8/22 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

9/22 Checking commit fe6b41473554 (target/i386: reimplement (V)POR, (V)ORPS, (V)ORPD)
ERROR: line over 90 characters
#70: FILE: target/i386/translate.c:3180:
+#define gen_por_mm(env, s, modrm)   gen_gvec_ld_modrm_mm  ((env), (s), (modrm), MO_64, tcg_gen_gvec_or, 0112)

ERROR: space prohibited between function name and open parenthesis '('
#70: FILE: target/i386/translate.c:3180:
+#define gen_por_mm(env, s, modrm)   gen_gvec_ld_modrm_mm  ((env), (s), (modrm), MO_64, tcg_gen_gvec_or, 0112)

ERROR: line over 90 characters
#71: FILE: target/i386/translate.c:3181:
+#define gen_por_xmm(env, s, modrm)  gen_gvec_ld_modrm_xmm ((env), (s), (modrm), MO_64, tcg_gen_gvec_or, 0112)

ERROR: space prohibited between function name and open parenthesis '('
#71: FILE: target/i386/translate.c:3181:
+#define gen_por_xmm(env, s, modrm)  gen_gvec_ld_modrm_xmm ((env), (s), (modrm), MO_64, tcg_gen_gvec_or, 0112)

ERROR: line over 90 characters
#72: FILE: target/i386/translate.c:3182:
+#define gen_vpor_xmm(env, s, modrm) gen_gvec_ld_modrm_vxmm((env), (s), (modrm), MO_64, tcg_gen_gvec_or, 0123)

ERROR: line over 90 characters
#73: FILE: target/i386/translate.c:3183:
+#define gen_vpor_ymm(env, s, modrm) gen_gvec_ld_modrm_vymm((env), (s), (modrm), MO_64, tcg_gen_gvec_or, 0123)

ERROR: trailing statements should be on next line
#89: FILE: target/i386/translate.c:3293:
+    case 0xeb | M_0F:                  gen_por_mm(env, s, modrm); return;

ERROR: trailing statements should be on next line
#90: FILE: target/i386/translate.c:3294:
+    case 0xeb | M_0F | P_66:           gen_por_xmm(env, s, modrm); return;

ERROR: trailing statements should be on next line
#91: FILE: target/i386/translate.c:3295:
+    case 0xeb | M_0F | P_66 | VEX_128: gen_vpor_xmm(env, s, modrm); return;

ERROR: trailing statements should be on next line
#92: FILE: target/i386/translate.c:3296:
+    case 0xeb | M_0F | P_66 | VEX_256: gen_vpor_ymm(env, s, modrm); return;

ERROR: trailing statements should be on next line
#93: FILE: target/i386/translate.c:3297:
+    case 0x56 | M_0F:                  gen_orps_xmm(env, s, modrm); return;

ERROR: trailing statements should be on next line
#94: FILE: target/i386/translate.c:3298:
+    case 0x56 | M_0F | VEX_128:        gen_vorps_xmm(env, s, modrm); return;

ERROR: trailing statements should be on next line
#95: FILE: target/i386/translate.c:3299:
+    case 0x56 | M_0F | VEX_256:        gen_vorps_ymm(env, s, modrm); return;

ERROR: trailing statements should be on next line
#96: FILE: target/i386/translate.c:3300:
+    case 0x56 | M_0F | P_66:           gen_orpd_xmm(env, s, modrm); return;

ERROR: trailing statements should be on next line
#97: FILE: target/i386/translate.c:3301:
+    case 0x56 | M_0F | P_66 | VEX_128: gen_vorpd_xmm(env, s, modrm); return;

ERROR: trailing statements should be on next line
#98: FILE: target/i386/translate.c:3302:
+    case 0x56 | M_0F | P_66 | VEX_256: gen_vorpd_ymm(env, s, modrm); return;

total: 16 errors, 0 warnings, 72 lines checked

Patch 9/22 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

10/22 Checking commit 4558786faa52 (target/i386: reimplement (V)PXOR, (V)XORPS, (V)XORPD)
ERROR: line over 90 characters
#70: FILE: target/i386/translate.c:3191:
+#define gen_pxor_mm(env, s, modrm)   gen_gvec_ld_modrm_mm  ((env), (s), (modrm), MO_64, tcg_gen_gvec_xor, 0112)

ERROR: space prohibited between function name and open parenthesis '('
#70: FILE: target/i386/translate.c:3191:
+#define gen_pxor_mm(env, s, modrm)   gen_gvec_ld_modrm_mm  ((env), (s), (modrm), MO_64, tcg_gen_gvec_xor, 0112)

ERROR: line over 90 characters
#71: FILE: target/i386/translate.c:3192:
+#define gen_pxor_xmm(env, s, modrm)  gen_gvec_ld_modrm_xmm ((env), (s), (modrm), MO_64, tcg_gen_gvec_xor, 0112)

ERROR: space prohibited between function name and open parenthesis '('
#71: FILE: target/i386/translate.c:3192:
+#define gen_pxor_xmm(env, s, modrm)  gen_gvec_ld_modrm_xmm ((env), (s), (modrm), MO_64, tcg_gen_gvec_xor, 0112)

ERROR: line over 90 characters
#72: FILE: target/i386/translate.c:3193:
+#define gen_vpxor_xmm(env, s, modrm) gen_gvec_ld_modrm_vxmm((env), (s), (modrm), MO_64, tcg_gen_gvec_xor, 0123)

ERROR: line over 90 characters
#73: FILE: target/i386/translate.c:3194:
+#define gen_vpxor_ymm(env, s, modrm) gen_gvec_ld_modrm_vymm((env), (s), (modrm), MO_64, tcg_gen_gvec_xor, 0123)

ERROR: trailing statements should be on next line
#88: FILE: target/i386/translate.c:3315:
+    case 0xef | M_0F:                  gen_pxor_mm(env, s, modrm); return;

ERROR: trailing statements should be on next line
#89: FILE: target/i386/translate.c:3316:
+    case 0xef | M_0F | P_66:           gen_pxor_xmm(env, s, modrm); return;

ERROR: trailing statements should be on next line
#90: FILE: target/i386/translate.c:3317:
+    case 0xef | M_0F | P_66 | VEX_128: gen_vpxor_xmm(env, s, modrm); return;

ERROR: trailing statements should be on next line
#91: FILE: target/i386/translate.c:3318:
+    case 0xef | M_0F | P_66 | VEX_256: gen_vpxor_ymm(env, s, modrm); return;

ERROR: trailing statements should be on next line
#92: FILE: target/i386/translate.c:3319:
+    case 0x57 | M_0F:                  gen_xorps_xmm(env, s, modrm); return;

ERROR: trailing statements should be on next line
#93: FILE: target/i386/translate.c:3320:
+    case 0x57 | M_0F | VEX_128:        gen_vxorps_xmm(env, s, modrm); return;

ERROR: trailing statements should be on next line
#94: FILE: target/i386/translate.c:3321:
+    case 0x57 | M_0F | VEX_256:        gen_vxorps_ymm(env, s, modrm); return;

ERROR: trailing statements should be on next line
#95: FILE: target/i386/translate.c:3322:
+    case 0x57 | M_0F | P_66:           gen_xorpd_xmm(env, s, modrm); return;

ERROR: trailing statements should be on next line
#96: FILE: target/i386/translate.c:3323:
+    case 0x57 | M_0F | P_66 | VEX_128: gen_vxorpd_xmm(env, s, modrm); return;

ERROR: trailing statements should be on next line
#97: FILE: target/i386/translate.c:3324:
+    case 0x57 | M_0F | P_66 | VEX_256: gen_vxorpd_ymm(env, s, modrm); return;

total: 16 errors, 0 warnings, 71 lines checked

Patch 10/22 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

11/22 Checking commit ddb637d6a452 (target/i386: reimplement (V)PANDN, (V)ANDNPS, (V)ANDNPD)
ERROR: line over 90 characters
#73: FILE: target/i386/translate.c:3180:
+#define gen_pandn_mm(env, s, modrm)   gen_gvec_ld_modrm_mm  ((env), (s), (modrm), MO_64, tcg_gen_gvec_andc, 0121)

ERROR: space prohibited between function name and open parenthesis '('
#73: FILE: target/i386/translate.c:3180:
+#define gen_pandn_mm(env, s, modrm)   gen_gvec_ld_modrm_mm  ((env), (s), (modrm), MO_64, tcg_gen_gvec_andc, 0121)

ERROR: line over 90 characters
#74: FILE: target/i386/translate.c:3181:
+#define gen_pandn_xmm(env, s, modrm)  gen_gvec_ld_modrm_xmm ((env), (s), (modrm), MO_64, tcg_gen_gvec_andc, 0121)

ERROR: space prohibited between function name and open parenthesis '('
#74: FILE: target/i386/translate.c:3181:
+#define gen_pandn_xmm(env, s, modrm)  gen_gvec_ld_modrm_xmm ((env), (s), (modrm), MO_64, tcg_gen_gvec_andc, 0121)

ERROR: line over 90 characters
#75: FILE: target/i386/translate.c:3182:
+#define gen_vpandn_xmm(env, s, modrm) gen_gvec_ld_modrm_vxmm((env), (s), (modrm), MO_64, tcg_gen_gvec_andc, 0132)

ERROR: line over 90 characters
#76: FILE: target/i386/translate.c:3183:
+#define gen_vpandn_ymm(env, s, modrm) gen_gvec_ld_modrm_vymm((env), (s), (modrm), MO_64, tcg_gen_gvec_andc, 0132)

ERROR: trailing statements should be on next line
#91: FILE: target/i386/translate.c:3315:
+    case 0xdf | M_0F:                  gen_pandn_mm(env, s, modrm); return;

ERROR: trailing statements should be on next line
#92: FILE: target/i386/translate.c:3316:
+    case 0xdf | M_0F | P_66:           gen_pandn_xmm(env, s, modrm); return;

ERROR: trailing statements should be on next line
#93: FILE: target/i386/translate.c:3317:
+    case 0xdf | M_0F | P_66 | VEX_128: gen_vpandn_xmm(env, s, modrm); return;

ERROR: trailing statements should be on next line
#94: FILE: target/i386/translate.c:3318:
+    case 0xdf | M_0F | P_66 | VEX_256: gen_vpandn_ymm(env, s, modrm); return;

ERROR: trailing statements should be on next line
#95: FILE: target/i386/translate.c:3319:
+    case 0x55 | M_0F:                  gen_andnps_xmm(env, s, modrm); return;

ERROR: trailing statements should be on next line
#96: FILE: target/i386/translate.c:3320:
+    case 0x55 | M_0F | VEX_128:        gen_vandnps_xmm(env, s, modrm); return;

ERROR: trailing statements should be on next line
#97: FILE: target/i386/translate.c:3321:
+    case 0x55 | M_0F | VEX_256:        gen_vandnps_ymm(env, s, modrm); return;

ERROR: trailing statements should be on next line
#98: FILE: target/i386/translate.c:3322:
+    case 0x55 | M_0F | P_66:           gen_andnpd_xmm(env, s, modrm); return;

ERROR: trailing statements should be on next line
#99: FILE: target/i386/translate.c:3323:
+    case 0x55 | M_0F | P_66 | VEX_128: gen_vandnpd_xmm(env, s, modrm); return;

ERROR: trailing statements should be on next line
#100: FILE: target/i386/translate.c:3324:
+    case 0x55 | M_0F | P_66 | VEX_256: gen_vandnpd_ymm(env, s, modrm); return;

total: 16 errors, 0 warnings, 74 lines checked

Patch 11/22 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

12/22 Checking commit 9f2a4e2bfa17 (target/i386: reimplement (V)PADD(B, W, D, Q))
ERROR: line over 90 characters
#82: FILE: target/i386/translate.c:3169:
+#define gen_padd_mm(env, s, modrm, vece)   gen_gvec_ld_modrm_mm  ((env), (s), (modrm), (vece), tcg_gen_gvec_add, 0112)

ERROR: space prohibited between function name and open parenthesis '('
#82: FILE: target/i386/translate.c:3169:
+#define gen_padd_mm(env, s, modrm, vece)   gen_gvec_ld_modrm_mm  ((env), (s), (modrm), (vece), tcg_gen_gvec_add, 0112)

ERROR: line over 90 characters
#83: FILE: target/i386/translate.c:3170:
+#define gen_padd_xmm(env, s, modrm, vece)  gen_gvec_ld_modrm_xmm ((env), (s), (modrm), (vece), tcg_gen_gvec_add, 0112)

ERROR: space prohibited between function name and open parenthesis '('
#83: FILE: target/i386/translate.c:3170:
+#define gen_padd_xmm(env, s, modrm, vece)  gen_gvec_ld_modrm_xmm ((env), (s), (modrm), (vece), tcg_gen_gvec_add, 0112)

ERROR: line over 90 characters
#84: FILE: target/i386/translate.c:3171:
+#define gen_vpadd_xmm(env, s, modrm, vece) gen_gvec_ld_modrm_vxmm((env), (s), (modrm), (vece), tcg_gen_gvec_add, 0123)

ERROR: line over 90 characters
#85: FILE: target/i386/translate.c:3172:
+#define gen_vpadd_ymm(env, s, modrm, vece) gen_gvec_ld_modrm_vymm((env), (s), (modrm), (vece), tcg_gen_gvec_add, 0123)

ERROR: trailing statements should be on next line
#94: FILE: target/i386/translate.c:3309:
+    case 0xfc | M_0F:                  gen_padd_mm(env, s, modrm, MO_8); return;

WARNING: line over 80 characters
#95: FILE: target/i386/translate.c:3310:
+    case 0xfc | M_0F | P_66:           gen_padd_xmm(env, s, modrm, MO_8); return;

ERROR: trailing statements should be on next line
#95: FILE: target/i386/translate.c:3310:
+    case 0xfc | M_0F | P_66:           gen_padd_xmm(env, s, modrm, MO_8); return;

WARNING: line over 80 characters
#96: FILE: target/i386/translate.c:3311:
+    case 0xfc | M_0F | P_66 | VEX_128: gen_vpadd_xmm(env, s, modrm, MO_8); return;

ERROR: trailing statements should be on next line
#96: FILE: target/i386/translate.c:3311:
+    case 0xfc | M_0F | P_66 | VEX_128: gen_vpadd_xmm(env, s, modrm, MO_8); return;

WARNING: line over 80 characters
#97: FILE: target/i386/translate.c:3312:
+    case 0xfc | M_0F | P_66 | VEX_256: gen_vpadd_ymm(env, s, modrm, MO_8); return;

ERROR: trailing statements should be on next line
#97: FILE: target/i386/translate.c:3312:
+    case 0xfc | M_0F | P_66 | VEX_256: gen_vpadd_ymm(env, s, modrm, MO_8); return;

WARNING: line over 80 characters
#99: FILE: target/i386/translate.c:3314:
+    case 0xfd | M_0F:                  gen_padd_mm(env, s, modrm, MO_16); return;

ERROR: trailing statements should be on next line
#99: FILE: target/i386/translate.c:3314:
+    case 0xfd | M_0F:                  gen_padd_mm(env, s, modrm, MO_16); return;

WARNING: line over 80 characters
#100: FILE: target/i386/translate.c:3315:
+    case 0xfd | M_0F | P_66:           gen_padd_xmm(env, s, modrm, MO_16); return;

ERROR: trailing statements should be on next line
#100: FILE: target/i386/translate.c:3315:
+    case 0xfd | M_0F | P_66:           gen_padd_xmm(env, s, modrm, MO_16); return;

WARNING: line over 80 characters
#101: FILE: target/i386/translate.c:3316:
+    case 0xfd | M_0F | P_66 | VEX_128: gen_vpadd_xmm(env, s, modrm, MO_16); return;

ERROR: trailing statements should be on next line
#101: FILE: target/i386/translate.c:3316:
+    case 0xfd | M_0F | P_66 | VEX_128: gen_vpadd_xmm(env, s, modrm, MO_16); return;

WARNING: line over 80 characters
#102: FILE: target/i386/translate.c:3317:
+    case 0xfd | M_0F | P_66 | VEX_256: gen_vpadd_ymm(env, s, modrm, MO_16); return;

ERROR: trailing statements should be on next line
#102: FILE: target/i386/translate.c:3317:
+    case 0xfd | M_0F | P_66 | VEX_256: gen_vpadd_ymm(env, s, modrm, MO_16); return;

WARNING: line over 80 characters
#104: FILE: target/i386/translate.c:3319:
+    case 0xfe | M_0F:                  gen_padd_mm(env, s, modrm, MO_32); return;

ERROR: trailing statements should be on next line
#104: FILE: target/i386/translate.c:3319:
+    case 0xfe | M_0F:                  gen_padd_mm(env, s, modrm, MO_32); return;

WARNING: line over 80 characters
#105: FILE: target/i386/translate.c:3320:
+    case 0xfe | M_0F | P_66:           gen_padd_xmm(env, s, modrm, MO_32); return;

ERROR: trailing statements should be on next line
#105: FILE: target/i386/translate.c:3320:
+    case 0xfe | M_0F | P_66:           gen_padd_xmm(env, s, modrm, MO_32); return;

WARNING: line over 80 characters
#106: FILE: target/i386/translate.c:3321:
+    case 0xfe | M_0F | P_66 | VEX_128: gen_vpadd_xmm(env, s, modrm, MO_32); return;

ERROR: trailing statements should be on next line
#106: FILE: target/i386/translate.c:3321:
+    case 0xfe | M_0F | P_66 | VEX_128: gen_vpadd_xmm(env, s, modrm, MO_32); return;

WARNING: line over 80 characters
#107: FILE: target/i386/translate.c:3322:
+    case 0xfe | M_0F | P_66 | VEX_256: gen_vpadd_ymm(env, s, modrm, MO_32); return;

ERROR: trailing statements should be on next line
#107: FILE: target/i386/translate.c:3322:
+    case 0xfe | M_0F | P_66 | VEX_256: gen_vpadd_ymm(env, s, modrm, MO_32); return;

WARNING: line over 80 characters
#109: FILE: target/i386/translate.c:3324:
+    case 0xd4 | M_0F:                  gen_padd_mm(env, s, modrm, MO_64); return;

ERROR: trailing statements should be on next line
#109: FILE: target/i386/translate.c:3324:
+    case 0xd4 | M_0F:                  gen_padd_mm(env, s, modrm, MO_64); return;

WARNING: line over 80 characters
#110: FILE: target/i386/translate.c:3325:
+    case 0xd4 | M_0F | P_66:           gen_padd_xmm(env, s, modrm, MO_64); return;

ERROR: trailing statements should be on next line
#110: FILE: target/i386/translate.c:3325:
+    case 0xd4 | M_0F | P_66:           gen_padd_xmm(env, s, modrm, MO_64); return;

WARNING: line over 80 characters
#111: FILE: target/i386/translate.c:3326:
+    case 0xd4 | M_0F | P_66 | VEX_128: gen_vpadd_xmm(env, s, modrm, MO_64); return;

ERROR: trailing statements should be on next line
#111: FILE: target/i386/translate.c:3326:
+    case 0xd4 | M_0F | P_66 | VEX_128: gen_vpadd_xmm(env, s, modrm, MO_64); return;

WARNING: line over 80 characters
#112: FILE: target/i386/translate.c:3327:
+    case 0xd4 | M_0F | P_66 | VEX_256: gen_vpadd_ymm(env, s, modrm, MO_64); return;

ERROR: trailing statements should be on next line
#112: FILE: target/i386/translate.c:3327:
+    case 0xd4 | M_0F | P_66 | VEX_256: gen_vpadd_ymm(env, s, modrm, MO_64); return;

total: 22 errors, 15 warnings, 86 lines checked

Patch 12/22 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

13/22 Checking commit 917f7d51ac81 (target/i386: reimplement (V)PSUB(B, W, D, Q))
ERROR: line over 90 characters
#75: FILE: target/i386/translate.c:3174:
+#define gen_psub_mm(env, s, modrm, vece)   gen_gvec_ld_modrm_mm  ((env), (s), (modrm), (vece), tcg_gen_gvec_sub, 0112)

ERROR: space prohibited between function name and open parenthesis '('
#75: FILE: target/i386/translate.c:3174:
+#define gen_psub_mm(env, s, modrm, vece)   gen_gvec_ld_modrm_mm  ((env), (s), (modrm), (vece), tcg_gen_gvec_sub, 0112)

ERROR: line over 90 characters
#76: FILE: target/i386/translate.c:3175:
+#define gen_psub_xmm(env, s, modrm, vece)  gen_gvec_ld_modrm_xmm ((env), (s), (modrm), (vece), tcg_gen_gvec_sub, 0112)

ERROR: space prohibited between function name and open parenthesis '('
#76: FILE: target/i386/translate.c:3175:
+#define gen_psub_xmm(env, s, modrm, vece)  gen_gvec_ld_modrm_xmm ((env), (s), (modrm), (vece), tcg_gen_gvec_sub, 0112)

ERROR: line over 90 characters
#77: FILE: target/i386/translate.c:3176:
+#define gen_vpsub_xmm(env, s, modrm, vece) gen_gvec_ld_modrm_vxmm((env), (s), (modrm), (vece), tcg_gen_gvec_sub, 0123)

ERROR: line over 90 characters
#78: FILE: target/i386/translate.c:3177:
+#define gen_vpsub_ymm(env, s, modrm, vece) gen_gvec_ld_modrm_vymm((env), (s), (modrm), (vece), tcg_gen_gvec_sub, 0123)

ERROR: trailing statements should be on next line
#87: FILE: target/i386/translate.c:3334:
+    case 0xf8 | M_0F:                  gen_psub_mm(env, s, modrm, MO_8); return;

WARNING: line over 80 characters
#88: FILE: target/i386/translate.c:3335:
+    case 0xf8 | M_0F | P_66:           gen_psub_xmm(env, s, modrm, MO_8); return;

ERROR: trailing statements should be on next line
#88: FILE: target/i386/translate.c:3335:
+    case 0xf8 | M_0F | P_66:           gen_psub_xmm(env, s, modrm, MO_8); return;

WARNING: line over 80 characters
#89: FILE: target/i386/translate.c:3336:
+    case 0xf8 | M_0F | P_66 | VEX_128: gen_vpsub_xmm(env, s, modrm, MO_8); return;

ERROR: trailing statements should be on next line
#89: FILE: target/i386/translate.c:3336:
+    case 0xf8 | M_0F | P_66 | VEX_128: gen_vpsub_xmm(env, s, modrm, MO_8); return;

WARNING: line over 80 characters
#90: FILE: target/i386/translate.c:3337:
+    case 0xf8 | M_0F | P_66 | VEX_256: gen_vpsub_ymm(env, s, modrm, MO_8); return;

ERROR: trailing statements should be on next line
#90: FILE: target/i386/translate.c:3337:
+    case 0xf8 | M_0F | P_66 | VEX_256: gen_vpsub_ymm(env, s, modrm, MO_8); return;

WARNING: line over 80 characters
#92: FILE: target/i386/translate.c:3339:
+    case 0xf9 | M_0F:                  gen_psub_mm(env, s, modrm, MO_16); return;

ERROR: trailing statements should be on next line
#92: FILE: target/i386/translate.c:3339:
+    case 0xf9 | M_0F:                  gen_psub_mm(env, s, modrm, MO_16); return;

WARNING: line over 80 characters
#93: FILE: target/i386/translate.c:3340:
+    case 0xf9 | M_0F | P_66:           gen_psub_xmm(env, s, modrm, MO_16); return;

ERROR: trailing statements should be on next line
#93: FILE: target/i386/translate.c:3340:
+    case 0xf9 | M_0F | P_66:           gen_psub_xmm(env, s, modrm, MO_16); return;

WARNING: line over 80 characters
#94: FILE: target/i386/translate.c:3341:
+    case 0xf9 | M_0F | P_66 | VEX_128: gen_vpsub_xmm(env, s, modrm, MO_16); return;

ERROR: trailing statements should be on next line
#94: FILE: target/i386/translate.c:3341:
+    case 0xf9 | M_0F | P_66 | VEX_128: gen_vpsub_xmm(env, s, modrm, MO_16); return;

WARNING: line over 80 characters
#95: FILE: target/i386/translate.c:3342:
+    case 0xf9 | M_0F | P_66 | VEX_256: gen_vpsub_ymm(env, s, modrm, MO_16); return;

ERROR: trailing statements should be on next line
#95: FILE: target/i386/translate.c:3342:
+    case 0xf9 | M_0F | P_66 | VEX_256: gen_vpsub_ymm(env, s, modrm, MO_16); return;

WARNING: line over 80 characters
#97: FILE: target/i386/translate.c:3344:
+    case 0xfa | M_0F:                  gen_psub_mm(env, s, modrm, MO_32); return;

ERROR: trailing statements should be on next line
#97: FILE: target/i386/translate.c:3344:
+    case 0xfa | M_0F:                  gen_psub_mm(env, s, modrm, MO_32); return;

WARNING: line over 80 characters
#98: FILE: target/i386/translate.c:3345:
+    case 0xfa | M_0F | P_66:           gen_psub_xmm(env, s, modrm, MO_32); return;

ERROR: trailing statements should be on next line
#98: FILE: target/i386/translate.c:3345:
+    case 0xfa | M_0F | P_66:           gen_psub_xmm(env, s, modrm, MO_32); return;

WARNING: line over 80 characters
#99: FILE: target/i386/translate.c:3346:
+    case 0xfa | M_0F | P_66 | VEX_128: gen_vpsub_xmm(env, s, modrm, MO_32); return;

ERROR: trailing statements should be on next line
#99: FILE: target/i386/translate.c:3346:
+    case 0xfa | M_0F | P_66 | VEX_128: gen_vpsub_xmm(env, s, modrm, MO_32); return;

WARNING: line over 80 characters
#100: FILE: target/i386/translate.c:3347:
+    case 0xfa | M_0F | P_66 | VEX_256: gen_vpsub_ymm(env, s, modrm, MO_32); return;

ERROR: trailing statements should be on next line
#100: FILE: target/i386/translate.c:3347:
+    case 0xfa | M_0F | P_66 | VEX_256: gen_vpsub_ymm(env, s, modrm, MO_32); return;

WARNING: line over 80 characters
#102: FILE: target/i386/translate.c:3349:
+    case 0xfb | M_0F:                  gen_psub_mm(env, s, modrm, MO_64); return;

ERROR: trailing statements should be on next line
#102: FILE: target/i386/translate.c:3349:
+    case 0xfb | M_0F:                  gen_psub_mm(env, s, modrm, MO_64); return;

WARNING: line over 80 characters
#103: FILE: target/i386/translate.c:3350:
+    case 0xfb | M_0F | P_66:           gen_psub_xmm(env, s, modrm, MO_64); return;

ERROR: trailing statements should be on next line
#103: FILE: target/i386/translate.c:3350:
+    case 0xfb | M_0F | P_66:           gen_psub_xmm(env, s, modrm, MO_64); return;

WARNING: line over 80 characters
#104: FILE: target/i386/translate.c:3351:
+    case 0xfb | M_0F | P_66 | VEX_128: gen_vpsub_xmm(env, s, modrm, MO_64); return;

ERROR: trailing statements should be on next line
#104: FILE: target/i386/translate.c:3351:
+    case 0xfb | M_0F | P_66 | VEX_128: gen_vpsub_xmm(env, s, modrm, MO_64); return;

WARNING: line over 80 characters
#105: FILE: target/i386/translate.c:3352:
+    case 0xfb | M_0F | P_66 | VEX_256: gen_vpsub_ymm(env, s, modrm, MO_64); return;

ERROR: trailing statements should be on next line
#105: FILE: target/i386/translate.c:3352:
+    case 0xfb | M_0F | P_66 | VEX_256: gen_vpsub_ymm(env, s, modrm, MO_64); return;

total: 22 errors, 15 warnings, 80 lines checked

Patch 13/22 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

14/22 Checking commit 066ed674eeda (target/i386: reimplement (V)PADDS(B, W))
ERROR: line over 90 characters
#74: FILE: target/i386/translate.c:3174:
+#define gen_padds_mm(env, s, modrm, vece)   gen_gvec_ld_modrm_mm  ((env), (s), (modrm), (vece), tcg_gen_gvec_ssadd, 0112)

ERROR: space prohibited between function name and open parenthesis '('
#74: FILE: target/i386/translate.c:3174:
+#define gen_padds_mm(env, s, modrm, vece)   gen_gvec_ld_modrm_mm  ((env), (s), (modrm), (vece), tcg_gen_gvec_ssadd, 0112)

ERROR: line over 90 characters
#75: FILE: target/i386/translate.c:3175:
+#define gen_padds_xmm(env, s, modrm, vece)  gen_gvec_ld_modrm_xmm ((env), (s), (modrm), (vece), tcg_gen_gvec_ssadd, 0112)

ERROR: space prohibited between function name and open parenthesis '('
#75: FILE: target/i386/translate.c:3175:
+#define gen_padds_xmm(env, s, modrm, vece)  gen_gvec_ld_modrm_xmm ((env), (s), (modrm), (vece), tcg_gen_gvec_ssadd, 0112)

ERROR: line over 90 characters
#76: FILE: target/i386/translate.c:3176:
+#define gen_vpadds_xmm(env, s, modrm, vece) gen_gvec_ld_modrm_vxmm((env), (s), (modrm), (vece), tcg_gen_gvec_ssadd, 0123)

ERROR: line over 90 characters
#77: FILE: target/i386/translate.c:3177:
+#define gen_vpadds_ymm(env, s, modrm, vece) gen_gvec_ld_modrm_vymm((env), (s), (modrm), (vece), tcg_gen_gvec_ssadd, 0123)

WARNING: line over 80 characters
#86: FILE: target/i386/translate.c:3339:
+    case 0xec | M_0F:                  gen_padds_mm(env, s, modrm, MO_8); return;

ERROR: trailing statements should be on next line
#86: FILE: target/i386/translate.c:3339:
+    case 0xec | M_0F:                  gen_padds_mm(env, s, modrm, MO_8); return;

WARNING: line over 80 characters
#87: FILE: target/i386/translate.c:3340:
+    case 0xec | M_0F | P_66:           gen_padds_xmm(env, s, modrm, MO_8); return;

ERROR: trailing statements should be on next line
#87: FILE: target/i386/translate.c:3340:
+    case 0xec | M_0F | P_66:           gen_padds_xmm(env, s, modrm, MO_8); return;

WARNING: line over 80 characters
#88: FILE: target/i386/translate.c:3341:
+    case 0xec | M_0F | P_66 | VEX_128: gen_vpadds_xmm(env, s, modrm, MO_8); return;

ERROR: trailing statements should be on next line
#88: FILE: target/i386/translate.c:3341:
+    case 0xec | M_0F | P_66 | VEX_128: gen_vpadds_xmm(env, s, modrm, MO_8); return;

WARNING: line over 80 characters
#89: FILE: target/i386/translate.c:3342:
+    case 0xec | M_0F | P_66 | VEX_256: gen_vpadds_ymm(env, s, modrm, MO_8); return;

ERROR: trailing statements should be on next line
#89: FILE: target/i386/translate.c:3342:
+    case 0xec | M_0F | P_66 | VEX_256: gen_vpadds_ymm(env, s, modrm, MO_8); return;

WARNING: line over 80 characters
#91: FILE: target/i386/translate.c:3344:
+    case 0xed | M_0F:                  gen_padds_mm(env, s, modrm, MO_16); return;

ERROR: trailing statements should be on next line
#91: FILE: target/i386/translate.c:3344:
+    case 0xed | M_0F:                  gen_padds_mm(env, s, modrm, MO_16); return;

WARNING: line over 80 characters
#92: FILE: target/i386/translate.c:3345:
+    case 0xed | M_0F | P_66:           gen_padds_xmm(env, s, modrm, MO_16); return;

ERROR: trailing statements should be on next line
#92: FILE: target/i386/translate.c:3345:
+    case 0xed | M_0F | P_66:           gen_padds_xmm(env, s, modrm, MO_16); return;

WARNING: line over 80 characters
#93: FILE: target/i386/translate.c:3346:
+    case 0xed | M_0F | P_66 | VEX_128: gen_vpadds_xmm(env, s, modrm, MO_16); return;

ERROR: trailing statements should be on next line
#93: FILE: target/i386/translate.c:3346:
+    case 0xed | M_0F | P_66 | VEX_128: gen_vpadds_xmm(env, s, modrm, MO_16); return;

WARNING: line over 80 characters
#94: FILE: target/i386/translate.c:3347:
+    case 0xed | M_0F | P_66 | VEX_256: gen_vpadds_ymm(env, s, modrm, MO_16); return;

ERROR: trailing statements should be on next line
#94: FILE: target/i386/translate.c:3347:
+    case 0xed | M_0F | P_66 | VEX_256: gen_vpadds_ymm(env, s, modrm, MO_16); return;

total: 14 errors, 8 warnings, 69 lines checked

Patch 14/22 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

15/22 Checking commit 76c9dc0f39fe (target/i386: reimplement (V)PADDUS(B, W))
ERROR: line over 90 characters
#73: FILE: target/i386/translate.c:3179:
+#define gen_paddus_mm(env, s, modrm, vece)   gen_gvec_ld_modrm_mm  ((env), (s), (modrm), (vece), tcg_gen_gvec_usadd, 0112)

ERROR: space prohibited between function name and open parenthesis '('
#73: FILE: target/i386/translate.c:3179:
+#define gen_paddus_mm(env, s, modrm, vece)   gen_gvec_ld_modrm_mm  ((env), (s), (modrm), (vece), tcg_gen_gvec_usadd, 0112)

ERROR: line over 90 characters
#74: FILE: target/i386/translate.c:3180:
+#define gen_paddus_xmm(env, s, modrm, vece)  gen_gvec_ld_modrm_xmm ((env), (s), (modrm), (vece), tcg_gen_gvec_usadd, 0112)

ERROR: space prohibited between function name and open parenthesis '('
#74: FILE: target/i386/translate.c:3180:
+#define gen_paddus_xmm(env, s, modrm, vece)  gen_gvec_ld_modrm_xmm ((env), (s), (modrm), (vece), tcg_gen_gvec_usadd, 0112)

ERROR: line over 90 characters
#75: FILE: target/i386/translate.c:3181:
+#define gen_vpaddus_xmm(env, s, modrm, vece) gen_gvec_ld_modrm_vxmm((env), (s), (modrm), (vece), tcg_gen_gvec_usadd, 0123)

ERROR: line over 90 characters
#76: FILE: target/i386/translate.c:3182:
+#define gen_vpaddus_ymm(env, s, modrm, vece) gen_gvec_ld_modrm_vymm((env), (s), (modrm), (vece), tcg_gen_gvec_usadd, 0123)

WARNING: line over 80 characters
#85: FILE: target/i386/translate.c:3344:
+    case 0xdc | M_0F:                  gen_paddus_mm(env, s, modrm, MO_8); return;

ERROR: trailing statements should be on next line
#85: FILE: target/i386/translate.c:3344:
+    case 0xdc | M_0F:                  gen_paddus_mm(env, s, modrm, MO_8); return;

WARNING: line over 80 characters
#86: FILE: target/i386/translate.c:3345:
+    case 0xdc | M_0F | P_66:           gen_paddus_xmm(env, s, modrm, MO_8); return;

ERROR: trailing statements should be on next line
#86: FILE: target/i386/translate.c:3345:
+    case 0xdc | M_0F | P_66:           gen_paddus_xmm(env, s, modrm, MO_8); return;

WARNING: line over 80 characters
#87: FILE: target/i386/translate.c:3346:
+    case 0xdc | M_0F | P_66 | VEX_128: gen_vpaddus_xmm(env, s, modrm, MO_8); return;

ERROR: trailing statements should be on next line
#87: FILE: target/i386/translate.c:3346:
+    case 0xdc | M_0F | P_66 | VEX_128: gen_vpaddus_xmm(env, s, modrm, MO_8); return;

WARNING: line over 80 characters
#88: FILE: target/i386/translate.c:3347:
+    case 0xdc | M_0F | P_66 | VEX_256: gen_vpaddus_ymm(env, s, modrm, MO_8); return;

ERROR: trailing statements should be on next line
#88: FILE: target/i386/translate.c:3347:
+    case 0xdc | M_0F | P_66 | VEX_256: gen_vpaddus_ymm(env, s, modrm, MO_8); return;

WARNING: line over 80 characters
#90: FILE: target/i386/translate.c:3349:
+    case 0xdd | M_0F:                  gen_paddus_mm(env, s, modrm, MO_16); return;

ERROR: trailing statements should be on next line
#90: FILE: target/i386/translate.c:3349:
+    case 0xdd | M_0F:                  gen_paddus_mm(env, s, modrm, MO_16); return;

WARNING: line over 80 characters
#91: FILE: target/i386/translate.c:3350:
+    case 0xdd | M_0F | P_66:           gen_paddus_xmm(env, s, modrm, MO_16); return;

ERROR: trailing statements should be on next line
#91: FILE: target/i386/translate.c:3350:
+    case 0xdd | M_0F | P_66:           gen_paddus_xmm(env, s, modrm, MO_16); return;

WARNING: line over 80 characters
#92: FILE: target/i386/translate.c:3351:
+    case 0xdd | M_0F | P_66 | VEX_128: gen_vpaddus_xmm(env, s, modrm, MO_16); return;

ERROR: trailing statements should be on next line
#92: FILE: target/i386/translate.c:3351:
+    case 0xdd | M_0F | P_66 | VEX_128: gen_vpaddus_xmm(env, s, modrm, MO_16); return;

WARNING: line over 80 characters
#93: FILE: target/i386/translate.c:3352:
+    case 0xdd | M_0F | P_66 | VEX_256: gen_vpaddus_ymm(env, s, modrm, MO_16); return;

ERROR: trailing statements should be on next line
#93: FILE: target/i386/translate.c:3352:
+    case 0xdd | M_0F | P_66 | VEX_256: gen_vpaddus_ymm(env, s, modrm, MO_16); return;

total: 14 errors, 8 warnings, 68 lines checked

Patch 15/22 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

16/22 Checking commit 34accebf3dca (target/i386: reimplement (V)PSUBS(B, W))
ERROR: line over 90 characters
#70: FILE: target/i386/translate.c:3189:
+#define gen_psubs_mm(env, s, modrm, vece)   gen_gvec_ld_modrm_mm  ((env), (s), (modrm), (vece), tcg_gen_gvec_sssub, 0112)

ERROR: space prohibited between function name and open parenthesis '('
#70: FILE: target/i386/translate.c:3189:
+#define gen_psubs_mm(env, s, modrm, vece)   gen_gvec_ld_modrm_mm  ((env), (s), (modrm), (vece), tcg_gen_gvec_sssub, 0112)

ERROR: line over 90 characters
#71: FILE: target/i386/translate.c:3190:
+#define gen_psubs_xmm(env, s, modrm, vece)  gen_gvec_ld_modrm_xmm ((env), (s), (modrm), (vece), tcg_gen_gvec_sssub, 0112)

ERROR: space prohibited between function name and open parenthesis '('
#71: FILE: target/i386/translate.c:3190:
+#define gen_psubs_xmm(env, s, modrm, vece)  gen_gvec_ld_modrm_xmm ((env), (s), (modrm), (vece), tcg_gen_gvec_sssub, 0112)

ERROR: line over 90 characters
#72: FILE: target/i386/translate.c:3191:
+#define gen_vpsubs_xmm(env, s, modrm, vece) gen_gvec_ld_modrm_vxmm((env), (s), (modrm), (vece), tcg_gen_gvec_sssub, 0123)

ERROR: line over 90 characters
#73: FILE: target/i386/translate.c:3192:
+#define gen_vpsubs_ymm(env, s, modrm, vece) gen_gvec_ld_modrm_vymm((env), (s), (modrm), (vece), tcg_gen_gvec_sssub, 0123)

WARNING: line over 80 characters
#82: FILE: target/i386/translate.c:3389:
+    case 0xe8 | M_0F:                  gen_psubs_mm(env, s, modrm, MO_8); return;

ERROR: trailing statements should be on next line
#82: FILE: target/i386/translate.c:3389:
+    case 0xe8 | M_0F:                  gen_psubs_mm(env, s, modrm, MO_8); return;

WARNING: line over 80 characters
#83: FILE: target/i386/translate.c:3390:
+    case 0xe8 | M_0F | P_66:           gen_psubs_xmm(env, s, modrm, MO_8); return;

ERROR: trailing statements should be on next line
#83: FILE: target/i386/translate.c:3390:
+    case 0xe8 | M_0F | P_66:           gen_psubs_xmm(env, s, modrm, MO_8); return;

WARNING: line over 80 characters
#84: FILE: target/i386/translate.c:3391:
+    case 0xe8 | M_0F | P_66 | VEX_128: gen_vpsubs_xmm(env, s, modrm, MO_8); return;

ERROR: trailing statements should be on next line
#84: FILE: target/i386/translate.c:3391:
+    case 0xe8 | M_0F | P_66 | VEX_128: gen_vpsubs_xmm(env, s, modrm, MO_8); return;

WARNING: line over 80 characters
#85: FILE: target/i386/translate.c:3392:
+    case 0xe8 | M_0F | P_66 | VEX_256: gen_vpsubs_ymm(env, s, modrm, MO_8); return;

ERROR: trailing statements should be on next line
#85: FILE: target/i386/translate.c:3392:
+    case 0xe8 | M_0F | P_66 | VEX_256: gen_vpsubs_ymm(env, s, modrm, MO_8); return;

WARNING: line over 80 characters
#87: FILE: target/i386/translate.c:3394:
+    case 0xe9 | M_0F:                  gen_psubs_mm(env, s, modrm, MO_16); return;

ERROR: trailing statements should be on next line
#87: FILE: target/i386/translate.c:3394:
+    case 0xe9 | M_0F:                  gen_psubs_mm(env, s, modrm, MO_16); return;

WARNING: line over 80 characters
#88: FILE: target/i386/translate.c:3395:
+    case 0xe9 | M_0F | P_66:           gen_psubs_xmm(env, s, modrm, MO_16); return;

ERROR: trailing statements should be on next line
#88: FILE: target/i386/translate.c:3395:
+    case 0xe9 | M_0F | P_66:           gen_psubs_xmm(env, s, modrm, MO_16); return;

WARNING: line over 80 characters
#89: FILE: target/i386/translate.c:3396:
+    case 0xe9 | M_0F | P_66 | VEX_128: gen_vpsubs_xmm(env, s, modrm, MO_16); return;

ERROR: trailing statements should be on next line
#89: FILE: target/i386/translate.c:3396:
+    case 0xe9 | M_0F | P_66 | VEX_128: gen_vpsubs_xmm(env, s, modrm, MO_16); return;

WARNING: line over 80 characters
#90: FILE: target/i386/translate.c:3397:
+    case 0xe9 | M_0F | P_66 | VEX_256: gen_vpsubs_ymm(env, s, modrm, MO_16); return;

ERROR: trailing statements should be on next line
#90: FILE: target/i386/translate.c:3397:
+    case 0xe9 | M_0F | P_66 | VEX_256: gen_vpsubs_ymm(env, s, modrm, MO_16); return;

total: 14 errors, 8 warnings, 65 lines checked

Patch 16/22 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

17/22 Checking commit 944c0e98d274 (target/i386: reimplement (V)PSUBUS(B, W))
ERROR: line over 90 characters
#70: FILE: target/i386/translate.c:3194:
+#define gen_psubus_mm(env, s, modrm, vece)   gen_gvec_ld_modrm_mm  ((env), (s), (modrm), (vece), tcg_gen_gvec_ussub, 0112)

ERROR: space prohibited between function name and open parenthesis '('
#70: FILE: target/i386/translate.c:3194:
+#define gen_psubus_mm(env, s, modrm, vece)   gen_gvec_ld_modrm_mm  ((env), (s), (modrm), (vece), tcg_gen_gvec_ussub, 0112)

ERROR: line over 90 characters
#71: FILE: target/i386/translate.c:3195:
+#define gen_psubus_xmm(env, s, modrm, vece)  gen_gvec_ld_modrm_xmm ((env), (s), (modrm), (vece), tcg_gen_gvec_ussub, 0112)

ERROR: space prohibited between function name and open parenthesis '('
#71: FILE: target/i386/translate.c:3195:
+#define gen_psubus_xmm(env, s, modrm, vece)  gen_gvec_ld_modrm_xmm ((env), (s), (modrm), (vece), tcg_gen_gvec_ussub, 0112)

ERROR: line over 90 characters
#72: FILE: target/i386/translate.c:3196:
+#define gen_vpsubus_xmm(env, s, modrm, vece) gen_gvec_ld_modrm_vxmm((env), (s), (modrm), (vece), tcg_gen_gvec_ussub, 0123)

ERROR: line over 90 characters
#73: FILE: target/i386/translate.c:3197:
+#define gen_vpsubus_ymm(env, s, modrm, vece) gen_gvec_ld_modrm_vymm((env), (s), (modrm), (vece), tcg_gen_gvec_ussub, 0123)

WARNING: line over 80 characters
#82: FILE: target/i386/translate.c:3394:
+    case 0xd8 | M_0F:                  gen_psubus_mm(env, s, modrm, MO_8); return;

ERROR: trailing statements should be on next line
#82: FILE: target/i386/translate.c:3394:
+    case 0xd8 | M_0F:                  gen_psubus_mm(env, s, modrm, MO_8); return;

WARNING: line over 80 characters
#83: FILE: target/i386/translate.c:3395:
+    case 0xd8 | M_0F | P_66:           gen_psubus_xmm(env, s, modrm, MO_8); return;

ERROR: trailing statements should be on next line
#83: FILE: target/i386/translate.c:3395:
+    case 0xd8 | M_0F | P_66:           gen_psubus_xmm(env, s, modrm, MO_8); return;

WARNING: line over 80 characters
#84: FILE: target/i386/translate.c:3396:
+    case 0xd8 | M_0F | P_66 | VEX_128: gen_vpsubus_xmm(env, s, modrm, MO_8); return;

ERROR: trailing statements should be on next line
#84: FILE: target/i386/translate.c:3396:
+    case 0xd8 | M_0F | P_66 | VEX_128: gen_vpsubus_xmm(env, s, modrm, MO_8); return;

WARNING: line over 80 characters
#85: FILE: target/i386/translate.c:3397:
+    case 0xd8 | M_0F | P_66 | VEX_256: gen_vpsubus_ymm(env, s, modrm, MO_8); return;

ERROR: trailing statements should be on next line
#85: FILE: target/i386/translate.c:3397:
+    case 0xd8 | M_0F | P_66 | VEX_256: gen_vpsubus_ymm(env, s, modrm, MO_8); return;

WARNING: line over 80 characters
#87: FILE: target/i386/translate.c:3399:
+    case 0xd9 | M_0F:                  gen_psubus_mm(env, s, modrm, MO_16); return;

ERROR: trailing statements should be on next line
#87: FILE: target/i386/translate.c:3399:
+    case 0xd9 | M_0F:                  gen_psubus_mm(env, s, modrm, MO_16); return;

WARNING: line over 80 characters
#88: FILE: target/i386/translate.c:3400:
+    case 0xd9 | M_0F | P_66:           gen_psubus_xmm(env, s, modrm, MO_16); return;

ERROR: trailing statements should be on next line
#88: FILE: target/i386/translate.c:3400:
+    case 0xd9 | M_0F | P_66:           gen_psubus_xmm(env, s, modrm, MO_16); return;

WARNING: line over 80 characters
#89: FILE: target/i386/translate.c:3401:
+    case 0xd9 | M_0F | P_66 | VEX_128: gen_vpsubus_xmm(env, s, modrm, MO_16); return;

ERROR: trailing statements should be on next line
#89: FILE: target/i386/translate.c:3401:
+    case 0xd9 | M_0F | P_66 | VEX_128: gen_vpsubus_xmm(env, s, modrm, MO_16); return;

WARNING: line over 80 characters
#90: FILE: target/i386/translate.c:3402:
+    case 0xd9 | M_0F | P_66 | VEX_256: gen_vpsubus_ymm(env, s, modrm, MO_16); return;

ERROR: trailing statements should be on next line
#90: FILE: target/i386/translate.c:3402:
+    case 0xd9 | M_0F | P_66 | VEX_256: gen_vpsubus_ymm(env, s, modrm, MO_16); return;

total: 14 errors, 8 warnings, 65 lines checked

Patch 17/22 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

18/22 Checking commit 121c2e52e8f8 (target/i386: reimplement (V)PMINSW)
ERROR: line over 90 characters
#61: FILE: target/i386/translate.c:3199:
+#define gen_pmins_mm(env, s, modrm, vece)   gen_gvec_ld_modrm_mm  ((env), (s), (modrm), (vece), tcg_gen_gvec_smin, 0112)

ERROR: space prohibited between function name and open parenthesis '('
#61: FILE: target/i386/translate.c:3199:
+#define gen_pmins_mm(env, s, modrm, vece)   gen_gvec_ld_modrm_mm  ((env), (s), (modrm), (vece), tcg_gen_gvec_smin, 0112)

ERROR: line over 90 characters
#62: FILE: target/i386/translate.c:3200:
+#define gen_pmins_xmm(env, s, modrm, vece)  gen_gvec_ld_modrm_xmm ((env), (s), (modrm), (vece), tcg_gen_gvec_smin, 0112)

ERROR: space prohibited between function name and open parenthesis '('
#62: FILE: target/i386/translate.c:3200:
+#define gen_pmins_xmm(env, s, modrm, vece)  gen_gvec_ld_modrm_xmm ((env), (s), (modrm), (vece), tcg_gen_gvec_smin, 0112)

ERROR: line over 90 characters
#63: FILE: target/i386/translate.c:3201:
+#define gen_vpmins_xmm(env, s, modrm, vece) gen_gvec_ld_modrm_vxmm((env), (s), (modrm), (vece), tcg_gen_gvec_smin, 0123)

ERROR: line over 90 characters
#64: FILE: target/i386/translate.c:3202:
+#define gen_vpmins_ymm(env, s, modrm, vece) gen_gvec_ld_modrm_vymm((env), (s), (modrm), (vece), tcg_gen_gvec_smin, 0123)

WARNING: line over 80 characters
#73: FILE: target/i386/translate.c:3419:
+    case 0xea | M_0F:                  gen_pmins_mm(env, s, modrm, MO_16); return;

ERROR: trailing statements should be on next line
#73: FILE: target/i386/translate.c:3419:
+    case 0xea | M_0F:                  gen_pmins_mm(env, s, modrm, MO_16); return;

WARNING: line over 80 characters
#74: FILE: target/i386/translate.c:3420:
+    case 0xea | M_0F | P_66:           gen_pmins_xmm(env, s, modrm, MO_16); return;

ERROR: trailing statements should be on next line
#74: FILE: target/i386/translate.c:3420:
+    case 0xea | M_0F | P_66:           gen_pmins_xmm(env, s, modrm, MO_16); return;

WARNING: line over 80 characters
#75: FILE: target/i386/translate.c:3421:
+    case 0xea | M_0F | P_66 | VEX_128: gen_vpmins_xmm(env, s, modrm, MO_16); return;

ERROR: trailing statements should be on next line
#75: FILE: target/i386/translate.c:3421:
+    case 0xea | M_0F | P_66 | VEX_128: gen_vpmins_xmm(env, s, modrm, MO_16); return;

WARNING: line over 80 characters
#76: FILE: target/i386/translate.c:3422:
+    case 0xea | M_0F | P_66 | VEX_256: gen_vpmins_ymm(env, s, modrm, MO_16); return;

ERROR: trailing statements should be on next line
#76: FILE: target/i386/translate.c:3422:
+    case 0xea | M_0F | P_66 | VEX_256: gen_vpmins_ymm(env, s, modrm, MO_16); return;

total: 10 errors, 4 warnings, 51 lines checked

Patch 18/22 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

19/22 Checking commit 3062bca41336 (target/i386: reimplement (V)PMINUB)
ERROR: line over 90 characters
#61: FILE: target/i386/translate.c:3204:
+#define gen_pminu_mm(env, s, modrm, vece)   gen_gvec_ld_modrm_mm  ((env), (s), (modrm), (vece), tcg_gen_gvec_umin, 0112)

ERROR: space prohibited between function name and open parenthesis '('
#61: FILE: target/i386/translate.c:3204:
+#define gen_pminu_mm(env, s, modrm, vece)   gen_gvec_ld_modrm_mm  ((env), (s), (modrm), (vece), tcg_gen_gvec_umin, 0112)

ERROR: line over 90 characters
#62: FILE: target/i386/translate.c:3205:
+#define gen_pminu_xmm(env, s, modrm, vece)  gen_gvec_ld_modrm_xmm ((env), (s), (modrm), (vece), tcg_gen_gvec_umin, 0112)

ERROR: space prohibited between function name and open parenthesis '('
#62: FILE: target/i386/translate.c:3205:
+#define gen_pminu_xmm(env, s, modrm, vece)  gen_gvec_ld_modrm_xmm ((env), (s), (modrm), (vece), tcg_gen_gvec_umin, 0112)

ERROR: line over 90 characters
#63: FILE: target/i386/translate.c:3206:
+#define gen_vpminu_xmm(env, s, modrm, vece) gen_gvec_ld_modrm_vxmm((env), (s), (modrm), (vece), tcg_gen_gvec_umin, 0123)

ERROR: line over 90 characters
#64: FILE: target/i386/translate.c:3207:
+#define gen_vpminu_ymm(env, s, modrm, vece) gen_gvec_ld_modrm_vymm((env), (s), (modrm), (vece), tcg_gen_gvec_umin, 0123)

WARNING: line over 80 characters
#73: FILE: target/i386/translate.c:3424:
+    case 0xda | M_0F:                  gen_pminu_mm(env, s, modrm, MO_8); return;

ERROR: trailing statements should be on next line
#73: FILE: target/i386/translate.c:3424:
+    case 0xda | M_0F:                  gen_pminu_mm(env, s, modrm, MO_8); return;

WARNING: line over 80 characters
#74: FILE: target/i386/translate.c:3425:
+    case 0xda | M_0F | P_66:           gen_pminu_xmm(env, s, modrm, MO_8); return;

ERROR: trailing statements should be on next line
#74: FILE: target/i386/translate.c:3425:
+    case 0xda | M_0F | P_66:           gen_pminu_xmm(env, s, modrm, MO_8); return;

WARNING: line over 80 characters
#75: FILE: target/i386/translate.c:3426:
+    case 0xda | M_0F | P_66 | VEX_128: gen_vpminu_xmm(env, s, modrm, MO_8); return;

ERROR: trailing statements should be on next line
#75: FILE: target/i386/translate.c:3426:
+    case 0xda | M_0F | P_66 | VEX_128: gen_vpminu_xmm(env, s, modrm, MO_8); return;

WARNING: line over 80 characters
#76: FILE: target/i386/translate.c:3427:
+    case 0xda | M_0F | P_66 | VEX_256: gen_vpminu_ymm(env, s, modrm, MO_8); return;

ERROR: trailing statements should be on next line
#76: FILE: target/i386/translate.c:3427:
+    case 0xda | M_0F | P_66 | VEX_256: gen_vpminu_ymm(env, s, modrm, MO_8); return;

total: 10 errors, 4 warnings, 51 lines checked

Patch 19/22 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

20/22 Checking commit dfde70d5c7bd (target/i386: reimplement (V)PMAXSW)
ERROR: line over 90 characters
#63: FILE: target/i386/translate.c:3209:
+#define gen_pmaxs_mm(env, s, modrm, vece)   gen_gvec_ld_modrm_mm  ((env), (s), (modrm), (vece), tcg_gen_gvec_smax, 0112)

ERROR: space prohibited between function name and open parenthesis '('
#63: FILE: target/i386/translate.c:3209:
+#define gen_pmaxs_mm(env, s, modrm, vece)   gen_gvec_ld_modrm_mm  ((env), (s), (modrm), (vece), tcg_gen_gvec_smax, 0112)

ERROR: line over 90 characters
#64: FILE: target/i386/translate.c:3210:
+#define gen_pmaxs_xmm(env, s, modrm, vece)  gen_gvec_ld_modrm_xmm ((env), (s), (modrm), (vece), tcg_gen_gvec_smax, 0112)

ERROR: space prohibited between function name and open parenthesis '('
#64: FILE: target/i386/translate.c:3210:
+#define gen_pmaxs_xmm(env, s, modrm, vece)  gen_gvec_ld_modrm_xmm ((env), (s), (modrm), (vece), tcg_gen_gvec_smax, 0112)

ERROR: line over 90 characters
#65: FILE: target/i386/translate.c:3211:
+#define gen_vpmaxs_xmm(env, s, modrm, vece) gen_gvec_ld_modrm_vxmm((env), (s), (modrm), (vece), tcg_gen_gvec_smax, 0123)

ERROR: line over 90 characters
#66: FILE: target/i386/translate.c:3212:
+#define gen_vpmaxs_ymm(env, s, modrm, vece) gen_gvec_ld_modrm_vymm((env), (s), (modrm), (vece), tcg_gen_gvec_smax, 0123)

WARNING: line over 80 characters
#75: FILE: target/i386/translate.c:3439:
+    case 0xee | M_0F:                  gen_pmaxs_mm(env, s, modrm, MO_16); return;

ERROR: trailing statements should be on next line
#75: FILE: target/i386/translate.c:3439:
+    case 0xee | M_0F:                  gen_pmaxs_mm(env, s, modrm, MO_16); return;

WARNING: line over 80 characters
#76: FILE: target/i386/translate.c:3440:
+    case 0xee | M_0F | P_66:           gen_pmaxs_xmm(env, s, modrm, MO_16); return;

ERROR: trailing statements should be on next line
#76: FILE: target/i386/translate.c:3440:
+    case 0xee | M_0F | P_66:           gen_pmaxs_xmm(env, s, modrm, MO_16); return;

WARNING: line over 80 characters
#77: FILE: target/i386/translate.c:3441:
+    case 0xee | M_0F | P_66 | VEX_128: gen_vpmaxs_xmm(env, s, modrm, MO_16); return;

ERROR: trailing statements should be on next line
#77: FILE: target/i386/translate.c:3441:
+    case 0xee | M_0F | P_66 | VEX_128: gen_vpmaxs_xmm(env, s, modrm, MO_16); return;

WARNING: line over 80 characters
#78: FILE: target/i386/translate.c:3442:
+    case 0xee | M_0F | P_66 | VEX_256: gen_vpmaxs_ymm(env, s, modrm, MO_16); return;

ERROR: trailing statements should be on next line
#78: FILE: target/i386/translate.c:3442:
+    case 0xee | M_0F | P_66 | VEX_256: gen_vpmaxs_ymm(env, s, modrm, MO_16); return;

total: 10 errors, 4 warnings, 53 lines checked

Patch 20/22 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

21/22 Checking commit 4c83ed32e8ad (target/i386: reimplement (V)PMAXUB)
ERROR: line over 90 characters
#64: FILE: target/i386/translate.c:3214:
+#define gen_pmaxu_mm(env, s, modrm, vece)   gen_gvec_ld_modrm_mm  ((env), (s), (modrm), (vece), tcg_gen_gvec_umax, 0112)

ERROR: space prohibited between function name and open parenthesis '('
#64: FILE: target/i386/translate.c:3214:
+#define gen_pmaxu_mm(env, s, modrm, vece)   gen_gvec_ld_modrm_mm  ((env), (s), (modrm), (vece), tcg_gen_gvec_umax, 0112)

ERROR: line over 90 characters
#65: FILE: target/i386/translate.c:3215:
+#define gen_pmaxu_xmm(env, s, modrm, vece)  gen_gvec_ld_modrm_xmm ((env), (s), (modrm), (vece), tcg_gen_gvec_umax, 0112)

ERROR: space prohibited between function name and open parenthesis '('
#65: FILE: target/i386/translate.c:3215:
+#define gen_pmaxu_xmm(env, s, modrm, vece)  gen_gvec_ld_modrm_xmm ((env), (s), (modrm), (vece), tcg_gen_gvec_umax, 0112)

ERROR: line over 90 characters
#66: FILE: target/i386/translate.c:3216:
+#define gen_vpmaxu_xmm(env, s, modrm, vece) gen_gvec_ld_modrm_vxmm((env), (s), (modrm), (vece), tcg_gen_gvec_umax, 0123)

ERROR: line over 90 characters
#67: FILE: target/i386/translate.c:3217:
+#define gen_vpmaxu_ymm(env, s, modrm, vece) gen_gvec_ld_modrm_vymm((env), (s), (modrm), (vece), tcg_gen_gvec_umax, 0123)

WARNING: line over 80 characters
#76: FILE: target/i386/translate.c:3444:
+    case 0xde | M_0F:                  gen_pmaxu_mm(env, s, modrm, MO_8); return;

ERROR: trailing statements should be on next line
#76: FILE: target/i386/translate.c:3444:
+    case 0xde | M_0F:                  gen_pmaxu_mm(env, s, modrm, MO_8); return;

WARNING: line over 80 characters
#77: FILE: target/i386/translate.c:3445:
+    case 0xde | M_0F | P_66:           gen_pmaxu_xmm(env, s, modrm, MO_8); return;

ERROR: trailing statements should be on next line
#77: FILE: target/i386/translate.c:3445:
+    case 0xde | M_0F | P_66:           gen_pmaxu_xmm(env, s, modrm, MO_8); return;

WARNING: line over 80 characters
#78: FILE: target/i386/translate.c:3446:
+    case 0xde | M_0F | P_66 | VEX_128: gen_vpmaxu_xmm(env, s, modrm, MO_8); return;

ERROR: trailing statements should be on next line
#78: FILE: target/i386/translate.c:3446:
+    case 0xde | M_0F | P_66 | VEX_128: gen_vpmaxu_xmm(env, s, modrm, MO_8); return;

WARNING: line over 80 characters
#79: FILE: target/i386/translate.c:3447:
+    case 0xde | M_0F | P_66 | VEX_256: gen_vpmaxu_ymm(env, s, modrm, MO_8); return;

ERROR: trailing statements should be on next line
#79: FILE: target/i386/translate.c:3447:
+    case 0xde | M_0F | P_66 | VEX_256: gen_vpmaxu_ymm(env, s, modrm, MO_8); return;

total: 10 errors, 4 warnings, 54 lines checked

Patch 21/22 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

22/22 Checking commit e2438c48fcd1 (target/i386: reimplement (V)P(EQ, CMP)(B, W, D))
ERROR: line over 90 characters
#103: FILE: target/i386/translate.c:3226:
+#define gen_pcmpeq_mm(env, s, modrm, vece)   gen_gvec_ld_modrm_mm  ((env), (s), (modrm), (vece), gen_gvec_cmpeq, 0112)

ERROR: space prohibited between function name and open parenthesis '('
#103: FILE: target/i386/translate.c:3226:
+#define gen_pcmpeq_mm(env, s, modrm, vece)   gen_gvec_ld_modrm_mm  ((env), (s), (modrm), (vece), gen_gvec_cmpeq, 0112)

ERROR: line over 90 characters
#104: FILE: target/i386/translate.c:3227:
+#define gen_pcmpeq_xmm(env, s, modrm, vece)  gen_gvec_ld_modrm_xmm ((env), (s), (modrm), (vece), gen_gvec_cmpeq, 0112)

ERROR: space prohibited between function name and open parenthesis '('
#104: FILE: target/i386/translate.c:3227:
+#define gen_pcmpeq_xmm(env, s, modrm, vece)  gen_gvec_ld_modrm_xmm ((env), (s), (modrm), (vece), gen_gvec_cmpeq, 0112)

ERROR: line over 90 characters
#105: FILE: target/i386/translate.c:3228:
+#define gen_vpcmpeq_xmm(env, s, modrm, vece) gen_gvec_ld_modrm_vxmm((env), (s), (modrm), (vece), gen_gvec_cmpeq, 0123)

ERROR: line over 90 characters
#106: FILE: target/i386/translate.c:3229:
+#define gen_vpcmpeq_ymm(env, s, modrm, vece) gen_gvec_ld_modrm_vymm((env), (s), (modrm), (vece), gen_gvec_cmpeq, 0123)

ERROR: line over 90 characters
#115: FILE: target/i386/translate.c:3238:
+#define gen_pcmpgt_mm(env, s, modrm, vece)   gen_gvec_ld_modrm_mm  ((env), (s), (modrm), (vece), gen_gvec_cmpgt, 0112)

ERROR: space prohibited between function name and open parenthesis '('
#115: FILE: target/i386/translate.c:3238:
+#define gen_pcmpgt_mm(env, s, modrm, vece)   gen_gvec_ld_modrm_mm  ((env), (s), (modrm), (vece), gen_gvec_cmpgt, 0112)

ERROR: line over 90 characters
#116: FILE: target/i386/translate.c:3239:
+#define gen_pcmpgt_xmm(env, s, modrm, vece)  gen_gvec_ld_modrm_xmm ((env), (s), (modrm), (vece), gen_gvec_cmpgt, 0112)

ERROR: space prohibited between function name and open parenthesis '('
#116: FILE: target/i386/translate.c:3239:
+#define gen_pcmpgt_xmm(env, s, modrm, vece)  gen_gvec_ld_modrm_xmm ((env), (s), (modrm), (vece), gen_gvec_cmpgt, 0112)

ERROR: line over 90 characters
#117: FILE: target/i386/translate.c:3240:
+#define gen_vpcmpgt_xmm(env, s, modrm, vece) gen_gvec_ld_modrm_vxmm((env), (s), (modrm), (vece), gen_gvec_cmpgt, 0123)

ERROR: line over 90 characters
#118: FILE: target/i386/translate.c:3241:
+#define gen_vpcmpgt_ymm(env, s, modrm, vece) gen_gvec_ld_modrm_vymm((env), (s), (modrm), (vece), gen_gvec_cmpgt, 0123)

WARNING: line over 80 characters
#127: FILE: target/i386/translate.c:3478:
+    case 0x64 | M_0F:                  gen_pcmpgt_mm(env, s, modrm, MO_8); return;

ERROR: trailing statements should be on next line
#127: FILE: target/i386/translate.c:3478:
+    case 0x64 | M_0F:                  gen_pcmpgt_mm(env, s, modrm, MO_8); return;

WARNING: line over 80 characters
#128: FILE: target/i386/translate.c:3479:
+    case 0x64 | M_0F | P_66:           gen_pcmpgt_xmm(env, s, modrm, MO_8); return;

ERROR: trailing statements should be on next line
#128: FILE: target/i386/translate.c:3479:
+    case 0x64 | M_0F | P_66:           gen_pcmpgt_xmm(env, s, modrm, MO_8); return;

WARNING: line over 80 characters
#129: FILE: target/i386/translate.c:3480:
+    case 0x64 | M_0F | P_66 | VEX_128: gen_vpcmpgt_xmm(env, s, modrm, MO_8); return;

ERROR: trailing statements should be on next line
#129: FILE: target/i386/translate.c:3480:
+    case 0x64 | M_0F | P_66 | VEX_128: gen_vpcmpgt_xmm(env, s, modrm, MO_8); return;

WARNING: line over 80 characters
#130: FILE: target/i386/translate.c:3481:
+    case 0x64 | M_0F | P_66 | VEX_256: gen_vpcmpgt_ymm(env, s, modrm, MO_8); return;

ERROR: trailing statements should be on next line
#130: FILE: target/i386/translate.c:3481:
+    case 0x64 | M_0F | P_66 | VEX_256: gen_vpcmpgt_ymm(env, s, modrm, MO_8); return;

WARNING: line over 80 characters
#132: FILE: target/i386/translate.c:3483:
+    case 0x65 | M_0F:                  gen_pcmpgt_mm(env, s, modrm, MO_16); return;

ERROR: trailing statements should be on next line
#132: FILE: target/i386/translate.c:3483:
+    case 0x65 | M_0F:                  gen_pcmpgt_mm(env, s, modrm, MO_16); return;

WARNING: line over 80 characters
#133: FILE: target/i386/translate.c:3484:
+    case 0x65 | M_0F | P_66:           gen_pcmpgt_xmm(env, s, modrm, MO_16); return;

ERROR: trailing statements should be on next line
#133: FILE: target/i386/translate.c:3484:
+    case 0x65 | M_0F | P_66:           gen_pcmpgt_xmm(env, s, modrm, MO_16); return;

WARNING: line over 80 characters
#134: FILE: target/i386/translate.c:3485:
+    case 0x65 | M_0F | P_66 | VEX_128: gen_vpcmpgt_xmm(env, s, modrm, MO_16); return;

ERROR: trailing statements should be on next line
#134: FILE: target/i386/translate.c:3485:
+    case 0x65 | M_0F | P_66 | VEX_128: gen_vpcmpgt_xmm(env, s, modrm, MO_16); return;

WARNING: line over 80 characters
#135: FILE: target/i386/translate.c:3486:
+    case 0x65 | M_0F | P_66 | VEX_256: gen_vpcmpgt_ymm(env, s, modrm, MO_16); return;

ERROR: trailing statements should be on next line
#135: FILE: target/i386/translate.c:3486:
+    case 0x65 | M_0F | P_66 | VEX_256: gen_vpcmpgt_ymm(env, s, modrm, MO_16); return;

WARNING: line over 80 characters
#137: FILE: target/i386/translate.c:3488:
+    case 0x66 | M_0F:                  gen_pcmpgt_mm(env, s, modrm, MO_32); return;

ERROR: trailing statements should be on next line
#137: FILE: target/i386/translate.c:3488:
+    case 0x66 | M_0F:                  gen_pcmpgt_mm(env, s, modrm, MO_32); return;

WARNING: line over 80 characters
#138: FILE: target/i386/translate.c:3489:
+    case 0x66 | M_0F | P_66:           gen_pcmpgt_xmm(env, s, modrm, MO_32); return;

ERROR: trailing statements should be on next line
#138: FILE: target/i386/translate.c:3489:
+    case 0x66 | M_0F | P_66:           gen_pcmpgt_xmm(env, s, modrm, MO_32); return;

WARNING: line over 80 characters
#139: FILE: target/i386/translate.c:3490:
+    case 0x66 | M_0F | P_66 | VEX_128: gen_vpcmpgt_xmm(env, s, modrm, MO_32); return;

ERROR: trailing statements should be on next line
#139: FILE: target/i386/translate.c:3490:
+    case 0x66 | M_0F | P_66 | VEX_128: gen_vpcmpgt_xmm(env, s, modrm, MO_32); return;

WARNING: line over 80 characters
#140: FILE: target/i386/translate.c:3491:
+    case 0x66 | M_0F | P_66 | VEX_256: gen_vpcmpgt_ymm(env, s, modrm, MO_32); return;

ERROR: trailing statements should be on next line
#140: FILE: target/i386/translate.c:3491:
+    case 0x66 | M_0F | P_66 | VEX_256: gen_vpcmpgt_ymm(env, s, modrm, MO_32); return;

WARNING: line over 80 characters
#142: FILE: target/i386/translate.c:3493:
+    case 0x74 | M_0F:                  gen_pcmpeq_mm(env, s, modrm, MO_8); return;

ERROR: trailing statements should be on next line
#142: FILE: target/i386/translate.c:3493:
+    case 0x74 | M_0F:                  gen_pcmpeq_mm(env, s, modrm, MO_8); return;

WARNING: line over 80 characters
#143: FILE: target/i386/translate.c:3494:
+    case 0x74 | M_0F | P_66:           gen_pcmpeq_xmm(env, s, modrm, MO_8); return;

ERROR: trailing statements should be on next line
#143: FILE: target/i386/translate.c:3494:
+    case 0x74 | M_0F | P_66:           gen_pcmpeq_xmm(env, s, modrm, MO_8); return;

WARNING: line over 80 characters
#144: FILE: target/i386/translate.c:3495:
+    case 0x74 | M_0F | P_66 | VEX_128: gen_vpcmpeq_xmm(env, s, modrm, MO_8); return;

ERROR: trailing statements should be on next line
#144: FILE: target/i386/translate.c:3495:
+    case 0x74 | M_0F | P_66 | VEX_128: gen_vpcmpeq_xmm(env, s, modrm, MO_8); return;

WARNING: line over 80 characters
#145: FILE: target/i386/translate.c:3496:
+    case 0x74 | M_0F | P_66 | VEX_256: gen_vpcmpeq_ymm(env, s, modrm, MO_8); return;

ERROR: trailing statements should be on next line
#145: FILE: target/i386/translate.c:3496:
+    case 0x74 | M_0F | P_66 | VEX_256: gen_vpcmpeq_ymm(env, s, modrm, MO_8); return;

WARNING: line over 80 characters
#147: FILE: target/i386/translate.c:3498:
+    case 0x75 | M_0F:                  gen_pcmpeq_mm(env, s, modrm, MO_16); return;

ERROR: trailing statements should be on next line
#147: FILE: target/i386/translate.c:3498:
+    case 0x75 | M_0F:                  gen_pcmpeq_mm(env, s, modrm, MO_16); return;

WARNING: line over 80 characters
#148: FILE: target/i386/translate.c:3499:
+    case 0x75 | M_0F | P_66:           gen_pcmpeq_xmm(env, s, modrm, MO_16); return;

ERROR: trailing statements should be on next line
#148: FILE: target/i386/translate.c:3499:
+    case 0x75 | M_0F | P_66:           gen_pcmpeq_xmm(env, s, modrm, MO_16); return;

WARNING: line over 80 characters
#149: FILE: target/i386/translate.c:3500:
+    case 0x75 | M_0F | P_66 | VEX_128: gen_vpcmpeq_xmm(env, s, modrm, MO_16); return;

ERROR: trailing statements should be on next line
#149: FILE: target/i386/translate.c:3500:
+    case 0x75 | M_0F | P_66 | VEX_128: gen_vpcmpeq_xmm(env, s, modrm, MO_16); return;

WARNING: line over 80 characters
#150: FILE: target/i386/translate.c:3501:
+    case 0x75 | M_0F | P_66 | VEX_256: gen_vpcmpeq_ymm(env, s, modrm, MO_16); return;

ERROR: trailing statements should be on next line
#150: FILE: target/i386/translate.c:3501:
+    case 0x75 | M_0F | P_66 | VEX_256: gen_vpcmpeq_ymm(env, s, modrm, MO_16); return;

WARNING: line over 80 characters
#152: FILE: target/i386/translate.c:3503:
+    case 0x76 | M_0F:                  gen_pcmpeq_mm(env, s, modrm, MO_32); return;

ERROR: trailing statements should be on next line
#152: FILE: target/i386/translate.c:3503:
+    case 0x76 | M_0F:                  gen_pcmpeq_mm(env, s, modrm, MO_32); return;

WARNING: line over 80 characters
#153: FILE: target/i386/translate.c:3504:
+    case 0x76 | M_0F | P_66:           gen_pcmpeq_xmm(env, s, modrm, MO_32); return;

ERROR: trailing statements should be on next line
#153: FILE: target/i386/translate.c:3504:
+    case 0x76 | M_0F | P_66:           gen_pcmpeq_xmm(env, s, modrm, MO_32); return;

WARNING: line over 80 characters
#154: FILE: target/i386/translate.c:3505:
+    case 0x76 | M_0F | P_66 | VEX_128: gen_vpcmpeq_xmm(env, s, modrm, MO_32); return;

ERROR: trailing statements should be on next line
#154: FILE: target/i386/translate.c:3505:
+    case 0x76 | M_0F | P_66 | VEX_128: gen_vpcmpeq_xmm(env, s, modrm, MO_32); return;

WARNING: line over 80 characters
#155: FILE: target/i386/translate.c:3506:
+    case 0x76 | M_0F | P_66 | VEX_256: gen_vpcmpeq_ymm(env, s, modrm, MO_32); return;

ERROR: trailing statements should be on next line
#155: FILE: target/i386/translate.c:3506:
+    case 0x76 | M_0F | P_66 | VEX_256: gen_vpcmpeq_ymm(env, s, modrm, MO_32); return;

total: 36 errors, 24 warnings, 129 lines checked

Patch 22/22 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

=== OUTPUT END ===

Test command exited with code: 1


The full log is available at
http://patchew.org/logs/20190731175702.4916-1-jan.bobek@gmail.com/testing.checkpatch/?type=message.
---
Email generated automatically by Patchew [https://patchew.org/].
Please send your feedback to patchew-devel@redhat.com

Re: [Qemu-devel] [RFC PATCH v1 00/22] reimplement (some) x86 vector instructions using tcg-gvec

[no-reply]

Patchew URL: https://patchew.org/QEMU/20190731175702.4916-1-jan.bobek@gmail.com/



Hi,

This series seems to have some coding style problems. See output below for
more information:

Type: series
Subject: [Qemu-devel] [RFC PATCH v1 00/22] reimplement (some) x86 vector instructions using tcg-gvec
Message-id: 20190731175702.4916-1-jan.bobek@gmail.com

=== TEST SCRIPT BEGIN ===
#!/bin/bash
git rev-parse base > /dev/null || exit 0
git config --local diff.renamelimit 0
git config --local diff.renames True
git config --local diff.algorithm histogram
./scripts/checkpatch.pl --mailback base..
=== TEST SCRIPT END ===

Updating 3c8cf5a9c21ff8782164d1def7f44bd888713384
From https://github.com/patchew-project/qemu
 - [tag update]      patchew/20190731175702.4916-1-jan.bobek@gmail.com -> patchew/20190731175702.4916-1-jan.bobek@gmail.com
Submodule 'capstone' (https://git.qemu.org/git/capstone.git) registered for path 'capstone'
Submodule 'dtc' (https://git.qemu.org/git/dtc.git) registered for path 'dtc'
Submodule 'roms/QemuMacDrivers' (https://git.qemu.org/git/QemuMacDrivers.git) registered for path 'roms/QemuMacDrivers'
Submodule 'roms/SLOF' (https://git.qemu.org/git/SLOF.git) registered for path 'roms/SLOF'
Submodule 'roms/edk2' (https://git.qemu.org/git/edk2.git) registered for path 'roms/edk2'
Submodule 'roms/ipxe' (https://git.qemu.org/git/ipxe.git) registered for path 'roms/ipxe'
Submodule 'roms/openbios' (https://git.qemu.org/git/openbios.git) registered for path 'roms/openbios'
Submodule 'roms/openhackware' (https://git.qemu.org/git/openhackware.git) registered for path 'roms/openhackware'
Submodule 'roms/opensbi' (https://git.qemu.org/git/opensbi.git) registered for path 'roms/opensbi'
Submodule 'roms/qemu-palcode' (https://git.qemu.org/git/qemu-palcode.git) registered for path 'roms/qemu-palcode'
Submodule 'roms/seabios' (https://git.qemu.org/git/seabios.git/) registered for path 'roms/seabios'
Submodule 'roms/seabios-hppa' (https://git.qemu.org/git/seabios-hppa.git) registered for path 'roms/seabios-hppa'
Submodule 'roms/sgabios' (https://git.qemu.org/git/sgabios.git) registered for path 'roms/sgabios'
Submodule 'roms/skiboot' (https://git.qemu.org/git/skiboot.git) registered for path 'roms/skiboot'
Submodule 'roms/u-boot' (https://git.qemu.org/git/u-boot.git) registered for path 'roms/u-boot'
Submodule 'roms/u-boot-sam460ex' (https://git.qemu.org/git/u-boot-sam460ex.git) registered for path 'roms/u-boot-sam460ex'
Submodule 'slirp' (https://git.qemu.org/git/libslirp.git) registered for path 'slirp'
Submodule 'tests/fp/berkeley-softfloat-3' (https://git.qemu.org/git/berkeley-softfloat-3.git) registered for path 'tests/fp/berkeley-softfloat-3'
Submodule 'tests/fp/berkeley-testfloat-3' (https://git.qemu.org/git/berkeley-testfloat-3.git) registered for path 'tests/fp/berkeley-testfloat-3'
Submodule 'ui/keycodemapdb' (https://git.qemu.org/git/keycodemapdb.git) registered for path 'ui/keycodemapdb'
Cloning into 'capstone'...
Submodule path 'capstone': checked out '22ead3e0bfdb87516656453336160e0a37b066bf'
Cloning into 'dtc'...
Submodule path 'dtc': checked out '88f18909db731a627456f26d779445f84e449536'
Cloning into 'roms/QemuMacDrivers'...
Submodule path 'roms/QemuMacDrivers': checked out '90c488d5f4a407342247b9ea869df1c2d9c8e266'
Cloning into 'roms/SLOF'...
Submodule path 'roms/SLOF': checked out 'ba1ab360eebe6338bb8d7d83a9220ccf7e213af3'
Cloning into 'roms/edk2'...
Submodule path 'roms/edk2': checked out '20d2e5a125e34fc8501026613a71549b2a1a3e54'
Submodule 'SoftFloat' (https://github.com/ucb-bar/berkeley-softfloat-3.git) registered for path 'ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3'
Submodule 'CryptoPkg/Library/OpensslLib/openssl' (https://github.com/openssl/openssl) registered for path 'CryptoPkg/Library/OpensslLib/openssl'
Cloning into 'ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3'...
Submodule path 'roms/edk2/ArmPkg/Library/ArmSoftFloatLib/berkeley-softfloat-3': checked out 'b64af41c3276f97f0e181920400ee056b9c88037'
Cloning into 'CryptoPkg/Library/OpensslLib/openssl'...
Submodule path 'roms/edk2/CryptoPkg/Library/OpensslLib/openssl': checked out '50eaac9f3337667259de725451f201e784599687'
Submodule 'boringssl' (https://boringssl.googlesource.com/boringssl) registered for path 'boringssl'
Submodule 'krb5' (https://github.com/krb5/krb5) registered for path 'krb5'
Submodule 'pyca.cryptography' (https://github.com/pyca/cryptography.git) registered for path 'pyca-cryptography'
Cloning into 'boringssl'...
Submodule path 'roms/edk2/CryptoPkg/Library/OpensslLib/openssl/boringssl': checked out '2070f8ad9151dc8f3a73bffaa146b5e6937a583f'
Cloning into 'krb5'...
Submodule path 'roms/edk2/CryptoPkg/Library/OpensslLib/openssl/krb5': checked out 'b9ad6c49505c96a088326b62a52568e3484f2168'
Cloning into 'pyca-cryptography'...
Submodule path 'roms/edk2/CryptoPkg/Library/OpensslLib/openssl/pyca-cryptography': checked out '09403100de2f6f1cdd0d484dcb8e620f1c335c8f'
Cloning into 'roms/ipxe'...
Submodule path 'roms/ipxe': checked out 'de4565cbe76ea9f7913a01f331be3ee901bb6e17'
Cloning into 'roms/openbios'...
Submodule path 'roms/openbios': checked out 'c79e0ecb84f4f1ee3f73f521622e264edd1bf174'
Cloning into 'roms/openhackware'...
Submodule path 'roms/openhackware': checked out 'c559da7c8eec5e45ef1f67978827af6f0b9546f5'
Cloning into 'roms/opensbi'...
Submodule path 'roms/opensbi': checked out 'ce228ee0919deb9957192d723eecc8aaae2697c6'
Cloning into 'roms/qemu-palcode'...
Submodule path 'roms/qemu-palcode': checked out 'bf0e13698872450164fa7040da36a95d2d4b326f'
Cloning into 'roms/seabios'...
Submodule path 'roms/seabios': checked out 'a5cab58e9a3fb6e168aba919c5669bea406573b4'
Cloning into 'roms/seabios-hppa'...
Submodule path 'roms/seabios-hppa': checked out '0f4fe84658165e96ce35870fd19fc634e182e77b'
Cloning into 'roms/sgabios'...
Submodule path 'roms/sgabios': checked out 'cbaee52287e5f32373181cff50a00b6c4ac9015a'
Cloning into 'roms/skiboot'...
Submodule path 'roms/skiboot': checked out '261ca8e779e5138869a45f174caa49be6a274501'
Cloning into 'roms/u-boot'...
Submodule path 'roms/u-boot': checked out 'd3689267f92c5956e09cc7d1baa4700141662bff'
Cloning into 'roms/u-boot-sam460ex'...
Submodule path 'roms/u-boot-sam460ex': checked out '60b3916f33e617a815973c5a6df77055b2e3a588'
Cloning into 'slirp'...
Submodule path 'slirp': checked out 'f0da6726207b740f6101028b2992f918477a4b08'
Cloning into 'tests/fp/berkeley-softfloat-3'...
Submodule path 'tests/fp/berkeley-softfloat-3': checked out 'b64af41c3276f97f0e181920400ee056b9c88037'
Cloning into 'tests/fp/berkeley-testfloat-3'...
Submodule path 'tests/fp/berkeley-testfloat-3': checked out '5a59dcec19327396a011a17fd924aed4fec416b3'
Cloning into 'ui/keycodemapdb'...
Submodule path 'ui/keycodemapdb': checked out '6b3d716e2b6472eb7189d3220552280ef3d832ce'
Switched to a new branch 'test'
9c320f0 target/i386: reimplement (V)P(EQ, CMP)(B, W, D)
afe83e1 target/i386: reimplement (V)PMAXUB
60ea5a8 target/i386: reimplement (V)PMAXSW
001aadd target/i386: reimplement (V)PMINUB
0a07689 target/i386: reimplement (V)PMINSW
c5a55d8 target/i386: reimplement (V)PSUBUS(B, W)
4fffe88 target/i386: reimplement (V)PSUBS(B, W)
5ae7820 target/i386: reimplement (V)PADDUS(B, W)
6a1425f target/i386: reimplement (V)PADDS(B, W)
2d01df2 target/i386: reimplement (V)PSUB(B, W, D, Q)
1092ef1 target/i386: reimplement (V)PADD(B, W, D, Q)
443c432 target/i386: reimplement (V)PANDN, (V)ANDNPS, (V)ANDNPD
69f3ccd target/i386: reimplement (V)PXOR, (V)XORPS, (V)XORPD
4ed8c05 target/i386: reimplement (V)POR, (V)ORPS, (V)ORPD
ec73278 target/i386: reimplement (V)PAND, (V)ANDPS, (V)ANDPD
0e2ac0e target/i386: add vector register file alignment constraints
57dac1c target/i386: introduce gen_gvec_ld_modrm_* helpers
75e9b97 target/i386: introduce gen_ld_modrm_* helpers
56d7b73 target/i386: Simplify gen_exception arguments
8eb0c95 target/i386: Use prefix, aflag and dflag from DisasContext
34b295f target/i386: Push rex_w into DisasContext
3d38427 target/i386: Push rex_r into DisasContext

=== OUTPUT BEGIN ===
1/22 Checking commit 3d384272456a (target/i386: Push rex_r into DisasContext)
2/22 Checking commit 34b295f442c2 (target/i386: Push rex_w into DisasContext)
3/22 Checking commit 8eb0c95606a9 (target/i386: Use prefix, aflag and dflag from DisasContext)
4/22 Checking commit 56d7b734ecb1 (target/i386: Simplify gen_exception arguments)
5/22 Checking commit 75e9b973f6bf (target/i386: introduce gen_ld_modrm_* helpers)
WARNING: line over 80 characters
#22: FILE: target/i386/translate.c:3043:
+static inline void gen_ld_modrm_PqQq(CPUX86State *env, DisasContext *s, int modrm,

ERROR: "foo* bar" should be "foo *bar"
#23: FILE: target/i386/translate.c:3044:
+                                     uint32_t* dofs, uint32_t* aofs)

ERROR: space required before the open parenthesis '('
#29: FILE: target/i386/translate.c:3050:
+    if(mod == 3) {

WARNING: line over 80 characters
#41: FILE: target/i386/translate.c:3062:
+static inline void gen_ld_modrm_VxWx(CPUX86State *env, DisasContext *s, int modrm,

ERROR: "foo* bar" should be "foo *bar"
#42: FILE: target/i386/translate.c:3063:
+                                     uint32_t* dofs, uint32_t* aofs)

ERROR: space required before the open parenthesis '('
#48: FILE: target/i386/translate.c:3069:
+    if(mod == 3) {

WARNING: line over 80 characters
#56: FILE: target/i386/translate.c:3077:
+        gen_ldo_env_A0(s, *aofs); /* FIXME this needs to load 32 bytes for YMM */

WARNING: line over 80 characters
#60: FILE: target/i386/translate.c:3081:
+static inline void gen_ld_modrm_VxHxWx(CPUX86State *env, DisasContext *s, int modrm,

WARNING: line over 80 characters
#61: FILE: target/i386/translate.c:3082:
+                                       uint32_t* dofs, uint32_t* aofs, uint32_t* bofs)

ERROR: "foo* bar" should be "foo *bar"
#61: FILE: target/i386/translate.c:3082:
+                                       uint32_t* dofs, uint32_t* aofs, uint32_t* bofs)

total: 5 errors, 5 warnings, 53 lines checked

Patch 5/22 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

6/22 Checking commit 57dac1c68d9c (target/i386: introduce gen_gvec_ld_modrm_* helpers)
WARNING: line over 80 characters
#21: FILE: target/i386/translate.c:3090:
+typedef void (*gen_ld_modrm_2_fp_t)(CPUX86State *env, DisasContext *s, int modrm,

WARNING: line over 80 characters
#23: FILE: target/i386/translate.c:3092:
+typedef void (*gen_ld_modrm_3_fp_t)(CPUX86State *env, DisasContext *s, int modrm,

WARNING: line over 80 characters
#24: FILE: target/i386/translate.c:3093:
+                                    uint32_t *dofs, uint32_t *aofs, uint32_t *bofs);

total: 0 errors, 3 warnings, 83 lines checked

Patch 6/22 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
7/22 Checking commit 0e2ac0eec7f4 (target/i386: add vector register file alignment constraints)
8/22 Checking commit ec7327855e43 (target/i386: reimplement (V)PAND, (V)ANDPS, (V)ANDPD)
ERROR: line over 90 characters
#92: FILE: target/i386/translate.c:3169:
+#define gen_pand_mm(env, s, modrm)   gen_gvec_ld_modrm_mm  ((env), (s), (modrm), MO_64, tcg_gen_gvec_and, 0112)

ERROR: space prohibited between function name and open parenthesis '('
#92: FILE: target/i386/translate.c:3169:
+#define gen_pand_mm(env, s, modrm)   gen_gvec_ld_modrm_mm  ((env), (s), (modrm), MO_64, tcg_gen_gvec_and, 0112)

ERROR: line over 90 characters
#93: FILE: target/i386/translate.c:3170:
+#define gen_pand_xmm(env, s, modrm)  gen_gvec_ld_modrm_xmm ((env), (s), (modrm), MO_64, tcg_gen_gvec_and, 0112)

ERROR: space prohibited between function name and open parenthesis '('
#93: FILE: target/i386/translate.c:3170:
+#define gen_pand_xmm(env, s, modrm)  gen_gvec_ld_modrm_xmm ((env), (s), (modrm), MO_64, tcg_gen_gvec_and, 0112)

ERROR: line over 90 characters
#94: FILE: target/i386/translate.c:3171:
+#define gen_vpand_xmm(env, s, modrm) gen_gvec_ld_modrm_vxmm((env), (s), (modrm), MO_64, tcg_gen_gvec_and, 0123)

ERROR: line over 90 characters
#95: FILE: target/i386/translate.c:3172:
+#define gen_vpand_ymm(env, s, modrm) gen_gvec_ld_modrm_vymm((env), (s), (modrm), MO_64, tcg_gen_gvec_and, 0123)

ERROR: space required before the open parenthesis '('
#122: FILE: target/i386/translate.c:3266:
+    switch(b | M_0F

ERROR: trailing statements should be on next line
#127: FILE: target/i386/translate.c:3271:
+    case 0xdb | M_0F:                  gen_pand_mm(env, s, modrm); return;

ERROR: trailing statements should be on next line
#128: FILE: target/i386/translate.c:3272:
+    case 0xdb | M_0F | P_66:           gen_pand_xmm(env, s, modrm); return;

ERROR: trailing statements should be on next line
#129: FILE: target/i386/translate.c:3273:
+    case 0xdb | M_0F | P_66 | VEX_128: gen_vpand_xmm(env, s, modrm); return;

ERROR: trailing statements should be on next line
#130: FILE: target/i386/translate.c:3274:
+    case 0xdb | M_0F | P_66 | VEX_256: gen_vpand_ymm(env, s, modrm); return;

ERROR: trailing statements should be on next line
#131: FILE: target/i386/translate.c:3275:
+    case 0x54 | M_0F:                  gen_andps_xmm(env, s, modrm); return;

ERROR: trailing statements should be on next line
#132: FILE: target/i386/translate.c:3276:
+    case 0x54 | M_0F | VEX_128:        gen_vandps_xmm(env, s, modrm); return;

ERROR: trailing statements should be on next line
#133: FILE: target/i386/translate.c:3277:
+    case 0x54 | M_0F | VEX_256:        gen_vandps_ymm(env, s, modrm); return;

ERROR: trailing statements should be on next line
#134: FILE: target/i386/translate.c:3278:
+    case 0x54 | M_0F | P_66:           gen_andpd_xmm(env, s, modrm); return;

ERROR: trailing statements should be on next line
#135: FILE: target/i386/translate.c:3279:
+    case 0x54 | M_0F | P_66 | VEX_128: gen_vandpd_xmm(env, s, modrm); return;

ERROR: trailing statements should be on next line
#136: FILE: target/i386/translate.c:3280:
+    case 0x54 | M_0F | P_66 | VEX_256: gen_vandpd_ymm(env, s, modrm); return;

ERROR: trailing statements should be on next line
#137: FILE: target/i386/translate.c:3281:
+    default: break;

total: 18 errors, 0 warnings, 106 lines checked

Patch 8/22 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

9/22 Checking commit 4ed8c0530b96 (target/i386: reimplement (V)POR, (V)ORPS, (V)ORPD)
ERROR: line over 90 characters
#70: FILE: target/i386/translate.c:3180:
+#define gen_por_mm(env, s, modrm)   gen_gvec_ld_modrm_mm  ((env), (s), (modrm), MO_64, tcg_gen_gvec_or, 0112)

ERROR: space prohibited between function name and open parenthesis '('
#70: FILE: target/i386/translate.c:3180:
+#define gen_por_mm(env, s, modrm)   gen_gvec_ld_modrm_mm  ((env), (s), (modrm), MO_64, tcg_gen_gvec_or, 0112)

ERROR: line over 90 characters
#71: FILE: target/i386/translate.c:3181:
+#define gen_por_xmm(env, s, modrm)  gen_gvec_ld_modrm_xmm ((env), (s), (modrm), MO_64, tcg_gen_gvec_or, 0112)

ERROR: space prohibited between function name and open parenthesis '('
#71: FILE: target/i386/translate.c:3181:
+#define gen_por_xmm(env, s, modrm)  gen_gvec_ld_modrm_xmm ((env), (s), (modrm), MO_64, tcg_gen_gvec_or, 0112)

ERROR: line over 90 characters
#72: FILE: target/i386/translate.c:3182:
+#define gen_vpor_xmm(env, s, modrm) gen_gvec_ld_modrm_vxmm((env), (s), (modrm), MO_64, tcg_gen_gvec_or, 0123)

ERROR: line over 90 characters
#73: FILE: target/i386/translate.c:3183:
+#define gen_vpor_ymm(env, s, modrm) gen_gvec_ld_modrm_vymm((env), (s), (modrm), MO_64, tcg_gen_gvec_or, 0123)

ERROR: trailing statements should be on next line
#89: FILE: target/i386/translate.c:3293:
+    case 0xeb | M_0F:                  gen_por_mm(env, s, modrm); return;

ERROR: trailing statements should be on next line
#90: FILE: target/i386/translate.c:3294:
+    case 0xeb | M_0F | P_66:           gen_por_xmm(env, s, modrm); return;

ERROR: trailing statements should be on next line
#91: FILE: target/i386/translate.c:3295:
+    case 0xeb | M_0F | P_66 | VEX_128: gen_vpor_xmm(env, s, modrm); return;

ERROR: trailing statements should be on next line
#92: FILE: target/i386/translate.c:3296:
+    case 0xeb | M_0F | P_66 | VEX_256: gen_vpor_ymm(env, s, modrm); return;

ERROR: trailing statements should be on next line
#93: FILE: target/i386/translate.c:3297:
+    case 0x56 | M_0F:                  gen_orps_xmm(env, s, modrm); return;

ERROR: trailing statements should be on next line
#94: FILE: target/i386/translate.c:3298:
+    case 0x56 | M_0F | VEX_128:        gen_vorps_xmm(env, s, modrm); return;

ERROR: trailing statements should be on next line
#95: FILE: target/i386/translate.c:3299:
+    case 0x56 | M_0F | VEX_256:        gen_vorps_ymm(env, s, modrm); return;

ERROR: trailing statements should be on next line
#96: FILE: target/i386/translate.c:3300:
+    case 0x56 | M_0F | P_66:           gen_orpd_xmm(env, s, modrm); return;

ERROR: trailing statements should be on next line
#97: FILE: target/i386/translate.c:3301:
+    case 0x56 | M_0F | P_66 | VEX_128: gen_vorpd_xmm(env, s, modrm); return;

ERROR: trailing statements should be on next line
#98: FILE: target/i386/translate.c:3302:
+    case 0x56 | M_0F | P_66 | VEX_256: gen_vorpd_ymm(env, s, modrm); return;

total: 16 errors, 0 warnings, 72 lines checked

Patch 9/22 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

10/22 Checking commit 69f3ccdbdd4b (target/i386: reimplement (V)PXOR, (V)XORPS, (V)XORPD)
ERROR: line over 90 characters
#70: FILE: target/i386/translate.c:3191:
+#define gen_pxor_mm(env, s, modrm)   gen_gvec_ld_modrm_mm  ((env), (s), (modrm), MO_64, tcg_gen_gvec_xor, 0112)

ERROR: space prohibited between function name and open parenthesis '('
#70: FILE: target/i386/translate.c:3191:
+#define gen_pxor_mm(env, s, modrm)   gen_gvec_ld_modrm_mm  ((env), (s), (modrm), MO_64, tcg_gen_gvec_xor, 0112)

ERROR: line over 90 characters
#71: FILE: target/i386/translate.c:3192:
+#define gen_pxor_xmm(env, s, modrm)  gen_gvec_ld_modrm_xmm ((env), (s), (modrm), MO_64, tcg_gen_gvec_xor, 0112)

ERROR: space prohibited between function name and open parenthesis '('
#71: FILE: target/i386/translate.c:3192:
+#define gen_pxor_xmm(env, s, modrm)  gen_gvec_ld_modrm_xmm ((env), (s), (modrm), MO_64, tcg_gen_gvec_xor, 0112)

ERROR: line over 90 characters
#72: FILE: target/i386/translate.c:3193:
+#define gen_vpxor_xmm(env, s, modrm) gen_gvec_ld_modrm_vxmm((env), (s), (modrm), MO_64, tcg_gen_gvec_xor, 0123)

ERROR: line over 90 characters
#73: FILE: target/i386/translate.c:3194:
+#define gen_vpxor_ymm(env, s, modrm) gen_gvec_ld_modrm_vymm((env), (s), (modrm), MO_64, tcg_gen_gvec_xor, 0123)

ERROR: trailing statements should be on next line
#88: FILE: target/i386/translate.c:3315:
+    case 0xef | M_0F:                  gen_pxor_mm(env, s, modrm); return;

ERROR: trailing statements should be on next line
#89: FILE: target/i386/translate.c:3316:
+    case 0xef | M_0F | P_66:           gen_pxor_xmm(env, s, modrm); return;

ERROR: trailing statements should be on next line
#90: FILE: target/i386/translate.c:3317:
+    case 0xef | M_0F | P_66 | VEX_128: gen_vpxor_xmm(env, s, modrm); return;

ERROR: trailing statements should be on next line
#91: FILE: target/i386/translate.c:3318:
+    case 0xef | M_0F | P_66 | VEX_256: gen_vpxor_ymm(env, s, modrm); return;

ERROR: trailing statements should be on next line
#92: FILE: target/i386/translate.c:3319:
+    case 0x57 | M_0F:                  gen_xorps_xmm(env, s, modrm); return;

ERROR: trailing statements should be on next line
#93: FILE: target/i386/translate.c:3320:
+    case 0x57 | M_0F | VEX_128:        gen_vxorps_xmm(env, s, modrm); return;

ERROR: trailing statements should be on next line
#94: FILE: target/i386/translate.c:3321:
+    case 0x57 | M_0F | VEX_256:        gen_vxorps_ymm(env, s, modrm); return;

ERROR: trailing statements should be on next line
#95: FILE: target/i386/translate.c:3322:
+    case 0x57 | M_0F | P_66:           gen_xorpd_xmm(env, s, modrm); return;

ERROR: trailing statements should be on next line
#96: FILE: target/i386/translate.c:3323:
+    case 0x57 | M_0F | P_66 | VEX_128: gen_vxorpd_xmm(env, s, modrm); return;

ERROR: trailing statements should be on next line
#97: FILE: target/i386/translate.c:3324:
+    case 0x57 | M_0F | P_66 | VEX_256: gen_vxorpd_ymm(env, s, modrm); return;

total: 16 errors, 0 warnings, 71 lines checked

Patch 10/22 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

11/22 Checking commit 443c432ed998 (target/i386: reimplement (V)PANDN, (V)ANDNPS, (V)ANDNPD)
ERROR: line over 90 characters
#73: FILE: target/i386/translate.c:3180:
+#define gen_pandn_mm(env, s, modrm)   gen_gvec_ld_modrm_mm  ((env), (s), (modrm), MO_64, tcg_gen_gvec_andc, 0121)

ERROR: space prohibited between function name and open parenthesis '('
#73: FILE: target/i386/translate.c:3180:
+#define gen_pandn_mm(env, s, modrm)   gen_gvec_ld_modrm_mm  ((env), (s), (modrm), MO_64, tcg_gen_gvec_andc, 0121)

ERROR: line over 90 characters
#74: FILE: target/i386/translate.c:3181:
+#define gen_pandn_xmm(env, s, modrm)  gen_gvec_ld_modrm_xmm ((env), (s), (modrm), MO_64, tcg_gen_gvec_andc, 0121)

ERROR: space prohibited between function name and open parenthesis '('
#74: FILE: target/i386/translate.c:3181:
+#define gen_pandn_xmm(env, s, modrm)  gen_gvec_ld_modrm_xmm ((env), (s), (modrm), MO_64, tcg_gen_gvec_andc, 0121)

ERROR: line over 90 characters
#75: FILE: target/i386/translate.c:3182:
+#define gen_vpandn_xmm(env, s, modrm) gen_gvec_ld_modrm_vxmm((env), (s), (modrm), MO_64, tcg_gen_gvec_andc, 0132)

ERROR: line over 90 characters
#76: FILE: target/i386/translate.c:3183:
+#define gen_vpandn_ymm(env, s, modrm) gen_gvec_ld_modrm_vymm((env), (s), (modrm), MO_64, tcg_gen_gvec_andc, 0132)

ERROR: trailing statements should be on next line
#91: FILE: target/i386/translate.c:3315:
+    case 0xdf | M_0F:                  gen_pandn_mm(env, s, modrm); return;

ERROR: trailing statements should be on next line
#92: FILE: target/i386/translate.c:3316:
+    case 0xdf | M_0F | P_66:           gen_pandn_xmm(env, s, modrm); return;

ERROR: trailing statements should be on next line
#93: FILE: target/i386/translate.c:3317:
+    case 0xdf | M_0F | P_66 | VEX_128: gen_vpandn_xmm(env, s, modrm); return;

ERROR: trailing statements should be on next line
#94: FILE: target/i386/translate.c:3318:
+    case 0xdf | M_0F | P_66 | VEX_256: gen_vpandn_ymm(env, s, modrm); return;

ERROR: trailing statements should be on next line
#95: FILE: target/i386/translate.c:3319:
+    case 0x55 | M_0F:                  gen_andnps_xmm(env, s, modrm); return;

ERROR: trailing statements should be on next line
#96: FILE: target/i386/translate.c:3320:
+    case 0x55 | M_0F | VEX_128:        gen_vandnps_xmm(env, s, modrm); return;

ERROR: trailing statements should be on next line
#97: FILE: target/i386/translate.c:3321:
+    case 0x55 | M_0F | VEX_256:        gen_vandnps_ymm(env, s, modrm); return;

ERROR: trailing statements should be on next line
#98: FILE: target/i386/translate.c:3322:
+    case 0x55 | M_0F | P_66:           gen_andnpd_xmm(env, s, modrm); return;

ERROR: trailing statements should be on next line
#99: FILE: target/i386/translate.c:3323:
+    case 0x55 | M_0F | P_66 | VEX_128: gen_vandnpd_xmm(env, s, modrm); return;

ERROR: trailing statements should be on next line
#100: FILE: target/i386/translate.c:3324:
+    case 0x55 | M_0F | P_66 | VEX_256: gen_vandnpd_ymm(env, s, modrm); return;

total: 16 errors, 0 warnings, 74 lines checked

Patch 11/22 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

12/22 Checking commit 1092ef19a617 (target/i386: reimplement (V)PADD(B, W, D, Q))
ERROR: line over 90 characters
#82: FILE: target/i386/translate.c:3169:
+#define gen_padd_mm(env, s, modrm, vece)   gen_gvec_ld_modrm_mm  ((env), (s), (modrm), (vece), tcg_gen_gvec_add, 0112)

ERROR: space prohibited between function name and open parenthesis '('
#82: FILE: target/i386/translate.c:3169:
+#define gen_padd_mm(env, s, modrm, vece)   gen_gvec_ld_modrm_mm  ((env), (s), (modrm), (vece), tcg_gen_gvec_add, 0112)

ERROR: line over 90 characters
#83: FILE: target/i386/translate.c:3170:
+#define gen_padd_xmm(env, s, modrm, vece)  gen_gvec_ld_modrm_xmm ((env), (s), (modrm), (vece), tcg_gen_gvec_add, 0112)

ERROR: space prohibited between function name and open parenthesis '('
#83: FILE: target/i386/translate.c:3170:
+#define gen_padd_xmm(env, s, modrm, vece)  gen_gvec_ld_modrm_xmm ((env), (s), (modrm), (vece), tcg_gen_gvec_add, 0112)

ERROR: line over 90 characters
#84: FILE: target/i386/translate.c:3171:
+#define gen_vpadd_xmm(env, s, modrm, vece) gen_gvec_ld_modrm_vxmm((env), (s), (modrm), (vece), tcg_gen_gvec_add, 0123)

ERROR: line over 90 characters
#85: FILE: target/i386/translate.c:3172:
+#define gen_vpadd_ymm(env, s, modrm, vece) gen_gvec_ld_modrm_vymm((env), (s), (modrm), (vece), tcg_gen_gvec_add, 0123)

ERROR: trailing statements should be on next line
#94: FILE: target/i386/translate.c:3309:
+    case 0xfc | M_0F:                  gen_padd_mm(env, s, modrm, MO_8); return;

WARNING: line over 80 characters
#95: FILE: target/i386/translate.c:3310:
+    case 0xfc | M_0F | P_66:           gen_padd_xmm(env, s, modrm, MO_8); return;

ERROR: trailing statements should be on next line
#95: FILE: target/i386/translate.c:3310:
+    case 0xfc | M_0F | P_66:           gen_padd_xmm(env, s, modrm, MO_8); return;

WARNING: line over 80 characters
#96: FILE: target/i386/translate.c:3311:
+    case 0xfc | M_0F | P_66 | VEX_128: gen_vpadd_xmm(env, s, modrm, MO_8); return;

ERROR: trailing statements should be on next line
#96: FILE: target/i386/translate.c:3311:
+    case 0xfc | M_0F | P_66 | VEX_128: gen_vpadd_xmm(env, s, modrm, MO_8); return;

WARNING: line over 80 characters
#97: FILE: target/i386/translate.c:3312:
+    case 0xfc | M_0F | P_66 | VEX_256: gen_vpadd_ymm(env, s, modrm, MO_8); return;

ERROR: trailing statements should be on next line
#97: FILE: target/i386/translate.c:3312:
+    case 0xfc | M_0F | P_66 | VEX_256: gen_vpadd_ymm(env, s, modrm, MO_8); return;

WARNING: line over 80 characters
#99: FILE: target/i386/translate.c:3314:
+    case 0xfd | M_0F:                  gen_padd_mm(env, s, modrm, MO_16); return;

ERROR: trailing statements should be on next line
#99: FILE: target/i386/translate.c:3314:
+    case 0xfd | M_0F:                  gen_padd_mm(env, s, modrm, MO_16); return;

WARNING: line over 80 characters
#100: FILE: target/i386/translate.c:3315:
+    case 0xfd | M_0F | P_66:           gen_padd_xmm(env, s, modrm, MO_16); return;

ERROR: trailing statements should be on next line
#100: FILE: target/i386/translate.c:3315:
+    case 0xfd | M_0F | P_66:           gen_padd_xmm(env, s, modrm, MO_16); return;

WARNING: line over 80 characters
#101: FILE: target/i386/translate.c:3316:
+    case 0xfd | M_0F | P_66 | VEX_128: gen_vpadd_xmm(env, s, modrm, MO_16); return;

ERROR: trailing statements should be on next line
#101: FILE: target/i386/translate.c:3316:
+    case 0xfd | M_0F | P_66 | VEX_128: gen_vpadd_xmm(env, s, modrm, MO_16); return;

WARNING: line over 80 characters
#102: FILE: target/i386/translate.c:3317:
+    case 0xfd | M_0F | P_66 | VEX_256: gen_vpadd_ymm(env, s, modrm, MO_16); return;

ERROR: trailing statements should be on next line
#102: FILE: target/i386/translate.c:3317:
+    case 0xfd | M_0F | P_66 | VEX_256: gen_vpadd_ymm(env, s, modrm, MO_16); return;

WARNING: line over 80 characters
#104: FILE: target/i386/translate.c:3319:
+    case 0xfe | M_0F:                  gen_padd_mm(env, s, modrm, MO_32); return;

ERROR: trailing statements should be on next line
#104: FILE: target/i386/translate.c:3319:
+    case 0xfe | M_0F:                  gen_padd_mm(env, s, modrm, MO_32); return;

WARNING: line over 80 characters
#105: FILE: target/i386/translate.c:3320:
+    case 0xfe | M_0F | P_66:           gen_padd_xmm(env, s, modrm, MO_32); return;

ERROR: trailing statements should be on next line
#105: FILE: target/i386/translate.c:3320:
+    case 0xfe | M_0F | P_66:           gen_padd_xmm(env, s, modrm, MO_32); return;

WARNING: line over 80 characters
#106: FILE: target/i386/translate.c:3321:
+    case 0xfe | M_0F | P_66 | VEX_128: gen_vpadd_xmm(env, s, modrm, MO_32); return;

ERROR: trailing statements should be on next line
#106: FILE: target/i386/translate.c:3321:
+    case 0xfe | M_0F | P_66 | VEX_128: gen_vpadd_xmm(env, s, modrm, MO_32); return;

WARNING: line over 80 characters
#107: FILE: target/i386/translate.c:3322:
+    case 0xfe | M_0F | P_66 | VEX_256: gen_vpadd_ymm(env, s, modrm, MO_32); return;

ERROR: trailing statements should be on next line
#107: FILE: target/i386/translate.c:3322:
+    case 0xfe | M_0F | P_66 | VEX_256: gen_vpadd_ymm(env, s, modrm, MO_32); return;

WARNING: line over 80 characters
#109: FILE: target/i386/translate.c:3324:
+    case 0xd4 | M_0F:                  gen_padd_mm(env, s, modrm, MO_64); return;

ERROR: trailing statements should be on next line
#109: FILE: target/i386/translate.c:3324:
+    case 0xd4 | M_0F:                  gen_padd_mm(env, s, modrm, MO_64); return;

WARNING: line over 80 characters
#110: FILE: target/i386/translate.c:3325:
+    case 0xd4 | M_0F | P_66:           gen_padd_xmm(env, s, modrm, MO_64); return;

ERROR: trailing statements should be on next line
#110: FILE: target/i386/translate.c:3325:
+    case 0xd4 | M_0F | P_66:           gen_padd_xmm(env, s, modrm, MO_64); return;

WARNING: line over 80 characters
#111: FILE: target/i386/translate.c:3326:
+    case 0xd4 | M_0F | P_66 | VEX_128: gen_vpadd_xmm(env, s, modrm, MO_64); return;

ERROR: trailing statements should be on next line
#111: FILE: target/i386/translate.c:3326:
+    case 0xd4 | M_0F | P_66 | VEX_128: gen_vpadd_xmm(env, s, modrm, MO_64); return;

WARNING: line over 80 characters
#112: FILE: target/i386/translate.c:3327:
+    case 0xd4 | M_0F | P_66 | VEX_256: gen_vpadd_ymm(env, s, modrm, MO_64); return;

ERROR: trailing statements should be on next line
#112: FILE: target/i386/translate.c:3327:
+    case 0xd4 | M_0F | P_66 | VEX_256: gen_vpadd_ymm(env, s, modrm, MO_64); return;

total: 22 errors, 15 warnings, 86 lines checked

Patch 12/22 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

13/22 Checking commit 2d01df26f671 (target/i386: reimplement (V)PSUB(B, W, D, Q))
ERROR: line over 90 characters
#75: FILE: target/i386/translate.c:3174:
+#define gen_psub_mm(env, s, modrm, vece)   gen_gvec_ld_modrm_mm  ((env), (s), (modrm), (vece), tcg_gen_gvec_sub, 0112)

ERROR: space prohibited between function name and open parenthesis '('
#75: FILE: target/i386/translate.c:3174:
+#define gen_psub_mm(env, s, modrm, vece)   gen_gvec_ld_modrm_mm  ((env), (s), (modrm), (vece), tcg_gen_gvec_sub, 0112)

ERROR: line over 90 characters
#76: FILE: target/i386/translate.c:3175:
+#define gen_psub_xmm(env, s, modrm, vece)  gen_gvec_ld_modrm_xmm ((env), (s), (modrm), (vece), tcg_gen_gvec_sub, 0112)

ERROR: space prohibited between function name and open parenthesis '('
#76: FILE: target/i386/translate.c:3175:
+#define gen_psub_xmm(env, s, modrm, vece)  gen_gvec_ld_modrm_xmm ((env), (s), (modrm), (vece), tcg_gen_gvec_sub, 0112)

ERROR: line over 90 characters
#77: FILE: target/i386/translate.c:3176:
+#define gen_vpsub_xmm(env, s, modrm, vece) gen_gvec_ld_modrm_vxmm((env), (s), (modrm), (vece), tcg_gen_gvec_sub, 0123)

ERROR: line over 90 characters
#78: FILE: target/i386/translate.c:3177:
+#define gen_vpsub_ymm(env, s, modrm, vece) gen_gvec_ld_modrm_vymm((env), (s), (modrm), (vece), tcg_gen_gvec_sub, 0123)

ERROR: trailing statements should be on next line
#87: FILE: target/i386/translate.c:3334:
+    case 0xf8 | M_0F:                  gen_psub_mm(env, s, modrm, MO_8); return;

WARNING: line over 80 characters
#88: FILE: target/i386/translate.c:3335:
+    case 0xf8 | M_0F | P_66:           gen_psub_xmm(env, s, modrm, MO_8); return;

ERROR: trailing statements should be on next line
#88: FILE: target/i386/translate.c:3335:
+    case 0xf8 | M_0F | P_66:           gen_psub_xmm(env, s, modrm, MO_8); return;

WARNING: line over 80 characters
#89: FILE: target/i386/translate.c:3336:
+    case 0xf8 | M_0F | P_66 | VEX_128: gen_vpsub_xmm(env, s, modrm, MO_8); return;

ERROR: trailing statements should be on next line
#89: FILE: target/i386/translate.c:3336:
+    case 0xf8 | M_0F | P_66 | VEX_128: gen_vpsub_xmm(env, s, modrm, MO_8); return;

WARNING: line over 80 characters
#90: FILE: target/i386/translate.c:3337:
+    case 0xf8 | M_0F | P_66 | VEX_256: gen_vpsub_ymm(env, s, modrm, MO_8); return;

ERROR: trailing statements should be on next line
#90: FILE: target/i386/translate.c:3337:
+    case 0xf8 | M_0F | P_66 | VEX_256: gen_vpsub_ymm(env, s, modrm, MO_8); return;

WARNING: line over 80 characters
#92: FILE: target/i386/translate.c:3339:
+    case 0xf9 | M_0F:                  gen_psub_mm(env, s, modrm, MO_16); return;

ERROR: trailing statements should be on next line
#92: FILE: target/i386/translate.c:3339:
+    case 0xf9 | M_0F:                  gen_psub_mm(env, s, modrm, MO_16); return;

WARNING: line over 80 characters
#93: FILE: target/i386/translate.c:3340:
+    case 0xf9 | M_0F | P_66:           gen_psub_xmm(env, s, modrm, MO_16); return;

ERROR: trailing statements should be on next line
#93: FILE: target/i386/translate.c:3340:
+    case 0xf9 | M_0F | P_66:           gen_psub_xmm(env, s, modrm, MO_16); return;

WARNING: line over 80 characters
#94: FILE: target/i386/translate.c:3341:
+    case 0xf9 | M_0F | P_66 | VEX_128: gen_vpsub_xmm(env, s, modrm, MO_16); return;

ERROR: trailing statements should be on next line
#94: FILE: target/i386/translate.c:3341:
+    case 0xf9 | M_0F | P_66 | VEX_128: gen_vpsub_xmm(env, s, modrm, MO_16); return;

WARNING: line over 80 characters
#95: FILE: target/i386/translate.c:3342:
+    case 0xf9 | M_0F | P_66 | VEX_256: gen_vpsub_ymm(env, s, modrm, MO_16); return;

ERROR: trailing statements should be on next line
#95: FILE: target/i386/translate.c:3342:
+    case 0xf9 | M_0F | P_66 | VEX_256: gen_vpsub_ymm(env, s, modrm, MO_16); return;

WARNING: line over 80 characters
#97: FILE: target/i386/translate.c:3344:
+    case 0xfa | M_0F:                  gen_psub_mm(env, s, modrm, MO_32); return;

ERROR: trailing statements should be on next line
#97: FILE: target/i386/translate.c:3344:
+    case 0xfa | M_0F:                  gen_psub_mm(env, s, modrm, MO_32); return;

WARNING: line over 80 characters
#98: FILE: target/i386/translate.c:3345:
+    case 0xfa | M_0F | P_66:           gen_psub_xmm(env, s, modrm, MO_32); return;

ERROR: trailing statements should be on next line
#98: FILE: target/i386/translate.c:3345:
+    case 0xfa | M_0F | P_66:           gen_psub_xmm(env, s, modrm, MO_32); return;

WARNING: line over 80 characters
#99: FILE: target/i386/translate.c:3346:
+    case 0xfa | M_0F | P_66 | VEX_128: gen_vpsub_xmm(env, s, modrm, MO_32); return;

ERROR: trailing statements should be on next line
#99: FILE: target/i386/translate.c:3346:
+    case 0xfa | M_0F | P_66 | VEX_128: gen_vpsub_xmm(env, s, modrm, MO_32); return;

WARNING: line over 80 characters
#100: FILE: target/i386/translate.c:3347:
+    case 0xfa | M_0F | P_66 | VEX_256: gen_vpsub_ymm(env, s, modrm, MO_32); return;

ERROR: trailing statements should be on next line
#100: FILE: target/i386/translate.c:3347:
+    case 0xfa | M_0F | P_66 | VEX_256: gen_vpsub_ymm(env, s, modrm, MO_32); return;

WARNING: line over 80 characters
#102: FILE: target/i386/translate.c:3349:
+    case 0xfb | M_0F:                  gen_psub_mm(env, s, modrm, MO_64); return;

ERROR: trailing statements should be on next line
#102: FILE: target/i386/translate.c:3349:
+    case 0xfb | M_0F:                  gen_psub_mm(env, s, modrm, MO_64); return;

WARNING: line over 80 characters
#103: FILE: target/i386/translate.c:3350:
+    case 0xfb | M_0F | P_66:           gen_psub_xmm(env, s, modrm, MO_64); return;

ERROR: trailing statements should be on next line
#103: FILE: target/i386/translate.c:3350:
+    case 0xfb | M_0F | P_66:           gen_psub_xmm(env, s, modrm, MO_64); return;

WARNING: line over 80 characters
#104: FILE: target/i386/translate.c:3351:
+    case 0xfb | M_0F | P_66 | VEX_128: gen_vpsub_xmm(env, s, modrm, MO_64); return;

ERROR: trailing statements should be on next line
#104: FILE: target/i386/translate.c:3351:
+    case 0xfb | M_0F | P_66 | VEX_128: gen_vpsub_xmm(env, s, modrm, MO_64); return;

WARNING: line over 80 characters
#105: FILE: target/i386/translate.c:3352:
+    case 0xfb | M_0F | P_66 | VEX_256: gen_vpsub_ymm(env, s, modrm, MO_64); return;

ERROR: trailing statements should be on next line
#105: FILE: target/i386/translate.c:3352:
+    case 0xfb | M_0F | P_66 | VEX_256: gen_vpsub_ymm(env, s, modrm, MO_64); return;

total: 22 errors, 15 warnings, 80 lines checked

Patch 13/22 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

14/22 Checking commit 6a1425f7611b (target/i386: reimplement (V)PADDS(B, W))
ERROR: line over 90 characters
#74: FILE: target/i386/translate.c:3174:
+#define gen_padds_mm(env, s, modrm, vece)   gen_gvec_ld_modrm_mm  ((env), (s), (modrm), (vece), tcg_gen_gvec_ssadd, 0112)

ERROR: space prohibited between function name and open parenthesis '('
#74: FILE: target/i386/translate.c:3174:
+#define gen_padds_mm(env, s, modrm, vece)   gen_gvec_ld_modrm_mm  ((env), (s), (modrm), (vece), tcg_gen_gvec_ssadd, 0112)

ERROR: line over 90 characters
#75: FILE: target/i386/translate.c:3175:
+#define gen_padds_xmm(env, s, modrm, vece)  gen_gvec_ld_modrm_xmm ((env), (s), (modrm), (vece), tcg_gen_gvec_ssadd, 0112)

ERROR: space prohibited between function name and open parenthesis '('
#75: FILE: target/i386/translate.c:3175:
+#define gen_padds_xmm(env, s, modrm, vece)  gen_gvec_ld_modrm_xmm ((env), (s), (modrm), (vece), tcg_gen_gvec_ssadd, 0112)

ERROR: line over 90 characters
#76: FILE: target/i386/translate.c:3176:
+#define gen_vpadds_xmm(env, s, modrm, vece) gen_gvec_ld_modrm_vxmm((env), (s), (modrm), (vece), tcg_gen_gvec_ssadd, 0123)

ERROR: line over 90 characters
#77: FILE: target/i386/translate.c:3177:
+#define gen_vpadds_ymm(env, s, modrm, vece) gen_gvec_ld_modrm_vymm((env), (s), (modrm), (vece), tcg_gen_gvec_ssadd, 0123)

WARNING: line over 80 characters
#86: FILE: target/i386/translate.c:3339:
+    case 0xec | M_0F:                  gen_padds_mm(env, s, modrm, MO_8); return;

ERROR: trailing statements should be on next line
#86: FILE: target/i386/translate.c:3339:
+    case 0xec | M_0F:                  gen_padds_mm(env, s, modrm, MO_8); return;

WARNING: line over 80 characters
#87: FILE: target/i386/translate.c:3340:
+    case 0xec | M_0F | P_66:           gen_padds_xmm(env, s, modrm, MO_8); return;

ERROR: trailing statements should be on next line
#87: FILE: target/i386/translate.c:3340:
+    case 0xec | M_0F | P_66:           gen_padds_xmm(env, s, modrm, MO_8); return;

WARNING: line over 80 characters
#88: FILE: target/i386/translate.c:3341:
+    case 0xec | M_0F | P_66 | VEX_128: gen_vpadds_xmm(env, s, modrm, MO_8); return;

ERROR: trailing statements should be on next line
#88: FILE: target/i386/translate.c:3341:
+    case 0xec | M_0F | P_66 | VEX_128: gen_vpadds_xmm(env, s, modrm, MO_8); return;

WARNING: line over 80 characters
#89: FILE: target/i386/translate.c:3342:
+    case 0xec | M_0F | P_66 | VEX_256: gen_vpadds_ymm(env, s, modrm, MO_8); return;

ERROR: trailing statements should be on next line
#89: FILE: target/i386/translate.c:3342:
+    case 0xec | M_0F | P_66 | VEX_256: gen_vpadds_ymm(env, s, modrm, MO_8); return;

WARNING: line over 80 characters
#91: FILE: target/i386/translate.c:3344:
+    case 0xed | M_0F:                  gen_padds_mm(env, s, modrm, MO_16); return;

ERROR: trailing statements should be on next line
#91: FILE: target/i386/translate.c:3344:
+    case 0xed | M_0F:                  gen_padds_mm(env, s, modrm, MO_16); return;

WARNING: line over 80 characters
#92: FILE: target/i386/translate.c:3345:
+    case 0xed | M_0F | P_66:           gen_padds_xmm(env, s, modrm, MO_16); return;

ERROR: trailing statements should be on next line
#92: FILE: target/i386/translate.c:3345:
+    case 0xed | M_0F | P_66:           gen_padds_xmm(env, s, modrm, MO_16); return;

WARNING: line over 80 characters
#93: FILE: target/i386/translate.c:3346:
+    case 0xed | M_0F | P_66 | VEX_128: gen_vpadds_xmm(env, s, modrm, MO_16); return;

ERROR: trailing statements should be on next line
#93: FILE: target/i386/translate.c:3346:
+    case 0xed | M_0F | P_66 | VEX_128: gen_vpadds_xmm(env, s, modrm, MO_16); return;

WARNING: line over 80 characters
#94: FILE: target/i386/translate.c:3347:
+    case 0xed | M_0F | P_66 | VEX_256: gen_vpadds_ymm(env, s, modrm, MO_16); return;

ERROR: trailing statements should be on next line
#94: FILE: target/i386/translate.c:3347:
+    case 0xed | M_0F | P_66 | VEX_256: gen_vpadds_ymm(env, s, modrm, MO_16); return;

total: 14 errors, 8 warnings, 69 lines checked

Patch 14/22 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

15/22 Checking commit 5ae782015cc3 (target/i386: reimplement (V)PADDUS(B, W))
ERROR: line over 90 characters
#73: FILE: target/i386/translate.c:3179:
+#define gen_paddus_mm(env, s, modrm, vece)   gen_gvec_ld_modrm_mm  ((env), (s), (modrm), (vece), tcg_gen_gvec_usadd, 0112)

ERROR: space prohibited between function name and open parenthesis '('
#73: FILE: target/i386/translate.c:3179:
+#define gen_paddus_mm(env, s, modrm, vece)   gen_gvec_ld_modrm_mm  ((env), (s), (modrm), (vece), tcg_gen_gvec_usadd, 0112)

ERROR: line over 90 characters
#74: FILE: target/i386/translate.c:3180:
+#define gen_paddus_xmm(env, s, modrm, vece)  gen_gvec_ld_modrm_xmm ((env), (s), (modrm), (vece), tcg_gen_gvec_usadd, 0112)

ERROR: space prohibited between function name and open parenthesis '('
#74: FILE: target/i386/translate.c:3180:
+#define gen_paddus_xmm(env, s, modrm, vece)  gen_gvec_ld_modrm_xmm ((env), (s), (modrm), (vece), tcg_gen_gvec_usadd, 0112)

ERROR: line over 90 characters
#75: FILE: target/i386/translate.c:3181:
+#define gen_vpaddus_xmm(env, s, modrm, vece) gen_gvec_ld_modrm_vxmm((env), (s), (modrm), (vece), tcg_gen_gvec_usadd, 0123)

ERROR: line over 90 characters
#76: FILE: target/i386/translate.c:3182:
+#define gen_vpaddus_ymm(env, s, modrm, vece) gen_gvec_ld_modrm_vymm((env), (s), (modrm), (vece), tcg_gen_gvec_usadd, 0123)

WARNING: line over 80 characters
#85: FILE: target/i386/translate.c:3344:
+    case 0xdc | M_0F:                  gen_paddus_mm(env, s, modrm, MO_8); return;

ERROR: trailing statements should be on next line
#85: FILE: target/i386/translate.c:3344:
+    case 0xdc | M_0F:                  gen_paddus_mm(env, s, modrm, MO_8); return;

WARNING: line over 80 characters
#86: FILE: target/i386/translate.c:3345:
+    case 0xdc | M_0F | P_66:           gen_paddus_xmm(env, s, modrm, MO_8); return;

ERROR: trailing statements should be on next line
#86: FILE: target/i386/translate.c:3345:
+    case 0xdc | M_0F | P_66:           gen_paddus_xmm(env, s, modrm, MO_8); return;

WARNING: line over 80 characters
#87: FILE: target/i386/translate.c:3346:
+    case 0xdc | M_0F | P_66 | VEX_128: gen_vpaddus_xmm(env, s, modrm, MO_8); return;

ERROR: trailing statements should be on next line
#87: FILE: target/i386/translate.c:3346:
+    case 0xdc | M_0F | P_66 | VEX_128: gen_vpaddus_xmm(env, s, modrm, MO_8); return;

WARNING: line over 80 characters
#88: FILE: target/i386/translate.c:3347:
+    case 0xdc | M_0F | P_66 | VEX_256: gen_vpaddus_ymm(env, s, modrm, MO_8); return;

ERROR: trailing statements should be on next line
#88: FILE: target/i386/translate.c:3347:
+    case 0xdc | M_0F | P_66 | VEX_256: gen_vpaddus_ymm(env, s, modrm, MO_8); return;

WARNING: line over 80 characters
#90: FILE: target/i386/translate.c:3349:
+    case 0xdd | M_0F:                  gen_paddus_mm(env, s, modrm, MO_16); return;

ERROR: trailing statements should be on next line
#90: FILE: target/i386/translate.c:3349:
+    case 0xdd | M_0F:                  gen_paddus_mm(env, s, modrm, MO_16); return;

WARNING: line over 80 characters
#91: FILE: target/i386/translate.c:3350:
+    case 0xdd | M_0F | P_66:           gen_paddus_xmm(env, s, modrm, MO_16); return;

ERROR: trailing statements should be on next line
#91: FILE: target/i386/translate.c:3350:
+    case 0xdd | M_0F | P_66:           gen_paddus_xmm(env, s, modrm, MO_16); return;

WARNING: line over 80 characters
#92: FILE: target/i386/translate.c:3351:
+    case 0xdd | M_0F | P_66 | VEX_128: gen_vpaddus_xmm(env, s, modrm, MO_16); return;

ERROR: trailing statements should be on next line
#92: FILE: target/i386/translate.c:3351:
+    case 0xdd | M_0F | P_66 | VEX_128: gen_vpaddus_xmm(env, s, modrm, MO_16); return;

WARNING: line over 80 characters
#93: FILE: target/i386/translate.c:3352:
+    case 0xdd | M_0F | P_66 | VEX_256: gen_vpaddus_ymm(env, s, modrm, MO_16); return;

ERROR: trailing statements should be on next line
#93: FILE: target/i386/translate.c:3352:
+    case 0xdd | M_0F | P_66 | VEX_256: gen_vpaddus_ymm(env, s, modrm, MO_16); return;

total: 14 errors, 8 warnings, 68 lines checked

Patch 15/22 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

16/22 Checking commit 4fffe88fbed7 (target/i386: reimplement (V)PSUBS(B, W))
ERROR: line over 90 characters
#70: FILE: target/i386/translate.c:3189:
+#define gen_psubs_mm(env, s, modrm, vece)   gen_gvec_ld_modrm_mm  ((env), (s), (modrm), (vece), tcg_gen_gvec_sssub, 0112)

ERROR: space prohibited between function name and open parenthesis '('
#70: FILE: target/i386/translate.c:3189:
+#define gen_psubs_mm(env, s, modrm, vece)   gen_gvec_ld_modrm_mm  ((env), (s), (modrm), (vece), tcg_gen_gvec_sssub, 0112)

ERROR: line over 90 characters
#71: FILE: target/i386/translate.c:3190:
+#define gen_psubs_xmm(env, s, modrm, vece)  gen_gvec_ld_modrm_xmm ((env), (s), (modrm), (vece), tcg_gen_gvec_sssub, 0112)

ERROR: space prohibited between function name and open parenthesis '('
#71: FILE: target/i386/translate.c:3190:
+#define gen_psubs_xmm(env, s, modrm, vece)  gen_gvec_ld_modrm_xmm ((env), (s), (modrm), (vece), tcg_gen_gvec_sssub, 0112)

ERROR: line over 90 characters
#72: FILE: target/i386/translate.c:3191:
+#define gen_vpsubs_xmm(env, s, modrm, vece) gen_gvec_ld_modrm_vxmm((env), (s), (modrm), (vece), tcg_gen_gvec_sssub, 0123)

ERROR: line over 90 characters
#73: FILE: target/i386/translate.c:3192:
+#define gen_vpsubs_ymm(env, s, modrm, vece) gen_gvec_ld_modrm_vymm((env), (s), (modrm), (vece), tcg_gen_gvec_sssub, 0123)

WARNING: line over 80 characters
#82: FILE: target/i386/translate.c:3389:
+    case 0xe8 | M_0F:                  gen_psubs_mm(env, s, modrm, MO_8); return;

ERROR: trailing statements should be on next line
#82: FILE: target/i386/translate.c:3389:
+    case 0xe8 | M_0F:                  gen_psubs_mm(env, s, modrm, MO_8); return;

WARNING: line over 80 characters
#83: FILE: target/i386/translate.c:3390:
+    case 0xe8 | M_0F | P_66:           gen_psubs_xmm(env, s, modrm, MO_8); return;

ERROR: trailing statements should be on next line
#83: FILE: target/i386/translate.c:3390:
+    case 0xe8 | M_0F | P_66:           gen_psubs_xmm(env, s, modrm, MO_8); return;

WARNING: line over 80 characters
#84: FILE: target/i386/translate.c:3391:
+    case 0xe8 | M_0F | P_66 | VEX_128: gen_vpsubs_xmm(env, s, modrm, MO_8); return;

ERROR: trailing statements should be on next line
#84: FILE: target/i386/translate.c:3391:
+    case 0xe8 | M_0F | P_66 | VEX_128: gen_vpsubs_xmm(env, s, modrm, MO_8); return;

WARNING: line over 80 characters
#85: FILE: target/i386/translate.c:3392:
+    case 0xe8 | M_0F | P_66 | VEX_256: gen_vpsubs_ymm(env, s, modrm, MO_8); return;

ERROR: trailing statements should be on next line
#85: FILE: target/i386/translate.c:3392:
+    case 0xe8 | M_0F | P_66 | VEX_256: gen_vpsubs_ymm(env, s, modrm, MO_8); return;

WARNING: line over 80 characters
#87: FILE: target/i386/translate.c:3394:
+    case 0xe9 | M_0F:                  gen_psubs_mm(env, s, modrm, MO_16); return;

ERROR: trailing statements should be on next line
#87: FILE: target/i386/translate.c:3394:
+    case 0xe9 | M_0F:                  gen_psubs_mm(env, s, modrm, MO_16); return;

WARNING: line over 80 characters
#88: FILE: target/i386/translate.c:3395:
+    case 0xe9 | M_0F | P_66:           gen_psubs_xmm(env, s, modrm, MO_16); return;

ERROR: trailing statements should be on next line
#88: FILE: target/i386/translate.c:3395:
+    case 0xe9 | M_0F | P_66:           gen_psubs_xmm(env, s, modrm, MO_16); return;

WARNING: line over 80 characters
#89: FILE: target/i386/translate.c:3396:
+    case 0xe9 | M_0F | P_66 | VEX_128: gen_vpsubs_xmm(env, s, modrm, MO_16); return;

ERROR: trailing statements should be on next line
#89: FILE: target/i386/translate.c:3396:
+    case 0xe9 | M_0F | P_66 | VEX_128: gen_vpsubs_xmm(env, s, modrm, MO_16); return;

WARNING: line over 80 characters
#90: FILE: target/i386/translate.c:3397:
+    case 0xe9 | M_0F | P_66 | VEX_256: gen_vpsubs_ymm(env, s, modrm, MO_16); return;

ERROR: trailing statements should be on next line
#90: FILE: target/i386/translate.c:3397:
+    case 0xe9 | M_0F | P_66 | VEX_256: gen_vpsubs_ymm(env, s, modrm, MO_16); return;

total: 14 errors, 8 warnings, 65 lines checked

Patch 16/22 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

17/22 Checking commit c5a55d833d0a (target/i386: reimplement (V)PSUBUS(B, W))
ERROR: line over 90 characters
#70: FILE: target/i386/translate.c:3194:
+#define gen_psubus_mm(env, s, modrm, vece)   gen_gvec_ld_modrm_mm  ((env), (s), (modrm), (vece), tcg_gen_gvec_ussub, 0112)

ERROR: space prohibited between function name and open parenthesis '('
#70: FILE: target/i386/translate.c:3194:
+#define gen_psubus_mm(env, s, modrm, vece)   gen_gvec_ld_modrm_mm  ((env), (s), (modrm), (vece), tcg_gen_gvec_ussub, 0112)

ERROR: line over 90 characters
#71: FILE: target/i386/translate.c:3195:
+#define gen_psubus_xmm(env, s, modrm, vece)  gen_gvec_ld_modrm_xmm ((env), (s), (modrm), (vece), tcg_gen_gvec_ussub, 0112)

ERROR: space prohibited between function name and open parenthesis '('
#71: FILE: target/i386/translate.c:3195:
+#define gen_psubus_xmm(env, s, modrm, vece)  gen_gvec_ld_modrm_xmm ((env), (s), (modrm), (vece), tcg_gen_gvec_ussub, 0112)

ERROR: line over 90 characters
#72: FILE: target/i386/translate.c:3196:
+#define gen_vpsubus_xmm(env, s, modrm, vece) gen_gvec_ld_modrm_vxmm((env), (s), (modrm), (vece), tcg_gen_gvec_ussub, 0123)

ERROR: line over 90 characters
#73: FILE: target/i386/translate.c:3197:
+#define gen_vpsubus_ymm(env, s, modrm, vece) gen_gvec_ld_modrm_vymm((env), (s), (modrm), (vece), tcg_gen_gvec_ussub, 0123)

WARNING: line over 80 characters
#82: FILE: target/i386/translate.c:3394:
+    case 0xd8 | M_0F:                  gen_psubus_mm(env, s, modrm, MO_8); return;

ERROR: trailing statements should be on next line
#82: FILE: target/i386/translate.c:3394:
+    case 0xd8 | M_0F:                  gen_psubus_mm(env, s, modrm, MO_8); return;

WARNING: line over 80 characters
#83: FILE: target/i386/translate.c:3395:
+    case 0xd8 | M_0F | P_66:           gen_psubus_xmm(env, s, modrm, MO_8); return;

ERROR: trailing statements should be on next line
#83: FILE: target/i386/translate.c:3395:
+    case 0xd8 | M_0F | P_66:           gen_psubus_xmm(env, s, modrm, MO_8); return;

WARNING: line over 80 characters
#84: FILE: target/i386/translate.c:3396:
+    case 0xd8 | M_0F | P_66 | VEX_128: gen_vpsubus_xmm(env, s, modrm, MO_8); return;

ERROR: trailing statements should be on next line
#84: FILE: target/i386/translate.c:3396:
+    case 0xd8 | M_0F | P_66 | VEX_128: gen_vpsubus_xmm(env, s, modrm, MO_8); return;

WARNING: line over 80 characters
#85: FILE: target/i386/translate.c:3397:
+    case 0xd8 | M_0F | P_66 | VEX_256: gen_vpsubus_ymm(env, s, modrm, MO_8); return;

ERROR: trailing statements should be on next line
#85: FILE: target/i386/translate.c:3397:
+    case 0xd8 | M_0F | P_66 | VEX_256: gen_vpsubus_ymm(env, s, modrm, MO_8); return;

WARNING: line over 80 characters
#87: FILE: target/i386/translate.c:3399:
+    case 0xd9 | M_0F:                  gen_psubus_mm(env, s, modrm, MO_16); return;

ERROR: trailing statements should be on next line
#87: FILE: target/i386/translate.c:3399:
+    case 0xd9 | M_0F:                  gen_psubus_mm(env, s, modrm, MO_16); return;

WARNING: line over 80 characters
#88: FILE: target/i386/translate.c:3400:
+    case 0xd9 | M_0F | P_66:           gen_psubus_xmm(env, s, modrm, MO_16); return;

ERROR: trailing statements should be on next line
#88: FILE: target/i386/translate.c:3400:
+    case 0xd9 | M_0F | P_66:           gen_psubus_xmm(env, s, modrm, MO_16); return;

WARNING: line over 80 characters
#89: FILE: target/i386/translate.c:3401:
+    case 0xd9 | M_0F | P_66 | VEX_128: gen_vpsubus_xmm(env, s, modrm, MO_16); return;

ERROR: trailing statements should be on next line
#89: FILE: target/i386/translate.c:3401:
+    case 0xd9 | M_0F | P_66 | VEX_128: gen_vpsubus_xmm(env, s, modrm, MO_16); return;

WARNING: line over 80 characters
#90: FILE: target/i386/translate.c:3402:
+    case 0xd9 | M_0F | P_66 | VEX_256: gen_vpsubus_ymm(env, s, modrm, MO_16); return;

ERROR: trailing statements should be on next line
#90: FILE: target/i386/translate.c:3402:
+    case 0xd9 | M_0F | P_66 | VEX_256: gen_vpsubus_ymm(env, s, modrm, MO_16); return;

total: 14 errors, 8 warnings, 65 lines checked

Patch 17/22 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

18/22 Checking commit 0a076891c192 (target/i386: reimplement (V)PMINSW)
ERROR: line over 90 characters
#61: FILE: target/i386/translate.c:3199:
+#define gen_pmins_mm(env, s, modrm, vece)   gen_gvec_ld_modrm_mm  ((env), (s), (modrm), (vece), tcg_gen_gvec_smin, 0112)

ERROR: space prohibited between function name and open parenthesis '('
#61: FILE: target/i386/translate.c:3199:
+#define gen_pmins_mm(env, s, modrm, vece)   gen_gvec_ld_modrm_mm  ((env), (s), (modrm), (vece), tcg_gen_gvec_smin, 0112)

ERROR: line over 90 characters
#62: FILE: target/i386/translate.c:3200:
+#define gen_pmins_xmm(env, s, modrm, vece)  gen_gvec_ld_modrm_xmm ((env), (s), (modrm), (vece), tcg_gen_gvec_smin, 0112)

ERROR: space prohibited between function name and open parenthesis '('
#62: FILE: target/i386/translate.c:3200:
+#define gen_pmins_xmm(env, s, modrm, vece)  gen_gvec_ld_modrm_xmm ((env), (s), (modrm), (vece), tcg_gen_gvec_smin, 0112)

ERROR: line over 90 characters
#63: FILE: target/i386/translate.c:3201:
+#define gen_vpmins_xmm(env, s, modrm, vece) gen_gvec_ld_modrm_vxmm((env), (s), (modrm), (vece), tcg_gen_gvec_smin, 0123)

ERROR: line over 90 characters
#64: FILE: target/i386/translate.c:3202:
+#define gen_vpmins_ymm(env, s, modrm, vece) gen_gvec_ld_modrm_vymm((env), (s), (modrm), (vece), tcg_gen_gvec_smin, 0123)

WARNING: line over 80 characters
#73: FILE: target/i386/translate.c:3419:
+    case 0xea | M_0F:                  gen_pmins_mm(env, s, modrm, MO_16); return;

ERROR: trailing statements should be on next line
#73: FILE: target/i386/translate.c:3419:
+    case 0xea | M_0F:                  gen_pmins_mm(env, s, modrm, MO_16); return;

WARNING: line over 80 characters
#74: FILE: target/i386/translate.c:3420:
+    case 0xea | M_0F | P_66:           gen_pmins_xmm(env, s, modrm, MO_16); return;

ERROR: trailing statements should be on next line
#74: FILE: target/i386/translate.c:3420:
+    case 0xea | M_0F | P_66:           gen_pmins_xmm(env, s, modrm, MO_16); return;

WARNING: line over 80 characters
#75: FILE: target/i386/translate.c:3421:
+    case 0xea | M_0F | P_66 | VEX_128: gen_vpmins_xmm(env, s, modrm, MO_16); return;

ERROR: trailing statements should be on next line
#75: FILE: target/i386/translate.c:3421:
+    case 0xea | M_0F | P_66 | VEX_128: gen_vpmins_xmm(env, s, modrm, MO_16); return;

WARNING: line over 80 characters
#76: FILE: target/i386/translate.c:3422:
+    case 0xea | M_0F | P_66 | VEX_256: gen_vpmins_ymm(env, s, modrm, MO_16); return;

ERROR: trailing statements should be on next line
#76: FILE: target/i386/translate.c:3422:
+    case 0xea | M_0F | P_66 | VEX_256: gen_vpmins_ymm(env, s, modrm, MO_16); return;

total: 10 errors, 4 warnings, 51 lines checked

Patch 18/22 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

19/22 Checking commit 001aaddea809 (target/i386: reimplement (V)PMINUB)
ERROR: line over 90 characters
#61: FILE: target/i386/translate.c:3204:
+#define gen_pminu_mm(env, s, modrm, vece)   gen_gvec_ld_modrm_mm  ((env), (s), (modrm), (vece), tcg_gen_gvec_umin, 0112)

ERROR: space prohibited between function name and open parenthesis '('
#61: FILE: target/i386/translate.c:3204:
+#define gen_pminu_mm(env, s, modrm, vece)   gen_gvec_ld_modrm_mm  ((env), (s), (modrm), (vece), tcg_gen_gvec_umin, 0112)

ERROR: line over 90 characters
#62: FILE: target/i386/translate.c:3205:
+#define gen_pminu_xmm(env, s, modrm, vece)  gen_gvec_ld_modrm_xmm ((env), (s), (modrm), (vece), tcg_gen_gvec_umin, 0112)

ERROR: space prohibited between function name and open parenthesis '('
#62: FILE: target/i386/translate.c:3205:
+#define gen_pminu_xmm(env, s, modrm, vece)  gen_gvec_ld_modrm_xmm ((env), (s), (modrm), (vece), tcg_gen_gvec_umin, 0112)

ERROR: line over 90 characters
#63: FILE: target/i386/translate.c:3206:
+#define gen_vpminu_xmm(env, s, modrm, vece) gen_gvec_ld_modrm_vxmm((env), (s), (modrm), (vece), tcg_gen_gvec_umin, 0123)

ERROR: line over 90 characters
#64: FILE: target/i386/translate.c:3207:
+#define gen_vpminu_ymm(env, s, modrm, vece) gen_gvec_ld_modrm_vymm((env), (s), (modrm), (vece), tcg_gen_gvec_umin, 0123)

WARNING: line over 80 characters
#73: FILE: target/i386/translate.c:3424:
+    case 0xda | M_0F:                  gen_pminu_mm(env, s, modrm, MO_8); return;

ERROR: trailing statements should be on next line
#73: FILE: target/i386/translate.c:3424:
+    case 0xda | M_0F:                  gen_pminu_mm(env, s, modrm, MO_8); return;

WARNING: line over 80 characters
#74: FILE: target/i386/translate.c:3425:
+    case 0xda | M_0F | P_66:           gen_pminu_xmm(env, s, modrm, MO_8); return;

ERROR: trailing statements should be on next line
#74: FILE: target/i386/translate.c:3425:
+    case 0xda | M_0F | P_66:           gen_pminu_xmm(env, s, modrm, MO_8); return;

WARNING: line over 80 characters
#75: FILE: target/i386/translate.c:3426:
+    case 0xda | M_0F | P_66 | VEX_128: gen_vpminu_xmm(env, s, modrm, MO_8); return;

ERROR: trailing statements should be on next line
#75: FILE: target/i386/translate.c:3426:
+    case 0xda | M_0F | P_66 | VEX_128: gen_vpminu_xmm(env, s, modrm, MO_8); return;

WARNING: line over 80 characters
#76: FILE: target/i386/translate.c:3427:
+    case 0xda | M_0F | P_66 | VEX_256: gen_vpminu_ymm(env, s, modrm, MO_8); return;

ERROR: trailing statements should be on next line
#76: FILE: target/i386/translate.c:3427:
+    case 0xda | M_0F | P_66 | VEX_256: gen_vpminu_ymm(env, s, modrm, MO_8); return;

total: 10 errors, 4 warnings, 51 lines checked

Patch 19/22 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

20/22 Checking commit 60ea5a8ab8d6 (target/i386: reimplement (V)PMAXSW)
ERROR: line over 90 characters
#63: FILE: target/i386/translate.c:3209:
+#define gen_pmaxs_mm(env, s, modrm, vece)   gen_gvec_ld_modrm_mm  ((env), (s), (modrm), (vece), tcg_gen_gvec_smax, 0112)

ERROR: space prohibited between function name and open parenthesis '('
#63: FILE: target/i386/translate.c:3209:
+#define gen_pmaxs_mm(env, s, modrm, vece)   gen_gvec_ld_modrm_mm  ((env), (s), (modrm), (vece), tcg_gen_gvec_smax, 0112)

ERROR: line over 90 characters
#64: FILE: target/i386/translate.c:3210:
+#define gen_pmaxs_xmm(env, s, modrm, vece)  gen_gvec_ld_modrm_xmm ((env), (s), (modrm), (vece), tcg_gen_gvec_smax, 0112)

ERROR: space prohibited between function name and open parenthesis '('
#64: FILE: target/i386/translate.c:3210:
+#define gen_pmaxs_xmm(env, s, modrm, vece)  gen_gvec_ld_modrm_xmm ((env), (s), (modrm), (vece), tcg_gen_gvec_smax, 0112)

ERROR: line over 90 characters
#65: FILE: target/i386/translate.c:3211:
+#define gen_vpmaxs_xmm(env, s, modrm, vece) gen_gvec_ld_modrm_vxmm((env), (s), (modrm), (vece), tcg_gen_gvec_smax, 0123)

ERROR: line over 90 characters
#66: FILE: target/i386/translate.c:3212:
+#define gen_vpmaxs_ymm(env, s, modrm, vece) gen_gvec_ld_modrm_vymm((env), (s), (modrm), (vece), tcg_gen_gvec_smax, 0123)

WARNING: line over 80 characters
#75: FILE: target/i386/translate.c:3439:
+    case 0xee | M_0F:                  gen_pmaxs_mm(env, s, modrm, MO_16); return;

ERROR: trailing statements should be on next line
#75: FILE: target/i386/translate.c:3439:
+    case 0xee | M_0F:                  gen_pmaxs_mm(env, s, modrm, MO_16); return;

WARNING: line over 80 characters
#76: FILE: target/i386/translate.c:3440:
+    case 0xee | M_0F | P_66:           gen_pmaxs_xmm(env, s, modrm, MO_16); return;

ERROR: trailing statements should be on next line
#76: FILE: target/i386/translate.c:3440:
+    case 0xee | M_0F | P_66:           gen_pmaxs_xmm(env, s, modrm, MO_16); return;

WARNING: line over 80 characters
#77: FILE: target/i386/translate.c:3441:
+    case 0xee | M_0F | P_66 | VEX_128: gen_vpmaxs_xmm(env, s, modrm, MO_16); return;

ERROR: trailing statements should be on next line
#77: FILE: target/i386/translate.c:3441:
+    case 0xee | M_0F | P_66 | VEX_128: gen_vpmaxs_xmm(env, s, modrm, MO_16); return;

WARNING: line over 80 characters
#78: FILE: target/i386/translate.c:3442:
+    case 0xee | M_0F | P_66 | VEX_256: gen_vpmaxs_ymm(env, s, modrm, MO_16); return;

ERROR: trailing statements should be on next line
#78: FILE: target/i386/translate.c:3442:
+    case 0xee | M_0F | P_66 | VEX_256: gen_vpmaxs_ymm(env, s, modrm, MO_16); return;

total: 10 errors, 4 warnings, 53 lines checked

Patch 20/22 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

21/22 Checking commit afe83e14031c (target/i386: reimplement (V)PMAXUB)
ERROR: line over 90 characters
#64: FILE: target/i386/translate.c:3214:
+#define gen_pmaxu_mm(env, s, modrm, vece)   gen_gvec_ld_modrm_mm  ((env), (s), (modrm), (vece), tcg_gen_gvec_umax, 0112)

ERROR: space prohibited between function name and open parenthesis '('
#64: FILE: target/i386/translate.c:3214:
+#define gen_pmaxu_mm(env, s, modrm, vece)   gen_gvec_ld_modrm_mm  ((env), (s), (modrm), (vece), tcg_gen_gvec_umax, 0112)

ERROR: line over 90 characters
#65: FILE: target/i386/translate.c:3215:
+#define gen_pmaxu_xmm(env, s, modrm, vece)  gen_gvec_ld_modrm_xmm ((env), (s), (modrm), (vece), tcg_gen_gvec_umax, 0112)

ERROR: space prohibited between function name and open parenthesis '('
#65: FILE: target/i386/translate.c:3215:
+#define gen_pmaxu_xmm(env, s, modrm, vece)  gen_gvec_ld_modrm_xmm ((env), (s), (modrm), (vece), tcg_gen_gvec_umax, 0112)

ERROR: line over 90 characters
#66: FILE: target/i386/translate.c:3216:
+#define gen_vpmaxu_xmm(env, s, modrm, vece) gen_gvec_ld_modrm_vxmm((env), (s), (modrm), (vece), tcg_gen_gvec_umax, 0123)

ERROR: line over 90 characters
#67: FILE: target/i386/translate.c:3217:
+#define gen_vpmaxu_ymm(env, s, modrm, vece) gen_gvec_ld_modrm_vymm((env), (s), (modrm), (vece), tcg_gen_gvec_umax, 0123)

WARNING: line over 80 characters
#76: FILE: target/i386/translate.c:3444:
+    case 0xde | M_0F:                  gen_pmaxu_mm(env, s, modrm, MO_8); return;

ERROR: trailing statements should be on next line
#76: FILE: target/i386/translate.c:3444:
+    case 0xde | M_0F:                  gen_pmaxu_mm(env, s, modrm, MO_8); return;

WARNING: line over 80 characters
#77: FILE: target/i386/translate.c:3445:
+    case 0xde | M_0F | P_66:           gen_pmaxu_xmm(env, s, modrm, MO_8); return;

ERROR: trailing statements should be on next line
#77: FILE: target/i386/translate.c:3445:
+    case 0xde | M_0F | P_66:           gen_pmaxu_xmm(env, s, modrm, MO_8); return;

WARNING: line over 80 characters
#78: FILE: target/i386/translate.c:3446:
+    case 0xde | M_0F | P_66 | VEX_128: gen_vpmaxu_xmm(env, s, modrm, MO_8); return;

ERROR: trailing statements should be on next line
#78: FILE: target/i386/translate.c:3446:
+    case 0xde | M_0F | P_66 | VEX_128: gen_vpmaxu_xmm(env, s, modrm, MO_8); return;

WARNING: line over 80 characters
#79: FILE: target/i386/translate.c:3447:
+    case 0xde | M_0F | P_66 | VEX_256: gen_vpmaxu_ymm(env, s, modrm, MO_8); return;

ERROR: trailing statements should be on next line
#79: FILE: target/i386/translate.c:3447:
+    case 0xde | M_0F | P_66 | VEX_256: gen_vpmaxu_ymm(env, s, modrm, MO_8); return;

total: 10 errors, 4 warnings, 54 lines checked

Patch 21/22 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

22/22 Checking commit 9c320f03f9b4 (target/i386: reimplement (V)P(EQ, CMP)(B, W, D))
ERROR: line over 90 characters
#103: FILE: target/i386/translate.c:3226:
+#define gen_pcmpeq_mm(env, s, modrm, vece)   gen_gvec_ld_modrm_mm  ((env), (s), (modrm), (vece), gen_gvec_cmpeq, 0112)

ERROR: space prohibited between function name and open parenthesis '('
#103: FILE: target/i386/translate.c:3226:
+#define gen_pcmpeq_mm(env, s, modrm, vece)   gen_gvec_ld_modrm_mm  ((env), (s), (modrm), (vece), gen_gvec_cmpeq, 0112)

ERROR: line over 90 characters
#104: FILE: target/i386/translate.c:3227:
+#define gen_pcmpeq_xmm(env, s, modrm, vece)  gen_gvec_ld_modrm_xmm ((env), (s), (modrm), (vece), gen_gvec_cmpeq, 0112)

ERROR: space prohibited between function name and open parenthesis '('
#104: FILE: target/i386/translate.c:3227:
+#define gen_pcmpeq_xmm(env, s, modrm, vece)  gen_gvec_ld_modrm_xmm ((env), (s), (modrm), (vece), gen_gvec_cmpeq, 0112)

ERROR: line over 90 characters
#105: FILE: target/i386/translate.c:3228:
+#define gen_vpcmpeq_xmm(env, s, modrm, vece) gen_gvec_ld_modrm_vxmm((env), (s), (modrm), (vece), gen_gvec_cmpeq, 0123)

ERROR: line over 90 characters
#106: FILE: target/i386/translate.c:3229:
+#define gen_vpcmpeq_ymm(env, s, modrm, vece) gen_gvec_ld_modrm_vymm((env), (s), (modrm), (vece), gen_gvec_cmpeq, 0123)

ERROR: line over 90 characters
#115: FILE: target/i386/translate.c:3238:
+#define gen_pcmpgt_mm(env, s, modrm, vece)   gen_gvec_ld_modrm_mm  ((env), (s), (modrm), (vece), gen_gvec_cmpgt, 0112)

ERROR: space prohibited between function name and open parenthesis '('
#115: FILE: target/i386/translate.c:3238:
+#define gen_pcmpgt_mm(env, s, modrm, vece)   gen_gvec_ld_modrm_mm  ((env), (s), (modrm), (vece), gen_gvec_cmpgt, 0112)

ERROR: line over 90 characters
#116: FILE: target/i386/translate.c:3239:
+#define gen_pcmpgt_xmm(env, s, modrm, vece)  gen_gvec_ld_modrm_xmm ((env), (s), (modrm), (vece), gen_gvec_cmpgt, 0112)

ERROR: space prohibited between function name and open parenthesis '('
#116: FILE: target/i386/translate.c:3239:
+#define gen_pcmpgt_xmm(env, s, modrm, vece)  gen_gvec_ld_modrm_xmm ((env), (s), (modrm), (vece), gen_gvec_cmpgt, 0112)

ERROR: line over 90 characters
#117: FILE: target/i386/translate.c:3240:
+#define gen_vpcmpgt_xmm(env, s, modrm, vece) gen_gvec_ld_modrm_vxmm((env), (s), (modrm), (vece), gen_gvec_cmpgt, 0123)

ERROR: line over 90 characters
#118: FILE: target/i386/translate.c:3241:
+#define gen_vpcmpgt_ymm(env, s, modrm, vece) gen_gvec_ld_modrm_vymm((env), (s), (modrm), (vece), gen_gvec_cmpgt, 0123)

WARNING: line over 80 characters
#127: FILE: target/i386/translate.c:3478:
+    case 0x64 | M_0F:                  gen_pcmpgt_mm(env, s, modrm, MO_8); return;

ERROR: trailing statements should be on next line
#127: FILE: target/i386/translate.c:3478:
+    case 0x64 | M_0F:                  gen_pcmpgt_mm(env, s, modrm, MO_8); return;

WARNING: line over 80 characters
#128: FILE: target/i386/translate.c:3479:
+    case 0x64 | M_0F | P_66:           gen_pcmpgt_xmm(env, s, modrm, MO_8); return;

ERROR: trailing statements should be on next line
#128: FILE: target/i386/translate.c:3479:
+    case 0x64 | M_0F | P_66:           gen_pcmpgt_xmm(env, s, modrm, MO_8); return;

WARNING: line over 80 characters
#129: FILE: target/i386/translate.c:3480:
+    case 0x64 | M_0F | P_66 | VEX_128: gen_vpcmpgt_xmm(env, s, modrm, MO_8); return;

ERROR: trailing statements should be on next line
#129: FILE: target/i386/translate.c:3480:
+    case 0x64 | M_0F | P_66 | VEX_128: gen_vpcmpgt_xmm(env, s, modrm, MO_8); return;

WARNING: line over 80 characters
#130: FILE: target/i386/translate.c:3481:
+    case 0x64 | M_0F | P_66 | VEX_256: gen_vpcmpgt_ymm(env, s, modrm, MO_8); return;

ERROR: trailing statements should be on next line
#130: FILE: target/i386/translate.c:3481:
+    case 0x64 | M_0F | P_66 | VEX_256: gen_vpcmpgt_ymm(env, s, modrm, MO_8); return;

WARNING: line over 80 characters
#132: FILE: target/i386/translate.c:3483:
+    case 0x65 | M_0F:                  gen_pcmpgt_mm(env, s, modrm, MO_16); return;

ERROR: trailing statements should be on next line
#132: FILE: target/i386/translate.c:3483:
+    case 0x65 | M_0F:                  gen_pcmpgt_mm(env, s, modrm, MO_16); return;

WARNING: line over 80 characters
#133: FILE: target/i386/translate.c:3484:
+    case 0x65 | M_0F | P_66:           gen_pcmpgt_xmm(env, s, modrm, MO_16); return;

ERROR: trailing statements should be on next line
#133: FILE: target/i386/translate.c:3484:
+    case 0x65 | M_0F | P_66:           gen_pcmpgt_xmm(env, s, modrm, MO_16); return;

WARNING: line over 80 characters
#134: FILE: target/i386/translate.c:3485:
+    case 0x65 | M_0F | P_66 | VEX_128: gen_vpcmpgt_xmm(env, s, modrm, MO_16); return;

ERROR: trailing statements should be on next line
#134: FILE: target/i386/translate.c:3485:
+    case 0x65 | M_0F | P_66 | VEX_128: gen_vpcmpgt_xmm(env, s, modrm, MO_16); return;

WARNING: line over 80 characters
#135: FILE: target/i386/translate.c:3486:
+    case 0x65 | M_0F | P_66 | VEX_256: gen_vpcmpgt_ymm(env, s, modrm, MO_16); return;

ERROR: trailing statements should be on next line
#135: FILE: target/i386/translate.c:3486:
+    case 0x65 | M_0F | P_66 | VEX_256: gen_vpcmpgt_ymm(env, s, modrm, MO_16); return;

WARNING: line over 80 characters
#137: FILE: target/i386/translate.c:3488:
+    case 0x66 | M_0F:                  gen_pcmpgt_mm(env, s, modrm, MO_32); return;

ERROR: trailing statements should be on next line
#137: FILE: target/i386/translate.c:3488:
+    case 0x66 | M_0F:                  gen_pcmpgt_mm(env, s, modrm, MO_32); return;

WARNING: line over 80 characters
#138: FILE: target/i386/translate.c:3489:
+    case 0x66 | M_0F | P_66:           gen_pcmpgt_xmm(env, s, modrm, MO_32); return;

ERROR: trailing statements should be on next line
#138: FILE: target/i386/translate.c:3489:
+    case 0x66 | M_0F | P_66:           gen_pcmpgt_xmm(env, s, modrm, MO_32); return;

WARNING: line over 80 characters
#139: FILE: target/i386/translate.c:3490:
+    case 0x66 | M_0F | P_66 | VEX_128: gen_vpcmpgt_xmm(env, s, modrm, MO_32); return;

ERROR: trailing statements should be on next line
#139: FILE: target/i386/translate.c:3490:
+    case 0x66 | M_0F | P_66 | VEX_128: gen_vpcmpgt_xmm(env, s, modrm, MO_32); return;

WARNING: line over 80 characters
#140: FILE: target/i386/translate.c:3491:
+    case 0x66 | M_0F | P_66 | VEX_256: gen_vpcmpgt_ymm(env, s, modrm, MO_32); return;

ERROR: trailing statements should be on next line
#140: FILE: target/i386/translate.c:3491:
+    case 0x66 | M_0F | P_66 | VEX_256: gen_vpcmpgt_ymm(env, s, modrm, MO_32); return;

WARNING: line over 80 characters
#142: FILE: target/i386/translate.c:3493:
+    case 0x74 | M_0F:                  gen_pcmpeq_mm(env, s, modrm, MO_8); return;

ERROR: trailing statements should be on next line
#142: FILE: target/i386/translate.c:3493:
+    case 0x74 | M_0F:                  gen_pcmpeq_mm(env, s, modrm, MO_8); return;

WARNING: line over 80 characters
#143: FILE: target/i386/translate.c:3494:
+    case 0x74 | M_0F | P_66:           gen_pcmpeq_xmm(env, s, modrm, MO_8); return;

ERROR: trailing statements should be on next line
#143: FILE: target/i386/translate.c:3494:
+    case 0x74 | M_0F | P_66:           gen_pcmpeq_xmm(env, s, modrm, MO_8); return;

WARNING: line over 80 characters
#144: FILE: target/i386/translate.c:3495:
+    case 0x74 | M_0F | P_66 | VEX_128: gen_vpcmpeq_xmm(env, s, modrm, MO_8); return;

ERROR: trailing statements should be on next line
#144: FILE: target/i386/translate.c:3495:
+    case 0x74 | M_0F | P_66 | VEX_128: gen_vpcmpeq_xmm(env, s, modrm, MO_8); return;

WARNING: line over 80 characters
#145: FILE: target/i386/translate.c:3496:
+    case 0x74 | M_0F | P_66 | VEX_256: gen_vpcmpeq_ymm(env, s, modrm, MO_8); return;

ERROR: trailing statements should be on next line
#145: FILE: target/i386/translate.c:3496:
+    case 0x74 | M_0F | P_66 | VEX_256: gen_vpcmpeq_ymm(env, s, modrm, MO_8); return;

WARNING: line over 80 characters
#147: FILE: target/i386/translate.c:3498:
+    case 0x75 | M_0F:                  gen_pcmpeq_mm(env, s, modrm, MO_16); return;

ERROR: trailing statements should be on next line
#147: FILE: target/i386/translate.c:3498:
+    case 0x75 | M_0F:                  gen_pcmpeq_mm(env, s, modrm, MO_16); return;

WARNING: line over 80 characters
#148: FILE: target/i386/translate.c:3499:
+    case 0x75 | M_0F | P_66:           gen_pcmpeq_xmm(env, s, modrm, MO_16); return;

ERROR: trailing statements should be on next line
#148: FILE: target/i386/translate.c:3499:
+    case 0x75 | M_0F | P_66:           gen_pcmpeq_xmm(env, s, modrm, MO_16); return;

WARNING: line over 80 characters
#149: FILE: target/i386/translate.c:3500:
+    case 0x75 | M_0F | P_66 | VEX_128: gen_vpcmpeq_xmm(env, s, modrm, MO_16); return;

ERROR: trailing statements should be on next line
#149: FILE: target/i386/translate.c:3500:
+    case 0x75 | M_0F | P_66 | VEX_128: gen_vpcmpeq_xmm(env, s, modrm, MO_16); return;

WARNING: line over 80 characters
#150: FILE: target/i386/translate.c:3501:
+    case 0x75 | M_0F | P_66 | VEX_256: gen_vpcmpeq_ymm(env, s, modrm, MO_16); return;

ERROR: trailing statements should be on next line
#150: FILE: target/i386/translate.c:3501:
+    case 0x75 | M_0F | P_66 | VEX_256: gen_vpcmpeq_ymm(env, s, modrm, MO_16); return;

WARNING: line over 80 characters
#152: FILE: target/i386/translate.c:3503:
+    case 0x76 | M_0F:                  gen_pcmpeq_mm(env, s, modrm, MO_32); return;

ERROR: trailing statements should be on next line
#152: FILE: target/i386/translate.c:3503:
+    case 0x76 | M_0F:                  gen_pcmpeq_mm(env, s, modrm, MO_32); return;

WARNING: line over 80 characters
#153: FILE: target/i386/translate.c:3504:
+    case 0x76 | M_0F | P_66:           gen_pcmpeq_xmm(env, s, modrm, MO_32); return;

ERROR: trailing statements should be on next line
#153: FILE: target/i386/translate.c:3504:
+    case 0x76 | M_0F | P_66:           gen_pcmpeq_xmm(env, s, modrm, MO_32); return;

WARNING: line over 80 characters
#154: FILE: target/i386/translate.c:3505:
+    case 0x76 | M_0F | P_66 | VEX_128: gen_vpcmpeq_xmm(env, s, modrm, MO_32); return;

ERROR: trailing statements should be on next line
#154: FILE: target/i386/translate.c:3505:
+    case 0x76 | M_0F | P_66 | VEX_128: gen_vpcmpeq_xmm(env, s, modrm, MO_32); return;

WARNING: line over 80 characters
#155: FILE: target/i386/translate.c:3506:
+    case 0x76 | M_0F | P_66 | VEX_256: gen_vpcmpeq_ymm(env, s, modrm, MO_32); return;

ERROR: trailing statements should be on next line
#155: FILE: target/i386/translate.c:3506:
+    case 0x76 | M_0F | P_66 | VEX_256: gen_vpcmpeq_ymm(env, s, modrm, MO_32); return;

total: 36 errors, 24 warnings, 129 lines checked

Patch 22/22 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

=== OUTPUT END ===

Test command exited with code: 1


The full log is available at
http://patchew.org/logs/20190731175702.4916-1-jan.bobek@gmail.com/testing.checkpatch/?type=message.
---
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Please send your feedback to patchew-devel@redhat.com

Re: [Qemu-devel] [RFC PATCH v1 00/22] reimplement (some) x86 vector instructions using tcg-gvec

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Patchew URL: https://patchew.org/QEMU/20190731175702.4916-1-jan.bobek@gmail.com/



Hi,

This series failed the asan build test. Please find the testing commands and
their output below. If you have Docker installed, you can probably reproduce it
locally.

=== TEST SCRIPT BEGIN ===
#!/bin/bash
make docker-image-fedora V=1 NETWORK=1
time make docker-test-debug@fedora TARGET_LIST=x86_64-softmmu J=14 NETWORK=1
=== TEST SCRIPT END ===

PASS 1 fdc-test /x86_64/fdc/cmos
PASS 2 fdc-test /x86_64/fdc/no_media_on_start
PASS 3 fdc-test /x86_64/fdc/read_without_media
==8328==WARNING: ASan doesn't fully support makecontext/swapcontext functions and may produce false positives in some cases!
PASS 15 test-opts-visitor /visitor/opts/i64/range/max/neg/b
PASS 16 test-opts-visitor /visitor/opts/i64/range/2big/pos
PASS 17 test-opts-visitor /visitor/opts/i64/range/2big/neg
---
PASS 8 fdc-test /x86_64/fdc/verify
PASS 9 fdc-test /x86_64/fdc/media_insert
MALLOC_PERTURB_=${MALLOC_PERTURB_:-$(( ${RANDOM:-0} % 255 + 1))}  tests/test-coroutine -m=quick -k --tap < /dev/null | ./scripts/tap-driver.pl --test-name="test-coroutine" 
==8347==WARNING: ASan doesn't fully support makecontext/swapcontext functions and may produce false positives in some cases!
==8347==WARNING: ASan is ignoring requested __asan_handle_no_return: stack top: 0x7ffe93c79000; bottom 0x7fd99e0f8000; size: 0x0024f5b81000 (158741303296)
False positive error reports may follow
For details see https://github.com/google/sanitizers/issues/189
PASS 10 fdc-test /x86_64/fdc/read_no_dma_1
---
PASS 11 test-aio /aio/event/wait
PASS 12 test-aio /aio/event/flush
PASS 13 test-aio /aio/event/wait/no-flush-cb
==8366==WARNING: ASan doesn't fully support makecontext/swapcontext functions and may produce false positives in some cases!
PASS 14 test-aio /aio/timer/schedule
PASS 15 test-aio /aio/coroutine/queue-chaining
PASS 16 test-aio /aio-gsource/flush
---
PASS 28 test-aio /aio-gsource/timer/schedule
MALLOC_PERTURB_=${MALLOC_PERTURB_:-$(( ${RANDOM:-0} % 255 + 1))}  tests/test-aio-multithread -m=quick -k --tap < /dev/null | ./scripts/tap-driver.pl --test-name="test-aio-multithread" 
PASS 1 test-aio-multithread /aio/multi/lifecycle
==8372==WARNING: ASan doesn't fully support makecontext/swapcontext functions and may produce false positives in some cases!
PASS 2 test-aio-multithread /aio/multi/schedule
PASS 3 test-aio-multithread /aio/multi/mutex/contended
PASS 12 fdc-test /x86_64/fdc/read_no_dma_19
PASS 13 fdc-test /x86_64/fdc/fuzz-registers
MALLOC_PERTURB_=${MALLOC_PERTURB_:-$(( ${RANDOM:-0} % 255 + 1))}  QTEST_QEMU_BINARY=x86_64-softmmu/qemu-system-x86_64 QTEST_QEMU_IMG=qemu-img tests/ide-test -m=quick -k --tap < /dev/null | ./scripts/tap-driver.pl --test-name="ide-test" 
==8400==WARNING: ASan doesn't fully support makecontext/swapcontext functions and may produce false positives in some cases!
PASS 1 ide-test /x86_64/ide/identify
PASS 4 test-aio-multithread /aio/multi/mutex/handoff
==8406==WARNING: ASan doesn't fully support makecontext/swapcontext functions and may produce false positives in some cases!
PASS 2 ide-test /x86_64/ide/flush
==8418==WARNING: ASan doesn't fully support makecontext/swapcontext functions and may produce false positives in some cases!
PASS 5 test-aio-multithread /aio/multi/mutex/mcs
PASS 3 ide-test /x86_64/ide/bmdma/simple_rw
PASS 6 test-aio-multithread /aio/multi/mutex/pthread
==8429==WARNING: ASan doesn't fully support makecontext/swapcontext functions and may produce false positives in some cases!
MALLOC_PERTURB_=${MALLOC_PERTURB_:-$(( ${RANDOM:-0} % 255 + 1))}  tests/test-throttle -m=quick -k --tap < /dev/null | ./scripts/tap-driver.pl --test-name="test-throttle" 
==8437==WARNING: ASan doesn't fully support makecontext/swapcontext functions and may produce false positives in some cases!
PASS 4 ide-test /x86_64/ide/bmdma/trim
PASS 1 test-throttle /throttle/leak_bucket
PASS 2 test-throttle /throttle/compute_wait
---
PASS 15 test-throttle /throttle/config/iops_size
MALLOC_PERTURB_=${MALLOC_PERTURB_:-$(( ${RANDOM:-0} % 255 + 1))}  tests/test-thread-pool -m=quick -k --tap < /dev/null | ./scripts/tap-driver.pl --test-name="test-thread-pool" 
PASS 1 test-thread-pool /thread-pool/submit
==8443==WARNING: ASan doesn't fully support makecontext/swapcontext functions and may produce false positives in some cases!
PASS 2 test-thread-pool /thread-pool/submit-aio
PASS 3 test-thread-pool /thread-pool/submit-co
PASS 4 test-thread-pool /thread-pool/submit-many
==8441==WARNING: ASan doesn't fully support makecontext/swapcontext functions and may produce false positives in some cases!
PASS 5 ide-test /x86_64/ide/bmdma/short_prdt
==8452==WARNING: ASan doesn't fully support makecontext/swapcontext functions and may produce false positives in some cases!
PASS 6 ide-test /x86_64/ide/bmdma/one_sector_short_prdt
PASS 5 test-thread-pool /thread-pool/cancel
==8458==WARNING: ASan doesn't fully support makecontext/swapcontext functions and may produce false positives in some cases!
PASS 7 ide-test /x86_64/ide/bmdma/long_prdt
==8464==WARNING: ASan doesn't fully support makecontext/swapcontext functions and may produce false positives in some cases!
==8464==WARNING: ASan is ignoring requested __asan_handle_no_return: stack top: 0x7ffe524e5000; bottom 0x7f3cc77fe000; size: 0x00c18ace7000 (831257473024)
False positive error reports may follow
For details see https://github.com/google/sanitizers/issues/189
PASS 8 ide-test /x86_64/ide/bmdma/no_busmaster
---
PASS 4 test-hbitmap /hbitmap/iter/empty
PASS 9 ide-test /x86_64/ide/flush/nodev
PASS 5 test-hbitmap /hbitmap/iter/partial
==8480==WARNING: ASan doesn't fully support makecontext/swapcontext functions and may produce false positives in some cases!
PASS 6 test-hbitmap /hbitmap/iter/granularity
PASS 7 test-hbitmap /hbitmap/iter/iter_and_reset
PASS 8 test-hbitmap /hbitmap/get/all
---
PASS 12 test-hbitmap /hbitmap/set/two-elem
PASS 13 test-hbitmap /hbitmap/set/general
PASS 14 test-hbitmap /hbitmap/set/twice
==8485==WARNING: ASan doesn't fully support makecontext/swapcontext functions and may produce false positives in some cases!
PASS 15 test-hbitmap /hbitmap/set/overlap
PASS 16 test-hbitmap /hbitmap/reset/empty
PASS 17 test-hbitmap /hbitmap/reset/general
---
PASS 28 test-hbitmap /hbitmap/truncate/shrink/medium
PASS 29 test-hbitmap /hbitmap/truncate/shrink/large
PASS 30 test-hbitmap /hbitmap/meta/zero
==8491==WARNING: ASan doesn't fully support makecontext/swapcontext functions and may produce false positives in some cases!
PASS 12 ide-test /x86_64/ide/flush/retry_isa
==8497==WARNING: ASan doesn't fully support makecontext/swapcontext functions and may produce false positives in some cases!
PASS 13 ide-test /x86_64/ide/cdrom/pio
==8503==WARNING: ASan doesn't fully support makecontext/swapcontext functions and may produce false positives in some cases!
PASS 31 test-hbitmap /hbitmap/meta/one
PASS 32 test-hbitmap /hbitmap/meta/byte
PASS 33 test-hbitmap /hbitmap/meta/word
PASS 14 ide-test /x86_64/ide/cdrom/pio_large
==8509==WARNING: ASan doesn't fully support makecontext/swapcontext functions and may produce false positives in some cases!
PASS 34 test-hbitmap /hbitmap/meta/sector
PASS 35 test-hbitmap /hbitmap/serialize/align
PASS 15 ide-test /x86_64/ide/cdrom/dma
---
PASS 42 test-hbitmap /hbitmap/next_dirty_area/next_dirty_area_1
PASS 43 test-hbitmap /hbitmap/next_dirty_area/next_dirty_area_4
MALLOC_PERTURB_=${MALLOC_PERTURB_:-$(( ${RANDOM:-0} % 255 + 1))}  tests/test-bdrv-drain -m=quick -k --tap < /dev/null | ./scripts/tap-driver.pl --test-name="test-bdrv-drain" 
==8523==WARNING: ASan doesn't fully support makecontext/swapcontext functions and may produce false positives in some cases!
==8526==WARNING: ASan doesn't fully support makecontext/swapcontext functions and may produce false positives in some cases!
PASS 1 test-bdrv-drain /bdrv-drain/nested
PASS 2 test-bdrv-drain /bdrv-drain/multiparent
PASS 3 test-bdrv-drain /bdrv-drain/set_aio_context
---
PASS 18 test-bdrv-drain /bdrv-drain/iothread/drain_all
PASS 19 test-bdrv-drain /bdrv-drain/iothread/drain
=================================================================
==8526==ERROR: AddressSanitizer: heap-use-after-free on address 0x61200002cdf0 at pc 0x55edfafa7f76 bp 0x7f7eeacb8680 sp 0x7f7eeacb8678
WRITE of size 1 at 0x61200002cdf0 thread T13
PASS 1 ahci-test /x86_64/ahci/sanity
    #0 0x55edfafa7f75 in aio_notify /tmp/qemu-test/src/util/async.c:351:9
---
  Right alloca redzone:    cb
  Shadow gap:              cc
==8526==ABORTING
ERROR - too few tests run (expected 40, got 19)
make: *** [/tmp/qemu-test/src/tests/Makefile.include:904: check-unit] Error 1
make: *** Waiting for unfinished jobs....
==8547==WARNING: ASan doesn't fully support makecontext/swapcontext functions and may produce false positives in some cases!
PASS 2 ahci-test /x86_64/ahci/pci_spec
==8553==WARNING: ASan doesn't fully support makecontext/swapcontext functions and may produce false positives in some cases!
PASS 3 ahci-test /x86_64/ahci/pci_enable
==8559==WARNING: ASan doesn't fully support makecontext/swapcontext functions and may produce false positives in some cases!
PASS 4 ahci-test /x86_64/ahci/hba_spec
==8565==WARNING: ASan doesn't fully support makecontext/swapcontext functions and may produce false positives in some cases!
PASS 5 ahci-test /x86_64/ahci/hba_enable
==8571==WARNING: ASan doesn't fully support makecontext/swapcontext functions and may produce false positives in some cases!
PASS 6 ahci-test /x86_64/ahci/identify
==8577==WARNING: ASan doesn't fully support makecontext/swapcontext functions and may produce false positives in some cases!
PASS 7 ahci-test /x86_64/ahci/max
==8583==WARNING: ASan doesn't fully support makecontext/swapcontext functions and may produce false positives in some cases!
PASS 8 ahci-test /x86_64/ahci/reset
==8589==WARNING: ASan doesn't fully support makecontext/swapcontext functions and may produce false positives in some cases!
==8589==WARNING: ASan is ignoring requested __asan_handle_no_return: stack top: 0x7fffef9bb000; bottom 0x7f5e339fe000; size: 0x00a1bbfbd000 (694643576832)
False positive error reports may follow
For details see https://github.com/google/sanitizers/issues/189
PASS 9 ahci-test /x86_64/ahci/io/pio/lba28/simple/zero
==8595==WARNING: ASan doesn't fully support makecontext/swapcontext functions and may produce false positives in some cases!
==8595==WARNING: ASan is ignoring requested __asan_handle_no_return: stack top: 0x7fffb2593000; bottom 0x7ff803bfe000; size: 0x0007ae995000 (32994054144)
False positive error reports may follow
For details see https://github.com/google/sanitizers/issues/189
PASS 10 ahci-test /x86_64/ahci/io/pio/lba28/simple/low
==8601==WARNING: ASan doesn't fully support makecontext/swapcontext functions and may produce false positives in some cases!
==8601==WARNING: ASan is ignoring requested __asan_handle_no_return: stack top: 0x7fffa9af9000; bottom 0x7fd6cbbfe000; size: 0x0028ddefb000 (175522164736)
False positive error reports may follow
For details see https://github.com/google/sanitizers/issues/189
PASS 11 ahci-test /x86_64/ahci/io/pio/lba28/simple/high
==8607==WARNING: ASan doesn't fully support makecontext/swapcontext functions and may produce false positives in some cases!
==8607==WARNING: ASan is ignoring requested __asan_handle_no_return: stack top: 0x7ffec912d000; bottom 0x7fbc911fe000; size: 0x004237f2f000 (284406509568)
False positive error reports may follow
For details see https://github.com/google/sanitizers/issues/189
PASS 12 ahci-test /x86_64/ahci/io/pio/lba28/double/zero
==8613==WARNING: ASan doesn't fully support makecontext/swapcontext functions and may produce false positives in some cases!
==8613==WARNING: ASan is ignoring requested __asan_handle_no_return: stack top: 0x7ffea71ae000; bottom 0x7f6f345fe000; size: 0x008f72bb0000 (616105181184)
False positive error reports may follow
For details see https://github.com/google/sanitizers/issues/189
PASS 13 ahci-test /x86_64/ahci/io/pio/lba28/double/low
==8619==WARNING: ASan doesn't fully support makecontext/swapcontext functions and may produce false positives in some cases!
==8619==WARNING: ASan is ignoring requested __asan_handle_no_return: stack top: 0x7ffe4617f000; bottom 0x7f4665ffe000; size: 0x00b7e0181000 (789738688512)
False positive error reports may follow
For details see https://github.com/google/sanitizers/issues/189
PASS 14 ahci-test /x86_64/ahci/io/pio/lba28/double/high
==8625==WARNING: ASan doesn't fully support makecontext/swapcontext functions and may produce false positives in some cases!
==8625==WARNING: ASan is ignoring requested __asan_handle_no_return: stack top: 0x7ffca6c55000; bottom 0x7f10ee3fe000; size: 0x00ebb8857000 (1012413067264)
False positive error reports may follow
For details see https://github.com/google/sanitizers/issues/189
PASS 15 ahci-test /x86_64/ahci/io/pio/lba28/long/zero
==8631==WARNING: ASan doesn't fully support makecontext/swapcontext functions and may produce false positives in some cases!
==8631==WARNING: ASan is ignoring requested __asan_handle_no_return: stack top: 0x7ffc0b633000; bottom 0x7f3d62f24000; size: 0x00bea870f000 (818869760000)
False positive error reports may follow
For details see https://github.com/google/sanitizers/issues/189
PASS 16 ahci-test /x86_64/ahci/io/pio/lba28/long/low
==8637==WARNING: ASan doesn't fully support makecontext/swapcontext functions and may produce false positives in some cases!
==8637==WARNING: ASan is ignoring requested __asan_handle_no_return: stack top: 0x7fff3c98c000; bottom 0x7f200ad7c000; size: 0x00df31c10000 (958612439040)
False positive error reports may follow
For details see https://github.com/google/sanitizers/issues/189
PASS 17 ahci-test /x86_64/ahci/io/pio/lba28/long/high
==8643==WARNING: ASan doesn't fully support makecontext/swapcontext functions and may produce false positives in some cases!
PASS 18 ahci-test /x86_64/ahci/io/pio/lba28/short/zero
==8649==WARNING: ASan doesn't fully support makecontext/swapcontext functions and may produce false positives in some cases!
PASS 19 ahci-test /x86_64/ahci/io/pio/lba28/short/low
==8655==WARNING: ASan doesn't fully support makecontext/swapcontext functions and may produce false positives in some cases!
PASS 20 ahci-test /x86_64/ahci/io/pio/lba28/short/high
==8661==WARNING: ASan doesn't fully support makecontext/swapcontext functions and may produce false positives in some cases!
==8661==WARNING: ASan is ignoring requested __asan_handle_no_return: stack top: 0x7ffd603a2000; bottom 0x7f256d7fe000; size: 0x00d7f2ba4000 (927490260992)
False positive error reports may follow
For details see https://github.com/google/sanitizers/issues/189
PASS 21 ahci-test /x86_64/ahci/io/pio/lba48/simple/zero
==8667==WARNING: ASan doesn't fully support makecontext/swapcontext functions and may produce false positives in some cases!
==8667==WARNING: ASan is ignoring requested __asan_handle_no_return: stack top: 0x7ffc54b4b000; bottom 0x7fcc55ffe000; size: 0x002ffeb4d000 (206136725504)
False positive error reports may follow
For details see https://github.com/google/sanitizers/issues/189
PASS 22 ahci-test /x86_64/ahci/io/pio/lba48/simple/low
==8673==WARNING: ASan doesn't fully support makecontext/swapcontext functions and may produce false positives in some cases!
==8673==WARNING: ASan is ignoring requested __asan_handle_no_return: stack top: 0x7fff2e1ab000; bottom 0x7f3bd39fe000; size: 0x00c35a7ad000 (839036620800)
False positive error reports may follow
For details see https://github.com/google/sanitizers/issues/189
PASS 23 ahci-test /x86_64/ahci/io/pio/lba48/simple/high
==8679==WARNING: ASan doesn't fully support makecontext/swapcontext functions and may produce false positives in some cases!
==8679==WARNING: ASan is ignoring requested __asan_handle_no_return: stack top: 0x7ffd3cc17000; bottom 0x7fa1805fe000; size: 0x005bbc619000 (394002534400)
False positive error reports may follow
For details see https://github.com/google/sanitizers/issues/189
PASS 24 ahci-test /x86_64/ahci/io/pio/lba48/double/zero
==8685==WARNING: ASan doesn't fully support makecontext/swapcontext functions and may produce false positives in some cases!
==8685==WARNING: ASan is ignoring requested __asan_handle_no_return: stack top: 0x7ffe45e5d000; bottom 0x7f4a347fe000; size: 0x00b41165f000 (773386006528)
False positive error reports may follow
For details see https://github.com/google/sanitizers/issues/189
PASS 25 ahci-test /x86_64/ahci/io/pio/lba48/double/low
==8691==WARNING: ASan doesn't fully support makecontext/swapcontext functions and may produce false positives in some cases!
==8691==WARNING: ASan is ignoring requested __asan_handle_no_return: stack top: 0x7fff56598000; bottom 0x7f5da03fe000; size: 0x00a1b619a000 (694544867328)
False positive error reports may follow
For details see https://github.com/google/sanitizers/issues/189
PASS 26 ahci-test /x86_64/ahci/io/pio/lba48/double/high
==8697==WARNING: ASan doesn't fully support makecontext/swapcontext functions and may produce false positives in some cases!
==8697==WARNING: ASan is ignoring requested __asan_handle_no_return: stack top: 0x7ffe4ae46000; bottom 0x7f8fc7924000; size: 0x006e83522000 (474649600000)
False positive error reports may follow
For details see https://github.com/google/sanitizers/issues/189
PASS 27 ahci-test /x86_64/ahci/io/pio/lba48/long/zero
==8703==WARNING: ASan doesn't fully support makecontext/swapcontext functions and may produce false positives in some cases!
==8703==WARNING: ASan is ignoring requested __asan_handle_no_return: stack top: 0x7ffe5e0ff000; bottom 0x7f902d3fe000; size: 0x006e30d01000 (473265344512)
False positive error reports may follow
For details see https://github.com/google/sanitizers/issues/189
PASS 28 ahci-test /x86_64/ahci/io/pio/lba48/long/low
==8709==WARNING: ASan doesn't fully support makecontext/swapcontext functions and may produce false positives in some cases!
==8709==WARNING: ASan is ignoring requested __asan_handle_no_return: stack top: 0x7fffdcafc000; bottom 0x7f22301fe000; size: 0x00ddac8fe000 (952082882560)
False positive error reports may follow
For details see https://github.com/google/sanitizers/issues/189
PASS 29 ahci-test /x86_64/ahci/io/pio/lba48/long/high
==8715==WARNING: ASan doesn't fully support makecontext/swapcontext functions and may produce false positives in some cases!
PASS 30 ahci-test /x86_64/ahci/io/pio/lba48/short/zero
==8721==WARNING: ASan doesn't fully support makecontext/swapcontext functions and may produce false positives in some cases!
PASS 31 ahci-test /x86_64/ahci/io/pio/lba48/short/low
==8727==WARNING: ASan doesn't fully support makecontext/swapcontext functions and may produce false positives in some cases!
PASS 32 ahci-test /x86_64/ahci/io/pio/lba48/short/high
==8733==WARNING: ASan doesn't fully support makecontext/swapcontext functions and may produce false positives in some cases!
PASS 33 ahci-test /x86_64/ahci/io/dma/lba28/fragmented
==8739==WARNING: ASan doesn't fully support makecontext/swapcontext functions and may produce false positives in some cases!
PASS 34 ahci-test /x86_64/ahci/io/dma/lba28/retry
==8745==WARNING: ASan doesn't fully support makecontext/swapcontext functions and may produce false positives in some cases!
PASS 35 ahci-test /x86_64/ahci/io/dma/lba28/simple/zero
==8751==WARNING: ASan doesn't fully support makecontext/swapcontext functions and may produce false positives in some cases!
PASS 36 ahci-test /x86_64/ahci/io/dma/lba28/simple/low
==8757==WARNING: ASan doesn't fully support makecontext/swapcontext functions and may produce false positives in some cases!
PASS 37 ahci-test /x86_64/ahci/io/dma/lba28/simple/high
==8763==WARNING: ASan doesn't fully support makecontext/swapcontext functions and may produce false positives in some cases!
PASS 38 ahci-test /x86_64/ahci/io/dma/lba28/double/zero
==8769==WARNING: ASan doesn't fully support makecontext/swapcontext functions and may produce false positives in some cases!
PASS 39 ahci-test /x86_64/ahci/io/dma/lba28/double/low
==8775==WARNING: ASan doesn't fully support makecontext/swapcontext functions and may produce false positives in some cases!
PASS 40 ahci-test /x86_64/ahci/io/dma/lba28/double/high
==8781==WARNING: ASan doesn't fully support makecontext/swapcontext functions and may produce false positives in some cases!
PASS 41 ahci-test /x86_64/ahci/io/dma/lba28/long/zero
==8787==WARNING: ASan doesn't fully support makecontext/swapcontext functions and may produce false positives in some cases!
PASS 42 ahci-test /x86_64/ahci/io/dma/lba28/long/low
==8793==WARNING: ASan doesn't fully support makecontext/swapcontext functions and may produce false positives in some cases!
PASS 43 ahci-test /x86_64/ahci/io/dma/lba28/long/high
==8799==WARNING: ASan doesn't fully support makecontext/swapcontext functions and may produce false positives in some cases!
PASS 44 ahci-test /x86_64/ahci/io/dma/lba28/short/zero
==8805==WARNING: ASan doesn't fully support makecontext/swapcontext functions and may produce false positives in some cases!
PASS 45 ahci-test /x86_64/ahci/io/dma/lba28/short/low
==8812==WARNING: ASan doesn't fully support makecontext/swapcontext functions and may produce false positives in some cases!
PASS 46 ahci-test /x86_64/ahci/io/dma/lba28/short/high
==8818==WARNING: ASan doesn't fully support makecontext/swapcontext functions and may produce false positives in some cases!
PASS 47 ahci-test /x86_64/ahci/io/dma/lba48/simple/zero
==8824==WARNING: ASan doesn't fully support makecontext/swapcontext functions and may produce false positives in some cases!
PASS 48 ahci-test /x86_64/ahci/io/dma/lba48/simple/low
==8830==WARNING: ASan doesn't fully support makecontext/swapcontext functions and may produce false positives in some cases!
PASS 49 ahci-test /x86_64/ahci/io/dma/lba48/simple/high
==8836==WARNING: ASan doesn't fully support makecontext/swapcontext functions and may produce false positives in some cases!
PASS 50 ahci-test /x86_64/ahci/io/dma/lba48/double/zero
==8842==WARNING: ASan doesn't fully support makecontext/swapcontext functions and may produce false positives in some cases!
PASS 51 ahci-test /x86_64/ahci/io/dma/lba48/double/low
==8848==WARNING: ASan doesn't fully support makecontext/swapcontext functions and may produce false positives in some cases!
PASS 52 ahci-test /x86_64/ahci/io/dma/lba48/double/high
==8854==WARNING: ASan doesn't fully support makecontext/swapcontext functions and may produce false positives in some cases!
PASS 53 ahci-test /x86_64/ahci/io/dma/lba48/long/zero
==8860==WARNING: ASan doesn't fully support makecontext/swapcontext functions and may produce false positives in some cases!
PASS 54 ahci-test /x86_64/ahci/io/dma/lba48/long/low
==8866==WARNING: ASan doesn't fully support makecontext/swapcontext functions and may produce false positives in some cases!
PASS 55 ahci-test /x86_64/ahci/io/dma/lba48/long/high
==8872==WARNING: ASan doesn't fully support makecontext/swapcontext functions and may produce false positives in some cases!
PASS 56 ahci-test /x86_64/ahci/io/dma/lba48/short/zero
==8878==WARNING: ASan doesn't fully support makecontext/swapcontext functions and may produce false positives in some cases!
PASS 57 ahci-test /x86_64/ahci/io/dma/lba48/short/low
==8884==WARNING: ASan doesn't fully support makecontext/swapcontext functions and may produce false positives in some cases!
PASS 58 ahci-test /x86_64/ahci/io/dma/lba48/short/high
==8890==WARNING: ASan doesn't fully support makecontext/swapcontext functions and may produce false positives in some cases!
PASS 59 ahci-test /x86_64/ahci/io/ncq/simple
==8896==WARNING: ASan doesn't fully support makecontext/swapcontext functions and may produce false positives in some cases!
PASS 60 ahci-test /x86_64/ahci/io/ncq/retry
==8902==WARNING: ASan doesn't fully support makecontext/swapcontext functions and may produce false positives in some cases!
PASS 61 ahci-test /x86_64/ahci/flush/simple
==8909==WARNING: ASan doesn't fully support makecontext/swapcontext functions and may produce false positives in some cases!
PASS 62 ahci-test /x86_64/ahci/flush/retry
==8915==WARNING: ASan doesn't fully support makecontext/swapcontext functions and may produce false positives in some cases!
==8920==WARNING: ASan doesn't fully support makecontext/swapcontext functions and may produce false positives in some cases!
PASS 63 ahci-test /x86_64/ahci/flush/migrate
==8929==WARNING: ASan doesn't fully support makecontext/swapcontext functions and may produce false positives in some cases!
==8934==WARNING: ASan doesn't fully support makecontext/swapcontext functions and may produce false positives in some cases!
PASS 64 ahci-test /x86_64/ahci/migrate/sanity
==8943==WARNING: ASan doesn't fully support makecontext/swapcontext functions and may produce false positives in some cases!
==8948==WARNING: ASan doesn't fully support makecontext/swapcontext functions and may produce false positives in some cases!
PASS 65 ahci-test /x86_64/ahci/migrate/dma/simple
==8957==WARNING: ASan doesn't fully support makecontext/swapcontext functions and may produce false positives in some cases!
==8962==WARNING: ASan doesn't fully support makecontext/swapcontext functions and may produce false positives in some cases!
PASS 66 ahci-test /x86_64/ahci/migrate/dma/halted
==8971==WARNING: ASan doesn't fully support makecontext/swapcontext functions and may produce false positives in some cases!
==8976==WARNING: ASan doesn't fully support makecontext/swapcontext functions and may produce false positives in some cases!
PASS 67 ahci-test /x86_64/ahci/migrate/ncq/simple
==8985==WARNING: ASan doesn't fully support makecontext/swapcontext functions and may produce false positives in some cases!
==8990==WARNING: ASan doesn't fully support makecontext/swapcontext functions and may produce false positives in some cases!
PASS 68 ahci-test /x86_64/ahci/migrate/ncq/halted
==8999==WARNING: ASan doesn't fully support makecontext/swapcontext functions and may produce false positives in some cases!
PASS 69 ahci-test /x86_64/ahci/cdrom/eject
==9004==WARNING: ASan doesn't fully support makecontext/swapcontext functions and may produce false positives in some cases!
PASS 70 ahci-test /x86_64/ahci/cdrom/dma/single
==9010==WARNING: ASan doesn't fully support makecontext/swapcontext functions and may produce false positives in some cases!
PASS 71 ahci-test /x86_64/ahci/cdrom/dma/multi
==9016==WARNING: ASan doesn't fully support makecontext/swapcontext functions and may produce false positives in some cases!
PASS 72 ahci-test /x86_64/ahci/cdrom/pio/single
==9022==WARNING: ASan doesn't fully support makecontext/swapcontext functions and may produce false positives in some cases!
==9022==WARNING: ASan is ignoring requested __asan_handle_no_return: stack top: 0x7ffdfb3f4000; bottom 0x7f91dd7ba000; size: 0x006c1dc3a000 (464355827712)
False positive error reports may follow
For details see https://github.com/google/sanitizers/issues/189
PASS 73 ahci-test /x86_64/ahci/cdrom/pio/multi
==9028==WARNING: ASan doesn't fully support makecontext/swapcontext functions and may produce false positives in some cases!
PASS 74 ahci-test /x86_64/ahci/cdrom/pio/bcl
MALLOC_PERTURB_=${MALLOC_PERTURB_:-$(( ${RANDOM:-0} % 255 + 1))}  QTEST_QEMU_BINARY=x86_64-softmmu/qemu-system-x86_64 QTEST_QEMU_IMG=qemu-img tests/hd-geo-test -m=quick -k --tap < /dev/null | ./scripts/tap-driver.pl --test-name="hd-geo-test" 
PASS 1 hd-geo-test /x86_64/hd-geo/ide/none
==9042==WARNING: ASan doesn't fully support makecontext/swapcontext functions and may produce false positives in some cases!
PASS 2 hd-geo-test /x86_64/hd-geo/ide/drive/cd_0
==9048==WARNING: ASan doesn't fully support makecontext/swapcontext functions and may produce false positives in some cases!
PASS 3 hd-geo-test /x86_64/hd-geo/ide/drive/mbr/blank
==9054==WARNING: ASan doesn't fully support makecontext/swapcontext functions and may produce false positives in some cases!
PASS 4 hd-geo-test /x86_64/hd-geo/ide/drive/mbr/lba
==9060==WARNING: ASan doesn't fully support makecontext/swapcontext functions and may produce false positives in some cases!
PASS 5 hd-geo-test /x86_64/hd-geo/ide/drive/mbr/chs
==9066==WARNING: ASan doesn't fully support makecontext/swapcontext functions and may produce false positives in some cases!
PASS 6 hd-geo-test /x86_64/hd-geo/ide/device/mbr/blank
==9072==WARNING: ASan doesn't fully support makecontext/swapcontext functions and may produce false positives in some cases!
PASS 7 hd-geo-test /x86_64/hd-geo/ide/device/mbr/lba
==9078==WARNING: ASan doesn't fully support makecontext/swapcontext functions and may produce false positives in some cases!
PASS 8 hd-geo-test /x86_64/hd-geo/ide/device/mbr/chs
==9084==WARNING: ASan doesn't fully support makecontext/swapcontext functions and may produce false positives in some cases!
PASS 9 hd-geo-test /x86_64/hd-geo/ide/device/user/chs
==9089==WARNING: ASan doesn't fully support makecontext/swapcontext functions and may produce false positives in some cases!
PASS 10 hd-geo-test /x86_64/hd-geo/ide/device/user/chst
MALLOC_PERTURB_=${MALLOC_PERTURB_:-$(( ${RANDOM:-0} % 255 + 1))}  QTEST_QEMU_BINARY=x86_64-softmmu/qemu-system-x86_64 QTEST_QEMU_IMG=qemu-img tests/boot-order-test -m=quick -k --tap < /dev/null | ./scripts/tap-driver.pl --test-name="boot-order-test" 
PASS 1 boot-order-test /x86_64/boot-order/pc
---
Could not access KVM kernel module: No such file or directory
qemu-system-x86_64: failed to initialize KVM: No such file or directory
qemu-system-x86_64: Back to tcg accelerator
==9157==WARNING: ASan doesn't fully support makecontext/swapcontext functions and may produce false positives in some cases!

Looking for expected file 'tests/data/acpi/pc/FACP'
Using expected file 'tests/data/acpi/pc/FACP'
---
Could not access KVM kernel module: No such file or directory
qemu-system-x86_64: failed to initialize KVM: No such file or directory
qemu-system-x86_64: Back to tcg accelerator
==9163==WARNING: ASan doesn't fully support makecontext/swapcontext functions and may produce false positives in some cases!

Looking for expected file 'tests/data/acpi/q35/FACP'
Using expected file 'tests/data/acpi/q35/FACP'
---
Could not access KVM kernel module: No such file or directory
qemu-system-x86_64: failed to initialize KVM: No such file or directory
qemu-system-x86_64: Back to tcg accelerator
==9169==WARNING: ASan doesn't fully support makecontext/swapcontext functions and may produce false positives in some cases!

Looking for expected file 'tests/data/acpi/pc/FACP.bridge'
Looking for expected file 'tests/data/acpi/pc/FACP'
---
Could not access KVM kernel module: No such file or directory
qemu-system-x86_64: failed to initialize KVM: No such file or directory
qemu-system-x86_64: Back to tcg accelerator
==9175==WARNING: ASan doesn't fully support makecontext/swapcontext functions and may produce false positives in some cases!

Looking for expected file 'tests/data/acpi/pc/FACP.ipmikcs'
Looking for expected file 'tests/data/acpi/pc/FACP'
---
Could not access KVM kernel module: No such file or directory
qemu-system-x86_64: failed to initialize KVM: No such file or directory
qemu-system-x86_64: Back to tcg accelerator
==9181==WARNING: ASan doesn't fully support makecontext/swapcontext functions and may produce false positives in some cases!

Looking for expected file 'tests/data/acpi/pc/FACP.cphp'
Looking for expected file 'tests/data/acpi/pc/FACP'
---
Could not access KVM kernel module: No such file or directory
qemu-system-x86_64: failed to initialize KVM: No such file or directory
qemu-system-x86_64: Back to tcg accelerator
==9188==WARNING: ASan doesn't fully support makecontext/swapcontext functions and may produce false positives in some cases!

Looking for expected file 'tests/data/acpi/pc/FACP.memhp'
Looking for expected file 'tests/data/acpi/pc/FACP'
---
Could not access KVM kernel module: No such file or directory
qemu-system-x86_64: failed to initialize KVM: No such file or directory
qemu-system-x86_64: Back to tcg accelerator
==9194==WARNING: ASan doesn't fully support makecontext/swapcontext functions and may produce false positives in some cases!

Looking for expected file 'tests/data/acpi/pc/FACP.numamem'
Looking for expected file 'tests/data/acpi/pc/FACP'
---
Could not access KVM kernel module: No such file or directory
qemu-system-x86_64: failed to initialize KVM: No such file or directory
qemu-system-x86_64: Back to tcg accelerator
==9200==WARNING: ASan doesn't fully support makecontext/swapcontext functions and may produce false positives in some cases!

Looking for expected file 'tests/data/acpi/pc/FACP.dimmpxm'
Looking for expected file 'tests/data/acpi/pc/FACP'
---
Could not access KVM kernel module: No such file or directory
qemu-system-x86_64: failed to initialize KVM: No such file or directory
qemu-system-x86_64: Back to tcg accelerator
==9209==WARNING: ASan doesn't fully support makecontext/swapcontext functions and may produce false positives in some cases!

Looking for expected file 'tests/data/acpi/q35/FACP.bridge'
Looking for expected file 'tests/data/acpi/q35/FACP'
---
Could not access KVM kernel module: No such file or directory
qemu-system-x86_64: failed to initialize KVM: No such file or directory
qemu-system-x86_64: Back to tcg accelerator
==9215==WARNING: ASan doesn't fully support makecontext/swapcontext functions and may produce false positives in some cases!

Looking for expected file 'tests/data/acpi/q35/FACP.mmio64'
Looking for expected file 'tests/data/acpi/q35/FACP'
---
Could not access KVM kernel module: No such file or directory
qemu-system-x86_64: failed to initialize KVM: No such file or directory
qemu-system-x86_64: Back to tcg accelerator
==9221==WARNING: ASan doesn't fully support makecontext/swapcontext functions and may produce false positives in some cases!

Looking for expected file 'tests/data/acpi/q35/FACP.ipmibt'
Looking for expected file 'tests/data/acpi/q35/FACP'
---
Could not access KVM kernel module: No such file or directory
qemu-system-x86_64: failed to initialize KVM: No such file or directory
qemu-system-x86_64: Back to tcg accelerator
==9227==WARNING: ASan doesn't fully support makecontext/swapcontext functions and may produce false positives in some cases!

Looking for expected file 'tests/data/acpi/q35/FACP.cphp'
Looking for expected file 'tests/data/acpi/q35/FACP'
---
Could not access KVM kernel module: No such file or directory
qemu-system-x86_64: failed to initialize KVM: No such file or directory
qemu-system-x86_64: Back to tcg accelerator
==9234==WARNING: ASan doesn't fully support makecontext/swapcontext functions and may produce false positives in some cases!

Looking for expected file 'tests/data/acpi/q35/FACP.memhp'
Looking for expected file 'tests/data/acpi/q35/FACP'
---
Could not access KVM kernel module: No such file or directory
qemu-system-x86_64: failed to initialize KVM: No such file or directory
qemu-system-x86_64: Back to tcg accelerator
==9240==WARNING: ASan doesn't fully support makecontext/swapcontext functions and may produce false positives in some cases!

Looking for expected file 'tests/data/acpi/q35/FACP.numamem'
Looking for expected file 'tests/data/acpi/q35/FACP'
---
Could not access KVM kernel module: No such file or directory
qemu-system-x86_64: failed to initialize KVM: No such file or directory
qemu-system-x86_64: Back to tcg accelerator
==9246==WARNING: ASan doesn't fully support makecontext/swapcontext functions and may produce false positives in some cases!

Looking for expected file 'tests/data/acpi/q35/FACP.dimmpxm'
Looking for expected file 'tests/data/acpi/q35/FACP'
---
PASS 1 i440fx-test /x86_64/i440fx/defaults
PASS 2 i440fx-test /x86_64/i440fx/pam
PASS 3 i440fx-test /x86_64/i440fx/firmware/bios
==9330==WARNING: ASan doesn't fully support makecontext/swapcontext functions and may produce false positives in some cases!
PASS 4 i440fx-test /x86_64/i440fx/firmware/pflash
MALLOC_PERTURB_=${MALLOC_PERTURB_:-$(( ${RANDOM:-0} % 255 + 1))}  QTEST_QEMU_BINARY=x86_64-softmmu/qemu-system-x86_64 QTEST_QEMU_IMG=qemu-img tests/fw_cfg-test -m=quick -k --tap < /dev/null | ./scripts/tap-driver.pl --test-name="fw_cfg-test" 
PASS 1 fw_cfg-test /x86_64/fw_cfg/signature
---
MALLOC_PERTURB_=${MALLOC_PERTURB_:-$(( ${RANDOM:-0} % 255 + 1))}  QTEST_QEMU_BINARY=x86_64-softmmu/qemu-system-x86_64 QTEST_QEMU_IMG=qemu-img tests/drive_del-test -m=quick -k --tap < /dev/null | ./scripts/tap-driver.pl --test-name="drive_del-test" 
PASS 1 drive_del-test /x86_64/drive_del/without-dev
PASS 2 drive_del-test /x86_64/drive_del/after_failed_device_add
==9418==WARNING: ASan doesn't fully support makecontext/swapcontext functions and may produce false positives in some cases!
PASS 3 drive_del-test /x86_64/blockdev/drive_del_device_del
MALLOC_PERTURB_=${MALLOC_PERTURB_:-$(( ${RANDOM:-0} % 255 + 1))}  QTEST_QEMU_BINARY=x86_64-softmmu/qemu-system-x86_64 QTEST_QEMU_IMG=qemu-img tests/wdt_ib700-test -m=quick -k --tap < /dev/null | ./scripts/tap-driver.pl --test-name="wdt_ib700-test" 
PASS 1 wdt_ib700-test /x86_64/wdt_ib700/pause
---
PASS 1 usb-hcd-uhci-test /x86_64/uhci/pci/init
PASS 2 usb-hcd-uhci-test /x86_64/uhci/pci/port1
PASS 3 usb-hcd-uhci-test /x86_64/uhci/pci/hotplug
==9613==WARNING: ASan doesn't fully support makecontext/swapcontext functions and may produce false positives in some cases!
PASS 4 usb-hcd-uhci-test /x86_64/uhci/pci/hotplug/usb-storage
MALLOC_PERTURB_=${MALLOC_PERTURB_:-$(( ${RANDOM:-0} % 255 + 1))}  QTEST_QEMU_BINARY=x86_64-softmmu/qemu-system-x86_64 QTEST_QEMU_IMG=qemu-img tests/usb-hcd-xhci-test -m=quick -k --tap < /dev/null | ./scripts/tap-driver.pl --test-name="usb-hcd-xhci-test" 
PASS 1 usb-hcd-xhci-test /x86_64/xhci/pci/init
PASS 2 usb-hcd-xhci-test /x86_64/xhci/pci/hotplug
==9622==WARNING: ASan doesn't fully support makecontext/swapcontext functions and may produce false positives in some cases!
PASS 3 usb-hcd-xhci-test /x86_64/xhci/pci/hotplug/usb-uas
PASS 4 usb-hcd-xhci-test /x86_64/xhci/pci/hotplug/usb-ccid
MALLOC_PERTURB_=${MALLOC_PERTURB_:-$(( ${RANDOM:-0} % 255 + 1))}  QTEST_QEMU_BINARY=x86_64-softmmu/qemu-system-x86_64 QTEST_QEMU_IMG=qemu-img tests/cpu-plug-test -m=quick -k --tap < /dev/null | ./scripts/tap-driver.pl --test-name="cpu-plug-test" 
---
Could not access KVM kernel module: No such file or directory
qemu-system-x86_64: failed to initialize KVM: No such file or directory
qemu-system-x86_64: Back to tcg accelerator
==9728==WARNING: ASan doesn't fully support makecontext/swapcontext functions and may produce false positives in some cases!
PASS 1 vmgenid-test /x86_64/vmgenid/vmgenid/set-guid
Could not access KVM kernel module: No such file or directory
qemu-system-x86_64: failed to initialize KVM: No such file or directory
qemu-system-x86_64: Back to tcg accelerator
==9734==WARNING: ASan doesn't fully support makecontext/swapcontext functions and may produce false positives in some cases!
PASS 2 vmgenid-test /x86_64/vmgenid/vmgenid/set-guid-auto
Could not access KVM kernel module: No such file or directory
qemu-system-x86_64: failed to initialize KVM: No such file or directory
qemu-system-x86_64: Back to tcg accelerator
==9740==WARNING: ASan doesn't fully support makecontext/swapcontext functions and may produce false positives in some cases!
PASS 3 vmgenid-test /x86_64/vmgenid/vmgenid/query-monitor
MALLOC_PERTURB_=${MALLOC_PERTURB_:-$(( ${RANDOM:-0} % 255 + 1))}  QTEST_QEMU_BINARY=x86_64-softmmu/qemu-system-x86_64 QTEST_QEMU_IMG=qemu-img tests/tpm-crb-swtpm-test -m=quick -k --tap < /dev/null | ./scripts/tap-driver.pl --test-name="tpm-crb-swtpm-test" 
SKIP 1 tpm-crb-swtpm-test /x86_64/tpm/crb-swtpm/test # SKIP swtpm not in PATH or missing --tpm2 support
---
Could not access KVM kernel module: No such file or directory
qemu-system-x86_64: failed to initialize KVM: No such file or directory
qemu-system-x86_64: Back to tcg accelerator
==9845==WARNING: ASan doesn't fully support makecontext/swapcontext functions and may produce false positives in some cases!
Could not access KVM kernel module: No such file or directory
qemu-system-x86_64: failed to initialize KVM: No such file or directory
qemu-system-x86_64: Back to tcg accelerator
==9850==WARNING: ASan doesn't fully support makecontext/swapcontext functions and may produce false positives in some cases!
PASS 3 migration-test /x86_64/migration/fd_proto
Could not access KVM kernel module: No such file or directory
qemu-system-x86_64: failed to initialize KVM: No such file or directory
qemu-system-x86_64: Back to tcg accelerator
==9858==WARNING: ASan doesn't fully support makecontext/swapcontext functions and may produce false positives in some cases!
Could not access KVM kernel module: No such file or directory
qemu-system-x86_64: failed to initialize KVM: No such file or directory
qemu-system-x86_64: Back to tcg accelerator
==9863==WARNING: ASan doesn't fully support makecontext/swapcontext functions and may produce false positives in some cases!
PASS 4 migration-test /x86_64/migration/postcopy/unix
PASS 5 migration-test /x86_64/migration/postcopy/recovery
Could not access KVM kernel module: No such file or directory
qemu-system-x86_64: failed to initialize KVM: No such file or directory
qemu-system-x86_64: Back to tcg accelerator
==9893==WARNING: ASan doesn't fully support makecontext/swapcontext functions and may produce false positives in some cases!
Could not access KVM kernel module: No such file or directory
qemu-system-x86_64: failed to initialize KVM: No such file or directory
qemu-system-x86_64: Back to tcg accelerator
==9898==WARNING: ASan doesn't fully support makecontext/swapcontext functions and may produce false positives in some cases!
PASS 6 migration-test /x86_64/migration/precopy/unix
Could not access KVM kernel module: No such file or directory
qemu-system-x86_64: failed to initialize KVM: No such file or directory
qemu-system-x86_64: Back to tcg accelerator
==9907==WARNING: ASan doesn't fully support makecontext/swapcontext functions and may produce false positives in some cases!
Could not access KVM kernel module: No such file or directory
qemu-system-x86_64: failed to initialize KVM: No such file or directory
qemu-system-x86_64: Back to tcg accelerator
==9912==WARNING: ASan doesn't fully support makecontext/swapcontext functions and may produce false positives in some cases!
PASS 7 migration-test /x86_64/migration/precopy/tcp
Could not access KVM kernel module: No such file or directory
qemu-system-x86_64: failed to initialize KVM: No such file or directory
qemu-system-x86_64: Back to tcg accelerator
==9921==WARNING: ASan doesn't fully support makecontext/swapcontext functions and may produce false positives in some cases!
Could not access KVM kernel module: No such file or directory
qemu-system-x86_64: failed to initialize KVM: No such file or directory
qemu-system-x86_64: Back to tcg accelerator
==9926==WARNING: ASan doesn't fully support makecontext/swapcontext functions and may produce false positives in some cases!
PASS 8 migration-test /x86_64/migration/xbzrle/unix
MALLOC_PERTURB_=${MALLOC_PERTURB_:-$(( ${RANDOM:-0} % 255 + 1))}  QTEST_QEMU_BINARY=x86_64-softmmu/qemu-system-x86_64 QTEST_QEMU_IMG=qemu-img tests/test-x86-cpuid-compat -m=quick -k --tap < /dev/null | ./scripts/tap-driver.pl --test-name="test-x86-cpuid-compat" 
PASS 1 test-x86-cpuid-compat /x86/cpuid/parsing-plus-minus
---
PASS 6 numa-test /x86_64/numa/pc/dynamic/cpu
MALLOC_PERTURB_=${MALLOC_PERTURB_:-$(( ${RANDOM:-0} % 255 + 1))}  QTEST_QEMU_BINARY=x86_64-softmmu/qemu-system-x86_64 QTEST_QEMU_IMG=qemu-img tests/qmp-test -m=quick -k --tap < /dev/null | ./scripts/tap-driver.pl --test-name="qmp-test" 
PASS 1 qmp-test /x86_64/qmp/protocol
==10255==WARNING: ASan doesn't fully support makecontext/swapcontext functions and may produce false positives in some cases!
PASS 2 qmp-test /x86_64/qmp/oob
PASS 3 qmp-test /x86_64/qmp/preconfig
PASS 4 qmp-test /x86_64/qmp/missing-any-arg
---
PASS 6 qos-test /x86_64/pc/i440FX-pcihost/pci-bus-pc/pci-bus/sdhci-pci/sdhci/sdhci-tests/registers
PASS 7 qos-test /x86_64/pc/i440FX-pcihost/pci-bus-pc/pci-bus/tpci200/ipack/ipoctal232/ipoctal232-tests/nop
PASS 8 qos-test /x86_64/pc/i440FX-pcihost/pci-bus-pc/pci-bus/tpci200/pci-device/pci-device-tests/nop
==10664==WARNING: ASan doesn't fully support makecontext/swapcontext functions and may produce false positives in some cases!
PASS 9 qos-test /x86_64/pc/i440FX-pcihost/pci-bus-pc/pci-bus/virtio-9p-pci/pci-device/pci-device-tests/nop
PASS 10 qos-test /x86_64/pc/i440FX-pcihost/pci-bus-pc/pci-bus/virtio-9p-pci/virtio/virtio-tests/nop
PASS 11 qos-test /x86_64/pc/i440FX-pcihost/pci-bus-pc/pci-bus/virtio-9p-pci/virtio-9p/virtio-9p-tests/config
---
PASS 20 qos-test /x86_64/pc/i440FX-pcihost/pci-bus-pc/pci-bus/virtio-9p-pci/virtio-9p/virtio-9p-tests/fs/flush/ignored
PASS 21 qos-test /x86_64/pc/i440FX-pcihost/pci-bus-pc/pci-bus/virtio-balloon-pci/pci-device/pci-device-tests/nop
PASS 22 qos-test /x86_64/pc/i440FX-pcihost/pci-bus-pc/pci-bus/virtio-balloon-pci/virtio/virtio-tests/nop
==10677==WARNING: ASan doesn't fully support makecontext/swapcontext functions and may produce false positives in some cases!
PASS 23 qos-test /x86_64/pc/i440FX-pcihost/pci-bus-pc/pci-bus/virtio-blk-pci/virtio-blk/virtio-blk-tests/indirect
==10684==WARNING: ASan doesn't fully support makecontext/swapcontext functions and may produce false positives in some cases!
PASS 24 qos-test /x86_64/pc/i440FX-pcihost/pci-bus-pc/pci-bus/virtio-blk-pci/virtio-blk/virtio-blk-tests/config
==10691==WARNING: ASan doesn't fully support makecontext/swapcontext functions and may produce false positives in some cases!
PASS 25 qos-test /x86_64/pc/i440FX-pcihost/pci-bus-pc/pci-bus/virtio-blk-pci/virtio-blk/virtio-blk-tests/basic
==10698==WARNING: ASan doesn't fully support makecontext/swapcontext functions and may produce false positives in some cases!
PASS 26 qos-test /x86_64/pc/i440FX-pcihost/pci-bus-pc/pci-bus/virtio-blk-pci/virtio-blk/virtio-blk-tests/resize
==10705==WARNING: ASan doesn't fully support makecontext/swapcontext functions and may produce false positives in some cases!
PASS 27 qos-test /x86_64/pc/i440FX-pcihost/pci-bus-pc/pci-bus/virtio-blk-pci/virtio-blk-pci-tests/msix
==10712==WARNING: ASan doesn't fully support makecontext/swapcontext functions and may produce false positives in some cases!
PASS 28 qos-test /x86_64/pc/i440FX-pcihost/pci-bus-pc/pci-bus/virtio-blk-pci/virtio-blk-pci-tests/idx
==10719==WARNING: ASan doesn't fully support makecontext/swapcontext functions and may produce false positives in some cases!
PASS 29 qos-test /x86_64/pc/i440FX-pcihost/pci-bus-pc/pci-bus/virtio-blk-pci/virtio-blk-pci-tests/nxvirtq
==10726==WARNING: ASan doesn't fully support makecontext/swapcontext functions and may produce false positives in some cases!
PASS 30 qos-test /x86_64/pc/i440FX-pcihost/pci-bus-pc/pci-bus/virtio-blk-pci/virtio-blk-pci-tests/hotplug
PASS 31 qos-test /x86_64/pc/i440FX-pcihost/pci-bus-pc/pci-bus/virtio-net-pci/virtio-net/virtio-net-tests/basic
PASS 32 qos-test /x86_64/pc/i440FX-pcihost/pci-bus-pc/pci-bus/virtio-net-pci/virtio-net/virtio-net-tests/rx_stop_cont
---
PASS 40 qos-test /x86_64/pc/i440FX-pcihost/pci-bus-pc/pci-bus/virtio-rng-pci/pci-device/pci-device-tests/nop
PASS 41 qos-test /x86_64/pc/i440FX-pcihost/pci-bus-pc/pci-bus/virtio-rng-pci/virtio/virtio-tests/nop
PASS 42 qos-test /x86_64/pc/i440FX-pcihost/pci-bus-pc/pci-bus/virtio-rng-pci/virtio-rng-pci-tests/hotplug
==10837==WARNING: ASan doesn't fully support makecontext/swapcontext functions and may produce false positives in some cases!
PASS 43 qos-test /x86_64/pc/i440FX-pcihost/pci-bus-pc/pci-bus/virtio-scsi-pci/pci-device/pci-device-tests/nop
==10843==WARNING: ASan doesn't fully support makecontext/swapcontext functions and may produce false positives in some cases!
PASS 44 qos-test /x86_64/pc/i440FX-pcihost/pci-bus-pc/pci-bus/virtio-scsi-pci/virtio-scsi/virtio-scsi-tests/hotplug
==10849==WARNING: ASan doesn't fully support makecontext/swapcontext functions and may produce false positives in some cases!
PASS 45 qos-test /x86_64/pc/i440FX-pcihost/pci-bus-pc/pci-bus/virtio-scsi-pci/virtio-scsi/virtio-scsi-tests/unaligned-write-same
==10855==WARNING: ASan doesn't fully support makecontext/swapcontext functions and may produce false positives in some cases!
PASS 46 qos-test /x86_64/pc/i440FX-pcihost/pci-bus-pc/pci-bus/virtio-scsi-pci/virtio-scsi-pci-tests/iothread-attach-node
PASS 47 qos-test /x86_64/pc/i440FX-pcihost/pci-bus-pc/pci-bus/virtio-serial-pci/pci-device/pci-device-tests/nop
PASS 48 qos-test /x86_64/pc/i440FX-pcihost/pci-bus-pc/pci-bus/virtio-serial-pci/virtio/virtio-tests/nop
---
PASS 67 qos-test /x86_64/pc/i440FX-pcihost/pci-bus-pc/pci-bus/i82562/pci-device/pci-device-tests/nop
PASS 68 qos-test /x86_64/pc/i440FX-pcihost/pci-bus-pc/pci-bus/i82801/pci-device/pci-device-tests/nop
PASS 69 qos-test /x86_64/pc/i440FX-pcihost/pci-bus-pc/pci-bus/ES1370/pci-device/pci-device-tests/nop
==11000==WARNING: ASan doesn't fully support makecontext/swapcontext functions and may produce false positives in some cases!
PASS 70 qos-test /x86_64/pc/i440FX-pcihost/pci-bus-pc/pci-bus/megasas/pci-device/pci-device-tests/nop
PASS 71 qos-test /x86_64/pc/i440FX-pcihost/pci-bus-pc/pci-bus/megasas/megasas-tests/dcmd/pd-get-info/fuzz
PASS 72 qos-test /x86_64/pc/i440FX-pcihost/pci-bus-pc/pci-bus/ne2k_pci/pci-device/pci-device-tests/nop
PASS 73 qos-test /x86_64/pc/i440FX-pcihost/pci-bus-pc/pci-bus/nvme/pci-device/pci-device-tests/nop
==11012==WARNING: ASan doesn't fully support makecontext/swapcontext functions and may produce false positives in some cases!
PASS 74 qos-test /x86_64/pc/i440FX-pcihost/pci-bus-pc/pci-bus/nvme/nvme-tests/oob-cmb-access
==11018==WARNING: ASan doesn't fully support makecontext/swapcontext functions and may produce false positives in some cases!
PASS 75 qos-test /x86_64/pc/i440FX-pcihost/pci-bus-pc/pci-bus/pcnet/pci-device/pci-device-tests/nop
PASS 76 qos-test /x86_64/pc/i440FX-pcihost/pci-bus-pc/pci-bus/pci-ohci/pci-device/pci-device-tests/nop
PASS 77 qos-test /x86_64/pc/i440FX-pcihost/pci-bus-pc/pci-bus/pci-ohci/pci-ohci-tests/ohci_pci-test-hotplug


The full log is available at
http://patchew.org/logs/20190731175702.4916-1-jan.bobek@gmail.com/testing.asan/?type=message.
---
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