From: Vignesh Raghavendra <vigneshr@ti.com> To: Miquel Raynal <miquel.raynal@bootlin.com>, Richard Weinberger <richard@nod.at>, Vignesh Raghavendra <vigneshr@ti.com>, Tudor Ambarus <tudor.ambarus@microchip.com> Cc: Marek Vasut <marek.vasut@gmail.com>, Boris Brezillon <bbrezillon@kernel.org>, <linux-kernel@vger.kernel.org>, <linux-mtd@lists.infradead.org> Subject: [PATCH v3 0/3] Merge m25p80 into spi-nor Date: Thu, 1 Aug 2019 10:00:49 +0530 [thread overview] Message-ID: <20190801043052.30192-1-vigneshr@ti.com> (raw) This is repost of patch 6 and 7 split from from Boris Brezillon's X-X-X mode support series[1] Background from cover letter for RFC[1]: m25p80 is just a simple SPI NOR controller driver (a wrapper around the SPI mem API). Not only it shouldn't be named after a specific SPI NOR chip, but it also doesn't deserve a specific driver IMO, especially if the end goal is to get rid of SPI NOR controller drivers found in drivers/mtd/spi-nor/ and replace them by SPI mem drivers (which would be placed in drivers/spi/). With this solution, we declare the SPI NOR driver as a spi_mem_driver, just like the SPI NAND layer is declared as a spi_mem driver (patch 1/2). This solution also allows us to check at a fined-grain level (thanks to the spi_mem_supports_op() function) which operations are supported and which ones are not, while the original m25p80 logic was basing this decision on the SPI_{RX,TX}_{DUAL,QUAD,OCTO} flags only (patch 2/2). [1] https://patchwork.ozlabs.org/cover/982926/ Tested on TI' DRA7xx EVM with TI QSPI controller (a spi-mem driver) with DMA (s25fl256) flash. I don't see any performance regression due to bounce buffer copy introduced by this series Also tested with cadence-quadspi (a spi-nor driver) driver Boris Brezillon (2): mtd: spi-nor: Move m25p80 code in spi-nor.c mtd: spi-nor: Rework hwcaps selection for the spi-mem case Vignesh Raghavendra (1): mtd: spi-nor: always use bounce buffer for register read/writes drivers/mtd/devices/Kconfig | 18 - drivers/mtd/devices/Makefile | 1 - drivers/mtd/devices/m25p80.c | 347 --------------- drivers/mtd/spi-nor/Kconfig | 2 + drivers/mtd/spi-nor/spi-nor.c | 802 +++++++++++++++++++++++++++++++--- include/linux/mtd/spi-nor.h | 24 +- 6 files changed, 769 insertions(+), 425 deletions(-) delete mode 100644 drivers/mtd/devices/m25p80.c -- 2.22.0
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From: Vignesh Raghavendra <vigneshr@ti.com> To: Miquel Raynal <miquel.raynal@bootlin.com>, Richard Weinberger <richard@nod.at>, Vignesh Raghavendra <vigneshr@ti.com>, Tudor Ambarus <tudor.ambarus@microchip.com> Cc: Marek Vasut <marek.vasut@gmail.com>, linux-mtd@lists.infradead.org, linux-kernel@vger.kernel.org, Boris Brezillon <bbrezillon@kernel.org> Subject: [PATCH v3 0/3] Merge m25p80 into spi-nor Date: Thu, 1 Aug 2019 10:00:49 +0530 [thread overview] Message-ID: <20190801043052.30192-1-vigneshr@ti.com> (raw) This is repost of patch 6 and 7 split from from Boris Brezillon's X-X-X mode support series[1] Background from cover letter for RFC[1]: m25p80 is just a simple SPI NOR controller driver (a wrapper around the SPI mem API). Not only it shouldn't be named after a specific SPI NOR chip, but it also doesn't deserve a specific driver IMO, especially if the end goal is to get rid of SPI NOR controller drivers found in drivers/mtd/spi-nor/ and replace them by SPI mem drivers (which would be placed in drivers/spi/). With this solution, we declare the SPI NOR driver as a spi_mem_driver, just like the SPI NAND layer is declared as a spi_mem driver (patch 1/2). This solution also allows us to check at a fined-grain level (thanks to the spi_mem_supports_op() function) which operations are supported and which ones are not, while the original m25p80 logic was basing this decision on the SPI_{RX,TX}_{DUAL,QUAD,OCTO} flags only (patch 2/2). [1] https://patchwork.ozlabs.org/cover/982926/ Tested on TI' DRA7xx EVM with TI QSPI controller (a spi-mem driver) with DMA (s25fl256) flash. I don't see any performance regression due to bounce buffer copy introduced by this series Also tested with cadence-quadspi (a spi-nor driver) driver Boris Brezillon (2): mtd: spi-nor: Move m25p80 code in spi-nor.c mtd: spi-nor: Rework hwcaps selection for the spi-mem case Vignesh Raghavendra (1): mtd: spi-nor: always use bounce buffer for register read/writes drivers/mtd/devices/Kconfig | 18 - drivers/mtd/devices/Makefile | 1 - drivers/mtd/devices/m25p80.c | 347 --------------- drivers/mtd/spi-nor/Kconfig | 2 + drivers/mtd/spi-nor/spi-nor.c | 802 +++++++++++++++++++++++++++++++--- include/linux/mtd/spi-nor.h | 24 +- 6 files changed, 769 insertions(+), 425 deletions(-) delete mode 100644 drivers/mtd/devices/m25p80.c -- 2.22.0 ______________________________________________________ Linux MTD discussion mailing list http://lists.infradead.org/mailman/listinfo/linux-mtd/
next reply other threads:[~2019-08-01 4:30 UTC|newest] Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top 2019-08-01 4:30 Vignesh Raghavendra [this message] 2019-08-01 4:30 ` [PATCH v3 0/3] Merge m25p80 into spi-nor Vignesh Raghavendra 2019-08-01 4:30 ` [PATCH v3 1/3] mtd: spi-nor: always use bounce buffer for register read/writes Vignesh Raghavendra 2019-08-01 4:30 ` Vignesh Raghavendra 2019-08-01 5:46 ` Boris Brezillon 2019-08-01 5:46 ` Boris Brezillon 2019-08-01 6:45 ` Vignesh Raghavendra 2019-08-01 6:45 ` Vignesh Raghavendra 2019-08-01 4:30 ` [PATCH v3 2/3] mtd: spi-nor: Move m25p80 code in spi-nor.c Vignesh Raghavendra 2019-08-01 4:30 ` Vignesh Raghavendra 2019-08-01 5:52 ` Boris Brezillon 2019-08-01 5:52 ` Boris Brezillon 2019-08-01 6:46 ` Vignesh Raghavendra 2019-08-01 6:46 ` Vignesh Raghavendra 2019-08-01 4:30 ` [PATCH v3 3/3] mtd: spi-nor: Rework hwcaps selection for the spi-mem case Vignesh Raghavendra 2019-08-01 4:30 ` Vignesh Raghavendra
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