* [CI 1/4] drm/i915/pmu: Make more struct i915_pmu centric
@ 2019-08-01 16:23 Tvrtko Ursulin
2019-08-01 16:23 ` [CI 2/4] drm/i915/pmu: Convert engine sampling to uncore mmio Tvrtko Ursulin
` (4 more replies)
0 siblings, 5 replies; 6+ messages in thread
From: Tvrtko Ursulin @ 2019-08-01 16:23 UTC (permalink / raw)
To: Intel-gfx
From: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Just tidy the code a bit by removing a sea of overly verbose i915->pmu.*.
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
---
drivers/gpu/drm/i915/i915_pmu.c | 194 +++++++++++++++++---------------
1 file changed, 104 insertions(+), 90 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_pmu.c b/drivers/gpu/drm/i915/i915_pmu.c
index eff86483bec0..12008966b00e 100644
--- a/drivers/gpu/drm/i915/i915_pmu.c
+++ b/drivers/gpu/drm/i915/i915_pmu.c
@@ -74,8 +74,9 @@ static unsigned int event_enabled_bit(struct perf_event *event)
return config_enabled_bit(event->attr.config);
}
-static bool pmu_needs_timer(struct drm_i915_private *i915, bool gpu_active)
+static bool pmu_needs_timer(struct i915_pmu *pmu, bool gpu_active)
{
+ struct drm_i915_private *i915 = container_of(pmu, typeof(*i915), pmu);
u64 enable;
/*
@@ -83,7 +84,7 @@ static bool pmu_needs_timer(struct drm_i915_private *i915, bool gpu_active)
*
* We start with a bitmask of all currently enabled events.
*/
- enable = i915->pmu.enable;
+ enable = pmu->enable;
/*
* Mask out all the ones which do not need the timer, or in
@@ -114,24 +115,26 @@ static bool pmu_needs_timer(struct drm_i915_private *i915, bool gpu_active)
void i915_pmu_gt_parked(struct drm_i915_private *i915)
{
- if (!i915->pmu.base.event_init)
+ struct i915_pmu *pmu = &i915->pmu;
+
+ if (!pmu->base.event_init)
return;
- spin_lock_irq(&i915->pmu.lock);
+ spin_lock_irq(&pmu->lock);
/*
* Signal sampling timer to stop if only engine events are enabled and
* GPU went idle.
*/
- i915->pmu.timer_enabled = pmu_needs_timer(i915, false);
- spin_unlock_irq(&i915->pmu.lock);
+ pmu->timer_enabled = pmu_needs_timer(pmu, false);
+ spin_unlock_irq(&pmu->lock);
}
-static void __i915_pmu_maybe_start_timer(struct drm_i915_private *i915)
+static void __i915_pmu_maybe_start_timer(struct i915_pmu *pmu)
{
- if (!i915->pmu.timer_enabled && pmu_needs_timer(i915, true)) {
- i915->pmu.timer_enabled = true;
- i915->pmu.timer_last = ktime_get();
- hrtimer_start_range_ns(&i915->pmu.timer,
+ if (!pmu->timer_enabled && pmu_needs_timer(pmu, true)) {
+ pmu->timer_enabled = true;
+ pmu->timer_last = ktime_get();
+ hrtimer_start_range_ns(&pmu->timer,
ns_to_ktime(PERIOD), 0,
HRTIMER_MODE_REL_PINNED);
}
@@ -139,15 +142,17 @@ static void __i915_pmu_maybe_start_timer(struct drm_i915_private *i915)
void i915_pmu_gt_unparked(struct drm_i915_private *i915)
{
- if (!i915->pmu.base.event_init)
+ struct i915_pmu *pmu = &i915->pmu;
+
+ if (!pmu->base.event_init)
return;
- spin_lock_irq(&i915->pmu.lock);
+ spin_lock_irq(&pmu->lock);
/*
* Re-enable sampling timer when GPU goes active.
*/
- __i915_pmu_maybe_start_timer(i915);
- spin_unlock_irq(&i915->pmu.lock);
+ __i915_pmu_maybe_start_timer(pmu);
+ spin_unlock_irq(&pmu->lock);
}
static void
@@ -251,15 +256,16 @@ static enum hrtimer_restart i915_sample(struct hrtimer *hrtimer)
{
struct drm_i915_private *i915 =
container_of(hrtimer, struct drm_i915_private, pmu.timer);
+ struct i915_pmu *pmu = &i915->pmu;
unsigned int period_ns;
ktime_t now;
- if (!READ_ONCE(i915->pmu.timer_enabled))
+ if (!READ_ONCE(pmu->timer_enabled))
return HRTIMER_NORESTART;
now = ktime_get();
- period_ns = ktime_to_ns(ktime_sub(now, i915->pmu.timer_last));
- i915->pmu.timer_last = now;
+ period_ns = ktime_to_ns(ktime_sub(now, pmu->timer_last));
+ pmu->timer_last = now;
/*
* Strictly speaking the passed in period may not be 100% accurate for
@@ -443,6 +449,7 @@ static u64 get_rc6(struct drm_i915_private *i915)
{
#if IS_ENABLED(CONFIG_PM)
struct intel_runtime_pm *rpm = &i915->runtime_pm;
+ struct i915_pmu *pmu = &i915->pmu;
intel_wakeref_t wakeref;
unsigned long flags;
u64 val;
@@ -458,16 +465,16 @@ static u64 get_rc6(struct drm_i915_private *i915)
* previously.
*/
- spin_lock_irqsave(&i915->pmu.lock, flags);
+ spin_lock_irqsave(&pmu->lock, flags);
- if (val >= i915->pmu.sample[__I915_SAMPLE_RC6_ESTIMATED].cur) {
- i915->pmu.sample[__I915_SAMPLE_RC6_ESTIMATED].cur = 0;
- i915->pmu.sample[__I915_SAMPLE_RC6].cur = val;
+ if (val >= pmu->sample[__I915_SAMPLE_RC6_ESTIMATED].cur) {
+ pmu->sample[__I915_SAMPLE_RC6_ESTIMATED].cur = 0;
+ pmu->sample[__I915_SAMPLE_RC6].cur = val;
} else {
- val = i915->pmu.sample[__I915_SAMPLE_RC6_ESTIMATED].cur;
+ val = pmu->sample[__I915_SAMPLE_RC6_ESTIMATED].cur;
}
- spin_unlock_irqrestore(&i915->pmu.lock, flags);
+ spin_unlock_irqrestore(&pmu->lock, flags);
} else {
struct device *kdev = rpm->kdev;
@@ -478,7 +485,7 @@ static u64 get_rc6(struct drm_i915_private *i915)
* on top of the last known real value, as the approximated RC6
* counter value.
*/
- spin_lock_irqsave(&i915->pmu.lock, flags);
+ spin_lock_irqsave(&pmu->lock, flags);
/*
* After the above branch intel_runtime_pm_get_if_in_use failed
@@ -494,20 +501,20 @@ static u64 get_rc6(struct drm_i915_private *i915)
if (pm_runtime_status_suspended(kdev)) {
val = pm_runtime_suspended_time(kdev);
- if (!i915->pmu.sample[__I915_SAMPLE_RC6_ESTIMATED].cur)
- i915->pmu.suspended_time_last = val;
+ if (!pmu->sample[__I915_SAMPLE_RC6_ESTIMATED].cur)
+ pmu->suspended_time_last = val;
- val -= i915->pmu.suspended_time_last;
- val += i915->pmu.sample[__I915_SAMPLE_RC6].cur;
+ val -= pmu->suspended_time_last;
+ val += pmu->sample[__I915_SAMPLE_RC6].cur;
- i915->pmu.sample[__I915_SAMPLE_RC6_ESTIMATED].cur = val;
- } else if (i915->pmu.sample[__I915_SAMPLE_RC6_ESTIMATED].cur) {
- val = i915->pmu.sample[__I915_SAMPLE_RC6_ESTIMATED].cur;
+ pmu->sample[__I915_SAMPLE_RC6_ESTIMATED].cur = val;
+ } else if (pmu->sample[__I915_SAMPLE_RC6_ESTIMATED].cur) {
+ val = pmu->sample[__I915_SAMPLE_RC6_ESTIMATED].cur;
} else {
- val = i915->pmu.sample[__I915_SAMPLE_RC6].cur;
+ val = pmu->sample[__I915_SAMPLE_RC6].cur;
}
- spin_unlock_irqrestore(&i915->pmu.lock, flags);
+ spin_unlock_irqrestore(&pmu->lock, flags);
}
return val;
@@ -520,6 +527,7 @@ static u64 __i915_pmu_event_read(struct perf_event *event)
{
struct drm_i915_private *i915 =
container_of(event->pmu, typeof(*i915), pmu.base);
+ struct i915_pmu *pmu = &i915->pmu;
u64 val = 0;
if (is_engine_event(event)) {
@@ -542,12 +550,12 @@ static u64 __i915_pmu_event_read(struct perf_event *event)
switch (event->attr.config) {
case I915_PMU_ACTUAL_FREQUENCY:
val =
- div_u64(i915->pmu.sample[__I915_SAMPLE_FREQ_ACT].cur,
+ div_u64(pmu->sample[__I915_SAMPLE_FREQ_ACT].cur,
USEC_PER_SEC /* to MHz */);
break;
case I915_PMU_REQUESTED_FREQUENCY:
val =
- div_u64(i915->pmu.sample[__I915_SAMPLE_FREQ_REQ].cur,
+ div_u64(pmu->sample[__I915_SAMPLE_FREQ_REQ].cur,
USEC_PER_SEC /* to MHz */);
break;
case I915_PMU_INTERRUPTS:
@@ -582,24 +590,25 @@ static void i915_pmu_enable(struct perf_event *event)
struct drm_i915_private *i915 =
container_of(event->pmu, typeof(*i915), pmu.base);
unsigned int bit = event_enabled_bit(event);
+ struct i915_pmu *pmu = &i915->pmu;
unsigned long flags;
- spin_lock_irqsave(&i915->pmu.lock, flags);
+ spin_lock_irqsave(&pmu->lock, flags);
/*
* Update the bitmask of enabled events and increment
* the event reference counter.
*/
- BUILD_BUG_ON(ARRAY_SIZE(i915->pmu.enable_count) != I915_PMU_MASK_BITS);
- GEM_BUG_ON(bit >= ARRAY_SIZE(i915->pmu.enable_count));
- GEM_BUG_ON(i915->pmu.enable_count[bit] == ~0);
- i915->pmu.enable |= BIT_ULL(bit);
- i915->pmu.enable_count[bit]++;
+ BUILD_BUG_ON(ARRAY_SIZE(pmu->enable_count) != I915_PMU_MASK_BITS);
+ GEM_BUG_ON(bit >= ARRAY_SIZE(pmu->enable_count));
+ GEM_BUG_ON(pmu->enable_count[bit] == ~0);
+ pmu->enable |= BIT_ULL(bit);
+ pmu->enable_count[bit]++;
/*
* Start the sampling timer if needed and not already enabled.
*/
- __i915_pmu_maybe_start_timer(i915);
+ __i915_pmu_maybe_start_timer(pmu);
/*
* For per-engine events the bitmask and reference counting
@@ -625,7 +634,7 @@ static void i915_pmu_enable(struct perf_event *event)
engine->pmu.enable_count[sample]++;
}
- spin_unlock_irqrestore(&i915->pmu.lock, flags);
+ spin_unlock_irqrestore(&pmu->lock, flags);
/*
* Store the current counter value so we can report the correct delta
@@ -640,9 +649,10 @@ static void i915_pmu_disable(struct perf_event *event)
struct drm_i915_private *i915 =
container_of(event->pmu, typeof(*i915), pmu.base);
unsigned int bit = event_enabled_bit(event);
+ struct i915_pmu *pmu = &i915->pmu;
unsigned long flags;
- spin_lock_irqsave(&i915->pmu.lock, flags);
+ spin_lock_irqsave(&pmu->lock, flags);
if (is_engine_event(event)) {
u8 sample = engine_event_sample(event);
@@ -664,18 +674,18 @@ static void i915_pmu_disable(struct perf_event *event)
engine->pmu.enable &= ~BIT(sample);
}
- GEM_BUG_ON(bit >= ARRAY_SIZE(i915->pmu.enable_count));
- GEM_BUG_ON(i915->pmu.enable_count[bit] == 0);
+ GEM_BUG_ON(bit >= ARRAY_SIZE(pmu->enable_count));
+ GEM_BUG_ON(pmu->enable_count[bit] == 0);
/*
* Decrement the reference count and clear the enabled
* bitmask when the last listener on an event goes away.
*/
- if (--i915->pmu.enable_count[bit] == 0) {
- i915->pmu.enable &= ~BIT_ULL(bit);
- i915->pmu.timer_enabled &= pmu_needs_timer(i915, true);
+ if (--pmu->enable_count[bit] == 0) {
+ pmu->enable &= ~BIT_ULL(bit);
+ pmu->timer_enabled &= pmu_needs_timer(pmu, true);
}
- spin_unlock_irqrestore(&i915->pmu.lock, flags);
+ spin_unlock_irqrestore(&pmu->lock, flags);
}
static void i915_pmu_event_start(struct perf_event *event, int flags)
@@ -824,8 +834,9 @@ add_pmu_attr(struct perf_pmu_events_attr *attr, const char *name,
}
static struct attribute **
-create_event_attributes(struct drm_i915_private *i915)
+create_event_attributes(struct i915_pmu *pmu)
{
+ struct drm_i915_private *i915 = container_of(pmu, typeof(*i915), pmu);
static const struct {
u64 config;
const char *name;
@@ -939,8 +950,8 @@ create_event_attributes(struct drm_i915_private *i915)
}
}
- i915->pmu.i915_attr = i915_attr;
- i915->pmu.pmu_attr = pmu_attr;
+ pmu->i915_attr = i915_attr;
+ pmu->pmu_attr = pmu_attr;
return attr;
@@ -956,7 +967,7 @@ err:;
return NULL;
}
-static void free_event_attributes(struct drm_i915_private *i915)
+static void free_event_attributes(struct i915_pmu *pmu)
{
struct attribute **attr_iter = i915_pmu_events_attr_group.attrs;
@@ -964,12 +975,12 @@ static void free_event_attributes(struct drm_i915_private *i915)
kfree((*attr_iter)->name);
kfree(i915_pmu_events_attr_group.attrs);
- kfree(i915->pmu.i915_attr);
- kfree(i915->pmu.pmu_attr);
+ kfree(pmu->i915_attr);
+ kfree(pmu->pmu_attr);
i915_pmu_events_attr_group.attrs = NULL;
- i915->pmu.i915_attr = NULL;
- i915->pmu.pmu_attr = NULL;
+ pmu->i915_attr = NULL;
+ pmu->pmu_attr = NULL;
}
static int i915_pmu_cpu_online(unsigned int cpu, struct hlist_node *node)
@@ -1006,7 +1017,7 @@ static int i915_pmu_cpu_offline(unsigned int cpu, struct hlist_node *node)
static enum cpuhp_state cpuhp_slot = CPUHP_INVALID;
-static int i915_pmu_register_cpuhp_state(struct drm_i915_private *i915)
+static int i915_pmu_register_cpuhp_state(struct i915_pmu *pmu)
{
enum cpuhp_state slot;
int ret;
@@ -1019,7 +1030,7 @@ static int i915_pmu_register_cpuhp_state(struct drm_i915_private *i915)
return ret;
slot = ret;
- ret = cpuhp_state_add_instance(slot, &i915->pmu.node);
+ ret = cpuhp_state_add_instance(slot, &pmu->node);
if (ret) {
cpuhp_remove_multi_state(slot);
return ret;
@@ -1029,15 +1040,16 @@ static int i915_pmu_register_cpuhp_state(struct drm_i915_private *i915)
return 0;
}
-static void i915_pmu_unregister_cpuhp_state(struct drm_i915_private *i915)
+static void i915_pmu_unregister_cpuhp_state(struct i915_pmu *pmu)
{
WARN_ON(cpuhp_slot == CPUHP_INVALID);
- WARN_ON(cpuhp_state_remove_instance(cpuhp_slot, &i915->pmu.node));
+ WARN_ON(cpuhp_state_remove_instance(cpuhp_slot, &pmu->node));
cpuhp_remove_multi_state(cpuhp_slot);
}
void i915_pmu_register(struct drm_i915_private *i915)
{
+ struct i915_pmu *pmu = &i915->pmu;
int ret;
if (INTEL_GEN(i915) <= 2) {
@@ -1045,56 +1057,58 @@ void i915_pmu_register(struct drm_i915_private *i915)
return;
}
- i915_pmu_events_attr_group.attrs = create_event_attributes(i915);
+ i915_pmu_events_attr_group.attrs = create_event_attributes(pmu);
if (!i915_pmu_events_attr_group.attrs) {
ret = -ENOMEM;
goto err;
}
- i915->pmu.base.attr_groups = i915_pmu_attr_groups;
- i915->pmu.base.task_ctx_nr = perf_invalid_context;
- i915->pmu.base.event_init = i915_pmu_event_init;
- i915->pmu.base.add = i915_pmu_event_add;
- i915->pmu.base.del = i915_pmu_event_del;
- i915->pmu.base.start = i915_pmu_event_start;
- i915->pmu.base.stop = i915_pmu_event_stop;
- i915->pmu.base.read = i915_pmu_event_read;
- i915->pmu.base.event_idx = i915_pmu_event_event_idx;
-
- spin_lock_init(&i915->pmu.lock);
- hrtimer_init(&i915->pmu.timer, CLOCK_MONOTONIC, HRTIMER_MODE_REL);
- i915->pmu.timer.function = i915_sample;
-
- ret = perf_pmu_register(&i915->pmu.base, "i915", -1);
+ pmu->base.attr_groups = i915_pmu_attr_groups;
+ pmu->base.task_ctx_nr = perf_invalid_context;
+ pmu->base.event_init = i915_pmu_event_init;
+ pmu->base.add = i915_pmu_event_add;
+ pmu->base.del = i915_pmu_event_del;
+ pmu->base.start = i915_pmu_event_start;
+ pmu->base.stop = i915_pmu_event_stop;
+ pmu->base.read = i915_pmu_event_read;
+ pmu->base.event_idx = i915_pmu_event_event_idx;
+
+ spin_lock_init(&pmu->lock);
+ hrtimer_init(&pmu->timer, CLOCK_MONOTONIC, HRTIMER_MODE_REL);
+ pmu->timer.function = i915_sample;
+
+ ret = perf_pmu_register(&pmu->base, "i915", -1);
if (ret)
goto err;
- ret = i915_pmu_register_cpuhp_state(i915);
+ ret = i915_pmu_register_cpuhp_state(pmu);
if (ret)
goto err_unreg;
return;
err_unreg:
- perf_pmu_unregister(&i915->pmu.base);
+ perf_pmu_unregister(&pmu->base);
err:
- i915->pmu.base.event_init = NULL;
- free_event_attributes(i915);
+ pmu->base.event_init = NULL;
+ free_event_attributes(pmu);
DRM_NOTE("Failed to register PMU! (err=%d)\n", ret);
}
void i915_pmu_unregister(struct drm_i915_private *i915)
{
- if (!i915->pmu.base.event_init)
+ struct i915_pmu *pmu = &i915->pmu;
+
+ if (!pmu->base.event_init)
return;
- WARN_ON(i915->pmu.enable);
+ WARN_ON(pmu->enable);
- hrtimer_cancel(&i915->pmu.timer);
+ hrtimer_cancel(&pmu->timer);
- i915_pmu_unregister_cpuhp_state(i915);
+ i915_pmu_unregister_cpuhp_state(pmu);
- perf_pmu_unregister(&i915->pmu.base);
- i915->pmu.base.event_init = NULL;
- free_event_attributes(i915);
+ perf_pmu_unregister(&pmu->base);
+ pmu->base.event_init = NULL;
+ free_event_attributes(pmu);
}
--
2.20.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 6+ messages in thread
* [CI 2/4] drm/i915/pmu: Convert engine sampling to uncore mmio
2019-08-01 16:23 [CI 1/4] drm/i915/pmu: Make more struct i915_pmu centric Tvrtko Ursulin
@ 2019-08-01 16:23 ` Tvrtko Ursulin
2019-08-01 16:23 ` [CI 3/4] drm/i915/pmu: Convert sampling to gt Tvrtko Ursulin
` (3 subsequent siblings)
4 siblings, 0 replies; 6+ messages in thread
From: Tvrtko Ursulin @ 2019-08-01 16:23 UTC (permalink / raw)
To: Intel-gfx
From: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Drops one macro using implicit dev_priv.
v2:
* Use ENGINE_READ_FW. (Chris)
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
---
drivers/gpu/drm/i915/i915_pmu.c | 21 +++++++++++----------
1 file changed, 11 insertions(+), 10 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_pmu.c b/drivers/gpu/drm/i915/i915_pmu.c
index 12008966b00e..09265b6b78b2 100644
--- a/drivers/gpu/drm/i915/i915_pmu.c
+++ b/drivers/gpu/drm/i915/i915_pmu.c
@@ -162,29 +162,30 @@ add_sample(struct i915_pmu_sample *sample, u32 val)
}
static void
-engines_sample(struct drm_i915_private *dev_priv, unsigned int period_ns)
+engines_sample(struct drm_i915_private *i915, unsigned int period_ns)
{
+ struct intel_uncore *uncore = &i915->uncore;
struct intel_engine_cs *engine;
enum intel_engine_id id;
intel_wakeref_t wakeref;
unsigned long flags;
- if ((dev_priv->pmu.enable & ENGINE_SAMPLE_MASK) == 0)
+ if ((i915->pmu.enable & ENGINE_SAMPLE_MASK) == 0)
return;
wakeref = 0;
- if (READ_ONCE(dev_priv->gt.awake))
- wakeref = intel_runtime_pm_get_if_in_use(&dev_priv->runtime_pm);
+ if (READ_ONCE(i915->gt.awake))
+ wakeref = intel_runtime_pm_get_if_in_use(&i915->runtime_pm);
if (!wakeref)
return;
- spin_lock_irqsave(&dev_priv->uncore.lock, flags);
- for_each_engine(engine, dev_priv, id) {
+ spin_lock_irqsave(&uncore->lock, flags);
+ for_each_engine(engine, i915, id) {
struct intel_engine_pmu *pmu = &engine->pmu;
bool busy;
u32 val;
- val = I915_READ_FW(RING_CTL(engine->mmio_base));
+ val = ENGINE_READ_FW(engine, RING_CTL);
if (val == 0) /* powerwell off => engine idle */
continue;
@@ -202,15 +203,15 @@ engines_sample(struct drm_i915_private *dev_priv, unsigned int period_ns)
*/
busy = val & (RING_WAIT_SEMAPHORE | RING_WAIT);
if (!busy) {
- val = I915_READ_FW(RING_MI_MODE(engine->mmio_base));
+ val = ENGINE_READ_FW(engine, RING_MI_MODE);
busy = !(val & MODE_IDLE);
}
if (busy)
add_sample(&pmu->sample[I915_SAMPLE_BUSY], period_ns);
}
- spin_unlock_irqrestore(&dev_priv->uncore.lock, flags);
+ spin_unlock_irqrestore(&uncore->lock, flags);
- intel_runtime_pm_put(&dev_priv->runtime_pm, wakeref);
+ intel_runtime_pm_put(&i915->runtime_pm, wakeref);
}
static void
--
2.20.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 6+ messages in thread
* [CI 3/4] drm/i915/pmu: Convert sampling to gt
2019-08-01 16:23 [CI 1/4] drm/i915/pmu: Make more struct i915_pmu centric Tvrtko Ursulin
2019-08-01 16:23 ` [CI 2/4] drm/i915/pmu: Convert engine sampling to uncore mmio Tvrtko Ursulin
@ 2019-08-01 16:23 ` Tvrtko Ursulin
2019-08-01 16:23 ` [CI 4/4] drm/i915/pmu: Make get_rc6 take intel_gt Tvrtko Ursulin
` (2 subsequent siblings)
4 siblings, 0 replies; 6+ messages in thread
From: Tvrtko Ursulin @ 2019-08-01 16:23 UTC (permalink / raw)
To: Intel-gfx
From: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Engines and frequencies are a GT thing so adjust sampling routines to
match.
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
---
drivers/gpu/drm/i915/i915_pmu.c | 43 ++++++++++++++++++---------------
1 file changed, 23 insertions(+), 20 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_pmu.c b/drivers/gpu/drm/i915/i915_pmu.c
index 09265b6b78b2..5cf9a47a0c43 100644
--- a/drivers/gpu/drm/i915/i915_pmu.c
+++ b/drivers/gpu/drm/i915/i915_pmu.c
@@ -162,9 +162,10 @@ add_sample(struct i915_pmu_sample *sample, u32 val)
}
static void
-engines_sample(struct drm_i915_private *i915, unsigned int period_ns)
+engines_sample(struct intel_gt *gt, unsigned int period_ns)
{
- struct intel_uncore *uncore = &i915->uncore;
+ struct drm_i915_private *i915 = gt->i915;
+ struct intel_uncore *uncore = gt->uncore;
struct intel_engine_cs *engine;
enum intel_engine_id id;
intel_wakeref_t wakeref;
@@ -174,7 +175,7 @@ engines_sample(struct drm_i915_private *i915, unsigned int period_ns)
return;
wakeref = 0;
- if (READ_ONCE(i915->gt.awake))
+ if (READ_ONCE(gt->awake))
wakeref = intel_runtime_pm_get_if_in_use(&i915->runtime_pm);
if (!wakeref)
return;
@@ -221,34 +222,35 @@ add_sample_mult(struct i915_pmu_sample *sample, u32 val, u32 mul)
}
static void
-frequency_sample(struct drm_i915_private *dev_priv, unsigned int period_ns)
+frequency_sample(struct intel_gt *gt, unsigned int period_ns)
{
- if (dev_priv->pmu.enable &
- config_enabled_mask(I915_PMU_ACTUAL_FREQUENCY)) {
+ struct drm_i915_private *i915 = gt->i915;
+ struct intel_uncore *uncore = gt->uncore;
+ struct i915_pmu *pmu = &i915->pmu;
+
+ if (pmu->enable & config_enabled_mask(I915_PMU_ACTUAL_FREQUENCY)) {
u32 val;
- val = dev_priv->gt_pm.rps.cur_freq;
- if (dev_priv->gt.awake) {
+ val = i915->gt_pm.rps.cur_freq;
+ if (gt->awake) {
intel_wakeref_t wakeref;
- with_intel_runtime_pm_if_in_use(&dev_priv->runtime_pm,
+ with_intel_runtime_pm_if_in_use(&i915->runtime_pm,
wakeref) {
- val = intel_uncore_read_notrace(&dev_priv->uncore,
+ val = intel_uncore_read_notrace(uncore,
GEN6_RPSTAT1);
- val = intel_get_cagf(dev_priv, val);
+ val = intel_get_cagf(i915, val);
}
}
- add_sample_mult(&dev_priv->pmu.sample[__I915_SAMPLE_FREQ_ACT],
- intel_gpu_freq(dev_priv, val),
+ add_sample_mult(&pmu->sample[__I915_SAMPLE_FREQ_ACT],
+ intel_gpu_freq(i915, val),
period_ns / 1000);
}
- if (dev_priv->pmu.enable &
- config_enabled_mask(I915_PMU_REQUESTED_FREQUENCY)) {
- add_sample_mult(&dev_priv->pmu.sample[__I915_SAMPLE_FREQ_REQ],
- intel_gpu_freq(dev_priv,
- dev_priv->gt_pm.rps.cur_freq),
+ if (pmu->enable & config_enabled_mask(I915_PMU_REQUESTED_FREQUENCY)) {
+ add_sample_mult(&pmu->sample[__I915_SAMPLE_FREQ_REQ],
+ intel_gpu_freq(i915, i915->gt_pm.rps.cur_freq),
period_ns / 1000);
}
}
@@ -258,6 +260,7 @@ static enum hrtimer_restart i915_sample(struct hrtimer *hrtimer)
struct drm_i915_private *i915 =
container_of(hrtimer, struct drm_i915_private, pmu.timer);
struct i915_pmu *pmu = &i915->pmu;
+ struct intel_gt *gt = &i915->gt;
unsigned int period_ns;
ktime_t now;
@@ -274,8 +277,8 @@ static enum hrtimer_restart i915_sample(struct hrtimer *hrtimer)
* grabbing the forcewake. However the potential error from timer call-
* back delay greatly dominates this so we keep it simple.
*/
- engines_sample(i915, period_ns);
- frequency_sample(i915, period_ns);
+ engines_sample(gt, period_ns);
+ frequency_sample(gt, period_ns);
hrtimer_forward(hrtimer, now, ns_to_ktime(PERIOD));
--
2.20.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 6+ messages in thread
* [CI 4/4] drm/i915/pmu: Make get_rc6 take intel_gt
2019-08-01 16:23 [CI 1/4] drm/i915/pmu: Make more struct i915_pmu centric Tvrtko Ursulin
2019-08-01 16:23 ` [CI 2/4] drm/i915/pmu: Convert engine sampling to uncore mmio Tvrtko Ursulin
2019-08-01 16:23 ` [CI 3/4] drm/i915/pmu: Convert sampling to gt Tvrtko Ursulin
@ 2019-08-01 16:23 ` Tvrtko Ursulin
2019-08-01 22:23 ` ✓ Fi.CI.BAT: success for series starting with [CI,1/4] drm/i915/pmu: Make more struct i915_pmu centric Patchwork
2019-08-02 18:06 ` ✓ Fi.CI.IGT: " Patchwork
4 siblings, 0 replies; 6+ messages in thread
From: Tvrtko Ursulin @ 2019-08-01 16:23 UTC (permalink / raw)
To: Intel-gfx
From: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
RC6 is a GT state so make the function parameter reflect that.
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
---
drivers/gpu/drm/i915/i915_pmu.c | 12 +++++++-----
1 file changed, 7 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_pmu.c b/drivers/gpu/drm/i915/i915_pmu.c
index 5cf9a47a0c43..e0e0180bca7c 100644
--- a/drivers/gpu/drm/i915/i915_pmu.c
+++ b/drivers/gpu/drm/i915/i915_pmu.c
@@ -431,8 +431,9 @@ static int i915_pmu_event_init(struct perf_event *event)
return 0;
}
-static u64 __get_rc6(struct drm_i915_private *i915)
+static u64 __get_rc6(struct intel_gt *gt)
{
+ struct drm_i915_private *i915 = gt->i915;
u64 val;
val = intel_rc6_residency_ns(i915,
@@ -449,9 +450,10 @@ static u64 __get_rc6(struct drm_i915_private *i915)
return val;
}
-static u64 get_rc6(struct drm_i915_private *i915)
+static u64 get_rc6(struct intel_gt *gt)
{
#if IS_ENABLED(CONFIG_PM)
+ struct drm_i915_private *i915 = gt->i915;
struct intel_runtime_pm *rpm = &i915->runtime_pm;
struct i915_pmu *pmu = &i915->pmu;
intel_wakeref_t wakeref;
@@ -460,7 +462,7 @@ static u64 get_rc6(struct drm_i915_private *i915)
wakeref = intel_runtime_pm_get_if_in_use(rpm);
if (wakeref) {
- val = __get_rc6(i915);
+ val = __get_rc6(gt);
intel_runtime_pm_put(rpm, wakeref);
/*
@@ -523,7 +525,7 @@ static u64 get_rc6(struct drm_i915_private *i915)
return val;
#else
- return __get_rc6(i915);
+ return __get_rc6(gt);
#endif
}
@@ -566,7 +568,7 @@ static u64 __i915_pmu_event_read(struct perf_event *event)
val = count_interrupts(i915);
break;
case I915_PMU_RC6_RESIDENCY:
- val = get_rc6(i915);
+ val = get_rc6(&i915->gt);
break;
}
}
--
2.20.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 6+ messages in thread
* ✓ Fi.CI.BAT: success for series starting with [CI,1/4] drm/i915/pmu: Make more struct i915_pmu centric
2019-08-01 16:23 [CI 1/4] drm/i915/pmu: Make more struct i915_pmu centric Tvrtko Ursulin
` (2 preceding siblings ...)
2019-08-01 16:23 ` [CI 4/4] drm/i915/pmu: Make get_rc6 take intel_gt Tvrtko Ursulin
@ 2019-08-01 22:23 ` Patchwork
2019-08-02 18:06 ` ✓ Fi.CI.IGT: " Patchwork
4 siblings, 0 replies; 6+ messages in thread
From: Patchwork @ 2019-08-01 22:23 UTC (permalink / raw)
To: Tvrtko Ursulin; +Cc: intel-gfx
== Series Details ==
Series: series starting with [CI,1/4] drm/i915/pmu: Make more struct i915_pmu centric
URL : https://patchwork.freedesktop.org/series/64557/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6606 -> Patchwork_13841
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13841/
Known issues
------------
Here are the changes found in Patchwork_13841 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@i915_pm_rpm@module-reload:
- fi-icl-dsi: [PASS][1] -> [INCOMPLETE][2] ([fdo#107713] / [fdo#108840])
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6606/fi-icl-dsi/igt@i915_pm_rpm@module-reload.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13841/fi-icl-dsi/igt@i915_pm_rpm@module-reload.html
* igt@kms_chamelium@common-hpd-after-suspend:
- fi-skl-6700k2: [PASS][3] -> [INCOMPLETE][4] ([fdo#104108])
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6606/fi-skl-6700k2/igt@kms_chamelium@common-hpd-after-suspend.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13841/fi-skl-6700k2/igt@kms_chamelium@common-hpd-after-suspend.html
* igt@prime_vgem@basic-busy-default:
- fi-bsw-kefka: [PASS][5] -> [FAIL][6] ([fdo#111277])
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6606/fi-bsw-kefka/igt@prime_vgem@basic-busy-default.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13841/fi-bsw-kefka/igt@prime_vgem@basic-busy-default.html
- fi-bxt-j4205: [PASS][7] -> [FAIL][8] ([fdo#111277])
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6606/fi-bxt-j4205/igt@prime_vgem@basic-busy-default.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13841/fi-bxt-j4205/igt@prime_vgem@basic-busy-default.html
* igt@prime_vgem@basic-fence-mmap:
- fi-byt-j1900: [PASS][9] -> [INCOMPLETE][10] ([fdo#102657] / [fdo#111276])
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6606/fi-byt-j1900/igt@prime_vgem@basic-fence-mmap.html
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13841/fi-byt-j1900/igt@prime_vgem@basic-fence-mmap.html
* igt@prime_vgem@basic-fence-read:
- fi-gdg-551: [PASS][11] -> [INCOMPLETE][12] ([fdo#108316])
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6606/fi-gdg-551/igt@prime_vgem@basic-fence-read.html
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13841/fi-gdg-551/igt@prime_vgem@basic-fence-read.html
- fi-bwr-2160: [PASS][13] -> [INCOMPLETE][14] ([fdo#111278])
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6606/fi-bwr-2160/igt@prime_vgem@basic-fence-read.html
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13841/fi-bwr-2160/igt@prime_vgem@basic-fence-read.html
* igt@prime_vgem@basic-write:
- fi-icl-u3: [PASS][15] -> [DMESG-WARN][16] ([fdo#107724])
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6606/fi-icl-u3/igt@prime_vgem@basic-write.html
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13841/fi-icl-u3/igt@prime_vgem@basic-write.html
#### Possible fixes ####
* {igt@gem_ctx_switch@legacy-render}:
- fi-icl-u2: [INCOMPLETE][17] ([fdo#107713]) -> [PASS][18]
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6606/fi-icl-u2/igt@gem_ctx_switch@legacy-render.html
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13841/fi-icl-u2/igt@gem_ctx_switch@legacy-render.html
* igt@i915_selftest@live_execlists:
- fi-skl-gvtdvm: [DMESG-FAIL][19] ([fdo#111108]) -> [PASS][20]
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6606/fi-skl-gvtdvm/igt@i915_selftest@live_execlists.html
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13841/fi-skl-gvtdvm/igt@i915_selftest@live_execlists.html
* igt@kms_busy@basic-flip-a:
- fi-kbl-7567u: [SKIP][21] ([fdo#109271] / [fdo#109278]) -> [PASS][22] +2 similar issues
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6606/fi-kbl-7567u/igt@kms_busy@basic-flip-a.html
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13841/fi-kbl-7567u/igt@kms_busy@basic-flip-a.html
* igt@kms_busy@basic-flip-c:
- fi-kbl-7500u: [SKIP][23] ([fdo#109271] / [fdo#109278]) -> [PASS][24] +2 similar issues
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6606/fi-kbl-7500u/igt@kms_busy@basic-flip-c.html
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13841/fi-kbl-7500u/igt@kms_busy@basic-flip-c.html
* igt@kms_chamelium@common-hpd-after-suspend:
- fi-kbl-7567u: [WARN][25] ([fdo#109380]) -> [PASS][26]
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6606/fi-kbl-7567u/igt@kms_chamelium@common-hpd-after-suspend.html
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13841/fi-kbl-7567u/igt@kms_chamelium@common-hpd-after-suspend.html
* igt@kms_chamelium@dp-crc-fast:
- fi-cml-u2: [FAIL][27] ([fdo#110627]) -> [PASS][28]
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6606/fi-cml-u2/igt@kms_chamelium@dp-crc-fast.html
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13841/fi-cml-u2/igt@kms_chamelium@dp-crc-fast.html
* igt@kms_frontbuffer_tracking@basic:
- fi-hsw-peppy: [DMESG-WARN][29] ([fdo#102614]) -> [PASS][30]
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6606/fi-hsw-peppy/igt@kms_frontbuffer_tracking@basic.html
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13841/fi-hsw-peppy/igt@kms_frontbuffer_tracking@basic.html
* igt@kms_pipe_crc_basic@read-crc-pipe-c:
- fi-kbl-7567u: [SKIP][31] ([fdo#109271]) -> [PASS][32] +23 similar issues
[31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6606/fi-kbl-7567u/igt@kms_pipe_crc_basic@read-crc-pipe-c.html
[32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13841/fi-kbl-7567u/igt@kms_pipe_crc_basic@read-crc-pipe-c.html
* igt@prime_vgem@basic-fence-read:
- fi-byt-n2820: [INCOMPLETE][33] ([fdo#102657]) -> [PASS][34]
[33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6606/fi-byt-n2820/igt@prime_vgem@basic-fence-read.html
[34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13841/fi-byt-n2820/igt@prime_vgem@basic-fence-read.html
* igt@prime_vgem@basic-sync-default:
- fi-bxt-j4205: [FAIL][35] ([fdo#111277]) -> [PASS][36]
[35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6606/fi-bxt-j4205/igt@prime_vgem@basic-sync-default.html
[36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13841/fi-bxt-j4205/igt@prime_vgem@basic-sync-default.html
- fi-bxt-dsi: [FAIL][37] ([fdo#111277]) -> [PASS][38] +2 similar issues
[37]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6606/fi-bxt-dsi/igt@prime_vgem@basic-sync-default.html
[38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13841/fi-bxt-dsi/igt@prime_vgem@basic-sync-default.html
* igt@vgem_basic@mmap:
- fi-icl-u3: [DMESG-WARN][39] ([fdo#107724]) -> [PASS][40]
[39]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6606/fi-icl-u3/igt@vgem_basic@mmap.html
[40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13841/fi-icl-u3/igt@vgem_basic@mmap.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#102614]: https://bugs.freedesktop.org/show_bug.cgi?id=102614
[fdo#102657]: https://bugs.freedesktop.org/show_bug.cgi?id=102657
[fdo#104108]: https://bugs.freedesktop.org/show_bug.cgi?id=104108
[fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713
[fdo#107724]: https://bugs.freedesktop.org/show_bug.cgi?id=107724
[fdo#108316]: https://bugs.freedesktop.org/show_bug.cgi?id=108316
[fdo#108840]: https://bugs.freedesktop.org/show_bug.cgi?id=108840
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109278]: https://bugs.freedesktop.org/show_bug.cgi?id=109278
[fdo#109380]: https://bugs.freedesktop.org/show_bug.cgi?id=109380
[fdo#110627]: https://bugs.freedesktop.org/show_bug.cgi?id=110627
[fdo#111108]: https://bugs.freedesktop.org/show_bug.cgi?id=111108
[fdo#111276]: https://bugs.freedesktop.org/show_bug.cgi?id=111276
[fdo#111277]: https://bugs.freedesktop.org/show_bug.cgi?id=111277
[fdo#111278]: https://bugs.freedesktop.org/show_bug.cgi?id=111278
Participating hosts (49 -> 42)
------------------------------
Additional (1): fi-icl-u4
Missing (8): fi-kbl-soraka fi-bsw-n3050 fi-byt-squawks fi-bsw-cyan fi-pnv-d510 fi-icl-y fi-byt-clapper fi-bdw-samus
Build changes
-------------
* CI: CI-20190529 -> None
* Linux: CI_DRM_6606 -> Patchwork_13841
CI-20190529: 20190529
CI_DRM_6606: b6091dc42b9705654372566f410d49553a2c4051 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_5120: b3138fbea79d5d7935e53530b90efe3e816236f4 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_13841: b63c230ffcc2004a17405feab34990260bb25d44 @ git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
b63c230ffcc2 drm/i915/pmu: Make get_rc6 take intel_gt
53effd6577aa drm/i915/pmu: Convert sampling to gt
f26321f29eb5 drm/i915/pmu: Convert engine sampling to uncore mmio
d2df05d4cbab drm/i915/pmu: Make more struct i915_pmu centric
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13841/
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 6+ messages in thread
* ✓ Fi.CI.IGT: success for series starting with [CI,1/4] drm/i915/pmu: Make more struct i915_pmu centric
2019-08-01 16:23 [CI 1/4] drm/i915/pmu: Make more struct i915_pmu centric Tvrtko Ursulin
` (3 preceding siblings ...)
2019-08-01 22:23 ` ✓ Fi.CI.BAT: success for series starting with [CI,1/4] drm/i915/pmu: Make more struct i915_pmu centric Patchwork
@ 2019-08-02 18:06 ` Patchwork
4 siblings, 0 replies; 6+ messages in thread
From: Patchwork @ 2019-08-02 18:06 UTC (permalink / raw)
To: Tvrtko Ursulin; +Cc: intel-gfx
== Series Details ==
Series: series starting with [CI,1/4] drm/i915/pmu: Make more struct i915_pmu centric
URL : https://patchwork.freedesktop.org/series/64557/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6606_full -> Patchwork_13841_full
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Known issues
------------
Here are the changes found in Patchwork_13841_full that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_exec_schedule@preempt-queue-chain-vebox:
- shard-apl: [PASS][1] -> [INCOMPLETE][2] ([fdo#103927]) +1 similar issue
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6606/shard-apl4/igt@gem_exec_schedule@preempt-queue-chain-vebox.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13841/shard-apl5/igt@gem_exec_schedule@preempt-queue-chain-vebox.html
* igt@kms_busy@extended-pageflip-modeset-hang-oldfb-render-c:
- shard-iclb: [PASS][3] -> [INCOMPLETE][4] ([fdo#107713]) +2 similar issues
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6606/shard-iclb4/igt@kms_busy@extended-pageflip-modeset-hang-oldfb-render-c.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13841/shard-iclb1/igt@kms_busy@extended-pageflip-modeset-hang-oldfb-render-c.html
* igt@kms_cursor_crc@pipe-c-cursor-256x256-sliding:
- shard-skl: [PASS][5] -> [FAIL][6] ([fdo#103232])
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6606/shard-skl8/igt@kms_cursor_crc@pipe-c-cursor-256x256-sliding.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13841/shard-skl4/igt@kms_cursor_crc@pipe-c-cursor-256x256-sliding.html
* igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions:
- shard-skl: [PASS][7] -> [FAIL][8] ([fdo#102670])
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6606/shard-skl5/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13841/shard-skl1/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html
* igt@kms_flip@flip-vs-expired-vblank:
- shard-skl: [PASS][9] -> [FAIL][10] ([fdo#105363])
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6606/shard-skl7/igt@kms_flip@flip-vs-expired-vblank.html
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13841/shard-skl6/igt@kms_flip@flip-vs-expired-vblank.html
* igt@kms_flip@flip-vs-suspend:
- shard-skl: [PASS][11] -> [INCOMPLETE][12] ([fdo#109507])
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6606/shard-skl1/igt@kms_flip@flip-vs-suspend.html
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13841/shard-skl2/igt@kms_flip@flip-vs-suspend.html
* igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-shrfb-draw-pwrite:
- shard-iclb: [PASS][13] -> [FAIL][14] ([fdo#103167]) +4 similar issues
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6606/shard-iclb7/igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-shrfb-draw-pwrite.html
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13841/shard-iclb2/igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-shrfb-draw-pwrite.html
* igt@kms_plane@plane-panning-bottom-right-suspend-pipe-b-planes:
- shard-apl: [PASS][15] -> [DMESG-WARN][16] ([fdo#108566]) +1 similar issue
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6606/shard-apl5/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-b-planes.html
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13841/shard-apl3/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-b-planes.html
* igt@kms_plane_alpha_blend@pipe-b-coverage-7efc:
- shard-skl: [PASS][17] -> [FAIL][18] ([fdo#108145] / [fdo#110403])
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6606/shard-skl6/igt@kms_plane_alpha_blend@pipe-b-coverage-7efc.html
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13841/shard-skl5/igt@kms_plane_alpha_blend@pipe-b-coverage-7efc.html
* igt@kms_plane_multiple@atomic-pipe-c-tiling-yf:
- shard-skl: [PASS][19] -> [DMESG-WARN][20] ([fdo#106885])
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6606/shard-skl10/igt@kms_plane_multiple@atomic-pipe-c-tiling-yf.html
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13841/shard-skl8/igt@kms_plane_multiple@atomic-pipe-c-tiling-yf.html
* igt@kms_psr@psr2_sprite_mmap_gtt:
- shard-iclb: [PASS][21] -> [SKIP][22] ([fdo#109441]) +1 similar issue
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6606/shard-iclb2/igt@kms_psr@psr2_sprite_mmap_gtt.html
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13841/shard-iclb7/igt@kms_psr@psr2_sprite_mmap_gtt.html
* igt@perf@polling:
- shard-skl: [PASS][23] -> [FAIL][24] ([fdo#110728])
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6606/shard-skl3/igt@perf@polling.html
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13841/shard-skl2/igt@perf@polling.html
#### Possible fixes ####
* igt@gem_ctx_isolation@rcs0-s3:
- shard-kbl: [DMESG-WARN][25] ([fdo#108566]) -> [PASS][26] +6 similar issues
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6606/shard-kbl1/igt@gem_ctx_isolation@rcs0-s3.html
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13841/shard-kbl6/igt@gem_ctx_isolation@rcs0-s3.html
* igt@gem_exec_balancer@smoke:
- shard-iclb: [SKIP][27] ([fdo#110854]) -> [PASS][28]
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6606/shard-iclb7/igt@gem_exec_balancer@smoke.html
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13841/shard-iclb2/igt@gem_exec_balancer@smoke.html
* igt@gem_softpin@noreloc-s3:
- shard-apl: [DMESG-WARN][29] ([fdo#108566]) -> [PASS][30] +3 similar issues
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6606/shard-apl7/igt@gem_softpin@noreloc-s3.html
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13841/shard-apl1/igt@gem_softpin@noreloc-s3.html
* igt@kms_flip@flip-vs-expired-vblank-interruptible:
- shard-kbl: [FAIL][31] ([fdo#105363]) -> [PASS][32]
[31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6606/shard-kbl4/igt@kms_flip@flip-vs-expired-vblank-interruptible.html
[32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13841/shard-kbl3/igt@kms_flip@flip-vs-expired-vblank-interruptible.html
* igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-blt:
- shard-iclb: [FAIL][33] ([fdo#103167]) -> [PASS][34] +8 similar issues
[33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6606/shard-iclb7/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-blt.html
[34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13841/shard-iclb5/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-blt.html
* igt@kms_plane@plane-panning-bottom-right-suspend-pipe-c-planes:
- shard-skl: [INCOMPLETE][35] ([fdo#104108]) -> [PASS][36] +1 similar issue
[35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6606/shard-skl5/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-c-planes.html
[36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13841/shard-skl1/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-c-planes.html
* igt@kms_psr2_su@frontbuffer:
- shard-iclb: [SKIP][37] ([fdo#109642] / [fdo#111068]) -> [PASS][38]
[37]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6606/shard-iclb7/igt@kms_psr2_su@frontbuffer.html
[38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13841/shard-iclb2/igt@kms_psr2_su@frontbuffer.html
* igt@kms_psr@psr2_cursor_mmap_cpu:
- shard-iclb: [SKIP][39] ([fdo#109441]) -> [PASS][40] +3 similar issues
[39]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6606/shard-iclb8/igt@kms_psr@psr2_cursor_mmap_cpu.html
[40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13841/shard-iclb2/igt@kms_psr@psr2_cursor_mmap_cpu.html
[fdo#102670]: https://bugs.freedesktop.org/show_bug.cgi?id=102670
[fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167
[fdo#103232]: https://bugs.freedesktop.org/show_bug.cgi?id=103232
[fdo#103927]: https://bugs.freedesktop.org/show_bug.cgi?id=103927
[fdo#104108]: https://bugs.freedesktop.org/show_bug.cgi?id=104108
[fdo#105363]: https://bugs.freedesktop.org/show_bug.cgi?id=105363
[fdo#106885]: https://bugs.freedesktop.org/show_bug.cgi?id=106885
[fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713
[fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145
[fdo#108566]: https://bugs.freedesktop.org/show_bug.cgi?id=108566
[fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441
[fdo#109507]: https://bugs.freedesktop.org/show_bug.cgi?id=109507
[fdo#109642]: https://bugs.freedesktop.org/show_bug.cgi?id=109642
[fdo#110403]: https://bugs.freedesktop.org/show_bug.cgi?id=110403
[fdo#110728]: https://bugs.freedesktop.org/show_bug.cgi?id=110728
[fdo#110854]: https://bugs.freedesktop.org/show_bug.cgi?id=110854
[fdo#111068]: https://bugs.freedesktop.org/show_bug.cgi?id=111068
Participating hosts (10 -> 10)
------------------------------
No changes in participating hosts
Build changes
-------------
* CI: CI-20190529 -> None
* Linux: CI_DRM_6606 -> Patchwork_13841
CI-20190529: 20190529
CI_DRM_6606: b6091dc42b9705654372566f410d49553a2c4051 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_5120: b3138fbea79d5d7935e53530b90efe3e816236f4 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_13841: b63c230ffcc2004a17405feab34990260bb25d44 @ git://anongit.freedesktop.org/gfx-ci/linux
piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13841/
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 6+ messages in thread
end of thread, other threads:[~2019-08-02 18:06 UTC | newest]
Thread overview: 6+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2019-08-01 16:23 [CI 1/4] drm/i915/pmu: Make more struct i915_pmu centric Tvrtko Ursulin
2019-08-01 16:23 ` [CI 2/4] drm/i915/pmu: Convert engine sampling to uncore mmio Tvrtko Ursulin
2019-08-01 16:23 ` [CI 3/4] drm/i915/pmu: Convert sampling to gt Tvrtko Ursulin
2019-08-01 16:23 ` [CI 4/4] drm/i915/pmu: Make get_rc6 take intel_gt Tvrtko Ursulin
2019-08-01 22:23 ` ✓ Fi.CI.BAT: success for series starting with [CI,1/4] drm/i915/pmu: Make more struct i915_pmu centric Patchwork
2019-08-02 18:06 ` ✓ Fi.CI.IGT: " Patchwork
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.