* [CI] drm/i915: Isolate i915_getparam_ioctl()
@ 2019-08-07 14:20 Chris Wilson
2019-08-07 14:27 ` Rodrigo Vivi
` (3 more replies)
0 siblings, 4 replies; 5+ messages in thread
From: Chris Wilson @ 2019-08-07 14:20 UTC (permalink / raw)
To: intel-gfx
This giant switch has tendrils all other the struct and does not fit
into the rest of the driver bring up and control of i915_drv.c. Push it
to one side so that it can grow in peace.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Acked-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
---
drivers/gpu/drm/i915/Makefile | 1 +
drivers/gpu/drm/i915/i915_drv.c | 167 --------------------------
drivers/gpu/drm/i915/i915_drv.h | 3 +
drivers/gpu/drm/i915/i915_getparam.c | 168 +++++++++++++++++++++++++++
4 files changed, 172 insertions(+), 167 deletions(-)
create mode 100644 drivers/gpu/drm/i915/i915_getparam.c
diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
index 8fe157f71617..d9f1b23bdf77 100644
--- a/drivers/gpu/drm/i915/Makefile
+++ b/drivers/gpu/drm/i915/Makefile
@@ -41,6 +41,7 @@ subdir-ccflags-y += -I$(srctree)/$(src)
# core driver code
i915-y += i915_drv.o \
i915_irq.o \
+ i915_getparam.o \
i915_params.o \
i915_pci.o \
i915_scatterlist.o \
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index efe904626bf5..3480db36b63f 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -62,17 +62,12 @@
#include "gem/i915_gem_context.h"
#include "gem/i915_gem_ioctls.h"
-#include "gt/intel_engine_user.h"
#include "gt/intel_gt.h"
#include "gt/intel_gt_pm.h"
-#include "gt/intel_reset.h"
-#include "gt/intel_workarounds.h"
-#include "gt/uc/intel_uc.h"
#include "i915_debugfs.h"
#include "i915_drv.h"
#include "i915_irq.h"
-#include "i915_pmu.h"
#include "i915_query.h"
#include "i915_trace.h"
#include "i915_vgpu.h"
@@ -344,168 +339,6 @@ static void intel_detect_pch(struct drm_i915_private *dev_priv)
pci_dev_put(pch);
}
-static int i915_getparam_ioctl(struct drm_device *dev, void *data,
- struct drm_file *file_priv)
-{
- struct drm_i915_private *dev_priv = to_i915(dev);
- struct pci_dev *pdev = dev_priv->drm.pdev;
- const struct sseu_dev_info *sseu = &RUNTIME_INFO(dev_priv)->sseu;
- drm_i915_getparam_t *param = data;
- int value;
-
- switch (param->param) {
- case I915_PARAM_IRQ_ACTIVE:
- case I915_PARAM_ALLOW_BATCHBUFFER:
- case I915_PARAM_LAST_DISPATCH:
- case I915_PARAM_HAS_EXEC_CONSTANTS:
- /* Reject all old ums/dri params. */
- return -ENODEV;
- case I915_PARAM_CHIPSET_ID:
- value = pdev->device;
- break;
- case I915_PARAM_REVISION:
- value = pdev->revision;
- break;
- case I915_PARAM_NUM_FENCES_AVAIL:
- value = dev_priv->ggtt.num_fences;
- break;
- case I915_PARAM_HAS_OVERLAY:
- value = dev_priv->overlay ? 1 : 0;
- break;
- case I915_PARAM_HAS_BSD:
- value = !!intel_engine_lookup_user(dev_priv,
- I915_ENGINE_CLASS_VIDEO, 0);
- break;
- case I915_PARAM_HAS_BLT:
- value = !!intel_engine_lookup_user(dev_priv,
- I915_ENGINE_CLASS_COPY, 0);
- break;
- case I915_PARAM_HAS_VEBOX:
- value = !!intel_engine_lookup_user(dev_priv,
- I915_ENGINE_CLASS_VIDEO_ENHANCE, 0);
- break;
- case I915_PARAM_HAS_BSD2:
- value = !!intel_engine_lookup_user(dev_priv,
- I915_ENGINE_CLASS_VIDEO, 1);
- break;
- case I915_PARAM_HAS_LLC:
- value = HAS_LLC(dev_priv);
- break;
- case I915_PARAM_HAS_WT:
- value = HAS_WT(dev_priv);
- break;
- case I915_PARAM_HAS_ALIASING_PPGTT:
- value = INTEL_PPGTT(dev_priv);
- break;
- case I915_PARAM_HAS_SEMAPHORES:
- value = !!(dev_priv->caps.scheduler & I915_SCHEDULER_CAP_SEMAPHORES);
- break;
- case I915_PARAM_HAS_SECURE_BATCHES:
- value = capable(CAP_SYS_ADMIN);
- break;
- case I915_PARAM_CMD_PARSER_VERSION:
- value = i915_cmd_parser_get_version(dev_priv);
- break;
- case I915_PARAM_SUBSLICE_TOTAL:
- value = intel_sseu_subslice_total(sseu);
- if (!value)
- return -ENODEV;
- break;
- case I915_PARAM_EU_TOTAL:
- value = sseu->eu_total;
- if (!value)
- return -ENODEV;
- break;
- case I915_PARAM_HAS_GPU_RESET:
- value = i915_modparams.enable_hangcheck &&
- intel_has_gpu_reset(dev_priv);
- if (value && intel_has_reset_engine(dev_priv))
- value = 2;
- break;
- case I915_PARAM_HAS_RESOURCE_STREAMER:
- value = 0;
- break;
- case I915_PARAM_HAS_POOLED_EU:
- value = HAS_POOLED_EU(dev_priv);
- break;
- case I915_PARAM_MIN_EU_IN_POOL:
- value = sseu->min_eu_in_pool;
- break;
- case I915_PARAM_HUC_STATUS:
- value = intel_huc_check_status(&dev_priv->gt.uc.huc);
- if (value < 0)
- return value;
- break;
- case I915_PARAM_MMAP_GTT_VERSION:
- /* Though we've started our numbering from 1, and so class all
- * earlier versions as 0, in effect their value is undefined as
- * the ioctl will report EINVAL for the unknown param!
- */
- value = i915_gem_mmap_gtt_version();
- break;
- case I915_PARAM_HAS_SCHEDULER:
- value = dev_priv->caps.scheduler;
- break;
-
- case I915_PARAM_MMAP_VERSION:
- /* Remember to bump this if the version changes! */
- case I915_PARAM_HAS_GEM:
- case I915_PARAM_HAS_PAGEFLIPPING:
- case I915_PARAM_HAS_EXECBUF2: /* depends on GEM */
- case I915_PARAM_HAS_RELAXED_FENCING:
- case I915_PARAM_HAS_COHERENT_RINGS:
- case I915_PARAM_HAS_RELAXED_DELTA:
- case I915_PARAM_HAS_GEN7_SOL_RESET:
- case I915_PARAM_HAS_WAIT_TIMEOUT:
- case I915_PARAM_HAS_PRIME_VMAP_FLUSH:
- case I915_PARAM_HAS_PINNED_BATCHES:
- case I915_PARAM_HAS_EXEC_NO_RELOC:
- case I915_PARAM_HAS_EXEC_HANDLE_LUT:
- case I915_PARAM_HAS_COHERENT_PHYS_GTT:
- case I915_PARAM_HAS_EXEC_SOFTPIN:
- case I915_PARAM_HAS_EXEC_ASYNC:
- case I915_PARAM_HAS_EXEC_FENCE:
- case I915_PARAM_HAS_EXEC_CAPTURE:
- case I915_PARAM_HAS_EXEC_BATCH_FIRST:
- case I915_PARAM_HAS_EXEC_FENCE_ARRAY:
- case I915_PARAM_HAS_EXEC_SUBMIT_FENCE:
- /* For the time being all of these are always true;
- * if some supported hardware does not have one of these
- * features this value needs to be provided from
- * INTEL_INFO(), a feature macro, or similar.
- */
- value = 1;
- break;
- case I915_PARAM_HAS_CONTEXT_ISOLATION:
- value = intel_engines_has_context_isolation(dev_priv);
- break;
- case I915_PARAM_SLICE_MASK:
- value = sseu->slice_mask;
- if (!value)
- return -ENODEV;
- break;
- case I915_PARAM_SUBSLICE_MASK:
- value = sseu->subslice_mask[0];
- if (!value)
- return -ENODEV;
- break;
- case I915_PARAM_CS_TIMESTAMP_FREQUENCY:
- value = 1000 * RUNTIME_INFO(dev_priv)->cs_timestamp_frequency_khz;
- break;
- case I915_PARAM_MMAP_GTT_COHERENT:
- value = INTEL_INFO(dev_priv)->has_coherent_ggtt;
- break;
- default:
- DRM_DEBUG("Unknown parameter %d\n", param->param);
- return -EINVAL;
- }
-
- if (put_user(value, param->value))
- return -EFAULT;
-
- return 0;
-}
-
static int i915_get_bridge_dev(struct drm_i915_private *dev_priv)
{
int domain = pci_domain_nr(dev_priv->drm.pdev->bus);
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 7d424ddd3523..c9476f24f5c1 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -2397,6 +2397,9 @@ static inline bool intel_vgpu_active(struct drm_i915_private *dev_priv)
return dev_priv->vgpu.active;
}
+int i915_getparam_ioctl(struct drm_device *dev, void *data,
+ struct drm_file *file_priv);
+
/* i915_gem.c */
int i915_gem_init_userptr(struct drm_i915_private *dev_priv);
void i915_gem_cleanup_userptr(struct drm_i915_private *dev_priv);
diff --git a/drivers/gpu/drm/i915/i915_getparam.c b/drivers/gpu/drm/i915/i915_getparam.c
new file mode 100644
index 000000000000..5d9101376a3d
--- /dev/null
+++ b/drivers/gpu/drm/i915/i915_getparam.c
@@ -0,0 +1,168 @@
+/*
+ * SPDX-License-Identifier: MIT
+ */
+
+#include "gt/intel_engine_user.h"
+
+#include "i915_drv.h"
+
+int i915_getparam_ioctl(struct drm_device *dev, void *data,
+ struct drm_file *file_priv)
+{
+ struct drm_i915_private *i915 = to_i915(dev);
+ const struct sseu_dev_info *sseu = &RUNTIME_INFO(i915)->sseu;
+ drm_i915_getparam_t *param = data;
+ int value;
+
+ switch (param->param) {
+ case I915_PARAM_IRQ_ACTIVE:
+ case I915_PARAM_ALLOW_BATCHBUFFER:
+ case I915_PARAM_LAST_DISPATCH:
+ case I915_PARAM_HAS_EXEC_CONSTANTS:
+ /* Reject all old ums/dri params. */
+ return -ENODEV;
+ case I915_PARAM_CHIPSET_ID:
+ value = i915->drm.pdev->device;
+ break;
+ case I915_PARAM_REVISION:
+ value = i915->drm.pdev->revision;
+ break;
+ case I915_PARAM_NUM_FENCES_AVAIL:
+ value = i915->ggtt.num_fences;
+ break;
+ case I915_PARAM_HAS_OVERLAY:
+ value = !!i915->overlay;
+ break;
+ case I915_PARAM_HAS_BSD:
+ value = !!intel_engine_lookup_user(i915,
+ I915_ENGINE_CLASS_VIDEO, 0);
+ break;
+ case I915_PARAM_HAS_BLT:
+ value = !!intel_engine_lookup_user(i915,
+ I915_ENGINE_CLASS_COPY, 0);
+ break;
+ case I915_PARAM_HAS_VEBOX:
+ value = !!intel_engine_lookup_user(i915,
+ I915_ENGINE_CLASS_VIDEO_ENHANCE, 0);
+ break;
+ case I915_PARAM_HAS_BSD2:
+ value = !!intel_engine_lookup_user(i915,
+ I915_ENGINE_CLASS_VIDEO, 1);
+ break;
+ case I915_PARAM_HAS_LLC:
+ value = HAS_LLC(i915);
+ break;
+ case I915_PARAM_HAS_WT:
+ value = HAS_WT(i915);
+ break;
+ case I915_PARAM_HAS_ALIASING_PPGTT:
+ value = INTEL_PPGTT(i915);
+ break;
+ case I915_PARAM_HAS_SEMAPHORES:
+ value = !!(i915->caps.scheduler & I915_SCHEDULER_CAP_SEMAPHORES);
+ break;
+ case I915_PARAM_HAS_SECURE_BATCHES:
+ value = capable(CAP_SYS_ADMIN);
+ break;
+ case I915_PARAM_CMD_PARSER_VERSION:
+ value = i915_cmd_parser_get_version(i915);
+ break;
+ case I915_PARAM_SUBSLICE_TOTAL:
+ value = intel_sseu_subslice_total(sseu);
+ if (!value)
+ return -ENODEV;
+ break;
+ case I915_PARAM_EU_TOTAL:
+ value = sseu->eu_total;
+ if (!value)
+ return -ENODEV;
+ break;
+ case I915_PARAM_HAS_GPU_RESET:
+ value = i915_modparams.enable_hangcheck &&
+ intel_has_gpu_reset(i915);
+ if (value && intel_has_reset_engine(i915))
+ value = 2;
+ break;
+ case I915_PARAM_HAS_RESOURCE_STREAMER:
+ value = 0;
+ break;
+ case I915_PARAM_HAS_POOLED_EU:
+ value = HAS_POOLED_EU(i915);
+ break;
+ case I915_PARAM_MIN_EU_IN_POOL:
+ value = sseu->min_eu_in_pool;
+ break;
+ case I915_PARAM_HUC_STATUS:
+ value = intel_huc_check_status(&i915->gt.uc.huc);
+ if (value < 0)
+ return value;
+ break;
+ case I915_PARAM_MMAP_GTT_VERSION:
+ /* Though we've started our numbering from 1, and so class all
+ * earlier versions as 0, in effect their value is undefined as
+ * the ioctl will report EINVAL for the unknown param!
+ */
+ value = i915_gem_mmap_gtt_version();
+ break;
+ case I915_PARAM_HAS_SCHEDULER:
+ value = i915->caps.scheduler;
+ break;
+
+ case I915_PARAM_MMAP_VERSION:
+ /* Remember to bump this if the version changes! */
+ case I915_PARAM_HAS_GEM:
+ case I915_PARAM_HAS_PAGEFLIPPING:
+ case I915_PARAM_HAS_EXECBUF2: /* depends on GEM */
+ case I915_PARAM_HAS_RELAXED_FENCING:
+ case I915_PARAM_HAS_COHERENT_RINGS:
+ case I915_PARAM_HAS_RELAXED_DELTA:
+ case I915_PARAM_HAS_GEN7_SOL_RESET:
+ case I915_PARAM_HAS_WAIT_TIMEOUT:
+ case I915_PARAM_HAS_PRIME_VMAP_FLUSH:
+ case I915_PARAM_HAS_PINNED_BATCHES:
+ case I915_PARAM_HAS_EXEC_NO_RELOC:
+ case I915_PARAM_HAS_EXEC_HANDLE_LUT:
+ case I915_PARAM_HAS_COHERENT_PHYS_GTT:
+ case I915_PARAM_HAS_EXEC_SOFTPIN:
+ case I915_PARAM_HAS_EXEC_ASYNC:
+ case I915_PARAM_HAS_EXEC_FENCE:
+ case I915_PARAM_HAS_EXEC_CAPTURE:
+ case I915_PARAM_HAS_EXEC_BATCH_FIRST:
+ case I915_PARAM_HAS_EXEC_FENCE_ARRAY:
+ case I915_PARAM_HAS_EXEC_SUBMIT_FENCE:
+ /* For the time being all of these are always true;
+ * if some supported hardware does not have one of these
+ * features this value needs to be provided from
+ * INTEL_INFO(), a feature macro, or similar.
+ */
+ value = 1;
+ break;
+ case I915_PARAM_HAS_CONTEXT_ISOLATION:
+ value = intel_engines_has_context_isolation(i915);
+ break;
+ case I915_PARAM_SLICE_MASK:
+ value = sseu->slice_mask;
+ if (!value)
+ return -ENODEV;
+ break;
+ case I915_PARAM_SUBSLICE_MASK:
+ value = sseu->subslice_mask[0];
+ if (!value)
+ return -ENODEV;
+ break;
+ case I915_PARAM_CS_TIMESTAMP_FREQUENCY:
+ value = 1000 * RUNTIME_INFO(i915)->cs_timestamp_frequency_khz;
+ break;
+ case I915_PARAM_MMAP_GTT_COHERENT:
+ value = INTEL_INFO(i915)->has_coherent_ggtt;
+ break;
+ default:
+ DRM_DEBUG("Unknown parameter %d\n", param->param);
+ return -EINVAL;
+ }
+
+ if (put_user(value, param->value))
+ return -EFAULT;
+
+ return 0;
+}
--
2.23.0.rc1
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^ permalink raw reply related [flat|nested] 5+ messages in thread
* Re: [CI] drm/i915: Isolate i915_getparam_ioctl()
2019-08-07 14:20 [CI] drm/i915: Isolate i915_getparam_ioctl() Chris Wilson
@ 2019-08-07 14:27 ` Rodrigo Vivi
2019-08-07 14:55 ` ✗ Fi.CI.CHECKPATCH: warning for " Patchwork
` (2 subsequent siblings)
3 siblings, 0 replies; 5+ messages in thread
From: Rodrigo Vivi @ 2019-08-07 14:27 UTC (permalink / raw)
To: Chris Wilson; +Cc: intel-gfx
On Wed, Aug 07, 2019 at 03:20:41PM +0100, Chris Wilson wrote:
> This giant switch has tendrils all other the struct and does not fit
> into the rest of the driver bring up and control of i915_drv.c. Push it
> to one side so that it can grow in peace.
>
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> Acked-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
> ---
> drivers/gpu/drm/i915/Makefile | 1 +
> drivers/gpu/drm/i915/i915_drv.c | 167 --------------------------
> drivers/gpu/drm/i915/i915_drv.h | 3 +
> drivers/gpu/drm/i915/i915_getparam.c | 168 +++++++++++++++++++++++++++
> 4 files changed, 172 insertions(+), 167 deletions(-)
> create mode 100644 drivers/gpu/drm/i915/i915_getparam.c
>
> diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
> index 8fe157f71617..d9f1b23bdf77 100644
> --- a/drivers/gpu/drm/i915/Makefile
> +++ b/drivers/gpu/drm/i915/Makefile
> @@ -41,6 +41,7 @@ subdir-ccflags-y += -I$(srctree)/$(src)
> # core driver code
> i915-y += i915_drv.o \
> i915_irq.o \
> + i915_getparam.o \
> i915_params.o \
> i915_pci.o \
> i915_scatterlist.o \
> diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
> index efe904626bf5..3480db36b63f 100644
> --- a/drivers/gpu/drm/i915/i915_drv.c
> +++ b/drivers/gpu/drm/i915/i915_drv.c
> @@ -62,17 +62,12 @@
>
> #include "gem/i915_gem_context.h"
> #include "gem/i915_gem_ioctls.h"
> -#include "gt/intel_engine_user.h"
> #include "gt/intel_gt.h"
> #include "gt/intel_gt_pm.h"
> -#include "gt/intel_reset.h"
> -#include "gt/intel_workarounds.h"
> -#include "gt/uc/intel_uc.h"
>
> #include "i915_debugfs.h"
> #include "i915_drv.h"
> #include "i915_irq.h"
> -#include "i915_pmu.h"
> #include "i915_query.h"
> #include "i915_trace.h"
> #include "i915_vgpu.h"
> @@ -344,168 +339,6 @@ static void intel_detect_pch(struct drm_i915_private *dev_priv)
> pci_dev_put(pch);
> }
>
> -static int i915_getparam_ioctl(struct drm_device *dev, void *data,
> - struct drm_file *file_priv)
> -{
> - struct drm_i915_private *dev_priv = to_i915(dev);
> - struct pci_dev *pdev = dev_priv->drm.pdev;
> - const struct sseu_dev_info *sseu = &RUNTIME_INFO(dev_priv)->sseu;
> - drm_i915_getparam_t *param = data;
> - int value;
> -
> - switch (param->param) {
> - case I915_PARAM_IRQ_ACTIVE:
> - case I915_PARAM_ALLOW_BATCHBUFFER:
> - case I915_PARAM_LAST_DISPATCH:
> - case I915_PARAM_HAS_EXEC_CONSTANTS:
> - /* Reject all old ums/dri params. */
> - return -ENODEV;
> - case I915_PARAM_CHIPSET_ID:
> - value = pdev->device;
> - break;
> - case I915_PARAM_REVISION:
> - value = pdev->revision;
> - break;
> - case I915_PARAM_NUM_FENCES_AVAIL:
> - value = dev_priv->ggtt.num_fences;
> - break;
> - case I915_PARAM_HAS_OVERLAY:
> - value = dev_priv->overlay ? 1 : 0;
> - break;
> - case I915_PARAM_HAS_BSD:
> - value = !!intel_engine_lookup_user(dev_priv,
> - I915_ENGINE_CLASS_VIDEO, 0);
> - break;
> - case I915_PARAM_HAS_BLT:
> - value = !!intel_engine_lookup_user(dev_priv,
> - I915_ENGINE_CLASS_COPY, 0);
> - break;
> - case I915_PARAM_HAS_VEBOX:
> - value = !!intel_engine_lookup_user(dev_priv,
> - I915_ENGINE_CLASS_VIDEO_ENHANCE, 0);
> - break;
> - case I915_PARAM_HAS_BSD2:
> - value = !!intel_engine_lookup_user(dev_priv,
> - I915_ENGINE_CLASS_VIDEO, 1);
> - break;
> - case I915_PARAM_HAS_LLC:
> - value = HAS_LLC(dev_priv);
> - break;
> - case I915_PARAM_HAS_WT:
> - value = HAS_WT(dev_priv);
> - break;
> - case I915_PARAM_HAS_ALIASING_PPGTT:
> - value = INTEL_PPGTT(dev_priv);
> - break;
> - case I915_PARAM_HAS_SEMAPHORES:
> - value = !!(dev_priv->caps.scheduler & I915_SCHEDULER_CAP_SEMAPHORES);
> - break;
> - case I915_PARAM_HAS_SECURE_BATCHES:
> - value = capable(CAP_SYS_ADMIN);
> - break;
> - case I915_PARAM_CMD_PARSER_VERSION:
> - value = i915_cmd_parser_get_version(dev_priv);
> - break;
> - case I915_PARAM_SUBSLICE_TOTAL:
> - value = intel_sseu_subslice_total(sseu);
> - if (!value)
> - return -ENODEV;
> - break;
> - case I915_PARAM_EU_TOTAL:
> - value = sseu->eu_total;
> - if (!value)
> - return -ENODEV;
> - break;
> - case I915_PARAM_HAS_GPU_RESET:
> - value = i915_modparams.enable_hangcheck &&
> - intel_has_gpu_reset(dev_priv);
> - if (value && intel_has_reset_engine(dev_priv))
> - value = 2;
> - break;
> - case I915_PARAM_HAS_RESOURCE_STREAMER:
> - value = 0;
> - break;
> - case I915_PARAM_HAS_POOLED_EU:
> - value = HAS_POOLED_EU(dev_priv);
> - break;
> - case I915_PARAM_MIN_EU_IN_POOL:
> - value = sseu->min_eu_in_pool;
> - break;
> - case I915_PARAM_HUC_STATUS:
> - value = intel_huc_check_status(&dev_priv->gt.uc.huc);
> - if (value < 0)
> - return value;
> - break;
> - case I915_PARAM_MMAP_GTT_VERSION:
> - /* Though we've started our numbering from 1, and so class all
> - * earlier versions as 0, in effect their value is undefined as
> - * the ioctl will report EINVAL for the unknown param!
> - */
> - value = i915_gem_mmap_gtt_version();
> - break;
> - case I915_PARAM_HAS_SCHEDULER:
> - value = dev_priv->caps.scheduler;
> - break;
> -
> - case I915_PARAM_MMAP_VERSION:
> - /* Remember to bump this if the version changes! */
> - case I915_PARAM_HAS_GEM:
> - case I915_PARAM_HAS_PAGEFLIPPING:
> - case I915_PARAM_HAS_EXECBUF2: /* depends on GEM */
> - case I915_PARAM_HAS_RELAXED_FENCING:
> - case I915_PARAM_HAS_COHERENT_RINGS:
> - case I915_PARAM_HAS_RELAXED_DELTA:
> - case I915_PARAM_HAS_GEN7_SOL_RESET:
> - case I915_PARAM_HAS_WAIT_TIMEOUT:
> - case I915_PARAM_HAS_PRIME_VMAP_FLUSH:
> - case I915_PARAM_HAS_PINNED_BATCHES:
> - case I915_PARAM_HAS_EXEC_NO_RELOC:
> - case I915_PARAM_HAS_EXEC_HANDLE_LUT:
> - case I915_PARAM_HAS_COHERENT_PHYS_GTT:
> - case I915_PARAM_HAS_EXEC_SOFTPIN:
> - case I915_PARAM_HAS_EXEC_ASYNC:
> - case I915_PARAM_HAS_EXEC_FENCE:
> - case I915_PARAM_HAS_EXEC_CAPTURE:
> - case I915_PARAM_HAS_EXEC_BATCH_FIRST:
> - case I915_PARAM_HAS_EXEC_FENCE_ARRAY:
> - case I915_PARAM_HAS_EXEC_SUBMIT_FENCE:
> - /* For the time being all of these are always true;
> - * if some supported hardware does not have one of these
> - * features this value needs to be provided from
> - * INTEL_INFO(), a feature macro, or similar.
> - */
> - value = 1;
> - break;
> - case I915_PARAM_HAS_CONTEXT_ISOLATION:
> - value = intel_engines_has_context_isolation(dev_priv);
> - break;
> - case I915_PARAM_SLICE_MASK:
> - value = sseu->slice_mask;
> - if (!value)
> - return -ENODEV;
> - break;
> - case I915_PARAM_SUBSLICE_MASK:
> - value = sseu->subslice_mask[0];
> - if (!value)
> - return -ENODEV;
> - break;
> - case I915_PARAM_CS_TIMESTAMP_FREQUENCY:
> - value = 1000 * RUNTIME_INFO(dev_priv)->cs_timestamp_frequency_khz;
> - break;
> - case I915_PARAM_MMAP_GTT_COHERENT:
> - value = INTEL_INFO(dev_priv)->has_coherent_ggtt;
> - break;
> - default:
> - DRM_DEBUG("Unknown parameter %d\n", param->param);
> - return -EINVAL;
> - }
> -
> - if (put_user(value, param->value))
> - return -EFAULT;
> -
> - return 0;
> -}
> -
> static int i915_get_bridge_dev(struct drm_i915_private *dev_priv)
> {
> int domain = pci_domain_nr(dev_priv->drm.pdev->bus);
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 7d424ddd3523..c9476f24f5c1 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -2397,6 +2397,9 @@ static inline bool intel_vgpu_active(struct drm_i915_private *dev_priv)
> return dev_priv->vgpu.active;
> }
>
> +int i915_getparam_ioctl(struct drm_device *dev, void *data,
> + struct drm_file *file_priv);
> +
> /* i915_gem.c */
> int i915_gem_init_userptr(struct drm_i915_private *dev_priv);
> void i915_gem_cleanup_userptr(struct drm_i915_private *dev_priv);
> diff --git a/drivers/gpu/drm/i915/i915_getparam.c b/drivers/gpu/drm/i915/i915_getparam.c
> new file mode 100644
> index 000000000000..5d9101376a3d
> --- /dev/null
> +++ b/drivers/gpu/drm/i915/i915_getparam.c
> @@ -0,0 +1,168 @@
> +/*
> + * SPDX-License-Identifier: MIT
> + */
> +
> +#include "gt/intel_engine_user.h"
> +
> +#include "i915_drv.h"
> +
> +int i915_getparam_ioctl(struct drm_device *dev, void *data,
> + struct drm_file *file_priv)
> +{
> + struct drm_i915_private *i915 = to_i915(dev);
> + const struct sseu_dev_info *sseu = &RUNTIME_INFO(i915)->sseu;
> + drm_i915_getparam_t *param = data;
> + int value;
> +
> + switch (param->param) {
> + case I915_PARAM_IRQ_ACTIVE:
> + case I915_PARAM_ALLOW_BATCHBUFFER:
> + case I915_PARAM_LAST_DISPATCH:
> + case I915_PARAM_HAS_EXEC_CONSTANTS:
> + /* Reject all old ums/dri params. */
> + return -ENODEV;
> + case I915_PARAM_CHIPSET_ID:
> + value = i915->drm.pdev->device;
> + break;
> + case I915_PARAM_REVISION:
> + value = i915->drm.pdev->revision;
> + break;
> + case I915_PARAM_NUM_FENCES_AVAIL:
> + value = i915->ggtt.num_fences;
> + break;
> + case I915_PARAM_HAS_OVERLAY:
> + value = !!i915->overlay;
> + break;
> + case I915_PARAM_HAS_BSD:
> + value = !!intel_engine_lookup_user(i915,
> + I915_ENGINE_CLASS_VIDEO, 0);
> + break;
> + case I915_PARAM_HAS_BLT:
> + value = !!intel_engine_lookup_user(i915,
> + I915_ENGINE_CLASS_COPY, 0);
> + break;
> + case I915_PARAM_HAS_VEBOX:
> + value = !!intel_engine_lookup_user(i915,
> + I915_ENGINE_CLASS_VIDEO_ENHANCE, 0);
> + break;
> + case I915_PARAM_HAS_BSD2:
> + value = !!intel_engine_lookup_user(i915,
> + I915_ENGINE_CLASS_VIDEO, 1);
> + break;
> + case I915_PARAM_HAS_LLC:
> + value = HAS_LLC(i915);
> + break;
> + case I915_PARAM_HAS_WT:
> + value = HAS_WT(i915);
> + break;
> + case I915_PARAM_HAS_ALIASING_PPGTT:
> + value = INTEL_PPGTT(i915);
> + break;
> + case I915_PARAM_HAS_SEMAPHORES:
> + value = !!(i915->caps.scheduler & I915_SCHEDULER_CAP_SEMAPHORES);
> + break;
> + case I915_PARAM_HAS_SECURE_BATCHES:
> + value = capable(CAP_SYS_ADMIN);
> + break;
> + case I915_PARAM_CMD_PARSER_VERSION:
> + value = i915_cmd_parser_get_version(i915);
> + break;
> + case I915_PARAM_SUBSLICE_TOTAL:
> + value = intel_sseu_subslice_total(sseu);
> + if (!value)
> + return -ENODEV;
> + break;
> + case I915_PARAM_EU_TOTAL:
> + value = sseu->eu_total;
> + if (!value)
> + return -ENODEV;
> + break;
> + case I915_PARAM_HAS_GPU_RESET:
> + value = i915_modparams.enable_hangcheck &&
> + intel_has_gpu_reset(i915);
> + if (value && intel_has_reset_engine(i915))
> + value = 2;
> + break;
> + case I915_PARAM_HAS_RESOURCE_STREAMER:
> + value = 0;
> + break;
> + case I915_PARAM_HAS_POOLED_EU:
> + value = HAS_POOLED_EU(i915);
> + break;
> + case I915_PARAM_MIN_EU_IN_POOL:
> + value = sseu->min_eu_in_pool;
> + break;
> + case I915_PARAM_HUC_STATUS:
> + value = intel_huc_check_status(&i915->gt.uc.huc);
> + if (value < 0)
> + return value;
> + break;
> + case I915_PARAM_MMAP_GTT_VERSION:
> + /* Though we've started our numbering from 1, and so class all
> + * earlier versions as 0, in effect their value is undefined as
> + * the ioctl will report EINVAL for the unknown param!
> + */
> + value = i915_gem_mmap_gtt_version();
> + break;
> + case I915_PARAM_HAS_SCHEDULER:
> + value = i915->caps.scheduler;
> + break;
> +
> + case I915_PARAM_MMAP_VERSION:
> + /* Remember to bump this if the version changes! */
> + case I915_PARAM_HAS_GEM:
> + case I915_PARAM_HAS_PAGEFLIPPING:
> + case I915_PARAM_HAS_EXECBUF2: /* depends on GEM */
> + case I915_PARAM_HAS_RELAXED_FENCING:
> + case I915_PARAM_HAS_COHERENT_RINGS:
> + case I915_PARAM_HAS_RELAXED_DELTA:
> + case I915_PARAM_HAS_GEN7_SOL_RESET:
> + case I915_PARAM_HAS_WAIT_TIMEOUT:
> + case I915_PARAM_HAS_PRIME_VMAP_FLUSH:
> + case I915_PARAM_HAS_PINNED_BATCHES:
> + case I915_PARAM_HAS_EXEC_NO_RELOC:
> + case I915_PARAM_HAS_EXEC_HANDLE_LUT:
> + case I915_PARAM_HAS_COHERENT_PHYS_GTT:
> + case I915_PARAM_HAS_EXEC_SOFTPIN:
> + case I915_PARAM_HAS_EXEC_ASYNC:
> + case I915_PARAM_HAS_EXEC_FENCE:
> + case I915_PARAM_HAS_EXEC_CAPTURE:
> + case I915_PARAM_HAS_EXEC_BATCH_FIRST:
> + case I915_PARAM_HAS_EXEC_FENCE_ARRAY:
> + case I915_PARAM_HAS_EXEC_SUBMIT_FENCE:
> + /* For the time being all of these are always true;
> + * if some supported hardware does not have one of these
> + * features this value needs to be provided from
> + * INTEL_INFO(), a feature macro, or similar.
> + */
> + value = 1;
> + break;
> + case I915_PARAM_HAS_CONTEXT_ISOLATION:
> + value = intel_engines_has_context_isolation(i915);
> + break;
> + case I915_PARAM_SLICE_MASK:
> + value = sseu->slice_mask;
> + if (!value)
> + return -ENODEV;
> + break;
> + case I915_PARAM_SUBSLICE_MASK:
> + value = sseu->subslice_mask[0];
> + if (!value)
> + return -ENODEV;
> + break;
> + case I915_PARAM_CS_TIMESTAMP_FREQUENCY:
> + value = 1000 * RUNTIME_INFO(i915)->cs_timestamp_frequency_khz;
> + break;
> + case I915_PARAM_MMAP_GTT_COHERENT:
> + value = INTEL_INFO(i915)->has_coherent_ggtt;
> + break;
> + default:
> + DRM_DEBUG("Unknown parameter %d\n", param->param);
> + return -EINVAL;
> + }
> +
> + if (put_user(value, param->value))
> + return -EFAULT;
> +
> + return 0;
> +}
> --
> 2.23.0.rc1
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 5+ messages in thread
* ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Isolate i915_getparam_ioctl()
2019-08-07 14:20 [CI] drm/i915: Isolate i915_getparam_ioctl() Chris Wilson
2019-08-07 14:27 ` Rodrigo Vivi
@ 2019-08-07 14:55 ` Patchwork
2019-08-07 15:46 ` ✓ Fi.CI.BAT: success " Patchwork
2019-08-08 0:25 ` ✗ Fi.CI.IGT: failure " Patchwork
3 siblings, 0 replies; 5+ messages in thread
From: Patchwork @ 2019-08-07 14:55 UTC (permalink / raw)
To: Chris Wilson; +Cc: intel-gfx
== Series Details ==
Series: drm/i915: Isolate i915_getparam_ioctl()
URL : https://patchwork.freedesktop.org/series/64840/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
73c89b65070d drm/i915: Isolate i915_getparam_ioctl()
-:232: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating?
#232:
new file mode 100644
-:237: WARNING:SPDX_LICENSE_TAG: Missing or malformed SPDX-License-Identifier tag in line 1
#237: FILE: drivers/gpu/drm/i915/i915_getparam.c:1:
+/*
-:238: WARNING:SPDX_LICENSE_TAG: Misplaced SPDX-License-Identifier tag - use line 1 instead
#238: FILE: drivers/gpu/drm/i915/i915_getparam.c:2:
+ * SPDX-License-Identifier: MIT
total: 0 errors, 3 warnings, 0 checks, 369 lines checked
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 5+ messages in thread
* ✓ Fi.CI.BAT: success for drm/i915: Isolate i915_getparam_ioctl()
2019-08-07 14:20 [CI] drm/i915: Isolate i915_getparam_ioctl() Chris Wilson
2019-08-07 14:27 ` Rodrigo Vivi
2019-08-07 14:55 ` ✗ Fi.CI.CHECKPATCH: warning for " Patchwork
@ 2019-08-07 15:46 ` Patchwork
2019-08-08 0:25 ` ✗ Fi.CI.IGT: failure " Patchwork
3 siblings, 0 replies; 5+ messages in thread
From: Patchwork @ 2019-08-07 15:46 UTC (permalink / raw)
To: Chris Wilson; +Cc: intel-gfx
== Series Details ==
Series: drm/i915: Isolate i915_getparam_ioctl()
URL : https://patchwork.freedesktop.org/series/64840/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6648 -> Patchwork_13901
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13901/
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in Patchwork_13901:
### IGT changes ###
#### Suppressed ####
The following results come from untrusted machines, tests, or statuses.
They do not affect the overall result.
* igt@kms_chamelium@hdmi-crc-fast:
- {fi-icl-u4}: [DMESG-FAIL][1] ([fdo#105602]) -> [DMESG-FAIL][2]
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6648/fi-icl-u4/igt@kms_chamelium@hdmi-crc-fast.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13901/fi-icl-u4/igt@kms_chamelium@hdmi-crc-fast.html
Known issues
------------
Here are the changes found in Patchwork_13901 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@i915_selftest@live_client:
- fi-skl-guc: [PASS][3] -> [DMESG-WARN][4] ([fdo#110943])
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6648/fi-skl-guc/igt@i915_selftest@live_client.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13901/fi-skl-guc/igt@i915_selftest@live_client.html
* igt@kms_chamelium@common-hpd-after-suspend:
- fi-kbl-7567u: [PASS][5] -> [WARN][6] ([fdo#109380])
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6648/fi-kbl-7567u/igt@kms_chamelium@common-hpd-after-suspend.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13901/fi-kbl-7567u/igt@kms_chamelium@common-hpd-after-suspend.html
* igt@kms_chamelium@hdmi-hpd-fast:
- fi-kbl-7500u: [PASS][7] -> [FAIL][8] ([fdo#109485])
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6648/fi-kbl-7500u/igt@kms_chamelium@hdmi-hpd-fast.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13901/fi-kbl-7500u/igt@kms_chamelium@hdmi-hpd-fast.html
* igt@kms_pipe_crc_basic@read-crc-pipe-c:
- fi-kbl-7567u: [PASS][9] -> [SKIP][10] ([fdo#109271]) +23 similar issues
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6648/fi-kbl-7567u/igt@kms_pipe_crc_basic@read-crc-pipe-c.html
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13901/fi-kbl-7567u/igt@kms_pipe_crc_basic@read-crc-pipe-c.html
* igt@prime_vgem@basic-fence-flip:
- fi-icl-u3: [PASS][11] -> [DMESG-WARN][12] ([fdo#107724])
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6648/fi-icl-u3/igt@prime_vgem@basic-fence-flip.html
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13901/fi-icl-u3/igt@prime_vgem@basic-fence-flip.html
#### Possible fixes ####
* igt@i915_selftest@live_execlists:
- fi-skl-gvtdvm: [DMESG-FAIL][13] ([fdo#111108]) -> [PASS][14]
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6648/fi-skl-gvtdvm/igt@i915_selftest@live_execlists.html
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13901/fi-skl-gvtdvm/igt@i915_selftest@live_execlists.html
* igt@kms_chamelium@dp-crc-fast:
- fi-cml-u2: [FAIL][15] ([fdo#110627]) -> [PASS][16]
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6648/fi-cml-u2/igt@kms_chamelium@dp-crc-fast.html
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13901/fi-cml-u2/igt@kms_chamelium@dp-crc-fast.html
* igt@kms_chamelium@hdmi-hpd-fast:
- fi-icl-u2: [FAIL][17] ([fdo#109483]) -> [PASS][18]
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6648/fi-icl-u2/igt@kms_chamelium@hdmi-hpd-fast.html
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13901/fi-icl-u2/igt@kms_chamelium@hdmi-hpd-fast.html
* igt@prime_vgem@basic-fence-flip:
- fi-kbl-7500u: [SKIP][19] ([fdo#109271]) -> [PASS][20] +23 similar issues
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6648/fi-kbl-7500u/igt@prime_vgem@basic-fence-flip.html
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13901/fi-kbl-7500u/igt@prime_vgem@basic-fence-flip.html
* igt@vgem_basic@unload:
- fi-icl-u3: [DMESG-WARN][21] ([fdo#107724]) -> [PASS][22]
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6648/fi-icl-u3/igt@vgem_basic@unload.html
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13901/fi-icl-u3/igt@vgem_basic@unload.html
#### Warnings ####
* igt@i915_pm_rpm@basic-pci-d3-state:
- fi-kbl-guc: [FAIL][23] ([fdo#107707]) -> [SKIP][24] ([fdo#109271])
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6648/fi-kbl-guc/igt@i915_pm_rpm@basic-pci-d3-state.html
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13901/fi-kbl-guc/igt@i915_pm_rpm@basic-pci-d3-state.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#105602]: https://bugs.freedesktop.org/show_bug.cgi?id=105602
[fdo#106107]: https://bugs.freedesktop.org/show_bug.cgi?id=106107
[fdo#107707]: https://bugs.freedesktop.org/show_bug.cgi?id=107707
[fdo#107724]: https://bugs.freedesktop.org/show_bug.cgi?id=107724
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109380]: https://bugs.freedesktop.org/show_bug.cgi?id=109380
[fdo#109483]: https://bugs.freedesktop.org/show_bug.cgi?id=109483
[fdo#109485]: https://bugs.freedesktop.org/show_bug.cgi?id=109485
[fdo#110627]: https://bugs.freedesktop.org/show_bug.cgi?id=110627
[fdo#110943]: https://bugs.freedesktop.org/show_bug.cgi?id=110943
[fdo#111108]: https://bugs.freedesktop.org/show_bug.cgi?id=111108
Participating hosts (54 -> 47)
------------------------------
Additional (1): fi-pnv-d510
Missing (8): fi-kbl-soraka fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-icl-y fi-byt-clapper fi-bdw-samus
Build changes
-------------
* CI: CI-20190529 -> None
* Linux: CI_DRM_6648 -> Patchwork_13901
CI-20190529: 20190529
CI_DRM_6648: 9580c97bd17924150abfa32dabb46af761a12ca5 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_5125: 35d81d01b1599b4bc4df0e09e25f6f531eed4f8a @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_13901: 73c89b65070d257e4dbb6b22b050398ceaf5e0ab @ git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
73c89b65070d drm/i915: Isolate i915_getparam_ioctl()
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13901/
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 5+ messages in thread
* ✗ Fi.CI.IGT: failure for drm/i915: Isolate i915_getparam_ioctl()
2019-08-07 14:20 [CI] drm/i915: Isolate i915_getparam_ioctl() Chris Wilson
` (2 preceding siblings ...)
2019-08-07 15:46 ` ✓ Fi.CI.BAT: success " Patchwork
@ 2019-08-08 0:25 ` Patchwork
3 siblings, 0 replies; 5+ messages in thread
From: Patchwork @ 2019-08-08 0:25 UTC (permalink / raw)
To: Chris Wilson; +Cc: intel-gfx
== Series Details ==
Series: drm/i915: Isolate i915_getparam_ioctl()
URL : https://patchwork.freedesktop.org/series/64840/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_6648_full -> Patchwork_13901_full
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with Patchwork_13901_full absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_13901_full, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in Patchwork_13901_full:
### IGT changes ###
#### Possible regressions ####
* igt@gem_exec_schedule@preempt-queue-bsd:
- shard-iclb: [PASS][1] -> [SKIP][2] +3 similar issues
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6648/shard-iclb5/igt@gem_exec_schedule@preempt-queue-bsd.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13901/shard-iclb4/igt@gem_exec_schedule@preempt-queue-bsd.html
* igt@kms_atomic_transition@1x-modeset-transitions-nonblocking-fencing:
- shard-kbl: [PASS][3] -> [FAIL][4]
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6648/shard-kbl2/igt@kms_atomic_transition@1x-modeset-transitions-nonblocking-fencing.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13901/shard-kbl1/igt@kms_atomic_transition@1x-modeset-transitions-nonblocking-fencing.html
#### Warnings ####
* igt@gem_mocs_settings@mocs-settings-bsd2:
- shard-iclb: [SKIP][5] ([fdo#109276]) -> [FAIL][6]
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6648/shard-iclb5/igt@gem_mocs_settings@mocs-settings-bsd2.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13901/shard-iclb4/igt@gem_mocs_settings@mocs-settings-bsd2.html
Known issues
------------
Here are the changes found in Patchwork_13901_full that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@i915_pm_rpm@i2c:
- shard-hsw: [PASS][7] -> [FAIL][8] ([fdo#104097])
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6648/shard-hsw4/igt@i915_pm_rpm@i2c.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13901/shard-hsw6/igt@i915_pm_rpm@i2c.html
* igt@i915_pm_rpm@system-suspend:
- shard-skl: [PASS][9] -> [INCOMPLETE][10] ([fdo#104108] / [fdo#107807])
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6648/shard-skl10/igt@i915_pm_rpm@system-suspend.html
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13901/shard-skl4/igt@i915_pm_rpm@system-suspend.html
* igt@i915_pm_rps@reset:
- shard-kbl: [PASS][11] -> [FAIL][12] ([fdo#102250])
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6648/shard-kbl2/igt@i915_pm_rps@reset.html
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13901/shard-kbl1/igt@i915_pm_rps@reset.html
- shard-glk: [PASS][13] -> [FAIL][14] ([fdo#102250])
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6648/shard-glk7/igt@i915_pm_rps@reset.html
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13901/shard-glk8/igt@i915_pm_rps@reset.html
* igt@i915_suspend@sysfs-reader:
- shard-apl: [PASS][15] -> [DMESG-WARN][16] ([fdo#108566]) +4 similar issues
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6648/shard-apl3/igt@i915_suspend@sysfs-reader.html
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13901/shard-apl1/igt@i915_suspend@sysfs-reader.html
* igt@kms_cursor_crc@pipe-a-cursor-256x85-onscreen:
- shard-iclb: [PASS][17] -> [INCOMPLETE][18] ([fdo#107713])
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6648/shard-iclb3/igt@kms_cursor_crc@pipe-a-cursor-256x85-onscreen.html
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13901/shard-iclb7/igt@kms_cursor_crc@pipe-a-cursor-256x85-onscreen.html
* igt@kms_cursor_legacy@pipe-c-forked-move:
- shard-hsw: [PASS][19] -> [INCOMPLETE][20] ([fdo#103540])
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6648/shard-hsw6/igt@kms_cursor_legacy@pipe-c-forked-move.html
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13901/shard-hsw4/igt@kms_cursor_legacy@pipe-c-forked-move.html
* igt@kms_flip@flip-vs-expired-vblank:
- shard-skl: [PASS][21] -> [FAIL][22] ([fdo#105363])
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6648/shard-skl2/igt@kms_flip@flip-vs-expired-vblank.html
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13901/shard-skl9/igt@kms_flip@flip-vs-expired-vblank.html
* igt@kms_flip@flip-vs-suspend-interruptible:
- shard-skl: [PASS][23] -> [INCOMPLETE][24] ([fdo#109507])
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6648/shard-skl10/igt@kms_flip@flip-vs-suspend-interruptible.html
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13901/shard-skl6/igt@kms_flip@flip-vs-suspend-interruptible.html
* igt@kms_flip@modeset-vs-vblank-race:
- shard-glk: [PASS][25] -> [FAIL][26] ([fdo#103060])
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6648/shard-glk7/igt@kms_flip@modeset-vs-vblank-race.html
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13901/shard-glk7/igt@kms_flip@modeset-vs-vblank-race.html
* igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-shrfb-plflip-blt:
- shard-iclb: [PASS][27] -> [FAIL][28] ([fdo#103167]) +3 similar issues
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6648/shard-iclb4/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-shrfb-plflip-blt.html
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13901/shard-iclb5/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-shrfb-plflip-blt.html
* igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min:
- shard-skl: [PASS][29] -> [FAIL][30] ([fdo#108145])
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6648/shard-skl3/igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min.html
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13901/shard-skl5/igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min.html
* igt@kms_psr2_su@page_flip:
- shard-iclb: [PASS][31] -> [SKIP][32] ([fdo#109642] / [fdo#111068])
[31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6648/shard-iclb2/igt@kms_psr2_su@page_flip.html
[32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13901/shard-iclb3/igt@kms_psr2_su@page_flip.html
* igt@kms_psr@psr2_cursor_render:
- shard-iclb: [PASS][33] -> [SKIP][34] ([fdo#109441]) +2 similar issues
[33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6648/shard-iclb2/igt@kms_psr@psr2_cursor_render.html
[34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13901/shard-iclb1/igt@kms_psr@psr2_cursor_render.html
* igt@kms_vblank@pipe-a-wait-forked:
- shard-apl: [PASS][35] -> [INCOMPLETE][36] ([fdo#103927])
[35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6648/shard-apl8/igt@kms_vblank@pipe-a-wait-forked.html
[36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13901/shard-apl8/igt@kms_vblank@pipe-a-wait-forked.html
* igt@kms_vblank@pipe-b-ts-continuation-suspend:
- shard-kbl: [PASS][37] -> [DMESG-WARN][38] ([fdo#108566])
[37]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6648/shard-kbl1/igt@kms_vblank@pipe-b-ts-continuation-suspend.html
[38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13901/shard-kbl6/igt@kms_vblank@pipe-b-ts-continuation-suspend.html
* igt@prime_busy@hang-bsd2:
- shard-iclb: [PASS][39] -> [SKIP][40] ([fdo#109276]) +13 similar issues
[39]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6648/shard-iclb1/igt@prime_busy@hang-bsd2.html
[40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13901/shard-iclb7/igt@prime_busy@hang-bsd2.html
#### Possible fixes ####
* igt@gem_exec_async@concurrent-writes-bsd:
- shard-iclb: [SKIP][41] -> [PASS][42] +5 similar issues
[41]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6648/shard-iclb4/igt@gem_exec_async@concurrent-writes-bsd.html
[42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13901/shard-iclb6/igt@gem_exec_async@concurrent-writes-bsd.html
* igt@gem_exec_await@wide-all:
- shard-iclb: [FAIL][43] ([fdo#110946]) -> [PASS][44]
[43]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6648/shard-iclb1/igt@gem_exec_await@wide-all.html
[44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13901/shard-iclb7/igt@gem_exec_await@wide-all.html
* igt@gem_exec_schedule@preempt-contexts-bsd2:
- shard-iclb: [SKIP][45] ([fdo#109276]) -> [PASS][46] +11 similar issues
[45]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6648/shard-iclb8/igt@gem_exec_schedule@preempt-contexts-bsd2.html
[46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13901/shard-iclb2/igt@gem_exec_schedule@preempt-contexts-bsd2.html
* igt@kms_frontbuffer_tracking@fbc-rgb565-draw-mmap-gtt:
- shard-iclb: [FAIL][47] ([fdo#103167]) -> [PASS][48] +4 similar issues
[47]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6648/shard-iclb4/igt@kms_frontbuffer_tracking@fbc-rgb565-draw-mmap-gtt.html
[48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13901/shard-iclb5/igt@kms_frontbuffer_tracking@fbc-rgb565-draw-mmap-gtt.html
* igt@kms_plane_lowres@pipe-a-tiling-x:
- shard-iclb: [FAIL][49] ([fdo#103166]) -> [PASS][50]
[49]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6648/shard-iclb7/igt@kms_plane_lowres@pipe-a-tiling-x.html
[50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13901/shard-iclb5/igt@kms_plane_lowres@pipe-a-tiling-x.html
* igt@kms_psr@psr2_cursor_plane_onoff:
- shard-iclb: [SKIP][51] ([fdo#109441]) -> [PASS][52] +3 similar issues
[51]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6648/shard-iclb1/igt@kms_psr@psr2_cursor_plane_onoff.html
[52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13901/shard-iclb2/igt@kms_psr@psr2_cursor_plane_onoff.html
* igt@kms_setmode@basic:
- shard-apl: [FAIL][53] ([fdo#99912]) -> [PASS][54]
[53]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6648/shard-apl2/igt@kms_setmode@basic.html
[54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13901/shard-apl1/igt@kms_setmode@basic.html
* igt@kms_vblank@pipe-b-ts-continuation-dpms-suspend:
- shard-skl: [INCOMPLETE][55] ([fdo#104108]) -> [PASS][56]
[55]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6648/shard-skl2/igt@kms_vblank@pipe-b-ts-continuation-dpms-suspend.html
[56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13901/shard-skl10/igt@kms_vblank@pipe-b-ts-continuation-dpms-suspend.html
* igt@kms_vblank@pipe-b-ts-continuation-suspend:
- shard-apl: [DMESG-WARN][57] ([fdo#108566]) -> [PASS][58] +1 similar issue
[57]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6648/shard-apl7/igt@kms_vblank@pipe-b-ts-continuation-suspend.html
[58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13901/shard-apl5/igt@kms_vblank@pipe-b-ts-continuation-suspend.html
* igt@perf@polling:
- shard-skl: [FAIL][59] ([fdo#110728]) -> [PASS][60]
[59]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6648/shard-skl5/igt@perf@polling.html
[60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13901/shard-skl10/igt@perf@polling.html
#### Warnings ####
* igt@gem_mocs_settings@mocs-isolation-bsd2:
- shard-iclb: [FAIL][61] -> [SKIP][62] ([fdo#109276]) +1 similar issue
[61]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6648/shard-iclb4/igt@gem_mocs_settings@mocs-isolation-bsd2.html
[62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13901/shard-iclb5/igt@gem_mocs_settings@mocs-isolation-bsd2.html
* igt@kms_dp_dsc@basic-dsc-enable-edp:
- shard-iclb: [SKIP][63] ([fdo#109349]) -> [DMESG-WARN][64] ([fdo#107724])
[63]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6648/shard-iclb1/igt@kms_dp_dsc@basic-dsc-enable-edp.html
[64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13901/shard-iclb2/igt@kms_dp_dsc@basic-dsc-enable-edp.html
[fdo#102250]: https://bugs.freedesktop.org/show_bug.cgi?id=102250
[fdo#103060]: https://bugs.freedesktop.org/show_bug.cgi?id=103060
[fdo#103166]: https://bugs.freedesktop.org/show_bug.cgi?id=103166
[fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167
[fdo#103540]: https://bugs.freedesktop.org/show_bug.cgi?id=103540
[fdo#103927]: https://bugs.freedesktop.org/show_bug.cgi?id=103927
[fdo#104097]: https://bugs.freedesktop.org/show_bug.cgi?id=104097
[fdo#104108]: https://bugs.freedesktop.org/show_bug.cgi?id=104108
[fdo#105363]: https://bugs.freedesktop.org/show_bug.cgi?id=105363
[fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713
[fdo#107724]: https://bugs.freedesktop.org/show_bug.cgi?id=107724
[fdo#107807]: https://bugs.freedesktop.org/show_bug.cgi?id=107807
[fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145
[fdo#108566]: https://bugs.freedesktop.org/show_bug.cgi?id=108566
[fdo#109276]: https://bugs.freedesktop.org/show_bug.cgi?id=109276
[fdo#109349]: https://bugs.freedesktop.org/show_bug.cgi?id=109349
[fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441
[fdo#109507]: https://bugs.freedesktop.org/show_bug.cgi?id=109507
[fdo#109642]: https://bugs.freedesktop.org/show_bug.cgi?id=109642
[fdo#110728]: https://bugs.freedesktop.org/show_bug.cgi?id=110728
[fdo#110946]: https://bugs.freedesktop.org/show_bug.cgi?id=110946
[fdo#111068]: https://bugs.freedesktop.org/show_bug.cgi?id=111068
[fdo#99912]: https://bugs.freedesktop.org/show_bug.cgi?id=99912
Participating hosts (10 -> 10)
------------------------------
No changes in participating hosts
Build changes
-------------
* CI: CI-20190529 -> None
* Linux: CI_DRM_6648 -> Patchwork_13901
CI-20190529: 20190529
CI_DRM_6648: 9580c97bd17924150abfa32dabb46af761a12ca5 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_5125: 35d81d01b1599b4bc4df0e09e25f6f531eed4f8a @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_13901: 73c89b65070d257e4dbb6b22b050398ceaf5e0ab @ git://anongit.freedesktop.org/gfx-ci/linux
piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13901/
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 5+ messages in thread
end of thread, other threads:[~2019-08-08 0:25 UTC | newest]
Thread overview: 5+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2019-08-07 14:20 [CI] drm/i915: Isolate i915_getparam_ioctl() Chris Wilson
2019-08-07 14:27 ` Rodrigo Vivi
2019-08-07 14:55 ` ✗ Fi.CI.CHECKPATCH: warning for " Patchwork
2019-08-07 15:46 ` ✓ Fi.CI.BAT: success " Patchwork
2019-08-08 0:25 ` ✗ Fi.CI.IGT: failure " Patchwork
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