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* [PATCH i-g-t 1/9] i915/gem_exec_schedule: Limit the plug to fit small rings
@ 2019-08-13  6:20 ` Chris Wilson
  0 siblings, 0 replies; 29+ messages in thread
From: Chris Wilson @ 2019-08-13  6:20 UTC (permalink / raw)
  To: intel-gfx; +Cc: igt-dev

If we are not running with a scheduler, we are using a global ringbuffer
which may not accommodate 16 extra batches. Fortunately, we only need
one such batch to block the submission queue as without a scheduler, it
is in order submission (and so the batch is after the main setup
anyway!).

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
---
 tests/i915/gem_exec_schedule.c | 9 +++++++--
 1 file changed, 7 insertions(+), 2 deletions(-)

diff --git a/tests/i915/gem_exec_schedule.c b/tests/i915/gem_exec_schedule.c
index 6e8466299..058102103 100644
--- a/tests/i915/gem_exec_schedule.c
+++ b/tests/i915/gem_exec_schedule.c
@@ -164,8 +164,13 @@ static uint32_t create_highest_priority(int fd)
 static void unplug_show_queue(int fd, struct igt_cork *c, unsigned int engine)
 {
 	igt_spin_t *spin[MAX_ELSP_QLEN];
+	int max = MAX_ELSP_QLEN;
 
-	for (int n = 0; n < ARRAY_SIZE(spin); n++) {
+	/* If no scheduler, all batches are emitted in submission order */
+	if (!gem_scheduler_enabled(fd))
+		max = 1;
+
+	for (int n = 0; n < max; n++) {
 		const struct igt_spin_factory opts = {
 			.ctx = create_highest_priority(fd),
 			.engine = engine,
@@ -177,7 +182,7 @@ static void unplug_show_queue(int fd, struct igt_cork *c, unsigned int engine)
 	igt_cork_unplug(c); /* batches will now be queued on the engine */
 	igt_debugfs_dump(fd, "i915_engine_info");
 
-	for (int n = 0; n < ARRAY_SIZE(spin); n++)
+	for (int n = 0; n < max; n++)
 		igt_spin_free(fd, spin[n]);
 
 }
-- 
2.23.0.rc1

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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply related	[flat|nested] 29+ messages in thread

* [igt-dev] [PATCH i-g-t 1/9] i915/gem_exec_schedule: Limit the plug to fit small rings
@ 2019-08-13  6:20 ` Chris Wilson
  0 siblings, 0 replies; 29+ messages in thread
From: Chris Wilson @ 2019-08-13  6:20 UTC (permalink / raw)
  To: intel-gfx; +Cc: igt-dev

If we are not running with a scheduler, we are using a global ringbuffer
which may not accommodate 16 extra batches. Fortunately, we only need
one such batch to block the submission queue as without a scheduler, it
is in order submission (and so the batch is after the main setup
anyway!).

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
---
 tests/i915/gem_exec_schedule.c | 9 +++++++--
 1 file changed, 7 insertions(+), 2 deletions(-)

diff --git a/tests/i915/gem_exec_schedule.c b/tests/i915/gem_exec_schedule.c
index 6e8466299..058102103 100644
--- a/tests/i915/gem_exec_schedule.c
+++ b/tests/i915/gem_exec_schedule.c
@@ -164,8 +164,13 @@ static uint32_t create_highest_priority(int fd)
 static void unplug_show_queue(int fd, struct igt_cork *c, unsigned int engine)
 {
 	igt_spin_t *spin[MAX_ELSP_QLEN];
+	int max = MAX_ELSP_QLEN;
 
-	for (int n = 0; n < ARRAY_SIZE(spin); n++) {
+	/* If no scheduler, all batches are emitted in submission order */
+	if (!gem_scheduler_enabled(fd))
+		max = 1;
+
+	for (int n = 0; n < max; n++) {
 		const struct igt_spin_factory opts = {
 			.ctx = create_highest_priority(fd),
 			.engine = engine,
@@ -177,7 +182,7 @@ static void unplug_show_queue(int fd, struct igt_cork *c, unsigned int engine)
 	igt_cork_unplug(c); /* batches will now be queued on the engine */
 	igt_debugfs_dump(fd, "i915_engine_info");
 
-	for (int n = 0; n < ARRAY_SIZE(spin); n++)
+	for (int n = 0; n < max; n++)
 		igt_spin_free(fd, spin[n]);
 
 }
-- 
2.23.0.rc1

_______________________________________________
igt-dev mailing list
igt-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/igt-dev

^ permalink raw reply related	[flat|nested] 29+ messages in thread

* [PATCH i-g-t 2/9] i915/gem_eio: Restrict number of batches of submitted
  2019-08-13  6:20 ` [igt-dev] " Chris Wilson
@ 2019-08-13  6:20   ` Chris Wilson
  -1 siblings, 0 replies; 29+ messages in thread
From: Chris Wilson @ 2019-08-13  6:20 UTC (permalink / raw)
  To: intel-gfx; +Cc: igt-dev

Make sure we don't block while setting up the stress case before the
reset by only submitting less batches than would fill the ring.

References: https://bugs.freedesktop.org/show_bug.cgi?id=111379
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
---
 tests/i915/gem_eio.c | 13 +++++++++----
 1 file changed, 9 insertions(+), 4 deletions(-)

diff --git a/tests/i915/gem_eio.c b/tests/i915/gem_eio.c
index dcbcefa97..9b086a039 100644
--- a/tests/i915/gem_eio.c
+++ b/tests/i915/gem_eio.c
@@ -734,6 +734,11 @@ static void reset_stress(int fd, uint32_t ctx0,
 		.flags = engine,
 	};
 	igt_stats_t stats;
+	int max;
+
+	max = gem_measure_ring_inflight(fd, engine, 0);
+	max = max / 2 - 1; /* assume !execlists and a shared ring */
+	igt_require(max > 0);
 
 	gem_write(fd, obj.handle, 0, &bbe, sizeof(bbe));
 
@@ -755,11 +760,11 @@ static void reset_stress(int fd, uint32_t ctx0,
 		hang = spin_sync(fd, ctx0, engine);
 
 		execbuf.rsvd1 = ctx;
-		for (i = 0; i < 10; i++)
+		for (i = 0; i < max; i++)
 			gem_execbuf(fd, &execbuf);
 
 		execbuf.rsvd1 = ctx0;
-		for (i = 0; i < 10; i++)
+		for (i = 0; i < max; i++)
 			gem_execbuf(fd, &execbuf);
 
 		/* Wedge after a small delay. */
@@ -777,11 +782,11 @@ static void reset_stress(int fd, uint32_t ctx0,
 		 * both contexts.
 		 */
 		execbuf.rsvd1 = ctx;
-		for (i = 0; i < 5; i++)
+		for (i = 0; i < max; i++)
 			gem_execbuf(fd, &execbuf);
 
 		execbuf.rsvd1 = ctx0;
-		for (i = 0; i < 5; i++)
+		for (i = 0; i < max; i++)
 			gem_execbuf(fd, &execbuf);
 
 		gem_sync(fd, obj.handle);
-- 
2.23.0.rc1

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply related	[flat|nested] 29+ messages in thread

* [igt-dev] [PATCH i-g-t 2/9] i915/gem_eio: Restrict number of batches of submitted
@ 2019-08-13  6:20   ` Chris Wilson
  0 siblings, 0 replies; 29+ messages in thread
From: Chris Wilson @ 2019-08-13  6:20 UTC (permalink / raw)
  To: intel-gfx; +Cc: igt-dev

Make sure we don't block while setting up the stress case before the
reset by only submitting less batches than would fill the ring.

References: https://bugs.freedesktop.org/show_bug.cgi?id=111379
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
---
 tests/i915/gem_eio.c | 13 +++++++++----
 1 file changed, 9 insertions(+), 4 deletions(-)

diff --git a/tests/i915/gem_eio.c b/tests/i915/gem_eio.c
index dcbcefa97..9b086a039 100644
--- a/tests/i915/gem_eio.c
+++ b/tests/i915/gem_eio.c
@@ -734,6 +734,11 @@ static void reset_stress(int fd, uint32_t ctx0,
 		.flags = engine,
 	};
 	igt_stats_t stats;
+	int max;
+
+	max = gem_measure_ring_inflight(fd, engine, 0);
+	max = max / 2 - 1; /* assume !execlists and a shared ring */
+	igt_require(max > 0);
 
 	gem_write(fd, obj.handle, 0, &bbe, sizeof(bbe));
 
@@ -755,11 +760,11 @@ static void reset_stress(int fd, uint32_t ctx0,
 		hang = spin_sync(fd, ctx0, engine);
 
 		execbuf.rsvd1 = ctx;
-		for (i = 0; i < 10; i++)
+		for (i = 0; i < max; i++)
 			gem_execbuf(fd, &execbuf);
 
 		execbuf.rsvd1 = ctx0;
-		for (i = 0; i < 10; i++)
+		for (i = 0; i < max; i++)
 			gem_execbuf(fd, &execbuf);
 
 		/* Wedge after a small delay. */
@@ -777,11 +782,11 @@ static void reset_stress(int fd, uint32_t ctx0,
 		 * both contexts.
 		 */
 		execbuf.rsvd1 = ctx;
-		for (i = 0; i < 5; i++)
+		for (i = 0; i < max; i++)
 			gem_execbuf(fd, &execbuf);
 
 		execbuf.rsvd1 = ctx0;
-		for (i = 0; i < 5; i++)
+		for (i = 0; i < max; i++)
 			gem_execbuf(fd, &execbuf);
 
 		gem_sync(fd, obj.handle);
-- 
2.23.0.rc1

_______________________________________________
igt-dev mailing list
igt-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/igt-dev

^ permalink raw reply related	[flat|nested] 29+ messages in thread

* [PATCH i-g-t 3/9] i915/gem_mmap_gtt: Test mmap_offset lifetime
  2019-08-13  6:20 ` [igt-dev] " Chris Wilson
@ 2019-08-13  6:20   ` Chris Wilson
  -1 siblings, 0 replies; 29+ messages in thread
From: Chris Wilson @ 2019-08-13  6:20 UTC (permalink / raw)
  To: intel-gfx; +Cc: igt-dev

Closing the object on another file should not affect the local
mmap_offset.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Abdiel Janulgue <abdiel.janulgue@linux.intel.com>
---
 tests/i915/gem_mmap_gtt.c | 40 +++++++++++++++++++++++++++++++++++++++
 1 file changed, 40 insertions(+)

diff --git a/tests/i915/gem_mmap_gtt.c b/tests/i915/gem_mmap_gtt.c
index 6f3a9c36e..8eff91850 100644
--- a/tests/i915/gem_mmap_gtt.c
+++ b/tests/i915/gem_mmap_gtt.c
@@ -322,6 +322,44 @@ test_pf_nonblock(int i915)
 	igt_spin_free(i915, spin);
 }
 
+static void
+test_isolation(int i915)
+{
+	struct drm_i915_gem_mmap_gtt mmap_arg;
+	int A = gem_reopen_driver(i915);
+	int B = gem_reopen_driver(i915);
+	uint64_t offset_a, offset_b;
+	uint32_t a, b;
+	void *ptr;
+
+	a = gem_create(A, 4096);
+	b = gem_open(B, gem_flink(A, a));
+
+	mmap_arg.handle = a;
+	do_ioctl(A, DRM_IOCTL_I915_GEM_MMAP_GTT, &mmap_arg);
+	offset_a = mmap_arg.offset;
+
+	mmap_arg.handle = b;
+	do_ioctl(B, DRM_IOCTL_I915_GEM_MMAP_GTT, &mmap_arg);
+	offset_b = mmap_arg.offset;
+
+	igt_info("A: {fd:%d, handle:%d, offset:%"PRIx64"}\n",
+		 A, a, offset_a);
+	igt_info("B: {fd:%d, handle:%d, offset:%"PRIx64"}\n",
+		 B, b, offset_b);
+
+	close(B);
+
+	ptr = mmap64(0, 4096, PROT_READ, MAP_SHARED, A, offset_a);
+	igt_assert(ptr != MAP_FAILED);
+	munmap(ptr, 4096);
+
+	close(A);
+
+	ptr = mmap64(0, 4096, PROT_READ, MAP_SHARED, A, offset_a);
+	igt_assert(ptr == MAP_FAILED);
+}
+
 static void
 test_write_gtt(int fd)
 {
@@ -945,6 +983,8 @@ igt_main
 		test_write_cpu_read_gtt(fd);
 	igt_subtest("basic-wc")
 		test_wc(fd);
+	igt_subtest("isolation")
+		test_isolation(fd);
 	igt_subtest("pf-nonblock")
 		test_pf_nonblock(fd);
 
-- 
2.23.0.rc1

_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply related	[flat|nested] 29+ messages in thread

* [igt-dev] [PATCH i-g-t 3/9] i915/gem_mmap_gtt: Test mmap_offset lifetime
@ 2019-08-13  6:20   ` Chris Wilson
  0 siblings, 0 replies; 29+ messages in thread
From: Chris Wilson @ 2019-08-13  6:20 UTC (permalink / raw)
  To: intel-gfx; +Cc: igt-dev

Closing the object on another file should not affect the local
mmap_offset.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Abdiel Janulgue <abdiel.janulgue@linux.intel.com>
---
 tests/i915/gem_mmap_gtt.c | 40 +++++++++++++++++++++++++++++++++++++++
 1 file changed, 40 insertions(+)

diff --git a/tests/i915/gem_mmap_gtt.c b/tests/i915/gem_mmap_gtt.c
index 6f3a9c36e..8eff91850 100644
--- a/tests/i915/gem_mmap_gtt.c
+++ b/tests/i915/gem_mmap_gtt.c
@@ -322,6 +322,44 @@ test_pf_nonblock(int i915)
 	igt_spin_free(i915, spin);
 }
 
+static void
+test_isolation(int i915)
+{
+	struct drm_i915_gem_mmap_gtt mmap_arg;
+	int A = gem_reopen_driver(i915);
+	int B = gem_reopen_driver(i915);
+	uint64_t offset_a, offset_b;
+	uint32_t a, b;
+	void *ptr;
+
+	a = gem_create(A, 4096);
+	b = gem_open(B, gem_flink(A, a));
+
+	mmap_arg.handle = a;
+	do_ioctl(A, DRM_IOCTL_I915_GEM_MMAP_GTT, &mmap_arg);
+	offset_a = mmap_arg.offset;
+
+	mmap_arg.handle = b;
+	do_ioctl(B, DRM_IOCTL_I915_GEM_MMAP_GTT, &mmap_arg);
+	offset_b = mmap_arg.offset;
+
+	igt_info("A: {fd:%d, handle:%d, offset:%"PRIx64"}\n",
+		 A, a, offset_a);
+	igt_info("B: {fd:%d, handle:%d, offset:%"PRIx64"}\n",
+		 B, b, offset_b);
+
+	close(B);
+
+	ptr = mmap64(0, 4096, PROT_READ, MAP_SHARED, A, offset_a);
+	igt_assert(ptr != MAP_FAILED);
+	munmap(ptr, 4096);
+
+	close(A);
+
+	ptr = mmap64(0, 4096, PROT_READ, MAP_SHARED, A, offset_a);
+	igt_assert(ptr == MAP_FAILED);
+}
+
 static void
 test_write_gtt(int fd)
 {
@@ -945,6 +983,8 @@ igt_main
 		test_write_cpu_read_gtt(fd);
 	igt_subtest("basic-wc")
 		test_wc(fd);
+	igt_subtest("isolation")
+		test_isolation(fd);
 	igt_subtest("pf-nonblock")
 		test_pf_nonblock(fd);
 
-- 
2.23.0.rc1

_______________________________________________
igt-dev mailing list
igt-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/igt-dev

^ permalink raw reply related	[flat|nested] 29+ messages in thread

* [PATCH i-g-t 4/9] i915/gem_shrink: Make some pages dirty
  2019-08-13  6:20 ` [igt-dev] " Chris Wilson
@ 2019-08-13  6:20   ` Chris Wilson
  -1 siblings, 0 replies; 29+ messages in thread
From: Chris Wilson @ 2019-08-13  6:20 UTC (permalink / raw)
  To: intel-gfx; +Cc: igt-dev

Trying to hit a deadlock for invalidating dirty userptr pages (via
kcompactd).

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
---
 tests/i915/gem_shrink.c | 36 ++++++++++++++++++++++++++++++++----
 1 file changed, 32 insertions(+), 4 deletions(-)

diff --git a/tests/i915/gem_shrink.c b/tests/i915/gem_shrink.c
index 037ff005b..3db754f55 100644
--- a/tests/i915/gem_shrink.c
+++ b/tests/i915/gem_shrink.c
@@ -45,6 +45,13 @@ static void get_pages(int fd, uint64_t alloc)
 	gem_madvise(fd, handle, I915_MADV_DONTNEED);
 }
 
+static void get_pages_dirty(int fd, uint64_t alloc)
+{
+	uint32_t handle = gem_create(fd, alloc);
+	gem_set_domain(fd, handle, I915_GEM_DOMAIN_GTT, I915_GEM_DOMAIN_GTT);
+	gem_madvise(fd, handle, I915_MADV_DONTNEED);
+}
+
 static void pwrite_(int fd, uint64_t alloc)
 {
 	uint32_t tmp;
@@ -214,7 +221,8 @@ static void hang(int fd, uint64_t alloc)
 	munmap(obj, obj_size);
 }
 
-static void userptr(int fd, uint64_t alloc)
+static void userptr(int fd, uint64_t alloc, unsigned int flags)
+#define UDIRTY (1 << 0)
 {
 	struct local_i915_gem_userptr userptr;
 	void *ptr;
@@ -231,7 +239,11 @@ static void userptr(int fd, uint64_t alloc)
 	userptr.user_ptr = to_user_pointer(ptr);
 	do_ioctl(fd, LOCAL_IOCTL_I915_GEM_USERPTR, &userptr);
 
-	gem_set_domain(fd, userptr.handle, I915_GEM_DOMAIN_GTT, 0);
+	if (flags & UDIRTY)
+		gem_set_domain(fd, userptr.handle,
+			       I915_GEM_DOMAIN_GTT, I915_GEM_DOMAIN_GTT);
+	else
+		gem_set_domain(fd, userptr.handle, I915_GEM_DOMAIN_GTT, 0);
 
 	madvise(ptr, alloc, MADV_FREE);
 }
@@ -273,7 +285,8 @@ static void leak(int fd, uint64_t alloc)
 
 #define SOLO 1
 #define USERPTR 2
-#define OOM 4
+#define USERPTR_DIRTY 4
+#define OOM 8
 
 static void run_test(int nchildren, uint64_t alloc,
 		     void (*func)(int, uint64_t), unsigned flags)
@@ -309,7 +322,20 @@ static void run_test(int nchildren, uint64_t alloc,
 			igt_until_timeout(timeout) {
 				int fd = drm_open_driver(DRIVER_INTEL);
 				for (int pass = 0; pass < nchildren; pass++)
-					userptr(fd, alloc);
+					userptr(fd, alloc, 0);
+				close(fd);
+			}
+		}
+		nchildren = (nchildren + 1)/2;
+	}
+
+	if (flags & USERPTR_DIRTY) {
+		igt_require(has_userptr());
+		igt_fork(child, (nchildren + 1)/2) {
+			igt_until_timeout(timeout) {
+				int fd = drm_open_driver(DRIVER_INTEL);
+				for (int pass = 0; pass < nchildren; pass++)
+					userptr(fd, alloc, UDIRTY);
 				close(fd);
 			}
 		}
@@ -373,6 +399,7 @@ igt_main
 		void (*func)(int, uint64_t);
 	} tests[] = {
 		{ "get-pages", get_pages },
+		{ "get-pages-dirty", get_pages_dirty },
 		{ "pwrite", pwrite_ },
 		{ "pread", pread_ },
 		{ "mmap-gtt", mmap_gtt },
@@ -390,6 +417,7 @@ igt_main
 		{ "-sanitycheck", SOLO },
 		{ "", 0 },
 		{ "-userptr", USERPTR },
+		{ "-userptr-dirty", USERPTR | USERPTR_DIRTY },
 		{ "-oom", USERPTR | OOM },
 		{ NULL },
 	};
-- 
2.23.0.rc1

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply related	[flat|nested] 29+ messages in thread

* [igt-dev] [PATCH i-g-t 4/9] i915/gem_shrink: Make some pages dirty
@ 2019-08-13  6:20   ` Chris Wilson
  0 siblings, 0 replies; 29+ messages in thread
From: Chris Wilson @ 2019-08-13  6:20 UTC (permalink / raw)
  To: intel-gfx; +Cc: igt-dev

Trying to hit a deadlock for invalidating dirty userptr pages (via
kcompactd).

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
---
 tests/i915/gem_shrink.c | 36 ++++++++++++++++++++++++++++++++----
 1 file changed, 32 insertions(+), 4 deletions(-)

diff --git a/tests/i915/gem_shrink.c b/tests/i915/gem_shrink.c
index 037ff005b..3db754f55 100644
--- a/tests/i915/gem_shrink.c
+++ b/tests/i915/gem_shrink.c
@@ -45,6 +45,13 @@ static void get_pages(int fd, uint64_t alloc)
 	gem_madvise(fd, handle, I915_MADV_DONTNEED);
 }
 
+static void get_pages_dirty(int fd, uint64_t alloc)
+{
+	uint32_t handle = gem_create(fd, alloc);
+	gem_set_domain(fd, handle, I915_GEM_DOMAIN_GTT, I915_GEM_DOMAIN_GTT);
+	gem_madvise(fd, handle, I915_MADV_DONTNEED);
+}
+
 static void pwrite_(int fd, uint64_t alloc)
 {
 	uint32_t tmp;
@@ -214,7 +221,8 @@ static void hang(int fd, uint64_t alloc)
 	munmap(obj, obj_size);
 }
 
-static void userptr(int fd, uint64_t alloc)
+static void userptr(int fd, uint64_t alloc, unsigned int flags)
+#define UDIRTY (1 << 0)
 {
 	struct local_i915_gem_userptr userptr;
 	void *ptr;
@@ -231,7 +239,11 @@ static void userptr(int fd, uint64_t alloc)
 	userptr.user_ptr = to_user_pointer(ptr);
 	do_ioctl(fd, LOCAL_IOCTL_I915_GEM_USERPTR, &userptr);
 
-	gem_set_domain(fd, userptr.handle, I915_GEM_DOMAIN_GTT, 0);
+	if (flags & UDIRTY)
+		gem_set_domain(fd, userptr.handle,
+			       I915_GEM_DOMAIN_GTT, I915_GEM_DOMAIN_GTT);
+	else
+		gem_set_domain(fd, userptr.handle, I915_GEM_DOMAIN_GTT, 0);
 
 	madvise(ptr, alloc, MADV_FREE);
 }
@@ -273,7 +285,8 @@ static void leak(int fd, uint64_t alloc)
 
 #define SOLO 1
 #define USERPTR 2
-#define OOM 4
+#define USERPTR_DIRTY 4
+#define OOM 8
 
 static void run_test(int nchildren, uint64_t alloc,
 		     void (*func)(int, uint64_t), unsigned flags)
@@ -309,7 +322,20 @@ static void run_test(int nchildren, uint64_t alloc,
 			igt_until_timeout(timeout) {
 				int fd = drm_open_driver(DRIVER_INTEL);
 				for (int pass = 0; pass < nchildren; pass++)
-					userptr(fd, alloc);
+					userptr(fd, alloc, 0);
+				close(fd);
+			}
+		}
+		nchildren = (nchildren + 1)/2;
+	}
+
+	if (flags & USERPTR_DIRTY) {
+		igt_require(has_userptr());
+		igt_fork(child, (nchildren + 1)/2) {
+			igt_until_timeout(timeout) {
+				int fd = drm_open_driver(DRIVER_INTEL);
+				for (int pass = 0; pass < nchildren; pass++)
+					userptr(fd, alloc, UDIRTY);
 				close(fd);
 			}
 		}
@@ -373,6 +399,7 @@ igt_main
 		void (*func)(int, uint64_t);
 	} tests[] = {
 		{ "get-pages", get_pages },
+		{ "get-pages-dirty", get_pages_dirty },
 		{ "pwrite", pwrite_ },
 		{ "pread", pread_ },
 		{ "mmap-gtt", mmap_gtt },
@@ -390,6 +417,7 @@ igt_main
 		{ "-sanitycheck", SOLO },
 		{ "", 0 },
 		{ "-userptr", USERPTR },
+		{ "-userptr-dirty", USERPTR | USERPTR_DIRTY },
 		{ "-oom", USERPTR | OOM },
 		{ NULL },
 	};
-- 
2.23.0.rc1

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https://lists.freedesktop.org/mailman/listinfo/igt-dev

^ permalink raw reply related	[flat|nested] 29+ messages in thread

* [PATCH i-g-t 5/9] i915/gem_userptr_blits: Apply some THP pressure
  2019-08-13  6:20 ` [igt-dev] " Chris Wilson
@ 2019-08-13  6:20   ` Chris Wilson
  -1 siblings, 0 replies; 29+ messages in thread
From: Chris Wilson @ 2019-08-13  6:20 UTC (permalink / raw)
  To: intel-gfx; +Cc: igt-dev

Still trying to hit a deadlock with userptr from kcompatcd.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
---
 tests/i915/gem_userptr_blits.c | 49 +++++++++++++++++++++++++++++-----
 1 file changed, 42 insertions(+), 7 deletions(-)

diff --git a/tests/i915/gem_userptr_blits.c b/tests/i915/gem_userptr_blits.c
index 1373f160b..5f7770c93 100644
--- a/tests/i915/gem_userptr_blits.c
+++ b/tests/i915/gem_userptr_blits.c
@@ -1662,20 +1662,24 @@ struct stress_thread_data {
 static void *mm_stress_thread(void *data)
 {
 	struct stress_thread_data *stdata = (struct stress_thread_data *)data;
+	const size_t sz = 2 << 20;
 	void *ptr;
-	int ret;
 
 	while (!stdata->stop) {
-		ptr = mmap(NULL, PAGE_SIZE, PROT_READ | PROT_WRITE,
-				MAP_ANONYMOUS | MAP_PRIVATE, -1, 0);
+		ptr = mmap(NULL, sz, PROT_READ | PROT_WRITE,
+			   MAP_ANONYMOUS | MAP_PRIVATE, -1, 0);
 		if (ptr == MAP_FAILED) {
 			stdata->exit_code = -EFAULT;
 			break;
 		}
-		ret = munmap(ptr, PAGE_SIZE);
-		if (ret) {
-		        stdata->exit_code = errno;
-		        break;
+
+		madvise(ptr, sz, MADV_HUGEPAGE);
+		for (size_t page = 0; page < sz; page += PAGE_SIZE)
+			*(volatile uint32_t *)((unsigned char *)ptr + page) = 0;
+
+		if (munmap(ptr, sz)) {
+			stdata->exit_code = errno;
+			break;
 		}
 	}
 
@@ -1713,6 +1717,35 @@ static void test_stress_mm(int fd)
 	igt_assert_eq(stdata.exit_code, 0);
 }
 
+static void test_stress_purge(int fd)
+{
+	struct stress_thread_data stdata;
+	uint32_t handle;
+	pthread_t t;
+	void *ptr;
+
+	memset(&stdata, 0, sizeof(stdata));
+
+	igt_assert(posix_memalign(&ptr, PAGE_SIZE, PAGE_SIZE) == 0);
+	igt_assert(!pthread_create(&t, NULL, mm_stress_thread, &stdata));
+
+	igt_until_timeout(150) {
+		gem_userptr(fd, ptr, PAGE_SIZE, 0, userptr_flags, &handle);
+
+		gem_set_domain(fd, handle,
+			       I915_GEM_DOMAIN_GTT, I915_GEM_DOMAIN_GTT);
+		intel_purge_vm_caches(fd);
+
+		gem_close(fd, handle);
+	}
+
+	free(ptr);
+
+	stdata.stop = 1;
+	igt_assert(!pthread_join(t, NULL));
+	igt_assert_eq(stdata.exit_code, 0);
+}
+
 struct userptr_close_thread_data {
 	int fd;
 	void *ptr;
@@ -1975,6 +2008,8 @@ igt_main_args("c:", NULL, help_str, opt_handler, NULL)
 
 		igt_subtest("stress-mm")
 			test_stress_mm(fd);
+		igt_subtest("stress-purge")
+			test_stress_purge(fd);
 
 		igt_subtest("stress-mm-invalidate-close")
 			test_invalidate_close_race(fd, false);
-- 
2.23.0.rc1

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https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply related	[flat|nested] 29+ messages in thread

* [igt-dev] [PATCH i-g-t 5/9] i915/gem_userptr_blits: Apply some THP pressure
@ 2019-08-13  6:20   ` Chris Wilson
  0 siblings, 0 replies; 29+ messages in thread
From: Chris Wilson @ 2019-08-13  6:20 UTC (permalink / raw)
  To: intel-gfx; +Cc: igt-dev

Still trying to hit a deadlock with userptr from kcompatcd.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
---
 tests/i915/gem_userptr_blits.c | 49 +++++++++++++++++++++++++++++-----
 1 file changed, 42 insertions(+), 7 deletions(-)

diff --git a/tests/i915/gem_userptr_blits.c b/tests/i915/gem_userptr_blits.c
index 1373f160b..5f7770c93 100644
--- a/tests/i915/gem_userptr_blits.c
+++ b/tests/i915/gem_userptr_blits.c
@@ -1662,20 +1662,24 @@ struct stress_thread_data {
 static void *mm_stress_thread(void *data)
 {
 	struct stress_thread_data *stdata = (struct stress_thread_data *)data;
+	const size_t sz = 2 << 20;
 	void *ptr;
-	int ret;
 
 	while (!stdata->stop) {
-		ptr = mmap(NULL, PAGE_SIZE, PROT_READ | PROT_WRITE,
-				MAP_ANONYMOUS | MAP_PRIVATE, -1, 0);
+		ptr = mmap(NULL, sz, PROT_READ | PROT_WRITE,
+			   MAP_ANONYMOUS | MAP_PRIVATE, -1, 0);
 		if (ptr == MAP_FAILED) {
 			stdata->exit_code = -EFAULT;
 			break;
 		}
-		ret = munmap(ptr, PAGE_SIZE);
-		if (ret) {
-		        stdata->exit_code = errno;
-		        break;
+
+		madvise(ptr, sz, MADV_HUGEPAGE);
+		for (size_t page = 0; page < sz; page += PAGE_SIZE)
+			*(volatile uint32_t *)((unsigned char *)ptr + page) = 0;
+
+		if (munmap(ptr, sz)) {
+			stdata->exit_code = errno;
+			break;
 		}
 	}
 
@@ -1713,6 +1717,35 @@ static void test_stress_mm(int fd)
 	igt_assert_eq(stdata.exit_code, 0);
 }
 
+static void test_stress_purge(int fd)
+{
+	struct stress_thread_data stdata;
+	uint32_t handle;
+	pthread_t t;
+	void *ptr;
+
+	memset(&stdata, 0, sizeof(stdata));
+
+	igt_assert(posix_memalign(&ptr, PAGE_SIZE, PAGE_SIZE) == 0);
+	igt_assert(!pthread_create(&t, NULL, mm_stress_thread, &stdata));
+
+	igt_until_timeout(150) {
+		gem_userptr(fd, ptr, PAGE_SIZE, 0, userptr_flags, &handle);
+
+		gem_set_domain(fd, handle,
+			       I915_GEM_DOMAIN_GTT, I915_GEM_DOMAIN_GTT);
+		intel_purge_vm_caches(fd);
+
+		gem_close(fd, handle);
+	}
+
+	free(ptr);
+
+	stdata.stop = 1;
+	igt_assert(!pthread_join(t, NULL));
+	igt_assert_eq(stdata.exit_code, 0);
+}
+
 struct userptr_close_thread_data {
 	int fd;
 	void *ptr;
@@ -1975,6 +2008,8 @@ igt_main_args("c:", NULL, help_str, opt_handler, NULL)
 
 		igt_subtest("stress-mm")
 			test_stress_mm(fd);
+		igt_subtest("stress-purge")
+			test_stress_purge(fd);
 
 		igt_subtest("stress-mm-invalidate-close")
 			test_invalidate_close_race(fd, false);
-- 
2.23.0.rc1

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^ permalink raw reply related	[flat|nested] 29+ messages in thread

* [PATCH i-g-t 6/9] i915/gem_exec_schedule: Check timeslice
  2019-08-13  6:20 ` [igt-dev] " Chris Wilson
@ 2019-08-13  6:20   ` Chris Wilson
  -1 siblings, 0 replies; 29+ messages in thread
From: Chris Wilson @ 2019-08-13  6:20 UTC (permalink / raw)
  To: intel-gfx; +Cc: igt-dev

Check that we can run a second request even if an equal priority spinner
is hogging the engine.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
---
 tests/i915/gem_exec_schedule.c | 36 ++++++++++++++++++++++++++++++++++
 1 file changed, 36 insertions(+)

diff --git a/tests/i915/gem_exec_schedule.c b/tests/i915/gem_exec_schedule.c
index 058102103..04cede9c9 100644
--- a/tests/i915/gem_exec_schedule.c
+++ b/tests/i915/gem_exec_schedule.c
@@ -1033,6 +1033,39 @@ static void preempt_queue(int fd, unsigned ring, unsigned int flags)
 	}
 }
 
+static void preempt_timeslice(int fd, unsigned ring)
+{
+	const uint32_t bbe = MI_BATCH_BUFFER_END;
+	struct drm_i915_gem_exec_object2 obj = {
+		.handle = gem_create(fd, 4096)
+	};
+	struct drm_i915_gem_execbuffer2 execbuf = {
+		.buffers_ptr = to_user_pointer(&obj),
+		.buffer_count = 1,
+		.flags = ring,
+		.rsvd1 = gem_context_create(fd),
+	};
+	igt_spin_t *spin;
+
+	/*
+	 * Launch a spinner to occupy the target engine, and then
+	 * check we execute a ping underneath it from a second context.
+	 */
+	spin = igt_spin_new(fd, .engine = ring, .flags = IGT_SPIN_POLL_RUN);
+	igt_spin_busywait_until_started(spin);
+
+	/* Both the active spinner and this are at the same priority */
+	gem_write(fd, obj.handle, 0, &bbe, sizeof(bbe));
+	gem_execbuf(fd, &execbuf);
+	gem_sync(fd, obj.handle);
+
+	igt_assert(gem_bo_busy(fd, spin->handle));
+	igt_spin_free(fd, spin);
+
+	gem_context_destroy(fd, execbuf.rsvd1);
+	gem_close(fd, obj.handle);
+}
+
 static void preempt_self(int fd, unsigned ring)
 {
 	uint32_t result = gem_create(fd, 4096);
@@ -1740,6 +1773,9 @@ igt_main
 					igt_subtest_f("preempt-queue-contexts-chain-%s", e->name)
 						preempt_queue(fd, e->exec_id | e->flags, CONTEXTS | CHAIN);
 
+					igt_subtest_f("preempt-timeslice-%s", e->name)
+						preempt_timeslice(fd, e->exec_id | e->flags);
+
 					igt_subtest_group {
 						igt_hang_t hang;
 
-- 
2.23.0.rc1

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https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply related	[flat|nested] 29+ messages in thread

* [Intel-gfx] [PATCH i-g-t 6/9] i915/gem_exec_schedule: Check timeslice
@ 2019-08-13  6:20   ` Chris Wilson
  0 siblings, 0 replies; 29+ messages in thread
From: Chris Wilson @ 2019-08-13  6:20 UTC (permalink / raw)
  To: intel-gfx; +Cc: igt-dev

Check that we can run a second request even if an equal priority spinner
is hogging the engine.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
---
 tests/i915/gem_exec_schedule.c | 36 ++++++++++++++++++++++++++++++++++
 1 file changed, 36 insertions(+)

diff --git a/tests/i915/gem_exec_schedule.c b/tests/i915/gem_exec_schedule.c
index 058102103..04cede9c9 100644
--- a/tests/i915/gem_exec_schedule.c
+++ b/tests/i915/gem_exec_schedule.c
@@ -1033,6 +1033,39 @@ static void preempt_queue(int fd, unsigned ring, unsigned int flags)
 	}
 }
 
+static void preempt_timeslice(int fd, unsigned ring)
+{
+	const uint32_t bbe = MI_BATCH_BUFFER_END;
+	struct drm_i915_gem_exec_object2 obj = {
+		.handle = gem_create(fd, 4096)
+	};
+	struct drm_i915_gem_execbuffer2 execbuf = {
+		.buffers_ptr = to_user_pointer(&obj),
+		.buffer_count = 1,
+		.flags = ring,
+		.rsvd1 = gem_context_create(fd),
+	};
+	igt_spin_t *spin;
+
+	/*
+	 * Launch a spinner to occupy the target engine, and then
+	 * check we execute a ping underneath it from a second context.
+	 */
+	spin = igt_spin_new(fd, .engine = ring, .flags = IGT_SPIN_POLL_RUN);
+	igt_spin_busywait_until_started(spin);
+
+	/* Both the active spinner and this are at the same priority */
+	gem_write(fd, obj.handle, 0, &bbe, sizeof(bbe));
+	gem_execbuf(fd, &execbuf);
+	gem_sync(fd, obj.handle);
+
+	igt_assert(gem_bo_busy(fd, spin->handle));
+	igt_spin_free(fd, spin);
+
+	gem_context_destroy(fd, execbuf.rsvd1);
+	gem_close(fd, obj.handle);
+}
+
 static void preempt_self(int fd, unsigned ring)
 {
 	uint32_t result = gem_create(fd, 4096);
@@ -1740,6 +1773,9 @@ igt_main
 					igt_subtest_f("preempt-queue-contexts-chain-%s", e->name)
 						preempt_queue(fd, e->exec_id | e->flags, CONTEXTS | CHAIN);
 
+					igt_subtest_f("preempt-timeslice-%s", e->name)
+						preempt_timeslice(fd, e->exec_id | e->flags);
+
 					igt_subtest_group {
 						igt_hang_t hang;
 
-- 
2.23.0.rc1

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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply related	[flat|nested] 29+ messages in thread

* [PATCH i-g-t 7/9] i915/perf_pmu: Flush idle work before waiting for suspend
  2019-08-13  6:20 ` [igt-dev] " Chris Wilson
@ 2019-08-13  6:20   ` Chris Wilson
  -1 siblings, 0 replies; 29+ messages in thread
From: Chris Wilson @ 2019-08-13  6:20 UTC (permalink / raw)
  To: intel-gfx; +Cc: igt-dev

Runtime suspend kicks in quicker if we flush any idle work that may been
accrued.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
---
 tests/perf_pmu.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/tests/perf_pmu.c b/tests/perf_pmu.c
index d392a67d4..351090710 100644
--- a/tests/perf_pmu.c
+++ b/tests/perf_pmu.c
@@ -1417,6 +1417,7 @@ test_rc6(int gem_fd, unsigned int flags)
 		drmModeFreeResources(res);
 
 		igt_require(igt_setup_runtime_pm());
+		igt_drop_caches_set(gem_fd, DROP_IDLE);
 		igt_require(igt_wait_for_pm_status(IGT_RUNTIME_PM_STATUS_SUSPENDED));
 
 		/*
-- 
2.23.0.rc1

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https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply related	[flat|nested] 29+ messages in thread

* [igt-dev] [PATCH i-g-t 7/9] i915/perf_pmu: Flush idle work before waiting for suspend
@ 2019-08-13  6:20   ` Chris Wilson
  0 siblings, 0 replies; 29+ messages in thread
From: Chris Wilson @ 2019-08-13  6:20 UTC (permalink / raw)
  To: intel-gfx; +Cc: igt-dev

Runtime suspend kicks in quicker if we flush any idle work that may been
accrued.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
---
 tests/perf_pmu.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/tests/perf_pmu.c b/tests/perf_pmu.c
index d392a67d4..351090710 100644
--- a/tests/perf_pmu.c
+++ b/tests/perf_pmu.c
@@ -1417,6 +1417,7 @@ test_rc6(int gem_fd, unsigned int flags)
 		drmModeFreeResources(res);
 
 		igt_require(igt_setup_runtime_pm());
+		igt_drop_caches_set(gem_fd, DROP_IDLE);
 		igt_require(igt_wait_for_pm_status(IGT_RUNTIME_PM_STATUS_SUSPENDED));
 
 		/*
-- 
2.23.0.rc1

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^ permalink raw reply related	[flat|nested] 29+ messages in thread

* [PATCH i-g-t 8/9] Force spin-batch to cause a hang as required
  2019-08-13  6:20 ` [igt-dev] " Chris Wilson
@ 2019-08-13  6:20   ` Chris Wilson
  -1 siblings, 0 replies; 29+ messages in thread
From: Chris Wilson @ 2019-08-13  6:20 UTC (permalink / raw)
  To: intel-gfx; +Cc: igt-dev

When using a spinner to trigger a hang, make it unpreemptable so that it
appears like a true hang.

References: https://bugs.freedesktop.org/show_bug.cgi?id=109661
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
---
 tests/i915/gem_eio.c        | 4 +++-
 tests/i915/gem_exec_fence.c | 3 ++-
 tests/kms_busy.c            | 3 ++-
 3 files changed, 7 insertions(+), 3 deletions(-)

diff --git a/tests/i915/gem_eio.c b/tests/i915/gem_eio.c
index 9b086a039..a783b7bff 100644
--- a/tests/i915/gem_eio.c
+++ b/tests/i915/gem_eio.c
@@ -176,7 +176,9 @@ static igt_spin_t * __spin_poll(int fd, uint32_t ctx, unsigned long flags)
 	struct igt_spin_factory opts = {
 		.ctx = ctx,
 		.engine = flags,
-		.flags = IGT_SPIN_FAST | IGT_SPIN_FENCE_OUT,
+		.flags = (IGT_SPIN_FAST |
+			  IGT_SPIN_NO_PREEMPTION |
+			  IGT_SPIN_FENCE_OUT),
 	};
 
 	if (gem_can_store_dword(fd, opts.engine))
diff --git a/tests/i915/gem_exec_fence.c b/tests/i915/gem_exec_fence.c
index 207182922..2f04d7af4 100644
--- a/tests/i915/gem_exec_fence.c
+++ b/tests/i915/gem_exec_fence.c
@@ -331,7 +331,8 @@ static void test_fence_await(int fd, unsigned ring, unsigned flags)
 
 	spin = igt_spin_new(fd,
 			    .engine = ring,
-			    .flags = IGT_SPIN_FENCE_OUT);
+			    .flags = (IGT_SPIN_FENCE_OUT |
+				      IGT_SPIN_NO_PREEMPTION));
 	igt_assert(spin->out_fence != -1);
 
 	i = 0;
diff --git a/tests/kms_busy.c b/tests/kms_busy.c
index 66f26cd08..7e5ab3d19 100644
--- a/tests/kms_busy.c
+++ b/tests/kms_busy.c
@@ -271,7 +271,8 @@ static void test_pageflip_modeset_hang(igt_display_t *dpy,
 
 	t = igt_spin_new(dpy->drm_fd,
 			 .engine = ring,
-			 .dependency = fb.gem_handle);
+			 .dependency = fb.gem_handle,
+			 .flags = IGT_SPIN_NO_PREEMPTION);
 
 	do_or_die(drmModePageFlip(dpy->drm_fd, dpy->pipes[pipe].crtc_id, fb.fb_id, DRM_MODE_PAGE_FLIP_EVENT, &fb));
 
-- 
2.23.0.rc1

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https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply related	[flat|nested] 29+ messages in thread

* [igt-dev] [PATCH i-g-t 8/9] Force spin-batch to cause a hang as required
@ 2019-08-13  6:20   ` Chris Wilson
  0 siblings, 0 replies; 29+ messages in thread
From: Chris Wilson @ 2019-08-13  6:20 UTC (permalink / raw)
  To: intel-gfx; +Cc: igt-dev

When using a spinner to trigger a hang, make it unpreemptable so that it
appears like a true hang.

References: https://bugs.freedesktop.org/show_bug.cgi?id=109661
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
---
 tests/i915/gem_eio.c        | 4 +++-
 tests/i915/gem_exec_fence.c | 3 ++-
 tests/kms_busy.c            | 3 ++-
 3 files changed, 7 insertions(+), 3 deletions(-)

diff --git a/tests/i915/gem_eio.c b/tests/i915/gem_eio.c
index 9b086a039..a783b7bff 100644
--- a/tests/i915/gem_eio.c
+++ b/tests/i915/gem_eio.c
@@ -176,7 +176,9 @@ static igt_spin_t * __spin_poll(int fd, uint32_t ctx, unsigned long flags)
 	struct igt_spin_factory opts = {
 		.ctx = ctx,
 		.engine = flags,
-		.flags = IGT_SPIN_FAST | IGT_SPIN_FENCE_OUT,
+		.flags = (IGT_SPIN_FAST |
+			  IGT_SPIN_NO_PREEMPTION |
+			  IGT_SPIN_FENCE_OUT),
 	};
 
 	if (gem_can_store_dword(fd, opts.engine))
diff --git a/tests/i915/gem_exec_fence.c b/tests/i915/gem_exec_fence.c
index 207182922..2f04d7af4 100644
--- a/tests/i915/gem_exec_fence.c
+++ b/tests/i915/gem_exec_fence.c
@@ -331,7 +331,8 @@ static void test_fence_await(int fd, unsigned ring, unsigned flags)
 
 	spin = igt_spin_new(fd,
 			    .engine = ring,
-			    .flags = IGT_SPIN_FENCE_OUT);
+			    .flags = (IGT_SPIN_FENCE_OUT |
+				      IGT_SPIN_NO_PREEMPTION));
 	igt_assert(spin->out_fence != -1);
 
 	i = 0;
diff --git a/tests/kms_busy.c b/tests/kms_busy.c
index 66f26cd08..7e5ab3d19 100644
--- a/tests/kms_busy.c
+++ b/tests/kms_busy.c
@@ -271,7 +271,8 @@ static void test_pageflip_modeset_hang(igt_display_t *dpy,
 
 	t = igt_spin_new(dpy->drm_fd,
 			 .engine = ring,
-			 .dependency = fb.gem_handle);
+			 .dependency = fb.gem_handle,
+			 .flags = IGT_SPIN_NO_PREEMPTION);
 
 	do_or_die(drmModePageFlip(dpy->drm_fd, dpy->pipes[pipe].crtc_id, fb.fb_id, DRM_MODE_PAGE_FLIP_EVENT, &fb));
 
-- 
2.23.0.rc1

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https://lists.freedesktop.org/mailman/listinfo/igt-dev

^ permalink raw reply related	[flat|nested] 29+ messages in thread

* [PATCH i-g-t 9/9] i915/gem_ctx_engine: Drip feed requests into 'independent'
  2019-08-13  6:20 ` [igt-dev] " Chris Wilson
@ 2019-08-13  6:20   ` Chris Wilson
  -1 siblings, 0 replies; 29+ messages in thread
From: Chris Wilson @ 2019-08-13  6:20 UTC (permalink / raw)
  To: intel-gfx; +Cc: igt-dev

The intent of the test is to exercise that each channel in the engine[]
is an independent context/ring/timeline. It setups 64 channels pointing
to rcs0 and then submits one request to each in turn waiting on a
timeline that will force them to run out of submission order. They can
only run in fence order and not submission order if the timelines of
each channel are truly independent.

However, we released the fences en masse, and once the requests are
ready they are independent any may be executed in any order by the HW,
especially true with timeslicing that may reorder the requests on a
whim. So instead of releasing all requests at once, increment the
timeline step by step and check we get our results advancing. If the
requests can not be run in fence order and fall back to submission
order, we will time out waiting for our incremental results and trigger
a few GPU hangs.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=110987
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
---
 tests/i915/gem_ctx_engines.c | 39 +++++++++++++++++++++++++++---------
 1 file changed, 29 insertions(+), 10 deletions(-)

diff --git a/tests/i915/gem_ctx_engines.c b/tests/i915/gem_ctx_engines.c
index 8c66fb261..2e80d0f3e 100644
--- a/tests/i915/gem_ctx_engines.c
+++ b/tests/i915/gem_ctx_engines.c
@@ -405,6 +405,14 @@ static void execute_allforone(int i915)
 	gem_context_destroy(i915, param.ctx_id);
 }
 
+static uint32_t read_result(int timeline, uint32_t *map, int idx)
+{
+	sw_sync_timeline_inc(timeline, 1);
+	while (!READ_ONCE(map[idx]))
+		;
+	return map[idx];
+}
+
 static void independent(int i915)
 {
 #define RCS_TIMESTAMP (0x2000 + 0x358)
@@ -438,6 +446,12 @@ static void independent(int i915)
 	memset(&engines, 0, sizeof(engines)); /* All rcs0 */
 	gem_context_set_param(i915, &param);
 
+	gem_set_caching(i915, results.handle, I915_CACHING_CACHED);
+	map = gem_mmap__cpu(i915, results.handle, 0, 4096, PROT_READ);
+	gem_set_domain(i915, results.handle,
+		       I915_GEM_DOMAIN_CPU, I915_GEM_DOMAIN_CPU);
+	memset(map, 0, 4096);
+
 	for (int i = 0; i < I915_EXEC_RING_MASK + 1; i++) {
 		struct drm_i915_gem_exec_object2 obj[2] = {
 			results, /* write hazard lies! */
@@ -472,21 +486,21 @@ static void independent(int i915)
 		gem_close(i915, obj[1].handle);
 		close(execbuf.rsvd2);
 	}
-	close(timeline);
-	gem_sync(i915, results.handle);
-
-	map = gem_mmap__cpu(i915, results.handle, 0, 4096, PROT_READ);
-	gem_set_domain(i915, results.handle, I915_GEM_DOMAIN_CPU, 0);
-	gem_close(i915, results.handle);
 
-	last = map[0];
+	last = read_result(timeline, map, 0);
 	for (int i = 1; i < I915_EXEC_RING_MASK + 1; i++) {
-		igt_assert_f((map[i] - last) > 0,
-			     "Engine instance [%d] executed too late\n", i);
-		last = map[i];
+		uint32_t t = read_result(timeline, map, i);
+		igt_assert_f(t - last > 0,
+			     "Engine instance [%d] executed too late, previous timestamp %08x, now %08x\n",
+			     i, last, t);
+		last = t;
 	}
 	munmap(map, 4096);
 
+	close(timeline);
+	gem_sync(i915, results.handle);
+	gem_close(i915, results.handle);
+
 	gem_context_destroy(i915, param.ctx_id);
 }
 
@@ -500,6 +514,8 @@ igt_main
 
 		gem_require_contexts(i915);
 		igt_require(has_context_engines(i915));
+
+		igt_fork_hang_detector(i915);
 	}
 
 	igt_subtest("invalid-engines")
@@ -519,4 +535,7 @@ igt_main
 
 	igt_subtest("independent")
 		independent(i915);
+
+	igt_fixture
+		igt_stop_hang_detector();
 }
-- 
2.23.0.rc1

_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply related	[flat|nested] 29+ messages in thread

* [igt-dev] [PATCH i-g-t 9/9] i915/gem_ctx_engine: Drip feed requests into 'independent'
@ 2019-08-13  6:20   ` Chris Wilson
  0 siblings, 0 replies; 29+ messages in thread
From: Chris Wilson @ 2019-08-13  6:20 UTC (permalink / raw)
  To: intel-gfx; +Cc: igt-dev

The intent of the test is to exercise that each channel in the engine[]
is an independent context/ring/timeline. It setups 64 channels pointing
to rcs0 and then submits one request to each in turn waiting on a
timeline that will force them to run out of submission order. They can
only run in fence order and not submission order if the timelines of
each channel are truly independent.

However, we released the fences en masse, and once the requests are
ready they are independent any may be executed in any order by the HW,
especially true with timeslicing that may reorder the requests on a
whim. So instead of releasing all requests at once, increment the
timeline step by step and check we get our results advancing. If the
requests can not be run in fence order and fall back to submission
order, we will time out waiting for our incremental results and trigger
a few GPU hangs.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=110987
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
---
 tests/i915/gem_ctx_engines.c | 39 +++++++++++++++++++++++++++---------
 1 file changed, 29 insertions(+), 10 deletions(-)

diff --git a/tests/i915/gem_ctx_engines.c b/tests/i915/gem_ctx_engines.c
index 8c66fb261..2e80d0f3e 100644
--- a/tests/i915/gem_ctx_engines.c
+++ b/tests/i915/gem_ctx_engines.c
@@ -405,6 +405,14 @@ static void execute_allforone(int i915)
 	gem_context_destroy(i915, param.ctx_id);
 }
 
+static uint32_t read_result(int timeline, uint32_t *map, int idx)
+{
+	sw_sync_timeline_inc(timeline, 1);
+	while (!READ_ONCE(map[idx]))
+		;
+	return map[idx];
+}
+
 static void independent(int i915)
 {
 #define RCS_TIMESTAMP (0x2000 + 0x358)
@@ -438,6 +446,12 @@ static void independent(int i915)
 	memset(&engines, 0, sizeof(engines)); /* All rcs0 */
 	gem_context_set_param(i915, &param);
 
+	gem_set_caching(i915, results.handle, I915_CACHING_CACHED);
+	map = gem_mmap__cpu(i915, results.handle, 0, 4096, PROT_READ);
+	gem_set_domain(i915, results.handle,
+		       I915_GEM_DOMAIN_CPU, I915_GEM_DOMAIN_CPU);
+	memset(map, 0, 4096);
+
 	for (int i = 0; i < I915_EXEC_RING_MASK + 1; i++) {
 		struct drm_i915_gem_exec_object2 obj[2] = {
 			results, /* write hazard lies! */
@@ -472,21 +486,21 @@ static void independent(int i915)
 		gem_close(i915, obj[1].handle);
 		close(execbuf.rsvd2);
 	}
-	close(timeline);
-	gem_sync(i915, results.handle);
-
-	map = gem_mmap__cpu(i915, results.handle, 0, 4096, PROT_READ);
-	gem_set_domain(i915, results.handle, I915_GEM_DOMAIN_CPU, 0);
-	gem_close(i915, results.handle);
 
-	last = map[0];
+	last = read_result(timeline, map, 0);
 	for (int i = 1; i < I915_EXEC_RING_MASK + 1; i++) {
-		igt_assert_f((map[i] - last) > 0,
-			     "Engine instance [%d] executed too late\n", i);
-		last = map[i];
+		uint32_t t = read_result(timeline, map, i);
+		igt_assert_f(t - last > 0,
+			     "Engine instance [%d] executed too late, previous timestamp %08x, now %08x\n",
+			     i, last, t);
+		last = t;
 	}
 	munmap(map, 4096);
 
+	close(timeline);
+	gem_sync(i915, results.handle);
+	gem_close(i915, results.handle);
+
 	gem_context_destroy(i915, param.ctx_id);
 }
 
@@ -500,6 +514,8 @@ igt_main
 
 		gem_require_contexts(i915);
 		igt_require(has_context_engines(i915));
+
+		igt_fork_hang_detector(i915);
 	}
 
 	igt_subtest("invalid-engines")
@@ -519,4 +535,7 @@ igt_main
 
 	igt_subtest("independent")
 		independent(i915);
+
+	igt_fixture
+		igt_stop_hang_detector();
 }
-- 
2.23.0.rc1

_______________________________________________
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igt-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/igt-dev

^ permalink raw reply related	[flat|nested] 29+ messages in thread

* [igt-dev] ✗ Fi.CI.BAT: failure for series starting with [i-g-t,1/9] i915/gem_exec_schedule: Limit the plug to fit small rings
  2019-08-13  6:20 ` [igt-dev] " Chris Wilson
                   ` (8 preceding siblings ...)
  (?)
@ 2019-08-13  7:22 ` Patchwork
  -1 siblings, 0 replies; 29+ messages in thread
From: Patchwork @ 2019-08-13  7:22 UTC (permalink / raw)
  To: Chris Wilson; +Cc: igt-dev

== Series Details ==

Series: series starting with [i-g-t,1/9] i915/gem_exec_schedule: Limit the plug to fit small rings
URL   : https://patchwork.freedesktop.org/series/65109/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_6690 -> IGTPW_3337
====================================================

Summary
-------

  **FAILURE**

  Serious unknown changes coming with IGTPW_3337 absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in IGTPW_3337, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  External URL: https://patchwork.freedesktop.org/api/1.0/series/65109/revisions/1/mbox/

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in IGTPW_3337:

### IGT changes ###

#### Possible regressions ####

  * igt@i915_selftest@live_sanitycheck:
    - fi-kbl-7500u:       [PASS][1] -> [INCOMPLETE][2]
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6690/fi-kbl-7500u/igt@i915_selftest@live_sanitycheck.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3337/fi-kbl-7500u/igt@i915_selftest@live_sanitycheck.html

  
Known issues
------------

  Here are the changes found in IGTPW_3337 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@gem_mmap_gtt@basic-write-cpu-read-gtt:
    - fi-icl-u3:          [PASS][3] -> [DMESG-WARN][4] ([fdo#107724])
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6690/fi-icl-u3/igt@gem_mmap_gtt@basic-write-cpu-read-gtt.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3337/fi-icl-u3/igt@gem_mmap_gtt@basic-write-cpu-read-gtt.html

  * igt@kms_busy@basic-flip-a:
    - fi-kbl-7567u:       [PASS][5] -> [SKIP][6] ([fdo#109271] / [fdo#109278]) +2 similar issues
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6690/fi-kbl-7567u/igt@kms_busy@basic-flip-a.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3337/fi-kbl-7567u/igt@kms_busy@basic-flip-a.html

  * igt@kms_busy@basic-flip-c:
    - fi-kbl-7500u:       [PASS][7] -> [SKIP][8] ([fdo#109271] / [fdo#109278]) +2 similar issues
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6690/fi-kbl-7500u/igt@kms_busy@basic-flip-c.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3337/fi-kbl-7500u/igt@kms_busy@basic-flip-c.html

  * igt@kms_chamelium@hdmi-hpd-fast:
    - fi-kbl-7500u:       [PASS][9] -> [FAIL][10] ([fdo#109485])
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6690/fi-kbl-7500u/igt@kms_chamelium@hdmi-hpd-fast.html
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3337/fi-kbl-7500u/igt@kms_chamelium@hdmi-hpd-fast.html

  * igt@kms_frontbuffer_tracking@basic:
    - fi-icl-u2:          [PASS][11] -> [FAIL][12] ([fdo#103167])
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6690/fi-icl-u2/igt@kms_frontbuffer_tracking@basic.html
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3337/fi-icl-u2/igt@kms_frontbuffer_tracking@basic.html

  
#### Possible fixes ####

  * igt@gem_exec_suspend@basic-s4-devices:
    - fi-blb-e6850:       [INCOMPLETE][13] ([fdo#107718]) -> [PASS][14]
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6690/fi-blb-e6850/igt@gem_exec_suspend@basic-s4-devices.html
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3337/fi-blb-e6850/igt@gem_exec_suspend@basic-s4-devices.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167
  [fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713
  [fdo#107718]: https://bugs.freedesktop.org/show_bug.cgi?id=107718
  [fdo#107724]: https://bugs.freedesktop.org/show_bug.cgi?id=107724
  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [fdo#109278]: https://bugs.freedesktop.org/show_bug.cgi?id=109278
  [fdo#109485]: https://bugs.freedesktop.org/show_bug.cgi?id=109485


Participating hosts (54 -> 45)
------------------------------

  Missing    (9): fi-kbl-soraka fi-cml-u2 fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-icl-y fi-byt-clapper fi-bdw-samus 


Build changes
-------------

  * CI: CI-20190529 -> None
  * IGT: IGT_5129 -> IGTPW_3337

  CI-20190529: 20190529
  CI_DRM_6690: cf72e4ec99679a4a65fbb94341e3b6033a76483b @ git://anongit.freedesktop.org/gfx-ci/linux
  IGTPW_3337: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3337/
  IGT_5129: 06d5765ab2daba9f8826a36ce99eb95b58d4ccf4 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools



== Testlist changes ==

+igt@gem_exec_schedule@preempt-timeslice-blt
+igt@gem_exec_schedule@preempt-timeslice-bsd
+igt@gem_exec_schedule@preempt-timeslice-bsd1
+igt@gem_exec_schedule@preempt-timeslice-bsd2
+igt@gem_exec_schedule@preempt-timeslice-render
+igt@gem_exec_schedule@preempt-timeslice-vebox
+igt@gem_mmap_gtt@isolation
+igt@gem_shrink@execbuf1-userptr-dirty
+igt@gem_shrink@execbufn-userptr-dirty
+igt@gem_shrink@execbufx-userptr-dirty
+igt@gem_shrink@get-pages-dirty
+igt@gem_shrink@get-pages-dirty-oom
+igt@gem_shrink@get-pages-dirty-sanitycheck
+igt@gem_shrink@get-pages-dirty-userptr
+igt@gem_shrink@get-pages-dirty-userptr-dirty
+igt@gem_shrink@get-pages-userptr-dirty
+igt@gem_shrink@hang-userptr-dirty
+igt@gem_shrink@mmap-cpu-userptr-dirty
+igt@gem_shrink@mmap-gtt-userptr-dirty
+igt@gem_shrink@pread-userptr-dirty
+igt@gem_shrink@pwrite-userptr-dirty
+igt@gem_userptr_blits@stress-purge

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3337/
_______________________________________________
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igt-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/igt-dev

^ permalink raw reply	[flat|nested] 29+ messages in thread

* Re: [igt-dev] [PATCH i-g-t 1/9] i915/gem_exec_schedule: Limit the plug to fit small rings
  2019-08-13  6:20 ` [igt-dev] " Chris Wilson
@ 2019-08-13 14:20   ` Andi Shyti
  -1 siblings, 0 replies; 29+ messages in thread
From: Andi Shyti @ 2019-08-13 14:20 UTC (permalink / raw)
  To: Chris Wilson; +Cc: igt-dev, intel-gfx

Hi Chris,

On Tue, Aug 13, 2019 at 07:20:08AM +0100, Chris Wilson wrote:
> If we are not running with a scheduler, we are using a global ringbuffer
> which may not accommodate 16 extra batches. Fortunately, we only need
> one such batch to block the submission queue as without a scheduler, it
> is in order submission (and so the batch is after the main setup
> anyway!).
> 
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>

looks straight forward to me.

Reviewed-by: Andi Shyti <andi.shyti@intel.com>

Andi
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^ permalink raw reply	[flat|nested] 29+ messages in thread

* Re: [igt-dev] [PATCH i-g-t 1/9] i915/gem_exec_schedule: Limit the plug to fit small rings
@ 2019-08-13 14:20   ` Andi Shyti
  0 siblings, 0 replies; 29+ messages in thread
From: Andi Shyti @ 2019-08-13 14:20 UTC (permalink / raw)
  To: Chris Wilson; +Cc: igt-dev, intel-gfx

Hi Chris,

On Tue, Aug 13, 2019 at 07:20:08AM +0100, Chris Wilson wrote:
> If we are not running with a scheduler, we are using a global ringbuffer
> which may not accommodate 16 extra batches. Fortunately, we only need
> one such batch to block the submission queue as without a scheduler, it
> is in order submission (and so the batch is after the main setup
> anyway!).
> 
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>

looks straight forward to me.

Reviewed-by: Andi Shyti <andi.shyti@intel.com>

Andi
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^ permalink raw reply	[flat|nested] 29+ messages in thread

* Re: [PATCH i-g-t 2/9] i915/gem_eio: Restrict number of batches of submitted
  2019-08-13  6:20   ` [igt-dev] " Chris Wilson
@ 2019-08-13 14:21     ` Andi Shyti
  -1 siblings, 0 replies; 29+ messages in thread
From: Andi Shyti @ 2019-08-13 14:21 UTC (permalink / raw)
  To: Chris Wilson; +Cc: igt-dev, intel-gfx

Hi Chris,

On Tue, Aug 13, 2019 at 07:20:09AM +0100, Chris Wilson wrote:
> Make sure we don't block while setting up the stress case before the
> reset by only submitting less batches than would fill the ring.
> 
> References: https://bugs.freedesktop.org/show_bug.cgi?id=111379
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>

Reviewed-by: Andi Shyti <andi.shyti@intel.com>

Andi
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^ permalink raw reply	[flat|nested] 29+ messages in thread

* Re: [igt-dev] [Intel-gfx] [PATCH i-g-t 2/9] i915/gem_eio: Restrict number of batches of submitted
@ 2019-08-13 14:21     ` Andi Shyti
  0 siblings, 0 replies; 29+ messages in thread
From: Andi Shyti @ 2019-08-13 14:21 UTC (permalink / raw)
  To: Chris Wilson; +Cc: igt-dev, intel-gfx

Hi Chris,

On Tue, Aug 13, 2019 at 07:20:09AM +0100, Chris Wilson wrote:
> Make sure we don't block while setting up the stress case before the
> reset by only submitting less batches than would fill the ring.
> 
> References: https://bugs.freedesktop.org/show_bug.cgi?id=111379
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>

Reviewed-by: Andi Shyti <andi.shyti@intel.com>

Andi
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^ permalink raw reply	[flat|nested] 29+ messages in thread

* Re: [igt-dev] [PATCH i-g-t 9/9] i915/gem_ctx_engine: Drip feed requests into 'independent'
  2019-08-13  6:20   ` [igt-dev] " Chris Wilson
@ 2019-08-13 15:37     ` Andi Shyti
  -1 siblings, 0 replies; 29+ messages in thread
From: Andi Shyti @ 2019-08-13 15:37 UTC (permalink / raw)
  To: Chris Wilson; +Cc: igt-dev, intel-gfx

Hi Chris,

On Tue, Aug 13, 2019 at 07:20:16AM +0100, Chris Wilson wrote:
> The intent of the test is to exercise that each channel in the engine[]
> is an independent context/ring/timeline. It setups 64 channels pointing
> to rcs0 and then submits one request to each in turn waiting on a
> timeline that will force them to run out of submission order. They can
> only run in fence order and not submission order if the timelines of
> each channel are truly independent.
> 
> However, we released the fences en masse, and once the requests are
> ready they are independent any may be executed in any order by the HW,

typo here

> especially true with timeslicing that may reorder the requests on a
> whim. So instead of releasing all requests at once, increment the
> timeline step by step and check we get our results advancing. If the
> requests can not be run in fence order and fall back to submission
> order, we will time out waiting for our incremental results and trigger
> a few GPU hangs.
> 
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=110987
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>

Looks OK.

Reviewed-by: Andi Shyti <andi.shyti@intel.com>

Thanks,
Andi
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^ permalink raw reply	[flat|nested] 29+ messages in thread

* Re: [igt-dev] [PATCH i-g-t 9/9] i915/gem_ctx_engine: Drip feed requests into 'independent'
@ 2019-08-13 15:37     ` Andi Shyti
  0 siblings, 0 replies; 29+ messages in thread
From: Andi Shyti @ 2019-08-13 15:37 UTC (permalink / raw)
  To: Chris Wilson; +Cc: igt-dev, intel-gfx

Hi Chris,

On Tue, Aug 13, 2019 at 07:20:16AM +0100, Chris Wilson wrote:
> The intent of the test is to exercise that each channel in the engine[]
> is an independent context/ring/timeline. It setups 64 channels pointing
> to rcs0 and then submits one request to each in turn waiting on a
> timeline that will force them to run out of submission order. They can
> only run in fence order and not submission order if the timelines of
> each channel are truly independent.
> 
> However, we released the fences en masse, and once the requests are
> ready they are independent any may be executed in any order by the HW,

typo here

> especially true with timeslicing that may reorder the requests on a
> whim. So instead of releasing all requests at once, increment the
> timeline step by step and check we get our results advancing. If the
> requests can not be run in fence order and fall back to submission
> order, we will time out waiting for our incremental results and trigger
> a few GPU hangs.
> 
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=110987
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>

Looks OK.

Reviewed-by: Andi Shyti <andi.shyti@intel.com>

Thanks,
Andi
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^ permalink raw reply	[flat|nested] 29+ messages in thread

* Re: [igt-dev] [PATCH i-g-t 4/9] i915/gem_shrink: Make some pages dirty
  2019-08-13  6:20   ` [igt-dev] " Chris Wilson
@ 2019-08-13 15:37     ` Andi Shyti
  -1 siblings, 0 replies; 29+ messages in thread
From: Andi Shyti @ 2019-08-13 15:37 UTC (permalink / raw)
  To: Chris Wilson; +Cc: igt-dev, intel-gfx

Hi Chris,

On Tue, Aug 13, 2019 at 07:20:11AM +0100, Chris Wilson wrote:
> Trying to hit a deadlock for invalidating dirty userptr pages (via
> kcompactd).
> 
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>

Reviewed-by: Andi Shyti <andi.shyti@intel.com>

Andi
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^ permalink raw reply	[flat|nested] 29+ messages in thread

* Re: [igt-dev] [PATCH i-g-t 4/9] i915/gem_shrink: Make some pages dirty
@ 2019-08-13 15:37     ` Andi Shyti
  0 siblings, 0 replies; 29+ messages in thread
From: Andi Shyti @ 2019-08-13 15:37 UTC (permalink / raw)
  To: Chris Wilson; +Cc: igt-dev, intel-gfx

Hi Chris,

On Tue, Aug 13, 2019 at 07:20:11AM +0100, Chris Wilson wrote:
> Trying to hit a deadlock for invalidating dirty userptr pages (via
> kcompactd).
> 
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>

Reviewed-by: Andi Shyti <andi.shyti@intel.com>

Andi
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^ permalink raw reply	[flat|nested] 29+ messages in thread

* Re: [igt-dev] [PATCH i-g-t 5/9] i915/gem_userptr_blits: Apply some THP pressure
  2019-08-13  6:20   ` [igt-dev] " Chris Wilson
@ 2019-08-13 15:37     ` Andi Shyti
  -1 siblings, 0 replies; 29+ messages in thread
From: Andi Shyti @ 2019-08-13 15:37 UTC (permalink / raw)
  To: Chris Wilson; +Cc: igt-dev, intel-gfx

Hi Chris,

On Tue, Aug 13, 2019 at 07:20:12AM +0100, Chris Wilson wrote:
> Still trying to hit a deadlock with userptr from kcompatcd.
> 
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>

This looks all right, as well.

Reveiwed-by: Andi Shyti <andi.shyti@intel.com>

Andi
_______________________________________________
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^ permalink raw reply	[flat|nested] 29+ messages in thread

* Re: [Intel-gfx] [igt-dev] [PATCH i-g-t 5/9] i915/gem_userptr_blits: Apply some THP pressure
@ 2019-08-13 15:37     ` Andi Shyti
  0 siblings, 0 replies; 29+ messages in thread
From: Andi Shyti @ 2019-08-13 15:37 UTC (permalink / raw)
  To: Chris Wilson; +Cc: igt-dev, intel-gfx

Hi Chris,

On Tue, Aug 13, 2019 at 07:20:12AM +0100, Chris Wilson wrote:
> Still trying to hit a deadlock with userptr from kcompatcd.
> 
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>

This looks all right, as well.

Reveiwed-by: Andi Shyti <andi.shyti@intel.com>

Andi
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 29+ messages in thread

end of thread, other threads:[~2019-08-13 15:37 UTC | newest]

Thread overview: 29+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2019-08-13  6:20 [PATCH i-g-t 1/9] i915/gem_exec_schedule: Limit the plug to fit small rings Chris Wilson
2019-08-13  6:20 ` [igt-dev] " Chris Wilson
2019-08-13  6:20 ` [PATCH i-g-t 2/9] i915/gem_eio: Restrict number of batches of submitted Chris Wilson
2019-08-13  6:20   ` [igt-dev] " Chris Wilson
2019-08-13 14:21   ` Andi Shyti
2019-08-13 14:21     ` [igt-dev] [Intel-gfx] " Andi Shyti
2019-08-13  6:20 ` [PATCH i-g-t 3/9] i915/gem_mmap_gtt: Test mmap_offset lifetime Chris Wilson
2019-08-13  6:20   ` [igt-dev] " Chris Wilson
2019-08-13  6:20 ` [PATCH i-g-t 4/9] i915/gem_shrink: Make some pages dirty Chris Wilson
2019-08-13  6:20   ` [igt-dev] " Chris Wilson
2019-08-13 15:37   ` Andi Shyti
2019-08-13 15:37     ` Andi Shyti
2019-08-13  6:20 ` [PATCH i-g-t 5/9] i915/gem_userptr_blits: Apply some THP pressure Chris Wilson
2019-08-13  6:20   ` [igt-dev] " Chris Wilson
2019-08-13 15:37   ` Andi Shyti
2019-08-13 15:37     ` [Intel-gfx] " Andi Shyti
2019-08-13  6:20 ` [PATCH i-g-t 6/9] i915/gem_exec_schedule: Check timeslice Chris Wilson
2019-08-13  6:20   ` [Intel-gfx] " Chris Wilson
2019-08-13  6:20 ` [PATCH i-g-t 7/9] i915/perf_pmu: Flush idle work before waiting for suspend Chris Wilson
2019-08-13  6:20   ` [igt-dev] " Chris Wilson
2019-08-13  6:20 ` [PATCH i-g-t 8/9] Force spin-batch to cause a hang as required Chris Wilson
2019-08-13  6:20   ` [igt-dev] " Chris Wilson
2019-08-13  6:20 ` [PATCH i-g-t 9/9] i915/gem_ctx_engine: Drip feed requests into 'independent' Chris Wilson
2019-08-13  6:20   ` [igt-dev] " Chris Wilson
2019-08-13 15:37   ` Andi Shyti
2019-08-13 15:37     ` Andi Shyti
2019-08-13  7:22 ` [igt-dev] ✗ Fi.CI.BAT: failure for series starting with [i-g-t,1/9] i915/gem_exec_schedule: Limit the plug to fit small rings Patchwork
2019-08-13 14:20 ` [igt-dev] [PATCH i-g-t 1/9] " Andi Shyti
2019-08-13 14:20   ` Andi Shyti

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