[PATCH v6 0/3] drm/i915: Enable HDCP 1.4 and 2.2 on Gen12+

[PATCH v6 0/3] drm/i915: Enable HDCP 1.4 and 2.2 on Gen12+

[Ramalingam C]

Enabling the HDCP1.4 and 2.2 on TGL by supporting the HW block movement
from DDI into transcoder.

v6:
  Extending the I915-MEI HDCP interface to include the transcoder.
  For register programming, transcoder is used instead of PIPE. Just
	readability improvement
  pipe and transcoder definition is moved into i915_drm.h
  Rebased.

Ramalingam C (3):
  drm/i915: enum transcoder and pipe are moved into i915_drm.h
  misc/mei_hdcp: Adding the transcoder detail in payload input
  drm/i915: Enable HDCP 1.4 and 2.2 on Gen12+

 drivers/gpu/drm/i915/display/intel_display.h |  44 ------
 drivers/gpu/drm/i915/display/intel_dp.c      |   3 +
 drivers/gpu/drm/i915/display/intel_hdcp.c    | 158 +++++++++++++------
 drivers/gpu/drm/i915/display/intel_hdcp.h    |   2 +
 drivers/gpu/drm/i915/display/intel_hdmi.c    |  12 +-
 drivers/gpu/drm/i915/i915_reg.h              | 124 +++++++++++++--
 drivers/misc/mei/hdcp/mei_hdcp.c             |  27 ++++
 drivers/misc/mei/hdcp/mei_hdcp.h             |  15 +-
 include/drm/i915_drm.h                       |  46 ++++++
 include/drm/i915_mei_hdcp_interface.h        |   2 +
 10 files changed, 324 insertions(+), 109 deletions(-)

-- 
2.20.1

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

[PATCH v6 1/3] drm/i915: enum transcoder and pipe are moved into i915_drm.h

[Ramalingam C]

For the reusability of the enum transcoder and enum pipe in other driver
modules (like mei_hdcp), enum port definition is moved from I915 local
header intel_display.h to drm/i915_drm.h

Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
---
 drivers/gpu/drm/i915/display/intel_display.h | 44 -------------------
 include/drm/i915_drm.h                       | 46 ++++++++++++++++++++
 2 files changed, 46 insertions(+), 44 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display.h b/drivers/gpu/drm/i915/display/intel_display.h
index e57e6969051d..56f3d9073159 100644
--- a/drivers/gpu/drm/i915/display/intel_display.h
+++ b/drivers/gpu/drm/i915/display/intel_display.h
@@ -71,50 +71,6 @@ enum i915_gpio {
 	GPIOO,
 };
 
-/*
- * Keep the pipe enum values fixed: the code assumes that PIPE_A=0, the
- * rest have consecutive values and match the enum values of transcoders
- * with a 1:1 transcoder -> pipe mapping.
- */
-enum pipe {
-	INVALID_PIPE = -1,
-
-	PIPE_A = 0,
-	PIPE_B,
-	PIPE_C,
-	PIPE_D,
-	_PIPE_EDP,
-
-	I915_MAX_PIPES = _PIPE_EDP
-};
-
-#define pipe_name(p) ((p) + 'A')
-
-enum transcoder {
-	/*
-	 * The following transcoders have a 1:1 transcoder -> pipe mapping,
-	 * keep their values fixed: the code assumes that TRANSCODER_A=0, the
-	 * rest have consecutive values and match the enum values of the pipes
-	 * they map to.
-	 */
-	TRANSCODER_A = PIPE_A,
-	TRANSCODER_B = PIPE_B,
-	TRANSCODER_C = PIPE_C,
-	TRANSCODER_D = PIPE_D,
-
-	/*
-	 * The following transcoders can map to any pipe, their enum value
-	 * doesn't need to stay fixed.
-	 */
-	TRANSCODER_EDP,
-	TRANSCODER_DSI_0,
-	TRANSCODER_DSI_1,
-	TRANSCODER_DSI_A = TRANSCODER_DSI_0,	/* legacy DSI */
-	TRANSCODER_DSI_C = TRANSCODER_DSI_1,	/* legacy DSI */
-
-	I915_MAX_TRANSCODERS
-};
-
 static inline const char *transcoder_name(enum transcoder transcoder)
 {
 	switch (transcoder) {
diff --git a/include/drm/i915_drm.h b/include/drm/i915_drm.h
index 23274cf92712..b0779b8267b9 100644
--- a/include/drm/i915_drm.h
+++ b/include/drm/i915_drm.h
@@ -118,4 +118,50 @@ enum port {
 
 #define port_name(p) ((p) + 'A')
 
+/*
+ * Keep the pipe enum values fixed: the code assumes that PIPE_A=0, the
+ * rest have consecutive values and match the enum values of transcoders
+ * with a 1:1 transcoder -> pipe mapping.
+ */
+enum pipe {
+	INVALID_PIPE = -1,
+
+	PIPE_A = 0,
+	PIPE_B,
+	PIPE_C,
+	PIPE_D,
+	_PIPE_EDP,
+
+	I915_MAX_PIPES = _PIPE_EDP
+};
+
+#define pipe_name(p) ((p) + 'A')
+
+enum transcoder {
+	INVALID_TRANSCODER = -1,
+
+	/*
+	 * The following transcoders have a 1:1 transcoder -> pipe mapping,
+	 * keep their values fixed: the code assumes that TRANSCODER_A=0, the
+	 * rest have consecutive values and match the enum values of the pipes
+	 * they map to.
+	 */
+	TRANSCODER_A = PIPE_A,
+	TRANSCODER_B = PIPE_B,
+	TRANSCODER_C = PIPE_C,
+	TRANSCODER_D = PIPE_D,
+
+	/*
+	 * The following transcoders can map to any pipe, their enum value
+	 * doesn't need to stay fixed.
+	 */
+	TRANSCODER_EDP,
+	TRANSCODER_DSI_0,
+	TRANSCODER_DSI_1,
+	TRANSCODER_DSI_A = TRANSCODER_DSI_0,	/* legacy DSI */
+	TRANSCODER_DSI_C = TRANSCODER_DSI_1,	/* legacy DSI */
+
+	I915_MAX_TRANSCODERS
+};
+
 #endif				/* _I915_DRM_H_ */
-- 
2.20.1

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

RE: [PATCH v6 1/3] drm/i915: enum transcoder and pipe are moved into i915_drm.h

[Winkler, Tomas]

> 
> For the reusability of the enum transcoder and enum pipe in other driver
> modules (like mei_hdcp), enum port definition is moved from I915 local header
> intel_display.h to drm/i915_drm.h

Don't you need to name space those definitions in the global space, I guess there are a lot of 'pipe' variables and definitions you can conflict with. 
I guess it should be enum i915_pipe, etc. 

Thanks
Tomas


> 
> Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_display.h | 44 -------------------
>  include/drm/i915_drm.h                       | 46 ++++++++++++++++++++
>  2 files changed, 46 insertions(+), 44 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_display.h
> b/drivers/gpu/drm/i915/display/intel_display.h
> index e57e6969051d..56f3d9073159 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.h
> +++ b/drivers/gpu/drm/i915/display/intel_display.h
> @@ -71,50 +71,6 @@ enum i915_gpio {
>  	GPIOO,
>  };
> 
> -/*
> - * Keep the pipe enum values fixed: the code assumes that PIPE_A=0, the
> - * rest have consecutive values and match the enum values of transcoders
> - * with a 1:1 transcoder -> pipe mapping.
> - */
> -enum pipe {
> -	INVALID_PIPE = -1,
> -
> -	PIPE_A = 0,
> -	PIPE_B,
> -	PIPE_C,
> -	PIPE_D,
> -	_PIPE_EDP,
> -
> -	I915_MAX_PIPES = _PIPE_EDP
> -};
> -
> -#define pipe_name(p) ((p) + 'A')
> -
> -enum transcoder {
> -	/*
> -	 * The following transcoders have a 1:1 transcoder -> pipe mapping,
> -	 * keep their values fixed: the code assumes that TRANSCODER_A=0,
> the
> -	 * rest have consecutive values and match the enum values of the pipes
> -	 * they map to.
> -	 */
> -	TRANSCODER_A = PIPE_A,
> -	TRANSCODER_B = PIPE_B,
> -	TRANSCODER_C = PIPE_C,
> -	TRANSCODER_D = PIPE_D,
> -
> -	/*
> -	 * The following transcoders can map to any pipe, their enum value
> -	 * doesn't need to stay fixed.
> -	 */
> -	TRANSCODER_EDP,
> -	TRANSCODER_DSI_0,
> -	TRANSCODER_DSI_1,
> -	TRANSCODER_DSI_A = TRANSCODER_DSI_0,	/* legacy DSI */
> -	TRANSCODER_DSI_C = TRANSCODER_DSI_1,	/* legacy DSI */
> -
> -	I915_MAX_TRANSCODERS
> -};
> -
>  static inline const char *transcoder_name(enum transcoder transcoder)  {
>  	switch (transcoder) {
> diff --git a/include/drm/i915_drm.h b/include/drm/i915_drm.h index
> 23274cf92712..b0779b8267b9 100644
> --- a/include/drm/i915_drm.h
> +++ b/include/drm/i915_drm.h
> @@ -118,4 +118,50 @@ enum port {
> 
>  #define port_name(p) ((p) + 'A')
> 
> +/*
> + * Keep the pipe enum values fixed: the code assumes that PIPE_A=0, the
> + * rest have consecutive values and match the enum values of
> +transcoders
> + * with a 1:1 transcoder -> pipe mapping.
> + */
> +enum pipe {
> +	INVALID_PIPE = -1,
> +
> +	PIPE_A = 0,
> +	PIPE_B,
> +	PIPE_C,
> +	PIPE_D,
> +	_PIPE_EDP,
> +
> +	I915_MAX_PIPES = _PIPE_EDP
> +};
> +
> +#define pipe_name(p) ((p) + 'A')
> +
> +enum transcoder {
> +	INVALID_TRANSCODER = -1,
> +
> +	/*
> +	 * The following transcoders have a 1:1 transcoder -> pipe mapping,
> +	 * keep their values fixed: the code assumes that TRANSCODER_A=0,
> the
> +	 * rest have consecutive values and match the enum values of the pipes
> +	 * they map to.
> +	 */
> +	TRANSCODER_A = PIPE_A,
> +	TRANSCODER_B = PIPE_B,
> +	TRANSCODER_C = PIPE_C,
> +	TRANSCODER_D = PIPE_D,
> +
> +	/*
> +	 * The following transcoders can map to any pipe, their enum value
> +	 * doesn't need to stay fixed.
> +	 */
> +	TRANSCODER_EDP,
> +	TRANSCODER_DSI_0,
> +	TRANSCODER_DSI_1,
> +	TRANSCODER_DSI_A = TRANSCODER_DSI_0,	/* legacy DSI */
> +	TRANSCODER_DSI_C = TRANSCODER_DSI_1,	/* legacy DSI */
> +
> +	I915_MAX_TRANSCODERS
> +};
> +
>  #endif				/* _I915_DRM_H_ */
> --
> 2.20.1

_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel

Re: [PATCH v6 1/3] drm/i915: enum transcoder and pipe are moved into i915_drm.h

[Ramalingam C]

On 2019-08-20 at 14:14:03 +0530, Winkler, Tomas wrote:
> 
> 
> > 
> > For the reusability of the enum transcoder and enum pipe in other driver
> > modules (like mei_hdcp), enum port definition is moved from I915 local header
> > intel_display.h to drm/i915_drm.h
> 
> Don't you need to name space those definitions in the global space, I guess there are a lot of 'pipe' variables and definitions you can conflict with. 
> I guess it should be enum i915_pipe, etc. 
I am assuming that this header will be used only when you we build for
I915 driver(intel). In such case, we wont have a conflict.

Unless until this renaming is needed, we shouldn't get into it, as this
will demand i915 wide renaming.

-Ram
> 
> Thanks
> Tomas
> 
> 
> > 
> > Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
> > ---
> >  drivers/gpu/drm/i915/display/intel_display.h | 44 -------------------
> >  include/drm/i915_drm.h                       | 46 ++++++++++++++++++++
> >  2 files changed, 46 insertions(+), 44 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/display/intel_display.h
> > b/drivers/gpu/drm/i915/display/intel_display.h
> > index e57e6969051d..56f3d9073159 100644
> > --- a/drivers/gpu/drm/i915/display/intel_display.h
> > +++ b/drivers/gpu/drm/i915/display/intel_display.h
> > @@ -71,50 +71,6 @@ enum i915_gpio {
> >  	GPIOO,
> >  };
> > 
> > -/*
> > - * Keep the pipe enum values fixed: the code assumes that PIPE_A=0, the
> > - * rest have consecutive values and match the enum values of transcoders
> > - * with a 1:1 transcoder -> pipe mapping.
> > - */
> > -enum pipe {
> > -	INVALID_PIPE = -1,
> > -
> > -	PIPE_A = 0,
> > -	PIPE_B,
> > -	PIPE_C,
> > -	PIPE_D,
> > -	_PIPE_EDP,
> > -
> > -	I915_MAX_PIPES = _PIPE_EDP
> > -};
> > -
> > -#define pipe_name(p) ((p) + 'A')
> > -
> > -enum transcoder {
> > -	/*
> > -	 * The following transcoders have a 1:1 transcoder -> pipe mapping,
> > -	 * keep their values fixed: the code assumes that TRANSCODER_A=0,
> > the
> > -	 * rest have consecutive values and match the enum values of the pipes
> > -	 * they map to.
> > -	 */
> > -	TRANSCODER_A = PIPE_A,
> > -	TRANSCODER_B = PIPE_B,
> > -	TRANSCODER_C = PIPE_C,
> > -	TRANSCODER_D = PIPE_D,
> > -
> > -	/*
> > -	 * The following transcoders can map to any pipe, their enum value
> > -	 * doesn't need to stay fixed.
> > -	 */
> > -	TRANSCODER_EDP,
> > -	TRANSCODER_DSI_0,
> > -	TRANSCODER_DSI_1,
> > -	TRANSCODER_DSI_A = TRANSCODER_DSI_0,	/* legacy DSI */
> > -	TRANSCODER_DSI_C = TRANSCODER_DSI_1,	/* legacy DSI */
> > -
> > -	I915_MAX_TRANSCODERS
> > -};
> > -
> >  static inline const char *transcoder_name(enum transcoder transcoder)  {
> >  	switch (transcoder) {
> > diff --git a/include/drm/i915_drm.h b/include/drm/i915_drm.h index
> > 23274cf92712..b0779b8267b9 100644
> > --- a/include/drm/i915_drm.h
> > +++ b/include/drm/i915_drm.h
> > @@ -118,4 +118,50 @@ enum port {
> > 
> >  #define port_name(p) ((p) + 'A')
> > 
> > +/*
> > + * Keep the pipe enum values fixed: the code assumes that PIPE_A=0, the
> > + * rest have consecutive values and match the enum values of
> > +transcoders
> > + * with a 1:1 transcoder -> pipe mapping.
> > + */
> > +enum pipe {
> > +	INVALID_PIPE = -1,
> > +
> > +	PIPE_A = 0,
> > +	PIPE_B,
> > +	PIPE_C,
> > +	PIPE_D,
> > +	_PIPE_EDP,
> > +
> > +	I915_MAX_PIPES = _PIPE_EDP
> > +};
> > +
> > +#define pipe_name(p) ((p) + 'A')
> > +
> > +enum transcoder {
> > +	INVALID_TRANSCODER = -1,
> > +
> > +	/*
> > +	 * The following transcoders have a 1:1 transcoder -> pipe mapping,
> > +	 * keep their values fixed: the code assumes that TRANSCODER_A=0,
> > the
> > +	 * rest have consecutive values and match the enum values of the pipes
> > +	 * they map to.
> > +	 */
> > +	TRANSCODER_A = PIPE_A,
> > +	TRANSCODER_B = PIPE_B,
> > +	TRANSCODER_C = PIPE_C,
> > +	TRANSCODER_D = PIPE_D,
> > +
> > +	/*
> > +	 * The following transcoders can map to any pipe, their enum value
> > +	 * doesn't need to stay fixed.
> > +	 */
> > +	TRANSCODER_EDP,
> > +	TRANSCODER_DSI_0,
> > +	TRANSCODER_DSI_1,
> > +	TRANSCODER_DSI_A = TRANSCODER_DSI_0,	/* legacy DSI */
> > +	TRANSCODER_DSI_C = TRANSCODER_DSI_1,	/* legacy DSI */
> > +
> > +	I915_MAX_TRANSCODERS
> > +};
> > +
> >  #endif				/* _I915_DRM_H_ */
> > --
> > 2.20.1
> 
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

Re: [PATCH v6 1/3] drm/i915: enum transcoder and pipe are moved into i915_drm.h

[Jani Nikula]

On Tue, 20 Aug 2019, Ramalingam C <ramalingam.c@intel.com> wrote:
> On 2019-08-20 at 14:14:03 +0530, Winkler, Tomas wrote:
>> 
>> 
>> > 
>> > For the reusability of the enum transcoder and enum pipe in other driver
>> > modules (like mei_hdcp), enum port definition is moved from I915 local header
>> > intel_display.h to drm/i915_drm.h
>> 
>> Don't you need to name space those definitions in the global space, I guess there are a lot of 'pipe' variables and definitions you can conflict with. 
>> I guess it should be enum i915_pipe, etc. 
> I am assuming that this header will be used only when you we build for
> I915 driver(intel). In such case, we wont have a conflict.
>
> Unless until this renaming is needed, we shouldn't get into it, as this
> will demand i915 wide renaming.

I think we need to keep enum transcoder and enum pipe internal to i915,
as well as pull enum port from i915_drm.h back to i915 internal as
well. I don't think they should be exposed outside of i915.

I think it would be better to expose the existing enum mei_fw_ddi and
the new enum mei_fw_tc from MEI to i915 instead, and have i915 fill in
the relevant physical_port (ddi index) and attached_transcoder (tc
type). I don't know what these members should be called in struct
hdcp_port_data, but the point is that i915 would do the translation, not
mei_hdcp.c. The types of these members should obviously be enum
meo_fw_ddi and enum mei_fw_tc.

Thoughts?

BR,
Jani.


>
> -Ram
>> 
>> Thanks
>> Tomas
>> 
>> 
>> > 
>> > Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
>> > ---
>> >  drivers/gpu/drm/i915/display/intel_display.h | 44 -------------------
>> >  include/drm/i915_drm.h                       | 46 ++++++++++++++++++++
>> >  2 files changed, 46 insertions(+), 44 deletions(-)
>> > 
>> > diff --git a/drivers/gpu/drm/i915/display/intel_display.h
>> > b/drivers/gpu/drm/i915/display/intel_display.h
>> > index e57e6969051d..56f3d9073159 100644
>> > --- a/drivers/gpu/drm/i915/display/intel_display.h
>> > +++ b/drivers/gpu/drm/i915/display/intel_display.h
>> > @@ -71,50 +71,6 @@ enum i915_gpio {
>> >  	GPIOO,
>> >  };
>> > 
>> > -/*
>> > - * Keep the pipe enum values fixed: the code assumes that PIPE_A=0, the
>> > - * rest have consecutive values and match the enum values of transcoders
>> > - * with a 1:1 transcoder -> pipe mapping.
>> > - */
>> > -enum pipe {
>> > -	INVALID_PIPE = -1,
>> > -
>> > -	PIPE_A = 0,
>> > -	PIPE_B,
>> > -	PIPE_C,
>> > -	PIPE_D,
>> > -	_PIPE_EDP,
>> > -
>> > -	I915_MAX_PIPES = _PIPE_EDP
>> > -};
>> > -
>> > -#define pipe_name(p) ((p) + 'A')
>> > -
>> > -enum transcoder {
>> > -	/*
>> > -	 * The following transcoders have a 1:1 transcoder -> pipe mapping,
>> > -	 * keep their values fixed: the code assumes that TRANSCODER_A=0,
>> > the
>> > -	 * rest have consecutive values and match the enum values of the pipes
>> > -	 * they map to.
>> > -	 */
>> > -	TRANSCODER_A = PIPE_A,
>> > -	TRANSCODER_B = PIPE_B,
>> > -	TRANSCODER_C = PIPE_C,
>> > -	TRANSCODER_D = PIPE_D,
>> > -
>> > -	/*
>> > -	 * The following transcoders can map to any pipe, their enum value
>> > -	 * doesn't need to stay fixed.
>> > -	 */
>> > -	TRANSCODER_EDP,
>> > -	TRANSCODER_DSI_0,
>> > -	TRANSCODER_DSI_1,
>> > -	TRANSCODER_DSI_A = TRANSCODER_DSI_0,	/* legacy DSI */
>> > -	TRANSCODER_DSI_C = TRANSCODER_DSI_1,	/* legacy DSI */
>> > -
>> > -	I915_MAX_TRANSCODERS
>> > -};
>> > -
>> >  static inline const char *transcoder_name(enum transcoder transcoder)  {
>> >  	switch (transcoder) {
>> > diff --git a/include/drm/i915_drm.h b/include/drm/i915_drm.h index
>> > 23274cf92712..b0779b8267b9 100644
>> > --- a/include/drm/i915_drm.h
>> > +++ b/include/drm/i915_drm.h
>> > @@ -118,4 +118,50 @@ enum port {
>> > 
>> >  #define port_name(p) ((p) + 'A')
>> > 
>> > +/*
>> > + * Keep the pipe enum values fixed: the code assumes that PIPE_A=0, the
>> > + * rest have consecutive values and match the enum values of
>> > +transcoders
>> > + * with a 1:1 transcoder -> pipe mapping.
>> > + */
>> > +enum pipe {
>> > +	INVALID_PIPE = -1,
>> > +
>> > +	PIPE_A = 0,
>> > +	PIPE_B,
>> > +	PIPE_C,
>> > +	PIPE_D,
>> > +	_PIPE_EDP,
>> > +
>> > +	I915_MAX_PIPES = _PIPE_EDP
>> > +};
>> > +
>> > +#define pipe_name(p) ((p) + 'A')
>> > +
>> > +enum transcoder {
>> > +	INVALID_TRANSCODER = -1,
>> > +
>> > +	/*
>> > +	 * The following transcoders have a 1:1 transcoder -> pipe mapping,
>> > +	 * keep their values fixed: the code assumes that TRANSCODER_A=0,
>> > the
>> > +	 * rest have consecutive values and match the enum values of the pipes
>> > +	 * they map to.
>> > +	 */
>> > +	TRANSCODER_A = PIPE_A,
>> > +	TRANSCODER_B = PIPE_B,
>> > +	TRANSCODER_C = PIPE_C,
>> > +	TRANSCODER_D = PIPE_D,
>> > +
>> > +	/*
>> > +	 * The following transcoders can map to any pipe, their enum value
>> > +	 * doesn't need to stay fixed.
>> > +	 */
>> > +	TRANSCODER_EDP,
>> > +	TRANSCODER_DSI_0,
>> > +	TRANSCODER_DSI_1,
>> > +	TRANSCODER_DSI_A = TRANSCODER_DSI_0,	/* legacy DSI */
>> > +	TRANSCODER_DSI_C = TRANSCODER_DSI_1,	/* legacy DSI */
>> > +
>> > +	I915_MAX_TRANSCODERS
>> > +};
>> > +
>> >  #endif				/* _I915_DRM_H_ */
>> > --
>> > 2.20.1
>> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
Jani Nikula, Intel Open Source Graphics Center
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

Re: [PATCH v6 1/3] drm/i915: enum transcoder and pipe are moved into i915_drm.h

[Ramalingam C]

On 2019-08-20 at 15:30:53 +0300, Jani Nikula wrote:
> On Tue, 20 Aug 2019, Ramalingam C <ramalingam.c@intel.com> wrote:
> > On 2019-08-20 at 14:14:03 +0530, Winkler, Tomas wrote:
> >> 
> >> 
> >> > 
> >> > For the reusability of the enum transcoder and enum pipe in other driver
> >> > modules (like mei_hdcp), enum port definition is moved from I915 local header
> >> > intel_display.h to drm/i915_drm.h
> >> 
> >> Don't you need to name space those definitions in the global space, I guess there are a lot of 'pipe' variables and definitions you can conflict with. 
> >> I guess it should be enum i915_pipe, etc. 
> > I am assuming that this header will be used only when you we build for
> > I915 driver(intel). In such case, we wont have a conflict.
> >
> > Unless until this renaming is needed, we shouldn't get into it, as this
> > will demand i915 wide renaming.
> 
> I think we need to keep enum transcoder and enum pipe internal to i915,
> as well as pull enum port from i915_drm.h back to i915 internal as
> well. I don't think they should be exposed outside of i915.
> 
> I think it would be better to expose the existing enum mei_fw_ddi and
> the new enum mei_fw_tc from MEI to i915 instead, and have i915 fill in
> the relevant physical_port (ddi index) and attached_transcoder (tc
> type). I don't know what these members should be called in struct
> hdcp_port_data, but the point is that i915 would do the translation, not
> mei_hdcp.c. The types of these members should obviously be enum
> meo_fw_ddi and enum mei_fw_tc.

Jani,

Yes, If we could move the enum mei_fw_ddi and enum mei_fw_tc into
include/drm/i915_mei_hdcp_interface.h along with struct
hdcp_port_data, then we could keep the pipe, port and transcoder as
local to I915. I915 could implement the conversion from transcoder to
mei_fw_tc etc and setup hdcp_port_data.

Tomas, Do you agree with this?

-Ram

> 
> Thoughts?
> 
> BR,
> Jani.
> 
> 
> >
> > -Ram
> >> 
> >> Thanks
> >> Tomas
> >> 
> >> 
> >> > 
> >> > Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
> >> > ---
> >> >  drivers/gpu/drm/i915/display/intel_display.h | 44 -------------------
> >> >  include/drm/i915_drm.h                       | 46 ++++++++++++++++++++
> >> >  2 files changed, 46 insertions(+), 44 deletions(-)
> >> > 
> >> > diff --git a/drivers/gpu/drm/i915/display/intel_display.h
> >> > b/drivers/gpu/drm/i915/display/intel_display.h
> >> > index e57e6969051d..56f3d9073159 100644
> >> > --- a/drivers/gpu/drm/i915/display/intel_display.h
> >> > +++ b/drivers/gpu/drm/i915/display/intel_display.h
> >> > @@ -71,50 +71,6 @@ enum i915_gpio {
> >> >  	GPIOO,
> >> >  };
> >> > 
> >> > -/*
> >> > - * Keep the pipe enum values fixed: the code assumes that PIPE_A=0, the
> >> > - * rest have consecutive values and match the enum values of transcoders
> >> > - * with a 1:1 transcoder -> pipe mapping.
> >> > - */
> >> > -enum pipe {
> >> > -	INVALID_PIPE = -1,
> >> > -
> >> > -	PIPE_A = 0,
> >> > -	PIPE_B,
> >> > -	PIPE_C,
> >> > -	PIPE_D,
> >> > -	_PIPE_EDP,
> >> > -
> >> > -	I915_MAX_PIPES = _PIPE_EDP
> >> > -};
> >> > -
> >> > -#define pipe_name(p) ((p) + 'A')
> >> > -
> >> > -enum transcoder {
> >> > -	/*
> >> > -	 * The following transcoders have a 1:1 transcoder -> pipe mapping,
> >> > -	 * keep their values fixed: the code assumes that TRANSCODER_A=0,
> >> > the
> >> > -	 * rest have consecutive values and match the enum values of the pipes
> >> > -	 * they map to.
> >> > -	 */
> >> > -	TRANSCODER_A = PIPE_A,
> >> > -	TRANSCODER_B = PIPE_B,
> >> > -	TRANSCODER_C = PIPE_C,
> >> > -	TRANSCODER_D = PIPE_D,
> >> > -
> >> > -	/*
> >> > -	 * The following transcoders can map to any pipe, their enum value
> >> > -	 * doesn't need to stay fixed.
> >> > -	 */
> >> > -	TRANSCODER_EDP,
> >> > -	TRANSCODER_DSI_0,
> >> > -	TRANSCODER_DSI_1,
> >> > -	TRANSCODER_DSI_A = TRANSCODER_DSI_0,	/* legacy DSI */
> >> > -	TRANSCODER_DSI_C = TRANSCODER_DSI_1,	/* legacy DSI */
> >> > -
> >> > -	I915_MAX_TRANSCODERS
> >> > -};
> >> > -
> >> >  static inline const char *transcoder_name(enum transcoder transcoder)  {
> >> >  	switch (transcoder) {
> >> > diff --git a/include/drm/i915_drm.h b/include/drm/i915_drm.h index
> >> > 23274cf92712..b0779b8267b9 100644
> >> > --- a/include/drm/i915_drm.h
> >> > +++ b/include/drm/i915_drm.h
> >> > @@ -118,4 +118,50 @@ enum port {
> >> > 
> >> >  #define port_name(p) ((p) + 'A')
> >> > 
> >> > +/*
> >> > + * Keep the pipe enum values fixed: the code assumes that PIPE_A=0, the
> >> > + * rest have consecutive values and match the enum values of
> >> > +transcoders
> >> > + * with a 1:1 transcoder -> pipe mapping.
> >> > + */
> >> > +enum pipe {
> >> > +	INVALID_PIPE = -1,
> >> > +
> >> > +	PIPE_A = 0,
> >> > +	PIPE_B,
> >> > +	PIPE_C,
> >> > +	PIPE_D,
> >> > +	_PIPE_EDP,
> >> > +
> >> > +	I915_MAX_PIPES = _PIPE_EDP
> >> > +};
> >> > +
> >> > +#define pipe_name(p) ((p) + 'A')
> >> > +
> >> > +enum transcoder {
> >> > +	INVALID_TRANSCODER = -1,
> >> > +
> >> > +	/*
> >> > +	 * The following transcoders have a 1:1 transcoder -> pipe mapping,
> >> > +	 * keep their values fixed: the code assumes that TRANSCODER_A=0,
> >> > the
> >> > +	 * rest have consecutive values and match the enum values of the pipes
> >> > +	 * they map to.
> >> > +	 */
> >> > +	TRANSCODER_A = PIPE_A,
> >> > +	TRANSCODER_B = PIPE_B,
> >> > +	TRANSCODER_C = PIPE_C,
> >> > +	TRANSCODER_D = PIPE_D,
> >> > +
> >> > +	/*
> >> > +	 * The following transcoders can map to any pipe, their enum value
> >> > +	 * doesn't need to stay fixed.
> >> > +	 */
> >> > +	TRANSCODER_EDP,
> >> > +	TRANSCODER_DSI_0,
> >> > +	TRANSCODER_DSI_1,
> >> > +	TRANSCODER_DSI_A = TRANSCODER_DSI_0,	/* legacy DSI */
> >> > +	TRANSCODER_DSI_C = TRANSCODER_DSI_1,	/* legacy DSI */
> >> > +
> >> > +	I915_MAX_TRANSCODERS
> >> > +};
> >> > +
> >> >  #endif				/* _I915_DRM_H_ */
> >> > --
> >> > 2.20.1
> >> 
> > _______________________________________________
> > Intel-gfx mailing list
> > Intel-gfx@lists.freedesktop.org
> > https://lists.freedesktop.org/mailman/listinfo/intel-gfx
> 
> -- 
> Jani Nikula, Intel Open Source Graphics Center
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

[PATCH v6 2/3] misc/mei_hdcp: Adding the transcoder detail in payload input

[Ramalingam C]

ME FW takes the transcoder details for Gen12+ platforms, as HDCP HW
block is moved to transcoders.

hdcp_port_data is extended with enum transcoder. Payload structure is
modified and populated from the hdcp_port_data.

Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
---
 drivers/misc/mei/hdcp/mei_hdcp.c      | 27 +++++++++++++++++++++++++++
 drivers/misc/mei/hdcp/mei_hdcp.h      | 15 ++++++++++++++-
 include/drm/i915_mei_hdcp_interface.h |  2 ++
 3 files changed, 43 insertions(+), 1 deletion(-)

diff --git a/drivers/misc/mei/hdcp/mei_hdcp.c b/drivers/misc/mei/hdcp/mei_hdcp.c
index c681f6fab342..7efe3b65a986 100644
--- a/drivers/misc/mei/hdcp/mei_hdcp.c
+++ b/drivers/misc/mei/hdcp/mei_hdcp.c
@@ -39,6 +39,22 @@ static inline u8 mei_get_ddi_index(enum port port)
 	}
 }
 
+static inline u8 mei_get_tc_type(enum transcoder tc)
+{
+	switch (tc) {
+	case TRANSCODER_A ... TRANSCODER_D:
+		return (u8)(tc | 0x10);
+	case TRANSCODER_EDP:
+		return TC_EDP;
+	case TRANSCODER_DSI_0:
+		return TC_DSI0;
+	case TRANSCODER_DSI_1:
+		return TC_DSI1;
+	default:
+		return MEI_INVALID_TRANSCODER;
+	}
+}
+
 /**
  * mei_hdcp_initiate_session() - Initiate a Wired HDCP2.2 Tx Session in ME FW
  * @dev: device corresponding to the mei_cl_device
@@ -70,6 +86,7 @@ mei_hdcp_initiate_session(struct device *dev, struct hdcp_port_data *data,
 
 	session_init_in.port.integrated_port_type = data->port_type;
 	session_init_in.port.physical_port = mei_get_ddi_index(data->port);
+	session_init_in.port.attached_transcoder = mei_get_tc_type(data->tc);
 	session_init_in.protocol = data->protocol;
 
 	byte = mei_cldev_send(cldev, (u8 *)&session_init_in,
@@ -139,6 +156,7 @@ mei_hdcp_verify_receiver_cert_prepare_km(struct device *dev,
 
 	verify_rxcert_in.port.integrated_port_type = data->port_type;
 	verify_rxcert_in.port.physical_port = mei_get_ddi_index(data->port);
+	verify_rxcert_in.port.attached_transcoder = mei_get_tc_type(data->tc);
 
 	verify_rxcert_in.cert_rx = rx_cert->cert_rx;
 	memcpy(verify_rxcert_in.r_rx, &rx_cert->r_rx, HDCP_2_2_RRX_LEN);
@@ -209,6 +227,7 @@ mei_hdcp_verify_hprime(struct device *dev, struct hdcp_port_data *data,
 
 	send_hprime_in.port.integrated_port_type = data->port_type;
 	send_hprime_in.port.physical_port = mei_get_ddi_index(data->port);
+	send_hprime_in.port.attached_transcoder = mei_get_tc_type(data->tc);
 
 	memcpy(send_hprime_in.h_prime, rx_hprime->h_prime,
 	       HDCP_2_2_H_PRIME_LEN);
@@ -266,6 +285,7 @@ mei_hdcp_store_pairing_info(struct device *dev, struct hdcp_port_data *data,
 
 	pairing_info_in.port.integrated_port_type = data->port_type;
 	pairing_info_in.port.physical_port = mei_get_ddi_index(data->port);
+	pairing_info_in.port.attached_transcoder = mei_get_tc_type(data->tc);
 
 	memcpy(pairing_info_in.e_kh_km, pairing_info->e_kh_km,
 	       HDCP_2_2_E_KH_KM_LEN);
@@ -324,6 +344,7 @@ mei_hdcp_initiate_locality_check(struct device *dev,
 
 	lc_init_in.port.integrated_port_type = data->port_type;
 	lc_init_in.port.physical_port = mei_get_ddi_index(data->port);
+	lc_init_in.port.attached_transcoder = mei_get_tc_type(data->tc);
 
 	byte = mei_cldev_send(cldev, (u8 *)&lc_init_in, sizeof(lc_init_in));
 	if (byte < 0) {
@@ -379,6 +400,7 @@ mei_hdcp_verify_lprime(struct device *dev, struct hdcp_port_data *data,
 
 	verify_lprime_in.port.integrated_port_type = data->port_type;
 	verify_lprime_in.port.physical_port = mei_get_ddi_index(data->port);
+	verify_lprime_in.port.attached_transcoder = mei_get_tc_type(data->tc);
 
 	memcpy(verify_lprime_in.l_prime, rx_lprime->l_prime,
 	       HDCP_2_2_L_PRIME_LEN);
@@ -436,6 +458,7 @@ static int mei_hdcp_get_session_key(struct device *dev,
 
 	get_skey_in.port.integrated_port_type = data->port_type;
 	get_skey_in.port.physical_port = mei_get_ddi_index(data->port);
+	get_skey_in.port.attached_transcoder = mei_get_tc_type(data->tc);
 
 	byte = mei_cldev_send(cldev, (u8 *)&get_skey_in, sizeof(get_skey_in));
 	if (byte < 0) {
@@ -500,6 +523,7 @@ mei_hdcp_repeater_check_flow_prepare_ack(struct device *dev,
 
 	verify_repeater_in.port.integrated_port_type = data->port_type;
 	verify_repeater_in.port.physical_port = mei_get_ddi_index(data->port);
+	verify_repeater_in.port.attached_transcoder = mei_get_tc_type(data->tc);
 
 	memcpy(verify_repeater_in.rx_info, rep_topology->rx_info,
 	       HDCP_2_2_RXINFO_LEN);
@@ -570,6 +594,7 @@ static int mei_hdcp_verify_mprime(struct device *dev,
 
 	verify_mprime_in.port.integrated_port_type = data->port_type;
 	verify_mprime_in.port.physical_port = mei_get_ddi_index(data->port);
+	verify_mprime_in.port.attached_transcoder = mei_get_tc_type(data->tc);
 
 	memcpy(verify_mprime_in.m_prime, stream_ready->m_prime,
 	       HDCP_2_2_MPRIME_LEN);
@@ -631,6 +656,7 @@ static int mei_hdcp_enable_authentication(struct device *dev,
 
 	enable_auth_in.port.integrated_port_type = data->port_type;
 	enable_auth_in.port.physical_port = mei_get_ddi_index(data->port);
+	enable_auth_in.port.attached_transcoder = mei_get_tc_type(data->tc);
 	enable_auth_in.stream_type = data->streams[0].stream_type;
 
 	byte = mei_cldev_send(cldev, (u8 *)&enable_auth_in,
@@ -685,6 +711,7 @@ mei_hdcp_close_session(struct device *dev, struct hdcp_port_data *data)
 
 	session_close_in.port.integrated_port_type = data->port_type;
 	session_close_in.port.physical_port = mei_get_ddi_index(data->port);
+	session_close_in.port.attached_transcoder = mei_get_tc_type(data->tc);
 
 	byte = mei_cldev_send(cldev, (u8 *)&session_close_in,
 			      sizeof(session_close_in));
diff --git a/drivers/misc/mei/hdcp/mei_hdcp.h b/drivers/misc/mei/hdcp/mei_hdcp.h
index e4b1cd54c853..89e2f99ff60a 100644
--- a/drivers/misc/mei/hdcp/mei_hdcp.h
+++ b/drivers/misc/mei/hdcp/mei_hdcp.h
@@ -184,8 +184,10 @@ struct hdcp_cmd_no_data {
 /* Uniquely identifies the hdcp port being addressed for a given command. */
 struct hdcp_port_id {
 	u8	integrated_port_type;
+	/* Used until Gen11.5. Must be zero for Gen11.5+ */
 	u8	physical_port;
-	u16	reserved;
+	u8	attached_transcoder;
+	u8	reserved;
 } __packed;
 
 /*
@@ -374,4 +376,15 @@ enum mei_fw_ddi {
 	MEI_DDI_A = 7,
 	MEI_DDI_RANGE_END = MEI_DDI_A,
 };
+
+enum mei_fw_tc {
+	MEI_INVALID_TRANSCODER = 0x00,	// Invalid transcoder type
+	TC_EDP,				// Transcoder for eDP
+	TC_DSI0,			// Transcoder for DSI0
+	TC_DSI1,			// Transcoder for DSI1
+	TC_A = 0x10,			// Transcoder TCA
+	TC_B,				// Transcoder TCB
+	TC_C,				// Transcoder TCC
+	TC_D				// Transcoder TCD
+};
 #endif /* __MEI_HDCP_H__ */
diff --git a/include/drm/i915_mei_hdcp_interface.h b/include/drm/i915_mei_hdcp_interface.h
index 8c344255146a..dc0de63ce0cb 100644
--- a/include/drm/i915_mei_hdcp_interface.h
+++ b/include/drm/i915_mei_hdcp_interface.h
@@ -45,6 +45,7 @@ enum hdcp_wired_protocol {
 /**
  * struct hdcp_port_data - intel specific HDCP port data
  * @port: port index as per I915
+ * @tc: transcoder index as per I915
  * @port_type: HDCP port type as per ME FW classification
  * @protocol: HDCP adaptation as per ME FW
  * @k: No of streams transmitted on a port. Only on DP MST this is != 1
@@ -57,6 +58,7 @@ enum hdcp_wired_protocol {
  */
 struct hdcp_port_data {
 	enum port port;
+	enum transcoder tc;
 	u8 port_type;
 	u8 protocol;
 	u16 k;
-- 
2.20.1

_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel

RE: [PATCH v6 2/3] misc/mei_hdcp: Adding the transcoder detail in payload input

[Winkler, Tomas]

> 
> ME FW takes the transcoder details for Gen12+ platforms, as HDCP HW block is
> moved to transcoders.
> 
> hdcp_port_data is extended with enum transcoder. Payload structure is
> modified and populated from the hdcp_port_data.
> 
> Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
> ---
>  drivers/misc/mei/hdcp/mei_hdcp.c      | 27 +++++++++++++++++++++++++++
>  drivers/misc/mei/hdcp/mei_hdcp.h      | 15 ++++++++++++++-
>  include/drm/i915_mei_hdcp_interface.h |  2 ++
>  3 files changed, 43 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/misc/mei/hdcp/mei_hdcp.c
> b/drivers/misc/mei/hdcp/mei_hdcp.c
> index c681f6fab342..7efe3b65a986 100644
> --- a/drivers/misc/mei/hdcp/mei_hdcp.c
> +++ b/drivers/misc/mei/hdcp/mei_hdcp.c
> @@ -39,6 +39,22 @@ static inline u8 mei_get_ddi_index(enum port port)
>  	}
>  }
> 
> +static inline u8 mei_get_tc_type(enum transcoder tc) {
> +	switch (tc) {
> +	case TRANSCODER_A ... TRANSCODER_D:
> +		return (u8)(tc | 0x10);
> +	case TRANSCODER_EDP:
> +		return TC_EDP;
> +	case TRANSCODER_DSI_0:
> +		return TC_DSI0;
> +	case TRANSCODER_DSI_1:
> +		return TC_DSI1;
> +	default:
> +		return MEI_INVALID_TRANSCODER;
> +	}
> +}
> +
>  /**
>   * mei_hdcp_initiate_session() - Initiate a Wired HDCP2.2 Tx Session in ME FW
>   * @dev: device corresponding to the mei_cl_device @@ -70,6 +86,7 @@
> mei_hdcp_initiate_session(struct device *dev, struct hdcp_port_data *data,
> 
>  	session_init_in.port.integrated_port_type = data->port_type;
>  	session_init_in.port.physical_port = mei_get_ddi_index(data->port);
> +	session_init_in.port.attached_transcoder = mei_get_tc_type(data->tc);
>  	session_init_in.protocol = data->protocol;
> 
>  	byte = mei_cldev_send(cldev, (u8 *)&session_init_in, @@ -139,6
> +156,7 @@ mei_hdcp_verify_receiver_cert_prepare_km(struct device *dev,
> 
>  	verify_rxcert_in.port.integrated_port_type = data->port_type;
>  	verify_rxcert_in.port.physical_port = mei_get_ddi_index(data->port);
> +	verify_rxcert_in.port.attached_transcoder = mei_get_tc_type(data-
> >tc);
> 
>  	verify_rxcert_in.cert_rx = rx_cert->cert_rx;
>  	memcpy(verify_rxcert_in.r_rx, &rx_cert->r_rx, HDCP_2_2_RRX_LEN);
> @@ -209,6 +227,7 @@ mei_hdcp_verify_hprime(struct device *dev, struct
> hdcp_port_data *data,
> 
>  	send_hprime_in.port.integrated_port_type = data->port_type;
>  	send_hprime_in.port.physical_port = mei_get_ddi_index(data->port);
> +	send_hprime_in.port.attached_transcoder = mei_get_tc_type(data-
> >tc);
> 
>  	memcpy(send_hprime_in.h_prime, rx_hprime->h_prime,
>  	       HDCP_2_2_H_PRIME_LEN);
> @@ -266,6 +285,7 @@ mei_hdcp_store_pairing_info(struct device *dev, struct
> hdcp_port_data *data,
> 
>  	pairing_info_in.port.integrated_port_type = data->port_type;
>  	pairing_info_in.port.physical_port = mei_get_ddi_index(data->port);
> +	pairing_info_in.port.attached_transcoder = mei_get_tc_type(data->tc);
> 
>  	memcpy(pairing_info_in.e_kh_km, pairing_info->e_kh_km,
>  	       HDCP_2_2_E_KH_KM_LEN);
> @@ -324,6 +344,7 @@ mei_hdcp_initiate_locality_check(struct device *dev,
> 
>  	lc_init_in.port.integrated_port_type = data->port_type;
>  	lc_init_in.port.physical_port = mei_get_ddi_index(data->port);
> +	lc_init_in.port.attached_transcoder = mei_get_tc_type(data->tc);
> 
>  	byte = mei_cldev_send(cldev, (u8 *)&lc_init_in, sizeof(lc_init_in));
>  	if (byte < 0) {
> @@ -379,6 +400,7 @@ mei_hdcp_verify_lprime(struct device *dev, struct
> hdcp_port_data *data,
> 
>  	verify_lprime_in.port.integrated_port_type = data->port_type;
>  	verify_lprime_in.port.physical_port = mei_get_ddi_index(data->port);
> +	verify_lprime_in.port.attached_transcoder = mei_get_tc_type(data-
> >tc);
> 
>  	memcpy(verify_lprime_in.l_prime, rx_lprime->l_prime,
>  	       HDCP_2_2_L_PRIME_LEN);
> @@ -436,6 +458,7 @@ static int mei_hdcp_get_session_key(struct device
> *dev,
> 
>  	get_skey_in.port.integrated_port_type = data->port_type;
>  	get_skey_in.port.physical_port = mei_get_ddi_index(data->port);
> +	get_skey_in.port.attached_transcoder = mei_get_tc_type(data->tc);
> 
>  	byte = mei_cldev_send(cldev, (u8 *)&get_skey_in, sizeof(get_skey_in));
>  	if (byte < 0) {
> @@ -500,6 +523,7 @@ mei_hdcp_repeater_check_flow_prepare_ack(struct
> device *dev,
> 
>  	verify_repeater_in.port.integrated_port_type = data->port_type;
>  	verify_repeater_in.port.physical_port = mei_get_ddi_index(data-
> >port);
> +	verify_repeater_in.port.attached_transcoder =
> +mei_get_tc_type(data->tc);
> 
>  	memcpy(verify_repeater_in.rx_info, rep_topology->rx_info,
>  	       HDCP_2_2_RXINFO_LEN);
> @@ -570,6 +594,7 @@ static int mei_hdcp_verify_mprime(struct device *dev,
> 
>  	verify_mprime_in.port.integrated_port_type = data->port_type;
>  	verify_mprime_in.port.physical_port = mei_get_ddi_index(data->port);
> +	verify_mprime_in.port.attached_transcoder = mei_get_tc_type(data-
> >tc);
> 
>  	memcpy(verify_mprime_in.m_prime, stream_ready->m_prime,
>  	       HDCP_2_2_MPRIME_LEN);
> @@ -631,6 +656,7 @@ static int mei_hdcp_enable_authentication(struct
> device *dev,
> 
>  	enable_auth_in.port.integrated_port_type = data->port_type;
>  	enable_auth_in.port.physical_port = mei_get_ddi_index(data->port);
> +	enable_auth_in.port.attached_transcoder = mei_get_tc_type(data->tc);
>  	enable_auth_in.stream_type = data->streams[0].stream_type;
> 
>  	byte = mei_cldev_send(cldev, (u8 *)&enable_auth_in, @@ -685,6
> +711,7 @@ mei_hdcp_close_session(struct device *dev, struct hdcp_port_data
> *data)
> 
>  	session_close_in.port.integrated_port_type = data->port_type;
>  	session_close_in.port.physical_port = mei_get_ddi_index(data->port);
> +	session_close_in.port.attached_transcoder = mei_get_tc_type(data-
> >tc);
> 
>  	byte = mei_cldev_send(cldev, (u8 *)&session_close_in,
>  			      sizeof(session_close_in));
> diff --git a/drivers/misc/mei/hdcp/mei_hdcp.h
> b/drivers/misc/mei/hdcp/mei_hdcp.h
> index e4b1cd54c853..89e2f99ff60a 100644
> --- a/drivers/misc/mei/hdcp/mei_hdcp.h
> +++ b/drivers/misc/mei/hdcp/mei_hdcp.h
> @@ -184,8 +184,10 @@ struct hdcp_cmd_no_data {
>  /* Uniquely identifies the hdcp port being addressed for a given command. */
> struct hdcp_port_id {
>  	u8	integrated_port_type;
> +	/* Used until Gen11.5. Must be zero for Gen11.5+ */
>  	u8	physical_port;
> -	u16	reserved;
> +	u8	attached_transcoder;
> +	u8	reserved;
>  } __packed;
> 
>  /*
> @@ -374,4 +376,15 @@ enum mei_fw_ddi {
>  	MEI_DDI_A = 7,
>  	MEI_DDI_RANGE_END = MEI_DDI_A,
>  };
> +
> +enum mei_fw_tc {
> +	MEI_INVALID_TRANSCODER = 0x00,	// Invalid transcoder type
> +	TC_EDP,				// Transcoder for eDP
> +	TC_DSI0,			// Transcoder for DSI0
> +	TC_DSI1,			// Transcoder for DSI1
> +	TC_A = 0x10,			// Transcoder TCA
> +	TC_B,				// Transcoder TCB
> +	TC_C,				// Transcoder TCC
> +	TC_D				// Transcoder TCD
> +};

Don't use // for comments
Ned MEI_ prefix 

>  #endif /* __MEI_HDCP_H__ */
> diff --git a/include/drm/i915_mei_hdcp_interface.h
> b/include/drm/i915_mei_hdcp_interface.h
> index 8c344255146a..dc0de63ce0cb 100644
> --- a/include/drm/i915_mei_hdcp_interface.h
> +++ b/include/drm/i915_mei_hdcp_interface.h
> @@ -45,6 +45,7 @@ enum hdcp_wired_protocol {
>  /**
>   * struct hdcp_port_data - intel specific HDCP port data
>   * @port: port index as per I915
> + * @tc: transcoder index as per I915
>   * @port_type: HDCP port type as per ME FW classification
>   * @protocol: HDCP adaptation as per ME FW
>   * @k: No of streams transmitted on a port. Only on DP MST this is != 1 @@ -
> 57,6 +58,7 @@ enum hdcp_wired_protocol {
>   */
>  struct hdcp_port_data {
>  	enum port port;
> +	enum transcoder tc;
>  	u8 port_type;
>  	u8 protocol;
>  	u16 k;
> --
> 2.20.1

_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel

Re: [PATCH v6 2/3] misc/mei_hdcp: Adding the transcoder detail in payload input

[Ramalingam C]

On 2019-08-20 at 14:15:47 +0530, Winkler, Tomas wrote:
> 
> > 
> > ME FW takes the transcoder details for Gen12+ platforms, as HDCP HW block is
> > moved to transcoders.
> > 
> > hdcp_port_data is extended with enum transcoder. Payload structure is
> > modified and populated from the hdcp_port_data.
> > 
> > Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
> > ---
> >  drivers/misc/mei/hdcp/mei_hdcp.c      | 27 +++++++++++++++++++++++++++
> >  drivers/misc/mei/hdcp/mei_hdcp.h      | 15 ++++++++++++++-
> >  include/drm/i915_mei_hdcp_interface.h |  2 ++
> >  3 files changed, 43 insertions(+), 1 deletion(-)
> > 
> > diff --git a/drivers/misc/mei/hdcp/mei_hdcp.c
> > b/drivers/misc/mei/hdcp/mei_hdcp.c
> > index c681f6fab342..7efe3b65a986 100644
> > --- a/drivers/misc/mei/hdcp/mei_hdcp.c
> > +++ b/drivers/misc/mei/hdcp/mei_hdcp.c
> > @@ -39,6 +39,22 @@ static inline u8 mei_get_ddi_index(enum port port)
> >  	}
> >  }
> > 
> > +static inline u8 mei_get_tc_type(enum transcoder tc) {
> > +	switch (tc) {
> > +	case TRANSCODER_A ... TRANSCODER_D:
> > +		return (u8)(tc | 0x10);
> > +	case TRANSCODER_EDP:
> > +		return TC_EDP;
> > +	case TRANSCODER_DSI_0:
> > +		return TC_DSI0;
> > +	case TRANSCODER_DSI_1:
> > +		return TC_DSI1;
> > +	default:
> > +		return MEI_INVALID_TRANSCODER;
> > +	}
> > +}
> > +
> >  /**
> >   * mei_hdcp_initiate_session() - Initiate a Wired HDCP2.2 Tx Session in ME FW
> >   * @dev: device corresponding to the mei_cl_device @@ -70,6 +86,7 @@
> > mei_hdcp_initiate_session(struct device *dev, struct hdcp_port_data *data,
> > 
> >  	session_init_in.port.integrated_port_type = data->port_type;
> >  	session_init_in.port.physical_port = mei_get_ddi_index(data->port);
> > +	session_init_in.port.attached_transcoder = mei_get_tc_type(data->tc);
> >  	session_init_in.protocol = data->protocol;
> > 
> >  	byte = mei_cldev_send(cldev, (u8 *)&session_init_in, @@ -139,6
> > +156,7 @@ mei_hdcp_verify_receiver_cert_prepare_km(struct device *dev,
> > 
> >  	verify_rxcert_in.port.integrated_port_type = data->port_type;
> >  	verify_rxcert_in.port.physical_port = mei_get_ddi_index(data->port);
> > +	verify_rxcert_in.port.attached_transcoder = mei_get_tc_type(data-
> > >tc);
> > 
> >  	verify_rxcert_in.cert_rx = rx_cert->cert_rx;
> >  	memcpy(verify_rxcert_in.r_rx, &rx_cert->r_rx, HDCP_2_2_RRX_LEN);
> > @@ -209,6 +227,7 @@ mei_hdcp_verify_hprime(struct device *dev, struct
> > hdcp_port_data *data,
> > 
> >  	send_hprime_in.port.integrated_port_type = data->port_type;
> >  	send_hprime_in.port.physical_port = mei_get_ddi_index(data->port);
> > +	send_hprime_in.port.attached_transcoder = mei_get_tc_type(data-
> > >tc);
> > 
> >  	memcpy(send_hprime_in.h_prime, rx_hprime->h_prime,
> >  	       HDCP_2_2_H_PRIME_LEN);
> > @@ -266,6 +285,7 @@ mei_hdcp_store_pairing_info(struct device *dev, struct
> > hdcp_port_data *data,
> > 
> >  	pairing_info_in.port.integrated_port_type = data->port_type;
> >  	pairing_info_in.port.physical_port = mei_get_ddi_index(data->port);
> > +	pairing_info_in.port.attached_transcoder = mei_get_tc_type(data->tc);
> > 
> >  	memcpy(pairing_info_in.e_kh_km, pairing_info->e_kh_km,
> >  	       HDCP_2_2_E_KH_KM_LEN);
> > @@ -324,6 +344,7 @@ mei_hdcp_initiate_locality_check(struct device *dev,
> > 
> >  	lc_init_in.port.integrated_port_type = data->port_type;
> >  	lc_init_in.port.physical_port = mei_get_ddi_index(data->port);
> > +	lc_init_in.port.attached_transcoder = mei_get_tc_type(data->tc);
> > 
> >  	byte = mei_cldev_send(cldev, (u8 *)&lc_init_in, sizeof(lc_init_in));
> >  	if (byte < 0) {
> > @@ -379,6 +400,7 @@ mei_hdcp_verify_lprime(struct device *dev, struct
> > hdcp_port_data *data,
> > 
> >  	verify_lprime_in.port.integrated_port_type = data->port_type;
> >  	verify_lprime_in.port.physical_port = mei_get_ddi_index(data->port);
> > +	verify_lprime_in.port.attached_transcoder = mei_get_tc_type(data-
> > >tc);
> > 
> >  	memcpy(verify_lprime_in.l_prime, rx_lprime->l_prime,
> >  	       HDCP_2_2_L_PRIME_LEN);
> > @@ -436,6 +458,7 @@ static int mei_hdcp_get_session_key(struct device
> > *dev,
> > 
> >  	get_skey_in.port.integrated_port_type = data->port_type;
> >  	get_skey_in.port.physical_port = mei_get_ddi_index(data->port);
> > +	get_skey_in.port.attached_transcoder = mei_get_tc_type(data->tc);
> > 
> >  	byte = mei_cldev_send(cldev, (u8 *)&get_skey_in, sizeof(get_skey_in));
> >  	if (byte < 0) {
> > @@ -500,6 +523,7 @@ mei_hdcp_repeater_check_flow_prepare_ack(struct
> > device *dev,
> > 
> >  	verify_repeater_in.port.integrated_port_type = data->port_type;
> >  	verify_repeater_in.port.physical_port = mei_get_ddi_index(data-
> > >port);
> > +	verify_repeater_in.port.attached_transcoder =
> > +mei_get_tc_type(data->tc);
> > 
> >  	memcpy(verify_repeater_in.rx_info, rep_topology->rx_info,
> >  	       HDCP_2_2_RXINFO_LEN);
> > @@ -570,6 +594,7 @@ static int mei_hdcp_verify_mprime(struct device *dev,
> > 
> >  	verify_mprime_in.port.integrated_port_type = data->port_type;
> >  	verify_mprime_in.port.physical_port = mei_get_ddi_index(data->port);
> > +	verify_mprime_in.port.attached_transcoder = mei_get_tc_type(data-
> > >tc);
> > 
> >  	memcpy(verify_mprime_in.m_prime, stream_ready->m_prime,
> >  	       HDCP_2_2_MPRIME_LEN);
> > @@ -631,6 +656,7 @@ static int mei_hdcp_enable_authentication(struct
> > device *dev,
> > 
> >  	enable_auth_in.port.integrated_port_type = data->port_type;
> >  	enable_auth_in.port.physical_port = mei_get_ddi_index(data->port);
> > +	enable_auth_in.port.attached_transcoder = mei_get_tc_type(data->tc);
> >  	enable_auth_in.stream_type = data->streams[0].stream_type;
> > 
> >  	byte = mei_cldev_send(cldev, (u8 *)&enable_auth_in, @@ -685,6
> > +711,7 @@ mei_hdcp_close_session(struct device *dev, struct hdcp_port_data
> > *data)
> > 
> >  	session_close_in.port.integrated_port_type = data->port_type;
> >  	session_close_in.port.physical_port = mei_get_ddi_index(data->port);
> > +	session_close_in.port.attached_transcoder = mei_get_tc_type(data-
> > >tc);
> > 
> >  	byte = mei_cldev_send(cldev, (u8 *)&session_close_in,
> >  			      sizeof(session_close_in));
> > diff --git a/drivers/misc/mei/hdcp/mei_hdcp.h
> > b/drivers/misc/mei/hdcp/mei_hdcp.h
> > index e4b1cd54c853..89e2f99ff60a 100644
> > --- a/drivers/misc/mei/hdcp/mei_hdcp.h
> > +++ b/drivers/misc/mei/hdcp/mei_hdcp.h
> > @@ -184,8 +184,10 @@ struct hdcp_cmd_no_data {
> >  /* Uniquely identifies the hdcp port being addressed for a given command. */
> > struct hdcp_port_id {
> >  	u8	integrated_port_type;
> > +	/* Used until Gen11.5. Must be zero for Gen11.5+ */
> >  	u8	physical_port;
> > -	u16	reserved;
> > +	u8	attached_transcoder;
> > +	u8	reserved;
> >  } __packed;
> > 
> >  /*
> > @@ -374,4 +376,15 @@ enum mei_fw_ddi {
> >  	MEI_DDI_A = 7,
> >  	MEI_DDI_RANGE_END = MEI_DDI_A,
> >  };
> > +
> > +enum mei_fw_tc {
> > +	MEI_INVALID_TRANSCODER = 0x00,	// Invalid transcoder type
> > +	TC_EDP,				// Transcoder for eDP
> > +	TC_DSI0,			// Transcoder for DSI0
> > +	TC_DSI1,			// Transcoder for DSI1
> > +	TC_A = 0x10,			// Transcoder TCA
> > +	TC_B,				// Transcoder TCB
> > +	TC_C,				// Transcoder TCC
> > +	TC_D				// Transcoder TCD
> > +};
> 
> Don't use // for comments
> Ned MEI_ prefix 
I will fix this.

-Ram
> 
> >  #endif /* __MEI_HDCP_H__ */
> > diff --git a/include/drm/i915_mei_hdcp_interface.h
> > b/include/drm/i915_mei_hdcp_interface.h
> > index 8c344255146a..dc0de63ce0cb 100644
> > --- a/include/drm/i915_mei_hdcp_interface.h
> > +++ b/include/drm/i915_mei_hdcp_interface.h
> > @@ -45,6 +45,7 @@ enum hdcp_wired_protocol {
> >  /**
> >   * struct hdcp_port_data - intel specific HDCP port data
> >   * @port: port index as per I915
> > + * @tc: transcoder index as per I915
> >   * @port_type: HDCP port type as per ME FW classification
> >   * @protocol: HDCP adaptation as per ME FW
> >   * @k: No of streams transmitted on a port. Only on DP MST this is != 1 @@ -
> > 57,6 +58,7 @@ enum hdcp_wired_protocol {
> >   */
> >  struct hdcp_port_data {
> >  	enum port port;
> > +	enum transcoder tc;
> >  	u8 port_type;
> >  	u8 protocol;
> >  	u16 k;
> > --
> > 2.20.1
> 
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

[PATCH v6 3/3] drm/i915: Enable HDCP 1.4 and 2.2 on Gen12+

[Ramalingam C]

From Gen12 onwards, HDCP HW block is implemented within transcoders.
Till Gen11 HDCP HW block was part of DDI.

Hence required changes in HW programming is handled here.

As ME FW needs the transcoder detail on which HDCP is enabled
on Gen12+ platform, we are populating the detail in hdcp_port_data.

v2:
  _MMIO_TRANS is used [Lucas and Daniel]
  platform check is moved into the caller [Lucas]
v3:
  platform check is moved into a macro [Shashank]
v4:
  Few optimizations in the coding [Shashank]
v5:
  Fixed alignment in macro definition in i915_reg.h [Shashank]
  unused variables "reg" is removed.
v6:
  Configuring the transcoder at compute_config.
  transcoder is used instead of pipe in macros.
  Rebased.

Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
Reviewed-by: Shashank Sharma <shashank.sharma@intel.com> [v5]
---
 drivers/gpu/drm/i915/display/intel_dp.c   |   3 +
 drivers/gpu/drm/i915/display/intel_hdcp.c | 158 +++++++++++++++-------
 drivers/gpu/drm/i915/display/intel_hdcp.h |   2 +
 drivers/gpu/drm/i915/display/intel_hdmi.c |  12 +-
 drivers/gpu/drm/i915/i915_reg.h           | 124 +++++++++++++++--
 5 files changed, 235 insertions(+), 64 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index 5c45a3bb102d..5f00ac872816 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -2244,6 +2244,9 @@ intel_dp_compute_config(struct intel_encoder *encoder,
 
 	intel_psr_compute_config(intel_dp, pipe_config);
 
+	intel_hdcp_transcoder_config(intel_connector,
+				     pipe_config->cpu_transcoder);
+
 	return 0;
 }
 
diff --git a/drivers/gpu/drm/i915/display/intel_hdcp.c b/drivers/gpu/drm/i915/display/intel_hdcp.c
index 6ec5ceeab601..5604b669e5c7 100644
--- a/drivers/gpu/drm/i915/display/intel_hdcp.c
+++ b/drivers/gpu/drm/i915/display/intel_hdcp.c
@@ -18,6 +18,7 @@
 #include "intel_display_types.h"
 #include "intel_hdcp.h"
 #include "intel_sideband.h"
+#include "intel_connector.h"
 
 #define KEY_LOAD_TRIES	5
 #define ENCRYPT_STATUS_CHANGE_TIMEOUT_MS	50
@@ -105,24 +106,17 @@ bool intel_hdcp2_capable(struct intel_connector *connector)
 	return capable;
 }
 
-static inline bool intel_hdcp_in_use(struct intel_connector *connector)
+static inline bool intel_hdcp_in_use(struct drm_i915_private *dev_priv,
+				     enum transcoder tc, enum port port)
 {
-	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
-	enum port port = connector->encoder->port;
-	u32 reg;
-
-	reg = I915_READ(PORT_HDCP_STATUS(port));
-	return reg & HDCP_STATUS_ENC;
+	return I915_READ(HDCP_STATUS(dev_priv, tc, port)) & HDCP_STATUS_ENC;
 }
 
-static inline bool intel_hdcp2_in_use(struct intel_connector *connector)
+static inline bool intel_hdcp2_in_use(struct drm_i915_private *dev_priv,
+				      enum transcoder tc, enum port port)
 {
-	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
-	enum port port = connector->encoder->port;
-	u32 reg;
-
-	reg = I915_READ(HDCP2_STATUS_DDI(port));
-	return reg & LINK_ENCRYPTION_STATUS;
+	return I915_READ(HDCP2_STATUS(dev_priv, tc, port)) &
+	       LINK_ENCRYPTION_STATUS;
 }
 
 static int intel_hdcp_poll_ksv_fifo(struct intel_digital_port *intel_dig_port,
@@ -253,9 +247,28 @@ static int intel_write_sha_text(struct drm_i915_private *dev_priv, u32 sha_text)
 }
 
 static
-u32 intel_hdcp_get_repeater_ctl(struct intel_digital_port *intel_dig_port)
+u32 intel_hdcp_get_repeater_ctl(struct drm_i915_private *dev_priv,
+				enum transcoder tc, enum port port)
 {
-	enum port port = intel_dig_port->base.port;
+	if (INTEL_GEN(dev_priv) >= 12) {
+		switch (tc) {
+		case TRANSCODER_A:
+			return HDCP_TRANSA_REP_PRESENT |
+			       HDCP_TRANSA_SHA1_M0;
+		case TRANSCODER_B:
+			return HDCP_TRANSB_REP_PRESENT |
+			       HDCP_TRANSB_SHA1_M0;
+		case TRANSCODER_C:
+			return HDCP_TRANSC_REP_PRESENT |
+			       HDCP_TRANSC_SHA1_M0;
+		/* FIXME: Add a case for PIPE_D */
+		default:
+			DRM_ERROR("Unknown transcoder %d\n", tc);
+			break;
+		}
+		return -EINVAL;
+	}
+
 	switch (port) {
 	case PORT_A:
 		return HDCP_DDIA_REP_PRESENT | HDCP_DDIA_SHA1_M0;
@@ -268,18 +281,21 @@ u32 intel_hdcp_get_repeater_ctl(struct intel_digital_port *intel_dig_port)
 	case PORT_E:
 		return HDCP_DDIE_REP_PRESENT | HDCP_DDIE_SHA1_M0;
 	default:
+		DRM_ERROR("Unknown port %d\n", port);
 		break;
 	}
-	DRM_ERROR("Unknown port %d\n", port);
 	return -EINVAL;
 }
 
 static
-int intel_hdcp_validate_v_prime(struct intel_digital_port *intel_dig_port,
+int intel_hdcp_validate_v_prime(struct intel_connector *connector,
 				const struct intel_hdcp_shim *shim,
 				u8 *ksv_fifo, u8 num_downstream, u8 *bstatus)
 {
+	struct intel_digital_port *intel_dig_port = conn_to_dig_port(connector);
 	struct drm_i915_private *dev_priv;
+	enum transcoder tc = connector->hdcp.port_data.tc;
+	enum port port = intel_dig_port->base.port;
 	u32 vprime, sha_text, sha_leftovers, rep_ctl;
 	int ret, i, j, sha_idx;
 
@@ -306,7 +322,7 @@ int intel_hdcp_validate_v_prime(struct intel_digital_port *intel_dig_port,
 	sha_idx = 0;
 	sha_text = 0;
 	sha_leftovers = 0;
-	rep_ctl = intel_hdcp_get_repeater_ctl(intel_dig_port);
+	rep_ctl = intel_hdcp_get_repeater_ctl(dev_priv, tc, port);
 	I915_WRITE(HDCP_REP_CTL, rep_ctl | HDCP_SHA1_TEXT_32);
 	for (i = 0; i < num_downstream; i++) {
 		unsigned int sha_empty;
@@ -548,7 +564,7 @@ int intel_hdcp_auth_downstream(struct intel_connector *connector)
 	 * V prime atleast twice.
 	 */
 	for (i = 0; i < tries; i++) {
-		ret = intel_hdcp_validate_v_prime(intel_dig_port, shim,
+		ret = intel_hdcp_validate_v_prime(connector, shim,
 						  ksv_fifo, num_downstream,
 						  bstatus);
 		if (!ret)
@@ -576,6 +592,7 @@ static int intel_hdcp_auth(struct intel_connector *connector)
 	struct drm_device *dev = connector->base.dev;
 	const struct intel_hdcp_shim *shim = hdcp->shim;
 	struct drm_i915_private *dev_priv;
+	enum transcoder tc = connector->hdcp.port_data.tc;
 	enum port port;
 	unsigned long r0_prime_gen_start;
 	int ret, i, tries = 2;
@@ -615,18 +632,18 @@ static int intel_hdcp_auth(struct intel_connector *connector)
 
 	/* Initialize An with 2 random values and acquire it */
 	for (i = 0; i < 2; i++)
-		I915_WRITE(PORT_HDCP_ANINIT(port), get_random_u32());
-	I915_WRITE(PORT_HDCP_CONF(port), HDCP_CONF_CAPTURE_AN);
+		I915_WRITE(HDCP_ANINIT(dev_priv, tc, port), get_random_u32());
+	I915_WRITE(HDCP_CONF(dev_priv, tc, port), HDCP_CONF_CAPTURE_AN);
 
 	/* Wait for An to be acquired */
-	if (intel_de_wait_for_set(dev_priv, PORT_HDCP_STATUS(port),
+	if (intel_de_wait_for_set(dev_priv, HDCP_STATUS(dev_priv, tc, port),
 				  HDCP_STATUS_AN_READY, 1)) {
 		DRM_ERROR("Timed out waiting for An\n");
 		return -ETIMEDOUT;
 	}
 
-	an.reg[0] = I915_READ(PORT_HDCP_ANLO(port));
-	an.reg[1] = I915_READ(PORT_HDCP_ANHI(port));
+	an.reg[0] = I915_READ(HDCP_ANLO(dev_priv, tc, port));
+	an.reg[1] = I915_READ(HDCP_ANHI(dev_priv, tc, port));
 	ret = shim->write_an_aksv(intel_dig_port, an.shim);
 	if (ret)
 		return ret;
@@ -644,24 +661,24 @@ static int intel_hdcp_auth(struct intel_connector *connector)
 		return -EPERM;
 	}
 
-	I915_WRITE(PORT_HDCP_BKSVLO(port), bksv.reg[0]);
-	I915_WRITE(PORT_HDCP_BKSVHI(port), bksv.reg[1]);
+	I915_WRITE(HDCP_BKSVLO(dev_priv, tc, port), bksv.reg[0]);
+	I915_WRITE(HDCP_BKSVHI(dev_priv, tc, port), bksv.reg[1]);
 
 	ret = shim->repeater_present(intel_dig_port, &repeater_present);
 	if (ret)
 		return ret;
 	if (repeater_present)
 		I915_WRITE(HDCP_REP_CTL,
-			   intel_hdcp_get_repeater_ctl(intel_dig_port));
+			   intel_hdcp_get_repeater_ctl(dev_priv, tc, port));
 
 	ret = shim->toggle_signalling(intel_dig_port, true);
 	if (ret)
 		return ret;
 
-	I915_WRITE(PORT_HDCP_CONF(port), HDCP_CONF_AUTH_AND_ENC);
+	I915_WRITE(HDCP_CONF(dev_priv, tc, port), HDCP_CONF_AUTH_AND_ENC);
 
 	/* Wait for R0 ready */
-	if (wait_for(I915_READ(PORT_HDCP_STATUS(port)) &
+	if (wait_for(I915_READ(HDCP_STATUS(dev_priv, tc, port)) &
 		     (HDCP_STATUS_R0_READY | HDCP_STATUS_ENC), 1)) {
 		DRM_ERROR("Timed out waiting for R0 ready\n");
 		return -ETIMEDOUT;
@@ -689,22 +706,22 @@ static int intel_hdcp_auth(struct intel_connector *connector)
 		ret = shim->read_ri_prime(intel_dig_port, ri.shim);
 		if (ret)
 			return ret;
-		I915_WRITE(PORT_HDCP_RPRIME(port), ri.reg);
+		I915_WRITE(HDCP_RPRIME(dev_priv, tc, port), ri.reg);
 
 		/* Wait for Ri prime match */
-		if (!wait_for(I915_READ(PORT_HDCP_STATUS(port)) &
+		if (!wait_for(I915_READ(HDCP_STATUS(dev_priv, tc, port)) &
 		    (HDCP_STATUS_RI_MATCH | HDCP_STATUS_ENC), 1))
 			break;
 	}
 
 	if (i == tries) {
 		DRM_DEBUG_KMS("Timed out waiting for Ri prime match (%x)\n",
-			      I915_READ(PORT_HDCP_STATUS(port)));
+			      I915_READ(HDCP_STATUS(dev_priv, tc, port)));
 		return -ETIMEDOUT;
 	}
 
 	/* Wait for encryption confirmation */
-	if (intel_de_wait_for_set(dev_priv, PORT_HDCP_STATUS(port),
+	if (intel_de_wait_for_set(dev_priv, HDCP_STATUS(dev_priv, tc, port),
 				  HDCP_STATUS_ENC,
 				  ENCRYPT_STATUS_CHANGE_TIMEOUT_MS)) {
 		DRM_ERROR("Timed out waiting for encryption\n");
@@ -729,15 +746,16 @@ static int _intel_hdcp_disable(struct intel_connector *connector)
 	struct drm_i915_private *dev_priv = connector->base.dev->dev_private;
 	struct intel_digital_port *intel_dig_port = conn_to_dig_port(connector);
 	enum port port = intel_dig_port->base.port;
+	enum transcoder tc = hdcp->port_data.tc;
 	int ret;
 
 	DRM_DEBUG_KMS("[%s:%d] HDCP is being disabled...\n",
 		      connector->base.name, connector->base.base.id);
 
 	hdcp->hdcp_encrypted = false;
-	I915_WRITE(PORT_HDCP_CONF(port), 0);
-	if (intel_de_wait_for_clear(dev_priv, PORT_HDCP_STATUS(port), ~0,
-				    ENCRYPT_STATUS_CHANGE_TIMEOUT_MS)) {
+	I915_WRITE(HDCP_CONF(dev_priv, tc, port), 0);
+	if (intel_de_wait_for_clear(dev_priv, HDCP_STATUS(dev_priv, tc, port),
+				    ~0, ENCRYPT_STATUS_CHANGE_TIMEOUT_MS)) {
 		DRM_ERROR("Failed to disable HDCP, timeout clearing status\n");
 		return -ETIMEDOUT;
 	}
@@ -808,9 +826,11 @@ static int intel_hdcp_check_link(struct intel_connector *connector)
 	struct drm_i915_private *dev_priv = connector->base.dev->dev_private;
 	struct intel_digital_port *intel_dig_port = conn_to_dig_port(connector);
 	enum port port = intel_dig_port->base.port;
+	enum transcoder tc;
 	int ret = 0;
 
 	mutex_lock(&hdcp->mutex);
+	tc = hdcp->port_data.tc;
 
 	/* Check_link valid only when HDCP1.4 is enabled */
 	if (hdcp->value != DRM_MODE_CONTENT_PROTECTION_ENABLED ||
@@ -819,10 +839,10 @@ static int intel_hdcp_check_link(struct intel_connector *connector)
 		goto out;
 	}
 
-	if (WARN_ON(!intel_hdcp_in_use(connector))) {
+	if (WARN_ON(!intel_hdcp_in_use(dev_priv, tc, port))) {
 		DRM_ERROR("%s:%d HDCP link stopped encryption,%x\n",
 			  connector->base.name, connector->base.base.id,
-			  I915_READ(PORT_HDCP_STATUS(port)));
+			  I915_READ(HDCP_STATUS(dev_priv, tc, port)));
 		ret = -ENXIO;
 		hdcp->value = DRM_MODE_CONTENT_PROTECTION_DESIRED;
 		schedule_work(&hdcp->prop_work);
@@ -1493,10 +1513,11 @@ static int hdcp2_enable_encryption(struct intel_connector *connector)
 	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
 	struct intel_hdcp *hdcp = &connector->hdcp;
 	enum port port = connector->encoder->port;
+	enum transcoder tc = hdcp->port_data.tc;
 	int ret;
 
-	WARN_ON(I915_READ(HDCP2_STATUS_DDI(port)) & LINK_ENCRYPTION_STATUS);
-
+	WARN_ON(I915_READ(HDCP2_STATUS(dev_priv, tc, port)) &
+		LINK_ENCRYPTION_STATUS);
 	if (hdcp->shim->toggle_signalling) {
 		ret = hdcp->shim->toggle_signalling(intel_dig_port, true);
 		if (ret) {
@@ -1506,14 +1527,14 @@ static int hdcp2_enable_encryption(struct intel_connector *connector)
 		}
 	}
 
-	if (I915_READ(HDCP2_STATUS_DDI(port)) & LINK_AUTH_STATUS) {
+	if (I915_READ(HDCP2_STATUS(dev_priv, tc, port)) & LINK_AUTH_STATUS) {
 		/* Link is Authenticated. Now set for Encryption */
-		I915_WRITE(HDCP2_CTL_DDI(port),
-			   I915_READ(HDCP2_CTL_DDI(port)) |
+		I915_WRITE(HDCP2_CTL(dev_priv, tc, port),
+			   I915_READ(HDCP2_CTL(dev_priv, tc, port)) |
 			   CTL_LINK_ENCRYPTION_REQ);
 	}
 
-	ret = intel_de_wait_for_set(dev_priv, HDCP2_STATUS_DDI(port),
+	ret = intel_de_wait_for_set(dev_priv, HDCP2_STATUS(dev_priv, tc, port),
 				    LINK_ENCRYPTION_STATUS,
 				    ENCRYPT_STATUS_CHANGE_TIMEOUT_MS);
 
@@ -1526,14 +1547,18 @@ static int hdcp2_disable_encryption(struct intel_connector *connector)
 	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
 	struct intel_hdcp *hdcp = &connector->hdcp;
 	enum port port = connector->encoder->port;
+	enum transcoder tc = hdcp->port_data.tc;
 	int ret;
 
-	WARN_ON(!(I915_READ(HDCP2_STATUS_DDI(port)) & LINK_ENCRYPTION_STATUS));
+	WARN_ON(!(I915_READ(HDCP2_STATUS(dev_priv, tc, port)) &
+			    LINK_ENCRYPTION_STATUS));
 
-	I915_WRITE(HDCP2_CTL_DDI(port),
-		   I915_READ(HDCP2_CTL_DDI(port)) & ~CTL_LINK_ENCRYPTION_REQ);
+	I915_WRITE(HDCP2_CTL(dev_priv, tc, port),
+		   I915_READ(HDCP2_CTL(dev_priv, tc, port)) &
+		   ~CTL_LINK_ENCRYPTION_REQ);
 
-	ret = intel_de_wait_for_clear(dev_priv, HDCP2_STATUS_DDI(port),
+	ret = intel_de_wait_for_clear(dev_priv,
+				      HDCP2_STATUS(dev_priv, tc, port),
 				      LINK_ENCRYPTION_STATUS,
 				      ENCRYPT_STATUS_CHANGE_TIMEOUT_MS);
 	if (ret == -ETIMEDOUT)
@@ -1632,9 +1657,11 @@ static int intel_hdcp2_check_link(struct intel_connector *connector)
 	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
 	struct intel_hdcp *hdcp = &connector->hdcp;
 	enum port port = connector->encoder->port;
+	enum transcoder tc;
 	int ret = 0;
 
 	mutex_lock(&hdcp->mutex);
+	tc = hdcp->port_data.tc;
 
 	/* hdcp2_check_link is expected only when HDCP2.2 is Enabled */
 	if (hdcp->value != DRM_MODE_CONTENT_PROTECTION_ENABLED ||
@@ -1643,9 +1670,9 @@ static int intel_hdcp2_check_link(struct intel_connector *connector)
 		goto out;
 	}
 
-	if (WARN_ON(!intel_hdcp2_in_use(connector))) {
+	if (WARN_ON(!intel_hdcp2_in_use(dev_priv, tc, port))) {
 		DRM_ERROR("HDCP2.2 link stopped the encryption, %x\n",
-			  I915_READ(HDCP2_STATUS_DDI(port)));
+			  I915_READ(HDCP2_STATUS(dev_priv, tc, port)));
 		ret = -ENXIO;
 		hdcp->value = DRM_MODE_CONTENT_PROTECTION_DESIRED;
 		schedule_work(&hdcp->prop_work);
@@ -1752,10 +1779,21 @@ static const struct component_ops i915_hdcp_component_ops = {
 static inline int initialize_hdcp_port_data(struct intel_connector *connector,
 					    const struct intel_hdcp_shim *shim)
 {
+	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
 	struct intel_hdcp *hdcp = &connector->hdcp;
 	struct hdcp_port_data *data = &hdcp->port_data;
+	struct intel_crtc *crtc;
+
+	if (INTEL_GEN(dev_priv) < 12) {
+		data->port = connector->encoder->port;
+		data->tc = INVALID_TRANSCODER;
+	} else {
+		crtc = to_intel_crtc(connector->base.state->crtc);
+		if (crtc)
+			data->tc = crtc->config->cpu_transcoder;
+		data->port = PORT_NONE;
+	}
 
-	data->port = connector->encoder->port;
 	data->port_type = (u8)HDCP_PORT_TYPE_INTEGRATED;
 	data->protocol = (u8)shim->protocol;
 
@@ -1822,6 +1860,22 @@ static void intel_hdcp2_init(struct intel_connector *connector,
 	hdcp->hdcp2_supported = true;
 }
 
+void intel_hdcp_transcoder_config(struct intel_connector *connector,
+				 enum transcoder trans)
+{
+	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
+	struct intel_hdcp *hdcp = &connector->hdcp;
+
+	if (!hdcp->shim)
+		return;
+
+	if (INTEL_GEN(dev_priv) >= 12) {
+		mutex_lock(&hdcp->mutex);
+		hdcp->port_data.tc = trans;
+		mutex_unlock(&hdcp->mutex);
+	}
+}
+
 int intel_hdcp_init(struct intel_connector *connector,
 		    const struct intel_hdcp_shim *shim)
 {
diff --git a/drivers/gpu/drm/i915/display/intel_hdcp.h b/drivers/gpu/drm/i915/display/intel_hdcp.h
index 13555b054930..1041b2c11fe9 100644
--- a/drivers/gpu/drm/i915/display/intel_hdcp.h
+++ b/drivers/gpu/drm/i915/display/intel_hdcp.h
@@ -19,6 +19,8 @@ struct intel_hdcp_shim;
 void intel_hdcp_atomic_check(struct drm_connector *connector,
 			     struct drm_connector_state *old_state,
 			     struct drm_connector_state *new_state);
+void intel_hdcp_transcoder_config(struct intel_connector *connector,
+				  enum transcoder trans);
 int intel_hdcp_init(struct intel_connector *connector,
 		    const struct intel_hdcp_shim *hdcp_shim);
 int intel_hdcp_enable(struct intel_connector *connector, u8 content_type);
diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.c b/drivers/gpu/drm/i915/display/intel_hdmi.c
index b1ca8e5bdb56..b2eb80fc9ff4 100644
--- a/drivers/gpu/drm/i915/display/intel_hdmi.c
+++ b/drivers/gpu/drm/i915/display/intel_hdmi.c
@@ -1491,7 +1491,10 @@ bool intel_hdmi_hdcp_check_link(struct intel_digital_port *intel_dig_port)
 {
 	struct drm_i915_private *dev_priv =
 		intel_dig_port->base.base.dev->dev_private;
+	struct intel_connector *connector =
+		intel_dig_port->hdmi.attached_connector;
 	enum port port = intel_dig_port->base.port;
+	enum transcoder tc = connector->hdcp.port_data.tc;
 	int ret;
 	union {
 		u32 reg;
@@ -1502,13 +1505,13 @@ bool intel_hdmi_hdcp_check_link(struct intel_digital_port *intel_dig_port)
 	if (ret)
 		return false;
 
-	I915_WRITE(PORT_HDCP_RPRIME(port), ri.reg);
+	I915_WRITE(HDCP_RPRIME(dev_priv, tc, port), ri.reg);
 
 	/* Wait for Ri prime match */
-	if (wait_for(I915_READ(PORT_HDCP_STATUS(port)) &
+	if (wait_for(I915_READ(HDCP_STATUS(dev_priv, tc, port)) &
 		     (HDCP_STATUS_RI_MATCH | HDCP_STATUS_ENC), 1)) {
 		DRM_ERROR("Ri' mismatch detected, link check failed (%x)\n",
-			  I915_READ(PORT_HDCP_STATUS(port)));
+			  I915_READ(HDCP_STATUS(dev_priv, tc, port)));
 		return false;
 	}
 	return true;
@@ -2432,6 +2435,9 @@ int intel_hdmi_compute_config(struct intel_encoder *encoder,
 		return -EINVAL;
 	}
 
+	intel_hdcp_transcoder_config(intel_hdmi->attached_connector,
+				     pipe_config->cpu_transcoder);
+
 	return 0;
 }
 
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index ea2f0fa2402d..9e5701f6e74d 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -9255,12 +9255,20 @@ enum skl_power_gate {
 
 /* HDCP Repeater Registers */
 #define HDCP_REP_CTL			_MMIO(0x66d00)
+#define  HDCP_TRANSA_REP_PRESENT	BIT(31)
+#define  HDCP_TRANSB_REP_PRESENT	BIT(30)
+#define  HDCP_TRANSC_REP_PRESENT	BIT(29)
+#define  HDCP_TRANSD_REP_PRESENT	BIT(28)
 #define  HDCP_DDIB_REP_PRESENT		BIT(30)
 #define  HDCP_DDIA_REP_PRESENT		BIT(29)
 #define  HDCP_DDIC_REP_PRESENT		BIT(28)
 #define  HDCP_DDID_REP_PRESENT		BIT(27)
 #define  HDCP_DDIF_REP_PRESENT		BIT(26)
 #define  HDCP_DDIE_REP_PRESENT		BIT(25)
+#define  HDCP_TRANSA_SHA1_M0		(1 << 20)
+#define  HDCP_TRANSB_SHA1_M0		(2 << 20)
+#define  HDCP_TRANSC_SHA1_M0		(3 << 20)
+#define  HDCP_TRANSD_SHA1_M0		(4 << 20)
 #define  HDCP_DDIB_SHA1_M0		(1 << 20)
 #define  HDCP_DDIA_SHA1_M0		(2 << 20)
 #define  HDCP_DDIC_SHA1_M0		(3 << 20)
@@ -9300,15 +9308,92 @@ enum skl_power_gate {
 					  _PORTE_HDCP_AUTHENC, \
 					  _PORTF_HDCP_AUTHENC) + (x))
 #define PORT_HDCP_CONF(port)		_PORT_HDCP_AUTHENC(port, 0x0)
+#define _TRANSA_HDCP_CONF		0x66400
+#define _TRANSB_HDCP_CONF		0x66500
+#define TRANS_HDCP_CONF(trans)		_MMIO_TRANS(trans, _TRANSA_HDCP_CONF, \
+						    _TRANSB_HDCP_CONF)
+#define HDCP_CONF(dev_priv, trans, port) \
+					(INTEL_GEN(dev_priv) >= 12 ? \
+					 TRANS_HDCP_CONF(trans) : \
+					 PORT_HDCP_CONF(port))
+
 #define  HDCP_CONF_CAPTURE_AN		BIT(0)
 #define  HDCP_CONF_AUTH_AND_ENC		(BIT(1) | BIT(0))
 #define PORT_HDCP_ANINIT(port)		_PORT_HDCP_AUTHENC(port, 0x4)
+#define _TRANSA_HDCP_ANINIT		0x66404
+#define _TRANSB_HDCP_ANINIT		0x66504
+#define TRANS_HDCP_ANINIT(trans)	_MMIO_TRANS(trans, \
+						    _TRANSA_HDCP_ANINIT, \
+						    _TRANSB_HDCP_ANINIT)
+#define HDCP_ANINIT(dev_priv, trans, port) \
+					(INTEL_GEN(dev_priv) >= 12 ? \
+					 TRANS_HDCP_ANINIT(trans) : \
+					 PORT_HDCP_ANINIT(port))
+
 #define PORT_HDCP_ANLO(port)		_PORT_HDCP_AUTHENC(port, 0x8)
+#define _TRANSA_HDCP_ANLO		0x66408
+#define _TRANSB_HDCP_ANLO		0x66508
+#define TRANS_HDCP_ANLO(trans)		_MMIO_TRANS(trans, _TRANSA_HDCP_ANLO, \
+						    _TRANSB_HDCP_ANLO)
+#define HDCP_ANLO(dev_priv, trans, port) \
+					(INTEL_GEN(dev_priv) >= 12 ? \
+					 TRANS_HDCP_ANLO(trans) : \
+					 PORT_HDCP_ANLO(port))
+
 #define PORT_HDCP_ANHI(port)		_PORT_HDCP_AUTHENC(port, 0xC)
+#define _TRANSA_HDCP_ANHI		0x6640C
+#define _TRANSB_HDCP_ANHI		0x6650C
+#define TRANS_HDCP_ANHI(trans)		_MMIO_TRANS(trans, _TRANSA_HDCP_ANHI, \
+						    _TRANSB_HDCP_ANHI)
+#define HDCP_ANHI(dev_priv, trans, port) \
+					(INTEL_GEN(dev_priv) >= 12 ? \
+					 TRANS_HDCP_ANHI(trans) : \
+					 PORT_HDCP_ANHI(port))
+
 #define PORT_HDCP_BKSVLO(port)		_PORT_HDCP_AUTHENC(port, 0x10)
+#define _TRANSA_HDCP_BKSVLO		0x66410
+#define _TRANSB_HDCP_BKSVLO		0x66510
+#define TRANS_HDCP_BKSVLO(trans)	_MMIO_TRANS(trans, \
+						    _TRANSA_HDCP_BKSVLO, \
+						    _TRANSB_HDCP_BKSVLO)
+#define HDCP_BKSVLO(dev_priv, trans, port) \
+					(INTEL_GEN(dev_priv) >= 12 ? \
+					 TRANS_HDCP_BKSVLO(trans) : \
+					 PORT_HDCP_BKSVLO(port))
+
 #define PORT_HDCP_BKSVHI(port)		_PORT_HDCP_AUTHENC(port, 0x14)
+#define _TRANSA_HDCP_BKSVHI		0x66414
+#define _TRANSB_HDCP_BKSVHI		0x66514
+#define TRANS_HDCP_BKSVHI(trans)	_MMIO_TRANS(trans, \
+						    _TRANSA_HDCP_BKSVHI, \
+						    _TRANSB_HDCP_BKSVHI)
+#define HDCP_BKSVHI(dev_priv, trans, port) \
+					(INTEL_GEN(dev_priv) >= 12 ? \
+					 TRANS_HDCP_BKSVHI(trans) : \
+					 PORT_HDCP_BKSVHI(port))
+
 #define PORT_HDCP_RPRIME(port)		_PORT_HDCP_AUTHENC(port, 0x18)
+#define _TRANSA_HDCP_RPRIME		0x66418
+#define _TRANSB_HDCP_RPRIME		0x66518
+#define TRANS_HDCP_RPRIME(trans)	_MMIO_TRANS(trans, \
+						    _TRANSA_HDCP_RPRIME, \
+						    _TRANSB_HDCP_RPRIME)
+#define HDCP_RPRIME(dev_priv, trans, port) \
+					(INTEL_GEN(dev_priv) >= 12 ? \
+					 TRANS_HDCP_RPRIME(trans) : \
+					 PORT_HDCP_RPRIME(port))
+
 #define PORT_HDCP_STATUS(port)		_PORT_HDCP_AUTHENC(port, 0x1C)
+#define _TRANSA_HDCP_STATUS		0x6641C
+#define _TRANSB_HDCP_STATUS		0x6651C
+#define TRANS_HDCP_STATUS(trans)	_MMIO_TRANS(trans, \
+						    _TRANSA_HDCP_STATUS, \
+						    _TRANSB_HDCP_STATUS)
+#define HDCP_STATUS(dev_priv, trans, port) \
+					(INTEL_GEN(dev_priv) >= 12 ? \
+					 TRANS_HDCP_STATUS(trans) : \
+					 PORT_HDCP_STATUS(port))
+
 #define  HDCP_STATUS_STREAM_A_ENC	BIT(31)
 #define  HDCP_STATUS_STREAM_B_ENC	BIT(30)
 #define  HDCP_STATUS_STREAM_C_ENC	BIT(29)
@@ -9335,23 +9420,44 @@ enum skl_power_gate {
 					  _PORTD_HDCP2_BASE, \
 					  _PORTE_HDCP2_BASE, \
 					  _PORTF_HDCP2_BASE) + (x))
-
-#define HDCP2_AUTH_DDI(port)		_PORT_HDCP2_BASE(port, 0x98)
+#define PORT_HDCP2_AUTH(port)		_PORT_HDCP2_BASE(port, 0x98)
+#define _TRANSA_HDCP2_AUTH		0x66498
+#define _TRANSB_HDCP2_AUTH		0x66598
+#define TRANS_HDCP2_AUTH(trans)		_MMIO_TRANS(trans, _TRANSA_HDCP2_AUTH, \
+						    _TRANSB_HDCP2_AUTH)
 #define   AUTH_LINK_AUTHENTICATED	BIT(31)
 #define   AUTH_LINK_TYPE		BIT(30)
 #define   AUTH_FORCE_CLR_INPUTCTR	BIT(19)
 #define   AUTH_CLR_KEYS			BIT(18)
-
-#define HDCP2_CTL_DDI(port)		_PORT_HDCP2_BASE(port, 0xB0)
+#define HDCP2_AUTH(dev_priv, trans, port) \
+					(INTEL_GEN(dev_priv) >= 12 ? \
+					 TRANS_HDCP2_AUTH(trans) : \
+					 PORT_HDCP2_AUTH(port))
+
+#define PORT_HDCP2_CTL(port)		_PORT_HDCP2_BASE(port, 0xB0)
+#define _TRANSA_HDCP2_CTL		0x664B0
+#define _TRANSB_HDCP2_CTL		0x665B0
+#define TRANS_HDCP2_CTL(trans)		_MMIO_TRANS(trans, _TRANSA_HDCP2_CTL, \
+						    _TRANSB_HDCP2_CTL)
 #define   CTL_LINK_ENCRYPTION_REQ	BIT(31)
-
-#define HDCP2_STATUS_DDI(port)		_PORT_HDCP2_BASE(port, 0xB4)
-#define   STREAM_ENCRYPTION_STATUS_A	BIT(31)
-#define   STREAM_ENCRYPTION_STATUS_B	BIT(30)
-#define   STREAM_ENCRYPTION_STATUS_C	BIT(29)
+#define HDCP2_CTL(dev_priv, trans, port) \
+					(INTEL_GEN(dev_priv) >= 12 ? \
+					 TRANS_HDCP2_CTL(trans) : \
+					 PORT_HDCP2_CTL(port))
+
+#define PORT_HDCP2_STATUS(port)		_PORT_HDCP2_BASE(port, 0xB4)
+#define _TRANSA_HDCP2_STATUS		0x664B4
+#define _TRANSB_HDCP2_STATUS		0x665B4
+#define TRANS_HDCP2_STATUS(trans)	_MMIO_TRANS(trans, \
+						    _TRANSA_HDCP2_STATUS, \
+						    _TRANSB_HDCP2_STATUS)
 #define   LINK_TYPE_STATUS		BIT(22)
 #define   LINK_AUTH_STATUS		BIT(21)
 #define   LINK_ENCRYPTION_STATUS	BIT(20)
+#define HDCP2_STATUS(dev_priv, trans, port) \
+					(INTEL_GEN(dev_priv) >= 12 ? \
+					 TRANS_HDCP2_STATUS(trans) : \
+					 PORT_HDCP2_STATUS(port))
 
 /* Per-pipe DDI Function Control */
 #define _TRANS_DDI_FUNC_CTL_A		0x60400
-- 
2.20.1

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

✗ Fi.CI.CHECKPATCH: warning for drm/i915: Enable HDCP 1.4 and 2.2 on Gen12+ (rev4)

[Patchwork]

== Series Details ==

Series: drm/i915: Enable HDCP 1.4 and 2.2 on Gen12+ (rev4)
URL   : https://patchwork.freedesktop.org/series/63432/
State : warning

== Summary ==

$ dim checkpatch origin/drm-tip
a1edb75d36db drm/i915: enum transcoder and pipe are moved into i915_drm.h
4dade0c7f121 misc/mei_hdcp: Adding the transcoder detail in payload input
24719ea54c4e drm/i915: Enable HDCP 1.4 and 2.2 on Gen12+
-:405: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#405: FILE: drivers/gpu/drm/i915/display/intel_hdcp.c:1864:
+void intel_hdcp_transcoder_config(struct intel_connector *connector,
+				 enum transcoder trans)

total: 0 errors, 0 warnings, 1 checks, 570 lines checked

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

✓ Fi.CI.BAT: success for drm/i915: Enable HDCP 1.4 and 2.2 on Gen12+ (rev4)

[Patchwork]

== Series Details ==

Series: drm/i915: Enable HDCP 1.4 and 2.2 on Gen12+ (rev4)
URL   : https://patchwork.freedesktop.org/series/63432/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_6743 -> Patchwork_14093
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14093/

Known issues
------------

  Here are the changes found in Patchwork_14093 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@kms_chamelium@dp-crc-fast:
    - fi-cml-u2:          [PASS][1] -> [FAIL][2] ([fdo#110627])
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6743/fi-cml-u2/igt@kms_chamelium@dp-crc-fast.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14093/fi-cml-u2/igt@kms_chamelium@dp-crc-fast.html

  * igt@kms_frontbuffer_tracking@basic:
    - fi-icl-u2:          [PASS][3] -> [FAIL][4] ([fdo#103167])
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6743/fi-icl-u2/igt@kms_frontbuffer_tracking@basic.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14093/fi-icl-u2/igt@kms_frontbuffer_tracking@basic.html

  
  [fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167
  [fdo#110627]: https://bugs.freedesktop.org/show_bug.cgi?id=110627


Participating hosts (50 -> 40)
------------------------------

  Missing    (10): fi-kbl-soraka fi-kbl-7567u fi-ilk-m540 fi-hsw-4200u fi-byt-j1900 fi-byt-squawks fi-bsw-cyan fi-icl-u3 fi-kbl-8809g fi-byt-clapper 


Build changes
-------------

  * CI: CI-20190529 -> None
  * Linux: CI_DRM_6743 -> Patchwork_14093

  CI-20190529: 20190529
  CI_DRM_6743: 398f53efe3d6a06633cd506d0209a69a91d0f287 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_5145: 50251bcb2e8783f86ebdd86ce38adc9e3777f82f @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_14093: 24719ea54c4e3b1d4553f0b12f569eaf1a3a9e3e @ git://anongit.freedesktop.org/gfx-ci/linux


== Linux commits ==

24719ea54c4e drm/i915: Enable HDCP 1.4 and 2.2 on Gen12+
4dade0c7f121 misc/mei_hdcp: Adding the transcoder detail in payload input
a1edb75d36db drm/i915: enum transcoder and pipe are moved into i915_drm.h

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14093/
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

✓ Fi.CI.IGT: success for drm/i915: Enable HDCP 1.4 and 2.2 on Gen12+ (rev4)

[Patchwork]

== Series Details ==

Series: drm/i915: Enable HDCP 1.4 and 2.2 on Gen12+ (rev4)
URL   : https://patchwork.freedesktop.org/series/63432/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_6743_full -> Patchwork_14093_full
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  

Known issues
------------

  Here are the changes found in Patchwork_14093_full that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@gem_exec_schedule@preempt-other-chain-bsd:
    - shard-iclb:         [PASS][1] -> [SKIP][2] ([fdo#111325]) +6 similar issues
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6743/shard-iclb8/igt@gem_exec_schedule@preempt-other-chain-bsd.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14093/shard-iclb4/igt@gem_exec_schedule@preempt-other-chain-bsd.html

  * igt@gem_exec_schedule@preempt-queue-bsd1:
    - shard-iclb:         [PASS][3] -> [SKIP][4] ([fdo#109276]) +15 similar issues
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6743/shard-iclb2/igt@gem_exec_schedule@preempt-queue-bsd1.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14093/shard-iclb7/igt@gem_exec_schedule@preempt-queue-bsd1.html

  * igt@gem_tiled_swapping@non-threaded:
    - shard-hsw:          [PASS][5] -> [FAIL][6] ([fdo#108686])
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6743/shard-hsw6/igt@gem_tiled_swapping@non-threaded.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14093/shard-hsw7/igt@gem_tiled_swapping@non-threaded.html

  * igt@kms_cursor_crc@pipe-c-cursor-suspend:
    - shard-apl:          [PASS][7] -> [DMESG-WARN][8] ([fdo#108566]) +3 similar issues
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6743/shard-apl2/igt@kms_cursor_crc@pipe-c-cursor-suspend.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14093/shard-apl7/igt@kms_cursor_crc@pipe-c-cursor-suspend.html

  * igt@kms_cursor_legacy@2x-long-cursor-vs-flip-atomic:
    - shard-hsw:          [PASS][9] -> [FAIL][10] ([fdo#105767])
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6743/shard-hsw2/igt@kms_cursor_legacy@2x-long-cursor-vs-flip-atomic.html
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14093/shard-hsw4/igt@kms_cursor_legacy@2x-long-cursor-vs-flip-atomic.html

  * igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-indfb-draw-blt:
    - shard-apl:          [PASS][11] -> [INCOMPLETE][12] ([fdo#103927]) +1 similar issue
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6743/shard-apl4/igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-indfb-draw-blt.html
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14093/shard-apl2/igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-indfb-draw-blt.html

  * igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-shrfb-draw-pwrite:
    - shard-iclb:         [PASS][13] -> [FAIL][14] ([fdo#103167]) +7 similar issues
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6743/shard-iclb3/igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-shrfb-draw-pwrite.html
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14093/shard-iclb7/igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-shrfb-draw-pwrite.html

  * igt@kms_frontbuffer_tracking@psr-1p-primscrn-spr-indfb-draw-pwrite:
    - shard-iclb:         [PASS][15] -> [INCOMPLETE][16] ([fdo#106978] / [fdo#107713])
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6743/shard-iclb2/igt@kms_frontbuffer_tracking@psr-1p-primscrn-spr-indfb-draw-pwrite.html
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14093/shard-iclb7/igt@kms_frontbuffer_tracking@psr-1p-primscrn-spr-indfb-draw-pwrite.html

  * igt@kms_plane_cursor@pipe-b-primary-size-64:
    - shard-iclb:         [PASS][17] -> [INCOMPLETE][18] ([fdo#107713])
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6743/shard-iclb1/igt@kms_plane_cursor@pipe-b-primary-size-64.html
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14093/shard-iclb1/igt@kms_plane_cursor@pipe-b-primary-size-64.html

  * igt@kms_plane_lowres@pipe-a-tiling-y:
    - shard-iclb:         [PASS][19] -> [FAIL][20] ([fdo#103166])
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6743/shard-iclb5/igt@kms_plane_lowres@pipe-a-tiling-y.html
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14093/shard-iclb7/igt@kms_plane_lowres@pipe-a-tiling-y.html

  * igt@kms_psr@psr2_cursor_blt:
    - shard-iclb:         [PASS][21] -> [SKIP][22] ([fdo#109441])
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6743/shard-iclb2/igt@kms_psr@psr2_cursor_blt.html
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14093/shard-iclb7/igt@kms_psr@psr2_cursor_blt.html

  
#### Possible fixes ####

  * igt@gem_exec_balancer@smoke:
    - shard-iclb:         [SKIP][23] ([fdo#110854]) -> [PASS][24]
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6743/shard-iclb7/igt@gem_exec_balancer@smoke.html
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14093/shard-iclb2/igt@gem_exec_balancer@smoke.html

  * igt@gem_exec_schedule@promotion-bsd:
    - shard-iclb:         [SKIP][25] ([fdo#111325]) -> [PASS][26]
   [25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6743/shard-iclb2/igt@gem_exec_schedule@promotion-bsd.html
   [26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14093/shard-iclb7/igt@gem_exec_schedule@promotion-bsd.html

  * igt@gem_softpin@noreloc-interruptible:
    - shard-skl:          [TIMEOUT][27] ([fdo#111439]) -> [PASS][28]
   [27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6743/shard-skl10/igt@gem_softpin@noreloc-interruptible.html
   [28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14093/shard-skl8/igt@gem_softpin@noreloc-interruptible.html

  * igt@gem_tiled_swapping@non-threaded:
    - shard-glk:          [DMESG-WARN][29] ([fdo#108686]) -> [PASS][30]
   [29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6743/shard-glk4/igt@gem_tiled_swapping@non-threaded.html
   [30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14093/shard-glk6/igt@gem_tiled_swapping@non-threaded.html

  * igt@i915_suspend@fence-restore-tiled2untiled:
    - shard-apl:          [DMESG-WARN][31] ([fdo#108566]) -> [PASS][32] +6 similar issues
   [31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6743/shard-apl3/igt@i915_suspend@fence-restore-tiled2untiled.html
   [32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14093/shard-apl8/igt@i915_suspend@fence-restore-tiled2untiled.html

  * igt@kms_cursor_crc@pipe-a-cursor-suspend:
    - shard-skl:          [INCOMPLETE][33] ([fdo#110741]) -> [PASS][34]
   [33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6743/shard-skl7/igt@kms_cursor_crc@pipe-a-cursor-suspend.html
   [34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14093/shard-skl6/igt@kms_cursor_crc@pipe-a-cursor-suspend.html

  * igt@kms_cursor_legacy@cursor-vs-flip-varying-size:
    - shard-apl:          [INCOMPLETE][35] ([fdo#103927]) -> [PASS][36] +2 similar issues
   [35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6743/shard-apl8/igt@kms_cursor_legacy@cursor-vs-flip-varying-size.html
   [36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14093/shard-apl1/igt@kms_cursor_legacy@cursor-vs-flip-varying-size.html

  * igt@kms_flip@flip-vs-expired-vblank-interruptible:
    - shard-skl:          [FAIL][37] ([fdo#105363]) -> [PASS][38]
   [37]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6743/shard-skl1/igt@kms_flip@flip-vs-expired-vblank-interruptible.html
   [38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14093/shard-skl7/igt@kms_flip@flip-vs-expired-vblank-interruptible.html

  * igt@kms_flip@flip-vs-suspend-interruptible:
    - shard-skl:          [INCOMPLETE][39] ([fdo#109507]) -> [PASS][40]
   [39]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6743/shard-skl7/igt@kms_flip@flip-vs-suspend-interruptible.html
   [40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14093/shard-skl6/igt@kms_flip@flip-vs-suspend-interruptible.html

  * igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-shrfb-draw-render:
    - shard-iclb:         [FAIL][41] ([fdo#103167]) -> [PASS][42]
   [41]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6743/shard-iclb2/igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-shrfb-draw-render.html
   [42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14093/shard-iclb7/igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-shrfb-draw-render.html

  * igt@kms_plane@pixel-format-pipe-c-planes-source-clamping:
    - shard-iclb:         [INCOMPLETE][43] ([fdo#107713] / [fdo#110036 ]) -> [PASS][44]
   [43]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6743/shard-iclb7/igt@kms_plane@pixel-format-pipe-c-planes-source-clamping.html
   [44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14093/shard-iclb2/igt@kms_plane@pixel-format-pipe-c-planes-source-clamping.html

  * igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min:
    - shard-skl:          [FAIL][45] ([fdo#108145]) -> [PASS][46]
   [45]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6743/shard-skl10/igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min.html
   [46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14093/shard-skl1/igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min.html

  * igt@kms_psr@no_drrs:
    - shard-iclb:         [FAIL][47] ([fdo#108341]) -> [PASS][48]
   [47]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6743/shard-iclb1/igt@kms_psr@no_drrs.html
   [48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14093/shard-iclb4/igt@kms_psr@no_drrs.html

  * igt@kms_psr@psr2_sprite_plane_move:
    - shard-iclb:         [SKIP][49] ([fdo#109441]) -> [PASS][50] +2 similar issues
   [49]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6743/shard-iclb7/igt@kms_psr@psr2_sprite_plane_move.html
   [50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14093/shard-iclb2/igt@kms_psr@psr2_sprite_plane_move.html

  * igt@kms_sequence@get-idle:
    - shard-hsw:          [INCOMPLETE][51] ([fdo#103540]) -> [PASS][52]
   [51]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6743/shard-hsw8/igt@kms_sequence@get-idle.html
   [52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14093/shard-hsw2/igt@kms_sequence@get-idle.html

  * igt@kms_setmode@basic:
    - shard-glk:          [FAIL][53] ([fdo#99912]) -> [PASS][54]
   [53]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6743/shard-glk2/igt@kms_setmode@basic.html
   [54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14093/shard-glk2/igt@kms_setmode@basic.html

  * igt@perf@blocking:
    - shard-skl:          [FAIL][55] ([fdo#110728]) -> [PASS][56]
   [55]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6743/shard-skl1/igt@perf@blocking.html
   [56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14093/shard-skl7/igt@perf@blocking.html

  * igt@perf@short-reads:
    - shard-kbl:          [FAIL][57] ([fdo#103183]) -> [PASS][58]
   [57]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6743/shard-kbl4/igt@perf@short-reads.html
   [58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14093/shard-kbl4/igt@perf@short-reads.html

  * igt@prime_busy@hang-bsd2:
    - shard-iclb:         [SKIP][59] ([fdo#109276]) -> [PASS][60] +15 similar issues
   [59]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6743/shard-iclb5/igt@prime_busy@hang-bsd2.html
   [60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14093/shard-iclb2/igt@prime_busy@hang-bsd2.html

  
#### Warnings ####

  * igt@gem_ctx_isolation@vcs1-nonpriv:
    - shard-iclb:         [SKIP][61] ([fdo#109276]) -> [FAIL][62] ([fdo#111329])
   [61]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6743/shard-iclb7/igt@gem_ctx_isolation@vcs1-nonpriv.html
   [62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14093/shard-iclb2/igt@gem_ctx_isolation@vcs1-nonpriv.html

  * igt@gem_mocs_settings@mocs-reset-bsd2:
    - shard-iclb:         [SKIP][63] ([fdo#109276]) -> [FAIL][64] ([fdo#111330])
   [63]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6743/shard-iclb7/igt@gem_mocs_settings@mocs-reset-bsd2.html
   [64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14093/shard-iclb4/igt@gem_mocs_settings@mocs-reset-bsd2.html

  * igt@gem_mocs_settings@mocs-settings-bsd2:
    - shard-iclb:         [FAIL][65] ([fdo#111330]) -> [SKIP][66] ([fdo#109276])
   [65]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6743/shard-iclb2/igt@gem_mocs_settings@mocs-settings-bsd2.html
   [66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14093/shard-iclb3/igt@gem_mocs_settings@mocs-settings-bsd2.html

  
  [fdo#103166]: https://bugs.freedesktop.org/show_bug.cgi?id=103166
  [fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167
  [fdo#103183]: https://bugs.freedesktop.org/show_bug.cgi?id=103183
  [fdo#103540]: https://bugs.freedesktop.org/show_bug.cgi?id=103540
  [fdo#103927]: https://bugs.freedesktop.org/show_bug.cgi?id=103927
  [fdo#105363]: https://bugs.freedesktop.org/show_bug.cgi?id=105363
  [fdo#105767]: https://bugs.freedesktop.org/show_bug.cgi?id=105767
  [fdo#106978]: https://bugs.freedesktop.org/show_bug.cgi?id=106978
  [fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713
  [fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145
  [fdo#108341]: https://bugs.freedesktop.org/show_bug.cgi?id=108341
  [fdo#108566]: https://bugs.freedesktop.org/show_bug.cgi?id=108566
  [fdo#108686]: https://bugs.freedesktop.org/show_bug.cgi?id=108686
  [fdo#109276]: https://bugs.freedesktop.org/show_bug.cgi?id=109276
  [fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441
  [fdo#109507]: https://bugs.freedesktop.org/show_bug.cgi?id=109507
  [fdo#110036 ]: https://bugs.freedesktop.org/show_bug.cgi?id=110036 
  [fdo#110728]: https://bugs.freedesktop.org/show_bug.cgi?id=110728
  [fdo#110741]: https://bugs.freedesktop.org/show_bug.cgi?id=110741
  [fdo#110854]: https://bugs.freedesktop.org/show_bug.cgi?id=110854
  [fdo#111325]: https://bugs.freedesktop.org/show_bug.cgi?id=111325
  [fdo#111329]: https://bugs.freedesktop.org/show_bug.cgi?id=111329
  [fdo#111330]: https://bugs.freedesktop.org/show_bug.cgi?id=111330
  [fdo#111439]: https://bugs.freedesktop.org/show_bug.cgi?id=111439
  [fdo#99912]: https://bugs.freedesktop.org/show_bug.cgi?id=99912


Participating hosts (10 -> 10)
------------------------------

  No changes in participating hosts


Build changes
-------------

  * CI: CI-20190529 -> None
  * Linux: CI_DRM_6743 -> Patchwork_14093

  CI-20190529: 20190529
  CI_DRM_6743: 398f53efe3d6a06633cd506d0209a69a91d0f287 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_5145: 50251bcb2e8783f86ebdd86ce38adc9e3777f82f @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_14093: 24719ea54c4e3b1d4553f0b12f569eaf1a3a9e3e @ git://anongit.freedesktop.org/gfx-ci/linux
  piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14093/
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

[PATCH v6 0/3] drm/i915: Enable HDCP 1.4 and 2.2 on Gen12+

[Ramalingam C]

Enabling the HDCP1.4 and 2.2 on TGL by supporting the HW block movement
from DDI into transcoder.

v6:
  Extending the I915-MEI HDCP interface to include the transcoder.
  For register programming, transcoder is used instead of PIPE. Just
	readability improvement
  pipe and transcoder definition is moved into i915_drm.h

Ramalingam C (3):
  drm/i915: enum transcoder and pipe are moved into i915_drm.h
  misc/mei_hdcp: Adding the transcoder detail in payload input
  drm/i915: Enable HDCP 1.4 and 2.2 on Gen12+

 drivers/gpu/drm/i915/display/intel_display.h |  44 -----
 drivers/gpu/drm/i915/display/intel_dp.c      |   3 +
 drivers/gpu/drm/i915/display/intel_hdcp.c    | 160 +++++++++++++------
 drivers/gpu/drm/i915/display/intel_hdcp.h    |   2 +
 drivers/gpu/drm/i915/display/intel_hdmi.c    |  12 +-
 drivers/gpu/drm/i915/i915_reg.h              | 124 ++++++++++++--
 drivers/misc/mei/hdcp/mei_hdcp.c             |  27 ++++
 drivers/misc/mei/hdcp/mei_hdcp.h             |  15 +-
 include/drm/i915_drm.h                       |  46 ++++++
 include/drm/i915_mei_hdcp_interface.h        |   2 +
 10 files changed, 326 insertions(+), 109 deletions(-)

-- 
2.20.1

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

[PATCH v6 2/3] misc/mei_hdcp: Adding the transcoder detail in payload input

[Ramalingam C]

ME FW takes the transcoder details for Gen12+ platforms, as HDCP HW
block is moved to transcoders.

hdcp_port_data is extended with enum transcoder. Payload structure is
modified and populated from the hdcp_port_data.

Signed-off-by: Ramalingam C <ramalingam.c@intel.com>
---
 drivers/misc/mei/hdcp/mei_hdcp.c      | 27 +++++++++++++++++++++++++++
 drivers/misc/mei/hdcp/mei_hdcp.h      | 15 ++++++++++++++-
 include/drm/i915_mei_hdcp_interface.h |  2 ++
 3 files changed, 43 insertions(+), 1 deletion(-)

diff --git a/drivers/misc/mei/hdcp/mei_hdcp.c b/drivers/misc/mei/hdcp/mei_hdcp.c
index c681f6fab342..7efe3b65a986 100644
--- a/drivers/misc/mei/hdcp/mei_hdcp.c
+++ b/drivers/misc/mei/hdcp/mei_hdcp.c
@@ -39,6 +39,22 @@ static inline u8 mei_get_ddi_index(enum port port)
 	}
 }
 
+static inline u8 mei_get_tc_type(enum transcoder tc)
+{
+	switch (tc) {
+	case TRANSCODER_A ... TRANSCODER_D:
+		return (u8)(tc | 0x10);
+	case TRANSCODER_EDP:
+		return TC_EDP;
+	case TRANSCODER_DSI_0:
+		return TC_DSI0;
+	case TRANSCODER_DSI_1:
+		return TC_DSI1;
+	default:
+		return MEI_INVALID_TRANSCODER;
+	}
+}
+
 /**
  * mei_hdcp_initiate_session() - Initiate a Wired HDCP2.2 Tx Session in ME FW
  * @dev: device corresponding to the mei_cl_device
@@ -70,6 +86,7 @@ mei_hdcp_initiate_session(struct device *dev, struct hdcp_port_data *data,
 
 	session_init_in.port.integrated_port_type = data->port_type;
 	session_init_in.port.physical_port = mei_get_ddi_index(data->port);
+	session_init_in.port.attached_transcoder = mei_get_tc_type(data->tc);
 	session_init_in.protocol = data->protocol;
 
 	byte = mei_cldev_send(cldev, (u8 *)&session_init_in,
@@ -139,6 +156,7 @@ mei_hdcp_verify_receiver_cert_prepare_km(struct device *dev,
 
 	verify_rxcert_in.port.integrated_port_type = data->port_type;
 	verify_rxcert_in.port.physical_port = mei_get_ddi_index(data->port);
+	verify_rxcert_in.port.attached_transcoder = mei_get_tc_type(data->tc);
 
 	verify_rxcert_in.cert_rx = rx_cert->cert_rx;
 	memcpy(verify_rxcert_in.r_rx, &rx_cert->r_rx, HDCP_2_2_RRX_LEN);
@@ -209,6 +227,7 @@ mei_hdcp_verify_hprime(struct device *dev, struct hdcp_port_data *data,
 
 	send_hprime_in.port.integrated_port_type = data->port_type;
 	send_hprime_in.port.physical_port = mei_get_ddi_index(data->port);
+	send_hprime_in.port.attached_transcoder = mei_get_tc_type(data->tc);
 
 	memcpy(send_hprime_in.h_prime, rx_hprime->h_prime,
 	       HDCP_2_2_H_PRIME_LEN);
@@ -266,6 +285,7 @@ mei_hdcp_store_pairing_info(struct device *dev, struct hdcp_port_data *data,
 
 	pairing_info_in.port.integrated_port_type = data->port_type;
 	pairing_info_in.port.physical_port = mei_get_ddi_index(data->port);
+	pairing_info_in.port.attached_transcoder = mei_get_tc_type(data->tc);
 
 	memcpy(pairing_info_in.e_kh_km, pairing_info->e_kh_km,
 	       HDCP_2_2_E_KH_KM_LEN);
@@ -324,6 +344,7 @@ mei_hdcp_initiate_locality_check(struct device *dev,
 
 	lc_init_in.port.integrated_port_type = data->port_type;
 	lc_init_in.port.physical_port = mei_get_ddi_index(data->port);
+	lc_init_in.port.attached_transcoder = mei_get_tc_type(data->tc);
 
 	byte = mei_cldev_send(cldev, (u8 *)&lc_init_in, sizeof(lc_init_in));
 	if (byte < 0) {
@@ -379,6 +400,7 @@ mei_hdcp_verify_lprime(struct device *dev, struct hdcp_port_data *data,
 
 	verify_lprime_in.port.integrated_port_type = data->port_type;
 	verify_lprime_in.port.physical_port = mei_get_ddi_index(data->port);
+	verify_lprime_in.port.attached_transcoder = mei_get_tc_type(data->tc);
 
 	memcpy(verify_lprime_in.l_prime, rx_lprime->l_prime,
 	       HDCP_2_2_L_PRIME_LEN);
@@ -436,6 +458,7 @@ static int mei_hdcp_get_session_key(struct device *dev,
 
 	get_skey_in.port.integrated_port_type = data->port_type;
 	get_skey_in.port.physical_port = mei_get_ddi_index(data->port);
+	get_skey_in.port.attached_transcoder = mei_get_tc_type(data->tc);
 
 	byte = mei_cldev_send(cldev, (u8 *)&get_skey_in, sizeof(get_skey_in));
 	if (byte < 0) {
@@ -500,6 +523,7 @@ mei_hdcp_repeater_check_flow_prepare_ack(struct device *dev,
 
 	verify_repeater_in.port.integrated_port_type = data->port_type;
 	verify_repeater_in.port.physical_port = mei_get_ddi_index(data->port);
+	verify_repeater_in.port.attached_transcoder = mei_get_tc_type(data->tc);
 
 	memcpy(verify_repeater_in.rx_info, rep_topology->rx_info,
 	       HDCP_2_2_RXINFO_LEN);
@@ -570,6 +594,7 @@ static int mei_hdcp_verify_mprime(struct device *dev,
 
 	verify_mprime_in.port.integrated_port_type = data->port_type;
 	verify_mprime_in.port.physical_port = mei_get_ddi_index(data->port);
+	verify_mprime_in.port.attached_transcoder = mei_get_tc_type(data->tc);
 
 	memcpy(verify_mprime_in.m_prime, stream_ready->m_prime,
 	       HDCP_2_2_MPRIME_LEN);
@@ -631,6 +656,7 @@ static int mei_hdcp_enable_authentication(struct device *dev,
 
 	enable_auth_in.port.integrated_port_type = data->port_type;
 	enable_auth_in.port.physical_port = mei_get_ddi_index(data->port);
+	enable_auth_in.port.attached_transcoder = mei_get_tc_type(data->tc);
 	enable_auth_in.stream_type = data->streams[0].stream_type;
 
 	byte = mei_cldev_send(cldev, (u8 *)&enable_auth_in,
@@ -685,6 +711,7 @@ mei_hdcp_close_session(struct device *dev, struct hdcp_port_data *data)
 
 	session_close_in.port.integrated_port_type = data->port_type;
 	session_close_in.port.physical_port = mei_get_ddi_index(data->port);
+	session_close_in.port.attached_transcoder = mei_get_tc_type(data->tc);
 
 	byte = mei_cldev_send(cldev, (u8 *)&session_close_in,
 			      sizeof(session_close_in));
diff --git a/drivers/misc/mei/hdcp/mei_hdcp.h b/drivers/misc/mei/hdcp/mei_hdcp.h
index e4b1cd54c853..89e2f99ff60a 100644
--- a/drivers/misc/mei/hdcp/mei_hdcp.h
+++ b/drivers/misc/mei/hdcp/mei_hdcp.h
@@ -184,8 +184,10 @@ struct hdcp_cmd_no_data {
 /* Uniquely identifies the hdcp port being addressed for a given command. */
 struct hdcp_port_id {
 	u8	integrated_port_type;
+	/* Used until Gen11.5. Must be zero for Gen11.5+ */
 	u8	physical_port;
-	u16	reserved;
+	u8	attached_transcoder;
+	u8	reserved;
 } __packed;
 
 /*
@@ -374,4 +376,15 @@ enum mei_fw_ddi {
 	MEI_DDI_A = 7,
 	MEI_DDI_RANGE_END = MEI_DDI_A,
 };
+
+enum mei_fw_tc {
+	MEI_INVALID_TRANSCODER = 0x00,	// Invalid transcoder type
+	TC_EDP,				// Transcoder for eDP
+	TC_DSI0,			// Transcoder for DSI0
+	TC_DSI1,			// Transcoder for DSI1
+	TC_A = 0x10,			// Transcoder TCA
+	TC_B,				// Transcoder TCB
+	TC_C,				// Transcoder TCC
+	TC_D				// Transcoder TCD
+};
 #endif /* __MEI_HDCP_H__ */
diff --git a/include/drm/i915_mei_hdcp_interface.h b/include/drm/i915_mei_hdcp_interface.h
index 8c344255146a..dc0de63ce0cb 100644
--- a/include/drm/i915_mei_hdcp_interface.h
+++ b/include/drm/i915_mei_hdcp_interface.h
@@ -45,6 +45,7 @@ enum hdcp_wired_protocol {
 /**
  * struct hdcp_port_data - intel specific HDCP port data
  * @port: port index as per I915
+ * @tc: transcoder index as per I915
  * @port_type: HDCP port type as per ME FW classification
  * @protocol: HDCP adaptation as per ME FW
  * @k: No of streams transmitted on a port. Only on DP MST this is != 1
@@ -57,6 +58,7 @@ enum hdcp_wired_protocol {
  */
 struct hdcp_port_data {
 	enum port port;
+	enum transcoder tc;
 	u8 port_type;
 	u8 protocol;
 	u16 k;
-- 
2.20.1

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx