[PATCH 1/5] drm/i915/dp: stylistic cleanup around hdcp2_msg_data

[PATCH 1/5] drm/i915/dp: stylistic cleanup around hdcp2_msg_data

[Jani Nikula]

Split struct declaration and array definition. Fix indents and
whitespace. No functional changes.

Cc: Ramalingam C <ramalingam.c@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/i915/display/intel_dp.c | 70 +++++++++++++------------
 1 file changed, 36 insertions(+), 34 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index 5c45a3bb102d..001d520660a9 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -5812,47 +5812,49 @@ struct hdcp2_dp_errata_stream_type {
 	u8	stream_type;
 } __packed;
 
-static struct hdcp2_dp_msg_data {
+struct hdcp2_dp_msg_data {
 	u8 msg_id;
 	u32 offset;
 	bool msg_detectable;
 	u32 timeout;
 	u32 timeout2; /* Added for non_paired situation */
-	} hdcp2_msg_data[] = {
-		{HDCP_2_2_AKE_INIT, DP_HDCP_2_2_AKE_INIT_OFFSET, false, 0, 0},
-		{HDCP_2_2_AKE_SEND_CERT, DP_HDCP_2_2_AKE_SEND_CERT_OFFSET,
-				false, HDCP_2_2_CERT_TIMEOUT_MS, 0},
-		{HDCP_2_2_AKE_NO_STORED_KM, DP_HDCP_2_2_AKE_NO_STORED_KM_OFFSET,
-				false, 0, 0},
-		{HDCP_2_2_AKE_STORED_KM, DP_HDCP_2_2_AKE_STORED_KM_OFFSET,
-				false, 0, 0},
-		{HDCP_2_2_AKE_SEND_HPRIME, DP_HDCP_2_2_AKE_SEND_HPRIME_OFFSET,
-				true, HDCP_2_2_HPRIME_PAIRED_TIMEOUT_MS,
-				HDCP_2_2_HPRIME_NO_PAIRED_TIMEOUT_MS},
-		{HDCP_2_2_AKE_SEND_PAIRING_INFO,
-				DP_HDCP_2_2_AKE_SEND_PAIRING_INFO_OFFSET, true,
-				HDCP_2_2_PAIRING_TIMEOUT_MS, 0},
-		{HDCP_2_2_LC_INIT, DP_HDCP_2_2_LC_INIT_OFFSET, false, 0, 0},
-		{HDCP_2_2_LC_SEND_LPRIME, DP_HDCP_2_2_LC_SEND_LPRIME_OFFSET,
-				false, HDCP_2_2_DP_LPRIME_TIMEOUT_MS, 0},
-		{HDCP_2_2_SKE_SEND_EKS, DP_HDCP_2_2_SKE_SEND_EKS_OFFSET, false,
-				0, 0},
-		{HDCP_2_2_REP_SEND_RECVID_LIST,
-				DP_HDCP_2_2_REP_SEND_RECVID_LIST_OFFSET, true,
-				HDCP_2_2_RECVID_LIST_TIMEOUT_MS, 0},
-		{HDCP_2_2_REP_SEND_ACK, DP_HDCP_2_2_REP_SEND_ACK_OFFSET, false,
-				0, 0},
-		{HDCP_2_2_REP_STREAM_MANAGE,
-				DP_HDCP_2_2_REP_STREAM_MANAGE_OFFSET, false,
-				0, 0},
-		{HDCP_2_2_REP_STREAM_READY, DP_HDCP_2_2_REP_STREAM_READY_OFFSET,
-				false, HDCP_2_2_STREAM_READY_TIMEOUT_MS, 0},
+};
+
+static struct hdcp2_dp_msg_data hdcp2_msg_data[] = {
+	{ HDCP_2_2_AKE_INIT, DP_HDCP_2_2_AKE_INIT_OFFSET, false, 0, 0 },
+	{ HDCP_2_2_AKE_SEND_CERT, DP_HDCP_2_2_AKE_SEND_CERT_OFFSET,
+	  false, HDCP_2_2_CERT_TIMEOUT_MS, 0 },
+	{ HDCP_2_2_AKE_NO_STORED_KM, DP_HDCP_2_2_AKE_NO_STORED_KM_OFFSET,
+	  false, 0, 0 },
+	{ HDCP_2_2_AKE_STORED_KM, DP_HDCP_2_2_AKE_STORED_KM_OFFSET,
+	  false, 0, 0 },
+	{ HDCP_2_2_AKE_SEND_HPRIME, DP_HDCP_2_2_AKE_SEND_HPRIME_OFFSET,
+	  true, HDCP_2_2_HPRIME_PAIRED_TIMEOUT_MS,
+	  HDCP_2_2_HPRIME_NO_PAIRED_TIMEOUT_MS },
+	{ HDCP_2_2_AKE_SEND_PAIRING_INFO,
+	  DP_HDCP_2_2_AKE_SEND_PAIRING_INFO_OFFSET, true,
+	  HDCP_2_2_PAIRING_TIMEOUT_MS, 0 },
+	{ HDCP_2_2_LC_INIT, DP_HDCP_2_2_LC_INIT_OFFSET, false, 0, 0 },
+	{ HDCP_2_2_LC_SEND_LPRIME, DP_HDCP_2_2_LC_SEND_LPRIME_OFFSET,
+	  false, HDCP_2_2_DP_LPRIME_TIMEOUT_MS, 0 },
+	{ HDCP_2_2_SKE_SEND_EKS, DP_HDCP_2_2_SKE_SEND_EKS_OFFSET, false,
+	  0, 0 },
+	{ HDCP_2_2_REP_SEND_RECVID_LIST,
+	  DP_HDCP_2_2_REP_SEND_RECVID_LIST_OFFSET, true,
+	  HDCP_2_2_RECVID_LIST_TIMEOUT_MS, 0 },
+	{ HDCP_2_2_REP_SEND_ACK, DP_HDCP_2_2_REP_SEND_ACK_OFFSET, false,
+	  0, 0 },
+	{ HDCP_2_2_REP_STREAM_MANAGE,
+	  DP_HDCP_2_2_REP_STREAM_MANAGE_OFFSET, false,
+	  0, 0 },
+	{ HDCP_2_2_REP_STREAM_READY, DP_HDCP_2_2_REP_STREAM_READY_OFFSET,
+	  false, HDCP_2_2_STREAM_READY_TIMEOUT_MS, 0 },
 /* local define to shovel this through the write_2_2 interface */
 #define HDCP_2_2_ERRATA_DP_STREAM_TYPE	50
-		{HDCP_2_2_ERRATA_DP_STREAM_TYPE,
-				DP_HDCP_2_2_REG_STREAM_TYPE_OFFSET, false,
-				0, 0},
-		};
+	{ HDCP_2_2_ERRATA_DP_STREAM_TYPE,
+	  DP_HDCP_2_2_REG_STREAM_TYPE_OFFSET, false,
+	  0, 0 },
+};
 
 static inline
 int intel_dp_hdcp2_read_rx_status(struct intel_digital_port *intel_dig_port,
-- 
2.20.1

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[PATCH 2/5] drm/i915/dp: avoid shadowing variables

[Jani Nikula]

Everything seems to be all right, but shadowing is to be avoided.

Cc: Ramalingam C <ramalingam.c@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/i915/display/intel_dp.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index 001d520660a9..0d8a8c47296b 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -5820,7 +5820,7 @@ struct hdcp2_dp_msg_data {
 	u32 timeout2; /* Added for non_paired situation */
 };
 
-static struct hdcp2_dp_msg_data hdcp2_msg_data[] = {
+static struct hdcp2_dp_msg_data hdcp2_dp_msg_data[] = {
 	{ HDCP_2_2_AKE_INIT, DP_HDCP_2_2_AKE_INIT_OFFSET, false, 0, 0 },
 	{ HDCP_2_2_AKE_SEND_CERT, DP_HDCP_2_2_AKE_SEND_CERT_OFFSET,
 	  false, HDCP_2_2_CERT_TIMEOUT_MS, 0 },
@@ -5951,9 +5951,9 @@ static struct hdcp2_dp_msg_data *get_hdcp2_dp_msg_data(u8 msg_id)
 {
 	int i;
 
-	for (i = 0; i < ARRAY_SIZE(hdcp2_msg_data); i++)
-		if (hdcp2_msg_data[i].msg_id == msg_id)
-			return &hdcp2_msg_data[i];
+	for (i = 0; i < ARRAY_SIZE(hdcp2_dp_msg_data); i++)
+		if (hdcp2_dp_msg_data[i].msg_id == msg_id)
+			return &hdcp2_dp_msg_data[i];
 
 	return NULL;
 }
-- 
2.20.1

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[PATCH 3/5] drm/i915/dp: make hdcp2_dp_msg_data const

[Jani Nikula]

It's static const data, make it so.

Cc: Ramalingam C <ramalingam.c@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/i915/display/intel_dp.c | 10 +++++-----
 1 file changed, 5 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index 0d8a8c47296b..921ad0a2f7ba 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -5820,7 +5820,7 @@ struct hdcp2_dp_msg_data {
 	u32 timeout2; /* Added for non_paired situation */
 };
 
-static struct hdcp2_dp_msg_data hdcp2_dp_msg_data[] = {
+static const struct hdcp2_dp_msg_data hdcp2_dp_msg_data[] = {
 	{ HDCP_2_2_AKE_INIT, DP_HDCP_2_2_AKE_INIT_OFFSET, false, 0, 0 },
 	{ HDCP_2_2_AKE_SEND_CERT, DP_HDCP_2_2_AKE_SEND_CERT_OFFSET,
 	  false, HDCP_2_2_CERT_TIMEOUT_MS, 0 },
@@ -5908,7 +5908,7 @@ int hdcp2_detect_msg_availability(struct intel_digital_port *intel_dig_port,
 
 static ssize_t
 intel_dp_hdcp2_wait_for_msg(struct intel_digital_port *intel_dig_port,
-			    struct hdcp2_dp_msg_data *hdcp2_msg_data)
+			    const struct hdcp2_dp_msg_data *hdcp2_msg_data)
 {
 	struct intel_dp *dp = &intel_dig_port->dp;
 	struct intel_hdcp *hdcp = &dp->attached_connector->hdcp;
@@ -5947,7 +5947,7 @@ intel_dp_hdcp2_wait_for_msg(struct intel_digital_port *intel_dig_port,
 	return ret;
 }
 
-static struct hdcp2_dp_msg_data *get_hdcp2_dp_msg_data(u8 msg_id)
+static const struct hdcp2_dp_msg_data *get_hdcp2_dp_msg_data(u8 msg_id)
 {
 	int i;
 
@@ -5967,7 +5967,7 @@ int intel_dp_hdcp2_write_msg(struct intel_digital_port *intel_dig_port,
 	unsigned int offset;
 	u8 *byte = buf;
 	ssize_t ret, bytes_to_write, len;
-	struct hdcp2_dp_msg_data *hdcp2_msg_data;
+	const struct hdcp2_dp_msg_data *hdcp2_msg_data;
 
 	hdcp2_msg_data = get_hdcp2_dp_msg_data(*byte);
 	if (!hdcp2_msg_data)
@@ -6031,7 +6031,7 @@ int intel_dp_hdcp2_read_msg(struct intel_digital_port *intel_dig_port,
 	unsigned int offset;
 	u8 *byte = buf;
 	ssize_t ret, bytes_to_recv, len;
-	struct hdcp2_dp_msg_data *hdcp2_msg_data;
+	const struct hdcp2_dp_msg_data *hdcp2_msg_data;
 
 	hdcp2_msg_data = get_hdcp2_dp_msg_data(msg_id);
 	if (!hdcp2_msg_data)
-- 
2.20.1

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[PATCH 4/5] drm/i915/hdmi: stylistic cleanup around hdcp2_msg_data

[Jani Nikula]

Split struct declaration and array definition. Fix indents and
whitespace. No functional changes.

Cc: Ramalingam C <ramalingam.c@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/i915/display/intel_hdmi.c | 39 +++++++++++------------
 1 file changed, 19 insertions(+), 20 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.c b/drivers/gpu/drm/i915/display/intel_hdmi.c
index b1ca8e5bdb56..d30c8314eaaf 100644
--- a/drivers/gpu/drm/i915/display/intel_hdmi.c
+++ b/drivers/gpu/drm/i915/display/intel_hdmi.c
@@ -1514,29 +1514,28 @@ bool intel_hdmi_hdcp_check_link(struct intel_digital_port *intel_dig_port)
 	return true;
 }
 
-static struct hdcp2_hdmi_msg_data {
+struct hdcp2_hdmi_msg_data {
 	u8 msg_id;
 	u32 timeout;
 	u32 timeout2;
-	} hdcp2_msg_data[] = {
-		{HDCP_2_2_AKE_INIT, 0, 0},
-		{HDCP_2_2_AKE_SEND_CERT, HDCP_2_2_CERT_TIMEOUT_MS, 0},
-		{HDCP_2_2_AKE_NO_STORED_KM, 0, 0},
-		{HDCP_2_2_AKE_STORED_KM, 0, 0},
-		{HDCP_2_2_AKE_SEND_HPRIME, HDCP_2_2_HPRIME_PAIRED_TIMEOUT_MS,
-				HDCP_2_2_HPRIME_NO_PAIRED_TIMEOUT_MS},
-		{HDCP_2_2_AKE_SEND_PAIRING_INFO, HDCP_2_2_PAIRING_TIMEOUT_MS,
-				0},
-		{HDCP_2_2_LC_INIT, 0, 0},
-		{HDCP_2_2_LC_SEND_LPRIME, HDCP_2_2_HDMI_LPRIME_TIMEOUT_MS, 0},
-		{HDCP_2_2_SKE_SEND_EKS, 0, 0},
-		{HDCP_2_2_REP_SEND_RECVID_LIST,
-				HDCP_2_2_RECVID_LIST_TIMEOUT_MS, 0},
-		{HDCP_2_2_REP_SEND_ACK, 0, 0},
-		{HDCP_2_2_REP_STREAM_MANAGE, 0, 0},
-		{HDCP_2_2_REP_STREAM_READY, HDCP_2_2_STREAM_READY_TIMEOUT_MS,
-				0},
-	};
+};
+
+static struct hdcp2_hdmi_msg_data hdcp2_msg_data[] = {
+	{ HDCP_2_2_AKE_INIT, 0, 0 },
+	{ HDCP_2_2_AKE_SEND_CERT, HDCP_2_2_CERT_TIMEOUT_MS, 0 },
+	{ HDCP_2_2_AKE_NO_STORED_KM, 0, 0 },
+	{ HDCP_2_2_AKE_STORED_KM, 0, 0 },
+	{ HDCP_2_2_AKE_SEND_HPRIME, HDCP_2_2_HPRIME_PAIRED_TIMEOUT_MS,
+	  HDCP_2_2_HPRIME_NO_PAIRED_TIMEOUT_MS },
+	{ HDCP_2_2_AKE_SEND_PAIRING_INFO, HDCP_2_2_PAIRING_TIMEOUT_MS, 0 },
+	{ HDCP_2_2_LC_INIT, 0, 0 },
+	{ HDCP_2_2_LC_SEND_LPRIME, HDCP_2_2_HDMI_LPRIME_TIMEOUT_MS, 0 },
+	{ HDCP_2_2_SKE_SEND_EKS, 0, 0 },
+	{ HDCP_2_2_REP_SEND_RECVID_LIST, HDCP_2_2_RECVID_LIST_TIMEOUT_MS, 0 },
+	{ HDCP_2_2_REP_SEND_ACK, 0, 0 },
+	{ HDCP_2_2_REP_STREAM_MANAGE, 0, 0 },
+	{ HDCP_2_2_REP_STREAM_READY, HDCP_2_2_STREAM_READY_TIMEOUT_MS, 0 },
+};
 
 static
 int intel_hdmi_hdcp2_read_rx_status(struct intel_digital_port *intel_dig_port,
-- 
2.20.1

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[PATCH 5/5] drm/i915/hdmi: make hdcp2_msg_data const

[Jani Nikula]

It's static const data, make it so.

Cc: Ramalingam C <ramalingam.c@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/i915/display/intel_hdmi.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.c b/drivers/gpu/drm/i915/display/intel_hdmi.c
index d30c8314eaaf..e02f0faecf02 100644
--- a/drivers/gpu/drm/i915/display/intel_hdmi.c
+++ b/drivers/gpu/drm/i915/display/intel_hdmi.c
@@ -1520,7 +1520,7 @@ struct hdcp2_hdmi_msg_data {
 	u32 timeout2;
 };
 
-static struct hdcp2_hdmi_msg_data hdcp2_msg_data[] = {
+static const struct hdcp2_hdmi_msg_data hdcp2_msg_data[] = {
 	{ HDCP_2_2_AKE_INIT, 0, 0 },
 	{ HDCP_2_2_AKE_SEND_CERT, HDCP_2_2_CERT_TIMEOUT_MS, 0 },
 	{ HDCP_2_2_AKE_NO_STORED_KM, 0, 0 },
-- 
2.20.1

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Re: [PATCH 1/5] drm/i915/dp: stylistic cleanup around hdcp2_msg_data

[Ville Syrjälä]

On Tue, Aug 20, 2019 at 04:40:15PM +0300, Jani Nikula wrote:
> Split struct declaration and array definition. Fix indents and
> whitespace. No functional changes.
> 
> Cc: Ramalingam C <ramalingam.c@intel.com>
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_dp.c | 70 +++++++++++++------------
>  1 file changed, 36 insertions(+), 34 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
> index 5c45a3bb102d..001d520660a9 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -5812,47 +5812,49 @@ struct hdcp2_dp_errata_stream_type {
>  	u8	stream_type;
>  } __packed;
>  
> -static struct hdcp2_dp_msg_data {
> +struct hdcp2_dp_msg_data {
>  	u8 msg_id;
>  	u32 offset;
>  	bool msg_detectable;
>  	u32 timeout;
>  	u32 timeout2; /* Added for non_paired situation */

Looks a bit poorly packed. Also u32 seems overkill for the timeouts.

> -	} hdcp2_msg_data[] = {
> -		{HDCP_2_2_AKE_INIT, DP_HDCP_2_2_AKE_INIT_OFFSET, false, 0, 0},
> -		{HDCP_2_2_AKE_SEND_CERT, DP_HDCP_2_2_AKE_SEND_CERT_OFFSET,
> -				false, HDCP_2_2_CERT_TIMEOUT_MS, 0},
> -		{HDCP_2_2_AKE_NO_STORED_KM, DP_HDCP_2_2_AKE_NO_STORED_KM_OFFSET,
> -				false, 0, 0},
> -		{HDCP_2_2_AKE_STORED_KM, DP_HDCP_2_2_AKE_STORED_KM_OFFSET,
> -				false, 0, 0},
> -		{HDCP_2_2_AKE_SEND_HPRIME, DP_HDCP_2_2_AKE_SEND_HPRIME_OFFSET,
> -				true, HDCP_2_2_HPRIME_PAIRED_TIMEOUT_MS,
> -				HDCP_2_2_HPRIME_NO_PAIRED_TIMEOUT_MS},
> -		{HDCP_2_2_AKE_SEND_PAIRING_INFO,
> -				DP_HDCP_2_2_AKE_SEND_PAIRING_INFO_OFFSET, true,
> -				HDCP_2_2_PAIRING_TIMEOUT_MS, 0},
> -		{HDCP_2_2_LC_INIT, DP_HDCP_2_2_LC_INIT_OFFSET, false, 0, 0},
> -		{HDCP_2_2_LC_SEND_LPRIME, DP_HDCP_2_2_LC_SEND_LPRIME_OFFSET,
> -				false, HDCP_2_2_DP_LPRIME_TIMEOUT_MS, 0},
> -		{HDCP_2_2_SKE_SEND_EKS, DP_HDCP_2_2_SKE_SEND_EKS_OFFSET, false,
> -				0, 0},
> -		{HDCP_2_2_REP_SEND_RECVID_LIST,
> -				DP_HDCP_2_2_REP_SEND_RECVID_LIST_OFFSET, true,
> -				HDCP_2_2_RECVID_LIST_TIMEOUT_MS, 0},
> -		{HDCP_2_2_REP_SEND_ACK, DP_HDCP_2_2_REP_SEND_ACK_OFFSET, false,
> -				0, 0},
> -		{HDCP_2_2_REP_STREAM_MANAGE,
> -				DP_HDCP_2_2_REP_STREAM_MANAGE_OFFSET, false,
> -				0, 0},
> -		{HDCP_2_2_REP_STREAM_READY, DP_HDCP_2_2_REP_STREAM_READY_OFFSET,
> -				false, HDCP_2_2_STREAM_READY_TIMEOUT_MS, 0},
> +};
> +
> +static struct hdcp2_dp_msg_data hdcp2_msg_data[] = {
> +	{ HDCP_2_2_AKE_INIT, DP_HDCP_2_2_AKE_INIT_OFFSET, false, 0, 0 },
> +	{ HDCP_2_2_AKE_SEND_CERT, DP_HDCP_2_2_AKE_SEND_CERT_OFFSET,
> +	  false, HDCP_2_2_CERT_TIMEOUT_MS, 0 },
> +	{ HDCP_2_2_AKE_NO_STORED_KM, DP_HDCP_2_2_AKE_NO_STORED_KM_OFFSET,
> +	  false, 0, 0 },
> +	{ HDCP_2_2_AKE_STORED_KM, DP_HDCP_2_2_AKE_STORED_KM_OFFSET,
> +	  false, 0, 0 },
> +	{ HDCP_2_2_AKE_SEND_HPRIME, DP_HDCP_2_2_AKE_SEND_HPRIME_OFFSET,
> +	  true, HDCP_2_2_HPRIME_PAIRED_TIMEOUT_MS,
> +	  HDCP_2_2_HPRIME_NO_PAIRED_TIMEOUT_MS },
> +	{ HDCP_2_2_AKE_SEND_PAIRING_INFO,
> +	  DP_HDCP_2_2_AKE_SEND_PAIRING_INFO_OFFSET, true,
> +	  HDCP_2_2_PAIRING_TIMEOUT_MS, 0 },
> +	{ HDCP_2_2_LC_INIT, DP_HDCP_2_2_LC_INIT_OFFSET, false, 0, 0 },
> +	{ HDCP_2_2_LC_SEND_LPRIME, DP_HDCP_2_2_LC_SEND_LPRIME_OFFSET,
> +	  false, HDCP_2_2_DP_LPRIME_TIMEOUT_MS, 0 },
> +	{ HDCP_2_2_SKE_SEND_EKS, DP_HDCP_2_2_SKE_SEND_EKS_OFFSET, false,
> +	  0, 0 },
> +	{ HDCP_2_2_REP_SEND_RECVID_LIST,
> +	  DP_HDCP_2_2_REP_SEND_RECVID_LIST_OFFSET, true,
> +	  HDCP_2_2_RECVID_LIST_TIMEOUT_MS, 0 },
> +	{ HDCP_2_2_REP_SEND_ACK, DP_HDCP_2_2_REP_SEND_ACK_OFFSET, false,
> +	  0, 0 },
> +	{ HDCP_2_2_REP_STREAM_MANAGE,
> +	  DP_HDCP_2_2_REP_STREAM_MANAGE_OFFSET, false,
> +	  0, 0 },
> +	{ HDCP_2_2_REP_STREAM_READY, DP_HDCP_2_2_REP_STREAM_READY_OFFSET,
> +	  false, HDCP_2_2_STREAM_READY_TIMEOUT_MS, 0 },
>  /* local define to shovel this through the write_2_2 interface */
>  #define HDCP_2_2_ERRATA_DP_STREAM_TYPE	50
> -		{HDCP_2_2_ERRATA_DP_STREAM_TYPE,
> -				DP_HDCP_2_2_REG_STREAM_TYPE_OFFSET, false,
> -				0, 0},
> -		};
> +	{ HDCP_2_2_ERRATA_DP_STREAM_TYPE,
> +	  DP_HDCP_2_2_REG_STREAM_TYPE_OFFSET, false,
> +	  0, 0 },
> +};
>  
>  static inline
>  int intel_dp_hdcp2_read_rx_status(struct intel_digital_port *intel_dig_port,
> -- 
> 2.20.1
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
Ville Syrjälä
Intel
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Re: [PATCH 1/5] drm/i915/dp: stylistic cleanup around hdcp2_msg_data

[Ramalingam C]

On 2019-08-20 at 16:40:15 +0300, Jani Nikula wrote:
> Split struct declaration and array definition. Fix indents and
> whitespace. No functional changes.
> 

Reviewed-by: Ramalingam C <ramalingam.c@intel.com>

-Ram
> Cc: Ramalingam C <ramalingam.c@intel.com>
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_dp.c | 70 +++++++++++++------------
>  1 file changed, 36 insertions(+), 34 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
> index 5c45a3bb102d..001d520660a9 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -5812,47 +5812,49 @@ struct hdcp2_dp_errata_stream_type {
>  	u8	stream_type;
>  } __packed;
>  
> -static struct hdcp2_dp_msg_data {
> +struct hdcp2_dp_msg_data {
>  	u8 msg_id;
>  	u32 offset;
>  	bool msg_detectable;
>  	u32 timeout;
>  	u32 timeout2; /* Added for non_paired situation */
> -	} hdcp2_msg_data[] = {
> -		{HDCP_2_2_AKE_INIT, DP_HDCP_2_2_AKE_INIT_OFFSET, false, 0, 0},
> -		{HDCP_2_2_AKE_SEND_CERT, DP_HDCP_2_2_AKE_SEND_CERT_OFFSET,
> -				false, HDCP_2_2_CERT_TIMEOUT_MS, 0},
> -		{HDCP_2_2_AKE_NO_STORED_KM, DP_HDCP_2_2_AKE_NO_STORED_KM_OFFSET,
> -				false, 0, 0},
> -		{HDCP_2_2_AKE_STORED_KM, DP_HDCP_2_2_AKE_STORED_KM_OFFSET,
> -				false, 0, 0},
> -		{HDCP_2_2_AKE_SEND_HPRIME, DP_HDCP_2_2_AKE_SEND_HPRIME_OFFSET,
> -				true, HDCP_2_2_HPRIME_PAIRED_TIMEOUT_MS,
> -				HDCP_2_2_HPRIME_NO_PAIRED_TIMEOUT_MS},
> -		{HDCP_2_2_AKE_SEND_PAIRING_INFO,
> -				DP_HDCP_2_2_AKE_SEND_PAIRING_INFO_OFFSET, true,
> -				HDCP_2_2_PAIRING_TIMEOUT_MS, 0},
> -		{HDCP_2_2_LC_INIT, DP_HDCP_2_2_LC_INIT_OFFSET, false, 0, 0},
> -		{HDCP_2_2_LC_SEND_LPRIME, DP_HDCP_2_2_LC_SEND_LPRIME_OFFSET,
> -				false, HDCP_2_2_DP_LPRIME_TIMEOUT_MS, 0},
> -		{HDCP_2_2_SKE_SEND_EKS, DP_HDCP_2_2_SKE_SEND_EKS_OFFSET, false,
> -				0, 0},
> -		{HDCP_2_2_REP_SEND_RECVID_LIST,
> -				DP_HDCP_2_2_REP_SEND_RECVID_LIST_OFFSET, true,
> -				HDCP_2_2_RECVID_LIST_TIMEOUT_MS, 0},
> -		{HDCP_2_2_REP_SEND_ACK, DP_HDCP_2_2_REP_SEND_ACK_OFFSET, false,
> -				0, 0},
> -		{HDCP_2_2_REP_STREAM_MANAGE,
> -				DP_HDCP_2_2_REP_STREAM_MANAGE_OFFSET, false,
> -				0, 0},
> -		{HDCP_2_2_REP_STREAM_READY, DP_HDCP_2_2_REP_STREAM_READY_OFFSET,
> -				false, HDCP_2_2_STREAM_READY_TIMEOUT_MS, 0},
> +};
> +
> +static struct hdcp2_dp_msg_data hdcp2_msg_data[] = {
> +	{ HDCP_2_2_AKE_INIT, DP_HDCP_2_2_AKE_INIT_OFFSET, false, 0, 0 },
> +	{ HDCP_2_2_AKE_SEND_CERT, DP_HDCP_2_2_AKE_SEND_CERT_OFFSET,
> +	  false, HDCP_2_2_CERT_TIMEOUT_MS, 0 },
> +	{ HDCP_2_2_AKE_NO_STORED_KM, DP_HDCP_2_2_AKE_NO_STORED_KM_OFFSET,
> +	  false, 0, 0 },
> +	{ HDCP_2_2_AKE_STORED_KM, DP_HDCP_2_2_AKE_STORED_KM_OFFSET,
> +	  false, 0, 0 },
> +	{ HDCP_2_2_AKE_SEND_HPRIME, DP_HDCP_2_2_AKE_SEND_HPRIME_OFFSET,
> +	  true, HDCP_2_2_HPRIME_PAIRED_TIMEOUT_MS,
> +	  HDCP_2_2_HPRIME_NO_PAIRED_TIMEOUT_MS },
> +	{ HDCP_2_2_AKE_SEND_PAIRING_INFO,
> +	  DP_HDCP_2_2_AKE_SEND_PAIRING_INFO_OFFSET, true,
> +	  HDCP_2_2_PAIRING_TIMEOUT_MS, 0 },
> +	{ HDCP_2_2_LC_INIT, DP_HDCP_2_2_LC_INIT_OFFSET, false, 0, 0 },
> +	{ HDCP_2_2_LC_SEND_LPRIME, DP_HDCP_2_2_LC_SEND_LPRIME_OFFSET,
> +	  false, HDCP_2_2_DP_LPRIME_TIMEOUT_MS, 0 },
> +	{ HDCP_2_2_SKE_SEND_EKS, DP_HDCP_2_2_SKE_SEND_EKS_OFFSET, false,
> +	  0, 0 },
> +	{ HDCP_2_2_REP_SEND_RECVID_LIST,
> +	  DP_HDCP_2_2_REP_SEND_RECVID_LIST_OFFSET, true,
> +	  HDCP_2_2_RECVID_LIST_TIMEOUT_MS, 0 },
> +	{ HDCP_2_2_REP_SEND_ACK, DP_HDCP_2_2_REP_SEND_ACK_OFFSET, false,
> +	  0, 0 },
> +	{ HDCP_2_2_REP_STREAM_MANAGE,
> +	  DP_HDCP_2_2_REP_STREAM_MANAGE_OFFSET, false,
> +	  0, 0 },
> +	{ HDCP_2_2_REP_STREAM_READY, DP_HDCP_2_2_REP_STREAM_READY_OFFSET,
> +	  false, HDCP_2_2_STREAM_READY_TIMEOUT_MS, 0 },
>  /* local define to shovel this through the write_2_2 interface */
>  #define HDCP_2_2_ERRATA_DP_STREAM_TYPE	50
> -		{HDCP_2_2_ERRATA_DP_STREAM_TYPE,
> -				DP_HDCP_2_2_REG_STREAM_TYPE_OFFSET, false,
> -				0, 0},
> -		};
> +	{ HDCP_2_2_ERRATA_DP_STREAM_TYPE,
> +	  DP_HDCP_2_2_REG_STREAM_TYPE_OFFSET, false,
> +	  0, 0 },
> +};
>  
>  static inline
>  int intel_dp_hdcp2_read_rx_status(struct intel_digital_port *intel_dig_port,
> -- 
> 2.20.1
> 
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Re: [PATCH 2/5] drm/i915/dp: avoid shadowing variables

[Ramalingam C]

On 2019-08-20 at 16:40:16 +0300, Jani Nikula wrote:
> Everything seems to be all right, but shadowing is to be avoided.
> 
> Cc: Ramalingam C <ramalingam.c@intel.com>
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>

Reviewed-by: Ramalingam C <ramalingam.c@intel.com>

-Ram
> ---
>  drivers/gpu/drm/i915/display/intel_dp.c | 8 ++++----
>  1 file changed, 4 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
> index 001d520660a9..0d8a8c47296b 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -5820,7 +5820,7 @@ struct hdcp2_dp_msg_data {
>  	u32 timeout2; /* Added for non_paired situation */
>  };
>  
> -static struct hdcp2_dp_msg_data hdcp2_msg_data[] = {
> +static struct hdcp2_dp_msg_data hdcp2_dp_msg_data[] = {
>  	{ HDCP_2_2_AKE_INIT, DP_HDCP_2_2_AKE_INIT_OFFSET, false, 0, 0 },
>  	{ HDCP_2_2_AKE_SEND_CERT, DP_HDCP_2_2_AKE_SEND_CERT_OFFSET,
>  	  false, HDCP_2_2_CERT_TIMEOUT_MS, 0 },
> @@ -5951,9 +5951,9 @@ static struct hdcp2_dp_msg_data *get_hdcp2_dp_msg_data(u8 msg_id)
>  {
>  	int i;
>  
> -	for (i = 0; i < ARRAY_SIZE(hdcp2_msg_data); i++)
> -		if (hdcp2_msg_data[i].msg_id == msg_id)
> -			return &hdcp2_msg_data[i];
> +	for (i = 0; i < ARRAY_SIZE(hdcp2_dp_msg_data); i++)
> +		if (hdcp2_dp_msg_data[i].msg_id == msg_id)
> +			return &hdcp2_dp_msg_data[i];
>  
>  	return NULL;
>  }
> -- 
> 2.20.1
> 
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Re: [PATCH 3/5] drm/i915/dp: make hdcp2_dp_msg_data const

[Ramalingam C]

On 2019-08-20 at 16:40:17 +0300, Jani Nikula wrote:
> It's static const data, make it so.
> 
> Cc: Ramalingam C <ramalingam.c@intel.com>
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>

Reviewed-by: Ramalingam C <ramalingam.c@intel.com>

-Ram
> ---
>  drivers/gpu/drm/i915/display/intel_dp.c | 10 +++++-----
>  1 file changed, 5 insertions(+), 5 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
> index 0d8a8c47296b..921ad0a2f7ba 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -5820,7 +5820,7 @@ struct hdcp2_dp_msg_data {
>  	u32 timeout2; /* Added for non_paired situation */
>  };
>  
> -static struct hdcp2_dp_msg_data hdcp2_dp_msg_data[] = {
> +static const struct hdcp2_dp_msg_data hdcp2_dp_msg_data[] = {
>  	{ HDCP_2_2_AKE_INIT, DP_HDCP_2_2_AKE_INIT_OFFSET, false, 0, 0 },
>  	{ HDCP_2_2_AKE_SEND_CERT, DP_HDCP_2_2_AKE_SEND_CERT_OFFSET,
>  	  false, HDCP_2_2_CERT_TIMEOUT_MS, 0 },
> @@ -5908,7 +5908,7 @@ int hdcp2_detect_msg_availability(struct intel_digital_port *intel_dig_port,
>  
>  static ssize_t
>  intel_dp_hdcp2_wait_for_msg(struct intel_digital_port *intel_dig_port,
> -			    struct hdcp2_dp_msg_data *hdcp2_msg_data)
> +			    const struct hdcp2_dp_msg_data *hdcp2_msg_data)
>  {
>  	struct intel_dp *dp = &intel_dig_port->dp;
>  	struct intel_hdcp *hdcp = &dp->attached_connector->hdcp;
> @@ -5947,7 +5947,7 @@ intel_dp_hdcp2_wait_for_msg(struct intel_digital_port *intel_dig_port,
>  	return ret;
>  }
>  
> -static struct hdcp2_dp_msg_data *get_hdcp2_dp_msg_data(u8 msg_id)
> +static const struct hdcp2_dp_msg_data *get_hdcp2_dp_msg_data(u8 msg_id)
>  {
>  	int i;
>  
> @@ -5967,7 +5967,7 @@ int intel_dp_hdcp2_write_msg(struct intel_digital_port *intel_dig_port,
>  	unsigned int offset;
>  	u8 *byte = buf;
>  	ssize_t ret, bytes_to_write, len;
> -	struct hdcp2_dp_msg_data *hdcp2_msg_data;
> +	const struct hdcp2_dp_msg_data *hdcp2_msg_data;
>  
>  	hdcp2_msg_data = get_hdcp2_dp_msg_data(*byte);
>  	if (!hdcp2_msg_data)
> @@ -6031,7 +6031,7 @@ int intel_dp_hdcp2_read_msg(struct intel_digital_port *intel_dig_port,
>  	unsigned int offset;
>  	u8 *byte = buf;
>  	ssize_t ret, bytes_to_recv, len;
> -	struct hdcp2_dp_msg_data *hdcp2_msg_data;
> +	const struct hdcp2_dp_msg_data *hdcp2_msg_data;
>  
>  	hdcp2_msg_data = get_hdcp2_dp_msg_data(msg_id);
>  	if (!hdcp2_msg_data)
> -- 
> 2.20.1
> 
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Re: [PATCH 4/5] drm/i915/hdmi: stylistic cleanup around hdcp2_msg_data

[Ramalingam C]

On 2019-08-20 at 16:40:18 +0300, Jani Nikula wrote:
> Split struct declaration and array definition. Fix indents and
> whitespace. No functional changes.
> 
> Cc: Ramalingam C <ramalingam.c@intel.com>
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>

Reviewed-by: Ramalingam C <ramalingam.c@intel.com>

-Ram
> ---
>  drivers/gpu/drm/i915/display/intel_hdmi.c | 39 +++++++++++------------
>  1 file changed, 19 insertions(+), 20 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.c b/drivers/gpu/drm/i915/display/intel_hdmi.c
> index b1ca8e5bdb56..d30c8314eaaf 100644
> --- a/drivers/gpu/drm/i915/display/intel_hdmi.c
> +++ b/drivers/gpu/drm/i915/display/intel_hdmi.c
> @@ -1514,29 +1514,28 @@ bool intel_hdmi_hdcp_check_link(struct intel_digital_port *intel_dig_port)
>  	return true;
>  }
>  
> -static struct hdcp2_hdmi_msg_data {
> +struct hdcp2_hdmi_msg_data {
>  	u8 msg_id;
>  	u32 timeout;
>  	u32 timeout2;
> -	} hdcp2_msg_data[] = {
> -		{HDCP_2_2_AKE_INIT, 0, 0},
> -		{HDCP_2_2_AKE_SEND_CERT, HDCP_2_2_CERT_TIMEOUT_MS, 0},
> -		{HDCP_2_2_AKE_NO_STORED_KM, 0, 0},
> -		{HDCP_2_2_AKE_STORED_KM, 0, 0},
> -		{HDCP_2_2_AKE_SEND_HPRIME, HDCP_2_2_HPRIME_PAIRED_TIMEOUT_MS,
> -				HDCP_2_2_HPRIME_NO_PAIRED_TIMEOUT_MS},
> -		{HDCP_2_2_AKE_SEND_PAIRING_INFO, HDCP_2_2_PAIRING_TIMEOUT_MS,
> -				0},
> -		{HDCP_2_2_LC_INIT, 0, 0},
> -		{HDCP_2_2_LC_SEND_LPRIME, HDCP_2_2_HDMI_LPRIME_TIMEOUT_MS, 0},
> -		{HDCP_2_2_SKE_SEND_EKS, 0, 0},
> -		{HDCP_2_2_REP_SEND_RECVID_LIST,
> -				HDCP_2_2_RECVID_LIST_TIMEOUT_MS, 0},
> -		{HDCP_2_2_REP_SEND_ACK, 0, 0},
> -		{HDCP_2_2_REP_STREAM_MANAGE, 0, 0},
> -		{HDCP_2_2_REP_STREAM_READY, HDCP_2_2_STREAM_READY_TIMEOUT_MS,
> -				0},
> -	};
> +};
> +
> +static struct hdcp2_hdmi_msg_data hdcp2_msg_data[] = {
> +	{ HDCP_2_2_AKE_INIT, 0, 0 },
> +	{ HDCP_2_2_AKE_SEND_CERT, HDCP_2_2_CERT_TIMEOUT_MS, 0 },
> +	{ HDCP_2_2_AKE_NO_STORED_KM, 0, 0 },
> +	{ HDCP_2_2_AKE_STORED_KM, 0, 0 },
> +	{ HDCP_2_2_AKE_SEND_HPRIME, HDCP_2_2_HPRIME_PAIRED_TIMEOUT_MS,
> +	  HDCP_2_2_HPRIME_NO_PAIRED_TIMEOUT_MS },
> +	{ HDCP_2_2_AKE_SEND_PAIRING_INFO, HDCP_2_2_PAIRING_TIMEOUT_MS, 0 },
> +	{ HDCP_2_2_LC_INIT, 0, 0 },
> +	{ HDCP_2_2_LC_SEND_LPRIME, HDCP_2_2_HDMI_LPRIME_TIMEOUT_MS, 0 },
> +	{ HDCP_2_2_SKE_SEND_EKS, 0, 0 },
> +	{ HDCP_2_2_REP_SEND_RECVID_LIST, HDCP_2_2_RECVID_LIST_TIMEOUT_MS, 0 },
> +	{ HDCP_2_2_REP_SEND_ACK, 0, 0 },
> +	{ HDCP_2_2_REP_STREAM_MANAGE, 0, 0 },
> +	{ HDCP_2_2_REP_STREAM_READY, HDCP_2_2_STREAM_READY_TIMEOUT_MS, 0 },
> +};
>  
>  static
>  int intel_hdmi_hdcp2_read_rx_status(struct intel_digital_port *intel_dig_port,
> -- 
> 2.20.1
> 
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Re: [PATCH 5/5] drm/i915/hdmi: make hdcp2_msg_data const

[Ramalingam C]

On 2019-08-20 at 16:40:19 +0300, Jani Nikula wrote:
> It's static const data, make it so.
> 
> Cc: Ramalingam C <ramalingam.c@intel.com>
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>

Reviewed-by: Ramalingam C <ramalingam.c@intel.com>

-Ram
> ---
>  drivers/gpu/drm/i915/display/intel_hdmi.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.c b/drivers/gpu/drm/i915/display/intel_hdmi.c
> index d30c8314eaaf..e02f0faecf02 100644
> --- a/drivers/gpu/drm/i915/display/intel_hdmi.c
> +++ b/drivers/gpu/drm/i915/display/intel_hdmi.c
> @@ -1520,7 +1520,7 @@ struct hdcp2_hdmi_msg_data {
>  	u32 timeout2;
>  };
>  
> -static struct hdcp2_hdmi_msg_data hdcp2_msg_data[] = {
> +static const struct hdcp2_hdmi_msg_data hdcp2_msg_data[] = {
>  	{ HDCP_2_2_AKE_INIT, 0, 0 },
>  	{ HDCP_2_2_AKE_SEND_CERT, HDCP_2_2_CERT_TIMEOUT_MS, 0 },
>  	{ HDCP_2_2_AKE_NO_STORED_KM, 0, 0 },
> -- 
> 2.20.1
> 
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Re: [PATCH 1/5] drm/i915/dp: stylistic cleanup around hdcp2_msg_data

[Jani Nikula]

On Tue, 20 Aug 2019, Ville Syrjälä <ville.syrjala@linux.intel.com> wrote:
> On Tue, Aug 20, 2019 at 04:40:15PM +0300, Jani Nikula wrote:
>> Split struct declaration and array definition. Fix indents and
>> whitespace. No functional changes.
>> 
>> Cc: Ramalingam C <ramalingam.c@intel.com>
>> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
>> ---
>>  drivers/gpu/drm/i915/display/intel_dp.c | 70 +++++++++++++------------
>>  1 file changed, 36 insertions(+), 34 deletions(-)
>> 
>> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
>> index 5c45a3bb102d..001d520660a9 100644
>> --- a/drivers/gpu/drm/i915/display/intel_dp.c
>> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
>> @@ -5812,47 +5812,49 @@ struct hdcp2_dp_errata_stream_type {
>>  	u8	stream_type;
>>  } __packed;
>>  
>> -static struct hdcp2_dp_msg_data {
>> +struct hdcp2_dp_msg_data {
>>  	u8 msg_id;
>>  	u32 offset;
>>  	bool msg_detectable;
>>  	u32 timeout;
>>  	u32 timeout2; /* Added for non_paired situation */
>
> Looks a bit poorly packed. Also u32 seems overkill for the timeouts.

Yeah, well, one cleanup at a time, okay? :)

BR,
Jani.


>
>> -	} hdcp2_msg_data[] = {
>> -		{HDCP_2_2_AKE_INIT, DP_HDCP_2_2_AKE_INIT_OFFSET, false, 0, 0},
>> -		{HDCP_2_2_AKE_SEND_CERT, DP_HDCP_2_2_AKE_SEND_CERT_OFFSET,
>> -				false, HDCP_2_2_CERT_TIMEOUT_MS, 0},
>> -		{HDCP_2_2_AKE_NO_STORED_KM, DP_HDCP_2_2_AKE_NO_STORED_KM_OFFSET,
>> -				false, 0, 0},
>> -		{HDCP_2_2_AKE_STORED_KM, DP_HDCP_2_2_AKE_STORED_KM_OFFSET,
>> -				false, 0, 0},
>> -		{HDCP_2_2_AKE_SEND_HPRIME, DP_HDCP_2_2_AKE_SEND_HPRIME_OFFSET,
>> -				true, HDCP_2_2_HPRIME_PAIRED_TIMEOUT_MS,
>> -				HDCP_2_2_HPRIME_NO_PAIRED_TIMEOUT_MS},
>> -		{HDCP_2_2_AKE_SEND_PAIRING_INFO,
>> -				DP_HDCP_2_2_AKE_SEND_PAIRING_INFO_OFFSET, true,
>> -				HDCP_2_2_PAIRING_TIMEOUT_MS, 0},
>> -		{HDCP_2_2_LC_INIT, DP_HDCP_2_2_LC_INIT_OFFSET, false, 0, 0},
>> -		{HDCP_2_2_LC_SEND_LPRIME, DP_HDCP_2_2_LC_SEND_LPRIME_OFFSET,
>> -				false, HDCP_2_2_DP_LPRIME_TIMEOUT_MS, 0},
>> -		{HDCP_2_2_SKE_SEND_EKS, DP_HDCP_2_2_SKE_SEND_EKS_OFFSET, false,
>> -				0, 0},
>> -		{HDCP_2_2_REP_SEND_RECVID_LIST,
>> -				DP_HDCP_2_2_REP_SEND_RECVID_LIST_OFFSET, true,
>> -				HDCP_2_2_RECVID_LIST_TIMEOUT_MS, 0},
>> -		{HDCP_2_2_REP_SEND_ACK, DP_HDCP_2_2_REP_SEND_ACK_OFFSET, false,
>> -				0, 0},
>> -		{HDCP_2_2_REP_STREAM_MANAGE,
>> -				DP_HDCP_2_2_REP_STREAM_MANAGE_OFFSET, false,
>> -				0, 0},
>> -		{HDCP_2_2_REP_STREAM_READY, DP_HDCP_2_2_REP_STREAM_READY_OFFSET,
>> -				false, HDCP_2_2_STREAM_READY_TIMEOUT_MS, 0},
>> +};
>> +
>> +static struct hdcp2_dp_msg_data hdcp2_msg_data[] = {
>> +	{ HDCP_2_2_AKE_INIT, DP_HDCP_2_2_AKE_INIT_OFFSET, false, 0, 0 },
>> +	{ HDCP_2_2_AKE_SEND_CERT, DP_HDCP_2_2_AKE_SEND_CERT_OFFSET,
>> +	  false, HDCP_2_2_CERT_TIMEOUT_MS, 0 },
>> +	{ HDCP_2_2_AKE_NO_STORED_KM, DP_HDCP_2_2_AKE_NO_STORED_KM_OFFSET,
>> +	  false, 0, 0 },
>> +	{ HDCP_2_2_AKE_STORED_KM, DP_HDCP_2_2_AKE_STORED_KM_OFFSET,
>> +	  false, 0, 0 },
>> +	{ HDCP_2_2_AKE_SEND_HPRIME, DP_HDCP_2_2_AKE_SEND_HPRIME_OFFSET,
>> +	  true, HDCP_2_2_HPRIME_PAIRED_TIMEOUT_MS,
>> +	  HDCP_2_2_HPRIME_NO_PAIRED_TIMEOUT_MS },
>> +	{ HDCP_2_2_AKE_SEND_PAIRING_INFO,
>> +	  DP_HDCP_2_2_AKE_SEND_PAIRING_INFO_OFFSET, true,
>> +	  HDCP_2_2_PAIRING_TIMEOUT_MS, 0 },
>> +	{ HDCP_2_2_LC_INIT, DP_HDCP_2_2_LC_INIT_OFFSET, false, 0, 0 },
>> +	{ HDCP_2_2_LC_SEND_LPRIME, DP_HDCP_2_2_LC_SEND_LPRIME_OFFSET,
>> +	  false, HDCP_2_2_DP_LPRIME_TIMEOUT_MS, 0 },
>> +	{ HDCP_2_2_SKE_SEND_EKS, DP_HDCP_2_2_SKE_SEND_EKS_OFFSET, false,
>> +	  0, 0 },
>> +	{ HDCP_2_2_REP_SEND_RECVID_LIST,
>> +	  DP_HDCP_2_2_REP_SEND_RECVID_LIST_OFFSET, true,
>> +	  HDCP_2_2_RECVID_LIST_TIMEOUT_MS, 0 },
>> +	{ HDCP_2_2_REP_SEND_ACK, DP_HDCP_2_2_REP_SEND_ACK_OFFSET, false,
>> +	  0, 0 },
>> +	{ HDCP_2_2_REP_STREAM_MANAGE,
>> +	  DP_HDCP_2_2_REP_STREAM_MANAGE_OFFSET, false,
>> +	  0, 0 },
>> +	{ HDCP_2_2_REP_STREAM_READY, DP_HDCP_2_2_REP_STREAM_READY_OFFSET,
>> +	  false, HDCP_2_2_STREAM_READY_TIMEOUT_MS, 0 },
>>  /* local define to shovel this through the write_2_2 interface */
>>  #define HDCP_2_2_ERRATA_DP_STREAM_TYPE	50
>> -		{HDCP_2_2_ERRATA_DP_STREAM_TYPE,
>> -				DP_HDCP_2_2_REG_STREAM_TYPE_OFFSET, false,
>> -				0, 0},
>> -		};
>> +	{ HDCP_2_2_ERRATA_DP_STREAM_TYPE,
>> +	  DP_HDCP_2_2_REG_STREAM_TYPE_OFFSET, false,
>> +	  0, 0 },
>> +};
>>  
>>  static inline
>>  int intel_dp_hdcp2_read_rx_status(struct intel_digital_port *intel_dig_port,
>> -- 
>> 2.20.1
>> 
>> _______________________________________________
>> Intel-gfx mailing list
>> Intel-gfx@lists.freedesktop.org
>> https://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
Jani Nikula, Intel Open Source Graphics Center
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

✓ Fi.CI.BAT: success for series starting with [1/5] drm/i915/dp: stylistic cleanup around hdcp2_msg_data

[Patchwork]

== Series Details ==

Series: series starting with [1/5] drm/i915/dp: stylistic cleanup around hdcp2_msg_data
URL   : https://patchwork.freedesktop.org/series/65481/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_6749 -> Patchwork_14103
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14103/

Known issues
------------

  Here are the changes found in Patchwork_14103 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@gem_ctx_exec@basic:
    - fi-icl-u3:          [PASS][1] -> [DMESG-WARN][2] ([fdo#107724])
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6749/fi-icl-u3/igt@gem_ctx_exec@basic.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14103/fi-icl-u3/igt@gem_ctx_exec@basic.html

  * igt@gem_sync@basic-store-each:
    - fi-cfl-8109u:       [PASS][3] -> [INCOMPLETE][4] ([fdo#111427])
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6749/fi-cfl-8109u/igt@gem_sync@basic-store-each.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14103/fi-cfl-8109u/igt@gem_sync@basic-store-each.html

  * igt@i915_selftest@live_active:
    - fi-bsw-n3050:       [PASS][5] -> [DMESG-WARN][6] ([fdo#111373])
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6749/fi-bsw-n3050/igt@i915_selftest@live_active.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14103/fi-bsw-n3050/igt@i915_selftest@live_active.html

  * igt@i915_selftest@live_execlists:
    - fi-skl-gvtdvm:      [PASS][7] -> [DMESG-FAIL][8] ([fdo#111108])
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6749/fi-skl-gvtdvm/igt@i915_selftest@live_execlists.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14103/fi-skl-gvtdvm/igt@i915_selftest@live_execlists.html

  * igt@i915_selftest@live_hangcheck:
    - fi-icl-u2:          [PASS][9] -> [INCOMPLETE][10] ([fdo#107713] / [fdo#108569])
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6749/fi-icl-u2/igt@i915_selftest@live_hangcheck.html
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14103/fi-icl-u2/igt@i915_selftest@live_hangcheck.html

  * igt@kms_chamelium@dp-crc-fast:
    - fi-kbl-7500u:       [PASS][11] -> [WARN][12] ([fdo#109483] / [fdo#111156])
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6749/fi-kbl-7500u/igt@kms_chamelium@dp-crc-fast.html
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14103/fi-kbl-7500u/igt@kms_chamelium@dp-crc-fast.html

  
#### Possible fixes ####

  * igt@gem_exec_suspend@basic-s3:
    - fi-blb-e6850:       [INCOMPLETE][13] ([fdo#107718]) -> [PASS][14]
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6749/fi-blb-e6850/igt@gem_exec_suspend@basic-s3.html
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14103/fi-blb-e6850/igt@gem_exec_suspend@basic-s3.html

  * igt@kms_frontbuffer_tracking@basic:
    - fi-icl-u2:          [FAIL][15] ([fdo#103167]) -> [PASS][16]
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6749/fi-icl-u2/igt@kms_frontbuffer_tracking@basic.html
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14103/fi-icl-u2/igt@kms_frontbuffer_tracking@basic.html

  
#### Warnings ####

  * igt@kms_chamelium@hdmi-hpd-fast:
    - fi-kbl-7567u:       [FAIL][17] ([fdo#109800]) -> [FAIL][18] ([fdo#111407])
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6749/fi-kbl-7567u/igt@kms_chamelium@hdmi-hpd-fast.html
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14103/fi-kbl-7567u/igt@kms_chamelium@hdmi-hpd-fast.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167
  [fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713
  [fdo#107718]: https://bugs.freedesktop.org/show_bug.cgi?id=107718
  [fdo#107724]: https://bugs.freedesktop.org/show_bug.cgi?id=107724
  [fdo#108569]: https://bugs.freedesktop.org/show_bug.cgi?id=108569
  [fdo#109483]: https://bugs.freedesktop.org/show_bug.cgi?id=109483
  [fdo#109800]: https://bugs.freedesktop.org/show_bug.cgi?id=109800
  [fdo#111045]: https://bugs.freedesktop.org/show_bug.cgi?id=111045
  [fdo#111096]: https://bugs.freedesktop.org/show_bug.cgi?id=111096
  [fdo#111108]: https://bugs.freedesktop.org/show_bug.cgi?id=111108
  [fdo#111156]: https://bugs.freedesktop.org/show_bug.cgi?id=111156
  [fdo#111373]: https://bugs.freedesktop.org/show_bug.cgi?id=111373
  [fdo#111407]: https://bugs.freedesktop.org/show_bug.cgi?id=111407
  [fdo#111427]: https://bugs.freedesktop.org/show_bug.cgi?id=111427


Participating hosts (55 -> 46)
------------------------------

  Missing    (9): fi-kbl-soraka fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-byt-clapper fi-icl-y fi-icl-dsi fi-bdw-samus 


Build changes
-------------

  * CI: CI-20190529 -> None
  * Linux: CI_DRM_6749 -> Patchwork_14103

  CI-20190529: 20190529
  CI_DRM_6749: 889140938c5c4bb9f2df652dd23d16fdcb86db72 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_5146: 357dbe1869d88a2f08bcee4eebceff4ee9014424 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_14103: 7795590348e30978962fd2c9c28673b3097f20ae @ git://anongit.freedesktop.org/gfx-ci/linux


== Linux commits ==

7795590348e3 drm/i915/hdmi: make hdcp2_msg_data const
9f2c88e8b7fd drm/i915/hdmi: stylistic cleanup around hdcp2_msg_data
29186bd7deb3 drm/i915/dp: make hdcp2_dp_msg_data const
6df51cade198 drm/i915/dp: avoid shadowing variables
1faa2c3cb9e9 drm/i915/dp: stylistic cleanup around hdcp2_msg_data

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14103/
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

✓ Fi.CI.IGT: success for series starting with [1/5] drm/i915/dp: stylistic cleanup around hdcp2_msg_data

[Patchwork]

== Series Details ==

Series: series starting with [1/5] drm/i915/dp: stylistic cleanup around hdcp2_msg_data
URL   : https://patchwork.freedesktop.org/series/65481/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_6749_full -> Patchwork_14103_full
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  

Known issues
------------

  Here are the changes found in Patchwork_14103_full that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@gem_ctx_shared@exec-single-timeline-bsd:
    - shard-iclb:         [PASS][1] -> [SKIP][2] ([fdo#110841])
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6749/shard-iclb7/igt@gem_ctx_shared@exec-single-timeline-bsd.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14103/shard-iclb1/igt@gem_ctx_shared@exec-single-timeline-bsd.html

  * igt@gem_exec_capture@capture-bsd:
    - shard-iclb:         [PASS][3] -> [SKIP][4] ([fdo#111325])
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6749/shard-iclb7/igt@gem_exec_capture@capture-bsd.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14103/shard-iclb2/igt@gem_exec_capture@capture-bsd.html

  * igt@gem_exec_schedule@preempt-queue-chain-bsd2:
    - shard-iclb:         [PASS][5] -> [SKIP][6] ([fdo#109276]) +8 similar issues
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6749/shard-iclb1/igt@gem_exec_schedule@preempt-queue-chain-bsd2.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14103/shard-iclb3/igt@gem_exec_schedule@preempt-queue-chain-bsd2.html

  * igt@gem_tiled_swapping@non-threaded:
    - shard-apl:          [PASS][7] -> [DMESG-WARN][8] ([fdo#108686])
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6749/shard-apl1/igt@gem_tiled_swapping@non-threaded.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14103/shard-apl8/igt@gem_tiled_swapping@non-threaded.html

  * igt@i915_pm_rpm@system-suspend-execbuf:
    - shard-skl:          [PASS][9] -> [INCOMPLETE][10] ([fdo#104108] / [fdo#107807])
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6749/shard-skl9/igt@i915_pm_rpm@system-suspend-execbuf.html
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14103/shard-skl7/igt@i915_pm_rpm@system-suspend-execbuf.html

  * igt@kms_cursor_legacy@2x-long-cursor-vs-flip-legacy:
    - shard-hsw:          [PASS][11] -> [FAIL][12] ([fdo#105767])
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6749/shard-hsw7/igt@kms_cursor_legacy@2x-long-cursor-vs-flip-legacy.html
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14103/shard-hsw2/igt@kms_cursor_legacy@2x-long-cursor-vs-flip-legacy.html

  * igt@kms_frontbuffer_tracking@fbc-badstride:
    - shard-iclb:         [PASS][13] -> [FAIL][14] ([fdo#103167]) +1 similar issue
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6749/shard-iclb5/igt@kms_frontbuffer_tracking@fbc-badstride.html
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14103/shard-iclb8/igt@kms_frontbuffer_tracking@fbc-badstride.html

  * igt@kms_frontbuffer_tracking@psr-1p-offscren-pri-indfb-draw-blt:
    - shard-skl:          [PASS][15] -> [FAIL][16] ([fdo#103167])
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6749/shard-skl8/igt@kms_frontbuffer_tracking@psr-1p-offscren-pri-indfb-draw-blt.html
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14103/shard-skl6/igt@kms_frontbuffer_tracking@psr-1p-offscren-pri-indfb-draw-blt.html

  * igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min:
    - shard-skl:          [PASS][17] -> [FAIL][18] ([fdo#108145])
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6749/shard-skl8/igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min.html
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14103/shard-skl6/igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min.html

  * igt@kms_psr@suspend:
    - shard-skl:          [PASS][19] -> [INCOMPLETE][20] ([fdo#108972])
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6749/shard-skl9/igt@kms_psr@suspend.html
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14103/shard-skl6/igt@kms_psr@suspend.html

  * igt@kms_vblank@pipe-a-ts-continuation-suspend:
    - shard-apl:          [PASS][21] -> [DMESG-WARN][22] ([fdo#108566]) +4 similar issues
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6749/shard-apl5/igt@kms_vblank@pipe-a-ts-continuation-suspend.html
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14103/shard-apl6/igt@kms_vblank@pipe-a-ts-continuation-suspend.html

  
#### Possible fixes ####

  * igt@gem_exec_async@concurrent-writes-bsd:
    - shard-iclb:         [SKIP][23] ([fdo#111325]) -> [PASS][24] +4 similar issues
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6749/shard-iclb1/igt@gem_exec_async@concurrent-writes-bsd.html
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14103/shard-iclb8/igt@gem_exec_async@concurrent-writes-bsd.html

  * igt@gem_exec_schedule@preempt-queue-bsd1:
    - shard-iclb:         [SKIP][25] ([fdo#109276]) -> [PASS][26] +18 similar issues
   [25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6749/shard-iclb7/igt@gem_exec_schedule@preempt-queue-bsd1.html
   [26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14103/shard-iclb2/igt@gem_exec_schedule@preempt-queue-bsd1.html

  * igt@gem_workarounds@suspend-resume-context:
    - shard-apl:          [DMESG-WARN][27] ([fdo#108566]) -> [PASS][28] +5 similar issues
   [27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6749/shard-apl3/igt@gem_workarounds@suspend-resume-context.html
   [28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14103/shard-apl1/igt@gem_workarounds@suspend-resume-context.html

  * igt@kms_cursor_crc@pipe-b-cursor-64x21-onscreen:
    - shard-iclb:         [INCOMPLETE][29] ([fdo#107713]) -> [PASS][30]
   [29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6749/shard-iclb7/igt@kms_cursor_crc@pipe-b-cursor-64x21-onscreen.html
   [30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14103/shard-iclb5/igt@kms_cursor_crc@pipe-b-cursor-64x21-onscreen.html

  * igt@kms_cursor_legacy@cursora-vs-flipa-varying-size:
    - shard-apl:          [INCOMPLETE][31] ([fdo#103927]) -> [PASS][32]
   [31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6749/shard-apl1/igt@kms_cursor_legacy@cursora-vs-flipa-varying-size.html
   [32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14103/shard-apl2/igt@kms_cursor_legacy@cursora-vs-flipa-varying-size.html

  * igt@kms_flip@2x-flip-vs-suspend:
    - shard-glk:          [INCOMPLETE][33] ([fdo#103359] / [k.org#198133]) -> [PASS][34]
   [33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6749/shard-glk1/igt@kms_flip@2x-flip-vs-suspend.html
   [34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14103/shard-glk2/igt@kms_flip@2x-flip-vs-suspend.html

  * igt@kms_flip@flip-vs-expired-vblank-interruptible:
    - shard-skl:          [FAIL][35] ([fdo#105363]) -> [PASS][36]
   [35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6749/shard-skl7/igt@kms_flip@flip-vs-expired-vblank-interruptible.html
   [36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14103/shard-skl7/igt@kms_flip@flip-vs-expired-vblank-interruptible.html

  * igt@kms_frontbuffer_tracking@fbc-1p-pri-indfb-multidraw:
    - shard-iclb:         [FAIL][37] ([fdo#103167]) -> [PASS][38] +6 similar issues
   [37]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6749/shard-iclb1/igt@kms_frontbuffer_tracking@fbc-1p-pri-indfb-multidraw.html
   [38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14103/shard-iclb3/igt@kms_frontbuffer_tracking@fbc-1p-pri-indfb-multidraw.html

  * igt@kms_plane_alpha_blend@pipe-c-coverage-7efc:
    - shard-skl:          [FAIL][39] ([fdo#108145] / [fdo#110403]) -> [PASS][40] +1 similar issue
   [39]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6749/shard-skl5/igt@kms_plane_alpha_blend@pipe-c-coverage-7efc.html
   [40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14103/shard-skl1/igt@kms_plane_alpha_blend@pipe-c-coverage-7efc.html

  * igt@kms_psr@psr2_primary_page_flip:
    - shard-iclb:         [SKIP][41] ([fdo#109441]) -> [PASS][42]
   [41]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6749/shard-iclb7/igt@kms_psr@psr2_primary_page_flip.html
   [42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14103/shard-iclb2/igt@kms_psr@psr2_primary_page_flip.html

  
#### Warnings ####

  * igt@kms_dp_dsc@basic-dsc-enable-edp:
    - shard-iclb:         [SKIP][43] ([fdo#109349]) -> [DMESG-WARN][44] ([fdo#107724])
   [43]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6749/shard-iclb7/igt@kms_dp_dsc@basic-dsc-enable-edp.html
   [44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14103/shard-iclb2/igt@kms_dp_dsc@basic-dsc-enable-edp.html

  
  [fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167
  [fdo#103359]: https://bugs.freedesktop.org/show_bug.cgi?id=103359
  [fdo#103927]: https://bugs.freedesktop.org/show_bug.cgi?id=103927
  [fdo#104108]: https://bugs.freedesktop.org/show_bug.cgi?id=104108
  [fdo#105363]: https://bugs.freedesktop.org/show_bug.cgi?id=105363
  [fdo#105767]: https://bugs.freedesktop.org/show_bug.cgi?id=105767
  [fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713
  [fdo#107724]: https://bugs.freedesktop.org/show_bug.cgi?id=107724
  [fdo#107807]: https://bugs.freedesktop.org/show_bug.cgi?id=107807
  [fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145
  [fdo#108566]: https://bugs.freedesktop.org/show_bug.cgi?id=108566
  [fdo#108686]: https://bugs.freedesktop.org/show_bug.cgi?id=108686
  [fdo#108972]: https://bugs.freedesktop.org/show_bug.cgi?id=108972
  [fdo#109276]: https://bugs.freedesktop.org/show_bug.cgi?id=109276
  [fdo#109349]: https://bugs.freedesktop.org/show_bug.cgi?id=109349
  [fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441
  [fdo#110403]: https://bugs.freedesktop.org/show_bug.cgi?id=110403
  [fdo#110841]: https://bugs.freedesktop.org/show_bug.cgi?id=110841
  [fdo#111325]: https://bugs.freedesktop.org/show_bug.cgi?id=111325
  [k.org#198133]: https://bugzilla.kernel.org/show_bug.cgi?id=198133


Participating hosts (10 -> 10)
------------------------------

  No changes in participating hosts


Build changes
-------------

  * CI: CI-20190529 -> None
  * Linux: CI_DRM_6749 -> Patchwork_14103

  CI-20190529: 20190529
  CI_DRM_6749: 889140938c5c4bb9f2df652dd23d16fdcb86db72 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_5146: 357dbe1869d88a2f08bcee4eebceff4ee9014424 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_14103: 7795590348e30978962fd2c9c28673b3097f20ae @ git://anongit.freedesktop.org/gfx-ci/linux
  piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14103/
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Re: [PATCH 1/5] drm/i915/dp: stylistic cleanup around hdcp2_msg_data

[Jani Nikula]

On Tue, 20 Aug 2019, Ramalingam C <ramalingam.c@intel.com> wrote:
> On 2019-08-20 at 16:40:15 +0300, Jani Nikula wrote:
>> Split struct declaration and array definition. Fix indents and
>> whitespace. No functional changes.
>> 
>
> Reviewed-by: Ramalingam C <ramalingam.c@intel.com>

Thanks, pushed the lot.

BR,
Jani.


>
> -Ram
>> Cc: Ramalingam C <ramalingam.c@intel.com>
>> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
>> ---
>>  drivers/gpu/drm/i915/display/intel_dp.c | 70 +++++++++++++------------
>>  1 file changed, 36 insertions(+), 34 deletions(-)
>> 
>> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
>> index 5c45a3bb102d..001d520660a9 100644
>> --- a/drivers/gpu/drm/i915/display/intel_dp.c
>> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
>> @@ -5812,47 +5812,49 @@ struct hdcp2_dp_errata_stream_type {
>>  	u8	stream_type;
>>  } __packed;
>>  
>> -static struct hdcp2_dp_msg_data {
>> +struct hdcp2_dp_msg_data {
>>  	u8 msg_id;
>>  	u32 offset;
>>  	bool msg_detectable;
>>  	u32 timeout;
>>  	u32 timeout2; /* Added for non_paired situation */
>> -	} hdcp2_msg_data[] = {
>> -		{HDCP_2_2_AKE_INIT, DP_HDCP_2_2_AKE_INIT_OFFSET, false, 0, 0},
>> -		{HDCP_2_2_AKE_SEND_CERT, DP_HDCP_2_2_AKE_SEND_CERT_OFFSET,
>> -				false, HDCP_2_2_CERT_TIMEOUT_MS, 0},
>> -		{HDCP_2_2_AKE_NO_STORED_KM, DP_HDCP_2_2_AKE_NO_STORED_KM_OFFSET,
>> -				false, 0, 0},
>> -		{HDCP_2_2_AKE_STORED_KM, DP_HDCP_2_2_AKE_STORED_KM_OFFSET,
>> -				false, 0, 0},
>> -		{HDCP_2_2_AKE_SEND_HPRIME, DP_HDCP_2_2_AKE_SEND_HPRIME_OFFSET,
>> -				true, HDCP_2_2_HPRIME_PAIRED_TIMEOUT_MS,
>> -				HDCP_2_2_HPRIME_NO_PAIRED_TIMEOUT_MS},
>> -		{HDCP_2_2_AKE_SEND_PAIRING_INFO,
>> -				DP_HDCP_2_2_AKE_SEND_PAIRING_INFO_OFFSET, true,
>> -				HDCP_2_2_PAIRING_TIMEOUT_MS, 0},
>> -		{HDCP_2_2_LC_INIT, DP_HDCP_2_2_LC_INIT_OFFSET, false, 0, 0},
>> -		{HDCP_2_2_LC_SEND_LPRIME, DP_HDCP_2_2_LC_SEND_LPRIME_OFFSET,
>> -				false, HDCP_2_2_DP_LPRIME_TIMEOUT_MS, 0},
>> -		{HDCP_2_2_SKE_SEND_EKS, DP_HDCP_2_2_SKE_SEND_EKS_OFFSET, false,
>> -				0, 0},
>> -		{HDCP_2_2_REP_SEND_RECVID_LIST,
>> -				DP_HDCP_2_2_REP_SEND_RECVID_LIST_OFFSET, true,
>> -				HDCP_2_2_RECVID_LIST_TIMEOUT_MS, 0},
>> -		{HDCP_2_2_REP_SEND_ACK, DP_HDCP_2_2_REP_SEND_ACK_OFFSET, false,
>> -				0, 0},
>> -		{HDCP_2_2_REP_STREAM_MANAGE,
>> -				DP_HDCP_2_2_REP_STREAM_MANAGE_OFFSET, false,
>> -				0, 0},
>> -		{HDCP_2_2_REP_STREAM_READY, DP_HDCP_2_2_REP_STREAM_READY_OFFSET,
>> -				false, HDCP_2_2_STREAM_READY_TIMEOUT_MS, 0},
>> +};
>> +
>> +static struct hdcp2_dp_msg_data hdcp2_msg_data[] = {
>> +	{ HDCP_2_2_AKE_INIT, DP_HDCP_2_2_AKE_INIT_OFFSET, false, 0, 0 },
>> +	{ HDCP_2_2_AKE_SEND_CERT, DP_HDCP_2_2_AKE_SEND_CERT_OFFSET,
>> +	  false, HDCP_2_2_CERT_TIMEOUT_MS, 0 },
>> +	{ HDCP_2_2_AKE_NO_STORED_KM, DP_HDCP_2_2_AKE_NO_STORED_KM_OFFSET,
>> +	  false, 0, 0 },
>> +	{ HDCP_2_2_AKE_STORED_KM, DP_HDCP_2_2_AKE_STORED_KM_OFFSET,
>> +	  false, 0, 0 },
>> +	{ HDCP_2_2_AKE_SEND_HPRIME, DP_HDCP_2_2_AKE_SEND_HPRIME_OFFSET,
>> +	  true, HDCP_2_2_HPRIME_PAIRED_TIMEOUT_MS,
>> +	  HDCP_2_2_HPRIME_NO_PAIRED_TIMEOUT_MS },
>> +	{ HDCP_2_2_AKE_SEND_PAIRING_INFO,
>> +	  DP_HDCP_2_2_AKE_SEND_PAIRING_INFO_OFFSET, true,
>> +	  HDCP_2_2_PAIRING_TIMEOUT_MS, 0 },
>> +	{ HDCP_2_2_LC_INIT, DP_HDCP_2_2_LC_INIT_OFFSET, false, 0, 0 },
>> +	{ HDCP_2_2_LC_SEND_LPRIME, DP_HDCP_2_2_LC_SEND_LPRIME_OFFSET,
>> +	  false, HDCP_2_2_DP_LPRIME_TIMEOUT_MS, 0 },
>> +	{ HDCP_2_2_SKE_SEND_EKS, DP_HDCP_2_2_SKE_SEND_EKS_OFFSET, false,
>> +	  0, 0 },
>> +	{ HDCP_2_2_REP_SEND_RECVID_LIST,
>> +	  DP_HDCP_2_2_REP_SEND_RECVID_LIST_OFFSET, true,
>> +	  HDCP_2_2_RECVID_LIST_TIMEOUT_MS, 0 },
>> +	{ HDCP_2_2_REP_SEND_ACK, DP_HDCP_2_2_REP_SEND_ACK_OFFSET, false,
>> +	  0, 0 },
>> +	{ HDCP_2_2_REP_STREAM_MANAGE,
>> +	  DP_HDCP_2_2_REP_STREAM_MANAGE_OFFSET, false,
>> +	  0, 0 },
>> +	{ HDCP_2_2_REP_STREAM_READY, DP_HDCP_2_2_REP_STREAM_READY_OFFSET,
>> +	  false, HDCP_2_2_STREAM_READY_TIMEOUT_MS, 0 },
>>  /* local define to shovel this through the write_2_2 interface */
>>  #define HDCP_2_2_ERRATA_DP_STREAM_TYPE	50
>> -		{HDCP_2_2_ERRATA_DP_STREAM_TYPE,
>> -				DP_HDCP_2_2_REG_STREAM_TYPE_OFFSET, false,
>> -				0, 0},
>> -		};
>> +	{ HDCP_2_2_ERRATA_DP_STREAM_TYPE,
>> +	  DP_HDCP_2_2_REG_STREAM_TYPE_OFFSET, false,
>> +	  0, 0 },
>> +};
>>  
>>  static inline
>>  int intel_dp_hdcp2_read_rx_status(struct intel_digital_port *intel_dig_port,
>> -- 
>> 2.20.1
>> 

-- 
Jani Nikula, Intel Open Source Graphics Center
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