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From: Cezary Rojewski <cezary.rojewski@intel.com>
To: alsa-devel@alsa-project.org
Cc: lgirdwood@gmail.com, Cezary Rojewski <cezary.rojewski@intel.com>,
	broonie@kernel.org, tiwai@suse.com,
	pierre-louis.bossart@linux.intel.com
Subject: [PATCH 02/35] ASoC: Intel: Skylake: Add FIRMWARE_CONFIG IPC request
Date: Thu, 22 Aug 2019 21:03:52 +0200	[thread overview]
Message-ID: <20190822190425.23001-3-cezary.rojewski@intel.com> (raw)
In-Reply-To: <20190822190425.23001-1-cezary.rojewski@intel.com>

Implement interface for retrieving firmware configuration. Skylake
driver will use this data instead of hardcoded values in updates to
come.

Most params are currently unused. In time driver dependency on fw config
will increase, and with it, more parsing will be unveiled.

Signed-off-by: Cezary Rojewski <cezary.rojewski@intel.com>
---
 sound/soc/intel/skylake/skl-sst-ipc.c | 122 ++++++++++++++++++++++++++
 sound/soc/intel/skylake/skl-sst-ipc.h |  72 +++++++++++++++
 sound/soc/intel/skylake/skl.h         |   1 +
 3 files changed, 195 insertions(+)

diff --git a/sound/soc/intel/skylake/skl-sst-ipc.c b/sound/soc/intel/skylake/skl-sst-ipc.c
index 667cdddc289f..e9e11ec4c97b 100644
--- a/sound/soc/intel/skylake/skl-sst-ipc.c
+++ b/sound/soc/intel/skylake/skl-sst-ipc.c
@@ -11,6 +11,7 @@
 #include "skl.h"
 #include "skl-sst-dsp.h"
 #include "skl-sst-ipc.h"
+#include "skl-topology.h"
 #include "sound/hdaudio_ext.h"
 
 
@@ -1067,3 +1068,124 @@ int skl_ipc_set_d0ix(struct sst_generic_ipc *ipc, struct skl_ipc_d0ix_msg *msg)
 	return ret;
 }
 EXPORT_SYMBOL_GPL(skl_ipc_set_d0ix);
+
+int skl_ipc_fw_cfg_get(struct sst_generic_ipc *ipc, struct skl_fw_cfg *cfg)
+{
+	struct skl_ipc_large_config_msg msg = {0};
+	struct skl_tlv *tlv;
+	size_t bytes = 0, offset = 0;
+	u8 *payload = NULL;
+	int ret;
+
+	msg.module_id = 0;
+	msg.instance_id = 0;
+	msg.large_param_id = SKL_BASEFW_FIRMWARE_CONFIG;
+
+	ret = skl_ipc_get_large_config(ipc, &msg, (u32 **)&payload, &bytes);
+	if (ret)
+		goto exit;
+
+	while (offset < bytes) {
+		tlv = (struct skl_tlv *)(payload + offset);
+
+		switch (tlv->type) {
+		case SKL_FW_CFG_FW_VERSION:
+			memcpy(&cfg->fw_version, tlv->value,
+				sizeof(cfg->fw_version));
+			break;
+
+		case SKL_FW_CFG_MEMORY_RECLAIMED:
+			cfg->memory_reclaimed = *tlv->value;
+			break;
+
+		case SKL_FW_CFG_SLOW_CLOCK_FREQ_HZ:
+			cfg->slow_clock_freq_hz = *tlv->value;
+			break;
+
+		case SKL_FW_CFG_FAST_CLOCK_FREQ_HZ:
+			cfg->fast_clock_freq_hz = *tlv->value;
+			break;
+
+		case SKL_FW_CFG_ALH_SUPPORT_LEVEL:
+			cfg->alh_support = *tlv->value;
+			break;
+
+		case SKL_FW_CFG_IPC_DL_MAILBOX_BYTES:
+			cfg->ipc_dl_mailbox_bytes = *tlv->value;
+			break;
+
+		case SKL_FW_CFG_IPC_UL_MAILBOX_BYTES:
+			cfg->ipc_ul_mailbox_bytes = *tlv->value;
+			break;
+
+		case SKL_FW_CFG_TRACE_LOG_BYTES:
+			cfg->trace_log_bytes = *tlv->value;
+			break;
+
+		case SKL_FW_CFG_MAX_PPL_COUNT:
+			cfg->max_ppl_count = *tlv->value;
+			break;
+
+		case SKL_FW_CFG_MAX_ASTATE_COUNT:
+			cfg->max_astate_count = *tlv->value;
+			break;
+
+		case SKL_FW_CFG_MAX_MODULE_PIN_COUNT:
+			cfg->max_module_pin_count = *tlv->value;
+			break;
+
+		case SKL_FW_CFG_MODULES_COUNT:
+			cfg->modules_count = *tlv->value;
+			break;
+
+		case SKL_FW_CFG_MAX_MOD_INST_COUNT:
+			cfg->max_mod_inst_count = *tlv->value;
+			break;
+
+		case SKL_FW_CFG_MAX_LL_TASKS_PER_PRI_COUNT:
+			cfg->max_ll_tasks_per_pri_count = *tlv->value;
+			break;
+
+		case SKL_FW_CFG_LL_PRI_COUNT:
+			cfg->ll_pri_count = *tlv->value;
+			break;
+
+		case SKL_FW_CFG_MAX_DP_TASKS_COUNT:
+			cfg->max_dp_tasks_count = *tlv->value;
+			break;
+
+		case SKL_FW_CFG_MAX_LIBS_COUNT:
+			cfg->max_libs_count = *tlv->value;
+			break;
+
+		case SKL_FW_CFG_XTAL_FREQ_HZ:
+			cfg->xtal_freq_hz = *tlv->value;
+			break;
+
+		case SKL_FW_CFG_UAOL_SUPPORT:
+			cfg->uaol_support = *tlv->value;
+			break;
+
+		case SKL_FW_CFG_POWER_GATING_POLICY:
+			cfg->power_gating_policy = *tlv->value;
+			break;
+
+		case SKL_FW_CFG_DMA_BUFFER_CONFIG:
+		case SKL_FW_CFG_SCHEDULER_CONFIG:
+		case SKL_FW_CFG_CLOCKS_CONFIG:
+			break;
+
+		default:
+			dev_info(ipc->dev, "Unrecognized fw param: %d\n",
+				tlv->type);
+			break;
+		}
+
+		offset += sizeof(*tlv) + tlv->length;
+	}
+
+exit:
+	kfree(payload);
+	return ret;
+}
+EXPORT_SYMBOL_GPL(skl_ipc_fw_cfg_get);
diff --git a/sound/soc/intel/skylake/skl-sst-ipc.h b/sound/soc/intel/skylake/skl-sst-ipc.h
index 0058d82bd5a4..ebc5852e15d0 100644
--- a/sound/soc/intel/skylake/skl-sst-ipc.h
+++ b/sound/soc/intel/skylake/skl-sst-ipc.h
@@ -15,6 +15,12 @@
 struct sst_dsp;
 struct sst_generic_ipc;
 
+struct skl_tlv {
+	u32 type;
+	u32 length;
+	u8 value[0];
+};
+
 enum skl_ipc_pipeline_state {
 	PPL_INVALID_STATE =	0,
 	PPL_UNINITIALIZED =	1,
@@ -70,6 +76,69 @@ struct skl_lib_info {
 enum skl_basefw_runtime_param {
 	SKL_BASEFW_ASTATE_TABLE = 4,
 	SKL_BASEFW_DMA_CONTROL = 5,
+	SKL_BASEFW_FIRMWARE_CONFIG = 7,
+};
+
+enum skl_fw_cfg_params {
+	SKL_FW_CFG_FW_VERSION = 0,
+	SKL_FW_CFG_MEMORY_RECLAIMED,
+	SKL_FW_CFG_SLOW_CLOCK_FREQ_HZ,
+	SKL_FW_CFG_FAST_CLOCK_FREQ_HZ,
+	SKL_FW_CFG_DMA_BUFFER_CONFIG,
+	SKL_FW_CFG_ALH_SUPPORT_LEVEL,
+	SKL_FW_CFG_IPC_DL_MAILBOX_BYTES,
+	SKL_FW_CFG_IPC_UL_MAILBOX_BYTES,
+	SKL_FW_CFG_TRACE_LOG_BYTES,
+	SKL_FW_CFG_MAX_PPL_COUNT,
+	SKL_FW_CFG_MAX_ASTATE_COUNT,
+	SKL_FW_CFG_MAX_MODULE_PIN_COUNT,
+	SKL_FW_CFG_MODULES_COUNT,
+	SKL_FW_CFG_MAX_MOD_INST_COUNT,
+	SKL_FW_CFG_MAX_LL_TASKS_PER_PRI_COUNT,
+	SKL_FW_CFG_LL_PRI_COUNT,
+	SKL_FW_CFG_MAX_DP_TASKS_COUNT,
+	SKL_FW_CFG_MAX_LIBS_COUNT,
+	SKL_FW_CFG_SCHEDULER_CONFIG,
+	SKL_FW_CFG_XTAL_FREQ_HZ,
+	SKL_FW_CFG_CLOCKS_CONFIG,
+	SKL_FW_CFG_UAOL_SUPPORT,
+	SKL_FW_CFG_POWER_GATING_POLICY,
+	SKL_FW_CFG_ASSERT_MODE,
+};
+
+struct skl_fw_version {
+	u16 major;
+	u16 minor;
+	u16 hotfix;
+	u16 build;
+};
+
+enum skl_alh_support_level {
+	ALH_NO_SUPPORT = 0x00000,
+	ALH_CAVS_1_8_CNL = 0x10000,
+};
+
+struct skl_fw_cfg {
+	struct skl_fw_version fw_version;
+	u32 memory_reclaimed;
+	u32 slow_clock_freq_hz;
+	u32 fast_clock_freq_hz;
+	enum skl_alh_support_level alh_support;
+	u32 ipc_dl_mailbox_bytes;
+	u32 ipc_ul_mailbox_bytes;
+	u32 trace_log_bytes;
+	u32 max_ppl_count;
+	u32 max_astate_count;
+	u32 max_module_pin_count;
+	u32 modules_count;
+	u32 max_mod_inst_count;
+	u32 max_ll_tasks_per_pri_count;
+	u32 ll_pri_count;
+	u32 max_dp_tasks_count;
+	u32 max_libs_count;
+	u32 xtal_freq_hz;
+	u32 uaol_support;
+	u32 power_gating_policy;
 };
 
 struct skl_ipc_init_instance_msg {
@@ -171,4 +240,7 @@ int skl_ipc_process_notification(struct sst_generic_ipc *ipc,
 		struct skl_ipc_header header);
 void skl_ipc_tx_data_copy(struct ipc_message *msg, char *tx_data,
 		size_t tx_size);
+
+int skl_ipc_fw_cfg_get(struct sst_generic_ipc *ipc, struct skl_fw_cfg *cfg);
+
 #endif /* __SKL_IPC_H */
diff --git a/sound/soc/intel/skylake/skl.h b/sound/soc/intel/skylake/skl.h
index f8c714153610..0d1c820e11cd 100644
--- a/sound/soc/intel/skylake/skl.h
+++ b/sound/soc/intel/skylake/skl.h
@@ -110,6 +110,7 @@ struct skl_dev {
 
 	/* Populate module information */
 	struct list_head uuid_list;
+	struct skl_fw_cfg fw_cfg;
 
 	/* Is firmware loaded */
 	bool fw_loaded;
-- 
2.17.1

  parent reply	other threads:[~2019-08-22 19:04 UTC|newest]

Thread overview: 107+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-08-22 19:03 [PATCH 00/35] ASoC: Intel: Clenaup SST initialization Cezary Rojewski
2019-08-22 19:03 ` [PATCH 01/35] ASoC: Intel: Skylake: Put FW runtime params defs in one place Cezary Rojewski
2019-08-22 19:03 ` Cezary Rojewski [this message]
2019-08-23 18:24   ` [PATCH 02/35] ASoC: Intel: Skylake: Add FIRMWARE_CONFIG IPC request Pierre-Louis Bossart
2019-08-24  9:17     ` Cezary Rojewski
2019-08-26 16:27       ` Pierre-Louis Bossart
2019-08-26 19:34         ` Cezary Rojewski
2019-08-22 19:03 ` [PATCH 03/35] ASoC: Intel: Skylake: Add HARDWARE_CONFIG " Cezary Rojewski
2019-08-23 18:32   ` Pierre-Louis Bossart
2019-08-24  9:30     ` Cezary Rojewski
2019-08-22 19:03 ` [PATCH 04/35] ASoC: Intel: Skylake: Unify firmware loading mechanism Cezary Rojewski
2019-08-23 18:40   ` Pierre-Louis Bossart
2019-08-24  9:34     ` Cezary Rojewski
2019-08-26 16:31       ` Pierre-Louis Bossart
2019-08-26 19:50         ` Cezary Rojewski
2019-08-22 19:03 ` [PATCH 05/35] ASoC: Intel: Skylake: Reload libraries on D0 entry for CNL Cezary Rojewski
2019-08-22 19:03 ` [PATCH 06/35] ASoC: Intel: Skylake: Unhardcode dsp cores number Cezary Rojewski
2019-08-22 19:03 ` [PATCH 07/35] ASoC: Intel: Skylake: Update interrupt disabling routine Cezary Rojewski
2019-08-22 19:03 ` [PATCH 08/35] ASoC: Intel: Skylake: Inline ipc free operations Cezary Rojewski
2019-08-22 19:03 ` [PATCH 09/35] ASoC: Intel: Skylake: Unify driver cleanup mechanism Cezary Rojewski
2019-08-22 19:04 ` [PATCH 10/35] ASoC: Intel: Relocate irq thread header to sst_ops Cezary Rojewski
2019-08-22 19:04 ` [PATCH 11/35] ASoC: Intel: Merge sst_dsp_device into sst_pdata Cezary Rojewski
2019-08-23 18:54   ` Pierre-Louis Bossart
2019-08-24 10:52     ` Cezary Rojewski
2019-08-22 19:04 ` [PATCH 12/35] ASoC: Intel: Skylake: Reuse sst_dsp_free Cezary Rojewski
2019-08-23 19:07   ` Pierre-Louis Bossart
2019-08-24  9:35     ` Cezary Rojewski
2019-08-22 19:04 ` [PATCH 13/35] ASoC: Intel: Skylake: Reuse sst_dsp_new Cezary Rojewski
2019-08-23 19:09   ` Pierre-Louis Bossart
2019-08-24  9:37     ` Cezary Rojewski
2019-08-22 19:04 ` [PATCH 14/35] ASoC: Intel: Skylake: Remove skl_dsp_acquire_irq Cezary Rojewski
2019-08-22 19:04 ` [PATCH 15/35] ASoC: Intel: Skylake: Use dsp loading functions directly Cezary Rojewski
2019-08-23 19:17   ` Pierre-Louis Bossart
2019-08-24  9:41     ` Cezary Rojewski
2019-08-22 19:04 ` [PATCH 16/35] ASoC: Intel: Skylake: Make dsp_ops::stream_tag obsolete Cezary Rojewski
2019-08-22 19:04 ` [PATCH 17/35] ASoC: Intel: Skylake: Remove skl_dsp_loader_ops Cezary Rojewski
2019-08-23 19:21   ` Pierre-Louis Bossart
2019-08-24  9:49     ` Cezary Rojewski
2019-08-22 19:04 ` [PATCH 18/35] ASoC: Intel: Skylake: Remove window0 sst_addr fields Cezary Rojewski
2019-08-23 19:26   ` Pierre-Louis Bossart
2019-08-24  9:57     ` Cezary Rojewski
2019-08-22 19:04 ` [PATCH 19/35] ASoC: Intel: Skylake: Remove redundant W0 and W1 macros Cezary Rojewski
2019-08-23 19:28   ` Pierre-Louis Bossart
2019-08-24 11:52     ` Cezary Rojewski
2019-08-24 12:04       ` Cezary Rojewski
2019-08-22 19:04 ` [PATCH 20/35] ASoC: Intel: Skylake: Remove redundant SRAM fields Cezary Rojewski
2019-08-22 19:04 ` [PATCH 21/35] ASoC: Intel: Expose ACPI loading members Cezary Rojewski
2019-08-23 19:32   ` Pierre-Louis Bossart
2019-08-24  9:58     ` Cezary Rojewski
2019-08-22 19:04 ` [PATCH 22/35] ASoC: Intel: Haswell: Define separate ACPI loader Cezary Rojewski
2019-08-23 19:35   ` Pierre-Louis Bossart
2019-08-24  9:59     ` Cezary Rojewski
2019-08-22 19:04 ` [PATCH 23/35] ASoC: Intel: Baytrail: " Cezary Rojewski
2019-08-23 19:36   ` Pierre-Louis Bossart
2019-08-22 19:04 ` [PATCH 24/35] ASoC: Intel: Refactor probing of ACPI devices Cezary Rojewski
2019-08-23 19:43   ` Pierre-Louis Bossart
2019-08-24 10:16     ` Cezary Rojewski
2019-08-22 19:04 ` [PATCH 25/35] ASoC: Intel: Skylake: Simplify skl_sst_ctx_init declaration Cezary Rojewski
2019-08-22 19:04 ` [PATCH 26/35] ASoC: Intel: Skylake: Simplify all sst_dsp_init declarations Cezary Rojewski
2019-08-22 19:04 ` [PATCH 27/35] ASoC: Intel: Skylake: Define platform descriptors Cezary Rojewski
2019-08-23 19:50   ` Pierre-Louis Bossart
2019-08-24 10:51     ` Cezary Rojewski
2019-08-26 17:13       ` Pierre-Louis Bossart
2019-08-26 19:18         ` Cezary Rojewski
2019-08-26 21:53           ` Pierre-Louis Bossart
2019-08-22 19:04 ` [PATCH 28/35] ASoC: Intel: Skylake: Update skl_ids table Cezary Rojewski
2019-08-23 20:15   ` Pierre-Louis Bossart
2019-08-22 19:04 ` [PATCH 29/35] ASoC: Intel: Skylake: Flip SST initialization order Cezary Rojewski
2019-08-23 20:18   ` Pierre-Louis Bossart
2019-08-24 10:54     ` Cezary Rojewski
2019-08-26 16:39       ` Pierre-Louis Bossart
2019-08-26 20:03         ` Cezary Rojewski
2019-08-22 19:04 ` [PATCH 30/35] ASoC: Intel: Reuse sst_pdata::fw_name field Cezary Rojewski
2019-08-23 20:20   ` Pierre-Louis Bossart
2019-08-24 10:57     ` Cezary Rojewski
2019-08-22 19:04 ` [PATCH 31/35] ASoC: Intel: Reuse sst_pdata::fw field Cezary Rojewski
2019-08-22 19:04 ` [PATCH 32/35] ASoC: Intel: Skylake: Remove skl_dsp_ops Cezary Rojewski
2019-08-22 19:04 ` [PATCH 33/35] ASoC: Intel: Skylake: Privatize SST init handlers Cezary Rojewski
2019-08-23 20:25   ` Pierre-Louis Bossart
2019-08-24 11:01     ` Cezary Rojewski
2019-08-22 19:04 ` [PATCH 34/35] ASoC: Intel: Skylake: Merge skl_sst_ctx_init into skl_init_dsp Cezary Rojewski
2019-08-22 19:04 ` [PATCH 35/35] ASoC: Intel: Remove obsolete firmware fields Cezary Rojewski
2019-08-23 20:27   ` Pierre-Louis Bossart
2019-08-24 11:02     ` Cezary Rojewski
2019-08-22 20:55 ` [PATCH 00/35] ASoC: Intel: Clenaup SST initialization Pierre-Louis Bossart
2019-08-23  8:29   ` Cezary Rojewski
2019-08-23 10:26     ` Mark Brown
2019-08-23 10:43       ` Cezary Rojewski
2019-08-23 16:26         ` Pierre-Louis Bossart
2019-08-23 18:44           ` Cezary Rojewski
2019-08-23 20:12             ` Pierre-Louis Bossart
2019-08-23 21:39               ` Mark Brown
2019-08-24 13:51                 ` Cezary Rojewski
2019-08-25 11:06                   ` Cezary Rojewski
2019-08-26  7:24                     ` Wasko, Michal
2019-08-26 16:51                       ` Pierre-Louis Bossart
2019-08-26 20:08                         ` Cezary Rojewski
2019-08-26 21:57                           ` Pierre-Louis Bossart
2019-08-27  8:33                             ` Wasko, Michal
2019-08-27 13:52                               ` Pierre-Louis Bossart
2019-08-27 14:58                                 ` Cezary Rojewski
2019-08-27 15:00                                   ` Pierre-Louis Bossart
2019-08-27 15:08                                     ` Cezary Rojewski
2019-08-27 17:18                                       ` Pierre-Louis Bossart
2019-08-27 18:13                                         ` Cezary Rojewski
2019-08-27 19:20                                         ` Mark Brown
2019-08-27 19:06                         ` Mark Brown

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