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From: "Wasko, Michal" <michal.wasko@linux.intel.com>
To: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>,
	Cezary Rojewski <cezary.rojewski@intel.com>,
	Mark Brown <broonie@kernel.org>
Cc: "Wasko, Michal" <michal.wasko@intel.com>,
	alsa-devel@alsa-project.org, "Kaczmarski,
	Filip" <filip.kaczmarski@intel.com>,
	lgirdwood@gmail.com, tiwai@suse.com
Subject: Re: [PATCH 00/35] ASoC: Intel: Clenaup SST initialization
Date: Tue, 27 Aug 2019 10:33:23 +0200	[thread overview]
Message-ID: <92ddf26a-f0ca-469d-2ccd-68a3e9cb2e6a@linux.intel.com> (raw)
In-Reply-To: <47683473-c177-055b-03fe-2f01feeb4016@linux.intel.com>

On 8/26/2019 11:57 PM, Pierre-Louis Bossart wrote:

>
>
> On 8/26/19 3:08 PM, Cezary Rojewski wrote:
>> On 2019-08-26 18:51, Pierre-Louis Bossart wrote:
>>>
>>>
>>> On 8/26/19 2:24 AM, Wasko, Michal wrote:
>>>>
>>>> On 8/25/2019 1:06 PM, Cezary Rojewski wrote:
>>>>> On 2019-08-24 15:51, Cezary Rojewski wrote:
>>>>>> On 2019-08-23 23:39, Mark Brown wrote:
>>>>>>> On Fri, Aug 23, 2019 at 03:12:18PM -0500, Pierre-Louis Bossart 
>>>>>>> wrote:
>>>>>>>> On 8/23/19 1:44 PM, Cezary Rojewski wrote:
>>>>>>>
>>>>>>>>> Wasn't lying about FW version being unreliable. Let's say vendor
>>>>>>>>> receives quick FW drop with new RCR.. such eng drop may carry 
>>>>>>>>> invalid
>>>>>>>>> numbers such as 0.0.0.0..
>>>>>>>>> In general, I try to avoid relying on FW version whenever 
>>>>>>>>> possible. It
>>>>>>>>> can be dumped for debug reasons, true, but to be relied on? 
>>>>>>>>> Not really.
>>>>>>>
>>>>>>>> Goodness, that's really bad. I didn't realize this.
>>>>>>>
>>>>>>> At a previous employer I modified our build stamping
>>>>>>> infrastructure to also include both a timestamp and a serialized
>>>>>>> build number in the version number since one of my colleagues was
>>>>>>> fond of sending people prereleases of what he was working on to
>>>>>>> other people with identical version numbers on different
>>>>>>> binaries leading to much confusion and checksumming. You do see
>>>>>>> a lot of things with those serialized version numbers, especially
>>>>>>> SVN based projects.
>>>>>>>
>>>>>>>>> Personally, I'm against all hardcodes and would simply 
>>>>>>>>> recommend all
>>>>>>>>> user to redirect their symlinks when they do switch kernel - 
>>>>>>>>> along with
>>>>>>>>> dumping warning/ error message in dmesg. Hardcodes bring 
>>>>>>>>> problems with
>>>>>>>>> forward compatibility and that's why host should offload them 
>>>>>>>>> away to
>>>>>>>>> FW.
>>>>>>>
>>>>>>>> Cezary, I know you are not responsible for all this, but at 
>>>>>>>> this point if we
>>>>>>>> (Intel) can't guarantee any sort of interoperability with both 
>>>>>>>> firmware and
>>>>>>>> topology we should make it clear that this driver is not 
>>>>>>>> recommended unless
>>>>>>>> specific versions of the firmware/topology are used, and as a 
>>>>>>>> consequence
>>>>>>>> the typical client distros and desktop/laptop users should use 
>>>>>>>> HDaudio
>>>>>>>> legacy or SOF (for DMICs)
>>>>>>>
>>>>>>> Not the most elegent solution but I'm wondering if keeping a copy
>>>>>>> of the driver as is around and using new locations for the fixed
>>>>>>> firmware might be the safest way to handle this.  We could have a
>>>>>>> wrapper which tries to load the newer firmware and uses the fixed
>>>>>>> driver code if that's there, otherwise tries the old driver with
>>>>>>> the existing firmware paths.  This is obviously a horror show and
>>>>>>> leaves the old code sitting there but given the mistakes that
>>>>>>> have been made the whole situation looks like a house of cards.
>>>>>>>
>>>>>>
>>>>>> Thanks for the feedback Mark. While I'm not yet on the "SOF will 
>>>>>> fix this" train, I'm keen to agree to leaving this entirely to 
>>>>>> SOF if it comes down to us duplicating /skylake.
>>>>>>
>>>>>> However, we are not going to give up that easily. I'll see if 
>>>>>> some "golden config" hardcodes can't be provided in some legacy.c 
>>>>>> file which would be fetched if initial setup fails. E.g.: 2cores, 
>>>>>> 3ssps, 1PAGE_SIZE per trace buffer.. and such. There are quite a 
>>>>>> few factors to take into consideration though. If "asking" user 
>>>>>> via dmesg to upgrade the firmware if his/her setup contains 
>>>>>> obsolete binary is really not an option, then some magic words 
>>>>>> got to be involved.
>>>>>>
>>>>>> Czarek
>>>>>
>>>>> On the second thought what if instead of duplicating kernel code, 
>>>>> binaries would be duplicated?
>>>>> I.e. rather than targeting /intel/dsp_fw_cnl.bin, _new_ /skylake 
>>>>> would be expecting /intel/dsp_fw_cnl_release.bin? Same with 
>>>>> topology binaries.
>>>>> In such case, we "only" need to figure out how to propagate new 
>>>>> files to Linux distos so whenever someone updates their kernel, 
>>>>> new binaries are already present in their /lib/firmware.
>>>>>
>>>>> If such option is valid, we can postpone /skylake upgrade till 5.4 
>>>>> merging window closes and the patches (rough estimation is 150) 
>>>>> would descend upon alsa-devel in time between 5.4 and 5.5.
>>>>
>>>> If the driver and FW update will be within the same kernel release 
>>>> then IMHO
>>>> there should be no compatibility problem between those two 
>>>> components, right?
>>>> This way kernel users willing to stick to old FW can stay on older 
>>>> kernel version while
>>>> others can update and receive all the latest FW functionality that 
>>>> was developed and enabled.
>>>
>>> I am not comfortable with precluding a kernel update because of a 
>>> single firmware file. There are all sort of reasons for updating a 
>>> kernel, security, sideband attacks and Android CDD compatibility 
>>> being the most obvious ones.
>>>
The single firmware file will not be a blocker as the driver included in 
updated kernel will support it.
All you have to do is the little effort to re-generate your custom 
topology for the new firmware target.
The entire operation should not be a problem as there are dedicated 
utilities like FDK to do that.

Your statement Pierre suggest that everyone should avoid any functional 
changes in kernel
that are not critical because that would be problematic for others who 
switch from older kernel version.
>>>>
>>>> In terms of FW topology compatibility there is an option to read 
>>>> from topology manifest
>>>> a FW version that it was build for and in  case if it does not 
>>>> match FW version present on
>>>> the platform then print warning that the FW topology binary should 
>>>> be rebuild for current
>>>> FW version (x.x.x.x).
>>>
>>> Can you provide a pointer on how the FW version is embedded in a 
>>> .conf/.tplg file? I see a couple where that information does not 
>>> seem present.
>>>
>>>> The above approach at the end may be less confusing then source 
>>>> code or binary duplication.
>>>
>>
>> Indeed. Our existing topology skips that part of internal .xml and 
>> thus such information is not propagated to kernel.
>>
>> Pierre, how about the binary-duplication - as described above? Btw, 
>> that's not a single firmware file ^)^ We would immediately update all 
>> of them, together with topologies.
>
> I didn't understand how you would select the new firmwares? Some code 
> change needs to happen as well?
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  reply	other threads:[~2019-08-27  8:33 UTC|newest]

Thread overview: 107+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-08-22 19:03 [PATCH 00/35] ASoC: Intel: Clenaup SST initialization Cezary Rojewski
2019-08-22 19:03 ` [PATCH 01/35] ASoC: Intel: Skylake: Put FW runtime params defs in one place Cezary Rojewski
2019-08-22 19:03 ` [PATCH 02/35] ASoC: Intel: Skylake: Add FIRMWARE_CONFIG IPC request Cezary Rojewski
2019-08-23 18:24   ` Pierre-Louis Bossart
2019-08-24  9:17     ` Cezary Rojewski
2019-08-26 16:27       ` Pierre-Louis Bossart
2019-08-26 19:34         ` Cezary Rojewski
2019-08-22 19:03 ` [PATCH 03/35] ASoC: Intel: Skylake: Add HARDWARE_CONFIG " Cezary Rojewski
2019-08-23 18:32   ` Pierre-Louis Bossart
2019-08-24  9:30     ` Cezary Rojewski
2019-08-22 19:03 ` [PATCH 04/35] ASoC: Intel: Skylake: Unify firmware loading mechanism Cezary Rojewski
2019-08-23 18:40   ` Pierre-Louis Bossart
2019-08-24  9:34     ` Cezary Rojewski
2019-08-26 16:31       ` Pierre-Louis Bossart
2019-08-26 19:50         ` Cezary Rojewski
2019-08-22 19:03 ` [PATCH 05/35] ASoC: Intel: Skylake: Reload libraries on D0 entry for CNL Cezary Rojewski
2019-08-22 19:03 ` [PATCH 06/35] ASoC: Intel: Skylake: Unhardcode dsp cores number Cezary Rojewski
2019-08-22 19:03 ` [PATCH 07/35] ASoC: Intel: Skylake: Update interrupt disabling routine Cezary Rojewski
2019-08-22 19:03 ` [PATCH 08/35] ASoC: Intel: Skylake: Inline ipc free operations Cezary Rojewski
2019-08-22 19:03 ` [PATCH 09/35] ASoC: Intel: Skylake: Unify driver cleanup mechanism Cezary Rojewski
2019-08-22 19:04 ` [PATCH 10/35] ASoC: Intel: Relocate irq thread header to sst_ops Cezary Rojewski
2019-08-22 19:04 ` [PATCH 11/35] ASoC: Intel: Merge sst_dsp_device into sst_pdata Cezary Rojewski
2019-08-23 18:54   ` Pierre-Louis Bossart
2019-08-24 10:52     ` Cezary Rojewski
2019-08-22 19:04 ` [PATCH 12/35] ASoC: Intel: Skylake: Reuse sst_dsp_free Cezary Rojewski
2019-08-23 19:07   ` Pierre-Louis Bossart
2019-08-24  9:35     ` Cezary Rojewski
2019-08-22 19:04 ` [PATCH 13/35] ASoC: Intel: Skylake: Reuse sst_dsp_new Cezary Rojewski
2019-08-23 19:09   ` Pierre-Louis Bossart
2019-08-24  9:37     ` Cezary Rojewski
2019-08-22 19:04 ` [PATCH 14/35] ASoC: Intel: Skylake: Remove skl_dsp_acquire_irq Cezary Rojewski
2019-08-22 19:04 ` [PATCH 15/35] ASoC: Intel: Skylake: Use dsp loading functions directly Cezary Rojewski
2019-08-23 19:17   ` Pierre-Louis Bossart
2019-08-24  9:41     ` Cezary Rojewski
2019-08-22 19:04 ` [PATCH 16/35] ASoC: Intel: Skylake: Make dsp_ops::stream_tag obsolete Cezary Rojewski
2019-08-22 19:04 ` [PATCH 17/35] ASoC: Intel: Skylake: Remove skl_dsp_loader_ops Cezary Rojewski
2019-08-23 19:21   ` Pierre-Louis Bossart
2019-08-24  9:49     ` Cezary Rojewski
2019-08-22 19:04 ` [PATCH 18/35] ASoC: Intel: Skylake: Remove window0 sst_addr fields Cezary Rojewski
2019-08-23 19:26   ` Pierre-Louis Bossart
2019-08-24  9:57     ` Cezary Rojewski
2019-08-22 19:04 ` [PATCH 19/35] ASoC: Intel: Skylake: Remove redundant W0 and W1 macros Cezary Rojewski
2019-08-23 19:28   ` Pierre-Louis Bossart
2019-08-24 11:52     ` Cezary Rojewski
2019-08-24 12:04       ` Cezary Rojewski
2019-08-22 19:04 ` [PATCH 20/35] ASoC: Intel: Skylake: Remove redundant SRAM fields Cezary Rojewski
2019-08-22 19:04 ` [PATCH 21/35] ASoC: Intel: Expose ACPI loading members Cezary Rojewski
2019-08-23 19:32   ` Pierre-Louis Bossart
2019-08-24  9:58     ` Cezary Rojewski
2019-08-22 19:04 ` [PATCH 22/35] ASoC: Intel: Haswell: Define separate ACPI loader Cezary Rojewski
2019-08-23 19:35   ` Pierre-Louis Bossart
2019-08-24  9:59     ` Cezary Rojewski
2019-08-22 19:04 ` [PATCH 23/35] ASoC: Intel: Baytrail: " Cezary Rojewski
2019-08-23 19:36   ` Pierre-Louis Bossart
2019-08-22 19:04 ` [PATCH 24/35] ASoC: Intel: Refactor probing of ACPI devices Cezary Rojewski
2019-08-23 19:43   ` Pierre-Louis Bossart
2019-08-24 10:16     ` Cezary Rojewski
2019-08-22 19:04 ` [PATCH 25/35] ASoC: Intel: Skylake: Simplify skl_sst_ctx_init declaration Cezary Rojewski
2019-08-22 19:04 ` [PATCH 26/35] ASoC: Intel: Skylake: Simplify all sst_dsp_init declarations Cezary Rojewski
2019-08-22 19:04 ` [PATCH 27/35] ASoC: Intel: Skylake: Define platform descriptors Cezary Rojewski
2019-08-23 19:50   ` Pierre-Louis Bossart
2019-08-24 10:51     ` Cezary Rojewski
2019-08-26 17:13       ` Pierre-Louis Bossart
2019-08-26 19:18         ` Cezary Rojewski
2019-08-26 21:53           ` Pierre-Louis Bossart
2019-08-22 19:04 ` [PATCH 28/35] ASoC: Intel: Skylake: Update skl_ids table Cezary Rojewski
2019-08-23 20:15   ` Pierre-Louis Bossart
2019-08-22 19:04 ` [PATCH 29/35] ASoC: Intel: Skylake: Flip SST initialization order Cezary Rojewski
2019-08-23 20:18   ` Pierre-Louis Bossart
2019-08-24 10:54     ` Cezary Rojewski
2019-08-26 16:39       ` Pierre-Louis Bossart
2019-08-26 20:03         ` Cezary Rojewski
2019-08-22 19:04 ` [PATCH 30/35] ASoC: Intel: Reuse sst_pdata::fw_name field Cezary Rojewski
2019-08-23 20:20   ` Pierre-Louis Bossart
2019-08-24 10:57     ` Cezary Rojewski
2019-08-22 19:04 ` [PATCH 31/35] ASoC: Intel: Reuse sst_pdata::fw field Cezary Rojewski
2019-08-22 19:04 ` [PATCH 32/35] ASoC: Intel: Skylake: Remove skl_dsp_ops Cezary Rojewski
2019-08-22 19:04 ` [PATCH 33/35] ASoC: Intel: Skylake: Privatize SST init handlers Cezary Rojewski
2019-08-23 20:25   ` Pierre-Louis Bossart
2019-08-24 11:01     ` Cezary Rojewski
2019-08-22 19:04 ` [PATCH 34/35] ASoC: Intel: Skylake: Merge skl_sst_ctx_init into skl_init_dsp Cezary Rojewski
2019-08-22 19:04 ` [PATCH 35/35] ASoC: Intel: Remove obsolete firmware fields Cezary Rojewski
2019-08-23 20:27   ` Pierre-Louis Bossart
2019-08-24 11:02     ` Cezary Rojewski
2019-08-22 20:55 ` [PATCH 00/35] ASoC: Intel: Clenaup SST initialization Pierre-Louis Bossart
2019-08-23  8:29   ` Cezary Rojewski
2019-08-23 10:26     ` Mark Brown
2019-08-23 10:43       ` Cezary Rojewski
2019-08-23 16:26         ` Pierre-Louis Bossart
2019-08-23 18:44           ` Cezary Rojewski
2019-08-23 20:12             ` Pierre-Louis Bossart
2019-08-23 21:39               ` Mark Brown
2019-08-24 13:51                 ` Cezary Rojewski
2019-08-25 11:06                   ` Cezary Rojewski
2019-08-26  7:24                     ` Wasko, Michal
2019-08-26 16:51                       ` Pierre-Louis Bossart
2019-08-26 20:08                         ` Cezary Rojewski
2019-08-26 21:57                           ` Pierre-Louis Bossart
2019-08-27  8:33                             ` Wasko, Michal [this message]
2019-08-27 13:52                               ` Pierre-Louis Bossart
2019-08-27 14:58                                 ` Cezary Rojewski
2019-08-27 15:00                                   ` Pierre-Louis Bossart
2019-08-27 15:08                                     ` Cezary Rojewski
2019-08-27 17:18                                       ` Pierre-Louis Bossart
2019-08-27 18:13                                         ` Cezary Rojewski
2019-08-27 19:20                                         ` Mark Brown
2019-08-27 19:06                         ` Mark Brown

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