* [PATCH 0/2] New cdclk values for gen11+
@ 2019-08-26 22:55 Matt Roper
2019-08-26 22:55 ` [PATCH 1/2] drm/i915: Allow /2 CD2X divider on gen11+ Matt Roper
` (5 more replies)
0 siblings, 6 replies; 10+ messages in thread
From: Matt Roper @ 2019-08-26 22:55 UTC (permalink / raw)
To: intel-gfx; +Cc: Lucas De Marchi
The bspec was recently updated with new cdclk values 324mhz and
326.4mhz. These clock values are the first ones on gen11+ that use a
CD2X clock divider of /2 rather than /1 so we need a little bit of extra
logic to program the divider properly before actually enabling them.
Note that the bspec does have a note next to the /1 divider bits saying
"Use this setting for all CD frequencies" on gen11. I suspect that this
note is left over from before these new frequencies were added, but I'm
still confirming that with the hardware team. The note does not appear
on the TGL bspec.
Cc: José Roberto de Souza <jose.souza@intel.com>
Cc: Lucas De Marchi <lucas.demarchi@intel.com>
Matt Roper (2):
drm/i915: Allow /2 CD2X divider on gen11+
drm/i915: Add 324mhz and 326.4mhz cdclks for gen11+
drivers/gpu/drm/i915/display/intel_cdclk.c | 98 +++++++++-------------
drivers/gpu/drm/i915/i915_reg.h | 1 +
2 files changed, 42 insertions(+), 57 deletions(-)
--
2.20.1
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 10+ messages in thread
* [PATCH 1/2] drm/i915: Allow /2 CD2X divider on gen11+
2019-08-26 22:55 [PATCH 0/2] New cdclk values for gen11+ Matt Roper
@ 2019-08-26 22:55 ` Matt Roper
2019-08-27 13:52 ` Ville Syrjälä
2019-08-26 22:55 ` [PATCH 2/2] drm/i915: Add 324mhz and 326.4mhz cdclks for gen11+ Matt Roper
` (4 subsequent siblings)
5 siblings, 1 reply; 10+ messages in thread
From: Matt Roper @ 2019-08-26 22:55 UTC (permalink / raw)
To: intel-gfx; +Cc: Lucas De Marchi
The bspec has just recently been updated with new cdclk values that
require the use of a /2 CD2X divider rather than a /1 divider. Once we
add the divider selection logic to ICL+ cdclk programming, we have
pretty much the same logic we were already using on CNL, so it's simpler
to drop icl_set_cdclk() completely and reuse cnl_set_cdclk() on gen11+
platforms as well.
Cc: José Roberto de Souza <jose.souza@intel.com>
Cc: Lucas De Marchi <lucas.demarchi@intel.com>
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
---
drivers/gpu/drm/i915/display/intel_cdclk.c | 90 +++++++++-------------
drivers/gpu/drm/i915/i915_reg.h | 1 +
2 files changed, 36 insertions(+), 55 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.c b/drivers/gpu/drm/i915/display/intel_cdclk.c
index 939088c7d814..a56ccd0930e0 100644
--- a/drivers/gpu/drm/i915/display/intel_cdclk.c
+++ b/drivers/gpu/drm/i915/display/intel_cdclk.c
@@ -1659,10 +1659,23 @@ static void cnl_set_cdclk(struct drm_i915_private *dev_priv,
cnl_cdclk_pll_enable(dev_priv, vco);
val = divider | skl_cdclk_decimal(cdclk);
- if (pipe == INVALID_PIPE)
- val |= BXT_CDCLK_CD2X_PIPE_NONE;
- else
- val |= BXT_CDCLK_CD2X_PIPE(pipe);
+
+ if (INTEL_GEN(dev_priv) >= 12) {
+ if (pipe == INVALID_PIPE)
+ val |= ICL_CDCLK_CD2X_PIPE_NONE;
+ else
+ val |= BXT_CDCLK_CD2X_PIPE(pipe);
+ } else if (INTEL_GEN(dev_priv) >= 11) {
+ if (pipe == INVALID_PIPE)
+ val |= ICL_CDCLK_CD2X_PIPE_NONE;
+ else
+ val |= ICL_CDCLK_CD2X_PIPE(pipe);
+ } else {
+ if (pipe == INVALID_PIPE)
+ val |= BXT_CDCLK_CD2X_PIPE_NONE;
+ else
+ val |= BXT_CDCLK_CD2X_PIPE(pipe);
+ }
I915_WRITE(CDCLK_CTL, val);
if (pipe != INVALID_PIPE)
@@ -1813,51 +1826,6 @@ static int icl_calc_cdclk_pll_vco(struct drm_i915_private *dev_priv, int cdclk)
return dev_priv->cdclk.hw.ref * ratio;
}
-static void icl_set_cdclk(struct drm_i915_private *dev_priv,
- const struct intel_cdclk_state *cdclk_state,
- enum pipe pipe)
-{
- unsigned int cdclk = cdclk_state->cdclk;
- unsigned int vco = cdclk_state->vco;
- int ret;
-
- ret = skl_pcode_request(dev_priv, SKL_PCODE_CDCLK_CONTROL,
- SKL_CDCLK_PREPARE_FOR_CHANGE,
- SKL_CDCLK_READY_FOR_CHANGE,
- SKL_CDCLK_READY_FOR_CHANGE, 3);
- if (ret) {
- DRM_ERROR("Failed to inform PCU about cdclk change (%d)\n",
- ret);
- return;
- }
-
- if (dev_priv->cdclk.hw.vco != 0 &&
- dev_priv->cdclk.hw.vco != vco)
- cnl_cdclk_pll_disable(dev_priv);
-
- if (dev_priv->cdclk.hw.vco != vco)
- cnl_cdclk_pll_enable(dev_priv, vco);
-
- /*
- * On ICL CD2X_DIV can only be 1, so we'll never end up changing the
- * divider here synchronized to a pipe while CDCLK is on, nor will we
- * need the corresponding vblank wait.
- */
- I915_WRITE(CDCLK_CTL, ICL_CDCLK_CD2X_PIPE_NONE |
- skl_cdclk_decimal(cdclk));
-
- sandybridge_pcode_write(dev_priv, SKL_PCODE_CDCLK_CONTROL,
- cdclk_state->voltage_level);
-
- intel_update_cdclk(dev_priv);
-
- /*
- * Can't read out the voltage level :(
- * Let's just assume everything is as expected.
- */
- dev_priv->cdclk.hw.voltage_level = cdclk_state->voltage_level;
-}
-
static u8 icl_calc_voltage_level(struct drm_i915_private *dev_priv, int cdclk)
{
if (IS_ELKHARTLAKE(dev_priv)) {
@@ -1881,6 +1849,7 @@ static void icl_get_cdclk(struct drm_i915_private *dev_priv,
struct intel_cdclk_state *cdclk_state)
{
u32 val;
+ int div;
cdclk_state->bypass = 50000;
@@ -1914,10 +1883,21 @@ static void icl_get_cdclk(struct drm_i915_private *dev_priv,
cdclk_state->vco = (val & BXT_DE_PLL_RATIO_MASK) * cdclk_state->ref;
- val = I915_READ(CDCLK_CTL);
- WARN_ON((val & BXT_CDCLK_CD2X_DIV_SEL_MASK) != 0);
+ val = I915_READ(CDCLK_CTL) & BXT_CDCLK_CD2X_DIV_SEL_MASK;
+ switch (val) {
+ case BXT_CDCLK_CD2X_DIV_SEL_1:
+ div = 2;
+ break;
+ case BXT_CDCLK_CD2X_DIV_SEL_2:
+ div = 4;
+ break;
+ default:
+ MISSING_CASE(val);
+ div = 2;
+ break;
+ }
- cdclk_state->cdclk = cdclk_state->vco / 2;
+ cdclk_state->cdclk = cdclk_state->vco / div;
out:
/*
@@ -1963,7 +1943,7 @@ static void icl_init_cdclk(struct drm_i915_private *dev_priv)
icl_calc_voltage_level(dev_priv,
sanitized_state.cdclk);
- icl_set_cdclk(dev_priv, &sanitized_state, INVALID_PIPE);
+ cnl_set_cdclk(dev_priv, &sanitized_state, INVALID_PIPE);
}
static void icl_uninit_cdclk(struct drm_i915_private *dev_priv)
@@ -1975,7 +1955,7 @@ static void icl_uninit_cdclk(struct drm_i915_private *dev_priv)
cdclk_state.voltage_level = icl_calc_voltage_level(dev_priv,
cdclk_state.cdclk);
- icl_set_cdclk(dev_priv, &cdclk_state, INVALID_PIPE);
+ cnl_set_cdclk(dev_priv, &cdclk_state, INVALID_PIPE);
}
static void cnl_init_cdclk(struct drm_i915_private *dev_priv)
@@ -2810,7 +2790,7 @@ void intel_update_rawclk(struct drm_i915_private *dev_priv)
void intel_init_cdclk_hooks(struct drm_i915_private *dev_priv)
{
if (INTEL_GEN(dev_priv) >= 11) {
- dev_priv->display.set_cdclk = icl_set_cdclk;
+ dev_priv->display.set_cdclk = cnl_set_cdclk;
dev_priv->display.modeset_calc_cdclk = icl_modeset_calc_cdclk;
} else if (IS_CANNONLAKE(dev_priv)) {
dev_priv->display.set_cdclk = cnl_set_cdclk;
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index a142aa3d74e3..958dfdfb4e10 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -9671,6 +9671,7 @@ enum skl_power_gate {
#define BXT_CDCLK_CD2X_PIPE(pipe) ((pipe) << 20)
#define CDCLK_DIVMUX_CD_OVERRIDE (1 << 19)
#define BXT_CDCLK_CD2X_PIPE_NONE BXT_CDCLK_CD2X_PIPE(3)
+#define ICL_CDCLK_CD2X_PIPE(pipe) (_PICK(pipe, 0, 2, 6) << 19)
#define ICL_CDCLK_CD2X_PIPE_NONE (7 << 19)
#define BXT_CDCLK_SSA_PRECHARGE_ENABLE (1 << 16)
#define CDCLK_FREQ_DECIMAL_MASK (0x7ff)
--
2.20.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 10+ messages in thread
* [PATCH 2/2] drm/i915: Add 324mhz and 326.4mhz cdclks for gen11+
2019-08-26 22:55 [PATCH 0/2] New cdclk values for gen11+ Matt Roper
2019-08-26 22:55 ` [PATCH 1/2] drm/i915: Allow /2 CD2X divider on gen11+ Matt Roper
@ 2019-08-26 22:55 ` Matt Roper
2019-08-27 9:19 ` ✓ Fi.CI.BAT: success for New cdclk values " Patchwork
` (3 subsequent siblings)
5 siblings, 0 replies; 10+ messages in thread
From: Matt Roper @ 2019-08-26 22:55 UTC (permalink / raw)
To: intel-gfx; +Cc: Lucas De Marchi
The bspec was recently updated with these new cdclk values for ICL, EHL,
and TGL.
Bspec: 20598
Bspec: 49201
Cc: José Roberto de Souza <jose.souza@intel.com>
Cc: Lucas De Marchi <lucas.demarchi@intel.com>
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
---
drivers/gpu/drm/i915/display/intel_cdclk.c | 8 ++++++--
1 file changed, 6 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.c b/drivers/gpu/drm/i915/display/intel_cdclk.c
index a56ccd0930e0..64507ccb053c 100644
--- a/drivers/gpu/drm/i915/display/intel_cdclk.c
+++ b/drivers/gpu/drm/i915/display/intel_cdclk.c
@@ -1761,8 +1761,10 @@ static void cnl_sanitize_cdclk(struct drm_i915_private *dev_priv)
static int icl_calc_cdclk(int min_cdclk, unsigned int ref)
{
- static const int ranges_24[] = { 180000, 192000, 312000, 552000, 648000 };
- static const int ranges_19_38[] = { 172800, 192000, 307200, 556800, 652800 };
+ static const int ranges_24[] = { 180000, 192000, 312000, 324000,
+ 552000, 648000 };
+ static const int ranges_19_38[] = { 172800, 192000, 307200, 326400,
+ 556800, 652800 };
const int *ranges;
int len, i;
@@ -1803,6 +1805,7 @@ static int icl_calc_cdclk_pll_vco(struct drm_i915_private *dev_priv, int cdclk)
/* fall through */
case 172800:
case 307200:
+ case 326400:
case 556800:
case 652800:
WARN_ON(dev_priv->cdclk.hw.ref != 19200 &&
@@ -1810,6 +1813,7 @@ static int icl_calc_cdclk_pll_vco(struct drm_i915_private *dev_priv, int cdclk)
break;
case 180000:
case 312000:
+ case 324000:
case 552000:
case 648000:
WARN_ON(dev_priv->cdclk.hw.ref != 24000);
--
2.20.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 10+ messages in thread
* ✓ Fi.CI.BAT: success for New cdclk values for gen11+
2019-08-26 22:55 [PATCH 0/2] New cdclk values for gen11+ Matt Roper
2019-08-26 22:55 ` [PATCH 1/2] drm/i915: Allow /2 CD2X divider on gen11+ Matt Roper
2019-08-26 22:55 ` [PATCH 2/2] drm/i915: Add 324mhz and 326.4mhz cdclks for gen11+ Matt Roper
@ 2019-08-27 9:19 ` Patchwork
2019-08-27 13:33 ` ✓ Fi.CI.IGT: " Patchwork
` (2 subsequent siblings)
5 siblings, 0 replies; 10+ messages in thread
From: Patchwork @ 2019-08-27 9:19 UTC (permalink / raw)
To: Matt Roper; +Cc: intel-gfx
== Series Details ==
Series: New cdclk values for gen11+
URL : https://patchwork.freedesktop.org/series/65838/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6787 -> Patchwork_14194
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14194/
Known issues
------------
Here are the changes found in Patchwork_14194 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_exec_suspend@basic-s3:
- fi-blb-e6850: [PASS][1] -> [INCOMPLETE][2] ([fdo#107718])
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6787/fi-blb-e6850/igt@gem_exec_suspend@basic-s3.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14194/fi-blb-e6850/igt@gem_exec_suspend@basic-s3.html
* igt@kms_frontbuffer_tracking@basic:
- fi-icl-u3: [PASS][3] -> [FAIL][4] ([fdo#103167])
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6787/fi-icl-u3/igt@kms_frontbuffer_tracking@basic.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14194/fi-icl-u3/igt@kms_frontbuffer_tracking@basic.html
[fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167
[fdo#107718]: https://bugs.freedesktop.org/show_bug.cgi?id=107718
Participating hosts (31 -> 44)
------------------------------
Additional (17): fi-hsw-4770r fi-cml-u2 fi-icl-u4 fi-skl-gvtdvm fi-hsw-peppy fi-glk-dsi fi-icl-u2 fi-bwr-2160 fi-ilk-650 fi-kbl-7500u fi-kbl-guc fi-whl-u fi-cfl-8109u fi-skl-iommu fi-bsw-kefka fi-skl-lmem fi-icl-guc
Missing (4): fi-kbl-soraka fi-ilk-m540 fi-bsw-cyan fi-icl-y
Build changes
-------------
* CI: CI-20190529 -> None
* Linux: CI_DRM_6787 -> Patchwork_14194
CI-20190529: 20190529
CI_DRM_6787: 63ed0eb50431f1428ab0ced810f8e438945405fd @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_5150: a4e8217bcdfef9bb523f26a9084bbf615a6e8abb @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_14194: a7b802d7a136059f817b27f9b46bc33d3ab52115 @ git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
a7b802d7a136 drm/i915: Add 324mhz and 326.4mhz cdclks for gen11+
27dcc032f0a7 drm/i915: Allow /2 CD2X divider on gen11+
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14194/
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 10+ messages in thread
* ✓ Fi.CI.IGT: success for New cdclk values for gen11+
2019-08-26 22:55 [PATCH 0/2] New cdclk values for gen11+ Matt Roper
` (2 preceding siblings ...)
2019-08-27 9:19 ` ✓ Fi.CI.BAT: success for New cdclk values " Patchwork
@ 2019-08-27 13:33 ` Patchwork
2019-08-30 1:27 ` ✓ Fi.CI.BAT: success for New cdclk values for gen11+ (rev2) Patchwork
2019-08-30 21:47 ` ✓ Fi.CI.IGT: " Patchwork
5 siblings, 0 replies; 10+ messages in thread
From: Patchwork @ 2019-08-27 13:33 UTC (permalink / raw)
To: Matt Roper; +Cc: intel-gfx
== Series Details ==
Series: New cdclk values for gen11+
URL : https://patchwork.freedesktop.org/series/65838/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6787_full -> Patchwork_14194_full
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Known issues
------------
Here are the changes found in Patchwork_14194_full that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_exec_schedule@preempt-hang-bsd1:
- shard-iclb: [PASS][1] -> [SKIP][2] ([fdo#109276]) +4 similar issues
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6787/shard-iclb1/igt@gem_exec_schedule@preempt-hang-bsd1.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14194/shard-iclb5/igt@gem_exec_schedule@preempt-hang-bsd1.html
* igt@gem_exec_schedule@preempt-other-chain-bsd:
- shard-iclb: [PASS][3] -> [SKIP][4] ([fdo#111325]) +1 similar issue
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6787/shard-iclb8/igt@gem_exec_schedule@preempt-other-chain-bsd.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14194/shard-iclb2/igt@gem_exec_schedule@preempt-other-chain-bsd.html
* igt@gem_workarounds@suspend-resume-context:
- shard-apl: [PASS][5] -> [DMESG-WARN][6] ([fdo#108566]) +7 similar issues
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6787/shard-apl8/igt@gem_workarounds@suspend-resume-context.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14194/shard-apl8/igt@gem_workarounds@suspend-resume-context.html
* igt@kms_big_fb@yf-tiled-32bpp-rotate-90:
- shard-apl: [PASS][7] -> [INCOMPLETE][8] ([fdo#103927])
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6787/shard-apl1/igt@kms_big_fb@yf-tiled-32bpp-rotate-90.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14194/shard-apl6/igt@kms_big_fb@yf-tiled-32bpp-rotate-90.html
* igt@kms_flip@flip-vs-suspend:
- shard-kbl: [PASS][9] -> [DMESG-WARN][10] ([fdo#108566])
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6787/shard-kbl7/igt@kms_flip@flip-vs-suspend.html
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14194/shard-kbl1/igt@kms_flip@flip-vs-suspend.html
* igt@kms_frontbuffer_tracking@fbc-1p-pri-indfb-multidraw:
- shard-iclb: [PASS][11] -> [FAIL][12] ([fdo#103167]) +4 similar issues
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6787/shard-iclb1/igt@kms_frontbuffer_tracking@fbc-1p-pri-indfb-multidraw.html
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14194/shard-iclb1/igt@kms_frontbuffer_tracking@fbc-1p-pri-indfb-multidraw.html
* igt@kms_frontbuffer_tracking@psr-1p-primscrn-cur-indfb-draw-mmap-gtt:
- shard-skl: [PASS][13] -> [FAIL][14] ([fdo#103167])
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6787/shard-skl7/igt@kms_frontbuffer_tracking@psr-1p-primscrn-cur-indfb-draw-mmap-gtt.html
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14194/shard-skl1/igt@kms_frontbuffer_tracking@psr-1p-primscrn-cur-indfb-draw-mmap-gtt.html
* igt@kms_pipe_crc_basic@suspend-read-crc-pipe-b:
- shard-skl: [PASS][15] -> [FAIL][16] ([fdo#103191])
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6787/shard-skl5/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-b.html
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14194/shard-skl6/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-b.html
* igt@kms_plane_alpha_blend@pipe-c-constant-alpha-min:
- shard-skl: [PASS][17] -> [FAIL][18] ([fdo#108145])
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6787/shard-skl2/igt@kms_plane_alpha_blend@pipe-c-constant-alpha-min.html
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14194/shard-skl4/igt@kms_plane_alpha_blend@pipe-c-constant-alpha-min.html
* igt@kms_psr@psr2_sprite_mmap_gtt:
- shard-iclb: [PASS][19] -> [SKIP][20] ([fdo#109441]) +1 similar issue
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6787/shard-iclb2/igt@kms_psr@psr2_sprite_mmap_gtt.html
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14194/shard-iclb3/igt@kms_psr@psr2_sprite_mmap_gtt.html
* igt@kms_vblank@pipe-a-ts-continuation-suspend:
- shard-snb: [PASS][21] -> [DMESG-WARN][22] ([fdo#102365])
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6787/shard-snb5/igt@kms_vblank@pipe-a-ts-continuation-suspend.html
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14194/shard-snb2/igt@kms_vblank@pipe-a-ts-continuation-suspend.html
* igt@tools_test@tools_test:
- shard-glk: [PASS][23] -> [SKIP][24] ([fdo#109271])
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6787/shard-glk4/igt@tools_test@tools_test.html
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14194/shard-glk2/igt@tools_test@tools_test.html
#### Possible fixes ####
* igt@gem_eio@unwedge-stress:
- shard-snb: [FAIL][25] ([fdo#109661]) -> [PASS][26]
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6787/shard-snb2/igt@gem_eio@unwedge-stress.html
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14194/shard-snb5/igt@gem_eio@unwedge-stress.html
* igt@gem_exec_schedule@fifo-bsd1:
- shard-iclb: [SKIP][27] ([fdo#109276]) -> [PASS][28] +10 similar issues
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6787/shard-iclb3/igt@gem_exec_schedule@fifo-bsd1.html
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14194/shard-iclb2/igt@gem_exec_schedule@fifo-bsd1.html
* igt@gem_exec_schedule@preemptive-hang-bsd:
- shard-iclb: [SKIP][29] ([fdo#111325]) -> [PASS][30] +1 similar issue
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6787/shard-iclb1/igt@gem_exec_schedule@preemptive-hang-bsd.html
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14194/shard-iclb5/igt@gem_exec_schedule@preemptive-hang-bsd.html
* igt@gem_mmap_gtt@big-bo-tiledx:
- shard-apl: [INCOMPLETE][31] ([fdo#103927]) -> [PASS][32]
[31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6787/shard-apl4/igt@gem_mmap_gtt@big-bo-tiledx.html
[32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14194/shard-apl2/igt@gem_mmap_gtt@big-bo-tiledx.html
* igt@gem_tiled_swapping@non-threaded:
- shard-apl: [DMESG-WARN][33] ([fdo#108686]) -> [PASS][34]
[33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6787/shard-apl6/igt@gem_tiled_swapping@non-threaded.html
[34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14194/shard-apl7/igt@gem_tiled_swapping@non-threaded.html
* igt@gem_workarounds@suspend-resume:
- shard-skl: [INCOMPLETE][35] ([fdo#104108]) -> [PASS][36] +1 similar issue
[35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6787/shard-skl4/igt@gem_workarounds@suspend-resume.html
[36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14194/shard-skl3/igt@gem_workarounds@suspend-resume.html
* igt@kms_color@pipe-b-ctm-blue-to-red:
- shard-skl: [FAIL][37] ([fdo#107201]) -> [PASS][38]
[37]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6787/shard-skl10/igt@kms_color@pipe-b-ctm-blue-to-red.html
[38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14194/shard-skl7/igt@kms_color@pipe-b-ctm-blue-to-red.html
* igt@kms_cursor_crc@pipe-a-cursor-128x128-onscreen:
- shard-snb: [SKIP][39] ([fdo#109271]) -> [PASS][40] +2 similar issues
[39]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6787/shard-snb2/igt@kms_cursor_crc@pipe-a-cursor-128x128-onscreen.html
[40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14194/shard-snb5/igt@kms_cursor_crc@pipe-a-cursor-128x128-onscreen.html
* igt@kms_cursor_edge_walk@pipe-a-256x256-left-edge:
- shard-snb: [SKIP][41] ([fdo#109271] / [fdo#109278]) -> [PASS][42]
[41]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6787/shard-snb2/igt@kms_cursor_edge_walk@pipe-a-256x256-left-edge.html
[42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14194/shard-snb5/igt@kms_cursor_edge_walk@pipe-a-256x256-left-edge.html
* igt@kms_cursor_legacy@cursora-vs-flipb-toggle:
- shard-hsw: [INCOMPLETE][43] ([fdo#103540]) -> [PASS][44]
[43]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6787/shard-hsw7/igt@kms_cursor_legacy@cursora-vs-flipb-toggle.html
[44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14194/shard-hsw1/igt@kms_cursor_legacy@cursora-vs-flipb-toggle.html
* igt@kms_draw_crc@draw-method-xrgb8888-mmap-gtt-xtiled:
- shard-iclb: [FAIL][45] ([fdo#103184] / [fdo#103232]) -> [PASS][46]
[45]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6787/shard-iclb6/igt@kms_draw_crc@draw-method-xrgb8888-mmap-gtt-xtiled.html
[46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14194/shard-iclb8/igt@kms_draw_crc@draw-method-xrgb8888-mmap-gtt-xtiled.html
* igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-render:
- shard-iclb: [FAIL][47] ([fdo#103167]) -> [PASS][48] +4 similar issues
[47]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6787/shard-iclb7/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-render.html
[48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14194/shard-iclb6/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-render.html
* igt@kms_plane_alpha_blend@pipe-b-constant-alpha-min:
- shard-skl: [FAIL][49] ([fdo#108145]) -> [PASS][50]
[49]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6787/shard-skl10/igt@kms_plane_alpha_blend@pipe-b-constant-alpha-min.html
[50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14194/shard-skl7/igt@kms_plane_alpha_blend@pipe-b-constant-alpha-min.html
* igt@kms_plane_alpha_blend@pipe-b-coverage-7efc:
- shard-skl: [FAIL][51] ([fdo#108145] / [fdo#110403]) -> [PASS][52]
[51]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6787/shard-skl5/igt@kms_plane_alpha_blend@pipe-b-coverage-7efc.html
[52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14194/shard-skl6/igt@kms_plane_alpha_blend@pipe-b-coverage-7efc.html
* igt@kms_psr2_su@page_flip:
- shard-iclb: [SKIP][53] ([fdo#109642] / [fdo#111068]) -> [PASS][54]
[53]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6787/shard-iclb5/igt@kms_psr2_su@page_flip.html
[54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14194/shard-iclb2/igt@kms_psr2_su@page_flip.html
* igt@kms_psr@psr2_primary_mmap_cpu:
- shard-iclb: [SKIP][55] ([fdo#109441]) -> [PASS][56] +2 similar issues
[55]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6787/shard-iclb5/igt@kms_psr@psr2_primary_mmap_cpu.html
[56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14194/shard-iclb2/igt@kms_psr@psr2_primary_mmap_cpu.html
* igt@kms_setmode@basic:
- shard-apl: [FAIL][57] ([fdo#99912]) -> [PASS][58]
[57]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6787/shard-apl6/igt@kms_setmode@basic.html
[58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14194/shard-apl5/igt@kms_setmode@basic.html
* igt@kms_vblank@pipe-a-ts-continuation-suspend:
- shard-apl: [DMESG-WARN][59] ([fdo#108566]) -> [PASS][60] +6 similar issues
[59]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6787/shard-apl8/igt@kms_vblank@pipe-a-ts-continuation-suspend.html
[60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14194/shard-apl4/igt@kms_vblank@pipe-a-ts-continuation-suspend.html
#### Warnings ####
* igt@gem_ctx_isolation@vcs1-nonpriv:
- shard-iclb: [FAIL][61] ([fdo#111329]) -> [SKIP][62] ([fdo#109276])
[61]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6787/shard-iclb1/igt@gem_ctx_isolation@vcs1-nonpriv.html
[62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14194/shard-iclb5/igt@gem_ctx_isolation@vcs1-nonpriv.html
* igt@gem_mocs_settings@mocs-settings-bsd2:
- shard-iclb: [SKIP][63] ([fdo#109276]) -> [FAIL][64] ([fdo#111330]) +1 similar issue
[63]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6787/shard-iclb3/igt@gem_mocs_settings@mocs-settings-bsd2.html
[64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14194/shard-iclb2/igt@gem_mocs_settings@mocs-settings-bsd2.html
[fdo#102365]: https://bugs.freedesktop.org/show_bug.cgi?id=102365
[fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167
[fdo#103184]: https://bugs.freedesktop.org/show_bug.cgi?id=103184
[fdo#103191]: https://bugs.freedesktop.org/show_bug.cgi?id=103191
[fdo#103232]: https://bugs.freedesktop.org/show_bug.cgi?id=103232
[fdo#103540]: https://bugs.freedesktop.org/show_bug.cgi?id=103540
[fdo#103927]: https://bugs.freedesktop.org/show_bug.cgi?id=103927
[fdo#104108]: https://bugs.freedesktop.org/show_bug.cgi?id=104108
[fdo#107201]: https://bugs.freedesktop.org/show_bug.cgi?id=107201
[fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145
[fdo#108566]: https://bugs.freedesktop.org/show_bug.cgi?id=108566
[fdo#108686]: https://bugs.freedesktop.org/show_bug.cgi?id=108686
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109276]: https://bugs.freedesktop.org/show_bug.cgi?id=109276
[fdo#109278]: https://bugs.freedesktop.org/show_bug.cgi?id=109278
[fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441
[fdo#109642]: https://bugs.freedesktop.org/show_bug.cgi?id=109642
[fdo#109661]: https://bugs.freedesktop.org/show_bug.cgi?id=109661
[fdo#110403]: https://bugs.freedesktop.org/show_bug.cgi?id=110403
[fdo#111068]: https://bugs.freedesktop.org/show_bug.cgi?id=111068
[fdo#111325]: https://bugs.freedesktop.org/show_bug.cgi?id=111325
[fdo#111329]: https://bugs.freedesktop.org/show_bug.cgi?id=111329
[fdo#111330]: https://bugs.freedesktop.org/show_bug.cgi?id=111330
[fdo#99912]: https://bugs.freedesktop.org/show_bug.cgi?id=99912
Participating hosts (9 -> 10)
------------------------------
Additional (1): pig-glk-j5005
Build changes
-------------
* CI: CI-20190529 -> None
* Linux: CI_DRM_6787 -> Patchwork_14194
CI-20190529: 20190529
CI_DRM_6787: 63ed0eb50431f1428ab0ced810f8e438945405fd @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_5150: a4e8217bcdfef9bb523f26a9084bbf615a6e8abb @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_14194: a7b802d7a136059f817b27f9b46bc33d3ab52115 @ git://anongit.freedesktop.org/gfx-ci/linux
piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14194/
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH 1/2] drm/i915: Allow /2 CD2X divider on gen11+
2019-08-26 22:55 ` [PATCH 1/2] drm/i915: Allow /2 CD2X divider on gen11+ Matt Roper
@ 2019-08-27 13:52 ` Ville Syrjälä
2019-08-30 0:48 ` [PATCH v2 " Matt Roper
0 siblings, 1 reply; 10+ messages in thread
From: Ville Syrjälä @ 2019-08-27 13:52 UTC (permalink / raw)
To: Matt Roper; +Cc: intel-gfx, Lucas De Marchi
On Mon, Aug 26, 2019 at 03:55:39PM -0700, Matt Roper wrote:
> The bspec has just recently been updated with new cdclk values that
> require the use of a /2 CD2X divider rather than a /1 divider. Once we
> add the divider selection logic to ICL+ cdclk programming, we have
> pretty much the same logic we were already using on CNL, so it's simpler
> to drop icl_set_cdclk() completely and reuse cnl_set_cdclk() on gen11+
> platforms as well.
>
> Cc: José Roberto de Souza <jose.souza@intel.com>
> Cc: Lucas De Marchi <lucas.demarchi@intel.com>
> Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_cdclk.c | 90 +++++++++-------------
> drivers/gpu/drm/i915/i915_reg.h | 1 +
> 2 files changed, 36 insertions(+), 55 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.c b/drivers/gpu/drm/i915/display/intel_cdclk.c
> index 939088c7d814..a56ccd0930e0 100644
> --- a/drivers/gpu/drm/i915/display/intel_cdclk.c
> +++ b/drivers/gpu/drm/i915/display/intel_cdclk.c
> @@ -1659,10 +1659,23 @@ static void cnl_set_cdclk(struct drm_i915_private *dev_priv,
> cnl_cdclk_pll_enable(dev_priv, vco);
>
> val = divider | skl_cdclk_decimal(cdclk);
> - if (pipe == INVALID_PIPE)
> - val |= BXT_CDCLK_CD2X_PIPE_NONE;
> - else
> - val |= BXT_CDCLK_CD2X_PIPE(pipe);
> +
> + if (INTEL_GEN(dev_priv) >= 12) {
> + if (pipe == INVALID_PIPE)
> + val |= ICL_CDCLK_CD2X_PIPE_NONE;
> + else
> + val |= BXT_CDCLK_CD2X_PIPE(pipe);
Hmm. So the mess made here with icl is now fixed. Cool. Sad they
didn't fix it on icl as well.
However I have a feeling this may end up confusing people, so maybe we
should just add TGL_CDCLK_CD2X_PIPE()?
> + } else if (INTEL_GEN(dev_priv) >= 11) {
> + if (pipe == INVALID_PIPE)
> + val |= ICL_CDCLK_CD2X_PIPE_NONE;
> + else
> + val |= ICL_CDCLK_CD2X_PIPE(pipe);
> + } else {
> + if (pipe == INVALID_PIPE)
> + val |= BXT_CDCLK_CD2X_PIPE_NONE;
> + else
> + val |= BXT_CDCLK_CD2X_PIPE(pipe);
> + }
> I915_WRITE(CDCLK_CTL, val);
>
> if (pipe != INVALID_PIPE)
> @@ -1813,51 +1826,6 @@ static int icl_calc_cdclk_pll_vco(struct drm_i915_private *dev_priv, int cdclk)
> return dev_priv->cdclk.hw.ref * ratio;
> }
>
> -static void icl_set_cdclk(struct drm_i915_private *dev_priv,
> - const struct intel_cdclk_state *cdclk_state,
> - enum pipe pipe)
> -{
> - unsigned int cdclk = cdclk_state->cdclk;
> - unsigned int vco = cdclk_state->vco;
> - int ret;
> -
> - ret = skl_pcode_request(dev_priv, SKL_PCODE_CDCLK_CONTROL,
> - SKL_CDCLK_PREPARE_FOR_CHANGE,
> - SKL_CDCLK_READY_FOR_CHANGE,
> - SKL_CDCLK_READY_FOR_CHANGE, 3);
> - if (ret) {
> - DRM_ERROR("Failed to inform PCU about cdclk change (%d)\n",
> - ret);
> - return;
> - }
> -
> - if (dev_priv->cdclk.hw.vco != 0 &&
> - dev_priv->cdclk.hw.vco != vco)
> - cnl_cdclk_pll_disable(dev_priv);
> -
> - if (dev_priv->cdclk.hw.vco != vco)
> - cnl_cdclk_pll_enable(dev_priv, vco);
> -
> - /*
> - * On ICL CD2X_DIV can only be 1, so we'll never end up changing the
> - * divider here synchronized to a pipe while CDCLK is on, nor will we
> - * need the corresponding vblank wait.
> - */
> - I915_WRITE(CDCLK_CTL, ICL_CDCLK_CD2X_PIPE_NONE |
> - skl_cdclk_decimal(cdclk));
> -
> - sandybridge_pcode_write(dev_priv, SKL_PCODE_CDCLK_CONTROL,
> - cdclk_state->voltage_level);
> -
> - intel_update_cdclk(dev_priv);
> -
> - /*
> - * Can't read out the voltage level :(
> - * Let's just assume everything is as expected.
> - */
> - dev_priv->cdclk.hw.voltage_level = cdclk_state->voltage_level;
> -}
> -
> static u8 icl_calc_voltage_level(struct drm_i915_private *dev_priv, int cdclk)
> {
> if (IS_ELKHARTLAKE(dev_priv)) {
> @@ -1881,6 +1849,7 @@ static void icl_get_cdclk(struct drm_i915_private *dev_priv,
> struct intel_cdclk_state *cdclk_state)
> {
> u32 val;
> + int div;
>
> cdclk_state->bypass = 50000;
>
> @@ -1914,10 +1883,21 @@ static void icl_get_cdclk(struct drm_i915_private *dev_priv,
>
> cdclk_state->vco = (val & BXT_DE_PLL_RATIO_MASK) * cdclk_state->ref;
>
> - val = I915_READ(CDCLK_CTL);
> - WARN_ON((val & BXT_CDCLK_CD2X_DIV_SEL_MASK) != 0);
> + val = I915_READ(CDCLK_CTL) & BXT_CDCLK_CD2X_DIV_SEL_MASK;
> + switch (val) {
> + case BXT_CDCLK_CD2X_DIV_SEL_1:
> + div = 2;
> + break;
> + case BXT_CDCLK_CD2X_DIV_SEL_2:
> + div = 4;
> + break;
> + default:
> + MISSING_CASE(val);
> + div = 2;
> + break;
> + }
>
> - cdclk_state->cdclk = cdclk_state->vco / 2;
> + cdclk_state->cdclk = cdclk_state->vco / div;
cnl uses DIV_ROUND_CLOSEST(). In general this function looks rather
different to cnl_get_cdclk() even though the actual differences are
minimal. Some unification of style might be nice. Not sure if reusing
the cnl function on icl might actually make sense. Would require
a few ifs.
>
> out:
> /*
> @@ -1963,7 +1943,7 @@ static void icl_init_cdclk(struct drm_i915_private *dev_priv)
> icl_calc_voltage_level(dev_priv,
> sanitized_state.cdclk);
>
> - icl_set_cdclk(dev_priv, &sanitized_state, INVALID_PIPE);
> + cnl_set_cdclk(dev_priv, &sanitized_state, INVALID_PIPE);
> }
>
> static void icl_uninit_cdclk(struct drm_i915_private *dev_priv)
> @@ -1975,7 +1955,7 @@ static void icl_uninit_cdclk(struct drm_i915_private *dev_priv)
> cdclk_state.voltage_level = icl_calc_voltage_level(dev_priv,
> cdclk_state.cdclk);
>
> - icl_set_cdclk(dev_priv, &cdclk_state, INVALID_PIPE);
> + cnl_set_cdclk(dev_priv, &cdclk_state, INVALID_PIPE);
> }
>
> static void cnl_init_cdclk(struct drm_i915_private *dev_priv)
> @@ -2810,7 +2790,7 @@ void intel_update_rawclk(struct drm_i915_private *dev_priv)
> void intel_init_cdclk_hooks(struct drm_i915_private *dev_priv)
> {
> if (INTEL_GEN(dev_priv) >= 11) {
> - dev_priv->display.set_cdclk = icl_set_cdclk;
> + dev_priv->display.set_cdclk = cnl_set_cdclk;
> dev_priv->display.modeset_calc_cdclk = icl_modeset_calc_cdclk;
> } else if (IS_CANNONLAKE(dev_priv)) {
> dev_priv->display.set_cdclk = cnl_set_cdclk;
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index a142aa3d74e3..958dfdfb4e10 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -9671,6 +9671,7 @@ enum skl_power_gate {
> #define BXT_CDCLK_CD2X_PIPE(pipe) ((pipe) << 20)
> #define CDCLK_DIVMUX_CD_OVERRIDE (1 << 19)
> #define BXT_CDCLK_CD2X_PIPE_NONE BXT_CDCLK_CD2X_PIPE(3)
> +#define ICL_CDCLK_CD2X_PIPE(pipe) (_PICK(pipe, 0, 2, 6) << 19)
Could also do eg.
((((pipe) << 1) | ((pipe) & ~1)) << 19)
if we want to avoid the _PICK(). Doesn't really matter I suppose.
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> #define ICL_CDCLK_CD2X_PIPE_NONE (7 << 19)
> #define BXT_CDCLK_SSA_PRECHARGE_ENABLE (1 << 16)
> #define CDCLK_FREQ_DECIMAL_MASK (0x7ff)
> --
> 2.20.1
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Ville Syrjälä
Intel
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 10+ messages in thread
* [PATCH v2 1/2] drm/i915: Allow /2 CD2X divider on gen11+
2019-08-27 13:52 ` Ville Syrjälä
@ 2019-08-30 0:48 ` Matt Roper
0 siblings, 0 replies; 10+ messages in thread
From: Matt Roper @ 2019-08-30 0:48 UTC (permalink / raw)
To: intel-gfx; +Cc: Lucas De Marchi
The bspec has just recently been updated with new cdclk values that
require the use of a /2 CD2X divider rather than a /1 divider. Once we
add the divider selection logic to ICL+ cdclk programming, we have
pretty much the same logic we were already using on CNL, so it's simpler
to drop icl_set_cdclk() completely and reuse cnl_set_cdclk() on gen11+
platforms as well.
v2:
- Using ICL_CDCLK_CD2X_PIPE_NONE + BXT_CDCLK_CD2X_PIPE(pipe) for TGL is
correct, but looks really confusing. Add some TGL_ macros that alias
these to avoid confusion. (Ville)
- Use DIV_ROUND_CLOSEST rather than / when applying the divider. (Ville)
Cc: José Roberto de Souza <jose.souza@intel.com>
Cc: Lucas De Marchi <lucas.demarchi@intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
Unifying the get_cdclk functions too might be worth looking into in the
future, but it wasn't as straightforward as the set_cdclk functions so
I'm not going to tackle that with this series.
drivers/gpu/drm/i915/display/intel_cdclk.c | 90 +++++++++-------------
drivers/gpu/drm/i915/i915_reg.h | 3 +
2 files changed, 38 insertions(+), 55 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.c b/drivers/gpu/drm/i915/display/intel_cdclk.c
index 939088c7d814..58ba42dcf23f 100644
--- a/drivers/gpu/drm/i915/display/intel_cdclk.c
+++ b/drivers/gpu/drm/i915/display/intel_cdclk.c
@@ -1659,10 +1659,23 @@ static void cnl_set_cdclk(struct drm_i915_private *dev_priv,
cnl_cdclk_pll_enable(dev_priv, vco);
val = divider | skl_cdclk_decimal(cdclk);
- if (pipe == INVALID_PIPE)
- val |= BXT_CDCLK_CD2X_PIPE_NONE;
- else
- val |= BXT_CDCLK_CD2X_PIPE(pipe);
+
+ if (INTEL_GEN(dev_priv) >= 12) {
+ if (pipe == INVALID_PIPE)
+ val |= TGL_CDCLK_CD2X_PIPE_NONE;
+ else
+ val |= TGL_CDCLK_CD2X_PIPE(pipe);
+ } else if (INTEL_GEN(dev_priv) >= 11) {
+ if (pipe == INVALID_PIPE)
+ val |= ICL_CDCLK_CD2X_PIPE_NONE;
+ else
+ val |= ICL_CDCLK_CD2X_PIPE(pipe);
+ } else {
+ if (pipe == INVALID_PIPE)
+ val |= BXT_CDCLK_CD2X_PIPE_NONE;
+ else
+ val |= BXT_CDCLK_CD2X_PIPE(pipe);
+ }
I915_WRITE(CDCLK_CTL, val);
if (pipe != INVALID_PIPE)
@@ -1813,51 +1826,6 @@ static int icl_calc_cdclk_pll_vco(struct drm_i915_private *dev_priv, int cdclk)
return dev_priv->cdclk.hw.ref * ratio;
}
-static void icl_set_cdclk(struct drm_i915_private *dev_priv,
- const struct intel_cdclk_state *cdclk_state,
- enum pipe pipe)
-{
- unsigned int cdclk = cdclk_state->cdclk;
- unsigned int vco = cdclk_state->vco;
- int ret;
-
- ret = skl_pcode_request(dev_priv, SKL_PCODE_CDCLK_CONTROL,
- SKL_CDCLK_PREPARE_FOR_CHANGE,
- SKL_CDCLK_READY_FOR_CHANGE,
- SKL_CDCLK_READY_FOR_CHANGE, 3);
- if (ret) {
- DRM_ERROR("Failed to inform PCU about cdclk change (%d)\n",
- ret);
- return;
- }
-
- if (dev_priv->cdclk.hw.vco != 0 &&
- dev_priv->cdclk.hw.vco != vco)
- cnl_cdclk_pll_disable(dev_priv);
-
- if (dev_priv->cdclk.hw.vco != vco)
- cnl_cdclk_pll_enable(dev_priv, vco);
-
- /*
- * On ICL CD2X_DIV can only be 1, so we'll never end up changing the
- * divider here synchronized to a pipe while CDCLK is on, nor will we
- * need the corresponding vblank wait.
- */
- I915_WRITE(CDCLK_CTL, ICL_CDCLK_CD2X_PIPE_NONE |
- skl_cdclk_decimal(cdclk));
-
- sandybridge_pcode_write(dev_priv, SKL_PCODE_CDCLK_CONTROL,
- cdclk_state->voltage_level);
-
- intel_update_cdclk(dev_priv);
-
- /*
- * Can't read out the voltage level :(
- * Let's just assume everything is as expected.
- */
- dev_priv->cdclk.hw.voltage_level = cdclk_state->voltage_level;
-}
-
static u8 icl_calc_voltage_level(struct drm_i915_private *dev_priv, int cdclk)
{
if (IS_ELKHARTLAKE(dev_priv)) {
@@ -1881,6 +1849,7 @@ static void icl_get_cdclk(struct drm_i915_private *dev_priv,
struct intel_cdclk_state *cdclk_state)
{
u32 val;
+ int div;
cdclk_state->bypass = 50000;
@@ -1914,10 +1883,21 @@ static void icl_get_cdclk(struct drm_i915_private *dev_priv,
cdclk_state->vco = (val & BXT_DE_PLL_RATIO_MASK) * cdclk_state->ref;
- val = I915_READ(CDCLK_CTL);
- WARN_ON((val & BXT_CDCLK_CD2X_DIV_SEL_MASK) != 0);
+ val = I915_READ(CDCLK_CTL) & BXT_CDCLK_CD2X_DIV_SEL_MASK;
+ switch (val) {
+ case BXT_CDCLK_CD2X_DIV_SEL_1:
+ div = 2;
+ break;
+ case BXT_CDCLK_CD2X_DIV_SEL_2:
+ div = 4;
+ break;
+ default:
+ MISSING_CASE(val);
+ div = 2;
+ break;
+ }
- cdclk_state->cdclk = cdclk_state->vco / 2;
+ cdclk_state->cdclk = DIV_ROUND_CLOSEST(cdclk_state->vco, div);
out:
/*
@@ -1963,7 +1943,7 @@ static void icl_init_cdclk(struct drm_i915_private *dev_priv)
icl_calc_voltage_level(dev_priv,
sanitized_state.cdclk);
- icl_set_cdclk(dev_priv, &sanitized_state, INVALID_PIPE);
+ cnl_set_cdclk(dev_priv, &sanitized_state, INVALID_PIPE);
}
static void icl_uninit_cdclk(struct drm_i915_private *dev_priv)
@@ -1975,7 +1955,7 @@ static void icl_uninit_cdclk(struct drm_i915_private *dev_priv)
cdclk_state.voltage_level = icl_calc_voltage_level(dev_priv,
cdclk_state.cdclk);
- icl_set_cdclk(dev_priv, &cdclk_state, INVALID_PIPE);
+ cnl_set_cdclk(dev_priv, &cdclk_state, INVALID_PIPE);
}
static void cnl_init_cdclk(struct drm_i915_private *dev_priv)
@@ -2810,7 +2790,7 @@ void intel_update_rawclk(struct drm_i915_private *dev_priv)
void intel_init_cdclk_hooks(struct drm_i915_private *dev_priv)
{
if (INTEL_GEN(dev_priv) >= 11) {
- dev_priv->display.set_cdclk = icl_set_cdclk;
+ dev_priv->display.set_cdclk = cnl_set_cdclk;
dev_priv->display.modeset_calc_cdclk = icl_modeset_calc_cdclk;
} else if (IS_CANNONLAKE(dev_priv)) {
dev_priv->display.set_cdclk = cnl_set_cdclk;
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index a142aa3d74e3..c47e2969ad04 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -9671,7 +9671,10 @@ enum skl_power_gate {
#define BXT_CDCLK_CD2X_PIPE(pipe) ((pipe) << 20)
#define CDCLK_DIVMUX_CD_OVERRIDE (1 << 19)
#define BXT_CDCLK_CD2X_PIPE_NONE BXT_CDCLK_CD2X_PIPE(3)
+#define ICL_CDCLK_CD2X_PIPE(pipe) (_PICK(pipe, 0, 2, 6) << 19)
#define ICL_CDCLK_CD2X_PIPE_NONE (7 << 19)
+#define TGL_CDCLK_CD2X_PIPE(pipe) BXT_CDCLK_CD2X_PIPE(pipe)
+#define TGL_CDCLK_CD2X_PIPE_NONE ICL_CDCLK_CD2X_PIPE_NONE
#define BXT_CDCLK_SSA_PRECHARGE_ENABLE (1 << 16)
#define CDCLK_FREQ_DECIMAL_MASK (0x7ff)
--
2.20.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 10+ messages in thread
* ✓ Fi.CI.BAT: success for New cdclk values for gen11+ (rev2)
2019-08-26 22:55 [PATCH 0/2] New cdclk values for gen11+ Matt Roper
` (3 preceding siblings ...)
2019-08-27 13:33 ` ✓ Fi.CI.IGT: " Patchwork
@ 2019-08-30 1:27 ` Patchwork
2019-08-30 21:47 ` ✓ Fi.CI.IGT: " Patchwork
5 siblings, 0 replies; 10+ messages in thread
From: Patchwork @ 2019-08-30 1:27 UTC (permalink / raw)
To: Matt Roper; +Cc: intel-gfx
== Series Details ==
Series: New cdclk values for gen11+ (rev2)
URL : https://patchwork.freedesktop.org/series/65838/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6805 -> Patchwork_14230
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14230/
Known issues
------------
Here are the changes found in Patchwork_14230 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_exec_suspend@basic-s4-devices:
- fi-kbl-7500u: [PASS][1] -> [DMESG-WARN][2] ([fdo#105128] / [fdo#107139])
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6805/fi-kbl-7500u/igt@gem_exec_suspend@basic-s4-devices.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14230/fi-kbl-7500u/igt@gem_exec_suspend@basic-s4-devices.html
* igt@i915_module_load@reload:
- fi-blb-e6850: [PASS][3] -> [INCOMPLETE][4] ([fdo#107718])
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6805/fi-blb-e6850/igt@i915_module_load@reload.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14230/fi-blb-e6850/igt@i915_module_load@reload.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#105128]: https://bugs.freedesktop.org/show_bug.cgi?id=105128
[fdo#107139]: https://bugs.freedesktop.org/show_bug.cgi?id=107139
[fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713
[fdo#107718]: https://bugs.freedesktop.org/show_bug.cgi?id=107718
[fdo#109100]: https://bugs.freedesktop.org/show_bug.cgi?id=109100
[fdo#111381]: https://bugs.freedesktop.org/show_bug.cgi?id=111381
Participating hosts (50 -> 44)
------------------------------
Additional (1): fi-bsw-kefka
Missing (7): fi-ilk-m540 fi-bxt-dsi fi-hsw-4200u fi-byt-squawks fi-icl-y fi-byt-clapper fi-bdw-samus
Build changes
-------------
* CI: CI-20190529 -> None
* Linux: CI_DRM_6805 -> Patchwork_14230
CI-20190529: 20190529
CI_DRM_6805: ade3295daf7345ba37170b8d7fa67931e9397dc9 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_5157: 73d8d3ffccb6f0340e13bf006f56e3658673f345 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_14230: 73d324c8f59b318a88fd0fa06e908f83857d57b8 @ git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
73d324c8f59b drm/i915: Add 324mhz and 326.4mhz cdclks for gen11+
e04911cde2c9 drm/i915: Allow /2 CD2X divider on gen11+
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14230/
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 10+ messages in thread
* ✓ Fi.CI.IGT: success for New cdclk values for gen11+ (rev2)
2019-08-26 22:55 [PATCH 0/2] New cdclk values for gen11+ Matt Roper
` (4 preceding siblings ...)
2019-08-30 1:27 ` ✓ Fi.CI.BAT: success for New cdclk values for gen11+ (rev2) Patchwork
@ 2019-08-30 21:47 ` Patchwork
2019-08-30 22:49 ` Matt Roper
5 siblings, 1 reply; 10+ messages in thread
From: Patchwork @ 2019-08-30 21:47 UTC (permalink / raw)
To: Matt Roper; +Cc: intel-gfx
== Series Details ==
Series: New cdclk values for gen11+ (rev2)
URL : https://patchwork.freedesktop.org/series/65838/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6805_full -> Patchwork_14230_full
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Known issues
------------
Here are the changes found in Patchwork_14230_full that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_ctx_isolation@rcs0-s3:
- shard-apl: [PASS][1] -> [DMESG-WARN][2] ([fdo#108566]) +3 similar issues
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6805/shard-apl7/igt@gem_ctx_isolation@rcs0-s3.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14230/shard-apl8/igt@gem_ctx_isolation@rcs0-s3.html
* igt@gem_ctx_shared@exec-single-timeline-bsd:
- shard-iclb: [PASS][3] -> [SKIP][4] ([fdo#110841])
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6805/shard-iclb7/igt@gem_ctx_shared@exec-single-timeline-bsd.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14230/shard-iclb1/igt@gem_ctx_shared@exec-single-timeline-bsd.html
* igt@gem_exec_schedule@preemptive-hang-bsd:
- shard-iclb: [PASS][5] -> [SKIP][6] ([fdo#111325]) +5 similar issues
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6805/shard-iclb7/igt@gem_exec_schedule@preemptive-hang-bsd.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14230/shard-iclb1/igt@gem_exec_schedule@preemptive-hang-bsd.html
* igt@kms_cursor_legacy@2x-long-flip-vs-cursor-atomic:
- shard-glk: [PASS][7] -> [FAIL][8] ([fdo#104873])
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6805/shard-glk6/igt@kms_cursor_legacy@2x-long-flip-vs-cursor-atomic.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14230/shard-glk7/igt@kms_cursor_legacy@2x-long-flip-vs-cursor-atomic.html
* igt@kms_flip@flip-vs-expired-vblank:
- shard-skl: [PASS][9] -> [FAIL][10] ([fdo#105363])
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6805/shard-skl1/igt@kms_flip@flip-vs-expired-vblank.html
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14230/shard-skl7/igt@kms_flip@flip-vs-expired-vblank.html
* igt@kms_flip@flip-vs-suspend-interruptible:
- shard-hsw: [PASS][11] -> [INCOMPLETE][12] ([fdo#103540])
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6805/shard-hsw1/igt@kms_flip@flip-vs-suspend-interruptible.html
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14230/shard-hsw5/igt@kms_flip@flip-vs-suspend-interruptible.html
* igt@kms_frontbuffer_tracking@fbc-1p-primscrn-indfb-plflip-blt:
- shard-iclb: [PASS][13] -> [FAIL][14] ([fdo#103167]) +1 similar issue
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6805/shard-iclb2/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-indfb-plflip-blt.html
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14230/shard-iclb2/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-indfb-plflip-blt.html
* igt@kms_plane@pixel-format-pipe-b-planes-source-clamping:
- shard-apl: [PASS][15] -> [INCOMPLETE][16] ([fdo#103927]) +1 similar issue
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6805/shard-apl1/igt@kms_plane@pixel-format-pipe-b-planes-source-clamping.html
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14230/shard-apl8/igt@kms_plane@pixel-format-pipe-b-planes-source-clamping.html
* igt@kms_psr@psr2_no_drrs:
- shard-iclb: [PASS][17] -> [SKIP][18] ([fdo#109441])
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6805/shard-iclb2/igt@kms_psr@psr2_no_drrs.html
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14230/shard-iclb7/igt@kms_psr@psr2_no_drrs.html
* igt@kms_vblank@pipe-b-ts-continuation-dpms-suspend:
- shard-skl: [PASS][19] -> [INCOMPLETE][20] ([fdo#104108] / [fdo#107773])
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6805/shard-skl4/igt@kms_vblank@pipe-b-ts-continuation-dpms-suspend.html
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14230/shard-skl8/igt@kms_vblank@pipe-b-ts-continuation-dpms-suspend.html
* igt@prime_vgem@fence-wait-bsd2:
- shard-iclb: [PASS][21] -> [SKIP][22] ([fdo#109276]) +28 similar issues
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6805/shard-iclb1/igt@prime_vgem@fence-wait-bsd2.html
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14230/shard-iclb6/igt@prime_vgem@fence-wait-bsd2.html
#### Possible fixes ####
* igt@gem_exec_balancer@smoke:
- shard-iclb: [SKIP][23] ([fdo#110854]) -> [PASS][24]
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6805/shard-iclb8/igt@gem_exec_balancer@smoke.html
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14230/shard-iclb2/igt@gem_exec_balancer@smoke.html
* igt@gem_exec_schedule@preempt-queue-contexts-chain-bsd:
- shard-iclb: [SKIP][25] ([fdo#111325]) -> [PASS][26] +4 similar issues
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6805/shard-iclb1/igt@gem_exec_schedule@preempt-queue-contexts-chain-bsd.html
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14230/shard-iclb5/igt@gem_exec_schedule@preempt-queue-contexts-chain-bsd.html
* igt@gem_softpin@noreloc-s3:
- shard-skl: [INCOMPLETE][27] ([fdo#104108]) -> [PASS][28] +1 similar issue
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6805/shard-skl7/igt@gem_softpin@noreloc-s3.html
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14230/shard-skl3/igt@gem_softpin@noreloc-s3.html
* igt@i915_pm_rc6_residency@rc6-accuracy:
- shard-snb: [SKIP][29] ([fdo#109271]) -> [PASS][30]
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6805/shard-snb5/igt@i915_pm_rc6_residency@rc6-accuracy.html
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14230/shard-snb5/igt@i915_pm_rc6_residency@rc6-accuracy.html
* igt@kms_cursor_crc@pipe-c-cursor-alpha-transparent:
- shard-skl: [FAIL][31] ([fdo#103232]) -> [PASS][32]
[31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6805/shard-skl2/igt@kms_cursor_crc@pipe-c-cursor-alpha-transparent.html
[32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14230/shard-skl6/igt@kms_cursor_crc@pipe-c-cursor-alpha-transparent.html
* igt@kms_cursor_crc@pipe-c-cursor-suspend:
- shard-apl: [DMESG-WARN][33] ([fdo#108566]) -> [PASS][34] +2 similar issues
[33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6805/shard-apl8/igt@kms_cursor_crc@pipe-c-cursor-suspend.html
[34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14230/shard-apl2/igt@kms_cursor_crc@pipe-c-cursor-suspend.html
* igt@kms_cursor_legacy@2x-long-cursor-vs-flip-atomic:
- shard-hsw: [FAIL][35] ([fdo#105767]) -> [PASS][36]
[35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6805/shard-hsw8/igt@kms_cursor_legacy@2x-long-cursor-vs-flip-atomic.html
[36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14230/shard-hsw1/igt@kms_cursor_legacy@2x-long-cursor-vs-flip-atomic.html
* igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-move:
- shard-iclb: [INCOMPLETE][37] ([fdo#107713]) -> [PASS][38]
[37]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6805/shard-iclb7/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-move.html
[38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14230/shard-iclb5/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-move.html
* igt@kms_frontbuffer_tracking@fbc-stridechange:
- shard-iclb: [FAIL][39] ([fdo#103167]) -> [PASS][40] +1 similar issue
[39]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6805/shard-iclb2/igt@kms_frontbuffer_tracking@fbc-stridechange.html
[40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14230/shard-iclb2/igt@kms_frontbuffer_tracking@fbc-stridechange.html
* igt@kms_plane_alpha_blend@pipe-c-constant-alpha-min:
- shard-skl: [FAIL][41] ([fdo#108145]) -> [PASS][42] +1 similar issue
[41]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6805/shard-skl2/igt@kms_plane_alpha_blend@pipe-c-constant-alpha-min.html
[42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14230/shard-skl6/igt@kms_plane_alpha_blend@pipe-c-constant-alpha-min.html
* igt@kms_plane_alpha_blend@pipe-c-coverage-7efc:
- shard-skl: [FAIL][43] ([fdo#108145] / [fdo#110403]) -> [PASS][44]
[43]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6805/shard-skl7/igt@kms_plane_alpha_blend@pipe-c-coverage-7efc.html
[44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14230/shard-skl3/igt@kms_plane_alpha_blend@pipe-c-coverage-7efc.html
* igt@kms_rotation_crc@sprite-rotation-90-pos-100-0:
- shard-skl: [DMESG-WARN][45] ([fdo#106107]) -> [PASS][46]
[45]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6805/shard-skl8/igt@kms_rotation_crc@sprite-rotation-90-pos-100-0.html
[46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14230/shard-skl2/igt@kms_rotation_crc@sprite-rotation-90-pos-100-0.html
* igt@kms_setmode@basic:
- shard-apl: [FAIL][47] ([fdo#99912]) -> [PASS][48]
[47]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6805/shard-apl4/igt@kms_setmode@basic.html
[48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14230/shard-apl7/igt@kms_setmode@basic.html
- shard-skl: [FAIL][49] ([fdo#99912]) -> [PASS][50]
[49]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6805/shard-skl5/igt@kms_setmode@basic.html
[50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14230/shard-skl4/igt@kms_setmode@basic.html
* igt@perf@blocking:
- shard-skl: [FAIL][51] ([fdo#110728]) -> [PASS][52]
[51]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6805/shard-skl9/igt@perf@blocking.html
[52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14230/shard-skl10/igt@perf@blocking.html
* igt@perf_pmu@rc6-runtime-pm:
- shard-skl: [FAIL][53] ([fdo#105010]) -> [PASS][54]
[53]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6805/shard-skl1/igt@perf_pmu@rc6-runtime-pm.html
[54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14230/shard-skl7/igt@perf_pmu@rc6-runtime-pm.html
* igt@prime_busy@after-bsd2:
- shard-iclb: [SKIP][55] ([fdo#109276]) -> [PASS][56] +15 similar issues
[55]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6805/shard-iclb6/igt@prime_busy@after-bsd2.html
[56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14230/shard-iclb4/igt@prime_busy@after-bsd2.html
#### Warnings ####
* igt@gem_mocs_settings@mocs-reset-bsd2:
- shard-iclb: [SKIP][57] ([fdo#109276]) -> [FAIL][58] ([fdo#111330]) +2 similar issues
[57]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6805/shard-iclb7/igt@gem_mocs_settings@mocs-reset-bsd2.html
[58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14230/shard-iclb1/igt@gem_mocs_settings@mocs-reset-bsd2.html
[fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167
[fdo#103232]: https://bugs.freedesktop.org/show_bug.cgi?id=103232
[fdo#103540]: https://bugs.freedesktop.org/show_bug.cgi?id=103540
[fdo#103927]: https://bugs.freedesktop.org/show_bug.cgi?id=103927
[fdo#104108]: https://bugs.freedesktop.org/show_bug.cgi?id=104108
[fdo#104873]: https://bugs.freedesktop.org/show_bug.cgi?id=104873
[fdo#105010]: https://bugs.freedesktop.org/show_bug.cgi?id=105010
[fdo#105363]: https://bugs.freedesktop.org/show_bug.cgi?id=105363
[fdo#105767]: https://bugs.freedesktop.org/show_bug.cgi?id=105767
[fdo#106107]: https://bugs.freedesktop.org/show_bug.cgi?id=106107
[fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713
[fdo#107773]: https://bugs.freedesktop.org/show_bug.cgi?id=107773
[fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145
[fdo#108566]: https://bugs.freedesktop.org/show_bug.cgi?id=108566
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109276]: https://bugs.freedesktop.org/show_bug.cgi?id=109276
[fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441
[fdo#110403]: https://bugs.freedesktop.org/show_bug.cgi?id=110403
[fdo#110728]: https://bugs.freedesktop.org/show_bug.cgi?id=110728
[fdo#110841]: https://bugs.freedesktop.org/show_bug.cgi?id=110841
[fdo#110854]: https://bugs.freedesktop.org/show_bug.cgi?id=110854
[fdo#111325]: https://bugs.freedesktop.org/show_bug.cgi?id=111325
[fdo#111330]: https://bugs.freedesktop.org/show_bug.cgi?id=111330
[fdo#99912]: https://bugs.freedesktop.org/show_bug.cgi?id=99912
Participating hosts (10 -> 10)
------------------------------
No changes in participating hosts
Build changes
-------------
* CI: CI-20190529 -> None
* Linux: CI_DRM_6805 -> Patchwork_14230
CI-20190529: 20190529
CI_DRM_6805: ade3295daf7345ba37170b8d7fa67931e9397dc9 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_5157: 73d8d3ffccb6f0340e13bf006f56e3658673f345 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_14230: 73d324c8f59b318a88fd0fa06e908f83857d57b8 @ git://anongit.freedesktop.org/gfx-ci/linux
piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14230/
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: ✓ Fi.CI.IGT: success for New cdclk values for gen11+ (rev2)
2019-08-30 21:47 ` ✓ Fi.CI.IGT: " Patchwork
@ 2019-08-30 22:49 ` Matt Roper
0 siblings, 0 replies; 10+ messages in thread
From: Matt Roper @ 2019-08-30 22:49 UTC (permalink / raw)
To: intel-gfx
On Fri, Aug 30, 2019 at 09:47:24PM +0000, Patchwork wrote:
> == Series Details ==
>
> Series: New cdclk values for gen11+ (rev2)
> URL : https://patchwork.freedesktop.org/series/65838/
> State : success
>
> == Summary ==
>
> CI Bug Log - changes from CI_DRM_6805_full -> Patchwork_14230_full
> ====================================================
>
> Summary
> -------
>
> **SUCCESS**
>
> No regressions found.
Pushed to dinq. Thanks for the reviews.
Matt
>
>
>
> Known issues
> ------------
>
> Here are the changes found in Patchwork_14230_full that come from known issues:
>
> ### IGT changes ###
>
> #### Issues hit ####
>
> * igt@gem_ctx_isolation@rcs0-s3:
> - shard-apl: [PASS][1] -> [DMESG-WARN][2] ([fdo#108566]) +3 similar issues
> [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6805/shard-apl7/igt@gem_ctx_isolation@rcs0-s3.html
> [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14230/shard-apl8/igt@gem_ctx_isolation@rcs0-s3.html
>
> * igt@gem_ctx_shared@exec-single-timeline-bsd:
> - shard-iclb: [PASS][3] -> [SKIP][4] ([fdo#110841])
> [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6805/shard-iclb7/igt@gem_ctx_shared@exec-single-timeline-bsd.html
> [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14230/shard-iclb1/igt@gem_ctx_shared@exec-single-timeline-bsd.html
>
> * igt@gem_exec_schedule@preemptive-hang-bsd:
> - shard-iclb: [PASS][5] -> [SKIP][6] ([fdo#111325]) +5 similar issues
> [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6805/shard-iclb7/igt@gem_exec_schedule@preemptive-hang-bsd.html
> [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14230/shard-iclb1/igt@gem_exec_schedule@preemptive-hang-bsd.html
>
> * igt@kms_cursor_legacy@2x-long-flip-vs-cursor-atomic:
> - shard-glk: [PASS][7] -> [FAIL][8] ([fdo#104873])
> [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6805/shard-glk6/igt@kms_cursor_legacy@2x-long-flip-vs-cursor-atomic.html
> [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14230/shard-glk7/igt@kms_cursor_legacy@2x-long-flip-vs-cursor-atomic.html
>
> * igt@kms_flip@flip-vs-expired-vblank:
> - shard-skl: [PASS][9] -> [FAIL][10] ([fdo#105363])
> [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6805/shard-skl1/igt@kms_flip@flip-vs-expired-vblank.html
> [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14230/shard-skl7/igt@kms_flip@flip-vs-expired-vblank.html
>
> * igt@kms_flip@flip-vs-suspend-interruptible:
> - shard-hsw: [PASS][11] -> [INCOMPLETE][12] ([fdo#103540])
> [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6805/shard-hsw1/igt@kms_flip@flip-vs-suspend-interruptible.html
> [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14230/shard-hsw5/igt@kms_flip@flip-vs-suspend-interruptible.html
>
> * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-indfb-plflip-blt:
> - shard-iclb: [PASS][13] -> [FAIL][14] ([fdo#103167]) +1 similar issue
> [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6805/shard-iclb2/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-indfb-plflip-blt.html
> [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14230/shard-iclb2/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-indfb-plflip-blt.html
>
> * igt@kms_plane@pixel-format-pipe-b-planes-source-clamping:
> - shard-apl: [PASS][15] -> [INCOMPLETE][16] ([fdo#103927]) +1 similar issue
> [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6805/shard-apl1/igt@kms_plane@pixel-format-pipe-b-planes-source-clamping.html
> [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14230/shard-apl8/igt@kms_plane@pixel-format-pipe-b-planes-source-clamping.html
>
> * igt@kms_psr@psr2_no_drrs:
> - shard-iclb: [PASS][17] -> [SKIP][18] ([fdo#109441])
> [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6805/shard-iclb2/igt@kms_psr@psr2_no_drrs.html
> [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14230/shard-iclb7/igt@kms_psr@psr2_no_drrs.html
>
> * igt@kms_vblank@pipe-b-ts-continuation-dpms-suspend:
> - shard-skl: [PASS][19] -> [INCOMPLETE][20] ([fdo#104108] / [fdo#107773])
> [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6805/shard-skl4/igt@kms_vblank@pipe-b-ts-continuation-dpms-suspend.html
> [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14230/shard-skl8/igt@kms_vblank@pipe-b-ts-continuation-dpms-suspend.html
>
> * igt@prime_vgem@fence-wait-bsd2:
> - shard-iclb: [PASS][21] -> [SKIP][22] ([fdo#109276]) +28 similar issues
> [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6805/shard-iclb1/igt@prime_vgem@fence-wait-bsd2.html
> [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14230/shard-iclb6/igt@prime_vgem@fence-wait-bsd2.html
>
>
> #### Possible fixes ####
>
> * igt@gem_exec_balancer@smoke:
> - shard-iclb: [SKIP][23] ([fdo#110854]) -> [PASS][24]
> [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6805/shard-iclb8/igt@gem_exec_balancer@smoke.html
> [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14230/shard-iclb2/igt@gem_exec_balancer@smoke.html
>
> * igt@gem_exec_schedule@preempt-queue-contexts-chain-bsd:
> - shard-iclb: [SKIP][25] ([fdo#111325]) -> [PASS][26] +4 similar issues
> [25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6805/shard-iclb1/igt@gem_exec_schedule@preempt-queue-contexts-chain-bsd.html
> [26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14230/shard-iclb5/igt@gem_exec_schedule@preempt-queue-contexts-chain-bsd.html
>
> * igt@gem_softpin@noreloc-s3:
> - shard-skl: [INCOMPLETE][27] ([fdo#104108]) -> [PASS][28] +1 similar issue
> [27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6805/shard-skl7/igt@gem_softpin@noreloc-s3.html
> [28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14230/shard-skl3/igt@gem_softpin@noreloc-s3.html
>
> * igt@i915_pm_rc6_residency@rc6-accuracy:
> - shard-snb: [SKIP][29] ([fdo#109271]) -> [PASS][30]
> [29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6805/shard-snb5/igt@i915_pm_rc6_residency@rc6-accuracy.html
> [30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14230/shard-snb5/igt@i915_pm_rc6_residency@rc6-accuracy.html
>
> * igt@kms_cursor_crc@pipe-c-cursor-alpha-transparent:
> - shard-skl: [FAIL][31] ([fdo#103232]) -> [PASS][32]
> [31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6805/shard-skl2/igt@kms_cursor_crc@pipe-c-cursor-alpha-transparent.html
> [32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14230/shard-skl6/igt@kms_cursor_crc@pipe-c-cursor-alpha-transparent.html
>
> * igt@kms_cursor_crc@pipe-c-cursor-suspend:
> - shard-apl: [DMESG-WARN][33] ([fdo#108566]) -> [PASS][34] +2 similar issues
> [33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6805/shard-apl8/igt@kms_cursor_crc@pipe-c-cursor-suspend.html
> [34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14230/shard-apl2/igt@kms_cursor_crc@pipe-c-cursor-suspend.html
>
> * igt@kms_cursor_legacy@2x-long-cursor-vs-flip-atomic:
> - shard-hsw: [FAIL][35] ([fdo#105767]) -> [PASS][36]
> [35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6805/shard-hsw8/igt@kms_cursor_legacy@2x-long-cursor-vs-flip-atomic.html
> [36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14230/shard-hsw1/igt@kms_cursor_legacy@2x-long-cursor-vs-flip-atomic.html
>
> * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-move:
> - shard-iclb: [INCOMPLETE][37] ([fdo#107713]) -> [PASS][38]
> [37]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6805/shard-iclb7/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-move.html
> [38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14230/shard-iclb5/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-move.html
>
> * igt@kms_frontbuffer_tracking@fbc-stridechange:
> - shard-iclb: [FAIL][39] ([fdo#103167]) -> [PASS][40] +1 similar issue
> [39]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6805/shard-iclb2/igt@kms_frontbuffer_tracking@fbc-stridechange.html
> [40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14230/shard-iclb2/igt@kms_frontbuffer_tracking@fbc-stridechange.html
>
> * igt@kms_plane_alpha_blend@pipe-c-constant-alpha-min:
> - shard-skl: [FAIL][41] ([fdo#108145]) -> [PASS][42] +1 similar issue
> [41]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6805/shard-skl2/igt@kms_plane_alpha_blend@pipe-c-constant-alpha-min.html
> [42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14230/shard-skl6/igt@kms_plane_alpha_blend@pipe-c-constant-alpha-min.html
>
> * igt@kms_plane_alpha_blend@pipe-c-coverage-7efc:
> - shard-skl: [FAIL][43] ([fdo#108145] / [fdo#110403]) -> [PASS][44]
> [43]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6805/shard-skl7/igt@kms_plane_alpha_blend@pipe-c-coverage-7efc.html
> [44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14230/shard-skl3/igt@kms_plane_alpha_blend@pipe-c-coverage-7efc.html
>
> * igt@kms_rotation_crc@sprite-rotation-90-pos-100-0:
> - shard-skl: [DMESG-WARN][45] ([fdo#106107]) -> [PASS][46]
> [45]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6805/shard-skl8/igt@kms_rotation_crc@sprite-rotation-90-pos-100-0.html
> [46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14230/shard-skl2/igt@kms_rotation_crc@sprite-rotation-90-pos-100-0.html
>
> * igt@kms_setmode@basic:
> - shard-apl: [FAIL][47] ([fdo#99912]) -> [PASS][48]
> [47]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6805/shard-apl4/igt@kms_setmode@basic.html
> [48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14230/shard-apl7/igt@kms_setmode@basic.html
> - shard-skl: [FAIL][49] ([fdo#99912]) -> [PASS][50]
> [49]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6805/shard-skl5/igt@kms_setmode@basic.html
> [50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14230/shard-skl4/igt@kms_setmode@basic.html
>
> * igt@perf@blocking:
> - shard-skl: [FAIL][51] ([fdo#110728]) -> [PASS][52]
> [51]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6805/shard-skl9/igt@perf@blocking.html
> [52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14230/shard-skl10/igt@perf@blocking.html
>
> * igt@perf_pmu@rc6-runtime-pm:
> - shard-skl: [FAIL][53] ([fdo#105010]) -> [PASS][54]
> [53]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6805/shard-skl1/igt@perf_pmu@rc6-runtime-pm.html
> [54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14230/shard-skl7/igt@perf_pmu@rc6-runtime-pm.html
>
> * igt@prime_busy@after-bsd2:
> - shard-iclb: [SKIP][55] ([fdo#109276]) -> [PASS][56] +15 similar issues
> [55]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6805/shard-iclb6/igt@prime_busy@after-bsd2.html
> [56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14230/shard-iclb4/igt@prime_busy@after-bsd2.html
>
>
> #### Warnings ####
>
> * igt@gem_mocs_settings@mocs-reset-bsd2:
> - shard-iclb: [SKIP][57] ([fdo#109276]) -> [FAIL][58] ([fdo#111330]) +2 similar issues
> [57]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6805/shard-iclb7/igt@gem_mocs_settings@mocs-reset-bsd2.html
> [58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14230/shard-iclb1/igt@gem_mocs_settings@mocs-reset-bsd2.html
>
>
> [fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167
> [fdo#103232]: https://bugs.freedesktop.org/show_bug.cgi?id=103232
> [fdo#103540]: https://bugs.freedesktop.org/show_bug.cgi?id=103540
> [fdo#103927]: https://bugs.freedesktop.org/show_bug.cgi?id=103927
> [fdo#104108]: https://bugs.freedesktop.org/show_bug.cgi?id=104108
> [fdo#104873]: https://bugs.freedesktop.org/show_bug.cgi?id=104873
> [fdo#105010]: https://bugs.freedesktop.org/show_bug.cgi?id=105010
> [fdo#105363]: https://bugs.freedesktop.org/show_bug.cgi?id=105363
> [fdo#105767]: https://bugs.freedesktop.org/show_bug.cgi?id=105767
> [fdo#106107]: https://bugs.freedesktop.org/show_bug.cgi?id=106107
> [fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713
> [fdo#107773]: https://bugs.freedesktop.org/show_bug.cgi?id=107773
> [fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145
> [fdo#108566]: https://bugs.freedesktop.org/show_bug.cgi?id=108566
> [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
> [fdo#109276]: https://bugs.freedesktop.org/show_bug.cgi?id=109276
> [fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441
> [fdo#110403]: https://bugs.freedesktop.org/show_bug.cgi?id=110403
> [fdo#110728]: https://bugs.freedesktop.org/show_bug.cgi?id=110728
> [fdo#110841]: https://bugs.freedesktop.org/show_bug.cgi?id=110841
> [fdo#110854]: https://bugs.freedesktop.org/show_bug.cgi?id=110854
> [fdo#111325]: https://bugs.freedesktop.org/show_bug.cgi?id=111325
> [fdo#111330]: https://bugs.freedesktop.org/show_bug.cgi?id=111330
> [fdo#99912]: https://bugs.freedesktop.org/show_bug.cgi?id=99912
>
>
> Participating hosts (10 -> 10)
> ------------------------------
>
> No changes in participating hosts
>
>
> Build changes
> -------------
>
> * CI: CI-20190529 -> None
> * Linux: CI_DRM_6805 -> Patchwork_14230
>
> CI-20190529: 20190529
> CI_DRM_6805: ade3295daf7345ba37170b8d7fa67931e9397dc9 @ git://anongit.freedesktop.org/gfx-ci/linux
> IGT_5157: 73d8d3ffccb6f0340e13bf006f56e3658673f345 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
> Patchwork_14230: 73d324c8f59b318a88fd0fa06e908f83857d57b8 @ git://anongit.freedesktop.org/gfx-ci/linux
> piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit
>
> == Logs ==
>
> For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14230/
--
Matt Roper
Graphics Software Engineer
VTT-OSGC Platform Enablement
Intel Corporation
(916) 356-2795
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 10+ messages in thread
end of thread, other threads:[~2019-08-30 22:49 UTC | newest]
Thread overview: 10+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2019-08-26 22:55 [PATCH 0/2] New cdclk values for gen11+ Matt Roper
2019-08-26 22:55 ` [PATCH 1/2] drm/i915: Allow /2 CD2X divider on gen11+ Matt Roper
2019-08-27 13:52 ` Ville Syrjälä
2019-08-30 0:48 ` [PATCH v2 " Matt Roper
2019-08-26 22:55 ` [PATCH 2/2] drm/i915: Add 324mhz and 326.4mhz cdclks for gen11+ Matt Roper
2019-08-27 9:19 ` ✓ Fi.CI.BAT: success for New cdclk values " Patchwork
2019-08-27 13:33 ` ✓ Fi.CI.IGT: " Patchwork
2019-08-30 1:27 ` ✓ Fi.CI.BAT: success for New cdclk values for gen11+ (rev2) Patchwork
2019-08-30 21:47 ` ✓ Fi.CI.IGT: " Patchwork
2019-08-30 22:49 ` Matt Roper
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