[Qemu-devel] [PATCH 00/36] tcg patch queue

From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: peter.maydell@linaro.org
Subject: [Qemu-devel] [PATCH 00/36] tcg patch queue
Date: Tue,  3 Sep 2019 09:08:22 -0700	[thread overview]
Message-ID: <20190903160858.5296-1-richard.henderson@linaro.org> (raw)

The following changes since commit fec105c2abda8567ec15230429c41429b5ee307c:

  Merge remote-tracking branch 'remotes/kraxel/tags/audio-20190828-pull-request' into staging (2019-09-03 14:03:15 +0100)

are available in the Git repository at:

  https://github.com/rth7680/qemu.git tags/pull-tcg-20190903

for you to fetch changes up to c25c283df0f08582df29f1d5d7be1516b851532d:

  tcg: Factor out probe_write() logic into probe_access() (2019-09-03 08:34:18 -0700)

----------------------------------------------------------------
Allow page table bit to swap endianness.
Reorganize watchpoints out of i/o path.
Return host address from probe_write / probe_access.

----------------------------------------------------------------
David Hildenbrand (11):
      exec: Factor out core logic of check_watchpoint()
      tcg: Check for watchpoints in probe_write()
      s390x/tcg: Use guest_addr_valid() instead of h2g_valid() in probe_write_access()
      s390x/tcg: Fix length calculation in probe_write_access()
      tcg: Factor out CONFIG_USER_ONLY probe_write() from s390x code
      tcg: Enforce single page access in probe_write()
      mips/tcg: Call probe_write() for CONFIG_USER_ONLY as well
      hppa/tcg: Call probe_write() also for CONFIG_USER_ONLY
      s390x/tcg: Pass a size to probe_write() in do_csst()
      tcg: Make probe_write() return a pointer to the host page
      tcg: Factor out probe_write() logic into probe_access()

Richard Henderson (6):
      exec: Move user-only watchpoint stubs inline
      cputlb: Fold TLB_RECHECK into TLB_INVALID_MASK
      exec: Factor out cpu_watchpoint_address_matches
      cputlb: Fix size operand for tlb_fill on unaligned store
      cputlb: Remove double-alignment in store_helper
      cputlb: Handle watchpoints via TLB_WATCHPOINT

Tony Nguyen (19):
      tcg: TCGMemOp is now accelerator independent MemOp
      memory: Introduce size_memop
      target/mips: Access MemoryRegion with MemOp
      hw/s390x: Access MemoryRegion with MemOp
      hw/intc/armv7m_nic: Access MemoryRegion with MemOp
      hw/virtio: Access MemoryRegion with MemOp
      hw/vfio: Access MemoryRegion with MemOp
      exec: Access MemoryRegion with MemOp
      cputlb: Access MemoryRegion with MemOp
      memory: Access MemoryRegion with MemOp
      hw/s390x: Hard code size with MO_{8|16|32|64}
      target/mips: Hard code size with MO_{8|16|32|64}
      exec: Hard code size with MO_{8|16|32|64}
      memory: Access MemoryRegion with endianness
      cputlb: Replace size and endian operands for MemOp
      memory: Single byte swap along the I/O path
      cputlb: Byte swap memory transaction attribute
      target/sparc: Add TLB entry with attributes
      target/sparc: sun4u Invert Endian TTE bit

 include/exec/cpu-all.h                  |   8 +-
 include/exec/exec-all.h                 |  10 +-
 include/exec/memattrs.h                 |   2 +
 include/exec/memop.h                    | 134 +++++++++++
 include/exec/memory.h                   |  12 +-
 include/hw/core/cpu.h                   |  37 +++
 target/arm/translate-a64.h              |   2 +-
 target/arm/translate.h                  |   2 +-
 target/sparc/cpu.h                      |   2 +
 tcg/tcg-op.h                            |  80 +++---
 tcg/tcg.h                               | 101 +-------
 trace/mem-internal.h                    |   4 +-
 trace/mem.h                             |   4 +-
 accel/tcg/cputlb.c                      | 414 ++++++++++++++++++--------------
 accel/tcg/user-exec.c                   |  32 +++
 exec.c                                  | 177 +++-----------
 hw/intc/armv7m_nvic.c                   |  13 +-
 hw/s390x/s390-pci-inst.c                |  11 +-
 hw/vfio/pci-quirks.c                    |   7 +-
 hw/virtio/virtio-pci.c                  |  15 +-
 memory.c                                |  58 +++--
 memory_ldst.inc.c                       |  81 ++-----
 target/alpha/translate.c                |   2 +-
 target/arm/translate-a64.c              |  48 ++--
 target/arm/translate-sve.c              |   2 +-
 target/arm/translate.c                  |  32 +--
 target/hppa/op_helper.c                 |   2 -
 target/hppa/translate.c                 |  14 +-
 target/i386/translate.c                 | 132 +++++-----
 target/m68k/translate.c                 |   2 +-
 target/microblaze/translate.c           |   4 +-
 target/mips/op_helper.c                 |  13 +-
 target/mips/translate.c                 |   8 +-
 target/openrisc/translate.c             |   4 +-
 target/ppc/translate.c                  |  12 +-
 target/riscv/insn_trans/trans_rva.inc.c |   8 +-
 target/riscv/insn_trans/trans_rvi.inc.c |   4 +-
 target/s390x/mem_helper.c               |  13 +-
 target/s390x/translate.c                |   6 +-
 target/s390x/translate_vx.inc.c         |  10 +-
 target/sparc/mmu_helper.c               |  40 +--
 target/sparc/translate.c                |  14 +-
 target/tilegx/translate.c               |  10 +-
 target/tricore/translate.c              |   8 +-
 tcg/aarch64/tcg-target.inc.c            |  26 +-
 tcg/arm/tcg-target.inc.c                |  26 +-
 tcg/i386/tcg-target.inc.c               |  24 +-
 tcg/mips/tcg-target.inc.c               |  16 +-
 tcg/optimize.c                          |   2 +-
 tcg/ppc/tcg-target.inc.c                |  12 +-
 tcg/riscv/tcg-target.inc.c              |  20 +-
 tcg/s390/tcg-target.inc.c               |  14 +-
 tcg/sparc/tcg-target.inc.c              |   6 +-
 tcg/tcg-op.c                            |  38 +--
 tcg/tcg.c                               |   2 +-
 MAINTAINERS                             |   1 +
 tcg/README                              |   2 +-
 57 files changed, 918 insertions(+), 865 deletions(-)
 create mode 100644 include/exec/memop.h