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From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: peter.maydell@linaro.org, David Hildenbrand <david@redhat.com>
Subject: [Qemu-devel] [PATCH 30/36] tcg: Factor out CONFIG_USER_ONLY probe_write() from s390x code
Date: Tue,  3 Sep 2019 09:08:52 -0700	[thread overview]
Message-ID: <20190903160858.5296-31-richard.henderson@linaro.org> (raw)
In-Reply-To: <20190903160858.5296-1-richard.henderson@linaro.org>

From: David Hildenbrand <david@redhat.com>

Factor it out into common code. Similar to the !CONFIG_USER_ONLY variant,
let's not allow to cross page boundaries.

Signed-off-by: David Hildenbrand <david@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20190826075112.25637-4-david@redhat.com>
[rth: Move cpu & cc variables inside if block.]
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
 include/exec/exec-all.h   |  4 ++--
 accel/tcg/user-exec.c     | 14 ++++++++++++++
 target/s390x/mem_helper.c |  7 -------
 3 files changed, 16 insertions(+), 9 deletions(-)

diff --git a/include/exec/exec-all.h b/include/exec/exec-all.h
index 135aeaab0d..cbcc85add3 100644
--- a/include/exec/exec-all.h
+++ b/include/exec/exec-all.h
@@ -260,8 +260,6 @@ void tlb_set_page_with_attrs(CPUState *cpu, target_ulong vaddr,
 void tlb_set_page(CPUState *cpu, target_ulong vaddr,
                   hwaddr paddr, int prot,
                   int mmu_idx, target_ulong size);
-void probe_write(CPUArchState *env, target_ulong addr, int size, int mmu_idx,
-                 uintptr_t retaddr);
 #else
 static inline void tlb_init(CPUState *cpu)
 {
@@ -312,6 +310,8 @@ static inline void tlb_flush_by_mmuidx_all_cpus_synced(CPUState *cpu,
 {
 }
 #endif
+void probe_write(CPUArchState *env, target_ulong addr, int size, int mmu_idx,
+                 uintptr_t retaddr);
 
 #define CODE_GEN_ALIGN           16 /* must be >= of the size of a icache line */
 
diff --git a/accel/tcg/user-exec.c b/accel/tcg/user-exec.c
index 897d1571c4..86e6827201 100644
--- a/accel/tcg/user-exec.c
+++ b/accel/tcg/user-exec.c
@@ -188,6 +188,20 @@ static inline int handle_cpu_signal(uintptr_t pc, siginfo_t *info,
     g_assert_not_reached();
 }
 
+void probe_write(CPUArchState *env, target_ulong addr, int size, int mmu_idx,
+                 uintptr_t retaddr)
+{
+    if (!guest_addr_valid(addr) ||
+        page_check_range(addr, size, PAGE_WRITE) < 0) {
+        CPUState *cpu = env_cpu(env);
+        CPUClass *cc = CPU_GET_CLASS(cpu);
+
+        cc->tlb_fill(cpu, addr, size, MMU_DATA_STORE, MMU_USER_IDX, false,
+                     retaddr);
+        g_assert_not_reached();
+    }
+}
+
 #if defined(__i386__)
 
 #if defined(__NetBSD__)
diff --git a/target/s390x/mem_helper.c b/target/s390x/mem_helper.c
index 4b43440e89..fdff60ce5d 100644
--- a/target/s390x/mem_helper.c
+++ b/target/s390x/mem_helper.c
@@ -2615,12 +2615,6 @@ uint32_t HELPER(cu42)(CPUS390XState *env, uint32_t r1, uint32_t r2, uint32_t m3)
 void probe_write_access(CPUS390XState *env, uint64_t addr, uint64_t len,
                         uintptr_t ra)
 {
-#ifdef CONFIG_USER_ONLY
-    if (!guest_addr_valid(addr) || !guest_addr_valid(addr + len - 1) ||
-        page_check_range(addr, len, PAGE_WRITE) < 0) {
-        s390_program_interrupt(env, PGM_ADDRESSING, ILEN_AUTO, ra);
-    }
-#else
     /* test the actual access, not just any access to the page due to LAP */
     while (len) {
         const uint64_t pagelen = -(addr | TARGET_PAGE_MASK);
@@ -2630,7 +2624,6 @@ void probe_write_access(CPUS390XState *env, uint64_t addr, uint64_t len,
         addr = wrap_address(env, addr + curlen);
         len -= curlen;
     }
-#endif
 }
 
 void HELPER(probe_write_access)(CPUS390XState *env, uint64_t addr, uint64_t len)
-- 
2.17.1



  parent reply	other threads:[~2019-09-03 16:51 UTC|newest]

Thread overview: 43+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-09-03 16:08 [Qemu-devel] [PATCH 00/36] tcg patch queue Richard Henderson
2019-09-03 16:08 ` [Qemu-devel] [PATCH 01/36] tcg: TCGMemOp is now accelerator independent MemOp Richard Henderson
2019-09-03 16:08 ` [Qemu-devel] [PATCH 02/36] memory: Introduce size_memop Richard Henderson
2019-09-03 16:08 ` [Qemu-devel] [PATCH 03/36] target/mips: Access MemoryRegion with MemOp Richard Henderson
2019-09-03 16:08 ` [Qemu-devel] [PATCH 04/36] hw/s390x: " Richard Henderson
2019-09-03 16:08 ` [Qemu-devel] [PATCH 05/36] hw/intc/armv7m_nic: " Richard Henderson
2019-09-03 16:08 ` [Qemu-devel] [PATCH 06/36] hw/virtio: " Richard Henderson
2019-09-03 16:08 ` [Qemu-devel] [PATCH 07/36] hw/vfio: " Richard Henderson
2019-09-03 16:08 ` [Qemu-devel] [PATCH 08/36] exec: " Richard Henderson
2019-09-03 16:08 ` [Qemu-devel] [PATCH 09/36] cputlb: " Richard Henderson
2019-09-03 16:08 ` [Qemu-devel] [PATCH 10/36] memory: " Richard Henderson
2019-09-03 16:08 ` [Qemu-devel] [PATCH 11/36] hw/s390x: Hard code size with MO_{8|16|32|64} Richard Henderson
2019-09-03 16:08 ` [Qemu-devel] [PATCH 12/36] target/mips: " Richard Henderson
2019-09-03 16:08 ` [Qemu-devel] [PATCH 13/36] exec: " Richard Henderson
2019-09-03 16:08 ` [Qemu-devel] [PATCH 14/36] memory: Access MemoryRegion with endianness Richard Henderson
2019-09-03 16:08 ` [Qemu-devel] [PATCH 15/36] cputlb: Replace size and endian operands for MemOp Richard Henderson
2019-09-03 16:08 ` [Qemu-devel] [PATCH 16/36] memory: Single byte swap along the I/O path Richard Henderson
2019-09-03 16:08 ` [Qemu-devel] [PATCH 17/36] cputlb: Byte swap memory transaction attribute Richard Henderson
2019-09-03 16:08 ` [Qemu-devel] [PATCH 18/36] target/sparc: Add TLB entry with attributes Richard Henderson
2019-09-03 16:08 ` [Qemu-devel] [PATCH 19/36] target/sparc: sun4u Invert Endian TTE bit Richard Henderson
2019-09-03 16:08 ` [Qemu-devel] [PATCH 20/36] exec: Move user-only watchpoint stubs inline Richard Henderson
2019-09-03 16:08 ` [Qemu-devel] [PATCH 21/36] exec: Factor out core logic of check_watchpoint() Richard Henderson
2019-09-03 16:08 ` [Qemu-devel] [PATCH 22/36] cputlb: Fold TLB_RECHECK into TLB_INVALID_MASK Richard Henderson
2019-09-06 11:02   ` Peter Maydell
2019-09-06 14:58     ` Richard Henderson
2019-09-03 16:08 ` [Qemu-devel] [PATCH 23/36] exec: Factor out cpu_watchpoint_address_matches Richard Henderson
2019-09-03 16:08 ` [Qemu-devel] [PATCH 24/36] cputlb: Fix size operand for tlb_fill on unaligned store Richard Henderson
2019-09-03 16:08 ` [Qemu-devel] [PATCH 25/36] cputlb: Remove double-alignment in store_helper Richard Henderson
2019-09-03 16:08 ` [Qemu-devel] [PATCH 26/36] cputlb: Handle watchpoints via TLB_WATCHPOINT Richard Henderson
2019-09-03 16:08 ` [Qemu-devel] [PATCH 27/36] tcg: Check for watchpoints in probe_write() Richard Henderson
2019-09-03 16:08 ` [Qemu-devel] [PATCH 28/36] s390x/tcg: Use guest_addr_valid() instead of h2g_valid() in probe_write_access() Richard Henderson
2019-09-03 16:08 ` [Qemu-devel] [PATCH 29/36] s390x/tcg: Fix length calculation " Richard Henderson
2019-09-03 16:08 ` Richard Henderson [this message]
2019-09-03 16:08 ` [Qemu-devel] [PATCH 31/36] tcg: Enforce single page access in probe_write() Richard Henderson
2019-09-03 16:08 ` [Qemu-devel] [PATCH 32/36] mips/tcg: Call probe_write() for CONFIG_USER_ONLY as well Richard Henderson
2019-09-03 16:08 ` [Qemu-devel] [PATCH 33/36] hppa/tcg: Call probe_write() also for CONFIG_USER_ONLY Richard Henderson
2019-09-03 16:08 ` [Qemu-devel] [PATCH 34/36] s390x/tcg: Pass a size to probe_write() in do_csst() Richard Henderson
2019-09-03 16:08 ` [Qemu-devel] [PATCH 35/36] tcg: Make probe_write() return a pointer to the host page Richard Henderson
2019-09-03 16:08 ` [Qemu-devel] [PATCH 36/36] tcg: Factor out probe_write() logic into probe_access() Richard Henderson
2019-09-03 16:58 ` [Qemu-devel] [PATCH 00/36] tcg patch queue Mark Cave-Ayland
2019-09-04  8:15   ` Peter Maydell
2019-09-03 17:06 ` Philippe Mathieu-Daudé
2019-09-04 16:22 ` Peter Maydell

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