[PATCH i-g-t 1/4] i915/gem_exec_balancer: Beware the migratory fence

[PATCH i-g-t 1/4] i915/gem_exec_balancer: Beware the migratory fence

[Chris Wilson]

If the object needs to be migrated, it may will need GPU relocs and so
have an exclusive fence showing up in the write domain.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
---
 tests/i915/gem_exec_balancer.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/tests/i915/gem_exec_balancer.c b/tests/i915/gem_exec_balancer.c
index cda156ea6..407dc0eca 100644
--- a/tests/i915/gem_exec_balancer.c
+++ b/tests/i915/gem_exec_balancer.c
@@ -830,10 +830,10 @@ static void busy(int i915)
 		do_ioctl(i915, DRM_IOCTL_I915_GEM_BUSY, &busy);
 		igt_assert_eq_u32(busy.busy, 1u << (class + 16));
 
-		/* Queued(read): expected class */
+		/* Queued(read, maybe write if being migrated): expected class */
 		busy.handle = spin[1]->handle;
 		do_ioctl(i915, DRM_IOCTL_I915_GEM_BUSY, &busy);
-		igt_assert_eq_u32(busy.busy, 1u << (class + 16));
+		igt_assert_eq_u32(busy.busy & 0xffff << 16, 1u << (class + 16));
 
 		/* Queued(write): expected class */
 		busy.handle = scratch;
-- 
2.23.0

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[igt-dev] [PATCH i-g-t 1/4] i915/gem_exec_balancer: Beware the migratory fence

[Chris Wilson]

If the object needs to be migrated, it may will need GPU relocs and so
have an exclusive fence showing up in the write domain.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
---
 tests/i915/gem_exec_balancer.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/tests/i915/gem_exec_balancer.c b/tests/i915/gem_exec_balancer.c
index cda156ea6..407dc0eca 100644
--- a/tests/i915/gem_exec_balancer.c
+++ b/tests/i915/gem_exec_balancer.c
@@ -830,10 +830,10 @@ static void busy(int i915)
 		do_ioctl(i915, DRM_IOCTL_I915_GEM_BUSY, &busy);
 		igt_assert_eq_u32(busy.busy, 1u << (class + 16));
 
-		/* Queued(read): expected class */
+		/* Queued(read, maybe write if being migrated): expected class */
 		busy.handle = spin[1]->handle;
 		do_ioctl(i915, DRM_IOCTL_I915_GEM_BUSY, &busy);
-		igt_assert_eq_u32(busy.busy, 1u << (class + 16));
+		igt_assert_eq_u32(busy.busy & 0xffff << 16, 1u << (class + 16));
 
 		/* Queued(write): expected class */
 		busy.handle = scratch;
-- 
2.23.0

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[PATCH i-g-t 2/4] i915/gem_exec_schedule: Check timeslice

[Chris Wilson]

Check that we can run a second request even if an equal priority spinner
is hogging the engine.

Extend the testing with some undying timeslice behaviour that requires
hangcheck to intervene.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
---
 tests/i915/gem_exec_schedule.c | 109 +++++++++++++++++++++++++++++++++
 1 file changed, 109 insertions(+)

diff --git a/tests/i915/gem_exec_schedule.c b/tests/i915/gem_exec_schedule.c
index ddcb1f21a..461e8de09 100644
--- a/tests/i915/gem_exec_schedule.c
+++ b/tests/i915/gem_exec_schedule.c
@@ -1060,6 +1060,107 @@ static void preempt_queue(int fd, unsigned ring, unsigned int flags)
 	}
 }
 
+static void preempt_timeslice(int i915, unsigned ring)
+{
+	const uint32_t bbe = MI_BATCH_BUFFER_END;
+	struct drm_i915_gem_exec_object2 obj = {
+		.handle = gem_create(i915, 4096)
+	};
+	struct drm_i915_gem_execbuffer2 execbuf = {
+		.buffers_ptr = to_user_pointer(&obj),
+		.buffer_count = 1,
+		.flags = ring,
+		.rsvd1 = gem_context_create(i915),
+	};
+	igt_spin_t *spin;
+
+	/*
+	 * Launch a spinner to occupy the target engine, and then
+	 * check we execute a ping underneath it from a second context.
+	 */
+	spin = igt_spin_new(i915, .engine = ring, .flags = IGT_SPIN_POLL_RUN);
+	igt_spin_busywait_until_started(spin);
+
+	/* Both the active spinner and this are at the same priority */
+	gem_write(i915, obj.handle, 0, &bbe, sizeof(bbe));
+	gem_execbuf(i915, &execbuf);
+	gem_sync(i915, obj.handle);
+
+	igt_assert(gem_bo_busy(i915, spin->handle));
+	igt_spin_free(i915, spin);
+
+	gem_context_destroy(i915, execbuf.rsvd1);
+	gem_close(i915, obj.handle);
+}
+
+static void preempt_timeslice_undying(int i915, unsigned ring)
+{
+	struct drm_i915_gem_exec_object2 obj = {
+		.handle = gem_create(i915, 4096)
+	};
+	struct drm_i915_gem_execbuffer2 execbuf = {
+		.buffers_ptr = to_user_pointer(&obj),
+		.buffer_count = 1,
+		.flags = ring,
+		.rsvd1 = gem_context_create(i915),
+	};
+	igt_spin_t *spin;
+
+	/*
+	 * We should not allow a spinner to evade hangcheck by simply
+	 * being timesliced.
+	 */
+	spin = igt_spin_new(i915, .engine = ring, .flags = IGT_SPIN_POLL_RUN);
+	igt_spin_busywait_until_started(spin);
+
+	for (int i = 0; i < 120; i++) {
+		const uint32_t bbe = MI_BATCH_BUFFER_END;
+
+		if (!gem_bo_busy(i915, spin->handle))
+			break;
+
+		gem_write(i915, obj.handle, 0, &bbe, sizeof(bbe));
+		gem_execbuf(i915, &execbuf);
+
+		usleep(500 * 1000); /* 0.5s */
+	}
+
+	igt_assert(!gem_bo_busy(i915, spin->handle));
+	igt_spin_free(i915, spin);
+
+	gem_context_destroy(i915, execbuf.rsvd1);
+	gem_close(i915, obj.handle);
+}
+
+static void preempt_antitimeslice(int i915, unsigned ring)
+{
+	uint32_t ctx[2] = { gem_context_create(i915), gem_context_create(i915) };
+	igt_spin_t *spin[2];
+
+	/*
+	 * Launch two independent spinners to occupy an engine. Timeslicing
+	 * should not allow them to bypass hangcheck and run indefinitely.
+	 */
+	for (int i = 0; i < ARRAY_SIZE(spin); i++)
+		spin[i] = igt_spin_new(i915, ctx[i],
+				       .engine = ring,
+				       .flags = IGT_SPIN_FENCE_OUT);
+
+	/* Hangcheck should kill each spinner after about 10s */
+	for (int i = 0; i < ARRAY_SIZE(spin); i++) {
+		int64_t timeout = 60ull * NSEC_PER_SEC;
+		igt_assert_eq(gem_wait(i915, spin[i]->handle, &timeout), 0);
+	}
+
+	for (int i = 0; i < ARRAY_SIZE(spin); i++) {
+		igt_assert(!gem_bo_busy(i915, spin[i]->handle));
+		igt_assert_eq(sync_fence_status(spin[i]->out_fence), -EIO);
+
+		igt_spin_free(i915, spin[i]);
+		gem_context_destroy(i915, ctx[i]);
+	}
+}
+
 static void preempt_self(int fd, unsigned ring)
 {
 	uint32_t result = gem_create(fd, 4096);
@@ -1773,6 +1874,8 @@ igt_main
 					igt_subtest_f("preempt-queue-contexts-chain-%s", e->name)
 						preempt_queue(fd, e->exec_id | e->flags, CONTEXTS | CHAIN);
 
+					igt_subtest_f("preempt-timeslice-%s", e->name)
+						preempt_timeslice(fd, e->exec_id | e->flags);
 					igt_subtest_group {
 						igt_hang_t hang;
 
@@ -1788,6 +1891,12 @@ igt_main
 						igt_subtest_f("preemptive-hang-%s", e->name)
 							preemptive_hang(fd, e->exec_id | e->flags);
 
+						igt_subtest_f("preempt-timeslice-undying-%s", e->name)
+							preempt_timeslice_undying(fd, e->exec_id | e->flags);
+
+						igt_subtest_f("preempt-antitimeslice-%s", e->name)
+							preempt_antitimeslice(fd, e->exec_id | e->flags);
+
 						igt_fixture {
 							igt_disallow_hang(fd, hang);
 							igt_fork_hang_detector(fd);
-- 
2.23.0

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[igt-dev] [PATCH i-g-t 2/4] i915/gem_exec_schedule: Check timeslice

[Chris Wilson]

Check that we can run a second request even if an equal priority spinner
is hogging the engine.

Extend the testing with some undying timeslice behaviour that requires
hangcheck to intervene.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
---
 tests/i915/gem_exec_schedule.c | 109 +++++++++++++++++++++++++++++++++
 1 file changed, 109 insertions(+)

diff --git a/tests/i915/gem_exec_schedule.c b/tests/i915/gem_exec_schedule.c
index ddcb1f21a..461e8de09 100644
--- a/tests/i915/gem_exec_schedule.c
+++ b/tests/i915/gem_exec_schedule.c
@@ -1060,6 +1060,107 @@ static void preempt_queue(int fd, unsigned ring, unsigned int flags)
 	}
 }
 
+static void preempt_timeslice(int i915, unsigned ring)
+{
+	const uint32_t bbe = MI_BATCH_BUFFER_END;
+	struct drm_i915_gem_exec_object2 obj = {
+		.handle = gem_create(i915, 4096)
+	};
+	struct drm_i915_gem_execbuffer2 execbuf = {
+		.buffers_ptr = to_user_pointer(&obj),
+		.buffer_count = 1,
+		.flags = ring,
+		.rsvd1 = gem_context_create(i915),
+	};
+	igt_spin_t *spin;
+
+	/*
+	 * Launch a spinner to occupy the target engine, and then
+	 * check we execute a ping underneath it from a second context.
+	 */
+	spin = igt_spin_new(i915, .engine = ring, .flags = IGT_SPIN_POLL_RUN);
+	igt_spin_busywait_until_started(spin);
+
+	/* Both the active spinner and this are at the same priority */
+	gem_write(i915, obj.handle, 0, &bbe, sizeof(bbe));
+	gem_execbuf(i915, &execbuf);
+	gem_sync(i915, obj.handle);
+
+	igt_assert(gem_bo_busy(i915, spin->handle));
+	igt_spin_free(i915, spin);
+
+	gem_context_destroy(i915, execbuf.rsvd1);
+	gem_close(i915, obj.handle);
+}
+
+static void preempt_timeslice_undying(int i915, unsigned ring)
+{
+	struct drm_i915_gem_exec_object2 obj = {
+		.handle = gem_create(i915, 4096)
+	};
+	struct drm_i915_gem_execbuffer2 execbuf = {
+		.buffers_ptr = to_user_pointer(&obj),
+		.buffer_count = 1,
+		.flags = ring,
+		.rsvd1 = gem_context_create(i915),
+	};
+	igt_spin_t *spin;
+
+	/*
+	 * We should not allow a spinner to evade hangcheck by simply
+	 * being timesliced.
+	 */
+	spin = igt_spin_new(i915, .engine = ring, .flags = IGT_SPIN_POLL_RUN);
+	igt_spin_busywait_until_started(spin);
+
+	for (int i = 0; i < 120; i++) {
+		const uint32_t bbe = MI_BATCH_BUFFER_END;
+
+		if (!gem_bo_busy(i915, spin->handle))
+			break;
+
+		gem_write(i915, obj.handle, 0, &bbe, sizeof(bbe));
+		gem_execbuf(i915, &execbuf);
+
+		usleep(500 * 1000); /* 0.5s */
+	}
+
+	igt_assert(!gem_bo_busy(i915, spin->handle));
+	igt_spin_free(i915, spin);
+
+	gem_context_destroy(i915, execbuf.rsvd1);
+	gem_close(i915, obj.handle);
+}
+
+static void preempt_antitimeslice(int i915, unsigned ring)
+{
+	uint32_t ctx[2] = { gem_context_create(i915), gem_context_create(i915) };
+	igt_spin_t *spin[2];
+
+	/*
+	 * Launch two independent spinners to occupy an engine. Timeslicing
+	 * should not allow them to bypass hangcheck and run indefinitely.
+	 */
+	for (int i = 0; i < ARRAY_SIZE(spin); i++)
+		spin[i] = igt_spin_new(i915, ctx[i],
+				       .engine = ring,
+				       .flags = IGT_SPIN_FENCE_OUT);
+
+	/* Hangcheck should kill each spinner after about 10s */
+	for (int i = 0; i < ARRAY_SIZE(spin); i++) {
+		int64_t timeout = 60ull * NSEC_PER_SEC;
+		igt_assert_eq(gem_wait(i915, spin[i]->handle, &timeout), 0);
+	}
+
+	for (int i = 0; i < ARRAY_SIZE(spin); i++) {
+		igt_assert(!gem_bo_busy(i915, spin[i]->handle));
+		igt_assert_eq(sync_fence_status(spin[i]->out_fence), -EIO);
+
+		igt_spin_free(i915, spin[i]);
+		gem_context_destroy(i915, ctx[i]);
+	}
+}
+
 static void preempt_self(int fd, unsigned ring)
 {
 	uint32_t result = gem_create(fd, 4096);
@@ -1773,6 +1874,8 @@ igt_main
 					igt_subtest_f("preempt-queue-contexts-chain-%s", e->name)
 						preempt_queue(fd, e->exec_id | e->flags, CONTEXTS | CHAIN);
 
+					igt_subtest_f("preempt-timeslice-%s", e->name)
+						preempt_timeslice(fd, e->exec_id | e->flags);
 					igt_subtest_group {
 						igt_hang_t hang;
 
@@ -1788,6 +1891,12 @@ igt_main
 						igt_subtest_f("preemptive-hang-%s", e->name)
 							preemptive_hang(fd, e->exec_id | e->flags);
 
+						igt_subtest_f("preempt-timeslice-undying-%s", e->name)
+							preempt_timeslice_undying(fd, e->exec_id | e->flags);
+
+						igt_subtest_f("preempt-antitimeslice-%s", e->name)
+							preempt_antitimeslice(fd, e->exec_id | e->flags);
+
 						igt_fixture {
 							igt_disallow_hang(fd, hang);
 							igt_fork_hang_detector(fd);
-- 
2.23.0

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[PATCH i-g-t 3/4] Force spin-batch to cause a hang as required

[Chris Wilson]

When using a spinner to trigger a hang, make it unpreemptable so that it
appears like a true hang.

References: https://bugs.freedesktop.org/show_bug.cgi?id=109661
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
---
 tests/i915/gem_eio.c        | 4 +++-
 tests/i915/gem_exec_fence.c | 3 ++-
 tests/kms_busy.c            | 3 ++-
 3 files changed, 7 insertions(+), 3 deletions(-)

diff --git a/tests/i915/gem_eio.c b/tests/i915/gem_eio.c
index 9b086a039..a783b7bff 100644
--- a/tests/i915/gem_eio.c
+++ b/tests/i915/gem_eio.c
@@ -176,7 +176,9 @@ static igt_spin_t * __spin_poll(int fd, uint32_t ctx, unsigned long flags)
 	struct igt_spin_factory opts = {
 		.ctx = ctx,
 		.engine = flags,
-		.flags = IGT_SPIN_FAST | IGT_SPIN_FENCE_OUT,
+		.flags = (IGT_SPIN_FAST |
+			  IGT_SPIN_NO_PREEMPTION |
+			  IGT_SPIN_FENCE_OUT),
 	};
 
 	if (gem_can_store_dword(fd, opts.engine))
diff --git a/tests/i915/gem_exec_fence.c b/tests/i915/gem_exec_fence.c
index 207182922..2f04d7af4 100644
--- a/tests/i915/gem_exec_fence.c
+++ b/tests/i915/gem_exec_fence.c
@@ -331,7 +331,8 @@ static void test_fence_await(int fd, unsigned ring, unsigned flags)
 
 	spin = igt_spin_new(fd,
 			    .engine = ring,
-			    .flags = IGT_SPIN_FENCE_OUT);
+			    .flags = (IGT_SPIN_FENCE_OUT |
+				      IGT_SPIN_NO_PREEMPTION));
 	igt_assert(spin->out_fence != -1);
 
 	i = 0;
diff --git a/tests/kms_busy.c b/tests/kms_busy.c
index 66f26cd08..7e5ab3d19 100644
--- a/tests/kms_busy.c
+++ b/tests/kms_busy.c
@@ -271,7 +271,8 @@ static void test_pageflip_modeset_hang(igt_display_t *dpy,
 
 	t = igt_spin_new(dpy->drm_fd,
 			 .engine = ring,
-			 .dependency = fb.gem_handle);
+			 .dependency = fb.gem_handle,
+			 .flags = IGT_SPIN_NO_PREEMPTION);
 
 	do_or_die(drmModePageFlip(dpy->drm_fd, dpy->pipes[pipe].crtc_id, fb.fb_id, DRM_MODE_PAGE_FLIP_EVENT, &fb));
 
-- 
2.23.0

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[igt-dev] [PATCH i-g-t 3/4] Force spin-batch to cause a hang as required

[Chris Wilson]

When using a spinner to trigger a hang, make it unpreemptable so that it
appears like a true hang.

References: https://bugs.freedesktop.org/show_bug.cgi?id=109661
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
---
 tests/i915/gem_eio.c        | 4 +++-
 tests/i915/gem_exec_fence.c | 3 ++-
 tests/kms_busy.c            | 3 ++-
 3 files changed, 7 insertions(+), 3 deletions(-)

diff --git a/tests/i915/gem_eio.c b/tests/i915/gem_eio.c
index 9b086a039..a783b7bff 100644
--- a/tests/i915/gem_eio.c
+++ b/tests/i915/gem_eio.c
@@ -176,7 +176,9 @@ static igt_spin_t * __spin_poll(int fd, uint32_t ctx, unsigned long flags)
 	struct igt_spin_factory opts = {
 		.ctx = ctx,
 		.engine = flags,
-		.flags = IGT_SPIN_FAST | IGT_SPIN_FENCE_OUT,
+		.flags = (IGT_SPIN_FAST |
+			  IGT_SPIN_NO_PREEMPTION |
+			  IGT_SPIN_FENCE_OUT),
 	};
 
 	if (gem_can_store_dword(fd, opts.engine))
diff --git a/tests/i915/gem_exec_fence.c b/tests/i915/gem_exec_fence.c
index 207182922..2f04d7af4 100644
--- a/tests/i915/gem_exec_fence.c
+++ b/tests/i915/gem_exec_fence.c
@@ -331,7 +331,8 @@ static void test_fence_await(int fd, unsigned ring, unsigned flags)
 
 	spin = igt_spin_new(fd,
 			    .engine = ring,
-			    .flags = IGT_SPIN_FENCE_OUT);
+			    .flags = (IGT_SPIN_FENCE_OUT |
+				      IGT_SPIN_NO_PREEMPTION));
 	igt_assert(spin->out_fence != -1);
 
 	i = 0;
diff --git a/tests/kms_busy.c b/tests/kms_busy.c
index 66f26cd08..7e5ab3d19 100644
--- a/tests/kms_busy.c
+++ b/tests/kms_busy.c
@@ -271,7 +271,8 @@ static void test_pageflip_modeset_hang(igt_display_t *dpy,
 
 	t = igt_spin_new(dpy->drm_fd,
 			 .engine = ring,
-			 .dependency = fb.gem_handle);
+			 .dependency = fb.gem_handle,
+			 .flags = IGT_SPIN_NO_PREEMPTION);
 
 	do_or_die(drmModePageFlip(dpy->drm_fd, dpy->pipes[pipe].crtc_id, fb.fb_id, DRM_MODE_PAGE_FLIP_EVENT, &fb));
 
-- 
2.23.0

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[PATCH i-g-t 4/4] kms_busy: Replace fiddling with hangcheck modparam with explicit fence

[Chris Wilson]

Use an explicit fence to circumvent the [i915] GPU hang detection rather
than tweak the i915 specific modparam (and remove the assertion that
such a param exists). Note, that with a bit more work, the fence could
be used be directly rather than via dirtying the fb with a dummyload.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
---
 lib/igt_dummyload.c |  5 +++++
 lib/igt_dummyload.h | 10 ++++++----
 tests/kms_busy.c    | 26 ++++++++++----------------
 3 files changed, 21 insertions(+), 20 deletions(-)

diff --git a/lib/igt_dummyload.c b/lib/igt_dummyload.c
index 0e06276af..65b5cc927 100644
--- a/lib/igt_dummyload.c
+++ b/lib/igt_dummyload.c
@@ -236,6 +236,11 @@ emit_recursive_batch(igt_spin_t *spin,
 	if (opts->flags & IGT_SPIN_FENCE_OUT)
 		execbuf->flags |= I915_EXEC_FENCE_OUT;
 
+	if (opts->flags & IGT_SPIN_FENCE_IN) {
+		execbuf->flags |= I915_EXEC_FENCE_IN;
+		execbuf->rsvd2 = opts->fence;
+	}
+
 	for (i = 0; i < nengine; i++) {
 		execbuf->flags &= ~ENGINE_MASK;
 		execbuf->flags |= flags[i];
diff --git a/lib/igt_dummyload.h b/lib/igt_dummyload.h
index bb25751ad..66837057d 100644
--- a/lib/igt_dummyload.h
+++ b/lib/igt_dummyload.h
@@ -54,12 +54,14 @@ struct igt_spin_factory {
 	uint32_t dependency;
 	unsigned int engine;
 	unsigned int flags;
+	int fence;
 };
 
-#define IGT_SPIN_FENCE_OUT     (1 << 0)
-#define IGT_SPIN_POLL_RUN      (1 << 1)
-#define IGT_SPIN_FAST          (1 << 2)
-#define IGT_SPIN_NO_PREEMPTION (1 << 3)
+#define IGT_SPIN_FENCE_IN      (1 << 0)
+#define IGT_SPIN_FENCE_OUT     (1 << 1)
+#define IGT_SPIN_POLL_RUN      (1 << 2)
+#define IGT_SPIN_FAST          (1 << 3)
+#define IGT_SPIN_NO_PREEMPTION (1 << 4)
 
 igt_spin_t *
 __igt_spin_factory(int fd, const struct igt_spin_factory *opts);
diff --git a/tests/kms_busy.c b/tests/kms_busy.c
index 7e5ab3d19..bfb3857f4 100644
--- a/tests/kms_busy.c
+++ b/tests/kms_busy.c
@@ -75,22 +75,16 @@ static void flip_to_fb(igt_display_t *dpy, int pipe,
 	struct pollfd pfd = { .fd = dpy->drm_fd, .events = POLLIN };
 	const int timeout = modeset ? 8500 : 100;
 	struct drm_event_vblank ev;
+	IGT_CORK_FENCE(cork);
+	igt_spin_t *t;
+	int fence;
 
-	igt_spin_t *t = igt_spin_new(dpy->drm_fd,
-				     .engine = ring,
-				     .dependency = fb->gem_handle);
-
-	if (modeset) {
-		/*
-		 * We want to check that a modeset actually waits for the
-		 * spin batch to complete, but we keep a bigger timeout for
-		 * disable than required for flipping.
-		 *
-		 * As a result, the GPU reset code may kick in, which we neuter
-		 * here to be sure there's no premature completion.
-		 */
-		igt_set_module_param_int("enable_hangcheck", 0);
-	}
+	fence = igt_cork_plug(&cork, dpy->drm_fd);
+	t = igt_spin_new(dpy->drm_fd,
+			 .engine = ring,
+			 .fence = fence,
+			 .dependency = fb->gem_handle,
+			 .flags = IGT_SPIN_FENCE_IN | IGT_SPIN_NO_PREEMPTION);
 
 	igt_fork(child, 1) {
 		igt_assert(gem_bo_busy(dpy->drm_fd, fb->gem_handle));
@@ -116,13 +110,13 @@ static void flip_to_fb(igt_display_t *dpy, int pipe,
 	igt_waitchildren_timeout(5 * timeout,
 				 "flip blocked waiting for busy bo\n");
 	igt_spin_end(t);
+	close(fence);
 
 	igt_assert(read(dpy->drm_fd, &ev, sizeof(ev)) == sizeof(ev));
 	igt_assert(poll(&pfd, 1, 0) == 0);
 
 	if (modeset) {
 		gem_quiescent_gpu(dpy->drm_fd);
-		igt_set_module_param_int("enable_hangcheck", 1);
 
 		/* Clear old mode blob. */
 		igt_pipe_refresh(dpy, pipe, true);
-- 
2.23.0

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

[igt-dev] [PATCH i-g-t 4/4] kms_busy: Replace fiddling with hangcheck modparam with explicit fence

[Chris Wilson]

Use an explicit fence to circumvent the [i915] GPU hang detection rather
than tweak the i915 specific modparam (and remove the assertion that
such a param exists). Note, that with a bit more work, the fence could
be used be directly rather than via dirtying the fb with a dummyload.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
---
 lib/igt_dummyload.c |  5 +++++
 lib/igt_dummyload.h | 10 ++++++----
 tests/kms_busy.c    | 26 ++++++++++----------------
 3 files changed, 21 insertions(+), 20 deletions(-)

diff --git a/lib/igt_dummyload.c b/lib/igt_dummyload.c
index 0e06276af..65b5cc927 100644
--- a/lib/igt_dummyload.c
+++ b/lib/igt_dummyload.c
@@ -236,6 +236,11 @@ emit_recursive_batch(igt_spin_t *spin,
 	if (opts->flags & IGT_SPIN_FENCE_OUT)
 		execbuf->flags |= I915_EXEC_FENCE_OUT;
 
+	if (opts->flags & IGT_SPIN_FENCE_IN) {
+		execbuf->flags |= I915_EXEC_FENCE_IN;
+		execbuf->rsvd2 = opts->fence;
+	}
+
 	for (i = 0; i < nengine; i++) {
 		execbuf->flags &= ~ENGINE_MASK;
 		execbuf->flags |= flags[i];
diff --git a/lib/igt_dummyload.h b/lib/igt_dummyload.h
index bb25751ad..66837057d 100644
--- a/lib/igt_dummyload.h
+++ b/lib/igt_dummyload.h
@@ -54,12 +54,14 @@ struct igt_spin_factory {
 	uint32_t dependency;
 	unsigned int engine;
 	unsigned int flags;
+	int fence;
 };
 
-#define IGT_SPIN_FENCE_OUT     (1 << 0)
-#define IGT_SPIN_POLL_RUN      (1 << 1)
-#define IGT_SPIN_FAST          (1 << 2)
-#define IGT_SPIN_NO_PREEMPTION (1 << 3)
+#define IGT_SPIN_FENCE_IN      (1 << 0)
+#define IGT_SPIN_FENCE_OUT     (1 << 1)
+#define IGT_SPIN_POLL_RUN      (1 << 2)
+#define IGT_SPIN_FAST          (1 << 3)
+#define IGT_SPIN_NO_PREEMPTION (1 << 4)
 
 igt_spin_t *
 __igt_spin_factory(int fd, const struct igt_spin_factory *opts);
diff --git a/tests/kms_busy.c b/tests/kms_busy.c
index 7e5ab3d19..bfb3857f4 100644
--- a/tests/kms_busy.c
+++ b/tests/kms_busy.c
@@ -75,22 +75,16 @@ static void flip_to_fb(igt_display_t *dpy, int pipe,
 	struct pollfd pfd = { .fd = dpy->drm_fd, .events = POLLIN };
 	const int timeout = modeset ? 8500 : 100;
 	struct drm_event_vblank ev;
+	IGT_CORK_FENCE(cork);
+	igt_spin_t *t;
+	int fence;
 
-	igt_spin_t *t = igt_spin_new(dpy->drm_fd,
-				     .engine = ring,
-				     .dependency = fb->gem_handle);
-
-	if (modeset) {
-		/*
-		 * We want to check that a modeset actually waits for the
-		 * spin batch to complete, but we keep a bigger timeout for
-		 * disable than required for flipping.
-		 *
-		 * As a result, the GPU reset code may kick in, which we neuter
-		 * here to be sure there's no premature completion.
-		 */
-		igt_set_module_param_int("enable_hangcheck", 0);
-	}
+	fence = igt_cork_plug(&cork, dpy->drm_fd);
+	t = igt_spin_new(dpy->drm_fd,
+			 .engine = ring,
+			 .fence = fence,
+			 .dependency = fb->gem_handle,
+			 .flags = IGT_SPIN_FENCE_IN | IGT_SPIN_NO_PREEMPTION);
 
 	igt_fork(child, 1) {
 		igt_assert(gem_bo_busy(dpy->drm_fd, fb->gem_handle));
@@ -116,13 +110,13 @@ static void flip_to_fb(igt_display_t *dpy, int pipe,
 	igt_waitchildren_timeout(5 * timeout,
 				 "flip blocked waiting for busy bo\n");
 	igt_spin_end(t);
+	close(fence);
 
 	igt_assert(read(dpy->drm_fd, &ev, sizeof(ev)) == sizeof(ev));
 	igt_assert(poll(&pfd, 1, 0) == 0);
 
 	if (modeset) {
 		gem_quiescent_gpu(dpy->drm_fd);
-		igt_set_module_param_int("enable_hangcheck", 1);
 
 		/* Clear old mode blob. */
 		igt_pipe_refresh(dpy, pipe, true);
-- 
2.23.0

_______________________________________________
igt-dev mailing list
igt-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/igt-dev

[igt-dev] ✓ Fi.CI.BAT: success for series starting with [i-g-t,1/4] i915/gem_exec_balancer: Beware the migratory fence

[Patchwork]

== Series Details ==

Series: series starting with [i-g-t,1/4] i915/gem_exec_balancer: Beware the migratory fence
URL   : https://patchwork.freedesktop.org/series/66375/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_6849 -> IGTPW_3426
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  External URL: https://patchwork.freedesktop.org/api/1.0/series/66375/revisions/1/mbox/

Known issues
------------

  Here are the changes found in IGTPW_3426 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@kms_frontbuffer_tracking@basic:
    - fi-hsw-peppy:       [PASS][1] -> [DMESG-WARN][2] ([fdo#102614])
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6849/fi-hsw-peppy/igt@kms_frontbuffer_tracking@basic.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3426/fi-hsw-peppy/igt@kms_frontbuffer_tracking@basic.html

  
#### Possible fixes ####

  * igt@gem_exec_suspend@basic-s3:
    - fi-blb-e6850:       [INCOMPLETE][3] ([fdo#107718]) -> [PASS][4]
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6849/fi-blb-e6850/igt@gem_exec_suspend@basic-s3.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3426/fi-blb-e6850/igt@gem_exec_suspend@basic-s3.html

  * igt@i915_module_load@reload-no-display:
    - fi-icl-u3:          [DMESG-WARN][5] ([fdo#107724]) -> [PASS][6]
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6849/fi-icl-u3/igt@i915_module_load@reload-no-display.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3426/fi-icl-u3/igt@i915_module_load@reload-no-display.html

  
#### Warnings ####

  * igt@kms_chamelium@hdmi-hpd-fast:
    - fi-kbl-7500u:       [FAIL][7] ([fdo#111096]) -> [FAIL][8] ([fdo#111407])
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6849/fi-kbl-7500u/igt@kms_chamelium@hdmi-hpd-fast.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3426/fi-kbl-7500u/igt@kms_chamelium@hdmi-hpd-fast.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#102505]: https://bugs.freedesktop.org/show_bug.cgi?id=102505
  [fdo#102614]: https://bugs.freedesktop.org/show_bug.cgi?id=102614
  [fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713
  [fdo#107718]: https://bugs.freedesktop.org/show_bug.cgi?id=107718
  [fdo#107724]: https://bugs.freedesktop.org/show_bug.cgi?id=107724
  [fdo#109100]: https://bugs.freedesktop.org/show_bug.cgi?id=109100
  [fdo#111045]: https://bugs.freedesktop.org/show_bug.cgi?id=111045
  [fdo#111049]: https://bugs.freedesktop.org/show_bug.cgi?id=111049
  [fdo#111096]: https://bugs.freedesktop.org/show_bug.cgi?id=111096
  [fdo#111407]: https://bugs.freedesktop.org/show_bug.cgi?id=111407


Participating hosts (52 -> 44)
------------------------------

  Missing    (8): fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-icl-y fi-icl-guc fi-byt-clapper fi-bdw-samus 


Build changes
-------------

  * CI: CI-20190529 -> None
  * IGT: IGT_5173 -> IGTPW_3426

  CI-20190529: 20190529
  CI_DRM_6849: d4111d3dd34455068de02ce18b796a631c7fe3a9 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGTPW_3426: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3426/
  IGT_5173: 3fb0f227d8856008f89a797879e27094745ce97e @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools



== Testlist changes ==

+igt@gem_exec_schedule@preempt-antitimeslice-blt
+igt@gem_exec_schedule@preempt-antitimeslice-bsd
+igt@gem_exec_schedule@preempt-antitimeslice-bsd1
+igt@gem_exec_schedule@preempt-antitimeslice-bsd2
+igt@gem_exec_schedule@preempt-antitimeslice-render
+igt@gem_exec_schedule@preempt-antitimeslice-vebox
+igt@gem_exec_schedule@preempt-timeslice-blt
+igt@gem_exec_schedule@preempt-timeslice-bsd
+igt@gem_exec_schedule@preempt-timeslice-bsd1
+igt@gem_exec_schedule@preempt-timeslice-bsd2
+igt@gem_exec_schedule@preempt-timeslice-render
+igt@gem_exec_schedule@preempt-timeslice-undying-blt
+igt@gem_exec_schedule@preempt-timeslice-undying-bsd
+igt@gem_exec_schedule@preempt-timeslice-undying-bsd1
+igt@gem_exec_schedule@preempt-timeslice-undying-bsd2
+igt@gem_exec_schedule@preempt-timeslice-undying-render
+igt@gem_exec_schedule@preempt-timeslice-undying-vebox
+igt@gem_exec_schedule@preempt-timeslice-vebox

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3426/
_______________________________________________
igt-dev mailing list
igt-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/igt-dev

[igt-dev] ✓ Fi.CI.IGT: success for series starting with [i-g-t,1/4] i915/gem_exec_balancer: Beware the migratory fence

[Patchwork]

== Series Details ==

Series: series starting with [i-g-t,1/4] i915/gem_exec_balancer: Beware the migratory fence
URL   : https://patchwork.freedesktop.org/series/66375/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_6849_full -> IGTPW_3426_full
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  External URL: https://patchwork.freedesktop.org/api/1.0/series/66375/revisions/1/mbox/

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in IGTPW_3426_full:

### IGT changes ###

#### Possible regressions ####

  * {igt@gem_exec_schedule@preempt-antitimeslice-blt} (NEW):
    - shard-kbl:          NOTRUN -> [FAIL][1] +4 similar issues
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3426/shard-kbl2/igt@gem_exec_schedule@preempt-antitimeslice-blt.html
    - shard-iclb:         NOTRUN -> [FAIL][2] +1 similar issue
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3426/shard-iclb2/igt@gem_exec_schedule@preempt-antitimeslice-blt.html

  * {igt@gem_exec_schedule@preempt-antitimeslice-bsd} (NEW):
    - shard-glk:          NOTRUN -> [FAIL][3] +2 similar issues
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3426/shard-glk1/igt@gem_exec_schedule@preempt-antitimeslice-bsd.html

  * {igt@gem_exec_schedule@preempt-antitimeslice-vebox} (NEW):
    - shard-apl:          NOTRUN -> [FAIL][4]
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3426/shard-apl4/igt@gem_exec_schedule@preempt-antitimeslice-vebox.html

  * {igt@gem_exec_schedule@preempt-timeslice-undying-bsd} (NEW):
    - shard-iclb:         NOTRUN -> [SKIP][5] +1 similar issue
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3426/shard-iclb1/igt@gem_exec_schedule@preempt-timeslice-undying-bsd.html

  
New tests
---------

  New tests have been introduced between CI_DRM_6849_full and IGTPW_3426_full:

### New IGT tests (18) ###

  * igt@gem_exec_schedule@preempt-antitimeslice-blt:
    - Statuses : 3 fail(s) 1 pass(s) 2 skip(s)
    - Exec time: [0.0, 64.02] s

  * igt@gem_exec_schedule@preempt-antitimeslice-bsd:
    - Statuses : 1 fail(s) 1 pass(s) 3 skip(s)
    - Exec time: [0.0, 62.69] s

  * igt@gem_exec_schedule@preempt-antitimeslice-bsd1:
    - Statuses : 1 fail(s) 5 skip(s)
    - Exec time: [0.0, 62.99] s

  * igt@gem_exec_schedule@preempt-antitimeslice-bsd2:
    - Statuses : 1 fail(s) 1 pass(s) 4 skip(s)
    - Exec time: [0.0, 60.95] s

  * igt@gem_exec_schedule@preempt-antitimeslice-render:
    - Statuses : 2 fail(s) 2 pass(s) 2 skip(s)
    - Exec time: [0.0, 63.35] s

  * igt@gem_exec_schedule@preempt-antitimeslice-vebox:
    - Statuses : 3 fail(s) 1 pass(s) 2 skip(s)
    - Exec time: [0.0, 62.96] s

  * igt@gem_exec_schedule@preempt-timeslice-blt:
    - Statuses : 4 pass(s) 2 skip(s)
    - Exec time: [0.0, 0.01] s

  * igt@gem_exec_schedule@preempt-timeslice-bsd:
    - Statuses : 2 pass(s) 3 skip(s)
    - Exec time: [0.0, 0.01] s

  * igt@gem_exec_schedule@preempt-timeslice-bsd1:
    - Statuses : 1 pass(s) 4 skip(s)
    - Exec time: [0.0, 0.00] s

  * igt@gem_exec_schedule@preempt-timeslice-bsd2:
    - Statuses : 1 pass(s) 5 skip(s)
    - Exec time: [0.0, 0.00] s

  * igt@gem_exec_schedule@preempt-timeslice-render:
    - Statuses : 4 pass(s) 2 skip(s)
    - Exec time: [0.0, 0.01] s

  * igt@gem_exec_schedule@preempt-timeslice-undying-blt:
    - Statuses : 4 pass(s) 2 skip(s)
    - Exec time: [0.0, 16.02] s

  * igt@gem_exec_schedule@preempt-timeslice-undying-bsd:
    - Statuses : 2 pass(s) 4 skip(s)
    - Exec time: [0.0, 15.02] s

  * igt@gem_exec_schedule@preempt-timeslice-undying-bsd1:
    - Statuses : 1 pass(s) 5 skip(s)
    - Exec time: [0.0, 14.52] s

  * igt@gem_exec_schedule@preempt-timeslice-undying-bsd2:
    - Statuses : 2 pass(s) 4 skip(s)
    - Exec time: [0.0, 16.52] s

  * igt@gem_exec_schedule@preempt-timeslice-undying-render:
    - Statuses : 4 pass(s) 2 skip(s)
    - Exec time: [0.0, 16.52] s

  * igt@gem_exec_schedule@preempt-timeslice-undying-vebox:
    - Statuses : 4 pass(s) 2 skip(s)
    - Exec time: [0.0, 14.53] s

  * igt@gem_exec_schedule@preempt-timeslice-vebox:
    - Statuses : 4 pass(s) 2 skip(s)
    - Exec time: [0.0, 0.01] s

  

Known issues
------------

  Here are the changes found in IGTPW_3426_full that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@gem_ctx_isolation@rcs0-s3:
    - shard-apl:          [PASS][6] -> [DMESG-WARN][7] ([fdo#108566]) +3 similar issues
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6849/shard-apl6/igt@gem_ctx_isolation@rcs0-s3.html
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3426/shard-apl4/igt@gem_ctx_isolation@rcs0-s3.html

  * igt@gem_exec_schedule@preempt-other-chain-bsd:
    - shard-iclb:         [PASS][8] -> [SKIP][9] ([fdo#111325]) +5 similar issues
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6849/shard-iclb6/igt@gem_exec_schedule@preempt-other-chain-bsd.html
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3426/shard-iclb1/igt@gem_exec_schedule@preempt-other-chain-bsd.html

  * igt@gem_exec_schedule@promotion-bsd1:
    - shard-iclb:         [PASS][10] -> [SKIP][11] ([fdo#109276]) +10 similar issues
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6849/shard-iclb2/igt@gem_exec_schedule@promotion-bsd1.html
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3426/shard-iclb6/igt@gem_exec_schedule@promotion-bsd1.html

  * igt@kms_flip@flip-vs-suspend:
    - shard-hsw:          [PASS][12] -> [INCOMPLETE][13] ([fdo#103540])
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6849/shard-hsw7/igt@kms_flip@flip-vs-suspend.html
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3426/shard-hsw4/igt@kms_flip@flip-vs-suspend.html
    - shard-kbl:          [PASS][14] -> [DMESG-WARN][15] ([fdo#103313])
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6849/shard-kbl4/igt@kms_flip@flip-vs-suspend.html
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3426/shard-kbl6/igt@kms_flip@flip-vs-suspend.html

  * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-move:
    - shard-iclb:         [PASS][16] -> [INCOMPLETE][17] ([fdo#107713]) +1 similar issue
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6849/shard-iclb6/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-move.html
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3426/shard-iclb7/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-move.html

  * igt@kms_frontbuffer_tracking@fbcpsr-1p-offscren-pri-shrfb-draw-pwrite:
    - shard-iclb:         [PASS][18] -> [FAIL][19] ([fdo#103167]) +4 similar issues
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6849/shard-iclb4/igt@kms_frontbuffer_tracking@fbcpsr-1p-offscren-pri-shrfb-draw-pwrite.html
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3426/shard-iclb3/igt@kms_frontbuffer_tracking@fbcpsr-1p-offscren-pri-shrfb-draw-pwrite.html

  * igt@kms_psr2_su@frontbuffer:
    - shard-iclb:         [PASS][20] -> [SKIP][21] ([fdo#109642] / [fdo#111068])
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6849/shard-iclb2/igt@kms_psr2_su@frontbuffer.html
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3426/shard-iclb3/igt@kms_psr2_su@frontbuffer.html

  * igt@kms_psr@psr2_sprite_mmap_gtt:
    - shard-iclb:         [PASS][22] -> [SKIP][23] ([fdo#109441]) +2 similar issues
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6849/shard-iclb2/igt@kms_psr@psr2_sprite_mmap_gtt.html
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3426/shard-iclb5/igt@kms_psr@psr2_sprite_mmap_gtt.html

  * igt@kms_setmode@basic:
    - shard-hsw:          [PASS][24] -> [FAIL][25] ([fdo#99912])
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6849/shard-hsw4/igt@kms_setmode@basic.html
   [25]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3426/shard-hsw4/igt@kms_setmode@basic.html

  
#### Possible fixes ####

  * igt@gem_ctx_isolation@bcs0-s3:
    - shard-kbl:          [DMESG-WARN][26] ([fdo#103313]) -> [PASS][27]
   [26]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6849/shard-kbl6/igt@gem_ctx_isolation@bcs0-s3.html
   [27]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3426/shard-kbl1/igt@gem_ctx_isolation@bcs0-s3.html

  * igt@gem_exec_schedule@deep-bsd:
    - shard-iclb:         [SKIP][28] ([fdo#111325]) -> [PASS][29] +7 similar issues
   [28]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6849/shard-iclb1/igt@gem_exec_schedule@deep-bsd.html
   [29]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3426/shard-iclb5/igt@gem_exec_schedule@deep-bsd.html

  * igt@gem_exec_schedule@independent-bsd1:
    - shard-iclb:         [SKIP][30] ([fdo#109276]) -> [PASS][31] +19 similar issues
   [30]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6849/shard-iclb3/igt@gem_exec_schedule@independent-bsd1.html
   [31]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3426/shard-iclb1/igt@gem_exec_schedule@independent-bsd1.html

  * igt@gem_exec_suspend@basic-s3:
    - shard-kbl:          [INCOMPLETE][32] ([fdo#103665]) -> [PASS][33]
   [32]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6849/shard-kbl3/igt@gem_exec_suspend@basic-s3.html
   [33]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3426/shard-kbl6/igt@gem_exec_suspend@basic-s3.html

  * igt@gem_tiled_swapping@non-threaded:
    - shard-apl:          [DMESG-WARN][34] ([fdo#108686]) -> [PASS][35]
   [34]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6849/shard-apl4/igt@gem_tiled_swapping@non-threaded.html
   [35]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3426/shard-apl1/igt@gem_tiled_swapping@non-threaded.html

  * igt@kms_cursor_legacy@2x-long-cursor-vs-flip-legacy:
    - shard-hsw:          [FAIL][36] ([fdo#105767]) -> [PASS][37]
   [36]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6849/shard-hsw1/igt@kms_cursor_legacy@2x-long-cursor-vs-flip-legacy.html
   [37]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3426/shard-hsw4/igt@kms_cursor_legacy@2x-long-cursor-vs-flip-legacy.html

  * igt@kms_flip@2x-flip-vs-expired-vblank-interruptible:
    - shard-glk:          [FAIL][38] ([fdo#105363]) -> [PASS][39]
   [38]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6849/shard-glk9/igt@kms_flip@2x-flip-vs-expired-vblank-interruptible.html
   [39]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3426/shard-glk7/igt@kms_flip@2x-flip-vs-expired-vblank-interruptible.html

  * igt@kms_frontbuffer_tracking@fbc-stridechange:
    - shard-glk:          [FAIL][40] ([fdo#103167]) -> [PASS][41]
   [40]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6849/shard-glk2/igt@kms_frontbuffer_tracking@fbc-stridechange.html
   [41]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3426/shard-glk9/igt@kms_frontbuffer_tracking@fbc-stridechange.html
    - shard-apl:          [FAIL][42] ([fdo#103167]) -> [PASS][43]
   [42]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6849/shard-apl7/igt@kms_frontbuffer_tracking@fbc-stridechange.html
   [43]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3426/shard-apl3/igt@kms_frontbuffer_tracking@fbc-stridechange.html
    - shard-kbl:          [FAIL][44] ([fdo#103167]) -> [PASS][45]
   [44]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6849/shard-kbl6/igt@kms_frontbuffer_tracking@fbc-stridechange.html
   [45]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3426/shard-kbl2/igt@kms_frontbuffer_tracking@fbc-stridechange.html

  * igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-indfb-draw-blt:
    - shard-iclb:         [FAIL][46] ([fdo#103167]) -> [PASS][47] +5 similar issues
   [46]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6849/shard-iclb2/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-indfb-draw-blt.html
   [47]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3426/shard-iclb3/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-indfb-draw-blt.html

  * igt@kms_psr@psr2_cursor_mmap_cpu:
    - shard-iclb:         [SKIP][48] ([fdo#109441]) -> [PASS][49] +1 similar issue
   [48]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6849/shard-iclb7/igt@kms_psr@psr2_cursor_mmap_cpu.html
   [49]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3426/shard-iclb2/igt@kms_psr@psr2_cursor_mmap_cpu.html

  * igt@kms_vblank@pipe-c-ts-continuation-suspend:
    - shard-apl:          [DMESG-WARN][50] ([fdo#108566]) -> [PASS][51] +9 similar issues
   [50]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6849/shard-apl3/igt@kms_vblank@pipe-c-ts-continuation-suspend.html
   [51]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3426/shard-apl8/igt@kms_vblank@pipe-c-ts-continuation-suspend.html

  
#### Warnings ####

  * igt@gem_ctx_isolation@vcs1-nonpriv:
    - shard-iclb:         [SKIP][52] ([fdo#109276]) -> [FAIL][53] ([fdo#111329])
   [52]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6849/shard-iclb7/igt@gem_ctx_isolation@vcs1-nonpriv.html
   [53]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3426/shard-iclb1/igt@gem_ctx_isolation@vcs1-nonpriv.html

  * igt@gem_mocs_settings@mocs-reset-bsd2:
    - shard-iclb:         [SKIP][54] ([fdo#109276]) -> [FAIL][55] ([fdo#111330]) +1 similar issue
   [54]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6849/shard-iclb6/igt@gem_mocs_settings@mocs-reset-bsd2.html
   [55]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3426/shard-iclb1/igt@gem_mocs_settings@mocs-reset-bsd2.html

  * igt@kms_frontbuffer_tracking@psr-1p-primscrn-spr-indfb-draw-blt:
    - shard-apl:          [INCOMPLETE][56] ([fdo#103927]) -> [SKIP][57] ([fdo#109271])
   [56]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6849/shard-apl2/igt@kms_frontbuffer_tracking@psr-1p-primscrn-spr-indfb-draw-blt.html
   [57]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3426/shard-apl5/igt@kms_frontbuffer_tracking@psr-1p-primscrn-spr-indfb-draw-blt.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167
  [fdo#103313]: https://bugs.freedesktop.org/show_bug.cgi?id=103313
  [fdo#103540]: https://bugs.freedesktop.org/show_bug.cgi?id=103540
  [fdo#103665]: https://bugs.freedesktop.org/show_bug.cgi?id=103665
  [fdo#103927]: https://bugs.freedesktop.org/show_bug.cgi?id=103927
  [fdo#105363]: https://bugs.freedesktop.org/show_bug.cgi?id=105363
  [fdo#105767]: https://bugs.freedesktop.org/show_bug.cgi?id=105767
  [fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713
  [fdo#108566]: https://bugs.freedesktop.org/show_bug.cgi?id=108566
  [fdo#108686]: https://bugs.freedesktop.org/show_bug.cgi?id=108686
  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [fdo#109276]: https://bugs.freedesktop.org/show_bug.cgi?id=109276
  [fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441
  [fdo#109642]: https://bugs.freedesktop.org/show_bug.cgi?id=109642
  [fdo#111068]: https://bugs.freedesktop.org/show_bug.cgi?id=111068
  [fdo#111325]: https://bugs.freedesktop.org/show_bug.cgi?id=111325
  [fdo#111329]: https://bugs.freedesktop.org/show_bug.cgi?id=111329
  [fdo#111330]: https://bugs.freedesktop.org/show_bug.cgi?id=111330
  [fdo#99912]: https://bugs.freedesktop.org/show_bug.cgi?id=99912


Participating hosts (10 -> 6)
------------------------------

  Missing    (4): pig-skl-6260u shard-skl pig-hsw-4770r pig-glk-j5005 


Build changes
-------------

  * CI: CI-20190529 -> None
  * IGT: IGT_5173 -> IGTPW_3426
  * Piglit: piglit_4509 -> None

  CI-20190529: 20190529
  CI_DRM_6849: d4111d3dd34455068de02ce18b796a631c7fe3a9 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGTPW_3426: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3426/
  IGT_5173: 3fb0f227d8856008f89a797879e27094745ce97e @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3426/
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Re: [igt-dev] [PATCH i-g-t 1/4] i915/gem_exec_balancer: Beware the migratory fence

[Matthew Auld]

On Sat, 7 Sep 2019 at 13:00, Chris Wilson <chris@chris-wilson.co.uk> wrote:
>
> If the object needs to be migrated, it may will need GPU relocs and so
> have an exclusive fence showing up in the write domain.
>
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Matthew Auld <matthew.auld@intel.com>
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Re: [igt-dev] [PATCH i-g-t 1/4] i915/gem_exec_balancer: Beware the migratory fence

[Matthew Auld]

On Sat, 7 Sep 2019 at 13:00, Chris Wilson <chris@chris-wilson.co.uk> wrote:
>
> If the object needs to be migrated, it may will need GPU relocs and so
> have an exclusive fence showing up in the write domain.
>
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Matthew Auld <matthew.auld@intel.com>
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