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* [RFC] drm/i915/guc: Enable guc logging on guc log relay write
@ 2019-09-10 22:46 Robert M. Fosha
  2019-09-10 23:31 ` ✓ Fi.CI.BAT: success for " Patchwork
                   ` (5 more replies)
  0 siblings, 6 replies; 9+ messages in thread
From: Robert M. Fosha @ 2019-09-10 22:46 UTC (permalink / raw)
  To: intel-gfx

Creating and opening the GuC log relay file enables and starts
the relay potentially before the caller is ready to consume logs.
Change the behavior so that relay starts only on an explicit call
to the write function (with a value of '1'). Other values flush
the log relay as before.

Cc: Matthew Brost <matthew.brost@intel.com>
Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
Signed-off-by: Robert M. Fosha <robert.m.fosha@intel.com>
---
 drivers/gpu/drm/i915/gt/uc/intel_guc_log.c | 38 +++++++++++++++++-----
 drivers/gpu/drm/i915/gt/uc/intel_guc_log.h |  2 ++
 drivers/gpu/drm/i915/i915_debugfs.c        | 27 +++++++++++++--
 3 files changed, 56 insertions(+), 11 deletions(-)

diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_log.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_log.c
index 36332064de9c..9a98270d05b6 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_log.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_log.c
@@ -361,6 +361,7 @@ void intel_guc_log_init_early(struct intel_guc_log *log)
 {
 	mutex_init(&log->relay.lock);
 	INIT_WORK(&log->relay.flush_work, capture_logs_work);
+	log->relay_started = false;
 }
 
 static int guc_log_relay_create(struct intel_guc_log *log)
@@ -585,15 +586,6 @@ int intel_guc_log_relay_open(struct intel_guc_log *log)
 
 	mutex_unlock(&log->relay.lock);
 
-	guc_log_enable_flush_events(log);
-
-	/*
-	 * When GuC is logging without us relaying to userspace, we're ignoring
-	 * the flush notification. This means that we need to unconditionally
-	 * flush on relay enabling, since GuC only notifies us once.
-	 */
-	queue_work(system_highpri_wq, &log->relay.flush_work);
-
 	return 0;
 
 out_relay:
@@ -604,12 +596,38 @@ int intel_guc_log_relay_open(struct intel_guc_log *log)
 	return ret;
 }
 
+int intel_guc_log_relay_start(struct intel_guc_log *log)
+{
+	int ret = 0;
+
+	if (log->relay_started) {
+		ret =  -EEXIST;
+	} else {
+		guc_log_enable_flush_events(log);
+
+		/*
+		 * When GuC is logging without us relaying to userspace, we're
+		 * ignoring the flush notification. This means that we need to
+		 * unconditionally * flush on relay enabling, since GuC only
+		 * notifies us once.
+		 */
+		queue_work(system_highpri_wq, &log->relay.flush_work);
+
+		log->relay_started = false;
+	}
+
+	return ret;
+}
+
 void intel_guc_log_relay_flush(struct intel_guc_log *log)
 {
 	struct intel_guc *guc = log_to_guc(log);
 	struct drm_i915_private *i915 = guc_to_gt(guc)->i915;
 	intel_wakeref_t wakeref;
 
+	if (!log->relay_started)
+		return;
+
 	/*
 	 * Before initiating the forceful flush, wait for any pending/ongoing
 	 * flush to complete otherwise forceful flush may not actually happen.
@@ -638,6 +656,8 @@ void intel_guc_log_relay_close(struct intel_guc_log *log)
 	guc_log_unmap(log);
 	guc_log_relay_destroy(log);
 	mutex_unlock(&log->relay.lock);
+
+	log->relay_started = false;
 }
 
 void intel_guc_log_handle_flush_event(struct intel_guc_log *log)
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_log.h b/drivers/gpu/drm/i915/gt/uc/intel_guc_log.h
index 6f764879acb1..ecf7a49416b4 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_log.h
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_log.h
@@ -44,6 +44,7 @@ struct intel_guc;
 
 struct intel_guc_log {
 	u32 level;
+	bool relay_started;
 	struct i915_vma *vma;
 	struct {
 		void *buf_addr;
@@ -67,6 +68,7 @@ void intel_guc_log_destroy(struct intel_guc_log *log);
 int intel_guc_log_set_level(struct intel_guc_log *log, u32 level);
 bool intel_guc_log_relay_enabled(const struct intel_guc_log *log);
 int intel_guc_log_relay_open(struct intel_guc_log *log);
+int intel_guc_log_relay_start(struct intel_guc_log *log);
 void intel_guc_log_relay_flush(struct intel_guc_log *log);
 void intel_guc_log_relay_close(struct intel_guc_log *log);
 
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
index 708855e051b5..c3683fdd0deb 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -2049,9 +2049,32 @@ i915_guc_log_relay_write(struct file *filp,
 			 loff_t *ppos)
 {
 	struct intel_guc_log *log = filp->private_data;
+	char *input_buffer;
+	int val;
+	int ret;
 
-	intel_guc_log_relay_flush(log);
-	return cnt;
+	input_buffer = memdup_user_nul(ubuf, cnt);
+	if (IS_ERR(input_buffer))
+		return PTR_ERR(input_buffer);
+
+	ret = kstrtoint(input_buffer, 10, &val);
+	if (ret < 0)
+		goto out;
+
+	/*
+	 * Enable and start the guc log relay on value of 1.
+	 * Flush log relay for any other value.
+	 */
+	if (val == 1) {
+		ret = intel_guc_log_relay_start(log);
+	} else {
+		intel_guc_log_relay_flush(log);
+		ret = cnt;
+	}
+
+out:
+	kfree(input_buffer);
+	return ret;
 }
 
 static int i915_guc_log_relay_release(struct inode *inode, struct file *file)
-- 
2.21.0.5.gaeb582a983

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply related	[flat|nested] 9+ messages in thread

* ✓ Fi.CI.BAT: success for drm/i915/guc: Enable guc logging on guc log relay write
  2019-09-10 22:46 [RFC] drm/i915/guc: Enable guc logging on guc log relay write Robert M. Fosha
@ 2019-09-10 23:31 ` Patchwork
  2019-09-11  0:48 ` [RFC] " Daniele Ceraolo Spurio
                   ` (4 subsequent siblings)
  5 siblings, 0 replies; 9+ messages in thread
From: Patchwork @ 2019-09-10 23:31 UTC (permalink / raw)
  To: Robert M. Fosha; +Cc: intel-gfx

== Series Details ==

Series: drm/i915/guc: Enable guc logging on guc log relay write
URL   : https://patchwork.freedesktop.org/series/66502/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_6863 -> Patchwork_14349
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14349/

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in Patchwork_14349:

### IGT changes ###

#### Suppressed ####

  The following results come from untrusted machines, tests, or statuses.
  They do not affect the overall result.

  * igt@gem_sync@basic-all:
    - {fi-tgl-u}:         [PASS][1] -> [INCOMPLETE][2]
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6863/fi-tgl-u/igt@gem_sync@basic-all.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14349/fi-tgl-u/igt@gem_sync@basic-all.html

  
Known issues
------------

  Here are the changes found in Patchwork_14349 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@gem_exec_suspend@basic-s3:
    - fi-blb-e6850:       [PASS][3] -> [INCOMPLETE][4] ([fdo#107718])
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6863/fi-blb-e6850/igt@gem_exec_suspend@basic-s3.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14349/fi-blb-e6850/igt@gem_exec_suspend@basic-s3.html

  * igt@gem_linear_blits@basic:
    - fi-icl-u3:          [PASS][5] -> [DMESG-WARN][6] ([fdo#107724])
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6863/fi-icl-u3/igt@gem_linear_blits@basic.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14349/fi-icl-u3/igt@gem_linear_blits@basic.html

  * igt@kms_flip@basic-flip-vs-wf_vblank:
    - fi-bsw-n3050:       [PASS][7] -> [FAIL][8] ([fdo#100368])
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6863/fi-bsw-n3050/igt@kms_flip@basic-flip-vs-wf_vblank.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14349/fi-bsw-n3050/igt@kms_flip@basic-flip-vs-wf_vblank.html

  * igt@kms_frontbuffer_tracking@basic:
    - fi-icl-u2:          [PASS][9] -> [FAIL][10] ([fdo#103167])
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6863/fi-icl-u2/igt@kms_frontbuffer_tracking@basic.html
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14349/fi-icl-u2/igt@kms_frontbuffer_tracking@basic.html

  
#### Possible fixes ####

  * igt@gem_basic@create-close:
    - fi-icl-u3:          [DMESG-WARN][11] ([fdo#107724]) -> [PASS][12]
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6863/fi-icl-u3/igt@gem_basic@create-close.html
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14349/fi-icl-u3/igt@gem_basic@create-close.html

  * igt@kms_chamelium@hdmi-hpd-fast:
    - fi-kbl-7500u:       [FAIL][13] ([fdo#111096]) -> [PASS][14]
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6863/fi-kbl-7500u/igt@kms_chamelium@hdmi-hpd-fast.html
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14349/fi-kbl-7500u/igt@kms_chamelium@hdmi-hpd-fast.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#100368]: https://bugs.freedesktop.org/show_bug.cgi?id=100368
  [fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167
  [fdo#107718]: https://bugs.freedesktop.org/show_bug.cgi?id=107718
  [fdo#107724]: https://bugs.freedesktop.org/show_bug.cgi?id=107724
  [fdo#111096]: https://bugs.freedesktop.org/show_bug.cgi?id=111096


Participating hosts (53 -> 47)
------------------------------

  Missing    (6): fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-icl-y fi-byt-clapper 


Build changes
-------------

  * CI: CI-20190529 -> None
  * Linux: CI_DRM_6863 -> Patchwork_14349

  CI-20190529: 20190529
  CI_DRM_6863: 1b26053f51a47b983cbd2e19ea6eb025a12c976b @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_5178: efb4539494d94f03374874d3b61bd04ef3802aaa @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_14349: a0eaeec653b5359f410361d241f96fc7657a7d61 @ git://anongit.freedesktop.org/gfx-ci/linux


== Linux commits ==

a0eaeec653b5 drm/i915/guc: Enable guc logging on guc log relay write

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14349/
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 9+ messages in thread

* Re: [RFC] drm/i915/guc: Enable guc logging on guc log relay write
  2019-09-10 22:46 [RFC] drm/i915/guc: Enable guc logging on guc log relay write Robert M. Fosha
  2019-09-10 23:31 ` ✓ Fi.CI.BAT: success for " Patchwork
@ 2019-09-11  0:48 ` Daniele Ceraolo Spurio
  2019-09-11 21:28   ` Fosha, Robert M
  2019-09-11  5:08 ` ✗ Fi.CI.IGT: failure for " Patchwork
                   ` (3 subsequent siblings)
  5 siblings, 1 reply; 9+ messages in thread
From: Daniele Ceraolo Spurio @ 2019-09-11  0:48 UTC (permalink / raw)
  To: Robert M. Fosha, intel-gfx



On 9/10/19 3:46 PM, Robert M. Fosha wrote:
> Creating and opening the GuC log relay file enables and starts
> the relay potentially before the caller is ready to consume logs.
> Change the behavior so that relay starts only on an explicit call
> to the write function (with a value of '1'). Other values flush
> the log relay as before.
> 
> Cc: Matthew Brost <matthew.brost@intel.com>
> Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
> Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
> Signed-off-by: Robert M. Fosha <robert.m.fosha@intel.com>
> ---
>   drivers/gpu/drm/i915/gt/uc/intel_guc_log.c | 38 +++++++++++++++++-----
>   drivers/gpu/drm/i915/gt/uc/intel_guc_log.h |  2 ++
>   drivers/gpu/drm/i915/i915_debugfs.c        | 27 +++++++++++++--
>   3 files changed, 56 insertions(+), 11 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_log.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_log.c
> index 36332064de9c..9a98270d05b6 100644
> --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_log.c
> +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_log.c
> @@ -361,6 +361,7 @@ void intel_guc_log_init_early(struct intel_guc_log *log)
>   {
>   	mutex_init(&log->relay.lock);
>   	INIT_WORK(&log->relay.flush_work, capture_logs_work);
> +	log->relay_started = false;
>   }
>   
>   static int guc_log_relay_create(struct intel_guc_log *log)
> @@ -585,15 +586,6 @@ int intel_guc_log_relay_open(struct intel_guc_log *log)
>   
>   	mutex_unlock(&log->relay.lock);
>   
> -	guc_log_enable_flush_events(log);
> -
> -	/*
> -	 * When GuC is logging without us relaying to userspace, we're ignoring
> -	 * the flush notification. This means that we need to unconditionally
> -	 * flush on relay enabling, since GuC only notifies us once.
> -	 */
> -	queue_work(system_highpri_wq, &log->relay.flush_work);
> -
>   	return 0;
>   
>   out_relay:
> @@ -604,12 +596,38 @@ int intel_guc_log_relay_open(struct intel_guc_log *log)
>   	return ret;
>   }
>   
> +int intel_guc_log_relay_start(struct intel_guc_log *log)
> +{
> +	int ret = 0;
> +
> +	if (log->relay_started) {
> +		ret =  -EEXIST;
> +	} else {

style: for this kind of checks, we usually just return early instead of 
using an if-else, i.e.:

	if (log->relay_started)
		return -EEXIST;

	[...] /* code */

	return 0;

> +		guc_log_enable_flush_events(log);
> +
> +		/*
> +		 * When GuC is logging without us relaying to userspace, we're
> +		 * ignoring the flush notification. This means that we need to
> +		 * unconditionally * flush on relay enabling, since GuC only

stray "*"

> +		 * notifies us once.
> +		 */
> +		queue_work(system_highpri_wq, &log->relay.flush_work);
> +
> +		log->relay_started = false;

s/false/true/

> +	}
> +
> +	return ret;
> +}
> +
>   void intel_guc_log_relay_flush(struct intel_guc_log *log)
>   {
>   	struct intel_guc *guc = log_to_guc(log);
>   	struct drm_i915_private *i915 = guc_to_gt(guc)->i915;
>   	intel_wakeref_t wakeref;
>   
> +	if (!log->relay_started)
> +		return;
> +
>   	/*
>   	 * Before initiating the forceful flush, wait for any pending/ongoing
>   	 * flush to complete otherwise forceful flush may not actually happen.
> @@ -638,6 +656,8 @@ void intel_guc_log_relay_close(struct intel_guc_log *log)
>   	guc_log_unmap(log);
>   	guc_log_relay_destroy(log);
>   	mutex_unlock(&log->relay.lock);
> +
> +	log->relay_started = false;


For symmetry, it might be worth adding a guc_log_relay_stop:

static void guc_log_relay_stop(...)
{
	if (!log->relay_started)
		return;

	guc_log_disable_flush_events(log);
	intel_synchronize_irq(i915);

	flush_work(&log->relay.flush_work);

	log->relay_started = false;
}

and call it from intel_guc_log_relay_close().

Also, it should be impossible to race the start/flush with the stop 
because the relay_write can't race the relay_close, but it might be 
worth a comment in case we decide to have guc_log_relay_stop() callable 
from the debugfs in the future.

>   }
>   
>   void intel_guc_log_handle_flush_event(struct intel_guc_log *log)
> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_log.h b/drivers/gpu/drm/i915/gt/uc/intel_guc_log.h
> index 6f764879acb1..ecf7a49416b4 100644
> --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_log.h
> +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_log.h
> @@ -44,6 +44,7 @@ struct intel_guc;
>   
>   struct intel_guc_log {
>   	u32 level;
> +	bool relay_started;

this should move inside the relay structure below. Just "started" will 
be enough as a name at that point because the structure is already 
called relay.

>   	struct i915_vma *vma;
>   	struct {
>   		void *buf_addr;
> @@ -67,6 +68,7 @@ void intel_guc_log_destroy(struct intel_guc_log *log);
>   int intel_guc_log_set_level(struct intel_guc_log *log, u32 level);
>   bool intel_guc_log_relay_enabled(const struct intel_guc_log *log);

intel_guc_log_relay_enabled() implied both created and started before, 
but now that you're splitting that in 2 separate states you'll need to 
account for that. From a quick look, all the callers seem to just care 
about the buffers being allocated, so a rename should be enough.

>   int intel_guc_log_relay_open(struct intel_guc_log *log);
> +int intel_guc_log_relay_start(struct intel_guc_log *log);
>   void intel_guc_log_relay_flush(struct intel_guc_log *log);
>   void intel_guc_log_relay_close(struct intel_guc_log *log);
>   
> diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
> index 708855e051b5..c3683fdd0deb 100644
> --- a/drivers/gpu/drm/i915/i915_debugfs.c
> +++ b/drivers/gpu/drm/i915/i915_debugfs.c
> @@ -2049,9 +2049,32 @@ i915_guc_log_relay_write(struct file *filp,
>   			 loff_t *ppos)
>   {
>   	struct intel_guc_log *log = filp->private_data;
> +	char *input_buffer;
> +	int val;
> +	int ret;
>   
> -	intel_guc_log_relay_flush(log);
> -	return cnt;
> +	input_buffer = memdup_user_nul(ubuf, cnt);
> +	if (IS_ERR(input_buffer))
> +		return PTR_ERR(input_buffer);
> +
> +	ret = kstrtoint(input_buffer, 10, &val);
> +	if (ret < 0)
> +		goto out;
> +

you can use kstrtoint_from_user to convert user input to int directly, 
without having to copy to a temp buf.

> +	/*
> +	 * Enable and start the guc log relay on value of 1.
> +	 * Flush log relay for any other value.
> +	 */
> +	if (val == 1) {
> +		ret = intel_guc_log_relay_start(log);
> +	} else {
> +		intel_guc_log_relay_flush(log);
> +		ret = cnt;
> +	}
> +
> +out:
> +	kfree(input_buffer);
> +	return ret;

Probably better to always return cnt in case of success, i.e:

	return ret ?: cnt;

And remove the ret = cnt above.

Daniele

>   }
>   
>   static int i915_guc_log_relay_release(struct inode *inode, struct file *file)
> 
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 9+ messages in thread

* ✗ Fi.CI.IGT: failure for drm/i915/guc: Enable guc logging on guc log relay write
  2019-09-10 22:46 [RFC] drm/i915/guc: Enable guc logging on guc log relay write Robert M. Fosha
  2019-09-10 23:31 ` ✓ Fi.CI.BAT: success for " Patchwork
  2019-09-11  0:48 ` [RFC] " Daniele Ceraolo Spurio
@ 2019-09-11  5:08 ` Patchwork
  2019-09-12 23:26 ` [RFC v2] " Robert M. Fosha
                   ` (2 subsequent siblings)
  5 siblings, 0 replies; 9+ messages in thread
From: Patchwork @ 2019-09-11  5:08 UTC (permalink / raw)
  To: Robert M. Fosha; +Cc: intel-gfx

== Series Details ==

Series: drm/i915/guc: Enable guc logging on guc log relay write
URL   : https://patchwork.freedesktop.org/series/66502/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_6863_full -> Patchwork_14349_full
====================================================

Summary
-------

  **FAILURE**

  Serious unknown changes coming with Patchwork_14349_full absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_14349_full, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in Patchwork_14349_full:

### IGT changes ###

#### Possible regressions ####

  * igt@gem_eio@in-flight-contexts-10ms:
    - shard-hsw:          [PASS][1] -> [TIMEOUT][2]
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6863/shard-hsw5/igt@gem_eio@in-flight-contexts-10ms.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14349/shard-hsw7/igt@gem_eio@in-flight-contexts-10ms.html

  

### Piglit changes ###

#### Possible regressions ####

  * spec@!opengl 1.1@copypixels-sync (NEW):
    - pig-hsw-4770r:      NOTRUN -> [FAIL][3]
   [3]: None

  
New tests
---------

  New tests have been introduced between CI_DRM_6863_full and Patchwork_14349_full:

### New Piglit tests (1) ###

  * spec@!opengl 1.1@copypixels-sync:
    - Statuses : 1 fail(s)
    - Exec time: [57.33] s

  

Known issues
------------

  Here are the changes found in Patchwork_14349_full that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@gem_ctx_switch@legacy-render:
    - shard-iclb:         [PASS][4] -> [INCOMPLETE][5] ([fdo#107713] / [fdo#111381])
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6863/shard-iclb1/igt@gem_ctx_switch@legacy-render.html
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14349/shard-iclb1/igt@gem_ctx_switch@legacy-render.html

  * igt@gem_exec_schedule@in-order-bsd2:
    - shard-iclb:         [PASS][6] -> [SKIP][7] ([fdo#109276]) +11 similar issues
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6863/shard-iclb4/igt@gem_exec_schedule@in-order-bsd2.html
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14349/shard-iclb5/igt@gem_exec_schedule@in-order-bsd2.html

  * igt@gem_exec_schedule@preemptive-hang-bsd:
    - shard-iclb:         [PASS][8] -> [SKIP][9] ([fdo#111325]) +1 similar issue
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6863/shard-iclb5/igt@gem_exec_schedule@preemptive-hang-bsd.html
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14349/shard-iclb1/igt@gem_exec_schedule@preemptive-hang-bsd.html

  * igt@gem_workarounds@suspend-resume:
    - shard-skl:          [PASS][10] -> [INCOMPLETE][11] ([fdo#104108])
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6863/shard-skl8/igt@gem_workarounds@suspend-resume.html
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14349/shard-skl6/igt@gem_workarounds@suspend-resume.html

  * igt@i915_pm_rpm@modeset-stress-extra-wait:
    - shard-glk:          [PASS][12] -> [DMESG-WARN][13] ([fdo#105763] / [fdo#106538])
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6863/shard-glk6/igt@i915_pm_rpm@modeset-stress-extra-wait.html
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14349/shard-glk8/igt@i915_pm_rpm@modeset-stress-extra-wait.html

  * igt@kms_flip@flip-vs-expired-vblank:
    - shard-apl:          [PASS][14] -> [FAIL][15] ([fdo#105363])
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6863/shard-apl3/igt@kms_flip@flip-vs-expired-vblank.html
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14349/shard-apl6/igt@kms_flip@flip-vs-expired-vblank.html

  * igt@kms_flip@flip-vs-suspend-interruptible:
    - shard-apl:          [PASS][16] -> [DMESG-WARN][17] ([fdo#108566]) +3 similar issues
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6863/shard-apl6/igt@kms_flip@flip-vs-suspend-interruptible.html
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14349/shard-apl5/igt@kms_flip@flip-vs-suspend-interruptible.html

  * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-mmap-wc:
    - shard-apl:          [PASS][18] -> [INCOMPLETE][19] ([fdo#103927])
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6863/shard-apl8/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-mmap-wc.html
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14349/shard-apl6/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-mmap-wc.html

  * igt@kms_frontbuffer_tracking@fbc-badstride:
    - shard-iclb:         [PASS][20] -> [FAIL][21] ([fdo#103167]) +5 similar issues
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6863/shard-iclb4/igt@kms_frontbuffer_tracking@fbc-badstride.html
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14349/shard-iclb5/igt@kms_frontbuffer_tracking@fbc-badstride.html

  * igt@kms_plane_alpha_blend@pipe-c-coverage-7efc:
    - shard-skl:          [PASS][22] -> [FAIL][23] ([fdo#108145] / [fdo#110403])
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6863/shard-skl9/igt@kms_plane_alpha_blend@pipe-c-coverage-7efc.html
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14349/shard-skl9/igt@kms_plane_alpha_blend@pipe-c-coverage-7efc.html

  * igt@perf@polling:
    - shard-skl:          [PASS][24] -> [FAIL][25] ([fdo#110728])
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6863/shard-skl4/igt@perf@polling.html
   [25]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14349/shard-skl7/igt@perf@polling.html

  * igt@tools_test@tools_test:
    - shard-apl:          [PASS][26] -> [SKIP][27] ([fdo#109271])
   [26]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6863/shard-apl2/igt@tools_test@tools_test.html
   [27]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14349/shard-apl4/igt@tools_test@tools_test.html

  
#### Possible fixes ####

  * igt@gem_eio@in-flight-suspend:
    - shard-skl:          [INCOMPLETE][28] ([fdo#104108]) -> [PASS][29] +2 similar issues
   [28]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6863/shard-skl3/igt@gem_eio@in-flight-suspend.html
   [29]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14349/shard-skl2/igt@gem_eio@in-flight-suspend.html

  * igt@gem_eio@unwedge-stress:
    - shard-apl:          [INCOMPLETE][30] ([fdo#103927]) -> [PASS][31] +2 similar issues
   [30]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6863/shard-apl4/igt@gem_eio@unwedge-stress.html
   [31]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14349/shard-apl2/igt@gem_eio@unwedge-stress.html

  * igt@gem_exec_reloc@basic-write-cpu-active:
    - shard-skl:          [DMESG-WARN][32] ([fdo#106107]) -> [PASS][33]
   [32]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6863/shard-skl10/igt@gem_exec_reloc@basic-write-cpu-active.html
   [33]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14349/shard-skl4/igt@gem_exec_reloc@basic-write-cpu-active.html

  * igt@gem_exec_schedule@out-order-bsd2:
    - shard-iclb:         [SKIP][34] ([fdo#109276]) -> [PASS][35] +6 similar issues
   [34]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6863/shard-iclb3/igt@gem_exec_schedule@out-order-bsd2.html
   [35]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14349/shard-iclb2/igt@gem_exec_schedule@out-order-bsd2.html

  * igt@gem_exec_schedule@preempt-other-bsd:
    - shard-iclb:         [SKIP][36] ([fdo#111325]) -> [PASS][37] +1 similar issue
   [36]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6863/shard-iclb1/igt@gem_exec_schedule@preempt-other-bsd.html
   [37]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14349/shard-iclb6/igt@gem_exec_schedule@preempt-other-bsd.html

  * igt@kms_flip@flip-vs-suspend-interruptible:
    - shard-skl:          [INCOMPLETE][38] ([fdo#109507]) -> [PASS][39]
   [38]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6863/shard-skl6/igt@kms_flip@flip-vs-suspend-interruptible.html
   [39]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14349/shard-skl3/igt@kms_flip@flip-vs-suspend-interruptible.html
    - shard-hsw:          [INCOMPLETE][40] ([fdo#103540]) -> [PASS][41]
   [40]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6863/shard-hsw7/igt@kms_flip@flip-vs-suspend-interruptible.html
   [41]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14349/shard-hsw1/igt@kms_flip@flip-vs-suspend-interruptible.html

  * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-shrfb-msflip-blt:
    - shard-iclb:         [FAIL][42] ([fdo#103167]) -> [PASS][43] +4 similar issues
   [42]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6863/shard-iclb1/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-shrfb-msflip-blt.html
   [43]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14349/shard-iclb1/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-shrfb-msflip-blt.html

  * igt@kms_pipe_crc_basic@suspend-read-crc-pipe-b:
    - shard-snb:          [DMESG-WARN][44] ([fdo#102365]) -> [PASS][45]
   [44]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6863/shard-snb4/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-b.html
   [45]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14349/shard-snb4/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-b.html

  * igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min:
    - shard-skl:          [FAIL][46] ([fdo#108145]) -> [PASS][47]
   [46]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6863/shard-skl5/igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min.html
   [47]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14349/shard-skl1/igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min.html

  * igt@kms_plane_scaling@pipe-b-scaler-with-pixel-format:
    - shard-iclb:         [INCOMPLETE][48] ([fdo#107713]) -> [PASS][49]
   [48]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6863/shard-iclb7/igt@kms_plane_scaling@pipe-b-scaler-with-pixel-format.html
   [49]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14349/shard-iclb4/igt@kms_plane_scaling@pipe-b-scaler-with-pixel-format.html

  * igt@kms_psr2_su@page_flip:
    - shard-iclb:         [SKIP][50] ([fdo#109642] / [fdo#111068]) -> [PASS][51]
   [50]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6863/shard-iclb4/igt@kms_psr2_su@page_flip.html
   [51]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14349/shard-iclb2/igt@kms_psr2_su@page_flip.html

  * igt@kms_psr@psr2_cursor_plane_onoff:
    - shard-iclb:         [SKIP][52] ([fdo#109441]) -> [PASS][53] +1 similar issue
   [52]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6863/shard-iclb4/igt@kms_psr@psr2_cursor_plane_onoff.html
   [53]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14349/shard-iclb2/igt@kms_psr@psr2_cursor_plane_onoff.html

  * igt@kms_vblank@pipe-a-ts-continuation-suspend:
    - shard-apl:          [DMESG-WARN][54] ([fdo#108566]) -> [PASS][55] +1 similar issue
   [54]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6863/shard-apl1/igt@kms_vblank@pipe-a-ts-continuation-suspend.html
   [55]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14349/shard-apl6/igt@kms_vblank@pipe-a-ts-continuation-suspend.html

  
#### Warnings ####

  * igt@gem_ctx_isolation@vcs1-nonpriv:
    - shard-iclb:         [FAIL][56] ([fdo#111329]) -> [SKIP][57] ([fdo#109276])
   [56]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6863/shard-iclb2/igt@gem_ctx_isolation@vcs1-nonpriv.html
   [57]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14349/shard-iclb7/igt@gem_ctx_isolation@vcs1-nonpriv.html

  * igt@gem_mocs_settings@mocs-isolation-bsd2:
    - shard-iclb:         [SKIP][58] ([fdo#109276]) -> [FAIL][59] ([fdo#111330])
   [58]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6863/shard-iclb3/igt@gem_mocs_settings@mocs-isolation-bsd2.html
   [59]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14349/shard-iclb2/igt@gem_mocs_settings@mocs-isolation-bsd2.html

  * igt@gem_mocs_settings@mocs-settings-bsd2:
    - shard-iclb:         [FAIL][60] ([fdo#111330]) -> [SKIP][61] ([fdo#109276])
   [60]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6863/shard-iclb2/igt@gem_mocs_settings@mocs-settings-bsd2.html
   [61]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14349/shard-iclb7/igt@gem_mocs_settings@mocs-settings-bsd2.html

  
  [fdo#102365]: https://bugs.freedesktop.org/show_bug.cgi?id=102365
  [fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167
  [fdo#103540]: https://bugs.freedesktop.org/show_bug.cgi?id=103540
  [fdo#103927]: https://bugs.freedesktop.org/show_bug.cgi?id=103927
  [fdo#104108]: https://bugs.freedesktop.org/show_bug.cgi?id=104108
  [fdo#105363]: https://bugs.freedesktop.org/show_bug.cgi?id=105363
  [fdo#105763]: https://bugs.freedesktop.org/show_bug.cgi?id=105763
  [fdo#106107]: https://bugs.freedesktop.org/show_bug.cgi?id=106107
  [fdo#106538]: https://bugs.freedesktop.org/show_bug.cgi?id=106538
  [fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713
  [fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145
  [fdo#108566]: https://bugs.freedesktop.org/show_bug.cgi?id=108566
  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [fdo#109276]: https://bugs.freedesktop.org/show_bug.cgi?id=109276
  [fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441
  [fdo#109507]: https://bugs.freedesktop.org/show_bug.cgi?id=109507
  [fdo#109642]: https://bugs.freedesktop.org/show_bug.cgi?id=109642
  [fdo#110403]: https://bugs.freedesktop.org/show_bug.cgi?id=110403
  [fdo#110728]: https://bugs.freedesktop.org/show_bug.cgi?id=110728
  [fdo#111068]: https://bugs.freedesktop.org/show_bug.cgi?id=111068
  [fdo#111325]: https://bugs.freedesktop.org/show_bug.cgi?id=111325
  [fdo#111329]: https://bugs.freedesktop.org/show_bug.cgi?id=111329
  [fdo#111330]: https://bugs.freedesktop.org/show_bug.cgi?id=111330
  [fdo#111381]: https://bugs.freedesktop.org/show_bug.cgi?id=111381


Participating hosts (10 -> 10)
------------------------------

  No changes in participating hosts


Build changes
-------------

  * CI: CI-20190529 -> None
  * Linux: CI_DRM_6863 -> Patchwork_14349

  CI-20190529: 20190529
  CI_DRM_6863: 1b26053f51a47b983cbd2e19ea6eb025a12c976b @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_5178: efb4539494d94f03374874d3b61bd04ef3802aaa @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_14349: a0eaeec653b5359f410361d241f96fc7657a7d61 @ git://anongit.freedesktop.org/gfx-ci/linux
  piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14349/
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 9+ messages in thread

* Re: [RFC] drm/i915/guc: Enable guc logging on guc log relay write
  2019-09-11  0:48 ` [RFC] " Daniele Ceraolo Spurio
@ 2019-09-11 21:28   ` Fosha, Robert M
  2019-09-12 22:13     ` Daniele Ceraolo Spurio
  0 siblings, 1 reply; 9+ messages in thread
From: Fosha, Robert M @ 2019-09-11 21:28 UTC (permalink / raw)
  To: Daniele Ceraolo Spurio, intel-gfx


On 9/10/19 5:48 PM, Daniele Ceraolo Spurio wrote:
>
>
> On 9/10/19 3:46 PM, Robert M. Fosha wrote:
>> Creating and opening the GuC log relay file enables and starts
>> the relay potentially before the caller is ready to consume logs.
>> Change the behavior so that relay starts only on an explicit call
>> to the write function (with a value of '1'). Other values flush
>> the log relay as before.
>>
>> Cc: Matthew Brost <matthew.brost@intel.com>
>> Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
>> Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
>> Signed-off-by: Robert M. Fosha <robert.m.fosha@intel.com>
>> ---
>>   drivers/gpu/drm/i915/gt/uc/intel_guc_log.c | 38 +++++++++++++++++-----
>>   drivers/gpu/drm/i915/gt/uc/intel_guc_log.h |  2 ++
>>   drivers/gpu/drm/i915/i915_debugfs.c        | 27 +++++++++++++--
>>   3 files changed, 56 insertions(+), 11 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_log.c 
>> b/drivers/gpu/drm/i915/gt/uc/intel_guc_log.c
>> index 36332064de9c..9a98270d05b6 100644
>> --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_log.c
>> +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_log.c
>> @@ -361,6 +361,7 @@ void intel_guc_log_init_early(struct 
>> intel_guc_log *log)
>>   {
>>       mutex_init(&log->relay.lock);
>>       INIT_WORK(&log->relay.flush_work, capture_logs_work);
>> +    log->relay_started = false;
>>   }
>>     static int guc_log_relay_create(struct intel_guc_log *log)
>> @@ -585,15 +586,6 @@ int intel_guc_log_relay_open(struct 
>> intel_guc_log *log)
>>         mutex_unlock(&log->relay.lock);
>>   -    guc_log_enable_flush_events(log);
>> -
>> -    /*
>> -     * When GuC is logging without us relaying to userspace, we're 
>> ignoring
>> -     * the flush notification. This means that we need to 
>> unconditionally
>> -     * flush on relay enabling, since GuC only notifies us once.
>> -     */
>> -    queue_work(system_highpri_wq, &log->relay.flush_work);
>> -
>>       return 0;
>>     out_relay:
>> @@ -604,12 +596,38 @@ int intel_guc_log_relay_open(struct 
>> intel_guc_log *log)
>>       return ret;
>>   }
>>   +int intel_guc_log_relay_start(struct intel_guc_log *log)
>> +{
>> +    int ret = 0;
>> +
>> +    if (log->relay_started) {
>> +        ret =  -EEXIST;
>> +    } else {
>
> style: for this kind of checks, we usually just return early instead 
> of using an if-else, i.e.:
>
>     if (log->relay_started)
>         return -EEXIST;
>
>     [...] /* code */
>
>     return 0;
>
>> +        guc_log_enable_flush_events(log);
>> +
>> +        /*
>> +         * When GuC is logging without us relaying to userspace, we're
>> +         * ignoring the flush notification. This means that we need to
>> +         * unconditionally * flush on relay enabling, since GuC only
>
> stray "*"
>
>> +         * notifies us once.
>> +         */
>> +        queue_work(system_highpri_wq, &log->relay.flush_work);
>> +
>> +        log->relay_started = false;
>
> s/false/true/
>
>> +    }
>> +
>> +    return ret;
>> +}
>> +
>>   void intel_guc_log_relay_flush(struct intel_guc_log *log)
>>   {
>>       struct intel_guc *guc = log_to_guc(log);
>>       struct drm_i915_private *i915 = guc_to_gt(guc)->i915;
>>       intel_wakeref_t wakeref;
>>   +    if (!log->relay_started)
>> +        return;
>> +
>>       /*
>>        * Before initiating the forceful flush, wait for any 
>> pending/ongoing
>>        * flush to complete otherwise forceful flush may not actually 
>> happen.
>> @@ -638,6 +656,8 @@ void intel_guc_log_relay_close(struct 
>> intel_guc_log *log)
>>       guc_log_unmap(log);
>>       guc_log_relay_destroy(log);
>>       mutex_unlock(&log->relay.lock);
>> +
>> +    log->relay_started = false;
>
>
> For symmetry, it might be worth adding a guc_log_relay_stop:

Should it be intel_guc_log_relay_stop to be consistent with naming of 
other functions?

>
> static void guc_log_relay_stop(...)
> {
>     if (!log->relay_started)
>         return;
>
>     guc_log_disable_flush_events(log);
>     intel_synchronize_irq(i915);
>
>     flush_work(&log->relay.flush_work);
>
>     log->relay_started = false;
> }
>
> and call it from intel_guc_log_relay_close().
>
> Also, it should be impossible to race the start/flush with the stop 
> because the relay_write can't race the relay_close, but it might be 
> worth a comment in case we decide to have guc_log_relay_stop() 
> callable from the debugfs in the future.

How about this comment just above the relay_stop function:

/*
  * Stops the relay log. Called from intel_guc_log_relay_close(), so no
  * possibility of race with start/flush since relay_write cannot race
  * relay_close.
  */

>
>>   }
>>     void intel_guc_log_handle_flush_event(struct intel_guc_log *log)
>> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_log.h 
>> b/drivers/gpu/drm/i915/gt/uc/intel_guc_log.h
>> index 6f764879acb1..ecf7a49416b4 100644
>> --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_log.h
>> +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_log.h
>> @@ -44,6 +44,7 @@ struct intel_guc;
>>     struct intel_guc_log {
>>       u32 level;
>> +    bool relay_started;
>
> this should move inside the relay structure below. Just "started" will 
> be enough as a name at that point because the structure is already 
> called relay.
>
>>       struct i915_vma *vma;
>>       struct {
>>           void *buf_addr;
>> @@ -67,6 +68,7 @@ void intel_guc_log_destroy(struct intel_guc_log *log);
>>   int intel_guc_log_set_level(struct intel_guc_log *log, u32 level);
>>   bool intel_guc_log_relay_enabled(const struct intel_guc_log *log);
>
> intel_guc_log_relay_enabled() implied both created and started before, 
> but now that you're splitting that in 2 separate states you'll need to 
> account for that. From a quick look, all the callers seem to just care 
> about the buffers being allocated, so a rename should be enough.
>
>>   int intel_guc_log_relay_open(struct intel_guc_log *log);
>> +int intel_guc_log_relay_start(struct intel_guc_log *log);
>>   void intel_guc_log_relay_flush(struct intel_guc_log *log);
>>   void intel_guc_log_relay_close(struct intel_guc_log *log);
>>   diff --git a/drivers/gpu/drm/i915/i915_debugfs.c 
>> b/drivers/gpu/drm/i915/i915_debugfs.c
>> index 708855e051b5..c3683fdd0deb 100644
>> --- a/drivers/gpu/drm/i915/i915_debugfs.c
>> +++ b/drivers/gpu/drm/i915/i915_debugfs.c
>> @@ -2049,9 +2049,32 @@ i915_guc_log_relay_write(struct file *filp,
>>                loff_t *ppos)
>>   {
>>       struct intel_guc_log *log = filp->private_data;
>> +    char *input_buffer;
>> +    int val;
>> +    int ret;
>>   -    intel_guc_log_relay_flush(log);
>> -    return cnt;
>> +    input_buffer = memdup_user_nul(ubuf, cnt);
>> +    if (IS_ERR(input_buffer))
>> +        return PTR_ERR(input_buffer);
>> +
>> +    ret = kstrtoint(input_buffer, 10, &val);
>> +    if (ret < 0)
>> +        goto out;
>> +
>
> you can use kstrtoint_from_user to convert user input to int directly, 
> without having to copy to a temp buf.
>
>> +    /*
>> +     * Enable and start the guc log relay on value of 1.
>> +     * Flush log relay for any other value.
>> +     */
>> +    if (val == 1) {
>> +        ret = intel_guc_log_relay_start(log);
>> +    } else {
>> +        intel_guc_log_relay_flush(log);
>> +        ret = cnt;
>> +    }
>> +
>> +out:
>> +    kfree(input_buffer);
>> +    return ret;
>
> Probably better to always return cnt in case of success, i.e:
>
>     return ret ?: cnt;
>
> And remove the ret = cnt above.
>
> Daniele
>

Thanks for the feedback. Will include all the recommended fixes/changes.

>>   }
>>     static int i915_guc_log_relay_release(struct inode *inode, struct 
>> file *file)
>>
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 9+ messages in thread

* Re: [RFC] drm/i915/guc: Enable guc logging on guc log relay write
  2019-09-11 21:28   ` Fosha, Robert M
@ 2019-09-12 22:13     ` Daniele Ceraolo Spurio
  0 siblings, 0 replies; 9+ messages in thread
From: Daniele Ceraolo Spurio @ 2019-09-12 22:13 UTC (permalink / raw)
  To: Fosha, Robert M, intel-gfx



On 9/11/19 2:28 PM, Fosha, Robert M wrote:
> 
> On 9/10/19 5:48 PM, Daniele Ceraolo Spurio wrote:
>>
>>
>> On 9/10/19 3:46 PM, Robert M. Fosha wrote:
>>> Creating and opening the GuC log relay file enables and starts
>>> the relay potentially before the caller is ready to consume logs.
>>> Change the behavior so that relay starts only on an explicit call
>>> to the write function (with a value of '1'). Other values flush
>>> the log relay as before.
>>>
>>> Cc: Matthew Brost <matthew.brost@intel.com>
>>> Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
>>> Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
>>> Signed-off-by: Robert M. Fosha <robert.m.fosha@intel.com>
>>> ---
>>>   drivers/gpu/drm/i915/gt/uc/intel_guc_log.c | 38 +++++++++++++++++-----
>>>   drivers/gpu/drm/i915/gt/uc/intel_guc_log.h |  2 ++
>>>   drivers/gpu/drm/i915/i915_debugfs.c        | 27 +++++++++++++--
>>>   3 files changed, 56 insertions(+), 11 deletions(-)
>>>
>>> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_log.c 
>>> b/drivers/gpu/drm/i915/gt/uc/intel_guc_log.c
>>> index 36332064de9c..9a98270d05b6 100644
>>> --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_log.c
>>> +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_log.c
>>> @@ -361,6 +361,7 @@ void intel_guc_log_init_early(struct 
>>> intel_guc_log *log)
>>>   {
>>>       mutex_init(&log->relay.lock);
>>>       INIT_WORK(&log->relay.flush_work, capture_logs_work);
>>> +    log->relay_started = false;
>>>   }
>>>     static int guc_log_relay_create(struct intel_guc_log *log)
>>> @@ -585,15 +586,6 @@ int intel_guc_log_relay_open(struct 
>>> intel_guc_log *log)
>>>         mutex_unlock(&log->relay.lock);
>>>   -    guc_log_enable_flush_events(log);
>>> -
>>> -    /*
>>> -     * When GuC is logging without us relaying to userspace, we're 
>>> ignoring
>>> -     * the flush notification. This means that we need to 
>>> unconditionally
>>> -     * flush on relay enabling, since GuC only notifies us once.
>>> -     */
>>> -    queue_work(system_highpri_wq, &log->relay.flush_work);
>>> -
>>>       return 0;
>>>     out_relay:
>>> @@ -604,12 +596,38 @@ int intel_guc_log_relay_open(struct 
>>> intel_guc_log *log)
>>>       return ret;
>>>   }
>>>   +int intel_guc_log_relay_start(struct intel_guc_log *log)
>>> +{
>>> +    int ret = 0;
>>> +
>>> +    if (log->relay_started) {
>>> +        ret =  -EEXIST;
>>> +    } else {
>>
>> style: for this kind of checks, we usually just return early instead 
>> of using an if-else, i.e.:
>>
>>     if (log->relay_started)
>>         return -EEXIST;
>>
>>     [...] /* code */
>>
>>     return 0;
>>
>>> +        guc_log_enable_flush_events(log);
>>> +
>>> +        /*
>>> +         * When GuC is logging without us relaying to userspace, we're
>>> +         * ignoring the flush notification. This means that we need to
>>> +         * unconditionally * flush on relay enabling, since GuC only
>>
>> stray "*"
>>
>>> +         * notifies us once.
>>> +         */
>>> +        queue_work(system_highpri_wq, &log->relay.flush_work);
>>> +
>>> +        log->relay_started = false;
>>
>> s/false/true/
>>
>>> +    }
>>> +
>>> +    return ret;
>>> +}
>>> +
>>>   void intel_guc_log_relay_flush(struct intel_guc_log *log)
>>>   {
>>>       struct intel_guc *guc = log_to_guc(log);
>>>       struct drm_i915_private *i915 = guc_to_gt(guc)->i915;
>>>       intel_wakeref_t wakeref;
>>>   +    if (!log->relay_started)
>>> +        return;
>>> +
>>>       /*
>>>        * Before initiating the forceful flush, wait for any 
>>> pending/ongoing
>>>        * flush to complete otherwise forceful flush may not actually 
>>> happen.
>>> @@ -638,6 +656,8 @@ void intel_guc_log_relay_close(struct 
>>> intel_guc_log *log)
>>>       guc_log_unmap(log);
>>>       guc_log_relay_destroy(log);
>>>       mutex_unlock(&log->relay.lock);
>>> +
>>> +    log->relay_started = false;
>>
>>
>> For symmetry, it might be worth adding a guc_log_relay_stop:
> 
> Should it be intel_guc_log_relay_stop to be consistent with naming of 
> other functions?

intel_* prefix is usually only used for non-static functions

> 
>>
>> static void guc_log_relay_stop(...)
>> {
>>     if (!log->relay_started)
>>         return;
>>
>>     guc_log_disable_flush_events(log);
>>     intel_synchronize_irq(i915);
>>
>>     flush_work(&log->relay.flush_work);
>>
>>     log->relay_started = false;
>> }
>>
>> and call it from intel_guc_log_relay_close().
>>
>> Also, it should be impossible to race the start/flush with the stop 
>> because the relay_write can't race the relay_close, but it might be 
>> worth a comment in case we decide to have guc_log_relay_stop() 
>> callable from the debugfs in the future.
> 
> How about this comment just above the relay_stop function:
> 
> /*
>   * Stops the relay log. Called from intel_guc_log_relay_close(), so no
>   * possibility of race with start/flush since relay_write cannot race
>   * relay_close.
>   */
> 

LGTM.

Daniele

>>
>>>   }
>>>     void intel_guc_log_handle_flush_event(struct intel_guc_log *log)
>>> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_log.h 
>>> b/drivers/gpu/drm/i915/gt/uc/intel_guc_log.h
>>> index 6f764879acb1..ecf7a49416b4 100644
>>> --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_log.h
>>> +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_log.h
>>> @@ -44,6 +44,7 @@ struct intel_guc;
>>>     struct intel_guc_log {
>>>       u32 level;
>>> +    bool relay_started;
>>
>> this should move inside the relay structure below. Just "started" will 
>> be enough as a name at that point because the structure is already 
>> called relay.
>>
>>>       struct i915_vma *vma;
>>>       struct {
>>>           void *buf_addr;
>>> @@ -67,6 +68,7 @@ void intel_guc_log_destroy(struct intel_guc_log *log);
>>>   int intel_guc_log_set_level(struct intel_guc_log *log, u32 level);
>>>   bool intel_guc_log_relay_enabled(const struct intel_guc_log *log);
>>
>> intel_guc_log_relay_enabled() implied both created and started before, 
>> but now that you're splitting that in 2 separate states you'll need to 
>> account for that. From a quick look, all the callers seem to just care 
>> about the buffers being allocated, so a rename should be enough.
>>
>>>   int intel_guc_log_relay_open(struct intel_guc_log *log);
>>> +int intel_guc_log_relay_start(struct intel_guc_log *log);
>>>   void intel_guc_log_relay_flush(struct intel_guc_log *log);
>>>   void intel_guc_log_relay_close(struct intel_guc_log *log);
>>>   diff --git a/drivers/gpu/drm/i915/i915_debugfs.c 
>>> b/drivers/gpu/drm/i915/i915_debugfs.c
>>> index 708855e051b5..c3683fdd0deb 100644
>>> --- a/drivers/gpu/drm/i915/i915_debugfs.c
>>> +++ b/drivers/gpu/drm/i915/i915_debugfs.c
>>> @@ -2049,9 +2049,32 @@ i915_guc_log_relay_write(struct file *filp,
>>>                loff_t *ppos)
>>>   {
>>>       struct intel_guc_log *log = filp->private_data;
>>> +    char *input_buffer;
>>> +    int val;
>>> +    int ret;
>>>   -    intel_guc_log_relay_flush(log);
>>> -    return cnt;
>>> +    input_buffer = memdup_user_nul(ubuf, cnt);
>>> +    if (IS_ERR(input_buffer))
>>> +        return PTR_ERR(input_buffer);
>>> +
>>> +    ret = kstrtoint(input_buffer, 10, &val);
>>> +    if (ret < 0)
>>> +        goto out;
>>> +
>>
>> you can use kstrtoint_from_user to convert user input to int directly, 
>> without having to copy to a temp buf.
>>
>>> +    /*
>>> +     * Enable and start the guc log relay on value of 1.
>>> +     * Flush log relay for any other value.
>>> +     */
>>> +    if (val == 1) {
>>> +        ret = intel_guc_log_relay_start(log);
>>> +    } else {
>>> +        intel_guc_log_relay_flush(log);
>>> +        ret = cnt;
>>> +    }
>>> +
>>> +out:
>>> +    kfree(input_buffer);
>>> +    return ret;
>>
>> Probably better to always return cnt in case of success, i.e:
>>
>>     return ret ?: cnt;
>>
>> And remove the ret = cnt above.
>>
>> Daniele
>>
> 
> Thanks for the feedback. Will include all the recommended fixes/changes.
> 
>>>   }
>>>     static int i915_guc_log_relay_release(struct inode *inode, struct 
>>> file *file)
>>>
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 9+ messages in thread

* [RFC v2] drm/i915/guc: Enable guc logging on guc log relay write
  2019-09-10 22:46 [RFC] drm/i915/guc: Enable guc logging on guc log relay write Robert M. Fosha
                   ` (2 preceding siblings ...)
  2019-09-11  5:08 ` ✗ Fi.CI.IGT: failure for " Patchwork
@ 2019-09-12 23:26 ` Robert M. Fosha
  2019-09-13  0:28 ` ✓ Fi.CI.BAT: success for drm/i915/guc: Enable guc logging on guc log relay write (rev2) Patchwork
  2019-09-13 18:15 ` ✓ Fi.CI.IGT: " Patchwork
  5 siblings, 0 replies; 9+ messages in thread
From: Robert M. Fosha @ 2019-09-12 23:26 UTC (permalink / raw)
  To: intel-gfx

Creating and opening the GuC log relay file enables and starts
the relay potentially before the caller is ready to consume logs.
Change the behavior so that relay starts only on an explicit call
to the write function (with a value of '1'). Other values flush
the log relay as before.

v2: Style changes and fix typos. Add guc_log_relay_stop()
function. (Daniele)

Cc: Matthew Brost <matthew.brost@intel.com>
Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
Signed-off-by: Robert M. Fosha <robert.m.fosha@intel.com>
---
 drivers/gpu/drm/i915/gt/uc/intel_guc_log.c | 53 +++++++++++++++++-----
 drivers/gpu/drm/i915/gt/uc/intel_guc_log.h |  4 +-
 drivers/gpu/drm/i915/i915_debugfs.c        | 22 +++++++--
 3 files changed, 62 insertions(+), 17 deletions(-)

diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_log.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_log.c
index 36332064de9c..e26c7748358b 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_log.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_log.c
@@ -226,7 +226,7 @@ static void guc_read_update_log_buffer(struct intel_guc_log *log)
 
 	mutex_lock(&log->relay.lock);
 
-	if (WARN_ON(!intel_guc_log_relay_enabled(log)))
+	if (WARN_ON(!intel_guc_log_relay_created(log)))
 		goto out_unlock;
 
 	/* Get the pointer to shared GuC log buffer */
@@ -361,6 +361,7 @@ void intel_guc_log_init_early(struct intel_guc_log *log)
 {
 	mutex_init(&log->relay.lock);
 	INIT_WORK(&log->relay.flush_work, capture_logs_work);
+	log->relay.started = false;
 }
 
 static int guc_log_relay_create(struct intel_guc_log *log)
@@ -546,7 +547,7 @@ int intel_guc_log_set_level(struct intel_guc_log *log, u32 level)
 	return ret;
 }
 
-bool intel_guc_log_relay_enabled(const struct intel_guc_log *log)
+bool intel_guc_log_relay_created(const struct intel_guc_log *log)
 {
 	return log->relay.buf_addr;
 }
@@ -560,7 +561,7 @@ int intel_guc_log_relay_open(struct intel_guc_log *log)
 
 	mutex_lock(&log->relay.lock);
 
-	if (intel_guc_log_relay_enabled(log)) {
+	if (intel_guc_log_relay_created(log)) {
 		ret = -EEXIST;
 		goto out_unlock;
 	}
@@ -585,6 +586,21 @@ int intel_guc_log_relay_open(struct intel_guc_log *log)
 
 	mutex_unlock(&log->relay.lock);
 
+	return 0;
+
+out_relay:
+	guc_log_relay_destroy(log);
+out_unlock:
+	mutex_unlock(&log->relay.lock);
+
+	return ret;
+}
+
+int intel_guc_log_relay_start(struct intel_guc_log *log)
+{
+	if (log->relay.started)
+		return -EEXIST;
+
 	guc_log_enable_flush_events(log);
 
 	/*
@@ -594,14 +610,9 @@ int intel_guc_log_relay_open(struct intel_guc_log *log)
 	 */
 	queue_work(system_highpri_wq, &log->relay.flush_work);
 
-	return 0;
-
-out_relay:
-	guc_log_relay_destroy(log);
-out_unlock:
-	mutex_unlock(&log->relay.lock);
+	log->relay.started = true;
 
-	return ret;
+	return 0;
 }
 
 void intel_guc_log_relay_flush(struct intel_guc_log *log)
@@ -610,6 +621,9 @@ void intel_guc_log_relay_flush(struct intel_guc_log *log)
 	struct drm_i915_private *i915 = guc_to_gt(guc)->i915;
 	intel_wakeref_t wakeref;
 
+	if (!log->relay.started)
+		return;
+
 	/*
 	 * Before initiating the forceful flush, wait for any pending/ongoing
 	 * flush to complete otherwise forceful flush may not actually happen.
@@ -623,18 +637,33 @@ void intel_guc_log_relay_flush(struct intel_guc_log *log)
 	guc_log_capture_logs(log);
 }
 
-void intel_guc_log_relay_close(struct intel_guc_log *log)
+/*
+ * Stops the relay log. Called from intel_guc_log_relay_close(), so no
+ * possibility of race with start/flush since relay_write cannot race
+ * relay_close.
+ */
+static void guc_log_relay_stop(struct intel_guc_log *log)
 {
 	struct intel_guc *guc = log_to_guc(log);
 	struct drm_i915_private *i915 = guc_to_gt(guc)->i915;
 
+	if (!log->relay.started)
+		return;
+
 	guc_log_disable_flush_events(log);
 	intel_synchronize_irq(i915);
 
 	flush_work(&log->relay.flush_work);
 
+	log->relay.started = false;
+}
+
+void intel_guc_log_relay_close(struct intel_guc_log *log)
+{
+	guc_log_relay_stop(log);
+
 	mutex_lock(&log->relay.lock);
-	GEM_BUG_ON(!intel_guc_log_relay_enabled(log));
+	GEM_BUG_ON(!intel_guc_log_relay_created(log));
 	guc_log_unmap(log);
 	guc_log_relay_destroy(log);
 	mutex_unlock(&log->relay.lock);
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_log.h b/drivers/gpu/drm/i915/gt/uc/intel_guc_log.h
index 6f764879acb1..c252c022c5fc 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_log.h
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_log.h
@@ -47,6 +47,7 @@ struct intel_guc_log {
 	struct i915_vma *vma;
 	struct {
 		void *buf_addr;
+		bool started;
 		struct work_struct flush_work;
 		struct rchan *channel;
 		struct mutex lock;
@@ -65,8 +66,9 @@ int intel_guc_log_create(struct intel_guc_log *log);
 void intel_guc_log_destroy(struct intel_guc_log *log);
 
 int intel_guc_log_set_level(struct intel_guc_log *log, u32 level);
-bool intel_guc_log_relay_enabled(const struct intel_guc_log *log);
+bool intel_guc_log_relay_created(const struct intel_guc_log *log);
 int intel_guc_log_relay_open(struct intel_guc_log *log);
+int intel_guc_log_relay_start(struct intel_guc_log *log);
 void intel_guc_log_relay_flush(struct intel_guc_log *log);
 void intel_guc_log_relay_close(struct intel_guc_log *log);
 
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
index 708855e051b5..57143255111a 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -1861,8 +1861,8 @@ static void i915_guc_log_info(struct seq_file *m,
 	struct intel_guc_log *log = &dev_priv->gt.uc.guc.log;
 	enum guc_log_buffer_type type;
 
-	if (!intel_guc_log_relay_enabled(log)) {
-		seq_puts(m, "GuC log relay disabled\n");
+	if (!intel_guc_log_relay_created(log)) {
+		seq_puts(m, "GuC log relay not created\n");
 		return;
 	}
 
@@ -2049,9 +2049,23 @@ i915_guc_log_relay_write(struct file *filp,
 			 loff_t *ppos)
 {
 	struct intel_guc_log *log = filp->private_data;
+	int val;
+	int ret;
 
-	intel_guc_log_relay_flush(log);
-	return cnt;
+	ret = kstrtoint_from_user(ubuf, cnt, 0, &val);
+	if (ret < 0)
+		return ret;
+
+	/*
+	 * Enable and start the guc log relay on value of 1.
+	 * Flush log relay for any other value.
+	 */
+	if (val == 1)
+		ret = intel_guc_log_relay_start(log);
+	else
+		intel_guc_log_relay_flush(log);
+
+	return ret ?: cnt;
 }
 
 static int i915_guc_log_relay_release(struct inode *inode, struct file *file)
-- 
2.21.0.5.gaeb582a983

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply related	[flat|nested] 9+ messages in thread

* ✓ Fi.CI.BAT: success for drm/i915/guc: Enable guc logging on guc log relay write (rev2)
  2019-09-10 22:46 [RFC] drm/i915/guc: Enable guc logging on guc log relay write Robert M. Fosha
                   ` (3 preceding siblings ...)
  2019-09-12 23:26 ` [RFC v2] " Robert M. Fosha
@ 2019-09-13  0:28 ` Patchwork
  2019-09-13 18:15 ` ✓ Fi.CI.IGT: " Patchwork
  5 siblings, 0 replies; 9+ messages in thread
From: Patchwork @ 2019-09-13  0:28 UTC (permalink / raw)
  To: Robert M. Fosha; +Cc: intel-gfx

== Series Details ==

Series: drm/i915/guc: Enable guc logging on guc log relay write (rev2)
URL   : https://patchwork.freedesktop.org/series/66502/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_6885 -> Patchwork_14392
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14392/

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in Patchwork_14392:

### IGT changes ###

#### Suppressed ####

  The following results come from untrusted machines, tests, or statuses.
  They do not affect the overall result.

  * igt@i915_pm_rpm@basic-pci-d3-state:
    - {fi-tgl-u}:         NOTRUN -> [SKIP][1]
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14392/fi-tgl-u/igt@i915_pm_rpm@basic-pci-d3-state.html

  * igt@i915_pm_rpm@basic-rte:
    - {fi-tgl-u}:         NOTRUN -> [FAIL][2]
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14392/fi-tgl-u/igt@i915_pm_rpm@basic-rte.html

  
Known issues
------------

  Here are the changes found in Patchwork_14392 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@gem_ctx_switch@legacy-render:
    - fi-bxt-dsi:         [PASS][3] -> [INCOMPLETE][4] ([fdo#103927] / [fdo#111381])
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6885/fi-bxt-dsi/igt@gem_ctx_switch@legacy-render.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14392/fi-bxt-dsi/igt@gem_ctx_switch@legacy-render.html

  * igt@gem_flink_basic@flink-lifetime:
    - fi-icl-u3:          [PASS][5] -> [DMESG-WARN][6] ([fdo#107724]) +1 similar issue
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6885/fi-icl-u3/igt@gem_flink_basic@flink-lifetime.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14392/fi-icl-u3/igt@gem_flink_basic@flink-lifetime.html

  * igt@i915_module_load@reload:
    - fi-icl-u3:          [PASS][7] -> [DMESG-WARN][8] ([fdo#107724] / [fdo#111214])
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6885/fi-icl-u3/igt@i915_module_load@reload.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14392/fi-icl-u3/igt@i915_module_load@reload.html

  * igt@i915_selftest@live_gem_contexts:
    - fi-skl-6770hq:      [PASS][9] -> [INCOMPLETE][10] ([fdo#111519])
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6885/fi-skl-6770hq/igt@i915_selftest@live_gem_contexts.html
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14392/fi-skl-6770hq/igt@i915_selftest@live_gem_contexts.html

  * igt@i915_selftest@live_reset:
    - fi-icl-u3:          [PASS][11] -> [INCOMPLETE][12] ([fdo#107713])
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6885/fi-icl-u3/igt@i915_selftest@live_reset.html
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14392/fi-icl-u3/igt@i915_selftest@live_reset.html

  
#### Possible fixes ####

  * igt@debugfs_test@read_all_entries:
    - {fi-tgl-u2}:        [DMESG-WARN][13] ([fdo#111600]) -> [PASS][14]
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6885/fi-tgl-u2/igt@debugfs_test@read_all_entries.html
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14392/fi-tgl-u2/igt@debugfs_test@read_all_entries.html

  * igt@gem_exec_suspend@basic-s3:
    - {fi-tgl-u}:         [INCOMPLETE][15] -> [PASS][16]
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6885/fi-tgl-u/igt@gem_exec_suspend@basic-s3.html
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14392/fi-tgl-u/igt@gem_exec_suspend@basic-s3.html

  * igt@kms_frontbuffer_tracking@basic:
    - {fi-icl-u4}:        [FAIL][17] ([fdo#103167]) -> [PASS][18]
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6885/fi-icl-u4/igt@kms_frontbuffer_tracking@basic.html
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14392/fi-icl-u4/igt@kms_frontbuffer_tracking@basic.html
    - fi-icl-u2:          [FAIL][19] ([fdo#103167]) -> [PASS][20]
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6885/fi-icl-u2/igt@kms_frontbuffer_tracking@basic.html
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14392/fi-icl-u2/igt@kms_frontbuffer_tracking@basic.html

  * igt@prime_vgem@basic-busy-default:
    - fi-icl-u3:          [DMESG-WARN][21] ([fdo#107724]) -> [PASS][22]
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6885/fi-icl-u3/igt@prime_vgem@basic-busy-default.html
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14392/fi-icl-u3/igt@prime_vgem@basic-busy-default.html

  
#### Warnings ####

  * igt@kms_chamelium@hdmi-hpd-fast:
    - fi-kbl-7500u:       [FAIL][23] ([fdo#111096]) -> [FAIL][24] ([fdo#111407])
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6885/fi-kbl-7500u/igt@kms_chamelium@hdmi-hpd-fast.html
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14392/fi-kbl-7500u/igt@kms_chamelium@hdmi-hpd-fast.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167
  [fdo#103927]: https://bugs.freedesktop.org/show_bug.cgi?id=103927
  [fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713
  [fdo#107724]: https://bugs.freedesktop.org/show_bug.cgi?id=107724
  [fdo#111096]: https://bugs.freedesktop.org/show_bug.cgi?id=111096
  [fdo#111214]: https://bugs.freedesktop.org/show_bug.cgi?id=111214
  [fdo#111381]: https://bugs.freedesktop.org/show_bug.cgi?id=111381
  [fdo#111407]: https://bugs.freedesktop.org/show_bug.cgi?id=111407
  [fdo#111519]: https://bugs.freedesktop.org/show_bug.cgi?id=111519
  [fdo#111600]: https://bugs.freedesktop.org/show_bug.cgi?id=111600


Participating hosts (55 -> 47)
------------------------------

  Missing    (8): fi-kbl-soraka fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-icl-y fi-byt-clapper fi-bdw-samus 


Build changes
-------------

  * CI: CI-20190529 -> None
  * Linux: CI_DRM_6885 -> Patchwork_14392

  CI-20190529: 20190529
  CI_DRM_6885: 11786d27cb029a083556ac9b82e33d74e250ce26 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_5178: efb4539494d94f03374874d3b61bd04ef3802aaa @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_14392: 20b421e03b990b969cc08ccac0ed9fd64bdf5e3f @ git://anongit.freedesktop.org/gfx-ci/linux


== Linux commits ==

20b421e03b99 drm/i915/guc: Enable guc logging on guc log relay write

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14392/
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 9+ messages in thread

* ✓ Fi.CI.IGT: success for drm/i915/guc: Enable guc logging on guc log relay write (rev2)
  2019-09-10 22:46 [RFC] drm/i915/guc: Enable guc logging on guc log relay write Robert M. Fosha
                   ` (4 preceding siblings ...)
  2019-09-13  0:28 ` ✓ Fi.CI.BAT: success for drm/i915/guc: Enable guc logging on guc log relay write (rev2) Patchwork
@ 2019-09-13 18:15 ` Patchwork
  5 siblings, 0 replies; 9+ messages in thread
From: Patchwork @ 2019-09-13 18:15 UTC (permalink / raw)
  To: Robert M. Fosha; +Cc: intel-gfx

== Series Details ==

Series: drm/i915/guc: Enable guc logging on guc log relay write (rev2)
URL   : https://patchwork.freedesktop.org/series/66502/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_6885_full -> Patchwork_14392_full
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  

Known issues
------------

  Here are the changes found in Patchwork_14392_full that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@gem_exec_schedule@preempt-queue-bsd:
    - shard-iclb:         [PASS][1] -> [SKIP][2] ([fdo#111325]) +1 similar issue
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6885/shard-iclb6/igt@gem_exec_schedule@preempt-queue-bsd.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14392/shard-iclb2/igt@gem_exec_schedule@preempt-queue-bsd.html

  * igt@gem_exec_schedule@preempt-queue-bsd1:
    - shard-iclb:         [PASS][3] -> [SKIP][4] ([fdo#109276]) +19 similar issues
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6885/shard-iclb1/igt@gem_exec_schedule@preempt-queue-bsd1.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14392/shard-iclb6/igt@gem_exec_schedule@preempt-queue-bsd1.html

  * igt@gem_tiled_swapping@non-threaded:
    - shard-glk:          [PASS][5] -> [DMESG-WARN][6] ([fdo#108686])
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6885/shard-glk6/igt@gem_tiled_swapping@non-threaded.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14392/shard-glk4/igt@gem_tiled_swapping@non-threaded.html

  * igt@gem_workarounds@suspend-resume-context:
    - shard-apl:          [PASS][7] -> [DMESG-WARN][8] ([fdo#108566]) +2 similar issues
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6885/shard-apl2/igt@gem_workarounds@suspend-resume-context.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14392/shard-apl4/igt@gem_workarounds@suspend-resume-context.html

  * igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-indfb-draw-blt:
    - shard-iclb:         [PASS][9] -> [FAIL][10] ([fdo#103167]) +2 similar issues
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6885/shard-iclb3/igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-indfb-draw-blt.html
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14392/shard-iclb7/igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-indfb-draw-blt.html

  * igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min:
    - shard-skl:          [PASS][11] -> [FAIL][12] ([fdo#108145])
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6885/shard-skl7/igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min.html
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14392/shard-skl9/igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min.html

  * igt@kms_plane_alpha_blend@pipe-b-coverage-7efc:
    - shard-skl:          [PASS][13] -> [FAIL][14] ([fdo#108145] / [fdo#110403])
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6885/shard-skl5/igt@kms_plane_alpha_blend@pipe-b-coverage-7efc.html
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14392/shard-skl7/igt@kms_plane_alpha_blend@pipe-b-coverage-7efc.html

  * igt@kms_plane_cursor@pipe-a-primary-size-256:
    - shard-hsw:          [PASS][15] -> [INCOMPLETE][16] ([fdo#103540])
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6885/shard-hsw2/igt@kms_plane_cursor@pipe-a-primary-size-256.html
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14392/shard-hsw2/igt@kms_plane_cursor@pipe-a-primary-size-256.html

  * igt@kms_plane_multiple@atomic-pipe-a-tiling-yf:
    - shard-skl:          [PASS][17] -> [DMESG-WARN][18] ([fdo#106885])
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6885/shard-skl5/igt@kms_plane_multiple@atomic-pipe-a-tiling-yf.html
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14392/shard-skl1/igt@kms_plane_multiple@atomic-pipe-a-tiling-yf.html

  * igt@kms_psr2_su@page_flip:
    - shard-iclb:         [PASS][19] -> [SKIP][20] ([fdo#109642] / [fdo#111068])
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6885/shard-iclb2/igt@kms_psr2_su@page_flip.html
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14392/shard-iclb5/igt@kms_psr2_su@page_flip.html

  * igt@kms_psr@no_drrs:
    - shard-iclb:         [PASS][21] -> [FAIL][22] ([fdo#108341])
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6885/shard-iclb3/igt@kms_psr@no_drrs.html
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14392/shard-iclb1/igt@kms_psr@no_drrs.html

  * igt@kms_psr@psr2_primary_page_flip:
    - shard-iclb:         [PASS][23] -> [SKIP][24] ([fdo#109441]) +1 similar issue
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6885/shard-iclb2/igt@kms_psr@psr2_primary_page_flip.html
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14392/shard-iclb6/igt@kms_psr@psr2_primary_page_flip.html

  
#### Possible fixes ####

  * igt@gem_eio@unwedge-stress:
    - shard-apl:          [INCOMPLETE][25] ([fdo#103927]) -> [PASS][26] +2 similar issues
   [25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6885/shard-apl5/igt@gem_eio@unwedge-stress.html
   [26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14392/shard-apl2/igt@gem_eio@unwedge-stress.html

  * igt@gem_exec_schedule@preempt-bsd:
    - shard-iclb:         [SKIP][27] ([fdo#111325]) -> [PASS][28] +4 similar issues
   [27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6885/shard-iclb1/igt@gem_exec_schedule@preempt-bsd.html
   [28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14392/shard-iclb6/igt@gem_exec_schedule@preempt-bsd.html

  * igt@i915_pm_rpm@system-suspend-execbuf:
    - shard-skl:          [INCOMPLETE][29] ([fdo#104108] / [fdo#107807]) -> [PASS][30]
   [29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6885/shard-skl7/igt@i915_pm_rpm@system-suspend-execbuf.html
   [30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14392/shard-skl10/igt@i915_pm_rpm@system-suspend-execbuf.html

  * igt@i915_suspend@sysfs-reader:
    - shard-apl:          [DMESG-WARN][31] ([fdo#108566]) -> [PASS][32] +3 similar issues
   [31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6885/shard-apl3/igt@i915_suspend@sysfs-reader.html
   [32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14392/shard-apl1/igt@i915_suspend@sysfs-reader.html

  * igt@kms_flip@flip-vs-expired-vblank:
    - shard-skl:          [FAIL][33] ([fdo#102887]) -> [PASS][34]
   [33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6885/shard-skl7/igt@kms_flip@flip-vs-expired-vblank.html
   [34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14392/shard-skl9/igt@kms_flip@flip-vs-expired-vblank.html

  * igt@kms_flip@flip-vs-expired-vblank-interruptible:
    - shard-skl:          [FAIL][35] ([fdo#105363]) -> [PASS][36]
   [35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6885/shard-skl3/igt@kms_flip@flip-vs-expired-vblank-interruptible.html
   [36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14392/shard-skl9/igt@kms_flip@flip-vs-expired-vblank-interruptible.html

  * igt@kms_flip@flip-vs-fences-interruptible:
    - shard-iclb:         [INCOMPLETE][37] ([fdo#107713]) -> [PASS][38] +1 similar issue
   [37]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6885/shard-iclb1/igt@kms_flip@flip-vs-fences-interruptible.html
   [38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14392/shard-iclb5/igt@kms_flip@flip-vs-fences-interruptible.html

  * igt@kms_flip@flip-vs-panning-interruptible:
    - shard-skl:          [DMESG-WARN][39] ([fdo#106107]) -> [PASS][40]
   [39]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6885/shard-skl1/igt@kms_flip@flip-vs-panning-interruptible.html
   [40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14392/shard-skl2/igt@kms_flip@flip-vs-panning-interruptible.html

  * igt@kms_flip@flip-vs-suspend-interruptible:
    - shard-skl:          [INCOMPLETE][41] ([fdo#109507]) -> [PASS][42]
   [41]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6885/shard-skl5/igt@kms_flip@flip-vs-suspend-interruptible.html
   [42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14392/shard-skl8/igt@kms_flip@flip-vs-suspend-interruptible.html

  * igt@kms_frontbuffer_tracking@fbc-rgb565-draw-pwrite:
    - shard-iclb:         [FAIL][43] ([fdo#103167]) -> [PASS][44] +8 similar issues
   [43]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6885/shard-iclb4/igt@kms_frontbuffer_tracking@fbc-rgb565-draw-pwrite.html
   [44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14392/shard-iclb8/igt@kms_frontbuffer_tracking@fbc-rgb565-draw-pwrite.html

  * igt@kms_plane_lowres@pipe-a-tiling-x:
    - shard-iclb:         [FAIL][45] ([fdo#103166]) -> [PASS][46]
   [45]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6885/shard-iclb4/igt@kms_plane_lowres@pipe-a-tiling-x.html
   [46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14392/shard-iclb6/igt@kms_plane_lowres@pipe-a-tiling-x.html

  * igt@kms_psr@psr2_cursor_blt:
    - shard-iclb:         [SKIP][47] ([fdo#109441]) -> [PASS][48] +2 similar issues
   [47]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6885/shard-iclb6/igt@kms_psr@psr2_cursor_blt.html
   [48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14392/shard-iclb2/igt@kms_psr@psr2_cursor_blt.html

  * igt@perf@polling:
    - shard-skl:          [FAIL][49] ([fdo#110728]) -> [PASS][50]
   [49]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6885/shard-skl1/igt@perf@polling.html
   [50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14392/shard-skl2/igt@perf@polling.html

  * igt@prime_busy@hang-bsd2:
    - shard-iclb:         [SKIP][51] ([fdo#109276]) -> [PASS][52] +15 similar issues
   [51]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6885/shard-iclb3/igt@prime_busy@hang-bsd2.html
   [52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14392/shard-iclb1/igt@prime_busy@hang-bsd2.html

  
#### Warnings ####

  * igt@gem_softpin@noreloc-s3:
    - shard-skl:          [INCOMPLETE][53] ([fdo#104108]) -> [INCOMPLETE][54] ([fdo#104108] / [fdo#107773])
   [53]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6885/shard-skl9/igt@gem_softpin@noreloc-s3.html
   [54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14392/shard-skl7/igt@gem_softpin@noreloc-s3.html

  
  [fdo#102887]: https://bugs.freedesktop.org/show_bug.cgi?id=102887
  [fdo#103166]: https://bugs.freedesktop.org/show_bug.cgi?id=103166
  [fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167
  [fdo#103540]: https://bugs.freedesktop.org/show_bug.cgi?id=103540
  [fdo#103927]: https://bugs.freedesktop.org/show_bug.cgi?id=103927
  [fdo#104108]: https://bugs.freedesktop.org/show_bug.cgi?id=104108
  [fdo#105363]: https://bugs.freedesktop.org/show_bug.cgi?id=105363
  [fdo#106107]: https://bugs.freedesktop.org/show_bug.cgi?id=106107
  [fdo#106885]: https://bugs.freedesktop.org/show_bug.cgi?id=106885
  [fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713
  [fdo#107773]: https://bugs.freedesktop.org/show_bug.cgi?id=107773
  [fdo#107807]: https://bugs.freedesktop.org/show_bug.cgi?id=107807
  [fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145
  [fdo#108341]: https://bugs.freedesktop.org/show_bug.cgi?id=108341
  [fdo#108566]: https://bugs.freedesktop.org/show_bug.cgi?id=108566
  [fdo#108686]: https://bugs.freedesktop.org/show_bug.cgi?id=108686
  [fdo#109276]: https://bugs.freedesktop.org/show_bug.cgi?id=109276
  [fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441
  [fdo#109507]: https://bugs.freedesktop.org/show_bug.cgi?id=109507
  [fdo#109642]: https://bugs.freedesktop.org/show_bug.cgi?id=109642
  [fdo#110403]: https://bugs.freedesktop.org/show_bug.cgi?id=110403
  [fdo#110728]: https://bugs.freedesktop.org/show_bug.cgi?id=110728
  [fdo#111068]: https://bugs.freedesktop.org/show_bug.cgi?id=111068
  [fdo#111325]: https://bugs.freedesktop.org/show_bug.cgi?id=111325


Participating hosts (10 -> 10)
------------------------------

  No changes in participating hosts


Build changes
-------------

  * CI: CI-20190529 -> None
  * Linux: CI_DRM_6885 -> Patchwork_14392

  CI-20190529: 20190529
  CI_DRM_6885: 11786d27cb029a083556ac9b82e33d74e250ce26 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_5178: efb4539494d94f03374874d3b61bd04ef3802aaa @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_14392: 20b421e03b990b969cc08ccac0ed9fd64bdf5e3f @ git://anongit.freedesktop.org/gfx-ci/linux
  piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14392/
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 9+ messages in thread

end of thread, other threads:[~2019-09-13 18:15 UTC | newest]

Thread overview: 9+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2019-09-10 22:46 [RFC] drm/i915/guc: Enable guc logging on guc log relay write Robert M. Fosha
2019-09-10 23:31 ` ✓ Fi.CI.BAT: success for " Patchwork
2019-09-11  0:48 ` [RFC] " Daniele Ceraolo Spurio
2019-09-11 21:28   ` Fosha, Robert M
2019-09-12 22:13     ` Daniele Ceraolo Spurio
2019-09-11  5:08 ` ✗ Fi.CI.IGT: failure for " Patchwork
2019-09-12 23:26 ` [RFC v2] " Robert M. Fosha
2019-09-13  0:28 ` ✓ Fi.CI.BAT: success for drm/i915/guc: Enable guc logging on guc log relay write (rev2) Patchwork
2019-09-13 18:15 ` ✓ Fi.CI.IGT: " Patchwork

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