* [PATCH] drm/i915/selftests: Exercise CS TLB invalidation @ 2019-09-15 16:37 Chris Wilson 2019-09-15 16:59 ` ✗ Fi.CI.CHECKPATCH: warning for " Patchwork ` (7 more replies) 0 siblings, 8 replies; 13+ messages in thread From: Chris Wilson @ 2019-09-15 16:37 UTC (permalink / raw) To: intel-gfx Check that we are correctly invalidating the TLB at the start of a batch after updating the GTT. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com> Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> --- drivers/gpu/drm/i915/selftests/i915_gem_gtt.c | 227 ++++++++++++++++++ 1 file changed, 227 insertions(+) diff --git a/drivers/gpu/drm/i915/selftests/i915_gem_gtt.c b/drivers/gpu/drm/i915/selftests/i915_gem_gtt.c index 598c18d10640..f8709b332bd7 100644 --- a/drivers/gpu/drm/i915/selftests/i915_gem_gtt.c +++ b/drivers/gpu/drm/i915/selftests/i915_gem_gtt.c @@ -25,13 +25,16 @@ #include <linux/list_sort.h> #include <linux/prime_numbers.h> +#include "gem/i915_gem_context.h" #include "gem/selftests/mock_context.h" +#include "gt/intel_context.h" #include "i915_random.h" #include "i915_selftest.h" #include "mock_drm.h" #include "mock_gem_device.h" +#include "igt_flush_test.h" static void cleanup_freed_objects(struct drm_i915_private *i915) { @@ -1705,6 +1708,229 @@ int i915_gem_gtt_mock_selftests(void) return err; } +static int context_sync(struct intel_context *ce) +{ + struct i915_request *rq; + long timeout; + + rq = intel_context_create_request(ce); + if (IS_ERR(rq)) + return PTR_ERR(rq); + + i915_request_get(rq); + i915_request_add(rq); + + timeout = i915_request_wait(rq, 0, HZ / 5); + i915_request_put(rq); + + return timeout < 0 ? -EIO : 0; +} + +static int submit_batch(struct intel_context *ce, u64 addr) +{ + struct i915_request *rq; + int err; + + rq = intel_context_create_request(ce); + if (IS_ERR(rq)) + return PTR_ERR(rq); + + err = 0; + if (rq->engine->emit_init_breadcrumb) /* detect a hang */ + err = rq->engine->emit_init_breadcrumb(rq); + if (err == 0) + err = rq->engine->emit_bb_start(rq, addr, 0, 0); + + i915_request_add(rq); + + return err; +} + +static int igt_cs_tlb(void *arg) +{ + const unsigned int count = PAGE_SIZE / 64; + const unsigned int chunk_size = count * PAGE_SIZE; + struct drm_i915_private *i915 = arg; + struct drm_i915_gem_object *bbe, *out; + struct i915_gem_engines_iter it; + struct i915_address_space *vm; + struct i915_gem_context *ctx; + struct intel_context *ce; + struct drm_file *file; + struct i915_vma *vma; + unsigned int i; + u32 *result; + u32 *batch; + int err = 0; + + file = mock_file(i915); + if (IS_ERR(file)) + return PTR_ERR(file); + + mutex_lock(&i915->drm.struct_mutex); + ctx = live_context(i915, file); + if (IS_ERR(ctx)) { + err = PTR_ERR(ctx); + goto out_unlock; + } + + vm = ctx->vm; + if (!vm) + goto out_unlock; + + bbe = i915_gem_object_create_internal(i915, PAGE_SIZE); + if (IS_ERR(bbe)) { + err = PTR_ERR(bbe); + goto out_unlock; + } + + batch = i915_gem_object_pin_map(bbe, I915_MAP_WC); + if (IS_ERR(batch)) { + err = PTR_ERR(batch); + goto out_bbe; + } + for (i = 0; i < count; i++) { + u32 *cs = batch + i * 64 / sizeof(*cs); + u64 addr = (vm->total - PAGE_SIZE) + i * sizeof(u32); + + GEM_BUG_ON(INTEL_GEN(i915) < 6); + cs[0] = MI_STORE_DWORD_IMM_GEN4; + if (INTEL_GEN(i915) >= 8) { + cs[1] = lower_32_bits(addr); + cs[2] = upper_32_bits(addr); + cs[3] = i; + cs[4] = MI_NOOP; + cs[5] = MI_BATCH_BUFFER_START_GEN8; + } else { + cs[1] = 0; + cs[2] = lower_32_bits(addr); + cs[3] = i; + cs[4] = MI_NOOP; + cs[5] = MI_BATCH_BUFFER_START; + } + } + + out = i915_gem_object_create_internal(i915, PAGE_SIZE); + if (IS_ERR(out)) { + err = PTR_ERR(out); + goto out_batch; + } + i915_gem_object_set_cache_coherency(out, I915_CACHING_CACHED); + + vma = i915_vma_instance(out, vm, NULL); + if (IS_ERR(vma)) { + err = PTR_ERR(vma); + goto out_batch; + } + + err = i915_vma_pin(vma, 0, 0, + PIN_USER | + PIN_OFFSET_FIXED | + (vm->total - PAGE_SIZE)); + if (err) + goto out_out; + GEM_BUG_ON(vma->node.start != vm->total - PAGE_SIZE); + + result = i915_gem_object_pin_map(out, I915_MAP_WB); + if (IS_ERR(result)) { + err = PTR_ERR(result); + goto out_out; + } + + for_each_gem_engine(ce, i915_gem_context_lock_engines(ctx), it) { + IGT_TIMEOUT(end_time); + unsigned long pass = 0; + + if (!intel_engine_can_store_dword(ce->engine)) + continue; + + while (!__igt_timeout(end_time, NULL)) { + u64 offset; + + offset = random_offset(0, vm->total - PAGE_SIZE, + chunk_size, PAGE_SIZE); + + err = vm->allocate_va_range(vm, offset, chunk_size); + if (err) + goto end; + + memset32(result, STACK_MAGIC, PAGE_SIZE / sizeof(u32)); + + vma = i915_vma_instance(bbe, vm, NULL); + if (IS_ERR(vma)) { + err = PTR_ERR(vma); + goto end; + } + + err = vma->ops->set_pages(vma); + if (err) + goto end; + + /* Replace the TLB with target batches */ + for (i = 0; i < count; i++) { + u32 *cs = batch + i * 64 / sizeof(*cs); + u64 addr; + + vma->node.start = offset + i * PAGE_SIZE; + vm->insert_entries(vm, vma, I915_CACHE_NONE, 0); + + addr = vma->node.start + i * 64; + cs[4] = MI_NOOP; + cs[6] = lower_32_bits(addr); + cs[7] = upper_32_bits(addr); + wmb(); + + err = submit_batch(ce, addr); + if (err) + goto end; + } + + yield(); + for (i = 0; i < count; i++) + batch[i * 64 / sizeof(*batch) + 4] = + MI_BATCH_BUFFER_END; + wmb(); + + vma->ops->clear_pages(vma); + + err = context_sync(ce); + if (err) { + pr_err("%s: writes timed out\n", + ce->engine->name); + goto end; + } + + for (i = 0; i < count; i++) { + if (result[i] != i) { + pr_err("%s: Write lost on pass %lu, at offset %llx, index %d, found %x, expected %x\n", + ce->engine->name, pass, + offset, i, result[i], i); + err = -EINVAL; + goto end; + } + } + + vm->clear_range(vm, offset, chunk_size); + pass++; + } + } +end: + if (igt_flush_test(i915, I915_WAIT_LOCKED)) + err = -EIO; + i915_gem_context_unlock_engines(ctx); + i915_gem_object_unpin_map(out); +out_out: + i915_gem_object_put(out); +out_batch: + i915_gem_object_unpin_map(bbe); +out_bbe: + i915_gem_object_put(bbe); +out_unlock: + mutex_unlock(&i915->drm.struct_mutex); + mock_file_free(i915, file); + return err; +} + int i915_gem_gtt_live_selftests(struct drm_i915_private *i915) { static const struct i915_subtest tests[] = { @@ -1722,6 +1948,7 @@ int i915_gem_gtt_live_selftests(struct drm_i915_private *i915) SUBTEST(igt_ggtt_pot), SUBTEST(igt_ggtt_fill), SUBTEST(igt_ggtt_page), + SUBTEST(igt_cs_tlb), }; GEM_BUG_ON(offset_in_page(i915->ggtt.vm.total)); -- 2.23.0 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply related [flat|nested] 13+ messages in thread
* ✗ Fi.CI.CHECKPATCH: warning for drm/i915/selftests: Exercise CS TLB invalidation 2019-09-15 16:37 [PATCH] drm/i915/selftests: Exercise CS TLB invalidation Chris Wilson @ 2019-09-15 16:59 ` Patchwork 2019-09-15 17:21 ` ✓ Fi.CI.BAT: success " Patchwork ` (6 subsequent siblings) 7 siblings, 0 replies; 13+ messages in thread From: Patchwork @ 2019-09-15 16:59 UTC (permalink / raw) To: Chris Wilson; +Cc: intel-gfx == Series Details == Series: drm/i915/selftests: Exercise CS TLB invalidation URL : https://patchwork.freedesktop.org/series/66718/ State : warning == Summary == $ dim checkpatch origin/drm-tip ec3adb8606d4 drm/i915/selftests: Exercise CS TLB invalidation -:208: WARNING:MEMORY_BARRIER: memory barrier without comment #208: FILE: drivers/gpu/drm/i915/selftests/i915_gem_gtt.c:1881: + wmb(); -:215: WARNING:YIELD: Using yield() is generally wrong. See yield() kernel-doc (sched/core.c) #215: FILE: drivers/gpu/drm/i915/selftests/i915_gem_gtt.c:1888: + yield(); -:219: WARNING:MEMORY_BARRIER: memory barrier without comment #219: FILE: drivers/gpu/drm/i915/selftests/i915_gem_gtt.c:1892: + wmb(); total: 0 errors, 3 warnings, 0 checks, 252 lines checked _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 13+ messages in thread
* ✓ Fi.CI.BAT: success for drm/i915/selftests: Exercise CS TLB invalidation 2019-09-15 16:37 [PATCH] drm/i915/selftests: Exercise CS TLB invalidation Chris Wilson 2019-09-15 16:59 ` ✗ Fi.CI.CHECKPATCH: warning for " Patchwork @ 2019-09-15 17:21 ` Patchwork 2019-09-16 8:42 ` ✓ Fi.CI.IGT: " Patchwork ` (5 subsequent siblings) 7 siblings, 0 replies; 13+ messages in thread From: Patchwork @ 2019-09-15 17:21 UTC (permalink / raw) To: Chris Wilson; +Cc: intel-gfx == Series Details == Series: drm/i915/selftests: Exercise CS TLB invalidation URL : https://patchwork.freedesktop.org/series/66718/ State : success == Summary == CI Bug Log - changes from CI_DRM_6896 -> Patchwork_14414 ==================================================== Summary ------- **SUCCESS** No regressions found. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14414/ Possible new issues ------------------- Here are the unknown changes that may have been introduced in Patchwork_14414: ### IGT changes ### #### Suppressed #### The following results come from untrusted machines, tests, or statuses. They do not affect the overall result. * igt@i915_selftest@live_gtt: - {fi-tgl-u}: [PASS][1] -> [DMESG-FAIL][2] [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6896/fi-tgl-u/igt@i915_selftest@live_gtt.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14414/fi-tgl-u/igt@i915_selftest@live_gtt.html - {fi-tgl-u2}: [PASS][3] -> [DMESG-FAIL][4] [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6896/fi-tgl-u2/igt@i915_selftest@live_gtt.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14414/fi-tgl-u2/igt@i915_selftest@live_gtt.html Known issues ------------ Here are the changes found in Patchwork_14414 that come from known issues: ### IGT changes ### #### Issues hit #### * igt@gem_flink_basic@bad-flink: - fi-icl-u3: [PASS][5] -> [DMESG-WARN][6] ([fdo#107724]) +1 similar issue [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6896/fi-icl-u3/igt@gem_flink_basic@bad-flink.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14414/fi-icl-u3/igt@gem_flink_basic@bad-flink.html * igt@kms_frontbuffer_tracking@basic: - fi-icl-u2: [PASS][7] -> [FAIL][8] ([fdo#103167]) [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6896/fi-icl-u2/igt@kms_frontbuffer_tracking@basic.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14414/fi-icl-u2/igt@kms_frontbuffer_tracking@basic.html #### Possible fixes #### * igt@gem_exec_fence@nb-await-default: - {fi-tgl-u2}: [FAIL][9] ([fdo#111562] / [fdo#111597]) -> [PASS][10] [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6896/fi-tgl-u2/igt@gem_exec_fence@nb-await-default.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14414/fi-tgl-u2/igt@gem_exec_fence@nb-await-default.html * igt@prime_vgem@basic-fence-flip: - fi-icl-u3: [DMESG-WARN][11] ([fdo#107724]) -> [PASS][12] [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6896/fi-icl-u3/igt@prime_vgem@basic-fence-flip.html [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14414/fi-icl-u3/igt@prime_vgem@basic-fence-flip.html {name}: This element is suppressed. This means it is ignored when computing the status of the difference (SUCCESS, WARNING, or FAILURE). [fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167 [fdo#107724]: https://bugs.freedesktop.org/show_bug.cgi?id=107724 [fdo#111562]: https://bugs.freedesktop.org/show_bug.cgi?id=111562 [fdo#111597]: https://bugs.freedesktop.org/show_bug.cgi?id=111597 Participating hosts (52 -> 45) ------------------------------ Missing (7): fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-icl-y fi-byt-clapper fi-bdw-samus Build changes ------------- * CI: CI-20190529 -> None * Linux: CI_DRM_6896 -> Patchwork_14414 CI-20190529: 20190529 CI_DRM_6896: 666925d1b342cca839902dd418eea383e69f373e @ git://anongit.freedesktop.org/gfx-ci/linux IGT_5183: 6ddc1a143495baa68dbc909f2a8819ec03c31c8e @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_14414: ec3adb8606d48fd19de69e7ba01659115a97b654 @ git://anongit.freedesktop.org/gfx-ci/linux == Linux commits == ec3adb8606d4 drm/i915/selftests: Exercise CS TLB invalidation == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14414/index.html _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 13+ messages in thread
* ✓ Fi.CI.IGT: success for drm/i915/selftests: Exercise CS TLB invalidation 2019-09-15 16:37 [PATCH] drm/i915/selftests: Exercise CS TLB invalidation Chris Wilson 2019-09-15 16:59 ` ✗ Fi.CI.CHECKPATCH: warning for " Patchwork 2019-09-15 17:21 ` ✓ Fi.CI.BAT: success " Patchwork @ 2019-09-16 8:42 ` Patchwork 2019-09-19 12:57 ` [PATCH] " Mika Kuoppala ` (4 subsequent siblings) 7 siblings, 0 replies; 13+ messages in thread From: Patchwork @ 2019-09-16 8:42 UTC (permalink / raw) To: Chris Wilson; +Cc: intel-gfx == Series Details == Series: drm/i915/selftests: Exercise CS TLB invalidation URL : https://patchwork.freedesktop.org/series/66718/ State : success == Summary == CI Bug Log - changes from CI_DRM_6896_full -> Patchwork_14414_full ==================================================== Summary ------- **SUCCESS** No regressions found. Known issues ------------ Here are the changes found in Patchwork_14414_full that come from known issues: ### IGT changes ### #### Issues hit #### * igt@gem_ctx_isolation@rcs0-s3: - shard-apl: [PASS][1] -> [DMESG-WARN][2] ([fdo#108566]) +3 similar issues [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6896/shard-apl6/igt@gem_ctx_isolation@rcs0-s3.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14414/shard-apl1/igt@gem_ctx_isolation@rcs0-s3.html * igt@gem_eio@in-flight-immediate: - shard-glk: [PASS][3] -> [FAIL][4] ([fdo#105957]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6896/shard-glk1/igt@gem_eio@in-flight-immediate.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14414/shard-glk8/igt@gem_eio@in-flight-immediate.html * igt@gem_exec_parallel@basic: - shard-iclb: [PASS][5] -> [INCOMPLETE][6] ([fdo#107713]) [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6896/shard-iclb5/igt@gem_exec_parallel@basic.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14414/shard-iclb7/igt@gem_exec_parallel@basic.html * igt@gem_exec_schedule@fifo-bsd: - shard-iclb: [PASS][7] -> [SKIP][8] ([fdo#111325]) +6 similar issues [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6896/shard-iclb6/igt@gem_exec_schedule@fifo-bsd.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14414/shard-iclb1/igt@gem_exec_schedule@fifo-bsd.html * igt@gem_exec_schedule@preempt-other-bsd1: - shard-iclb: [PASS][9] -> [SKIP][10] ([fdo#109276]) +23 similar issues [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6896/shard-iclb1/igt@gem_exec_schedule@preempt-other-bsd1.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14414/shard-iclb7/igt@gem_exec_schedule@preempt-other-bsd1.html * igt@kms_color@pipe-a-ctm-green-to-red: - shard-skl: [PASS][11] -> [FAIL][12] ([fdo#107201]) [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6896/shard-skl10/igt@kms_color@pipe-a-ctm-green-to-red.html [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14414/shard-skl2/igt@kms_color@pipe-a-ctm-green-to-red.html * igt@kms_cursor_crc@pipe-c-cursor-alpha-opaque: - shard-skl: [PASS][13] -> [FAIL][14] ([fdo#103232]) [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6896/shard-skl1/igt@kms_cursor_crc@pipe-c-cursor-alpha-opaque.html [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14414/shard-skl4/igt@kms_cursor_crc@pipe-c-cursor-alpha-opaque.html * igt@kms_cursor_legacy@2x-long-cursor-vs-flip-atomic: - shard-hsw: [PASS][15] -> [FAIL][16] ([fdo#105767]) [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6896/shard-hsw8/igt@kms_cursor_legacy@2x-long-cursor-vs-flip-atomic.html [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14414/shard-hsw4/igt@kms_cursor_legacy@2x-long-cursor-vs-flip-atomic.html * igt@kms_cursor_legacy@pipe-a-forked-bo: - shard-apl: [PASS][17] -> [INCOMPLETE][18] ([fdo#103927]) +2 similar issues [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6896/shard-apl2/igt@kms_cursor_legacy@pipe-a-forked-bo.html [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14414/shard-apl1/igt@kms_cursor_legacy@pipe-a-forked-bo.html * igt@kms_frontbuffer_tracking@fbcpsr-1p-offscren-pri-shrfb-draw-pwrite: - shard-iclb: [PASS][19] -> [FAIL][20] ([fdo#103167]) +4 similar issues [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6896/shard-iclb4/igt@kms_frontbuffer_tracking@fbcpsr-1p-offscren-pri-shrfb-draw-pwrite.html [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14414/shard-iclb3/igt@kms_frontbuffer_tracking@fbcpsr-1p-offscren-pri-shrfb-draw-pwrite.html * igt@kms_frontbuffer_tracking@fbcpsr-1p-rte: - shard-iclb: [PASS][21] -> [FAIL][22] ([fdo#103167] / [fdo#110378]) [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6896/shard-iclb2/igt@kms_frontbuffer_tracking@fbcpsr-1p-rte.html [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14414/shard-iclb7/igt@kms_frontbuffer_tracking@fbcpsr-1p-rte.html * igt@kms_plane_alpha_blend@pipe-c-constant-alpha-min: - shard-skl: [PASS][23] -> [FAIL][24] ([fdo#108145]) [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6896/shard-skl1/igt@kms_plane_alpha_blend@pipe-c-constant-alpha-min.html [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14414/shard-skl4/igt@kms_plane_alpha_blend@pipe-c-constant-alpha-min.html * igt@kms_plane_lowres@pipe-a-tiling-y: - shard-iclb: [PASS][25] -> [FAIL][26] ([fdo#103166]) [25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6896/shard-iclb3/igt@kms_plane_lowres@pipe-a-tiling-y.html [26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14414/shard-iclb7/igt@kms_plane_lowres@pipe-a-tiling-y.html * igt@kms_psr2_su@page_flip: - shard-iclb: [PASS][27] -> [SKIP][28] ([fdo#109642] / [fdo#111068]) [27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6896/shard-iclb2/igt@kms_psr2_su@page_flip.html [28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14414/shard-iclb7/igt@kms_psr2_su@page_flip.html * igt@kms_psr@psr2_cursor_plane_onoff: - shard-iclb: [PASS][29] -> [SKIP][30] ([fdo#109441]) +2 similar issues [29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6896/shard-iclb2/igt@kms_psr@psr2_cursor_plane_onoff.html [30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14414/shard-iclb6/igt@kms_psr@psr2_cursor_plane_onoff.html * igt@tools_test@tools_test: - shard-hsw: [PASS][31] -> [SKIP][32] ([fdo#109271]) [31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6896/shard-hsw1/igt@tools_test@tools_test.html [32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14414/shard-hsw5/igt@tools_test@tools_test.html #### Possible fixes #### * igt@gem_ctx_shared@exec-single-timeline-bsd: - shard-iclb: [SKIP][33] ([fdo#110841]) -> [PASS][34] [33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6896/shard-iclb4/igt@gem_ctx_shared@exec-single-timeline-bsd.html [34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14414/shard-iclb3/igt@gem_ctx_shared@exec-single-timeline-bsd.html * igt@gem_exec_schedule@deep-bsd: - shard-iclb: [SKIP][35] ([fdo#111325]) -> [PASS][36] +8 similar issues [35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6896/shard-iclb2/igt@gem_exec_schedule@deep-bsd.html [36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14414/shard-iclb8/igt@gem_exec_schedule@deep-bsd.html * igt@gem_exec_schedule@independent-bsd1: - shard-iclb: [SKIP][37] ([fdo#109276]) -> [PASS][38] +20 similar issues [37]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6896/shard-iclb3/igt@gem_exec_schedule@independent-bsd1.html [38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14414/shard-iclb2/igt@gem_exec_schedule@independent-bsd1.html * igt@i915_selftest@live_gem_contexts: - shard-hsw: [DMESG-FAIL][39] -> [PASS][40] [39]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6896/shard-hsw6/igt@i915_selftest@live_gem_contexts.html [40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14414/shard-hsw6/igt@i915_selftest@live_gem_contexts.html * igt@i915_suspend@debugfs-reader: - shard-apl: [DMESG-WARN][41] ([fdo#108566]) -> [PASS][42] +1 similar issue [41]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6896/shard-apl6/igt@i915_suspend@debugfs-reader.html [42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14414/shard-apl6/igt@i915_suspend@debugfs-reader.html * igt@kms_draw_crc@draw-method-xrgb8888-mmap-cpu-ytiled: - shard-iclb: [FAIL][43] ([fdo#103184] / [fdo#103232]) -> [PASS][44] [43]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6896/shard-iclb7/igt@kms_draw_crc@draw-method-xrgb8888-mmap-cpu-ytiled.html [44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14414/shard-iclb6/igt@kms_draw_crc@draw-method-xrgb8888-mmap-cpu-ytiled.html * igt@kms_flip@2x-flip-vs-expired-vblank-interruptible: - shard-glk: [FAIL][45] ([fdo#105363]) -> [PASS][46] [45]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6896/shard-glk3/igt@kms_flip@2x-flip-vs-expired-vblank-interruptible.html [46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14414/shard-glk6/igt@kms_flip@2x-flip-vs-expired-vblank-interruptible.html * igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-shrfb-draw-pwrite: - shard-iclb: [FAIL][47] ([fdo#103167]) -> [PASS][48] +3 similar issues [47]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6896/shard-iclb6/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-shrfb-draw-pwrite.html [48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14414/shard-iclb4/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-shrfb-draw-pwrite.html * igt@kms_frontbuffer_tracking@psr-1p-primscrn-spr-indfb-draw-mmap-gtt: - shard-iclb: [INCOMPLETE][49] ([fdo#106978] / [fdo#107713]) -> [PASS][50] [49]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6896/shard-iclb7/igt@kms_frontbuffer_tracking@psr-1p-primscrn-spr-indfb-draw-mmap-gtt.html [50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14414/shard-iclb4/igt@kms_frontbuffer_tracking@psr-1p-primscrn-spr-indfb-draw-mmap-gtt.html * igt@kms_plane_alpha_blend@pipe-b-constant-alpha-min: - shard-skl: [FAIL][51] ([fdo#108145]) -> [PASS][52] [51]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6896/shard-skl1/igt@kms_plane_alpha_blend@pipe-b-constant-alpha-min.html [52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14414/shard-skl6/igt@kms_plane_alpha_blend@pipe-b-constant-alpha-min.html * igt@kms_psr@psr2_primary_page_flip: - shard-iclb: [SKIP][53] ([fdo#109441]) -> [PASS][54] +3 similar issues [53]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6896/shard-iclb8/igt@kms_psr@psr2_primary_page_flip.html [54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14414/shard-iclb2/igt@kms_psr@psr2_primary_page_flip.html * igt@kms_setmode@basic: - shard-apl: [FAIL][55] ([fdo#99912]) -> [PASS][56] [55]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6896/shard-apl8/igt@kms_setmode@basic.html [56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14414/shard-apl1/igt@kms_setmode@basic.html * igt@perf@blocking: - shard-skl: [FAIL][57] ([fdo#110728]) -> [PASS][58] [57]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6896/shard-skl9/igt@perf@blocking.html [58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14414/shard-skl10/igt@perf@blocking.html * igt@perf_pmu@busy-no-semaphores-bcs0: - shard-hsw: [DMESG-WARN][59] -> [PASS][60] [59]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6896/shard-hsw6/igt@perf_pmu@busy-no-semaphores-bcs0.html [60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14414/shard-hsw8/igt@perf_pmu@busy-no-semaphores-bcs0.html #### Warnings #### * igt@gem_ctx_isolation@vcs1-nonpriv: - shard-iclb: [SKIP][61] ([fdo#109276]) -> [FAIL][62] ([fdo#111329]) [61]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6896/shard-iclb5/igt@gem_ctx_isolation@vcs1-nonpriv.html [62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14414/shard-iclb2/igt@gem_ctx_isolation@vcs1-nonpriv.html * igt@gem_mocs_settings@mocs-isolation-bsd2: - shard-iclb: [FAIL][63] ([fdo#111330]) -> [SKIP][64] ([fdo#109276]) [63]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6896/shard-iclb2/igt@gem_mocs_settings@mocs-isolation-bsd2.html [64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14414/shard-iclb7/igt@gem_mocs_settings@mocs-isolation-bsd2.html * igt@gem_mocs_settings@mocs-reset-bsd2: - shard-iclb: [SKIP][65] ([fdo#109276]) -> [FAIL][66] ([fdo#111330]) +1 similar issue [65]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6896/shard-iclb3/igt@gem_mocs_settings@mocs-reset-bsd2.html [66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14414/shard-iclb1/igt@gem_mocs_settings@mocs-reset-bsd2.html [fdo#103166]: https://bugs.freedesktop.org/show_bug.cgi?id=103166 [fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167 [fdo#103184]: https://bugs.freedesktop.org/show_bug.cgi?id=103184 [fdo#103232]: https://bugs.freedesktop.org/show_bug.cgi?id=103232 [fdo#103927]: https://bugs.freedesktop.org/show_bug.cgi?id=103927 [fdo#105363]: https://bugs.freedesktop.org/show_bug.cgi?id=105363 [fdo#105767]: https://bugs.freedesktop.org/show_bug.cgi?id=105767 [fdo#105957]: https://bugs.freedesktop.org/show_bug.cgi?id=105957 [fdo#106978]: https://bugs.freedesktop.org/show_bug.cgi?id=106978 [fdo#107201]: https://bugs.freedesktop.org/show_bug.cgi?id=107201 [fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713 [fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145 [fdo#108566]: https://bugs.freedesktop.org/show_bug.cgi?id=108566 [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271 [fdo#109276]: https://bugs.freedesktop.org/show_bug.cgi?id=109276 [fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441 [fdo#109642]: https://bugs.freedesktop.org/show_bug.cgi?id=109642 [fdo#110378]: https://bugs.freedesktop.org/show_bug.cgi?id=110378 [fdo#110728]: https://bugs.freedesktop.org/show_bug.cgi?id=110728 [fdo#110841]: https://bugs.freedesktop.org/show_bug.cgi?id=110841 [fdo#111068]: https://bugs.freedesktop.org/show_bug.cgi?id=111068 [fdo#111325]: https://bugs.freedesktop.org/show_bug.cgi?id=111325 [fdo#111329]: https://bugs.freedesktop.org/show_bug.cgi?id=111329 [fdo#111330]: https://bugs.freedesktop.org/show_bug.cgi?id=111330 [fdo#99912]: https://bugs.freedesktop.org/show_bug.cgi?id=99912 Participating hosts (9 -> 9) ------------------------------ No changes in participating hosts Build changes ------------- * CI: CI-20190529 -> None * Linux: CI_DRM_6896 -> Patchwork_14414 CI-20190529: 20190529 CI_DRM_6896: 666925d1b342cca839902dd418eea383e69f373e @ git://anongit.freedesktop.org/gfx-ci/linux IGT_5183: 6ddc1a143495baa68dbc909f2a8819ec03c31c8e @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_14414: ec3adb8606d48fd19de69e7ba01659115a97b654 @ git://anongit.freedesktop.org/gfx-ci/linux piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14414/ _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [PATCH] drm/i915/selftests: Exercise CS TLB invalidation 2019-09-15 16:37 [PATCH] drm/i915/selftests: Exercise CS TLB invalidation Chris Wilson ` (2 preceding siblings ...) 2019-09-16 8:42 ` ✓ Fi.CI.IGT: " Patchwork @ 2019-09-19 12:57 ` Mika Kuoppala 2019-09-19 13:08 ` Chris Wilson 2019-09-19 13:14 ` [PATCH v2] " Chris Wilson ` (3 subsequent siblings) 7 siblings, 1 reply; 13+ messages in thread From: Mika Kuoppala @ 2019-09-19 12:57 UTC (permalink / raw) To: Chris Wilson, intel-gfx Chris Wilson <chris@chris-wilson.co.uk> writes: > Check that we are correctly invalidating the TLB at the start of a > batch after updating the GTT. > > Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> > Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com> > Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> > --- > drivers/gpu/drm/i915/selftests/i915_gem_gtt.c | 227 ++++++++++++++++++ > 1 file changed, 227 insertions(+) > > diff --git a/drivers/gpu/drm/i915/selftests/i915_gem_gtt.c b/drivers/gpu/drm/i915/selftests/i915_gem_gtt.c > index 598c18d10640..f8709b332bd7 100644 > --- a/drivers/gpu/drm/i915/selftests/i915_gem_gtt.c > +++ b/drivers/gpu/drm/i915/selftests/i915_gem_gtt.c > @@ -25,13 +25,16 @@ > #include <linux/list_sort.h> > #include <linux/prime_numbers.h> > > +#include "gem/i915_gem_context.h" > #include "gem/selftests/mock_context.h" > +#include "gt/intel_context.h" > > #include "i915_random.h" > #include "i915_selftest.h" > > #include "mock_drm.h" > #include "mock_gem_device.h" > +#include "igt_flush_test.h" > > static void cleanup_freed_objects(struct drm_i915_private *i915) > { > @@ -1705,6 +1708,229 @@ int i915_gem_gtt_mock_selftests(void) > return err; > } > > +static int context_sync(struct intel_context *ce) > +{ > + struct i915_request *rq; > + long timeout; > + > + rq = intel_context_create_request(ce); > + if (IS_ERR(rq)) > + return PTR_ERR(rq); > + > + i915_request_get(rq); > + i915_request_add(rq); > + > + timeout = i915_request_wait(rq, 0, HZ / 5); > + i915_request_put(rq); > + > + return timeout < 0 ? -EIO : 0; > +} > + > +static int submit_batch(struct intel_context *ce, u64 addr) > +{ > + struct i915_request *rq; > + int err; > + > + rq = intel_context_create_request(ce); > + if (IS_ERR(rq)) > + return PTR_ERR(rq); > + > + err = 0; > + if (rq->engine->emit_init_breadcrumb) /* detect a hang */ for seqno write? > + err = rq->engine->emit_init_breadcrumb(rq); > + if (err == 0) > + err = rq->engine->emit_bb_start(rq, addr, 0, 0); > + In context_sync part we grabbed a reference. In here we don't. I don't see how we can get away without it even if we don't wait in here. > + i915_request_add(rq); > + > + return err; > +} > + > +static int igt_cs_tlb(void *arg) > +{ > + const unsigned int count = PAGE_SIZE / 64; > + const unsigned int chunk_size = count * PAGE_SIZE; > + struct drm_i915_private *i915 = arg; > + struct drm_i915_gem_object *bbe, *out; > + struct i915_gem_engines_iter it; > + struct i915_address_space *vm; > + struct i915_gem_context *ctx; > + struct intel_context *ce; > + struct drm_file *file; > + struct i915_vma *vma; > + unsigned int i; > + u32 *result; > + u32 *batch; > + int err = 0; > + > + file = mock_file(i915); > + if (IS_ERR(file)) > + return PTR_ERR(file); > + > + mutex_lock(&i915->drm.struct_mutex); > + ctx = live_context(i915, file); > + if (IS_ERR(ctx)) { > + err = PTR_ERR(ctx); > + goto out_unlock; > + } > + > + vm = ctx->vm; > + if (!vm) > + goto out_unlock; > + > + bbe = i915_gem_object_create_internal(i915, PAGE_SIZE); > + if (IS_ERR(bbe)) { > + err = PTR_ERR(bbe); > + goto out_unlock; > + } > + > + batch = i915_gem_object_pin_map(bbe, I915_MAP_WC); > + if (IS_ERR(batch)) { > + err = PTR_ERR(batch); > + goto out_bbe; > + } > + for (i = 0; i < count; i++) { > + u32 *cs = batch + i * 64 / sizeof(*cs); > + u64 addr = (vm->total - PAGE_SIZE) + i * sizeof(u32); > + > + GEM_BUG_ON(INTEL_GEN(i915) < 6); > + cs[0] = MI_STORE_DWORD_IMM_GEN4; > + if (INTEL_GEN(i915) >= 8) { > + cs[1] = lower_32_bits(addr); > + cs[2] = upper_32_bits(addr); > + cs[3] = i; > + cs[4] = MI_NOOP; > + cs[5] = MI_BATCH_BUFFER_START_GEN8; > + } else { > + cs[1] = 0; > + cs[2] = lower_32_bits(addr); > + cs[3] = i; > + cs[4] = MI_NOOP; > + cs[5] = MI_BATCH_BUFFER_START; > + } > + } > + > + out = i915_gem_object_create_internal(i915, PAGE_SIZE); > + if (IS_ERR(out)) { > + err = PTR_ERR(out); > + goto out_batch; > + } > + i915_gem_object_set_cache_coherency(out, I915_CACHING_CACHED); > + > + vma = i915_vma_instance(out, vm, NULL); > + if (IS_ERR(vma)) { > + err = PTR_ERR(vma); > + goto out_batch; > + } > + > + err = i915_vma_pin(vma, 0, 0, > + PIN_USER | > + PIN_OFFSET_FIXED | > + (vm->total - PAGE_SIZE)); > + if (err) > + goto out_out; out_put? Oh and we don't have to do anything with the instance on error paths? > + GEM_BUG_ON(vma->node.start != vm->total - PAGE_SIZE); > + > + result = i915_gem_object_pin_map(out, I915_MAP_WB); > + if (IS_ERR(result)) { > + err = PTR_ERR(result); > + goto out_out; > + } > + > + for_each_gem_engine(ce, i915_gem_context_lock_engines(ctx), it) { > + IGT_TIMEOUT(end_time); > + unsigned long pass = 0; > + > + if (!intel_engine_can_store_dword(ce->engine)) > + continue; > + > + while (!__igt_timeout(end_time, NULL)) { > + u64 offset; > + > + offset = random_offset(0, vm->total - PAGE_SIZE, > + chunk_size, PAGE_SIZE); > + > + err = vm->allocate_va_range(vm, offset, chunk_size); > + if (err) > + goto end; > + > + memset32(result, STACK_MAGIC, PAGE_SIZE / sizeof(u32)); > + > + vma = i915_vma_instance(bbe, vm, NULL); > + if (IS_ERR(vma)) { > + err = PTR_ERR(vma); > + goto end; > + } > + > + err = vma->ops->set_pages(vma); > + if (err) > + goto end; > + > + /* Replace the TLB with target batches */ > + for (i = 0; i < count; i++) { > + u32 *cs = batch + i * 64 / sizeof(*cs); > + u64 addr; > + > + vma->node.start = offset + i * PAGE_SIZE; on previous loop, we have now primed the pte to tlb in here? > + vm->insert_entries(vm, vma, I915_CACHE_NONE, 0); ..now changing in it here... > + > + addr = vma->node.start + i * 64; > + cs[4] = MI_NOOP; > + cs[6] = lower_32_bits(addr); > + cs[7] = upper_32_bits(addr); > + wmb(); > + > + err = submit_batch(ce, addr); in hope that with this submission hardware will see the old one and completely miss the store+bb start? Perhaps rewiring a more dummy emit only to prove this case is pushing it. But I am curious to know if you did try it out by removing the invalidate on the emits and managed to bring out the missing writes? -Mika > + if (err) > + goto end; > + } > + > + yield(); > + for (i = 0; i < count; i++) > + batch[i * 64 / sizeof(*batch) + 4] = > + MI_BATCH_BUFFER_END; > + wmb(); > + > + vma->ops->clear_pages(vma); > + > + err = context_sync(ce); > + if (err) { > + pr_err("%s: writes timed out\n", > + ce->engine->name); > + goto end; > + } > + > + for (i = 0; i < count; i++) { > + if (result[i] != i) { > + pr_err("%s: Write lost on pass %lu, at offset %llx, index %d, found %x, expected %x\n", > + ce->engine->name, pass, > + offset, i, result[i], i); > + err = -EINVAL; > + goto end; > + } > + } > + > + vm->clear_range(vm, offset, chunk_size); > + pass++; > + } > + } > +end: > + if (igt_flush_test(i915, I915_WAIT_LOCKED)) > + err = -EIO; > + i915_gem_context_unlock_engines(ctx); > + i915_gem_object_unpin_map(out); > +out_out: > + i915_gem_object_put(out); > +out_batch: > + i915_gem_object_unpin_map(bbe); > +out_bbe: > + i915_gem_object_put(bbe); > +out_unlock: > + mutex_unlock(&i915->drm.struct_mutex); > + mock_file_free(i915, file); > + return err; > +} > + > int i915_gem_gtt_live_selftests(struct drm_i915_private *i915) > { > static const struct i915_subtest tests[] = { > @@ -1722,6 +1948,7 @@ int i915_gem_gtt_live_selftests(struct drm_i915_private *i915) > SUBTEST(igt_ggtt_pot), > SUBTEST(igt_ggtt_fill), > SUBTEST(igt_ggtt_page), > + SUBTEST(igt_cs_tlb), > }; > > GEM_BUG_ON(offset_in_page(i915->ggtt.vm.total)); > -- > 2.23.0 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [PATCH] drm/i915/selftests: Exercise CS TLB invalidation 2019-09-19 12:57 ` [PATCH] " Mika Kuoppala @ 2019-09-19 13:08 ` Chris Wilson 2019-09-19 13:39 ` Mika Kuoppala 0 siblings, 1 reply; 13+ messages in thread From: Chris Wilson @ 2019-09-19 13:08 UTC (permalink / raw) To: Mika Kuoppala, intel-gfx Quoting Mika Kuoppala (2019-09-19 13:57:45) > Chris Wilson <chris@chris-wilson.co.uk> writes: > > > Check that we are correctly invalidating the TLB at the start of a > > batch after updating the GTT. > > > > Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> > > Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com> > > Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> > > --- > > drivers/gpu/drm/i915/selftests/i915_gem_gtt.c | 227 ++++++++++++++++++ > > 1 file changed, 227 insertions(+) > > > > diff --git a/drivers/gpu/drm/i915/selftests/i915_gem_gtt.c b/drivers/gpu/drm/i915/selftests/i915_gem_gtt.c > > index 598c18d10640..f8709b332bd7 100644 > > --- a/drivers/gpu/drm/i915/selftests/i915_gem_gtt.c > > +++ b/drivers/gpu/drm/i915/selftests/i915_gem_gtt.c > > @@ -25,13 +25,16 @@ > > #include <linux/list_sort.h> > > #include <linux/prime_numbers.h> > > > > +#include "gem/i915_gem_context.h" > > #include "gem/selftests/mock_context.h" > > +#include "gt/intel_context.h" > > > > #include "i915_random.h" > > #include "i915_selftest.h" > > > > #include "mock_drm.h" > > #include "mock_gem_device.h" > > +#include "igt_flush_test.h" > > > > static void cleanup_freed_objects(struct drm_i915_private *i915) > > { > > @@ -1705,6 +1708,229 @@ int i915_gem_gtt_mock_selftests(void) > > return err; > > } > > > > +static int context_sync(struct intel_context *ce) > > +{ > > + struct i915_request *rq; > > + long timeout; > > + > > + rq = intel_context_create_request(ce); > > + if (IS_ERR(rq)) > > + return PTR_ERR(rq); > > + > > + i915_request_get(rq); > > + i915_request_add(rq); > > + > > + timeout = i915_request_wait(rq, 0, HZ / 5); > > + i915_request_put(rq); > > + > > + return timeout < 0 ? -EIO : 0; > > +} > > + > > +static int submit_batch(struct intel_context *ce, u64 addr) > > +{ > > + struct i915_request *rq; > > + int err; > > + > > + rq = intel_context_create_request(ce); > > + if (IS_ERR(rq)) > > + return PTR_ERR(rq); > > + > > + err = 0; > > + if (rq->engine->emit_init_breadcrumb) /* detect a hang */ > > for seqno write? If we expect an initial breadcrumb, we use it during reset to identify if we are inside a payload (as opposed to being inside the semaphore wait). So we need to emit the breadcrumb if we may hang in our batch. > > + err = rq->engine->emit_init_breadcrumb(rq); > > + if (err == 0) > > + err = rq->engine->emit_bb_start(rq, addr, 0, 0); > > + > > In context_sync part we grabbed a reference. In here we > don't. I don't see how we can get away without it even > if we don't wait in here. Hmm, I suppose you can argue that we do now have a later deref in the spinner. That wasn't there before... > > + vma = i915_vma_instance(out, vm, NULL); > > + if (IS_ERR(vma)) { > > + err = PTR_ERR(vma); > > + goto out_batch; > > + } > > + > > + err = i915_vma_pin(vma, 0, 0, > > + PIN_USER | > > + PIN_OFFSET_FIXED | > > + (vm->total - PAGE_SIZE)); > > + if (err) > > + goto out_out; > > out_put? Joonas likes out: for normal exit paths that double for error handling. > Oh and we don't have to do anything with the instance on > error paths? No. The vma does not yet have an independent lifetime from the object (they are all owned by objects currently). > > + /* Replace the TLB with target batches */ > > + for (i = 0; i < count; i++) { > > + u32 *cs = batch + i * 64 / sizeof(*cs); > > + u64 addr; > > + > > + vma->node.start = offset + i * PAGE_SIZE; > > on previous loop, we have now primed the pte to tlb in here? We're using the same PTE as before, in the expectation that the TLB still contains that lookup. > > + vm->insert_entries(vm, vma, I915_CACHE_NONE, 0); > > ..now changing in it here... > > > + > > + addr = vma->node.start + i * 64; > > + cs[4] = MI_NOOP; > > + cs[6] = lower_32_bits(addr); > > + cs[7] = upper_32_bits(addr); > > + wmb(); > > + > > + err = submit_batch(ce, addr); > > in hope that with this submission hardware will see the old one and > completely miss the store+bb start? The hope is we see the right page of course! The test is to detect when it sees the old page instead. > Perhaps rewiring a more dummy emit only to prove this case > is pushing it. > > But I am curious to know if you did try it out by removing > the invalidate on the emits and managed to bring > out the missing writes? We can demonstrate it on Tigerlake :) Indeed it detects the remove of MI_INVALIDATE_TLB elsewhere. -Chris _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [PATCH] drm/i915/selftests: Exercise CS TLB invalidation 2019-09-19 13:08 ` Chris Wilson @ 2019-09-19 13:39 ` Mika Kuoppala 2019-09-19 13:46 ` Chris Wilson 0 siblings, 1 reply; 13+ messages in thread From: Mika Kuoppala @ 2019-09-19 13:39 UTC (permalink / raw) To: Chris Wilson, intel-gfx Chris Wilson <chris@chris-wilson.co.uk> writes: > Quoting Mika Kuoppala (2019-09-19 13:57:45) >> Chris Wilson <chris@chris-wilson.co.uk> writes: >> >> > Check that we are correctly invalidating the TLB at the start of a >> > batch after updating the GTT. >> > >> > Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> >> > Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com> >> > Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> >> > --- >> > drivers/gpu/drm/i915/selftests/i915_gem_gtt.c | 227 ++++++++++++++++++ >> > 1 file changed, 227 insertions(+) >> > >> > diff --git a/drivers/gpu/drm/i915/selftests/i915_gem_gtt.c b/drivers/gpu/drm/i915/selftests/i915_gem_gtt.c >> > index 598c18d10640..f8709b332bd7 100644 >> > --- a/drivers/gpu/drm/i915/selftests/i915_gem_gtt.c >> > +++ b/drivers/gpu/drm/i915/selftests/i915_gem_gtt.c >> > @@ -25,13 +25,16 @@ >> > #include <linux/list_sort.h> >> > #include <linux/prime_numbers.h> >> > >> > +#include "gem/i915_gem_context.h" >> > #include "gem/selftests/mock_context.h" >> > +#include "gt/intel_context.h" >> > >> > #include "i915_random.h" >> > #include "i915_selftest.h" >> > >> > #include "mock_drm.h" >> > #include "mock_gem_device.h" >> > +#include "igt_flush_test.h" >> > >> > static void cleanup_freed_objects(struct drm_i915_private *i915) >> > { >> > @@ -1705,6 +1708,229 @@ int i915_gem_gtt_mock_selftests(void) >> > return err; >> > } >> > >> > +static int context_sync(struct intel_context *ce) >> > +{ >> > + struct i915_request *rq; >> > + long timeout; >> > + >> > + rq = intel_context_create_request(ce); >> > + if (IS_ERR(rq)) >> > + return PTR_ERR(rq); >> > + >> > + i915_request_get(rq); >> > + i915_request_add(rq); >> > + >> > + timeout = i915_request_wait(rq, 0, HZ / 5); >> > + i915_request_put(rq); >> > + >> > + return timeout < 0 ? -EIO : 0; >> > +} >> > + >> > +static int submit_batch(struct intel_context *ce, u64 addr) >> > +{ >> > + struct i915_request *rq; >> > + int err; >> > + >> > + rq = intel_context_create_request(ce); >> > + if (IS_ERR(rq)) >> > + return PTR_ERR(rq); >> > + >> > + err = 0; >> > + if (rq->engine->emit_init_breadcrumb) /* detect a hang */ >> >> for seqno write? > > If we expect an initial breadcrumb, we use it during reset to identify > if we are inside a payload (as opposed to being inside the semaphore > wait). So we need to emit the breadcrumb if we may hang in our batch. > >> > + err = rq->engine->emit_init_breadcrumb(rq); >> > + if (err == 0) >> > + err = rq->engine->emit_bb_start(rq, addr, 0, 0); >> > + >> >> In context_sync part we grabbed a reference. In here we >> don't. I don't see how we can get away without it even >> if we don't wait in here. > > Hmm, I suppose you can argue that we do now have a later deref in the > spinner. That wasn't there before... > >> > + vma = i915_vma_instance(out, vm, NULL); >> > + if (IS_ERR(vma)) { >> > + err = PTR_ERR(vma); >> > + goto out_batch; >> > + } >> > + >> > + err = i915_vma_pin(vma, 0, 0, >> > + PIN_USER | >> > + PIN_OFFSET_FIXED | >> > + (vm->total - PAGE_SIZE)); >> > + if (err) >> > + goto out_out; >> >> out_put? > > Joonas likes out: for normal exit paths that double for error handling. Ok. Fine with me. I just like the last part to describe what the first part of onion out does. Don't have to so much scroll back and forth in editor. > >> Oh and we don't have to do anything with the instance on >> error paths? > > No. The vma does not yet have an independent lifetime from the object > (they are all owned by objects currently). > >> > + /* Replace the TLB with target batches */ >> > + for (i = 0; i < count; i++) { >> > + u32 *cs = batch + i * 64 / sizeof(*cs); >> > + u64 addr; >> > + >> > + vma->node.start = offset + i * PAGE_SIZE; >> >> on previous loop, we have now primed the pte to tlb in here? > > We're using the same PTE as before, in the expectation that the TLB > still contains that lookup. > >> > + vm->insert_entries(vm, vma, I915_CACHE_NONE, 0); >> >> ..now changing in it here... >> >> > + >> > + addr = vma->node.start + i * 64; >> > + cs[4] = MI_NOOP; >> > + cs[6] = lower_32_bits(addr); >> > + cs[7] = upper_32_bits(addr); >> > + wmb(); >> > + >> > + err = submit_batch(ce, addr); >> >> in hope that with this submission hardware will see the old one and >> completely miss the store+bb start? > > The hope is we see the right page of course! The test is to detect when > it sees the old page instead. Right, I guess it just depends who is hoping wrt to outcome =) > >> Perhaps rewiring a more dummy emit only to prove this case >> is pushing it. >> >> But I am curious to know if you did try it out by removing >> the invalidate on the emits and managed to bring >> out the missing writes? > > We can demonstrate it on Tigerlake :) > > Indeed it detects the remove of MI_INVALIDATE_TLB elsewhere. Neat addition to our triaging kit this will be. -Mika _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [PATCH] drm/i915/selftests: Exercise CS TLB invalidation 2019-09-19 13:39 ` Mika Kuoppala @ 2019-09-19 13:46 ` Chris Wilson 0 siblings, 0 replies; 13+ messages in thread From: Chris Wilson @ 2019-09-19 13:46 UTC (permalink / raw) To: Mika Kuoppala, intel-gfx Quoting Mika Kuoppala (2019-09-19 14:39:59) > Chris Wilson <chris@chris-wilson.co.uk> writes: > > > Quoting Mika Kuoppala (2019-09-19 13:57:45) > >> Chris Wilson <chris@chris-wilson.co.uk> writes: > >> > + vma = i915_vma_instance(out, vm, NULL); > >> > + if (IS_ERR(vma)) { > >> > + err = PTR_ERR(vma); > >> > + goto out_batch; > >> > + } > >> > + > >> > + err = i915_vma_pin(vma, 0, 0, > >> > + PIN_USER | > >> > + PIN_OFFSET_FIXED | > >> > + (vm->total - PAGE_SIZE)); > >> > + if (err) > >> > + goto out_out; > >> > >> out_put? > > > > Joonas likes out: for normal exit paths that double for error handling. > > Ok. Fine with me. I just like the last part to describe what the first part > of onion out does. Don't have to so much scroll back and forth > in editor. Oh, I didn't notice I had a typo. I thought it was out_put! -Chris _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 13+ messages in thread
* [PATCH v2] drm/i915/selftests: Exercise CS TLB invalidation 2019-09-15 16:37 [PATCH] drm/i915/selftests: Exercise CS TLB invalidation Chris Wilson ` (3 preceding siblings ...) 2019-09-19 12:57 ` [PATCH] " Mika Kuoppala @ 2019-09-19 13:14 ` Chris Wilson 2019-09-19 13:40 ` Mika Kuoppala 2019-09-19 14:48 ` ✗ Fi.CI.CHECKPATCH: warning for drm/i915/selftests: Exercise CS TLB invalidation (rev2) Patchwork ` (2 subsequent siblings) 7 siblings, 1 reply; 13+ messages in thread From: Chris Wilson @ 2019-09-19 13:14 UTC (permalink / raw) To: intel-gfx Check that we are correctly invalidating the TLB at the start of a batch after updating the GTT. v2: Comments and hold the request reference while spinning Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com> Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> --- drivers/gpu/drm/i915/selftests/i915_gem_gtt.c | 308 ++++++++++++++++++ 1 file changed, 308 insertions(+) diff --git a/drivers/gpu/drm/i915/selftests/i915_gem_gtt.c b/drivers/gpu/drm/i915/selftests/i915_gem_gtt.c index 598c18d10640..aa7be9089e2d 100644 --- a/drivers/gpu/drm/i915/selftests/i915_gem_gtt.c +++ b/drivers/gpu/drm/i915/selftests/i915_gem_gtt.c @@ -25,13 +25,16 @@ #include <linux/list_sort.h> #include <linux/prime_numbers.h> +#include "gem/i915_gem_context.h" #include "gem/selftests/mock_context.h" +#include "gt/intel_context.h" #include "i915_random.h" #include "i915_selftest.h" #include "mock_drm.h" #include "mock_gem_device.h" +#include "igt_flush_test.h" static void cleanup_freed_objects(struct drm_i915_private *i915) { @@ -1705,6 +1708,310 @@ int i915_gem_gtt_mock_selftests(void) return err; } +static int context_sync(struct intel_context *ce) +{ + struct i915_request *rq; + long timeout; + + rq = intel_context_create_request(ce); + if (IS_ERR(rq)) + return PTR_ERR(rq); + + i915_request_get(rq); + i915_request_add(rq); + + timeout = i915_request_wait(rq, 0, HZ / 5); + i915_request_put(rq); + + return timeout < 0 ? -EIO : 0; +} + +static struct i915_request * +submit_batch(struct intel_context *ce, u64 addr) +{ + struct i915_request *rq; + int err; + + rq = intel_context_create_request(ce); + if (IS_ERR(rq)) + return rq; + + err = 0; + if (rq->engine->emit_init_breadcrumb) /* detect a hang */ + err = rq->engine->emit_init_breadcrumb(rq); + if (err == 0) + err = rq->engine->emit_bb_start(rq, addr, 0, 0); + + if (err == 0) + i915_request_get(rq); + i915_request_add(rq); + + return err ? ERR_PTR(err) : rq; +} + +static u32 *spinner(u32 *batch, int i) +{ + return batch + i * 64 / sizeof(*batch) + 4; +} + +static void end_spin(u32 *batch, int i) +{ + *spinner(batch, i) = MI_BATCH_BUFFER_END; + wmb(); +} + +static int igt_cs_tlb(void *arg) +{ + const unsigned int count = PAGE_SIZE / 64; + const unsigned int chunk_size = count * PAGE_SIZE; + struct drm_i915_private *i915 = arg; + struct drm_i915_gem_object *bbe, *act, *out; + struct i915_gem_engines_iter it; + struct i915_address_space *vm; + struct i915_gem_context *ctx; + struct intel_context *ce; + struct drm_file *file; + struct i915_vma *vma; + unsigned int i; + u32 *result; + u32 *batch; + int err = 0; + + /* + * Our mission here is to fool the hardware to execute something + * from scratch as it has not seen the batch move (due to missing + * the TLB invalidate). + */ + + file = mock_file(i915); + if (IS_ERR(file)) + return PTR_ERR(file); + + mutex_lock(&i915->drm.struct_mutex); + ctx = live_context(i915, file); + if (IS_ERR(ctx)) { + err = PTR_ERR(ctx); + goto out_unlock; + } + + vm = ctx->vm; + if (!vm) + goto out_unlock; + + /* Create two pages; dummy we prefill the TLB, and intended */ + bbe = i915_gem_object_create_internal(i915, PAGE_SIZE); + if (IS_ERR(bbe)) { + err = PTR_ERR(bbe); + goto out_unlock; + } + + batch = i915_gem_object_pin_map(bbe, I915_MAP_WC); + if (IS_ERR(batch)) { + err = PTR_ERR(batch); + goto out_bbe; + } + memset32(batch, MI_BATCH_BUFFER_END, PAGE_SIZE / sizeof(u32)); + i915_gem_object_flush_map(bbe); + i915_gem_object_unpin_map(bbe); + + act = i915_gem_object_create_internal(i915, PAGE_SIZE); + if (IS_ERR(act)) { + err = PTR_ERR(act); + goto out_bbe; + } + + /* Track the execution of each request by writing into different slot */ + batch = i915_gem_object_pin_map(act, I915_MAP_WC); + if (IS_ERR(batch)) { + err = PTR_ERR(batch); + goto out_act; + } + for (i = 0; i < count; i++) { + u32 *cs = batch + i * 64 / sizeof(*cs); + u64 addr = (vm->total - PAGE_SIZE) + i * sizeof(u32); + + GEM_BUG_ON(INTEL_GEN(i915) < 6); + cs[0] = MI_STORE_DWORD_IMM_GEN4; + if (INTEL_GEN(i915) >= 8) { + cs[1] = lower_32_bits(addr); + cs[2] = upper_32_bits(addr); + cs[3] = i; + cs[4] = MI_NOOP; + cs[5] = MI_BATCH_BUFFER_START_GEN8; + } else { + cs[1] = 0; + cs[2] = lower_32_bits(addr); + cs[3] = i; + cs[4] = MI_NOOP; + cs[5] = MI_BATCH_BUFFER_START; + } + } + + out = i915_gem_object_create_internal(i915, PAGE_SIZE); + if (IS_ERR(out)) { + err = PTR_ERR(out); + goto out_batch; + } + i915_gem_object_set_cache_coherency(out, I915_CACHING_CACHED); + + vma = i915_vma_instance(out, vm, NULL); + if (IS_ERR(vma)) { + err = PTR_ERR(vma); + goto out_batch; + } + + err = i915_vma_pin(vma, 0, 0, + PIN_USER | + PIN_OFFSET_FIXED | + (vm->total - PAGE_SIZE)); + if (err) + goto out_out; + GEM_BUG_ON(vma->node.start != vm->total - PAGE_SIZE); + + result = i915_gem_object_pin_map(out, I915_MAP_WB); + if (IS_ERR(result)) { + err = PTR_ERR(result); + goto out_out; + } + + for_each_gem_engine(ce, i915_gem_context_lock_engines(ctx), it) { + IGT_TIMEOUT(end_time); + unsigned long pass = 0; + + if (!intel_engine_can_store_dword(ce->engine)) + continue; + + while (!__igt_timeout(end_time, NULL)) { + struct i915_request *rq; + u64 offset; + + offset = random_offset(0, vm->total - PAGE_SIZE, + chunk_size, PAGE_SIZE); + + err = vm->allocate_va_range(vm, offset, chunk_size); + if (err) + goto end; + + memset32(result, STACK_MAGIC, PAGE_SIZE / sizeof(u32)); + + vma = i915_vma_instance(bbe, vm, NULL); + if (IS_ERR(vma)) { + err = PTR_ERR(vma); + goto end; + } + + err = vma->ops->set_pages(vma); + if (err) + goto end; + + /* Prime the TLB with the dummy pages */ + for (i = 0; i < count; i++) { + vma->node.start = offset + i * PAGE_SIZE; + vm->insert_entries(vm, vma, I915_CACHE_NONE, 0); + + rq = submit_batch(ce, vma->node.start); + if (IS_ERR(rq)) { + err = PTR_ERR(rq); + goto end; + } + i915_request_put(rq); + } + + vma->ops->clear_pages(vma); + + err = context_sync(ce); + if (err) { + pr_err("%s: dummy setup timed out\n", + ce->engine->name); + goto end; + } + + vma = i915_vma_instance(act, vm, NULL); + if (IS_ERR(vma)) { + err = PTR_ERR(vma); + goto end; + } + + err = vma->ops->set_pages(vma); + if (err) + goto end; + + /* Replace the TLB with target batches */ + for (i = 0; i < count; i++) { + struct i915_request *rq; + u32 *cs = batch + i * 64 / sizeof(*cs); + u64 addr; + + vma->node.start = offset + i * PAGE_SIZE; + vm->insert_entries(vm, vma, I915_CACHE_NONE, 0); + + addr = vma->node.start + i * 64; + cs[4] = MI_NOOP; + cs[6] = lower_32_bits(addr); + cs[7] = upper_32_bits(addr); + wmb(); + + rq = submit_batch(ce, addr); + if (IS_ERR(rq)) { + err = PTR_ERR(rq); + goto end; + } + + /* Wait until the context chain has started */ + if (i == 0) { + while (READ_ONCE(result[i]) && + !i915_request_completed(rq)) + cond_resched(); + } else { + end_spin(batch, i - 1); + } + + i915_request_put(rq); + } + end_spin(batch, count - 1); + + vma->ops->clear_pages(vma); + + err = context_sync(ce); + if (err) { + pr_err("%s: writes timed out\n", + ce->engine->name); + goto end; + } + + for (i = 0; i < count; i++) { + if (result[i] != i) { + pr_err("%s: Write lost on pass %lu, at offset %llx, index %d, found %x, expected %x\n", + ce->engine->name, pass, + offset, i, result[i], i); + err = -EINVAL; + goto end; + } + } + + vm->clear_range(vm, offset, chunk_size); + pass++; + } + } +end: + if (igt_flush_test(i915, I915_WAIT_LOCKED)) + err = -EIO; + i915_gem_context_unlock_engines(ctx); + i915_gem_object_unpin_map(out); +out_out: + i915_gem_object_put(out); +out_batch: + i915_gem_object_unpin_map(act); +out_act: + i915_gem_object_put(act); +out_bbe: + i915_gem_object_put(bbe); +out_unlock: + mutex_unlock(&i915->drm.struct_mutex); + mock_file_free(i915, file); + return err; +} + int i915_gem_gtt_live_selftests(struct drm_i915_private *i915) { static const struct i915_subtest tests[] = { @@ -1722,6 +2029,7 @@ int i915_gem_gtt_live_selftests(struct drm_i915_private *i915) SUBTEST(igt_ggtt_pot), SUBTEST(igt_ggtt_fill), SUBTEST(igt_ggtt_page), + SUBTEST(igt_cs_tlb), }; GEM_BUG_ON(offset_in_page(i915->ggtt.vm.total)); -- 2.23.0 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply related [flat|nested] 13+ messages in thread
* Re: [PATCH v2] drm/i915/selftests: Exercise CS TLB invalidation 2019-09-19 13:14 ` [PATCH v2] " Chris Wilson @ 2019-09-19 13:40 ` Mika Kuoppala 0 siblings, 0 replies; 13+ messages in thread From: Mika Kuoppala @ 2019-09-19 13:40 UTC (permalink / raw) To: Chris Wilson, intel-gfx Chris Wilson <chris@chris-wilson.co.uk> writes: > Check that we are correctly invalidating the TLB at the start of a > batch after updating the GTT. > > v2: Comments and hold the request reference while spinning > > Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> > Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com> > Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> Reviewed-by: Mika Kuoppala <mika.kuoppala@linux.intel.com> > --- > drivers/gpu/drm/i915/selftests/i915_gem_gtt.c | 308 ++++++++++++++++++ > 1 file changed, 308 insertions(+) > > diff --git a/drivers/gpu/drm/i915/selftests/i915_gem_gtt.c b/drivers/gpu/drm/i915/selftests/i915_gem_gtt.c > index 598c18d10640..aa7be9089e2d 100644 > --- a/drivers/gpu/drm/i915/selftests/i915_gem_gtt.c > +++ b/drivers/gpu/drm/i915/selftests/i915_gem_gtt.c > @@ -25,13 +25,16 @@ > #include <linux/list_sort.h> > #include <linux/prime_numbers.h> > > +#include "gem/i915_gem_context.h" > #include "gem/selftests/mock_context.h" > +#include "gt/intel_context.h" > > #include "i915_random.h" > #include "i915_selftest.h" > > #include "mock_drm.h" > #include "mock_gem_device.h" > +#include "igt_flush_test.h" > > static void cleanup_freed_objects(struct drm_i915_private *i915) > { > @@ -1705,6 +1708,310 @@ int i915_gem_gtt_mock_selftests(void) > return err; > } > > +static int context_sync(struct intel_context *ce) > +{ > + struct i915_request *rq; > + long timeout; > + > + rq = intel_context_create_request(ce); > + if (IS_ERR(rq)) > + return PTR_ERR(rq); > + > + i915_request_get(rq); > + i915_request_add(rq); > + > + timeout = i915_request_wait(rq, 0, HZ / 5); > + i915_request_put(rq); > + > + return timeout < 0 ? -EIO : 0; > +} > + > +static struct i915_request * > +submit_batch(struct intel_context *ce, u64 addr) > +{ > + struct i915_request *rq; > + int err; > + > + rq = intel_context_create_request(ce); > + if (IS_ERR(rq)) > + return rq; > + > + err = 0; > + if (rq->engine->emit_init_breadcrumb) /* detect a hang */ > + err = rq->engine->emit_init_breadcrumb(rq); > + if (err == 0) > + err = rq->engine->emit_bb_start(rq, addr, 0, 0); > + > + if (err == 0) > + i915_request_get(rq); > + i915_request_add(rq); > + > + return err ? ERR_PTR(err) : rq; > +} > + > +static u32 *spinner(u32 *batch, int i) > +{ > + return batch + i * 64 / sizeof(*batch) + 4; > +} > + > +static void end_spin(u32 *batch, int i) > +{ > + *spinner(batch, i) = MI_BATCH_BUFFER_END; > + wmb(); > +} > + > +static int igt_cs_tlb(void *arg) > +{ > + const unsigned int count = PAGE_SIZE / 64; > + const unsigned int chunk_size = count * PAGE_SIZE; > + struct drm_i915_private *i915 = arg; > + struct drm_i915_gem_object *bbe, *act, *out; > + struct i915_gem_engines_iter it; > + struct i915_address_space *vm; > + struct i915_gem_context *ctx; > + struct intel_context *ce; > + struct drm_file *file; > + struct i915_vma *vma; > + unsigned int i; > + u32 *result; > + u32 *batch; > + int err = 0; > + > + /* > + * Our mission here is to fool the hardware to execute something > + * from scratch as it has not seen the batch move (due to missing > + * the TLB invalidate). > + */ > + > + file = mock_file(i915); > + if (IS_ERR(file)) > + return PTR_ERR(file); > + > + mutex_lock(&i915->drm.struct_mutex); > + ctx = live_context(i915, file); > + if (IS_ERR(ctx)) { > + err = PTR_ERR(ctx); > + goto out_unlock; > + } > + > + vm = ctx->vm; > + if (!vm) > + goto out_unlock; > + > + /* Create two pages; dummy we prefill the TLB, and intended */ > + bbe = i915_gem_object_create_internal(i915, PAGE_SIZE); > + if (IS_ERR(bbe)) { > + err = PTR_ERR(bbe); > + goto out_unlock; > + } > + > + batch = i915_gem_object_pin_map(bbe, I915_MAP_WC); > + if (IS_ERR(batch)) { > + err = PTR_ERR(batch); > + goto out_bbe; > + } > + memset32(batch, MI_BATCH_BUFFER_END, PAGE_SIZE / sizeof(u32)); > + i915_gem_object_flush_map(bbe); > + i915_gem_object_unpin_map(bbe); > + > + act = i915_gem_object_create_internal(i915, PAGE_SIZE); > + if (IS_ERR(act)) { > + err = PTR_ERR(act); > + goto out_bbe; > + } > + > + /* Track the execution of each request by writing into different slot */ > + batch = i915_gem_object_pin_map(act, I915_MAP_WC); > + if (IS_ERR(batch)) { > + err = PTR_ERR(batch); > + goto out_act; > + } > + for (i = 0; i < count; i++) { > + u32 *cs = batch + i * 64 / sizeof(*cs); > + u64 addr = (vm->total - PAGE_SIZE) + i * sizeof(u32); > + > + GEM_BUG_ON(INTEL_GEN(i915) < 6); > + cs[0] = MI_STORE_DWORD_IMM_GEN4; > + if (INTEL_GEN(i915) >= 8) { > + cs[1] = lower_32_bits(addr); > + cs[2] = upper_32_bits(addr); > + cs[3] = i; > + cs[4] = MI_NOOP; > + cs[5] = MI_BATCH_BUFFER_START_GEN8; > + } else { > + cs[1] = 0; > + cs[2] = lower_32_bits(addr); > + cs[3] = i; > + cs[4] = MI_NOOP; > + cs[5] = MI_BATCH_BUFFER_START; > + } > + } > + > + out = i915_gem_object_create_internal(i915, PAGE_SIZE); > + if (IS_ERR(out)) { > + err = PTR_ERR(out); > + goto out_batch; > + } > + i915_gem_object_set_cache_coherency(out, I915_CACHING_CACHED); > + > + vma = i915_vma_instance(out, vm, NULL); > + if (IS_ERR(vma)) { > + err = PTR_ERR(vma); > + goto out_batch; > + } > + > + err = i915_vma_pin(vma, 0, 0, > + PIN_USER | > + PIN_OFFSET_FIXED | > + (vm->total - PAGE_SIZE)); > + if (err) > + goto out_out; > + GEM_BUG_ON(vma->node.start != vm->total - PAGE_SIZE); > + > + result = i915_gem_object_pin_map(out, I915_MAP_WB); > + if (IS_ERR(result)) { > + err = PTR_ERR(result); > + goto out_out; > + } > + > + for_each_gem_engine(ce, i915_gem_context_lock_engines(ctx), it) { > + IGT_TIMEOUT(end_time); > + unsigned long pass = 0; > + > + if (!intel_engine_can_store_dword(ce->engine)) > + continue; > + > + while (!__igt_timeout(end_time, NULL)) { > + struct i915_request *rq; > + u64 offset; > + > + offset = random_offset(0, vm->total - PAGE_SIZE, > + chunk_size, PAGE_SIZE); > + > + err = vm->allocate_va_range(vm, offset, chunk_size); > + if (err) > + goto end; > + > + memset32(result, STACK_MAGIC, PAGE_SIZE / sizeof(u32)); > + > + vma = i915_vma_instance(bbe, vm, NULL); > + if (IS_ERR(vma)) { > + err = PTR_ERR(vma); > + goto end; > + } > + > + err = vma->ops->set_pages(vma); > + if (err) > + goto end; > + > + /* Prime the TLB with the dummy pages */ > + for (i = 0; i < count; i++) { > + vma->node.start = offset + i * PAGE_SIZE; > + vm->insert_entries(vm, vma, I915_CACHE_NONE, 0); > + > + rq = submit_batch(ce, vma->node.start); > + if (IS_ERR(rq)) { > + err = PTR_ERR(rq); > + goto end; > + } > + i915_request_put(rq); > + } > + > + vma->ops->clear_pages(vma); > + > + err = context_sync(ce); > + if (err) { > + pr_err("%s: dummy setup timed out\n", > + ce->engine->name); > + goto end; > + } > + > + vma = i915_vma_instance(act, vm, NULL); > + if (IS_ERR(vma)) { > + err = PTR_ERR(vma); > + goto end; > + } > + > + err = vma->ops->set_pages(vma); > + if (err) > + goto end; > + > + /* Replace the TLB with target batches */ > + for (i = 0; i < count; i++) { > + struct i915_request *rq; > + u32 *cs = batch + i * 64 / sizeof(*cs); > + u64 addr; > + > + vma->node.start = offset + i * PAGE_SIZE; > + vm->insert_entries(vm, vma, I915_CACHE_NONE, 0); > + > + addr = vma->node.start + i * 64; > + cs[4] = MI_NOOP; > + cs[6] = lower_32_bits(addr); > + cs[7] = upper_32_bits(addr); > + wmb(); > + > + rq = submit_batch(ce, addr); > + if (IS_ERR(rq)) { > + err = PTR_ERR(rq); > + goto end; > + } > + > + /* Wait until the context chain has started */ > + if (i == 0) { > + while (READ_ONCE(result[i]) && > + !i915_request_completed(rq)) > + cond_resched(); > + } else { > + end_spin(batch, i - 1); > + } > + > + i915_request_put(rq); > + } > + end_spin(batch, count - 1); > + > + vma->ops->clear_pages(vma); > + > + err = context_sync(ce); > + if (err) { > + pr_err("%s: writes timed out\n", > + ce->engine->name); > + goto end; > + } > + > + for (i = 0; i < count; i++) { > + if (result[i] != i) { > + pr_err("%s: Write lost on pass %lu, at offset %llx, index %d, found %x, expected %x\n", > + ce->engine->name, pass, > + offset, i, result[i], i); > + err = -EINVAL; > + goto end; > + } > + } > + > + vm->clear_range(vm, offset, chunk_size); > + pass++; > + } > + } > +end: > + if (igt_flush_test(i915, I915_WAIT_LOCKED)) > + err = -EIO; > + i915_gem_context_unlock_engines(ctx); > + i915_gem_object_unpin_map(out); > +out_out: > + i915_gem_object_put(out); > +out_batch: > + i915_gem_object_unpin_map(act); > +out_act: > + i915_gem_object_put(act); > +out_bbe: > + i915_gem_object_put(bbe); > +out_unlock: > + mutex_unlock(&i915->drm.struct_mutex); > + mock_file_free(i915, file); > + return err; > +} > + > int i915_gem_gtt_live_selftests(struct drm_i915_private *i915) > { > static const struct i915_subtest tests[] = { > @@ -1722,6 +2029,7 @@ int i915_gem_gtt_live_selftests(struct drm_i915_private *i915) > SUBTEST(igt_ggtt_pot), > SUBTEST(igt_ggtt_fill), > SUBTEST(igt_ggtt_page), > + SUBTEST(igt_cs_tlb), > }; > > GEM_BUG_ON(offset_in_page(i915->ggtt.vm.total)); > -- > 2.23.0 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 13+ messages in thread
* ✗ Fi.CI.CHECKPATCH: warning for drm/i915/selftests: Exercise CS TLB invalidation (rev2) 2019-09-15 16:37 [PATCH] drm/i915/selftests: Exercise CS TLB invalidation Chris Wilson ` (4 preceding siblings ...) 2019-09-19 13:14 ` [PATCH v2] " Chris Wilson @ 2019-09-19 14:48 ` Patchwork 2019-09-19 15:10 ` ✓ Fi.CI.BAT: success " Patchwork 2019-09-20 0:16 ` ✓ Fi.CI.IGT: " Patchwork 7 siblings, 0 replies; 13+ messages in thread From: Patchwork @ 2019-09-19 14:48 UTC (permalink / raw) To: Chris Wilson; +Cc: intel-gfx == Series Details == Series: drm/i915/selftests: Exercise CS TLB invalidation (rev2) URL : https://patchwork.freedesktop.org/series/66718/ State : warning == Summary == $ dim checkpatch origin/drm-tip e5422e652e53 drm/i915/selftests: Exercise CS TLB invalidation -:90: WARNING:MEMORY_BARRIER: memory barrier without comment #90: FILE: drivers/gpu/drm/i915/selftests/i915_gem_gtt.c:1760: + wmb(); -:282: WARNING:MEMORY_BARRIER: memory barrier without comment #282: FILE: drivers/gpu/drm/i915/selftests/i915_gem_gtt.c:1952: + wmb(); total: 0 errors, 2 warnings, 0 checks, 333 lines checked _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 13+ messages in thread
* ✓ Fi.CI.BAT: success for drm/i915/selftests: Exercise CS TLB invalidation (rev2) 2019-09-15 16:37 [PATCH] drm/i915/selftests: Exercise CS TLB invalidation Chris Wilson ` (5 preceding siblings ...) 2019-09-19 14:48 ` ✗ Fi.CI.CHECKPATCH: warning for drm/i915/selftests: Exercise CS TLB invalidation (rev2) Patchwork @ 2019-09-19 15:10 ` Patchwork 2019-09-20 0:16 ` ✓ Fi.CI.IGT: " Patchwork 7 siblings, 0 replies; 13+ messages in thread From: Patchwork @ 2019-09-19 15:10 UTC (permalink / raw) To: Chris Wilson; +Cc: intel-gfx == Series Details == Series: drm/i915/selftests: Exercise CS TLB invalidation (rev2) URL : https://patchwork.freedesktop.org/series/66718/ State : success == Summary == CI Bug Log - changes from CI_DRM_6920 -> Patchwork_14455 ==================================================== Summary ------- **SUCCESS** No regressions found. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14455/ Possible new issues ------------------- Here are the unknown changes that may have been introduced in Patchwork_14455: ### IGT changes ### #### Suppressed #### The following results come from untrusted machines, tests, or statuses. They do not affect the overall result. * igt@i915_selftest@live_gtt: - {fi-tgl-u}: [PASS][1] -> [DMESG-FAIL][2] [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6920/fi-tgl-u/igt@i915_selftest@live_gtt.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14455/fi-tgl-u/igt@i915_selftest@live_gtt.html - {fi-tgl-u2}: [PASS][3] -> [DMESG-FAIL][4] [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6920/fi-tgl-u2/igt@i915_selftest@live_gtt.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14455/fi-tgl-u2/igt@i915_selftest@live_gtt.html Known issues ------------ Here are the changes found in Patchwork_14455 that come from known issues: ### IGT changes ### #### Issues hit #### * igt@vgem_basic@sysfs: - fi-icl-u3: [PASS][5] -> [DMESG-WARN][6] ([fdo#107724]) +1 similar issue [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6920/fi-icl-u3/igt@vgem_basic@sysfs.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14455/fi-icl-u3/igt@vgem_basic@sysfs.html #### Possible fixes #### * igt@debugfs_test@read_all_entries: - {fi-tgl-u2}: [DMESG-WARN][7] ([fdo#111600]) -> [PASS][8] [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6920/fi-tgl-u2/igt@debugfs_test@read_all_entries.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14455/fi-tgl-u2/igt@debugfs_test@read_all_entries.html * igt@gem_close_race@basic-threads: - fi-bxt-dsi: [INCOMPLETE][9] ([fdo#103927]) -> [PASS][10] [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6920/fi-bxt-dsi/igt@gem_close_race@basic-threads.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14455/fi-bxt-dsi/igt@gem_close_race@basic-threads.html * igt@gem_ctx_create@basic-files: - {fi-icl-u4}: [INCOMPLETE][11] ([fdo#107713] / [fdo#109100]) -> [PASS][12] [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6920/fi-icl-u4/igt@gem_ctx_create@basic-files.html [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14455/fi-icl-u4/igt@gem_ctx_create@basic-files.html * igt@gem_mmap_gtt@basic-write-no-prefault: - fi-icl-u3: [DMESG-WARN][13] ([fdo#107724]) -> [PASS][14] +2 similar issues [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6920/fi-icl-u3/igt@gem_mmap_gtt@basic-write-no-prefault.html [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14455/fi-icl-u3/igt@gem_mmap_gtt@basic-write-no-prefault.html * igt@i915_selftest@live_gem_contexts: - fi-skl-guc: [INCOMPLETE][15] -> [PASS][16] [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6920/fi-skl-guc/igt@i915_selftest@live_gem_contexts.html [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14455/fi-skl-guc/igt@i915_selftest@live_gem_contexts.html #### Warnings #### * igt@i915_pm_rpm@basic-pci-d3-state: - fi-kbl-guc: [SKIP][17] ([fdo#109271]) -> [FAIL][18] ([fdo#110829]) [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6920/fi-kbl-guc/igt@i915_pm_rpm@basic-pci-d3-state.html [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14455/fi-kbl-guc/igt@i915_pm_rpm@basic-pci-d3-state.html {name}: This element is suppressed. This means it is ignored when computing the status of the difference (SUCCESS, WARNING, or FAILURE). [fdo#103927]: https://bugs.freedesktop.org/show_bug.cgi?id=103927 [fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713 [fdo#107724]: https://bugs.freedesktop.org/show_bug.cgi?id=107724 [fdo#109100]: https://bugs.freedesktop.org/show_bug.cgi?id=109100 [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271 [fdo#110829]: https://bugs.freedesktop.org/show_bug.cgi?id=110829 [fdo#111562]: https://bugs.freedesktop.org/show_bug.cgi?id=111562 [fdo#111597]: https://bugs.freedesktop.org/show_bug.cgi?id=111597 [fdo#111600]: https://bugs.freedesktop.org/show_bug.cgi?id=111600 [fdo#111739]: https://bugs.freedesktop.org/show_bug.cgi?id=111739 Participating hosts (53 -> 46) ------------------------------ Additional (1): fi-bsw-n3050 Missing (8): fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-apl-guc fi-icl-y fi-byt-clapper fi-bdw-samus Build changes ------------- * CI: CI-20190529 -> None * Linux: CI_DRM_6920 -> Patchwork_14455 CI-20190529: 20190529 CI_DRM_6920: 7b7f2c82b41efd0468f75fa935687f670c6bd9e3 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_5192: 77c53210779c30cfb8a4ca2312675fe5be94f4d5 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_14455: e5422e652e533a2010fb807c007bc2d2d435f5b1 @ git://anongit.freedesktop.org/gfx-ci/linux == Linux commits == e5422e652e53 drm/i915/selftests: Exercise CS TLB invalidation == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14455/index.html _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 13+ messages in thread
* ✓ Fi.CI.IGT: success for drm/i915/selftests: Exercise CS TLB invalidation (rev2) 2019-09-15 16:37 [PATCH] drm/i915/selftests: Exercise CS TLB invalidation Chris Wilson ` (6 preceding siblings ...) 2019-09-19 15:10 ` ✓ Fi.CI.BAT: success " Patchwork @ 2019-09-20 0:16 ` Patchwork 7 siblings, 0 replies; 13+ messages in thread From: Patchwork @ 2019-09-20 0:16 UTC (permalink / raw) To: Chris Wilson; +Cc: intel-gfx == Series Details == Series: drm/i915/selftests: Exercise CS TLB invalidation (rev2) URL : https://patchwork.freedesktop.org/series/66718/ State : success == Summary == CI Bug Log - changes from CI_DRM_6920_full -> Patchwork_14455_full ==================================================== Summary ------- **SUCCESS** No regressions found. Known issues ------------ Here are the changes found in Patchwork_14455_full that come from known issues: ### IGT changes ### #### Issues hit #### * igt@gem_exec_schedule@preempt-queue-bsd1: - shard-iclb: [PASS][1] -> [SKIP][2] ([fdo#109276]) +16 similar issues [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6920/shard-iclb4/igt@gem_exec_schedule@preempt-queue-bsd1.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14455/shard-iclb3/igt@gem_exec_schedule@preempt-queue-bsd1.html * igt@gem_exec_schedule@preempt-queue-contexts-chain-bsd: - shard-iclb: [PASS][3] -> [SKIP][4] ([fdo#111325]) +6 similar issues [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6920/shard-iclb6/igt@gem_exec_schedule@preempt-queue-contexts-chain-bsd.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14455/shard-iclb1/igt@gem_exec_schedule@preempt-queue-contexts-chain-bsd.html * igt@gem_pwrite@small-cpu-fbr: - shard-iclb: [PASS][5] -> [INCOMPLETE][6] ([fdo#107713]) [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6920/shard-iclb8/igt@gem_pwrite@small-cpu-fbr.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14455/shard-iclb7/igt@gem_pwrite@small-cpu-fbr.html * igt@kms_color@pipe-b-degamma: - shard-skl: [PASS][7] -> [FAIL][8] ([fdo#104782]) [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6920/shard-skl8/igt@kms_color@pipe-b-degamma.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14455/shard-skl4/igt@kms_color@pipe-b-degamma.html * igt@kms_flip@2x-plain-flip-fb-recreate-interruptible: - shard-glk: [PASS][9] -> [FAIL][10] ([fdo#100368]) [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6920/shard-glk6/igt@kms_flip@2x-plain-flip-fb-recreate-interruptible.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14455/shard-glk9/igt@kms_flip@2x-plain-flip-fb-recreate-interruptible.html * igt@kms_flip@flip-vs-suspend-interruptible: - shard-apl: [PASS][11] -> [DMESG-WARN][12] ([fdo#108566]) +3 similar issues [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6920/shard-apl8/igt@kms_flip@flip-vs-suspend-interruptible.html [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14455/shard-apl6/igt@kms_flip@flip-vs-suspend-interruptible.html * igt@kms_frontbuffer_tracking@fbc-1p-pri-indfb-multidraw: - shard-iclb: [PASS][13] -> [FAIL][14] ([fdo#103167]) +4 similar issues [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6920/shard-iclb3/igt@kms_frontbuffer_tracking@fbc-1p-pri-indfb-multidraw.html [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14455/shard-iclb2/igt@kms_frontbuffer_tracking@fbc-1p-pri-indfb-multidraw.html * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-move: - shard-apl: [PASS][15] -> [FAIL][16] ([fdo#103167]) [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6920/shard-apl7/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-move.html [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14455/shard-apl7/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-move.html * igt@kms_plane_alpha_blend@pipe-b-coverage-7efc: - shard-skl: [PASS][17] -> [FAIL][18] ([fdo#108145] / [fdo#110403]) [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6920/shard-skl8/igt@kms_plane_alpha_blend@pipe-b-coverage-7efc.html [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14455/shard-skl4/igt@kms_plane_alpha_blend@pipe-b-coverage-7efc.html * igt@kms_psr2_su@frontbuffer: - shard-iclb: [PASS][19] -> [SKIP][20] ([fdo#109642] / [fdo#111068]) [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6920/shard-iclb2/igt@kms_psr2_su@frontbuffer.html [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14455/shard-iclb7/igt@kms_psr2_su@frontbuffer.html * igt@kms_psr@no_drrs: - shard-iclb: [PASS][21] -> [FAIL][22] ([fdo#108341]) [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6920/shard-iclb3/igt@kms_psr@no_drrs.html [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14455/shard-iclb1/igt@kms_psr@no_drrs.html * igt@kms_psr@psr2_no_drrs: - shard-iclb: [PASS][23] -> [SKIP][24] ([fdo#109441]) [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6920/shard-iclb2/igt@kms_psr@psr2_no_drrs.html [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14455/shard-iclb7/igt@kms_psr@psr2_no_drrs.html * igt@kms_setmode@basic: - shard-apl: [PASS][25] -> [FAIL][26] ([fdo#99912]) [25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6920/shard-apl1/igt@kms_setmode@basic.html [26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14455/shard-apl3/igt@kms_setmode@basic.html * igt@prime_busy@hang-bsd: - shard-hsw: [PASS][27] -> [INCOMPLETE][28] ([fdo#103540]) [27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6920/shard-hsw5/igt@prime_busy@hang-bsd.html [28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14455/shard-hsw8/igt@prime_busy@hang-bsd.html #### Possible fixes #### * igt@gem_exec_schedule@preempt-other-chain-bsd: - shard-iclb: [SKIP][29] ([fdo#111325]) -> [PASS][30] +7 similar issues [29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6920/shard-iclb2/igt@gem_exec_schedule@preempt-other-chain-bsd.html [30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14455/shard-iclb7/igt@gem_exec_schedule@preempt-other-chain-bsd.html * igt@i915_suspend@forcewake: - shard-kbl: [INCOMPLETE][31] ([fdo#103665]) -> [PASS][32] [31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6920/shard-kbl4/igt@i915_suspend@forcewake.html [32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14455/shard-kbl3/igt@i915_suspend@forcewake.html * igt@kms_cursor_edge_walk@pipe-a-128x128-right-edge: - shard-snb: [SKIP][33] ([fdo#109271] / [fdo#109278]) -> [PASS][34] [33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6920/shard-snb2/igt@kms_cursor_edge_walk@pipe-a-128x128-right-edge.html [34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14455/shard-snb7/igt@kms_cursor_edge_walk@pipe-a-128x128-right-edge.html * igt@kms_flip@dpms-vs-vblank-race: - shard-glk: [FAIL][35] ([fdo#111609]) -> [PASS][36] [35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6920/shard-glk9/igt@kms_flip@dpms-vs-vblank-race.html [36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14455/shard-glk8/igt@kms_flip@dpms-vs-vblank-race.html * igt@kms_flip@flip-vs-suspend-interruptible: - shard-hsw: [INCOMPLETE][37] ([fdo#103540]) -> [PASS][38] [37]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6920/shard-hsw2/igt@kms_flip@flip-vs-suspend-interruptible.html [38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14455/shard-hsw4/igt@kms_flip@flip-vs-suspend-interruptible.html * igt@kms_flip@plain-flip-fb-recreate-interruptible: - shard-skl: [FAIL][39] ([fdo#100368]) -> [PASS][40] [39]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6920/shard-skl5/igt@kms_flip@plain-flip-fb-recreate-interruptible.html [40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14455/shard-skl5/igt@kms_flip@plain-flip-fb-recreate-interruptible.html * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-move: - shard-kbl: [FAIL][41] ([fdo#103167]) -> [PASS][42] [41]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6920/shard-kbl7/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-move.html [42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14455/shard-kbl2/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-move.html * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-shrfb-draw-pwrite: - shard-iclb: [FAIL][43] ([fdo#103167]) -> [PASS][44] +2 similar issues [43]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6920/shard-iclb2/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-shrfb-draw-pwrite.html [44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14455/shard-iclb1/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-shrfb-draw-pwrite.html * igt@kms_frontbuffer_tracking@psr-rgb101010-draw-mmap-cpu: - shard-skl: [FAIL][45] ([fdo#103167]) -> [PASS][46] [45]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6920/shard-skl9/igt@kms_frontbuffer_tracking@psr-rgb101010-draw-mmap-cpu.html [46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14455/shard-skl10/igt@kms_frontbuffer_tracking@psr-rgb101010-draw-mmap-cpu.html * igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min: - shard-skl: [FAIL][47] ([fdo#108145]) -> [PASS][48] [47]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6920/shard-skl9/igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min.html [48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14455/shard-skl10/igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min.html * igt@kms_psr@psr2_cursor_render: - shard-iclb: [SKIP][49] ([fdo#109441]) -> [PASS][50] +1 similar issue [49]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6920/shard-iclb6/igt@kms_psr@psr2_cursor_render.html [50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14455/shard-iclb2/igt@kms_psr@psr2_cursor_render.html * igt@kms_setmode@basic: - shard-kbl: [FAIL][51] ([fdo#99912]) -> [PASS][52] [51]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6920/shard-kbl2/igt@kms_setmode@basic.html [52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14455/shard-kbl7/igt@kms_setmode@basic.html * igt@kms_vblank@pipe-a-ts-continuation-suspend: - shard-apl: [DMESG-WARN][53] ([fdo#108566]) -> [PASS][54] +1 similar issue [53]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6920/shard-apl3/igt@kms_vblank@pipe-a-ts-continuation-suspend.html [54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14455/shard-apl6/igt@kms_vblank@pipe-a-ts-continuation-suspend.html * igt@perf@polling: - shard-skl: [FAIL][55] ([fdo#110728]) -> [PASS][56] [55]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6920/shard-skl6/igt@perf@polling.html [56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14455/shard-skl4/igt@perf@polling.html * igt@prime_vgem@fence-wait-bsd2: - shard-iclb: [SKIP][57] ([fdo#109276]) -> [PASS][58] +11 similar issues [57]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6920/shard-iclb3/igt@prime_vgem@fence-wait-bsd2.html [58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14455/shard-iclb2/igt@prime_vgem@fence-wait-bsd2.html #### Warnings #### * igt@gem_mocs_settings@mocs-reset-bsd2: - shard-iclb: [SKIP][59] ([fdo#109276]) -> [FAIL][60] ([fdo#111330]) +2 similar issues [59]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6920/shard-iclb5/igt@gem_mocs_settings@mocs-reset-bsd2.html [60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14455/shard-iclb4/igt@gem_mocs_settings@mocs-reset-bsd2.html [fdo#100368]: https://bugs.freedesktop.org/show_bug.cgi?id=100368 [fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167 [fdo#103540]: https://bugs.freedesktop.org/show_bug.cgi?id=103540 [fdo#103665]: https://bugs.freedesktop.org/show_bug.cgi?id=103665 [fdo#104782]: https://bugs.freedesktop.org/show_bug.cgi?id=104782 [fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713 [fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145 [fdo#108341]: https://bugs.freedesktop.org/show_bug.cgi?id=108341 [fdo#108566]: https://bugs.freedesktop.org/show_bug.cgi?id=108566 [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271 [fdo#109276]: https://bugs.freedesktop.org/show_bug.cgi?id=109276 [fdo#109278]: https://bugs.freedesktop.org/show_bug.cgi?id=109278 [fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441 [fdo#109642]: https://bugs.freedesktop.org/show_bug.cgi?id=109642 [fdo#110403]: https://bugs.freedesktop.org/show_bug.cgi?id=110403 [fdo#110728]: https://bugs.freedesktop.org/show_bug.cgi?id=110728 [fdo#111068]: https://bugs.freedesktop.org/show_bug.cgi?id=111068 [fdo#111325]: https://bugs.freedesktop.org/show_bug.cgi?id=111325 [fdo#111330]: https://bugs.freedesktop.org/show_bug.cgi?id=111330 [fdo#111609]: https://bugs.freedesktop.org/show_bug.cgi?id=111609 [fdo#99912]: https://bugs.freedesktop.org/show_bug.cgi?id=99912 Participating hosts (9 -> 10) ------------------------------ Additional (1): pig-hsw-4770r Build changes ------------- * CI: CI-20190529 -> None * Linux: CI_DRM_6920 -> Patchwork_14455 CI-20190529: 20190529 CI_DRM_6920: 7b7f2c82b41efd0468f75fa935687f670c6bd9e3 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_5192: 77c53210779c30cfb8a4ca2312675fe5be94f4d5 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_14455: e5422e652e533a2010fb807c007bc2d2d435f5b1 @ git://anongit.freedesktop.org/gfx-ci/linux piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14455/ _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 13+ messages in thread
end of thread, other threads:[~2019-09-20 0:16 UTC | newest] Thread overview: 13+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2019-09-15 16:37 [PATCH] drm/i915/selftests: Exercise CS TLB invalidation Chris Wilson 2019-09-15 16:59 ` ✗ Fi.CI.CHECKPATCH: warning for " Patchwork 2019-09-15 17:21 ` ✓ Fi.CI.BAT: success " Patchwork 2019-09-16 8:42 ` ✓ Fi.CI.IGT: " Patchwork 2019-09-19 12:57 ` [PATCH] " Mika Kuoppala 2019-09-19 13:08 ` Chris Wilson 2019-09-19 13:39 ` Mika Kuoppala 2019-09-19 13:46 ` Chris Wilson 2019-09-19 13:14 ` [PATCH v2] " Chris Wilson 2019-09-19 13:40 ` Mika Kuoppala 2019-09-19 14:48 ` ✗ Fi.CI.CHECKPATCH: warning for drm/i915/selftests: Exercise CS TLB invalidation (rev2) Patchwork 2019-09-19 15:10 ` ✓ Fi.CI.BAT: success " Patchwork 2019-09-20 0:16 ` ✓ Fi.CI.IGT: " Patchwork
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