From: Marc Zyngier <maz@kernel.org> To: kvmarm@lists.cs.columbia.edu, linux-kernel@vger.kernel.org Cc: Eric Auger <eric.auger@redhat.com>, James Morse <james.morse@arm.com>, Julien Thierry <julien.thierry.kdev@gmail.com>, Suzuki K Poulose <suzuki.poulose@arm.com>, Thomas Gleixner <tglx@linutronix.de>, Jason Cooper <jason@lakedaemon.net>, Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>, Andrew Murray <Andrew.Murray@arm.com> Subject: [PATCH 26/35] irqchip/gic-v4.1: Plumb get/set_irqchip_state SGI callbacks Date: Mon, 23 Sep 2019 19:25:57 +0100 [thread overview] Message-ID: <20190923182606.32100-27-maz@kernel.org> (raw) In-Reply-To: <20190923182606.32100-1-maz@kernel.org> To implement the get/set_irqchip_state callbacks (limited to the PENDING state), we have to use a particular set of hacks: - Reading the pending state is done by using a pair of new redistributor registers (GICR_VSGIR, GICR_VSGIPENDR), which allow the 16 interrupts state to be retrieved. - Setting the pending state is done by generating it as we'd otherwise do for a guest (writing to GITS_SGIR) - Clearing the pending state is done by emiting a VSGI command with the "clear" bit set. Signed-off-by: Marc Zyngier <maz@kernel.org> --- drivers/irqchip/irq-gic-v3-its.c | 56 ++++++++++++++++++++++++++++++ include/linux/irqchip/arm-gic-v3.h | 14 ++++++++ 2 files changed, 70 insertions(+) diff --git a/drivers/irqchip/irq-gic-v3-its.c b/drivers/irqchip/irq-gic-v3-its.c index 727a890f72ae..5e67dfe1c4b1 100644 --- a/drivers/irqchip/irq-gic-v3-its.c +++ b/drivers/irqchip/irq-gic-v3-its.c @@ -3683,11 +3683,67 @@ static int its_sgi_set_affinity(struct irq_data *d, return -EINVAL; } +static int its_sgi_set_irqchip_state(struct irq_data *d, + enum irqchip_irq_state which, + bool state) +{ + if (which != IRQCHIP_STATE_PENDING) + return -EINVAL; + + if (state) { + struct its_vpe *vpe = irq_data_get_irq_chip_data(d); + struct its_node *its = find_4_1_its(); + u64 val; + + val = FIELD_PREP(GITS_SGIR_VPEID, vpe->vpe_id); + val |= FIELD_PREP(GITS_SGIR_VINTID, d->hwirq); + writeq_relaxed(val, its->sgir_base + GITS_SGIR - SZ_128K); + } else { + its_configure_sgi(d, true); + } + + return 0; +} + +static int its_sgi_get_irqchip_state(struct irq_data *d, + enum irqchip_irq_state which, bool *val) +{ + struct its_vpe *vpe = irq_data_get_irq_chip_data(d); + void __iomem *base = gic_data_rdist_cpu(vpe->col_idx)->rd_base + SZ_128K; + u32 count = 1000000; /* 1s! */ + u32 status; + + if (which != IRQCHIP_STATE_PENDING) + return -EINVAL; + + writel_relaxed(vpe->vpe_id, base + GICR_VSGIR); + do { + status = readl_relaxed(base + GICR_VSGIPENDR); + if (!(status & GICR_VSGIPENDR_BUSY)) + goto out; + + count--; + if (!count) { + pr_err_ratelimited("Unable to get SGI status\n"); + goto out; + } + cpu_relax(); + udelay(1); + } while(count); + +out: + *val = !!(status & (1 << d->hwirq)); + + return 0; +} + static struct irq_chip its_sgi_irq_chip = { .name = "GICv4.1-sgi", .irq_mask = its_sgi_mask_irq, .irq_unmask = its_sgi_unmask_irq, .irq_set_affinity = its_sgi_set_affinity, + .irq_set_irqchip_state = its_sgi_set_irqchip_state, + .irq_get_irqchip_state = its_sgi_get_irqchip_state, }; static int its_sgi_irq_domain_alloc(struct irq_domain *domain, diff --git a/include/linux/irqchip/arm-gic-v3.h b/include/linux/irqchip/arm-gic-v3.h index c73176d3ab2b..cb8563554ed2 100644 --- a/include/linux/irqchip/arm-gic-v3.h +++ b/include/linux/irqchip/arm-gic-v3.h @@ -340,6 +340,15 @@ #define GICR_VPENDBASER_4_1_VGRP1EN (1ULL << 58) #define GICR_VPENDBASER_4_1_VPEID GENMASK_ULL(15, 0) +#define GICR_VSGIR 0x0080 + +#define GICR_VSGIR_VPEID GENMASK(15, 0) + +#define GICR_VSGIPENDR 0x0088 + +#define GICR_VSGIPENDR_BUSY (1U << 31) +#define GICR_VSGIPENDR_PENDING GENMASK(15, 0) + /* * ITS registers, offsets from ITS_base */ @@ -363,6 +372,11 @@ #define GITS_TRANSLATER 0x10040 +#define GITS_SGIR 0x20020 + +#define GITS_SGIR_VPEID GENMASK_ULL(47, 32) +#define GITS_SGIR_VINTID GENMASK_ULL(7, 0) + #define GITS_CTLR_ENABLE (1U << 0) #define GITS_CTLR_ImDe (1U << 1) #define GITS_CTLR_ITS_NUMBER_SHIFT 4 -- 2.20.1
WARNING: multiple messages have this Message-ID (diff)
From: Marc Zyngier <maz@kernel.org> To: kvmarm@lists.cs.columbia.edu, linux-kernel@vger.kernel.org Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>, Jason Cooper <jason@lakedaemon.net>, Thomas Gleixner <tglx@linutronix.de> Subject: [PATCH 26/35] irqchip/gic-v4.1: Plumb get/set_irqchip_state SGI callbacks Date: Mon, 23 Sep 2019 19:25:57 +0100 [thread overview] Message-ID: <20190923182606.32100-27-maz@kernel.org> (raw) In-Reply-To: <20190923182606.32100-1-maz@kernel.org> To implement the get/set_irqchip_state callbacks (limited to the PENDING state), we have to use a particular set of hacks: - Reading the pending state is done by using a pair of new redistributor registers (GICR_VSGIR, GICR_VSGIPENDR), which allow the 16 interrupts state to be retrieved. - Setting the pending state is done by generating it as we'd otherwise do for a guest (writing to GITS_SGIR) - Clearing the pending state is done by emiting a VSGI command with the "clear" bit set. Signed-off-by: Marc Zyngier <maz@kernel.org> --- drivers/irqchip/irq-gic-v3-its.c | 56 ++++++++++++++++++++++++++++++ include/linux/irqchip/arm-gic-v3.h | 14 ++++++++ 2 files changed, 70 insertions(+) diff --git a/drivers/irqchip/irq-gic-v3-its.c b/drivers/irqchip/irq-gic-v3-its.c index 727a890f72ae..5e67dfe1c4b1 100644 --- a/drivers/irqchip/irq-gic-v3-its.c +++ b/drivers/irqchip/irq-gic-v3-its.c @@ -3683,11 +3683,67 @@ static int its_sgi_set_affinity(struct irq_data *d, return -EINVAL; } +static int its_sgi_set_irqchip_state(struct irq_data *d, + enum irqchip_irq_state which, + bool state) +{ + if (which != IRQCHIP_STATE_PENDING) + return -EINVAL; + + if (state) { + struct its_vpe *vpe = irq_data_get_irq_chip_data(d); + struct its_node *its = find_4_1_its(); + u64 val; + + val = FIELD_PREP(GITS_SGIR_VPEID, vpe->vpe_id); + val |= FIELD_PREP(GITS_SGIR_VINTID, d->hwirq); + writeq_relaxed(val, its->sgir_base + GITS_SGIR - SZ_128K); + } else { + its_configure_sgi(d, true); + } + + return 0; +} + +static int its_sgi_get_irqchip_state(struct irq_data *d, + enum irqchip_irq_state which, bool *val) +{ + struct its_vpe *vpe = irq_data_get_irq_chip_data(d); + void __iomem *base = gic_data_rdist_cpu(vpe->col_idx)->rd_base + SZ_128K; + u32 count = 1000000; /* 1s! */ + u32 status; + + if (which != IRQCHIP_STATE_PENDING) + return -EINVAL; + + writel_relaxed(vpe->vpe_id, base + GICR_VSGIR); + do { + status = readl_relaxed(base + GICR_VSGIPENDR); + if (!(status & GICR_VSGIPENDR_BUSY)) + goto out; + + count--; + if (!count) { + pr_err_ratelimited("Unable to get SGI status\n"); + goto out; + } + cpu_relax(); + udelay(1); + } while(count); + +out: + *val = !!(status & (1 << d->hwirq)); + + return 0; +} + static struct irq_chip its_sgi_irq_chip = { .name = "GICv4.1-sgi", .irq_mask = its_sgi_mask_irq, .irq_unmask = its_sgi_unmask_irq, .irq_set_affinity = its_sgi_set_affinity, + .irq_set_irqchip_state = its_sgi_set_irqchip_state, + .irq_get_irqchip_state = its_sgi_get_irqchip_state, }; static int its_sgi_irq_domain_alloc(struct irq_domain *domain, diff --git a/include/linux/irqchip/arm-gic-v3.h b/include/linux/irqchip/arm-gic-v3.h index c73176d3ab2b..cb8563554ed2 100644 --- a/include/linux/irqchip/arm-gic-v3.h +++ b/include/linux/irqchip/arm-gic-v3.h @@ -340,6 +340,15 @@ #define GICR_VPENDBASER_4_1_VGRP1EN (1ULL << 58) #define GICR_VPENDBASER_4_1_VPEID GENMASK_ULL(15, 0) +#define GICR_VSGIR 0x0080 + +#define GICR_VSGIR_VPEID GENMASK(15, 0) + +#define GICR_VSGIPENDR 0x0088 + +#define GICR_VSGIPENDR_BUSY (1U << 31) +#define GICR_VSGIPENDR_PENDING GENMASK(15, 0) + /* * ITS registers, offsets from ITS_base */ @@ -363,6 +372,11 @@ #define GITS_TRANSLATER 0x10040 +#define GITS_SGIR 0x20020 + +#define GITS_SGIR_VPEID GENMASK_ULL(47, 32) +#define GITS_SGIR_VINTID GENMASK_ULL(7, 0) + #define GITS_CTLR_ENABLE (1U << 0) #define GITS_CTLR_ImDe (1U << 1) #define GITS_CTLR_ITS_NUMBER_SHIFT 4 -- 2.20.1 _______________________________________________ kvmarm mailing list kvmarm@lists.cs.columbia.edu https://lists.cs.columbia.edu/mailman/listinfo/kvmarm
next prev parent reply other threads:[~2019-09-23 18:28 UTC|newest] Thread overview: 124+ messages / expand[flat|nested] mbox.gz Atom feed top 2019-09-23 18:25 [PATCH 00/35] irqchip/gic-v4: GICv4.1 architecture support Marc Zyngier 2019-09-23 18:25 ` Marc Zyngier 2019-09-23 18:25 ` [PATCH 01/35] KVM: arm64: vgic-v4: Move the GICv4 residency flow to be driven by vcpu_load/put Marc Zyngier 2019-09-23 18:25 ` Marc Zyngier 2019-09-23 18:25 ` [PATCH 02/35] irqchip/gic-v3-its: Factor out wait_for_syncr primitive Marc Zyngier 2019-09-23 18:25 ` Marc Zyngier 2019-09-24 8:58 ` Andrew Murray 2019-09-24 8:58 ` Andrew Murray 2019-09-23 18:25 ` [PATCH 03/35] irqchip/gic-v3-its: Allow LPI invalidation via the DirectLPI interface Marc Zyngier 2019-09-23 18:25 ` Marc Zyngier 2019-09-26 14:57 ` Zenghui Yu 2019-09-26 14:57 ` Zenghui Yu 2019-09-26 15:34 ` Marc Zyngier 2019-09-26 15:34 ` Marc Zyngier 2019-09-26 16:17 ` Marc Zyngier 2019-09-26 16:17 ` Marc Zyngier 2019-09-27 6:59 ` Zenghui Yu 2019-09-27 6:59 ` Zenghui Yu 2019-09-23 18:25 ` [PATCH 04/35] irqchip/gic-v3: Detect GICv4.1 supporting RVPEID Marc Zyngier 2019-09-23 18:25 ` Marc Zyngier 2019-09-24 10:24 ` Andrew Murray 2019-09-24 10:24 ` Andrew Murray 2019-09-24 10:49 ` Marc Zyngier 2019-09-24 10:49 ` Marc Zyngier 2019-09-24 11:00 ` Andrew Murray 2019-09-24 11:00 ` Andrew Murray 2019-09-24 11:18 ` Marc Zyngier 2019-09-24 11:18 ` Marc Zyngier 2019-09-23 18:25 ` [PATCH 05/35] irqchip/gic-v3: Add GICv4.1 VPEID size discovery Marc Zyngier 2019-09-23 18:25 ` Marc Zyngier 2019-09-24 10:49 ` Andrew Murray 2019-09-24 10:49 ` Andrew Murray 2019-09-24 11:00 ` Marc Zyngier 2019-09-24 11:00 ` Marc Zyngier 2019-09-23 18:25 ` [PATCH 06/35] irqchip/gic-v3-its: Make is_v4 use a TYPER copy Marc Zyngier 2019-09-23 18:25 ` Marc Zyngier 2019-09-23 18:25 ` [PATCH 07/35] irqchip/gic-v3-its: Kill its->ite_size and use TYPER copy instead Marc Zyngier 2019-09-23 18:25 ` Marc Zyngier 2019-09-23 18:25 ` [PATCH 08/35] irqchip/gic-v3-its: Kill its->device_ids " Marc Zyngier 2019-09-23 18:25 ` Marc Zyngier 2019-09-23 18:25 ` [PATCH 09/35] irqchip/gic-v3-its: Add get_vlpi_map() helper Marc Zyngier 2019-09-23 18:25 ` Marc Zyngier 2019-09-23 18:25 ` [PATCH 10/35] irqchip/gic-v4.1: VPE table (aka GICR_VPROPBASER) allocation Marc Zyngier 2019-09-23 18:25 ` Marc Zyngier 2019-09-25 13:04 ` Zenghui Yu 2019-09-25 13:04 ` Zenghui Yu 2019-09-25 14:41 ` Marc Zyngier 2019-09-25 14:41 ` Marc Zyngier 2019-09-25 17:14 ` Marc Zyngier 2019-09-25 17:14 ` Marc Zyngier 2019-09-26 15:19 ` Zenghui Yu 2019-09-26 15:19 ` Zenghui Yu 2019-09-26 15:57 ` Marc Zyngier 2019-09-26 15:57 ` Marc Zyngier 2019-09-26 16:27 ` Marc Zyngier 2019-09-26 16:27 ` Marc Zyngier 2019-09-27 2:01 ` Zenghui Yu 2019-09-27 2:01 ` Zenghui Yu 2019-09-27 1:59 ` Zenghui Yu 2019-09-27 1:59 ` Zenghui Yu 2019-09-23 18:25 ` [PATCH 11/35] irqchip/gic-v4.1: Implement the v4.1 flavour of VMAPP Marc Zyngier 2019-09-23 18:25 ` Marc Zyngier 2019-09-23 18:25 ` [PATCH 12/35] irqchip/gic-v4.1: Don't use the VPE proxy if RVPEID is set Marc Zyngier 2019-09-23 18:25 ` Marc Zyngier 2019-09-23 18:25 ` [PATCH 13/35] irqchip/gic-v4.1: Implement the v4.1 flavour of VMOVP Marc Zyngier 2019-09-23 18:25 ` Marc Zyngier 2019-09-23 18:25 ` [PATCH 14/35] irqchip/gic-v4.1: Plumb skeletal VPE irqchip Marc Zyngier 2019-09-23 18:25 ` Marc Zyngier 2019-09-23 18:25 ` [PATCH 15/35] irqchip/gic-v4.1: Add mask/unmask doorbell callbacks Marc Zyngier 2019-09-23 18:25 ` Marc Zyngier 2019-09-23 18:25 ` [PATCH 16/35] irqchip/gic-v4.1: Add VPE residency callback Marc Zyngier 2019-09-23 18:25 ` Marc Zyngier 2019-09-23 18:25 ` [PATCH 17/35] irqchip/gic-v4.1: Add VPE eviction callback Marc Zyngier 2019-09-23 18:25 ` Marc Zyngier 2019-09-23 18:25 ` [PATCH 18/35] irqchip/gic-v4.1: Add VPE INVALL callback Marc Zyngier 2019-09-23 18:25 ` Marc Zyngier 2019-09-23 18:25 ` [PATCH 19/35] irqchip/gic-v4.1: Suppress per-VLPI doorbell Marc Zyngier 2019-09-23 18:25 ` Marc Zyngier 2019-09-23 18:25 ` [PATCH 20/35] irqchip/gic-v4.1: Allow direct invalidation of VLPIs Marc Zyngier 2019-09-23 18:25 ` Marc Zyngier 2019-09-28 2:02 ` Zenghui Yu 2019-09-28 2:02 ` Zenghui Yu 2019-09-30 9:20 ` Marc Zyngier 2019-09-30 9:20 ` Marc Zyngier 2019-09-30 9:40 ` Zenghui Yu 2019-09-30 9:40 ` Zenghui Yu 2019-09-23 18:25 ` [PATCH 21/35] irqchip/gic-v4.1: Advertise support v4.1 to KVM Marc Zyngier 2019-09-23 18:25 ` Marc Zyngier 2019-09-23 18:25 ` [PATCH 22/35] irqchip/gic-v4.1: Map the ITS SGIR register page Marc Zyngier 2019-09-23 18:25 ` Marc Zyngier 2019-09-23 18:25 ` [PATCH 23/35] irqchip/gic-v4.1: Plumb skeletal VSGI irqchip Marc Zyngier 2019-09-23 18:25 ` Marc Zyngier 2019-09-23 18:25 ` [PATCH 24/35] irqchip/gic-v4.1: Add initial SGI configuration Marc Zyngier 2019-09-23 18:25 ` Marc Zyngier 2019-09-28 2:20 ` Zenghui Yu 2019-09-28 2:20 ` Zenghui Yu 2019-09-28 3:07 ` Zenghui Yu 2019-09-28 3:07 ` Zenghui Yu 2019-09-23 18:25 ` [PATCH 25/35] irqchip/gic-v4.1: Plumb mask/unmask SGI callbacks Marc Zyngier 2019-09-23 18:25 ` Marc Zyngier 2019-09-23 18:25 ` Marc Zyngier [this message] 2019-09-23 18:25 ` [PATCH 26/35] irqchip/gic-v4.1: Plumb get/set_irqchip_state " Marc Zyngier 2019-09-23 18:25 ` [PATCH 27/35] irqchip/gic-v4.1: Plumb set_vcpu_affinity " Marc Zyngier 2019-09-23 18:25 ` Marc Zyngier 2019-09-23 18:25 ` [PATCH 28/35] irqchip/gic-v4.1: Move doorbell management to the GICv4 abstraction layer Marc Zyngier 2019-09-23 18:25 ` Marc Zyngier 2019-09-23 18:26 ` [PATCH 29/35] irqchip/gic-v4.1: Add VSGI allocation/teardown Marc Zyngier 2019-09-23 18:26 ` Marc Zyngier 2019-09-23 18:26 ` [PATCH 30/35] irqchip/gic-v4.1: Add VSGI property setup Marc Zyngier 2019-09-23 18:26 ` Marc Zyngier 2019-09-23 18:26 ` [PATCH 31/35] irqchip/gic-v4.1: Eagerly vmap vPEs Marc Zyngier 2019-09-23 18:26 ` Marc Zyngier 2019-09-28 3:11 ` Zenghui Yu 2019-09-28 3:11 ` Zenghui Yu 2019-09-30 9:23 ` Marc Zyngier 2019-09-30 9:23 ` Marc Zyngier 2019-09-23 18:26 ` [PATCH 32/35] KVM: arm64: GICv4.1: Let doorbells be auto-enabled Marc Zyngier 2019-09-23 18:26 ` Marc Zyngier 2019-09-23 18:26 ` [PATCH 33/35] KVM: arm64: GICv4.1: Add direct injection capability to SGI registers Marc Zyngier 2019-09-23 18:26 ` Marc Zyngier 2019-09-23 18:26 ` [PATCH 34/35] KVM: arm64: GICv4.1: Configure SGIs as HW interrupts Marc Zyngier 2019-09-23 18:26 ` Marc Zyngier 2019-09-23 18:26 ` [PATCH 35/35] KVM: arm64: GICv4.1: Expose HW-based SGIs in debugfs Marc Zyngier 2019-09-23 18:26 ` Marc Zyngier
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