* [PATCH v3 0/4] drm/edid: Add new modes from CTA-861-G
@ 2019-09-25 13:54 Ville Syrjala
2019-09-25 13:54 ` [PATCH v3 1/4] drm/edid: Abstract away cea_edid_modes[] Ville Syrjala
` (10 more replies)
0 siblings, 11 replies; 25+ messages in thread
From: Ville Syrjala @ 2019-09-25 13:54 UTC (permalink / raw)
To: dri-devel; +Cc: intel-gfc
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Remainder of the new CTA-861-G modes. I already pushed the first patch
adding the modes with VIC<128. I did improve the BUILD_BUG_ON()s in the
last patch a bit to make it easier to visually double check the numbers
against VIC comments in the mode arrays.
Ville Syrjälä (4):
drm/edid: Abstract away cea_edid_modes[]
drm/edid: Add CTA-861-G modes with VIC >= 193
drm/edid: Throw away the dummy VIC 0 cea mode
drm/edid: Make sure the CEA mode arrays have the correct amount of
modes
drivers/gpu/drm/drm_edid.c | 230 +++++++++++++++++++++++++++++++++----
1 file changed, 206 insertions(+), 24 deletions(-)
--
2.21.0
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^ permalink raw reply [flat|nested] 25+ messages in thread
* [PATCH v3 1/4] drm/edid: Abstract away cea_edid_modes[]
2019-09-25 13:54 [PATCH v3 0/4] drm/edid: Add new modes from CTA-861-G Ville Syrjala
@ 2019-09-25 13:54 ` Ville Syrjala
2019-10-03 8:16 ` Sharma, Shashank
[not found] ` <20191210223423.GA85292@google.com>
2019-09-25 13:54 ` [PATCH v3 1/4] " Ville Syrjala
` (9 subsequent siblings)
10 siblings, 2 replies; 25+ messages in thread
From: Ville Syrjala @ 2019-09-25 13:54 UTC (permalink / raw)
To: dri-devel; +Cc: intel-gfc, Hans Verkuil
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
We're going to need two cea mode tables (on for VICs < 128,
another one for VICs >= 193). To that end replace the direct
edid_cea_modes[] lookups with a function call. And we'll rename
the array to edid_cea_modes_0[] to indicathe how it's to be
indexed.
Cc: Hans Verkuil <hansverk@cisco.com>
Cc: Shashank Sharma <shashank.sharma@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/drm_edid.c | 80 +++++++++++++++++++++++++++-----------
1 file changed, 58 insertions(+), 22 deletions(-)
diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
index 3c9703b08491..b700fc075257 100644
--- a/drivers/gpu/drm/drm_edid.c
+++ b/drivers/gpu/drm/drm_edid.c
@@ -707,12 +707,11 @@ static const struct minimode extra_modes[] = {
};
/*
- * Probably taken from CEA-861 spec.
- * This table is converted from xorg's hw/xfree86/modes/xf86EdidModes.c.
+ * From CEA/CTA-861 spec.
*
- * Index using the VIC.
+ * Index with VIC.
*/
-static const struct drm_display_mode edid_cea_modes[] = {
+static const struct drm_display_mode edid_cea_modes_0[] = {
/* 0 - dummy, VICs start at 1 */
{ },
/* 1 - 640x480@60Hz 4:3 */
@@ -3067,6 +3066,25 @@ static u8 *drm_find_cea_extension(const struct edid *edid)
return cea;
}
+static const struct drm_display_mode *cea_mode_for_vic(u8 vic)
+{
+ if (!vic)
+ return NULL;
+ if (vic < ARRAY_SIZE(edid_cea_modes_0))
+ return &edid_cea_modes_0[vic];
+ return NULL;
+}
+
+static u8 cea_num_vics(void)
+{
+ return ARRAY_SIZE(edid_cea_modes_0);
+}
+
+static u8 cea_next_vic(u8 vic)
+{
+ return vic + 1;
+}
+
/*
* Calculate the alternate clock for the CEA mode
* (60Hz vs. 59.94Hz etc.)
@@ -3104,14 +3122,14 @@ cea_mode_alternate_timings(u8 vic, struct drm_display_mode *mode)
* get the other variants by simply increasing the
* vertical front porch length.
*/
- BUILD_BUG_ON(edid_cea_modes[8].vtotal != 262 ||
- edid_cea_modes[9].vtotal != 262 ||
- edid_cea_modes[12].vtotal != 262 ||
- edid_cea_modes[13].vtotal != 262 ||
- edid_cea_modes[23].vtotal != 312 ||
- edid_cea_modes[24].vtotal != 312 ||
- edid_cea_modes[27].vtotal != 312 ||
- edid_cea_modes[28].vtotal != 312);
+ BUILD_BUG_ON(cea_mode_for_vic(8)->vtotal != 262 ||
+ cea_mode_for_vic(9)->vtotal != 262 ||
+ cea_mode_for_vic(12)->vtotal != 262 ||
+ cea_mode_for_vic(13)->vtotal != 262 ||
+ cea_mode_for_vic(23)->vtotal != 312 ||
+ cea_mode_for_vic(24)->vtotal != 312 ||
+ cea_mode_for_vic(27)->vtotal != 312 ||
+ cea_mode_for_vic(28)->vtotal != 312);
if (((vic == 8 || vic == 9 ||
vic == 12 || vic == 13) && mode->vtotal < 263) ||
@@ -3139,10 +3157,16 @@ static u8 drm_match_cea_mode_clock_tolerance(const struct drm_display_mode *to_m
if (to_match->picture_aspect_ratio)
match_flags |= DRM_MODE_MATCH_ASPECT_RATIO;
- for (vic = 1; vic < ARRAY_SIZE(edid_cea_modes); vic++) {
- struct drm_display_mode cea_mode = edid_cea_modes[vic];
+ for (vic = 1; vic < cea_num_vics(); vic = cea_next_vic(vic)) {
+ const struct drm_display_mode *mode = cea_mode_for_vic(vic);
+ struct drm_display_mode cea_mode;
unsigned int clock1, clock2;
+ if (!mode)
+ continue;
+
+ cea_mode = *mode;
+
/* Check both 60Hz and 59.94Hz */
clock1 = cea_mode.clock;
clock2 = cea_mode_alternate_clock(&cea_mode);
@@ -3178,10 +3202,16 @@ u8 drm_match_cea_mode(const struct drm_display_mode *to_match)
if (to_match->picture_aspect_ratio)
match_flags |= DRM_MODE_MATCH_ASPECT_RATIO;
- for (vic = 1; vic < ARRAY_SIZE(edid_cea_modes); vic++) {
- struct drm_display_mode cea_mode = edid_cea_modes[vic];
+ for (vic = 1; vic < cea_num_vics(); vic = cea_next_vic(vic)) {
+ const struct drm_display_mode *mode = cea_mode_for_vic(vic);
+ struct drm_display_mode cea_mode;
unsigned int clock1, clock2;
+ if (!mode)
+ continue;
+
+ cea_mode = *mode;
+
/* Check both 60Hz and 59.94Hz */
clock1 = cea_mode.clock;
clock2 = cea_mode_alternate_clock(&cea_mode);
@@ -3202,7 +3232,7 @@ EXPORT_SYMBOL(drm_match_cea_mode);
static bool drm_valid_cea_vic(u8 vic)
{
- return vic > 0 && vic < ARRAY_SIZE(edid_cea_modes);
+ return cea_mode_for_vic(vic) != NULL;
}
/**
@@ -3214,7 +3244,13 @@ static bool drm_valid_cea_vic(u8 vic)
*/
enum hdmi_picture_aspect drm_get_cea_aspect_ratio(const u8 video_code)
{
- return edid_cea_modes[video_code].picture_aspect_ratio;
+ const struct drm_display_mode *mode;
+
+ mode = cea_mode_for_vic(video_code);
+ if (mode)
+ return mode->picture_aspect_ratio;
+
+ return HDMI_PICTURE_ASPECT_NONE;
}
EXPORT_SYMBOL(drm_get_cea_aspect_ratio);
@@ -3323,7 +3359,7 @@ add_alternate_cea_modes(struct drm_connector *connector, struct edid *edid)
unsigned int clock1, clock2;
if (drm_valid_cea_vic(vic)) {
- cea_mode = &edid_cea_modes[vic];
+ cea_mode = cea_mode_for_vic(vic);
clock2 = cea_mode_alternate_clock(cea_mode);
} else {
vic = drm_match_hdmi_mode(mode);
@@ -3398,7 +3434,7 @@ drm_display_mode_from_vic_index(struct drm_connector *connector,
if (!drm_valid_cea_vic(vic))
return NULL;
- newmode = drm_mode_duplicate(dev, &edid_cea_modes[vic]);
+ newmode = drm_mode_duplicate(dev, cea_mode_for_vic(vic));
if (!newmode)
return NULL;
@@ -3432,7 +3468,7 @@ static int do_y420vdb_modes(struct drm_connector *connector,
if (!drm_valid_cea_vic(vic))
continue;
- newmode = drm_mode_duplicate(dev, &edid_cea_modes[vic]);
+ newmode = drm_mode_duplicate(dev, cea_mode_for_vic(vic));
if (!newmode)
break;
bitmap_set(hdmi->y420_vdb_modes, vic, 1);
@@ -4001,7 +4037,7 @@ static void fixup_detailed_cea_mode_clock(struct drm_display_mode *mode)
vic = drm_match_cea_mode_clock_tolerance(mode, 5);
if (drm_valid_cea_vic(vic)) {
type = "CEA";
- cea_mode = &edid_cea_modes[vic];
+ cea_mode = cea_mode_for_vic(vic);
clock1 = cea_mode->clock;
clock2 = cea_mode_alternate_clock(cea_mode);
} else {
--
2.21.0
_______________________________________________
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dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel
^ permalink raw reply related [flat|nested] 25+ messages in thread
* [PATCH v3 1/4] drm/edid: Abstract away cea_edid_modes[]
2019-09-25 13:54 [PATCH v3 0/4] drm/edid: Add new modes from CTA-861-G Ville Syrjala
2019-09-25 13:54 ` [PATCH v3 1/4] drm/edid: Abstract away cea_edid_modes[] Ville Syrjala
@ 2019-09-25 13:54 ` Ville Syrjala
2019-09-25 13:55 ` [PATCH v3 2/4] drm/edid: Add CTA-861-G modes with VIC >= 193 Ville Syrjala
` (8 subsequent siblings)
10 siblings, 0 replies; 25+ messages in thread
From: Ville Syrjala @ 2019-09-25 13:54 UTC (permalink / raw)
To: dri-devel; +Cc: intel-gfc, Hans Verkuil
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
We're going to need two cea mode tables (on for VICs < 128,
another one for VICs >= 193). To that end replace the direct
edid_cea_modes[] lookups with a function call. And we'll rename
the array to edid_cea_modes_0[] to indicathe how it's to be
indexed.
Cc: Hans Verkuil <hansverk@cisco.com>
Cc: Shashank Sharma <shashank.sharma@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/drm_edid.c | 80 +++++++++++++++++++++++++++-----------
1 file changed, 58 insertions(+), 22 deletions(-)
diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
index 3c9703b08491..b700fc075257 100644
--- a/drivers/gpu/drm/drm_edid.c
+++ b/drivers/gpu/drm/drm_edid.c
@@ -707,12 +707,11 @@ static const struct minimode extra_modes[] = {
};
/*
- * Probably taken from CEA-861 spec.
- * This table is converted from xorg's hw/xfree86/modes/xf86EdidModes.c.
+ * From CEA/CTA-861 spec.
*
- * Index using the VIC.
+ * Index with VIC.
*/
-static const struct drm_display_mode edid_cea_modes[] = {
+static const struct drm_display_mode edid_cea_modes_0[] = {
/* 0 - dummy, VICs start at 1 */
{ },
/* 1 - 640x480@60Hz 4:3 */
@@ -3067,6 +3066,25 @@ static u8 *drm_find_cea_extension(const struct edid *edid)
return cea;
}
+static const struct drm_display_mode *cea_mode_for_vic(u8 vic)
+{
+ if (!vic)
+ return NULL;
+ if (vic < ARRAY_SIZE(edid_cea_modes_0))
+ return &edid_cea_modes_0[vic];
+ return NULL;
+}
+
+static u8 cea_num_vics(void)
+{
+ return ARRAY_SIZE(edid_cea_modes_0);
+}
+
+static u8 cea_next_vic(u8 vic)
+{
+ return vic + 1;
+}
+
/*
* Calculate the alternate clock for the CEA mode
* (60Hz vs. 59.94Hz etc.)
@@ -3104,14 +3122,14 @@ cea_mode_alternate_timings(u8 vic, struct drm_display_mode *mode)
* get the other variants by simply increasing the
* vertical front porch length.
*/
- BUILD_BUG_ON(edid_cea_modes[8].vtotal != 262 ||
- edid_cea_modes[9].vtotal != 262 ||
- edid_cea_modes[12].vtotal != 262 ||
- edid_cea_modes[13].vtotal != 262 ||
- edid_cea_modes[23].vtotal != 312 ||
- edid_cea_modes[24].vtotal != 312 ||
- edid_cea_modes[27].vtotal != 312 ||
- edid_cea_modes[28].vtotal != 312);
+ BUILD_BUG_ON(cea_mode_for_vic(8)->vtotal != 262 ||
+ cea_mode_for_vic(9)->vtotal != 262 ||
+ cea_mode_for_vic(12)->vtotal != 262 ||
+ cea_mode_for_vic(13)->vtotal != 262 ||
+ cea_mode_for_vic(23)->vtotal != 312 ||
+ cea_mode_for_vic(24)->vtotal != 312 ||
+ cea_mode_for_vic(27)->vtotal != 312 ||
+ cea_mode_for_vic(28)->vtotal != 312);
if (((vic == 8 || vic == 9 ||
vic == 12 || vic == 13) && mode->vtotal < 263) ||
@@ -3139,10 +3157,16 @@ static u8 drm_match_cea_mode_clock_tolerance(const struct drm_display_mode *to_m
if (to_match->picture_aspect_ratio)
match_flags |= DRM_MODE_MATCH_ASPECT_RATIO;
- for (vic = 1; vic < ARRAY_SIZE(edid_cea_modes); vic++) {
- struct drm_display_mode cea_mode = edid_cea_modes[vic];
+ for (vic = 1; vic < cea_num_vics(); vic = cea_next_vic(vic)) {
+ const struct drm_display_mode *mode = cea_mode_for_vic(vic);
+ struct drm_display_mode cea_mode;
unsigned int clock1, clock2;
+ if (!mode)
+ continue;
+
+ cea_mode = *mode;
+
/* Check both 60Hz and 59.94Hz */
clock1 = cea_mode.clock;
clock2 = cea_mode_alternate_clock(&cea_mode);
@@ -3178,10 +3202,16 @@ u8 drm_match_cea_mode(const struct drm_display_mode *to_match)
if (to_match->picture_aspect_ratio)
match_flags |= DRM_MODE_MATCH_ASPECT_RATIO;
- for (vic = 1; vic < ARRAY_SIZE(edid_cea_modes); vic++) {
- struct drm_display_mode cea_mode = edid_cea_modes[vic];
+ for (vic = 1; vic < cea_num_vics(); vic = cea_next_vic(vic)) {
+ const struct drm_display_mode *mode = cea_mode_for_vic(vic);
+ struct drm_display_mode cea_mode;
unsigned int clock1, clock2;
+ if (!mode)
+ continue;
+
+ cea_mode = *mode;
+
/* Check both 60Hz and 59.94Hz */
clock1 = cea_mode.clock;
clock2 = cea_mode_alternate_clock(&cea_mode);
@@ -3202,7 +3232,7 @@ EXPORT_SYMBOL(drm_match_cea_mode);
static bool drm_valid_cea_vic(u8 vic)
{
- return vic > 0 && vic < ARRAY_SIZE(edid_cea_modes);
+ return cea_mode_for_vic(vic) != NULL;
}
/**
@@ -3214,7 +3244,13 @@ static bool drm_valid_cea_vic(u8 vic)
*/
enum hdmi_picture_aspect drm_get_cea_aspect_ratio(const u8 video_code)
{
- return edid_cea_modes[video_code].picture_aspect_ratio;
+ const struct drm_display_mode *mode;
+
+ mode = cea_mode_for_vic(video_code);
+ if (mode)
+ return mode->picture_aspect_ratio;
+
+ return HDMI_PICTURE_ASPECT_NONE;
}
EXPORT_SYMBOL(drm_get_cea_aspect_ratio);
@@ -3323,7 +3359,7 @@ add_alternate_cea_modes(struct drm_connector *connector, struct edid *edid)
unsigned int clock1, clock2;
if (drm_valid_cea_vic(vic)) {
- cea_mode = &edid_cea_modes[vic];
+ cea_mode = cea_mode_for_vic(vic);
clock2 = cea_mode_alternate_clock(cea_mode);
} else {
vic = drm_match_hdmi_mode(mode);
@@ -3398,7 +3434,7 @@ drm_display_mode_from_vic_index(struct drm_connector *connector,
if (!drm_valid_cea_vic(vic))
return NULL;
- newmode = drm_mode_duplicate(dev, &edid_cea_modes[vic]);
+ newmode = drm_mode_duplicate(dev, cea_mode_for_vic(vic));
if (!newmode)
return NULL;
@@ -3432,7 +3468,7 @@ static int do_y420vdb_modes(struct drm_connector *connector,
if (!drm_valid_cea_vic(vic))
continue;
- newmode = drm_mode_duplicate(dev, &edid_cea_modes[vic]);
+ newmode = drm_mode_duplicate(dev, cea_mode_for_vic(vic));
if (!newmode)
break;
bitmap_set(hdmi->y420_vdb_modes, vic, 1);
@@ -4001,7 +4037,7 @@ static void fixup_detailed_cea_mode_clock(struct drm_display_mode *mode)
vic = drm_match_cea_mode_clock_tolerance(mode, 5);
if (drm_valid_cea_vic(vic)) {
type = "CEA";
- cea_mode = &edid_cea_modes[vic];
+ cea_mode = cea_mode_for_vic(vic);
clock1 = cea_mode->clock;
clock2 = cea_mode_alternate_clock(cea_mode);
} else {
--
2.21.0
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 25+ messages in thread
* [PATCH v3 2/4] drm/edid: Add CTA-861-G modes with VIC >= 193
2019-09-25 13:54 [PATCH v3 0/4] drm/edid: Add new modes from CTA-861-G Ville Syrjala
` (2 preceding siblings ...)
2019-09-25 13:55 ` [PATCH v3 2/4] drm/edid: Add CTA-861-G modes with VIC >= 193 Ville Syrjala
@ 2019-09-25 13:55 ` Ville Syrjala
2019-09-27 21:35 ` Manasi Navare
` (2 more replies)
2019-09-25 13:55 ` [PATCH v3 3/4] drm/edid: Throw away the dummy VIC 0 cea mode Ville Syrjala
` (6 subsequent siblings)
10 siblings, 3 replies; 25+ messages in thread
From: Ville Syrjala @ 2019-09-25 13:55 UTC (permalink / raw)
To: dri-devel; +Cc: intel-gfc, Hans Verkuil
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Add a second table to the cea modes with VIC >= 193.
Cc: Hans Verkuil <hansverk@cisco.com>
Cc: Shashank Sharma <shashank.sharma@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/drm_edid.c | 151 ++++++++++++++++++++++++++++++++++++-
1 file changed, 149 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
index b700fc075257..9f6996323efa 100644
--- a/drivers/gpu/drm/drm_edid.c
+++ b/drivers/gpu/drm/drm_edid.c
@@ -1376,6 +1376,149 @@ static const struct drm_display_mode edid_cea_modes_0[] = {
.vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
};
+/*
+ * From CEA/CTA-861 spec.
+ *
+ * Index with VIC-193.
+ */
+static const struct drm_display_mode edid_cea_modes_193[] = {
+ /* 193 - 5120x2160@120Hz 64:27 */
+ { DRM_MODE("5120x2160", DRM_MODE_TYPE_DRIVER, 1485000, 5120, 5284,
+ 5372, 5500, 0, 2160, 2168, 2178, 2250, 0,
+ DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+ .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
+ /* 194 - 7680x4320@24Hz 16:9 */
+ { DRM_MODE("7680x4320", DRM_MODE_TYPE_DRIVER, 1188000, 7680, 10232,
+ 10408, 11000, 0, 4320, 4336, 4356, 4500, 0,
+ DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+ .vrefresh = 24, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
+ /* 195 - 7680x4320@25Hz 16:9 */
+ { DRM_MODE("7680x4320", DRM_MODE_TYPE_DRIVER, 1188000, 7680, 10032,
+ 10208, 10800, 0, 4320, 4336, 4356, 4400, 0,
+ DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+ .vrefresh = 25, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
+ /* 196 - 7680x4320@30Hz 16:9 */
+ { DRM_MODE("7680x4320", DRM_MODE_TYPE_DRIVER, 1188000, 7680, 8232,
+ 8408, 9000, 0, 4320, 4336, 4356, 4400, 0,
+ DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+ .vrefresh = 30, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
+ /* 197 - 7680x4320@48Hz 16:9 */
+ { DRM_MODE("7680x4320", DRM_MODE_TYPE_DRIVER, 2376000, 7680, 10232,
+ 10408, 11000, 0, 4320, 4336, 4356, 4500, 0,
+ DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+ .vrefresh = 48, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
+ /* 198 - 7680x4320@50Hz 16:9 */
+ { DRM_MODE("7680x4320", DRM_MODE_TYPE_DRIVER, 2376000, 7680, 10032,
+ 10208, 10800, 0, 4320, 4336, 4356, 4400, 0,
+ DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+ .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
+ /* 199 - 7680x4320@60Hz 16:9 */
+ { DRM_MODE("7680x4320", DRM_MODE_TYPE_DRIVER, 2376000, 7680, 8232,
+ 8408, 9000, 0, 4320, 4336, 4356, 4400, 0,
+ DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+ .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
+ /* 200 - 7680x4320@100Hz 16:9 */
+ { DRM_MODE("7680x4320", DRM_MODE_TYPE_DRIVER, 4752000, 7680, 9792,
+ 9968, 10560, 0, 4320, 4336, 4356, 4500, 0,
+ DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+ .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
+ /* 201 - 7680x4320@120Hz 16:9 */
+ { DRM_MODE("7680x4320", DRM_MODE_TYPE_DRIVER, 4752000, 7680, 8032,
+ 8208, 8800, 0, 4320, 4336, 4356, 4500, 0,
+ DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+ .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
+ /* 202 - 7680x4320@24Hz 64:27 */
+ { DRM_MODE("7680x4320", DRM_MODE_TYPE_DRIVER, 1188000, 7680, 10232,
+ 10408, 11000, 0, 4320, 4336, 4356, 4500, 0,
+ DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+ .vrefresh = 24, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
+ /* 203 - 7680x4320@25Hz 64:27 */
+ { DRM_MODE("7680x4320", DRM_MODE_TYPE_DRIVER, 1188000, 7680, 10032,
+ 10208, 10800, 0, 4320, 4336, 4356, 4400, 0,
+ DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+ .vrefresh = 25, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
+ /* 204 - 7680x4320@30Hz 64:27 */
+ { DRM_MODE("7680x4320", DRM_MODE_TYPE_DRIVER, 1188000, 7680, 8232,
+ 8408, 9000, 0, 4320, 4336, 4356, 4400, 0,
+ DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+ .vrefresh = 30, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
+ /* 205 - 7680x4320@48Hz 64:27 */
+ { DRM_MODE("7680x4320", DRM_MODE_TYPE_DRIVER, 2376000, 7680, 10232,
+ 10408, 11000, 0, 4320, 4336, 4356, 4500, 0,
+ DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+ .vrefresh = 48, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
+ /* 206 - 7680x4320@50Hz 64:27 */
+ { DRM_MODE("7680x4320", DRM_MODE_TYPE_DRIVER, 2376000, 7680, 10032,
+ 10208, 10800, 0, 4320, 4336, 4356, 4400, 0,
+ DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+ .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
+ /* 207 - 7680x4320@60Hz 64:27 */
+ { DRM_MODE("7680x4320", DRM_MODE_TYPE_DRIVER, 2376000, 7680, 8232,
+ 8408, 9000, 0, 4320, 4336, 4356, 4400, 0,
+ DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+ .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
+ /* 208 - 7680x4320@100Hz 64:27 */
+ { DRM_MODE("7680x4320", DRM_MODE_TYPE_DRIVER, 4752000, 7680, 9792,
+ 9968, 10560, 0, 4320, 4336, 4356, 4500, 0,
+ DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+ .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
+ /* 209 - 7680x4320@120Hz 64:27 */
+ { DRM_MODE("7680x4320", DRM_MODE_TYPE_DRIVER, 4752000, 7680, 8032,
+ 8208, 8800, 0, 4320, 4336, 4356, 4500, 0,
+ DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+ .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
+ /* 210 - 10240x4320@24Hz 64:27 */
+ { DRM_MODE("10240x4320", DRM_MODE_TYPE_DRIVER, 1485000, 10240, 11732,
+ 11908, 12500, 0, 4320, 4336, 4356, 4950, 0,
+ DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+ .vrefresh = 24, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
+ /* 211 - 10240x4320@25Hz 64:27 */
+ { DRM_MODE("10240x4320", DRM_MODE_TYPE_DRIVER, 1485000, 10240, 12732,
+ 12908, 13500, 0, 4320, 4336, 4356, 4400, 0,
+ DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+ .vrefresh = 25, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
+ /* 212 - 10240x4320@30Hz 64:27 */
+ { DRM_MODE("10240x4320", DRM_MODE_TYPE_DRIVER, 1485000, 10240, 10528,
+ 10704, 11000, 0, 4320, 4336, 4356, 4500, 0,
+ DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+ .vrefresh = 30, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
+ /* 213 - 10240x4320@48Hz 64:27 */
+ { DRM_MODE("10240x4320", DRM_MODE_TYPE_DRIVER, 2970000, 10240, 11732,
+ 11908, 12500, 0, 4320, 4336, 4356, 4950, 0,
+ DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+ .vrefresh = 48, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
+ /* 214 - 10240x4320@50Hz 64:27 */
+ { DRM_MODE("10240x4320", DRM_MODE_TYPE_DRIVER, 2970000, 10240, 12732,
+ 12908, 13500, 0, 4320, 4336, 4356, 4400, 0,
+ DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+ .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
+ /* 215 - 10240x4320@60Hz 64:27 */
+ { DRM_MODE("10240x4320", DRM_MODE_TYPE_DRIVER, 2970000, 10240, 10528,
+ 10704, 11000, 0, 4320, 4336, 4356, 4500, 0,
+ DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+ .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
+ /* 216 - 10240x4320@100Hz 64:27 */
+ { DRM_MODE("10240x4320", DRM_MODE_TYPE_DRIVER, 5940000, 10240, 12432,
+ 12608, 13200, 0, 4320, 4336, 4356, 4500, 0,
+ DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+ .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
+ /* 217 - 10240x4320@120Hz 64:27 */
+ { DRM_MODE("10240x4320", DRM_MODE_TYPE_DRIVER, 5940000, 10240, 10528,
+ 10704, 11000, 0, 4320, 4336, 4356, 4500, 0,
+ DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+ .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
+ /* 218 - 4096x2160@100Hz 256:135 */
+ { DRM_MODE("4096x2160", DRM_MODE_TYPE_DRIVER, 1188000, 4096, 4896,
+ 4984, 5280, 0, 2160, 2168, 2178, 2250, 0,
+ DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+ .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_256_135, },
+ /* 219 - 4096x2160@120Hz 256:135 */
+ { DRM_MODE("4096x2160", DRM_MODE_TYPE_DRIVER, 1188000, 4096, 4184,
+ 4272, 4400, 0, 2160, 2168, 2178, 2250, 0,
+ DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+ .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_256_135, },
+};
+
/*
* HDMI 1.4 4k modes. Index using the VIC.
*/
@@ -3072,17 +3215,21 @@ static const struct drm_display_mode *cea_mode_for_vic(u8 vic)
return NULL;
if (vic < ARRAY_SIZE(edid_cea_modes_0))
return &edid_cea_modes_0[vic];
+ if (vic >= 193 && vic < 193 + ARRAY_SIZE(edid_cea_modes_193))
+ return &edid_cea_modes_193[vic - 193];
return NULL;
}
static u8 cea_num_vics(void)
{
- return ARRAY_SIZE(edid_cea_modes_0);
+ return 193 + ARRAY_SIZE(edid_cea_modes_193);
}
static u8 cea_next_vic(u8 vic)
{
- return vic + 1;
+ if (++vic == ARRAY_SIZE(edid_cea_modes_0))
+ vic = 193;
+ return vic;
}
/*
--
2.21.0
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^ permalink raw reply related [flat|nested] 25+ messages in thread
* [PATCH v3 2/4] drm/edid: Add CTA-861-G modes with VIC >= 193
2019-09-25 13:54 [PATCH v3 0/4] drm/edid: Add new modes from CTA-861-G Ville Syrjala
2019-09-25 13:54 ` [PATCH v3 1/4] drm/edid: Abstract away cea_edid_modes[] Ville Syrjala
2019-09-25 13:54 ` [PATCH v3 1/4] " Ville Syrjala
@ 2019-09-25 13:55 ` Ville Syrjala
2019-09-25 13:55 ` Ville Syrjala
` (7 subsequent siblings)
10 siblings, 0 replies; 25+ messages in thread
From: Ville Syrjala @ 2019-09-25 13:55 UTC (permalink / raw)
To: dri-devel; +Cc: intel-gfc, Hans Verkuil
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Add a second table to the cea modes with VIC >= 193.
Cc: Hans Verkuil <hansverk@cisco.com>
Cc: Shashank Sharma <shashank.sharma@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/drm_edid.c | 151 ++++++++++++++++++++++++++++++++++++-
1 file changed, 149 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
index b700fc075257..9f6996323efa 100644
--- a/drivers/gpu/drm/drm_edid.c
+++ b/drivers/gpu/drm/drm_edid.c
@@ -1376,6 +1376,149 @@ static const struct drm_display_mode edid_cea_modes_0[] = {
.vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
};
+/*
+ * From CEA/CTA-861 spec.
+ *
+ * Index with VIC-193.
+ */
+static const struct drm_display_mode edid_cea_modes_193[] = {
+ /* 193 - 5120x2160@120Hz 64:27 */
+ { DRM_MODE("5120x2160", DRM_MODE_TYPE_DRIVER, 1485000, 5120, 5284,
+ 5372, 5500, 0, 2160, 2168, 2178, 2250, 0,
+ DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+ .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
+ /* 194 - 7680x4320@24Hz 16:9 */
+ { DRM_MODE("7680x4320", DRM_MODE_TYPE_DRIVER, 1188000, 7680, 10232,
+ 10408, 11000, 0, 4320, 4336, 4356, 4500, 0,
+ DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+ .vrefresh = 24, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
+ /* 195 - 7680x4320@25Hz 16:9 */
+ { DRM_MODE("7680x4320", DRM_MODE_TYPE_DRIVER, 1188000, 7680, 10032,
+ 10208, 10800, 0, 4320, 4336, 4356, 4400, 0,
+ DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+ .vrefresh = 25, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
+ /* 196 - 7680x4320@30Hz 16:9 */
+ { DRM_MODE("7680x4320", DRM_MODE_TYPE_DRIVER, 1188000, 7680, 8232,
+ 8408, 9000, 0, 4320, 4336, 4356, 4400, 0,
+ DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+ .vrefresh = 30, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
+ /* 197 - 7680x4320@48Hz 16:9 */
+ { DRM_MODE("7680x4320", DRM_MODE_TYPE_DRIVER, 2376000, 7680, 10232,
+ 10408, 11000, 0, 4320, 4336, 4356, 4500, 0,
+ DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+ .vrefresh = 48, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
+ /* 198 - 7680x4320@50Hz 16:9 */
+ { DRM_MODE("7680x4320", DRM_MODE_TYPE_DRIVER, 2376000, 7680, 10032,
+ 10208, 10800, 0, 4320, 4336, 4356, 4400, 0,
+ DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+ .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
+ /* 199 - 7680x4320@60Hz 16:9 */
+ { DRM_MODE("7680x4320", DRM_MODE_TYPE_DRIVER, 2376000, 7680, 8232,
+ 8408, 9000, 0, 4320, 4336, 4356, 4400, 0,
+ DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+ .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
+ /* 200 - 7680x4320@100Hz 16:9 */
+ { DRM_MODE("7680x4320", DRM_MODE_TYPE_DRIVER, 4752000, 7680, 9792,
+ 9968, 10560, 0, 4320, 4336, 4356, 4500, 0,
+ DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+ .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
+ /* 201 - 7680x4320@120Hz 16:9 */
+ { DRM_MODE("7680x4320", DRM_MODE_TYPE_DRIVER, 4752000, 7680, 8032,
+ 8208, 8800, 0, 4320, 4336, 4356, 4500, 0,
+ DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+ .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
+ /* 202 - 7680x4320@24Hz 64:27 */
+ { DRM_MODE("7680x4320", DRM_MODE_TYPE_DRIVER, 1188000, 7680, 10232,
+ 10408, 11000, 0, 4320, 4336, 4356, 4500, 0,
+ DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+ .vrefresh = 24, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
+ /* 203 - 7680x4320@25Hz 64:27 */
+ { DRM_MODE("7680x4320", DRM_MODE_TYPE_DRIVER, 1188000, 7680, 10032,
+ 10208, 10800, 0, 4320, 4336, 4356, 4400, 0,
+ DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+ .vrefresh = 25, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
+ /* 204 - 7680x4320@30Hz 64:27 */
+ { DRM_MODE("7680x4320", DRM_MODE_TYPE_DRIVER, 1188000, 7680, 8232,
+ 8408, 9000, 0, 4320, 4336, 4356, 4400, 0,
+ DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+ .vrefresh = 30, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
+ /* 205 - 7680x4320@48Hz 64:27 */
+ { DRM_MODE("7680x4320", DRM_MODE_TYPE_DRIVER, 2376000, 7680, 10232,
+ 10408, 11000, 0, 4320, 4336, 4356, 4500, 0,
+ DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+ .vrefresh = 48, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
+ /* 206 - 7680x4320@50Hz 64:27 */
+ { DRM_MODE("7680x4320", DRM_MODE_TYPE_DRIVER, 2376000, 7680, 10032,
+ 10208, 10800, 0, 4320, 4336, 4356, 4400, 0,
+ DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+ .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
+ /* 207 - 7680x4320@60Hz 64:27 */
+ { DRM_MODE("7680x4320", DRM_MODE_TYPE_DRIVER, 2376000, 7680, 8232,
+ 8408, 9000, 0, 4320, 4336, 4356, 4400, 0,
+ DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+ .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
+ /* 208 - 7680x4320@100Hz 64:27 */
+ { DRM_MODE("7680x4320", DRM_MODE_TYPE_DRIVER, 4752000, 7680, 9792,
+ 9968, 10560, 0, 4320, 4336, 4356, 4500, 0,
+ DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+ .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
+ /* 209 - 7680x4320@120Hz 64:27 */
+ { DRM_MODE("7680x4320", DRM_MODE_TYPE_DRIVER, 4752000, 7680, 8032,
+ 8208, 8800, 0, 4320, 4336, 4356, 4500, 0,
+ DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+ .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
+ /* 210 - 10240x4320@24Hz 64:27 */
+ { DRM_MODE("10240x4320", DRM_MODE_TYPE_DRIVER, 1485000, 10240, 11732,
+ 11908, 12500, 0, 4320, 4336, 4356, 4950, 0,
+ DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+ .vrefresh = 24, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
+ /* 211 - 10240x4320@25Hz 64:27 */
+ { DRM_MODE("10240x4320", DRM_MODE_TYPE_DRIVER, 1485000, 10240, 12732,
+ 12908, 13500, 0, 4320, 4336, 4356, 4400, 0,
+ DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+ .vrefresh = 25, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
+ /* 212 - 10240x4320@30Hz 64:27 */
+ { DRM_MODE("10240x4320", DRM_MODE_TYPE_DRIVER, 1485000, 10240, 10528,
+ 10704, 11000, 0, 4320, 4336, 4356, 4500, 0,
+ DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+ .vrefresh = 30, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
+ /* 213 - 10240x4320@48Hz 64:27 */
+ { DRM_MODE("10240x4320", DRM_MODE_TYPE_DRIVER, 2970000, 10240, 11732,
+ 11908, 12500, 0, 4320, 4336, 4356, 4950, 0,
+ DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+ .vrefresh = 48, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
+ /* 214 - 10240x4320@50Hz 64:27 */
+ { DRM_MODE("10240x4320", DRM_MODE_TYPE_DRIVER, 2970000, 10240, 12732,
+ 12908, 13500, 0, 4320, 4336, 4356, 4400, 0,
+ DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+ .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
+ /* 215 - 10240x4320@60Hz 64:27 */
+ { DRM_MODE("10240x4320", DRM_MODE_TYPE_DRIVER, 2970000, 10240, 10528,
+ 10704, 11000, 0, 4320, 4336, 4356, 4500, 0,
+ DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+ .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
+ /* 216 - 10240x4320@100Hz 64:27 */
+ { DRM_MODE("10240x4320", DRM_MODE_TYPE_DRIVER, 5940000, 10240, 12432,
+ 12608, 13200, 0, 4320, 4336, 4356, 4500, 0,
+ DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+ .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
+ /* 217 - 10240x4320@120Hz 64:27 */
+ { DRM_MODE("10240x4320", DRM_MODE_TYPE_DRIVER, 5940000, 10240, 10528,
+ 10704, 11000, 0, 4320, 4336, 4356, 4500, 0,
+ DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+ .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
+ /* 218 - 4096x2160@100Hz 256:135 */
+ { DRM_MODE("4096x2160", DRM_MODE_TYPE_DRIVER, 1188000, 4096, 4896,
+ 4984, 5280, 0, 2160, 2168, 2178, 2250, 0,
+ DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+ .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_256_135, },
+ /* 219 - 4096x2160@120Hz 256:135 */
+ { DRM_MODE("4096x2160", DRM_MODE_TYPE_DRIVER, 1188000, 4096, 4184,
+ 4272, 4400, 0, 2160, 2168, 2178, 2250, 0,
+ DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
+ .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_256_135, },
+};
+
/*
* HDMI 1.4 4k modes. Index using the VIC.
*/
@@ -3072,17 +3215,21 @@ static const struct drm_display_mode *cea_mode_for_vic(u8 vic)
return NULL;
if (vic < ARRAY_SIZE(edid_cea_modes_0))
return &edid_cea_modes_0[vic];
+ if (vic >= 193 && vic < 193 + ARRAY_SIZE(edid_cea_modes_193))
+ return &edid_cea_modes_193[vic - 193];
return NULL;
}
static u8 cea_num_vics(void)
{
- return ARRAY_SIZE(edid_cea_modes_0);
+ return 193 + ARRAY_SIZE(edid_cea_modes_193);
}
static u8 cea_next_vic(u8 vic)
{
- return vic + 1;
+ if (++vic == ARRAY_SIZE(edid_cea_modes_0))
+ vic = 193;
+ return vic;
}
/*
--
2.21.0
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 25+ messages in thread
* [PATCH v3 3/4] drm/edid: Throw away the dummy VIC 0 cea mode
2019-09-25 13:54 [PATCH v3 0/4] drm/edid: Add new modes from CTA-861-G Ville Syrjala
` (3 preceding siblings ...)
2019-09-25 13:55 ` Ville Syrjala
@ 2019-09-25 13:55 ` Ville Syrjala
2019-10-03 8:29 ` Sharma, Shashank
2019-12-10 23:18 ` [v3,3/4] " Tom Anderson
2019-09-25 13:55 ` [PATCH v3 3/4] " Ville Syrjala
` (5 subsequent siblings)
10 siblings, 2 replies; 25+ messages in thread
From: Ville Syrjala @ 2019-09-25 13:55 UTC (permalink / raw)
To: dri-devel; +Cc: intel-gfc, Hans Verkuil
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Now that the cea mode handling is not 100% tied to the single
array the dummy VIC 0 mode is pretty much pointles. Throw it
out.
Cc: Hans Verkuil <hansverk@cisco.com>
Cc: Shashank Sharma <shashank.sharma@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/drm_edid.c | 14 +++++---------
1 file changed, 5 insertions(+), 9 deletions(-)
diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
index 9f6996323efa..0007004d3221 100644
--- a/drivers/gpu/drm/drm_edid.c
+++ b/drivers/gpu/drm/drm_edid.c
@@ -709,11 +709,9 @@ static const struct minimode extra_modes[] = {
/*
* From CEA/CTA-861 spec.
*
- * Index with VIC.
+ * Index with VIC-1.
*/
-static const struct drm_display_mode edid_cea_modes_0[] = {
- /* 0 - dummy, VICs start at 1 */
- { },
+static const struct drm_display_mode edid_cea_modes_1[] = {
/* 1 - 640x480@60Hz 4:3 */
{ DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25175, 640, 656,
752, 800, 0, 480, 490, 492, 525, 0,
@@ -3211,10 +3209,8 @@ static u8 *drm_find_cea_extension(const struct edid *edid)
static const struct drm_display_mode *cea_mode_for_vic(u8 vic)
{
- if (!vic)
- return NULL;
- if (vic < ARRAY_SIZE(edid_cea_modes_0))
- return &edid_cea_modes_0[vic];
+ if (vic >= 1 && vic < 1 + ARRAY_SIZE(edid_cea_modes_1))
+ return &edid_cea_modes_1[vic - 1];
if (vic >= 193 && vic < 193 + ARRAY_SIZE(edid_cea_modes_193))
return &edid_cea_modes_193[vic - 193];
return NULL;
@@ -3227,7 +3223,7 @@ static u8 cea_num_vics(void)
static u8 cea_next_vic(u8 vic)
{
- if (++vic == ARRAY_SIZE(edid_cea_modes_0))
+ if (++vic == 1 + ARRAY_SIZE(edid_cea_modes_1))
vic = 193;
return vic;
}
--
2.21.0
_______________________________________________
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dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel
^ permalink raw reply related [flat|nested] 25+ messages in thread
* [PATCH v3 3/4] drm/edid: Throw away the dummy VIC 0 cea mode
2019-09-25 13:54 [PATCH v3 0/4] drm/edid: Add new modes from CTA-861-G Ville Syrjala
` (4 preceding siblings ...)
2019-09-25 13:55 ` [PATCH v3 3/4] drm/edid: Throw away the dummy VIC 0 cea mode Ville Syrjala
@ 2019-09-25 13:55 ` Ville Syrjala
2019-09-25 13:55 ` [PATCH v3 4/4] drm/edid: Make sure the CEA mode arrays have the correct amount of modes Ville Syrjala
` (4 subsequent siblings)
10 siblings, 0 replies; 25+ messages in thread
From: Ville Syrjala @ 2019-09-25 13:55 UTC (permalink / raw)
To: dri-devel; +Cc: intel-gfc, Hans Verkuil
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Now that the cea mode handling is not 100% tied to the single
array the dummy VIC 0 mode is pretty much pointles. Throw it
out.
Cc: Hans Verkuil <hansverk@cisco.com>
Cc: Shashank Sharma <shashank.sharma@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/drm_edid.c | 14 +++++---------
1 file changed, 5 insertions(+), 9 deletions(-)
diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
index 9f6996323efa..0007004d3221 100644
--- a/drivers/gpu/drm/drm_edid.c
+++ b/drivers/gpu/drm/drm_edid.c
@@ -709,11 +709,9 @@ static const struct minimode extra_modes[] = {
/*
* From CEA/CTA-861 spec.
*
- * Index with VIC.
+ * Index with VIC-1.
*/
-static const struct drm_display_mode edid_cea_modes_0[] = {
- /* 0 - dummy, VICs start at 1 */
- { },
+static const struct drm_display_mode edid_cea_modes_1[] = {
/* 1 - 640x480@60Hz 4:3 */
{ DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25175, 640, 656,
752, 800, 0, 480, 490, 492, 525, 0,
@@ -3211,10 +3209,8 @@ static u8 *drm_find_cea_extension(const struct edid *edid)
static const struct drm_display_mode *cea_mode_for_vic(u8 vic)
{
- if (!vic)
- return NULL;
- if (vic < ARRAY_SIZE(edid_cea_modes_0))
- return &edid_cea_modes_0[vic];
+ if (vic >= 1 && vic < 1 + ARRAY_SIZE(edid_cea_modes_1))
+ return &edid_cea_modes_1[vic - 1];
if (vic >= 193 && vic < 193 + ARRAY_SIZE(edid_cea_modes_193))
return &edid_cea_modes_193[vic - 193];
return NULL;
@@ -3227,7 +3223,7 @@ static u8 cea_num_vics(void)
static u8 cea_next_vic(u8 vic)
{
- if (++vic == ARRAY_SIZE(edid_cea_modes_0))
+ if (++vic == 1 + ARRAY_SIZE(edid_cea_modes_1))
vic = 193;
return vic;
}
--
2.21.0
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 25+ messages in thread
* [PATCH v3 4/4] drm/edid: Make sure the CEA mode arrays have the correct amount of modes
2019-09-25 13:54 [PATCH v3 0/4] drm/edid: Add new modes from CTA-861-G Ville Syrjala
` (5 preceding siblings ...)
2019-09-25 13:55 ` [PATCH v3 3/4] " Ville Syrjala
@ 2019-09-25 13:55 ` Ville Syrjala
2019-09-27 21:38 ` Manasi Navare
2019-12-10 23:20 ` [v3,4/4] " Tom Anderson
2019-09-25 13:55 ` [PATCH v3 4/4] " Ville Syrjala
` (3 subsequent siblings)
10 siblings, 2 replies; 25+ messages in thread
From: Ville Syrjala @ 2019-09-25 13:55 UTC (permalink / raw)
To: dri-devel; +Cc: intel-gfc, Hans Verkuil
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
We depend on a specific relationship between the VIC number and the
index in the CEA mode arrays. Assert that the arrays have the excpected
size to make sure we've not accidentally left holes in them.
v2: Pimp the BUILD_BUG_ON()s
Cc: Hans Verkuil <hansverk@cisco.com>
Cc: Shashank Sharma <shashank.sharma@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/drm_edid.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
index 0007004d3221..06cac8e2afc2 100644
--- a/drivers/gpu/drm/drm_edid.c
+++ b/drivers/gpu/drm/drm_edid.c
@@ -3209,6 +3209,9 @@ static u8 *drm_find_cea_extension(const struct edid *edid)
static const struct drm_display_mode *cea_mode_for_vic(u8 vic)
{
+ BUILD_BUG_ON(1 + ARRAY_SIZE(edid_cea_modes_1) - 1 != 127);
+ BUILD_BUG_ON(193 + ARRAY_SIZE(edid_cea_modes_193) - 1 != 219);
+
if (vic >= 1 && vic < 1 + ARRAY_SIZE(edid_cea_modes_1))
return &edid_cea_modes_1[vic - 1];
if (vic >= 193 && vic < 193 + ARRAY_SIZE(edid_cea_modes_193))
--
2.21.0
_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel
^ permalink raw reply related [flat|nested] 25+ messages in thread
* [PATCH v3 4/4] drm/edid: Make sure the CEA mode arrays have the correct amount of modes
2019-09-25 13:54 [PATCH v3 0/4] drm/edid: Add new modes from CTA-861-G Ville Syrjala
` (6 preceding siblings ...)
2019-09-25 13:55 ` [PATCH v3 4/4] drm/edid: Make sure the CEA mode arrays have the correct amount of modes Ville Syrjala
@ 2019-09-25 13:55 ` Ville Syrjala
2019-09-25 16:19 ` ✗ Fi.CI.CHECKPATCH: warning for drm/edid: Add new modes from CTA-861-G (rev2) Patchwork
` (2 subsequent siblings)
10 siblings, 0 replies; 25+ messages in thread
From: Ville Syrjala @ 2019-09-25 13:55 UTC (permalink / raw)
To: dri-devel; +Cc: intel-gfc, Hans Verkuil
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
We depend on a specific relationship between the VIC number and the
index in the CEA mode arrays. Assert that the arrays have the excpected
size to make sure we've not accidentally left holes in them.
v2: Pimp the BUILD_BUG_ON()s
Cc: Hans Verkuil <hansverk@cisco.com>
Cc: Shashank Sharma <shashank.sharma@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/drm_edid.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
index 0007004d3221..06cac8e2afc2 100644
--- a/drivers/gpu/drm/drm_edid.c
+++ b/drivers/gpu/drm/drm_edid.c
@@ -3209,6 +3209,9 @@ static u8 *drm_find_cea_extension(const struct edid *edid)
static const struct drm_display_mode *cea_mode_for_vic(u8 vic)
{
+ BUILD_BUG_ON(1 + ARRAY_SIZE(edid_cea_modes_1) - 1 != 127);
+ BUILD_BUG_ON(193 + ARRAY_SIZE(edid_cea_modes_193) - 1 != 219);
+
if (vic >= 1 && vic < 1 + ARRAY_SIZE(edid_cea_modes_1))
return &edid_cea_modes_1[vic - 1];
if (vic >= 193 && vic < 193 + ARRAY_SIZE(edid_cea_modes_193))
--
2.21.0
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 25+ messages in thread
* ✗ Fi.CI.CHECKPATCH: warning for drm/edid: Add new modes from CTA-861-G (rev2)
2019-09-25 13:54 [PATCH v3 0/4] drm/edid: Add new modes from CTA-861-G Ville Syrjala
` (7 preceding siblings ...)
2019-09-25 13:55 ` [PATCH v3 4/4] " Ville Syrjala
@ 2019-09-25 16:19 ` Patchwork
2019-09-25 16:42 ` ✓ Fi.CI.BAT: success " Patchwork
2019-09-26 8:37 ` ✗ Fi.CI.IGT: failure " Patchwork
10 siblings, 0 replies; 25+ messages in thread
From: Patchwork @ 2019-09-25 16:19 UTC (permalink / raw)
To: Ville Syrjälä; +Cc: intel-gfx
== Series Details ==
Series: drm/edid: Add new modes from CTA-861-G (rev2)
URL : https://patchwork.freedesktop.org/series/63554/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
196fa0d4dcc0 drm/edid: Abstract away cea_edid_modes[]
-:131: CHECK:COMPARISON_TO_NULL: Comparison to NULL could be written "cea_mode_for_vic"
#131: FILE: drivers/gpu/drm/drm_edid.c:3235:
+ return cea_mode_for_vic(vic) != NULL;
total: 0 errors, 0 warnings, 1 checks, 152 lines checked
fabad847646c drm/edid: Add CTA-861-G modes with VIC >= 193
a1edbaf2eecf drm/edid: Throw away the dummy VIC 0 cea mode
fc91ef043e61 drm/edid: Make sure the CEA mode arrays have the correct amount of modes
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 25+ messages in thread
* ✓ Fi.CI.BAT: success for drm/edid: Add new modes from CTA-861-G (rev2)
2019-09-25 13:54 [PATCH v3 0/4] drm/edid: Add new modes from CTA-861-G Ville Syrjala
` (8 preceding siblings ...)
2019-09-25 16:19 ` ✗ Fi.CI.CHECKPATCH: warning for drm/edid: Add new modes from CTA-861-G (rev2) Patchwork
@ 2019-09-25 16:42 ` Patchwork
2019-09-26 8:37 ` ✗ Fi.CI.IGT: failure " Patchwork
10 siblings, 0 replies; 25+ messages in thread
From: Patchwork @ 2019-09-25 16:42 UTC (permalink / raw)
To: Ville Syrjälä; +Cc: intel-gfx
== Series Details ==
Series: drm/edid: Add new modes from CTA-861-G (rev2)
URL : https://patchwork.freedesktop.org/series/63554/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6956 -> Patchwork_14532
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14532/
Known issues
------------
Here are the changes found in Patchwork_14532 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@kms_frontbuffer_tracking@basic:
- fi-icl-u2: [PASS][1] -> [FAIL][2] ([fdo#103167])
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6956/fi-icl-u2/igt@kms_frontbuffer_tracking@basic.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14532/fi-icl-u2/igt@kms_frontbuffer_tracking@basic.html
#### Possible fixes ####
* igt@gem_exec_suspend@basic-s4-devices:
- fi-blb-e6850: [INCOMPLETE][3] ([fdo#107718]) -> [PASS][4]
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6956/fi-blb-e6850/igt@gem_exec_suspend@basic-s4-devices.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14532/fi-blb-e6850/igt@gem_exec_suspend@basic-s4-devices.html
* igt@kms_chamelium@hdmi-crc-fast:
- fi-kbl-7500u: [FAIL][5] ([fdo#109635 ]) -> [PASS][6]
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6956/fi-kbl-7500u/igt@kms_chamelium@hdmi-crc-fast.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14532/fi-kbl-7500u/igt@kms_chamelium@hdmi-crc-fast.html
#### Warnings ####
* igt@kms_chamelium@hdmi-hpd-fast:
- fi-kbl-7500u: [FAIL][7] ([fdo#111168 ]) -> [FAIL][8] ([fdo#111407])
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6956/fi-kbl-7500u/igt@kms_chamelium@hdmi-hpd-fast.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14532/fi-kbl-7500u/igt@kms_chamelium@hdmi-hpd-fast.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167
[fdo#107718]: https://bugs.freedesktop.org/show_bug.cgi?id=107718
[fdo#109635 ]: https://bugs.freedesktop.org/show_bug.cgi?id=109635
[fdo#111168 ]: https://bugs.freedesktop.org/show_bug.cgi?id=111168
[fdo#111407]: https://bugs.freedesktop.org/show_bug.cgi?id=111407
[fdo#111647]: https://bugs.freedesktop.org/show_bug.cgi?id=111647
Participating hosts (51 -> 44)
------------------------------
Missing (7): fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-icl-y fi-byt-clapper fi-bdw-samus
Build changes
-------------
* CI: CI-20190529 -> None
* Linux: CI_DRM_6956 -> Patchwork_14532
CI-20190529: 20190529
CI_DRM_6956: e514b64998c2845943242b1d4dc2e568b01fddcb @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_5202: 3499c5eb17054e2abd88023fe962768140d24302 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_14532: fc91ef043e61519fb73399f819fead5709b820c4 @ git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
fc91ef043e61 drm/edid: Make sure the CEA mode arrays have the correct amount of modes
a1edbaf2eecf drm/edid: Throw away the dummy VIC 0 cea mode
fabad847646c drm/edid: Add CTA-861-G modes with VIC >= 193
196fa0d4dcc0 drm/edid: Abstract away cea_edid_modes[]
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14532/index.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 25+ messages in thread
* ✗ Fi.CI.IGT: failure for drm/edid: Add new modes from CTA-861-G (rev2)
2019-09-25 13:54 [PATCH v3 0/4] drm/edid: Add new modes from CTA-861-G Ville Syrjala
` (9 preceding siblings ...)
2019-09-25 16:42 ` ✓ Fi.CI.BAT: success " Patchwork
@ 2019-09-26 8:37 ` Patchwork
10 siblings, 0 replies; 25+ messages in thread
From: Patchwork @ 2019-09-26 8:37 UTC (permalink / raw)
To: Ville Syrjälä; +Cc: intel-gfx
== Series Details ==
Series: drm/edid: Add new modes from CTA-861-G (rev2)
URL : https://patchwork.freedesktop.org/series/63554/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_6956_full -> Patchwork_14532_full
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with Patchwork_14532_full absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_14532_full, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in Patchwork_14532_full:
### IGT changes ###
#### Possible regressions ####
* igt@i915_pm_rpm@debugfs-read:
- shard-hsw: [PASS][1] -> [DMESG-WARN][2]
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6956/shard-hsw5/igt@i915_pm_rpm@debugfs-read.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14532/shard-hsw4/igt@i915_pm_rpm@debugfs-read.html
Known issues
------------
Here are the changes found in Patchwork_14532_full that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_eio@reset-stress:
- shard-snb: [PASS][3] -> [FAIL][4] ([fdo#109661])
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6956/shard-snb6/igt@gem_eio@reset-stress.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14532/shard-snb7/igt@gem_eio@reset-stress.html
* igt@gem_exec_nop@basic-series:
- shard-iclb: [PASS][5] -> [INCOMPLETE][6] ([fdo#107713] / [fdo#109100])
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6956/shard-iclb3/igt@gem_exec_nop@basic-series.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14532/shard-iclb7/igt@gem_exec_nop@basic-series.html
* igt@gem_exec_schedule@independent-bsd2:
- shard-iclb: [PASS][7] -> [SKIP][8] ([fdo#109276]) +15 similar issues
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6956/shard-iclb2/igt@gem_exec_schedule@independent-bsd2.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14532/shard-iclb6/igt@gem_exec_schedule@independent-bsd2.html
* igt@gem_exec_schedule@preemptive-hang-bsd:
- shard-iclb: [PASS][9] -> [SKIP][10] ([fdo#111325]) +8 similar issues
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6956/shard-iclb8/igt@gem_exec_schedule@preemptive-hang-bsd.html
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14532/shard-iclb4/igt@gem_exec_schedule@preemptive-hang-bsd.html
* igt@gem_persistent_relocs@forked-interruptible-thrashing:
- shard-apl: [PASS][11] -> [INCOMPLETE][12] ([fdo#103927])
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6956/shard-apl2/igt@gem_persistent_relocs@forked-interruptible-thrashing.html
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14532/shard-apl7/igt@gem_persistent_relocs@forked-interruptible-thrashing.html
* igt@gem_tiled_swapping@non-threaded:
- shard-apl: [PASS][13] -> [DMESG-WARN][14] ([fdo#108686])
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6956/shard-apl8/igt@gem_tiled_swapping@non-threaded.html
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14532/shard-apl1/igt@gem_tiled_swapping@non-threaded.html
* igt@i915_suspend@sysfs-reader:
- shard-apl: [PASS][15] -> [DMESG-WARN][16] ([fdo#108566]) +5 similar issues
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6956/shard-apl3/igt@i915_suspend@sysfs-reader.html
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14532/shard-apl8/igt@i915_suspend@sysfs-reader.html
* igt@kms_cursor_crc@pipe-c-cursor-suspend:
- shard-kbl: [PASS][17] -> [DMESG-WARN][18] ([fdo#108566]) +3 similar issues
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6956/shard-kbl3/igt@kms_cursor_crc@pipe-c-cursor-suspend.html
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14532/shard-kbl3/igt@kms_cursor_crc@pipe-c-cursor-suspend.html
* igt@kms_flip@flip-vs-expired-vblank:
- shard-glk: [PASS][19] -> [FAIL][20] ([fdo#105363])
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6956/shard-glk6/igt@kms_flip@flip-vs-expired-vblank.html
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14532/shard-glk5/igt@kms_flip@flip-vs-expired-vblank.html
* igt@kms_frontbuffer_tracking@fbc-1p-pri-indfb-multidraw:
- shard-iclb: [PASS][21] -> [FAIL][22] ([fdo#103167]) +4 similar issues
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6956/shard-iclb6/igt@kms_frontbuffer_tracking@fbc-1p-pri-indfb-multidraw.html
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14532/shard-iclb4/igt@kms_frontbuffer_tracking@fbc-1p-pri-indfb-multidraw.html
* igt@kms_plane@plane-panning-bottom-right-suspend-pipe-c-planes:
- shard-skl: [PASS][23] -> [INCOMPLETE][24] ([fdo#104108])
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6956/shard-skl4/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-c-planes.html
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14532/shard-skl3/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-c-planes.html
* igt@kms_psr2_su@frontbuffer:
- shard-iclb: [PASS][25] -> [SKIP][26] ([fdo#109642] / [fdo#111068]) +1 similar issue
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6956/shard-iclb2/igt@kms_psr2_su@frontbuffer.html
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14532/shard-iclb6/igt@kms_psr2_su@frontbuffer.html
* igt@kms_psr@no_drrs:
- shard-iclb: [PASS][27] -> [FAIL][28] ([fdo#108341])
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6956/shard-iclb6/igt@kms_psr@no_drrs.html
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14532/shard-iclb1/igt@kms_psr@no_drrs.html
* igt@kms_psr@psr2_primary_page_flip:
- shard-iclb: [PASS][29] -> [SKIP][30] ([fdo#109441]) +1 similar issue
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6956/shard-iclb2/igt@kms_psr@psr2_primary_page_flip.html
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14532/shard-iclb6/igt@kms_psr@psr2_primary_page_flip.html
* igt@tools_test@tools_test:
- shard-glk: [PASS][31] -> [SKIP][32] ([fdo#109271])
[31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6956/shard-glk9/igt@tools_test@tools_test.html
[32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14532/shard-glk1/igt@tools_test@tools_test.html
#### Possible fixes ####
* igt@gem_exec_schedule@preempt-other-chain-bsd:
- shard-iclb: [SKIP][33] ([fdo#111325]) -> [PASS][34] +3 similar issues
[33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6956/shard-iclb2/igt@gem_exec_schedule@preempt-other-chain-bsd.html
[34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14532/shard-iclb6/igt@gem_exec_schedule@preempt-other-chain-bsd.html
* igt@kms_cursor_crc@pipe-a-cursor-size-change:
- shard-skl: [FAIL][35] ([fdo#103232]) -> [PASS][36]
[35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6956/shard-skl5/igt@kms_cursor_crc@pipe-a-cursor-size-change.html
[36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14532/shard-skl3/igt@kms_cursor_crc@pipe-a-cursor-size-change.html
* igt@kms_cursor_crc@pipe-c-cursor-256x85-onscreen:
- shard-iclb: [INCOMPLETE][37] ([fdo#107713]) -> [PASS][38] +1 similar issue
[37]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6956/shard-iclb7/igt@kms_cursor_crc@pipe-c-cursor-256x85-onscreen.html
[38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14532/shard-iclb3/igt@kms_cursor_crc@pipe-c-cursor-256x85-onscreen.html
* igt@kms_flip@flip-vs-expired-vblank:
- shard-skl: [FAIL][39] ([fdo#105363]) -> [PASS][40]
[39]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6956/shard-skl4/igt@kms_flip@flip-vs-expired-vblank.html
[40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14532/shard-skl10/igt@kms_flip@flip-vs-expired-vblank.html
* igt@kms_flip@flip-vs-suspend:
- shard-skl: [INCOMPLETE][41] ([fdo#109507]) -> [PASS][42]
[41]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6956/shard-skl3/igt@kms_flip@flip-vs-suspend.html
[42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14532/shard-skl9/igt@kms_flip@flip-vs-suspend.html
* igt@kms_flip@plain-flip-fb-recreate-interruptible:
- shard-skl: [FAIL][43] ([fdo#100368]) -> [PASS][44]
[43]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6956/shard-skl4/igt@kms_flip@plain-flip-fb-recreate-interruptible.html
[44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14532/shard-skl10/igt@kms_flip@plain-flip-fb-recreate-interruptible.html
* igt@kms_frontbuffer_tracking@fbc-suspend:
- shard-iclb: [FAIL][45] ([fdo#103167]) -> [PASS][46] +6 similar issues
[45]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6956/shard-iclb2/igt@kms_frontbuffer_tracking@fbc-suspend.html
[46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14532/shard-iclb8/igt@kms_frontbuffer_tracking@fbc-suspend.html
* igt@kms_plane@pixel-format-pipe-a-planes-source-clamping:
- shard-apl: [INCOMPLETE][47] ([fdo#103927]) -> [PASS][48]
[47]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6956/shard-apl1/igt@kms_plane@pixel-format-pipe-a-planes-source-clamping.html
[48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14532/shard-apl6/igt@kms_plane@pixel-format-pipe-a-planes-source-clamping.html
* igt@kms_plane_alpha_blend@pipe-a-coverage-7efc:
- shard-skl: [FAIL][49] ([fdo#108145]) -> [PASS][50]
[49]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6956/shard-skl4/igt@kms_plane_alpha_blend@pipe-a-coverage-7efc.html
[50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14532/shard-skl10/igt@kms_plane_alpha_blend@pipe-a-coverage-7efc.html
* igt@kms_plane_lowres@pipe-a-tiling-x:
- shard-iclb: [FAIL][51] ([fdo#103166]) -> [PASS][52] +1 similar issue
[51]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6956/shard-iclb4/igt@kms_plane_lowres@pipe-a-tiling-x.html
[52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14532/shard-iclb5/igt@kms_plane_lowres@pipe-a-tiling-x.html
* igt@kms_psr@psr2_cursor_mmap_cpu:
- shard-iclb: [SKIP][53] ([fdo#109441]) -> [PASS][54] +1 similar issue
[53]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6956/shard-iclb7/igt@kms_psr@psr2_cursor_mmap_cpu.html
[54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14532/shard-iclb2/igt@kms_psr@psr2_cursor_mmap_cpu.html
* igt@kms_sequence@queue-idle:
- shard-hsw: [DMESG-WARN][55] ([fdo#102614]) -> [PASS][56]
[55]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6956/shard-hsw5/igt@kms_sequence@queue-idle.html
[56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14532/shard-hsw1/igt@kms_sequence@queue-idle.html
* igt@kms_setmode@basic:
- shard-apl: [FAIL][57] ([fdo#99912]) -> [PASS][58]
[57]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6956/shard-apl8/igt@kms_setmode@basic.html
[58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14532/shard-apl1/igt@kms_setmode@basic.html
- shard-glk: [FAIL][59] ([fdo#99912]) -> [PASS][60]
[59]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6956/shard-glk9/igt@kms_setmode@basic.html
[60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14532/shard-glk6/igt@kms_setmode@basic.html
- shard-hsw: [FAIL][61] ([fdo#99912]) -> [PASS][62]
[61]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6956/shard-hsw8/igt@kms_setmode@basic.html
[62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14532/shard-hsw5/igt@kms_setmode@basic.html
* igt@kms_vblank@pipe-a-ts-continuation-suspend:
- shard-apl: [DMESG-WARN][63] ([fdo#108566]) -> [PASS][64] +4 similar issues
[63]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6956/shard-apl7/igt@kms_vblank@pipe-a-ts-continuation-suspend.html
[64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14532/shard-apl5/igt@kms_vblank@pipe-a-ts-continuation-suspend.html
* igt@perf@blocking:
- shard-skl: [FAIL][65] ([fdo#110728]) -> [PASS][66]
[65]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6956/shard-skl1/igt@perf@blocking.html
[66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14532/shard-skl7/igt@perf@blocking.html
* igt@prime_vgem@fence-wait-bsd2:
- shard-iclb: [SKIP][67] ([fdo#109276]) -> [PASS][68] +25 similar issues
[67]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6956/shard-iclb6/igt@prime_vgem@fence-wait-bsd2.html
[68]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14532/shard-iclb1/igt@prime_vgem@fence-wait-bsd2.html
#### Warnings ####
* igt@gem_ctx_isolation@vcs1-nonpriv:
- shard-iclb: [SKIP][69] ([fdo#109276]) -> [FAIL][70] ([fdo#111329])
[69]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6956/shard-iclb6/igt@gem_ctx_isolation@vcs1-nonpriv.html
[70]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14532/shard-iclb1/igt@gem_ctx_isolation@vcs1-nonpriv.html
* igt@gem_mocs_settings@mocs-isolation-bsd2:
- shard-iclb: [FAIL][71] ([fdo#111330]) -> [SKIP][72] ([fdo#109276])
[71]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6956/shard-iclb2/igt@gem_mocs_settings@mocs-isolation-bsd2.html
[72]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14532/shard-iclb6/igt@gem_mocs_settings@mocs-isolation-bsd2.html
* igt@kms_content_protection@srm:
- shard-apl: [FAIL][73] ([fdo#110321]) -> [INCOMPLETE][74] ([fdo#103927])
[73]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6956/shard-apl8/igt@kms_content_protection@srm.html
[74]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14532/shard-apl5/igt@kms_content_protection@srm.html
[fdo#100368]: https://bugs.freedesktop.org/show_bug.cgi?id=100368
[fdo#102614]: https://bugs.freedesktop.org/show_bug.cgi?id=102614
[fdo#103166]: https://bugs.freedesktop.org/show_bug.cgi?id=103166
[fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167
[fdo#103232]: https://bugs.freedesktop.org/show_bug.cgi?id=103232
[fdo#103927]: https://bugs.freedesktop.org/show_bug.cgi?id=103927
[fdo#104108]: https://bugs.freedesktop.org/show_bug.cgi?id=104108
[fdo#105363]: https://bugs.freedesktop.org/show_bug.cgi?id=105363
[fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713
[fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145
[fdo#108341]: https://bugs.freedesktop.org/show_bug.cgi?id=108341
[fdo#108566]: https://bugs.freedesktop.org/show_bug.cgi?id=108566
[fdo#108686]: https://bugs.freedesktop.org/show_bug.cgi?id=108686
[fdo#109100]: https://bugs.freedesktop.org/show_bug.cgi?id=109100
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109276]: https://bugs.freedesktop.org/show_bug.cgi?id=109276
[fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441
[fdo#109507]: https://bugs.freedesktop.org/show_bug.cgi?id=109507
[fdo#109642]: https://bugs.freedesktop.org/show_bug.cgi?id=109642
[fdo#109661]: https://bugs.freedesktop.org/show_bug.cgi?id=109661
[fdo#110321]: https://bugs.freedesktop.org/show_bug.cgi?id=110321
[fdo#110728]: https://bugs.freedesktop.org/show_bug.cgi?id=110728
[fdo#111068]: https://bugs.freedesktop.org/show_bug.cgi?id=111068
[fdo#111325]: https://bugs.freedesktop.org/show_bug.cgi?id=111325
[fdo#111329]: https://bugs.freedesktop.org/show_bug.cgi?id=111329
[fdo#111330]: https://bugs.freedesktop.org/show_bug.cgi?id=111330
[fdo#99912]: https://bugs.freedesktop.org/show_bug.cgi?id=99912
Participating hosts (15 -> 9)
------------------------------
Missing (6): shard-tglb1 shard-tglb2 shard-tglb3 shard-tglb4 shard-tglb5 shard-tglb6
Build changes
-------------
* CI: CI-20190529 -> None
* Linux: CI_DRM_6956 -> Patchwork_14532
CI-20190529: 20190529
CI_DRM_6956: e514b64998c2845943242b1d4dc2e568b01fddcb @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_5202: 3499c5eb17054e2abd88023fe962768140d24302 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_14532: fc91ef043e61519fb73399f819fead5709b820c4 @ git://anongit.freedesktop.org/gfx-ci/linux
piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14532/
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 25+ messages in thread
* Re: [PATCH v3 2/4] drm/edid: Add CTA-861-G modes with VIC >= 193
2019-09-25 13:55 ` Ville Syrjala
@ 2019-09-27 21:35 ` Manasi Navare
2019-10-03 8:22 ` Sharma, Shashank
2019-12-10 23:16 ` [v3,2/4] " Tom Anderson
2 siblings, 0 replies; 25+ messages in thread
From: Manasi Navare @ 2019-09-27 21:35 UTC (permalink / raw)
To: Ville Syrjala; +Cc: Hans Verkuil, intel-gfc, dri-devel
On Wed, Sep 25, 2019 at 04:55:00PM +0300, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> Add a second table to the cea modes with VIC >= 193.
>
> Cc: Hans Verkuil <hansverk@cisco.com>
> Cc: Shashank Sharma <shashank.sharma@intel.com>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
I havent verified the actual timings from the CTA spec, but the logic
to add these new modes looks good to me.
So,
Reviewed-by: Manasi Navare <manasi.d.navare@intel.com>
Manasi
> ---
> drivers/gpu/drm/drm_edid.c | 151 ++++++++++++++++++++++++++++++++++++-
> 1 file changed, 149 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
> index b700fc075257..9f6996323efa 100644
> --- a/drivers/gpu/drm/drm_edid.c
> +++ b/drivers/gpu/drm/drm_edid.c
> @@ -1376,6 +1376,149 @@ static const struct drm_display_mode edid_cea_modes_0[] = {
> .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
> };
>
> +/*
> + * From CEA/CTA-861 spec.
> + *
> + * Index with VIC-193.
> + */
> +static const struct drm_display_mode edid_cea_modes_193[] = {
> + /* 193 - 5120x2160@120Hz 64:27 */
> + { DRM_MODE("5120x2160", DRM_MODE_TYPE_DRIVER, 1485000, 5120, 5284,
> + 5372, 5500, 0, 2160, 2168, 2178, 2250, 0,
> + DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
> + .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
> + /* 194 - 7680x4320@24Hz 16:9 */
> + { DRM_MODE("7680x4320", DRM_MODE_TYPE_DRIVER, 1188000, 7680, 10232,
> + 10408, 11000, 0, 4320, 4336, 4356, 4500, 0,
> + DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
> + .vrefresh = 24, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
> + /* 195 - 7680x4320@25Hz 16:9 */
> + { DRM_MODE("7680x4320", DRM_MODE_TYPE_DRIVER, 1188000, 7680, 10032,
> + 10208, 10800, 0, 4320, 4336, 4356, 4400, 0,
> + DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
> + .vrefresh = 25, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
> + /* 196 - 7680x4320@30Hz 16:9 */
> + { DRM_MODE("7680x4320", DRM_MODE_TYPE_DRIVER, 1188000, 7680, 8232,
> + 8408, 9000, 0, 4320, 4336, 4356, 4400, 0,
> + DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
> + .vrefresh = 30, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
> + /* 197 - 7680x4320@48Hz 16:9 */
> + { DRM_MODE("7680x4320", DRM_MODE_TYPE_DRIVER, 2376000, 7680, 10232,
> + 10408, 11000, 0, 4320, 4336, 4356, 4500, 0,
> + DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
> + .vrefresh = 48, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
> + /* 198 - 7680x4320@50Hz 16:9 */
> + { DRM_MODE("7680x4320", DRM_MODE_TYPE_DRIVER, 2376000, 7680, 10032,
> + 10208, 10800, 0, 4320, 4336, 4356, 4400, 0,
> + DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
> + .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
> + /* 199 - 7680x4320@60Hz 16:9 */
> + { DRM_MODE("7680x4320", DRM_MODE_TYPE_DRIVER, 2376000, 7680, 8232,
> + 8408, 9000, 0, 4320, 4336, 4356, 4400, 0,
> + DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
> + .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
> + /* 200 - 7680x4320@100Hz 16:9 */
> + { DRM_MODE("7680x4320", DRM_MODE_TYPE_DRIVER, 4752000, 7680, 9792,
> + 9968, 10560, 0, 4320, 4336, 4356, 4500, 0,
> + DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
> + .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
> + /* 201 - 7680x4320@120Hz 16:9 */
> + { DRM_MODE("7680x4320", DRM_MODE_TYPE_DRIVER, 4752000, 7680, 8032,
> + 8208, 8800, 0, 4320, 4336, 4356, 4500, 0,
> + DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
> + .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
> + /* 202 - 7680x4320@24Hz 64:27 */
> + { DRM_MODE("7680x4320", DRM_MODE_TYPE_DRIVER, 1188000, 7680, 10232,
> + 10408, 11000, 0, 4320, 4336, 4356, 4500, 0,
> + DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
> + .vrefresh = 24, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
> + /* 203 - 7680x4320@25Hz 64:27 */
> + { DRM_MODE("7680x4320", DRM_MODE_TYPE_DRIVER, 1188000, 7680, 10032,
> + 10208, 10800, 0, 4320, 4336, 4356, 4400, 0,
> + DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
> + .vrefresh = 25, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
> + /* 204 - 7680x4320@30Hz 64:27 */
> + { DRM_MODE("7680x4320", DRM_MODE_TYPE_DRIVER, 1188000, 7680, 8232,
> + 8408, 9000, 0, 4320, 4336, 4356, 4400, 0,
> + DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
> + .vrefresh = 30, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
> + /* 205 - 7680x4320@48Hz 64:27 */
> + { DRM_MODE("7680x4320", DRM_MODE_TYPE_DRIVER, 2376000, 7680, 10232,
> + 10408, 11000, 0, 4320, 4336, 4356, 4500, 0,
> + DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
> + .vrefresh = 48, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
> + /* 206 - 7680x4320@50Hz 64:27 */
> + { DRM_MODE("7680x4320", DRM_MODE_TYPE_DRIVER, 2376000, 7680, 10032,
> + 10208, 10800, 0, 4320, 4336, 4356, 4400, 0,
> + DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
> + .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
> + /* 207 - 7680x4320@60Hz 64:27 */
> + { DRM_MODE("7680x4320", DRM_MODE_TYPE_DRIVER, 2376000, 7680, 8232,
> + 8408, 9000, 0, 4320, 4336, 4356, 4400, 0,
> + DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
> + .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
> + /* 208 - 7680x4320@100Hz 64:27 */
> + { DRM_MODE("7680x4320", DRM_MODE_TYPE_DRIVER, 4752000, 7680, 9792,
> + 9968, 10560, 0, 4320, 4336, 4356, 4500, 0,
> + DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
> + .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
> + /* 209 - 7680x4320@120Hz 64:27 */
> + { DRM_MODE("7680x4320", DRM_MODE_TYPE_DRIVER, 4752000, 7680, 8032,
> + 8208, 8800, 0, 4320, 4336, 4356, 4500, 0,
> + DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
> + .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
> + /* 210 - 10240x4320@24Hz 64:27 */
> + { DRM_MODE("10240x4320", DRM_MODE_TYPE_DRIVER, 1485000, 10240, 11732,
> + 11908, 12500, 0, 4320, 4336, 4356, 4950, 0,
> + DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
> + .vrefresh = 24, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
> + /* 211 - 10240x4320@25Hz 64:27 */
> + { DRM_MODE("10240x4320", DRM_MODE_TYPE_DRIVER, 1485000, 10240, 12732,
> + 12908, 13500, 0, 4320, 4336, 4356, 4400, 0,
> + DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
> + .vrefresh = 25, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
> + /* 212 - 10240x4320@30Hz 64:27 */
> + { DRM_MODE("10240x4320", DRM_MODE_TYPE_DRIVER, 1485000, 10240, 10528,
> + 10704, 11000, 0, 4320, 4336, 4356, 4500, 0,
> + DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
> + .vrefresh = 30, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
> + /* 213 - 10240x4320@48Hz 64:27 */
> + { DRM_MODE("10240x4320", DRM_MODE_TYPE_DRIVER, 2970000, 10240, 11732,
> + 11908, 12500, 0, 4320, 4336, 4356, 4950, 0,
> + DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
> + .vrefresh = 48, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
> + /* 214 - 10240x4320@50Hz 64:27 */
> + { DRM_MODE("10240x4320", DRM_MODE_TYPE_DRIVER, 2970000, 10240, 12732,
> + 12908, 13500, 0, 4320, 4336, 4356, 4400, 0,
> + DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
> + .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
> + /* 215 - 10240x4320@60Hz 64:27 */
> + { DRM_MODE("10240x4320", DRM_MODE_TYPE_DRIVER, 2970000, 10240, 10528,
> + 10704, 11000, 0, 4320, 4336, 4356, 4500, 0,
> + DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
> + .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
> + /* 216 - 10240x4320@100Hz 64:27 */
> + { DRM_MODE("10240x4320", DRM_MODE_TYPE_DRIVER, 5940000, 10240, 12432,
> + 12608, 13200, 0, 4320, 4336, 4356, 4500, 0,
> + DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
> + .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
> + /* 217 - 10240x4320@120Hz 64:27 */
> + { DRM_MODE("10240x4320", DRM_MODE_TYPE_DRIVER, 5940000, 10240, 10528,
> + 10704, 11000, 0, 4320, 4336, 4356, 4500, 0,
> + DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
> + .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
> + /* 218 - 4096x2160@100Hz 256:135 */
> + { DRM_MODE("4096x2160", DRM_MODE_TYPE_DRIVER, 1188000, 4096, 4896,
> + 4984, 5280, 0, 2160, 2168, 2178, 2250, 0,
> + DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
> + .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_256_135, },
> + /* 219 - 4096x2160@120Hz 256:135 */
> + { DRM_MODE("4096x2160", DRM_MODE_TYPE_DRIVER, 1188000, 4096, 4184,
> + 4272, 4400, 0, 2160, 2168, 2178, 2250, 0,
> + DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
> + .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_256_135, },
> +};
> +
> /*
> * HDMI 1.4 4k modes. Index using the VIC.
> */
> @@ -3072,17 +3215,21 @@ static const struct drm_display_mode *cea_mode_for_vic(u8 vic)
> return NULL;
> if (vic < ARRAY_SIZE(edid_cea_modes_0))
> return &edid_cea_modes_0[vic];
> + if (vic >= 193 && vic < 193 + ARRAY_SIZE(edid_cea_modes_193))
> + return &edid_cea_modes_193[vic - 193];
> return NULL;
> }
>
> static u8 cea_num_vics(void)
> {
> - return ARRAY_SIZE(edid_cea_modes_0);
> + return 193 + ARRAY_SIZE(edid_cea_modes_193);
> }
>
> static u8 cea_next_vic(u8 vic)
> {
> - return vic + 1;
> + if (++vic == ARRAY_SIZE(edid_cea_modes_0))
> + vic = 193;
> + return vic;
> }
>
> /*
> --
> 2.21.0
>
> _______________________________________________
> dri-devel mailing list
> dri-devel@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/dri-devel
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^ permalink raw reply [flat|nested] 25+ messages in thread
* Re: [PATCH v3 4/4] drm/edid: Make sure the CEA mode arrays have the correct amount of modes
2019-09-25 13:55 ` [PATCH v3 4/4] drm/edid: Make sure the CEA mode arrays have the correct amount of modes Ville Syrjala
@ 2019-09-27 21:38 ` Manasi Navare
2019-12-10 23:20 ` [v3,4/4] " Tom Anderson
1 sibling, 0 replies; 25+ messages in thread
From: Manasi Navare @ 2019-09-27 21:38 UTC (permalink / raw)
To: Ville Syrjala; +Cc: Hans Verkuil, intel-gfc, dri-devel
On Wed, Sep 25, 2019 at 04:55:02PM +0300, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> We depend on a specific relationship between the VIC number and the
> index in the CEA mode arrays. Assert that the arrays have the excpected
^^^expected
> size to make sure we've not accidentally left holes in them.
>
> v2: Pimp the BUILD_BUG_ON()s
>
> Cc: Hans Verkuil <hansverk@cisco.com>
> Cc: Shashank Sharma <shashank.sharma@intel.com>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
With the typo fixed,
Reviewed-by: Manasi Navare <manasi.d.navare@intel.com>
Manasi
> ---
> drivers/gpu/drm/drm_edid.c | 3 +++
> 1 file changed, 3 insertions(+)
>
> diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
> index 0007004d3221..06cac8e2afc2 100644
> --- a/drivers/gpu/drm/drm_edid.c
> +++ b/drivers/gpu/drm/drm_edid.c
> @@ -3209,6 +3209,9 @@ static u8 *drm_find_cea_extension(const struct edid *edid)
>
> static const struct drm_display_mode *cea_mode_for_vic(u8 vic)
> {
> + BUILD_BUG_ON(1 + ARRAY_SIZE(edid_cea_modes_1) - 1 != 127);
> + BUILD_BUG_ON(193 + ARRAY_SIZE(edid_cea_modes_193) - 1 != 219);
> +
> if (vic >= 1 && vic < 1 + ARRAY_SIZE(edid_cea_modes_1))
> return &edid_cea_modes_1[vic - 1];
> if (vic >= 193 && vic < 193 + ARRAY_SIZE(edid_cea_modes_193))
> --
> 2.21.0
>
> _______________________________________________
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> dri-devel@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/dri-devel
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^ permalink raw reply [flat|nested] 25+ messages in thread
* Re: [PATCH v3 1/4] drm/edid: Abstract away cea_edid_modes[]
2019-09-25 13:54 ` [PATCH v3 1/4] drm/edid: Abstract away cea_edid_modes[] Ville Syrjala
@ 2019-10-03 8:16 ` Sharma, Shashank
2019-10-03 13:55 ` Ville Syrjälä
[not found] ` <20191210223423.GA85292@google.com>
1 sibling, 1 reply; 25+ messages in thread
From: Sharma, Shashank @ 2019-10-03 8:16 UTC (permalink / raw)
To: Ville Syrjala, dri-devel; +Cc: Hans Verkuil, Intel Graphics Development
Hello Ville,
On 9/25/2019 7:24 PM, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> We're going to need two cea mode tables (on for VICs < 128,
> another one for VICs >= 193). To that end replace the direct
> edid_cea_modes[] lookups with a function call. And we'll rename
> the array to edid_cea_modes_0[] to indicathe how it's to be
Should we call it something which indicates the spec version, instead of
a random '0', like edid_cea_861_F_modes[] and the next one as _G_modes
or CTA_3 modes ?
> indexed.
>
> Cc: Hans Verkuil <hansverk@cisco.com>
> Cc: Shashank Sharma <shashank.sharma@intel.com>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
> drivers/gpu/drm/drm_edid.c | 80 +++++++++++++++++++++++++++-----------
> 1 file changed, 58 insertions(+), 22 deletions(-)
>
> diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
> index 3c9703b08491..b700fc075257 100644
> --- a/drivers/gpu/drm/drm_edid.c
> +++ b/drivers/gpu/drm/drm_edid.c
> @@ -707,12 +707,11 @@ static const struct minimode extra_modes[] = {
> };
>
> /*
> - * Probably taken from CEA-861 spec.
> - * This table is converted from xorg's hw/xfree86/modes/xf86EdidModes.c.
> + * From CEA/CTA-861 spec.
> *
> - * Index using the VIC.
> + * Index with VIC.
> */
> -static const struct drm_display_mode edid_cea_modes[] = {
> +static const struct drm_display_mode edid_cea_modes_0[] = {
> /* 0 - dummy, VICs start at 1 */
> { },
> /* 1 - 640x480@60Hz 4:3 */
> @@ -3067,6 +3066,25 @@ static u8 *drm_find_cea_extension(const struct edid *edid)
> return cea;
> }
>
> +static const struct drm_display_mode *cea_mode_for_vic(u8 vic)
> +{
> + if (!vic)
> + return NULL;
> + if (vic < ARRAY_SIZE(edid_cea_modes_0))
> + return &edid_cea_modes_0[vic];
> + return NULL;
> +}
> +
> +static u8 cea_num_vics(void)
> +{
> + return ARRAY_SIZE(edid_cea_modes_0);
> +}
> +
> +static u8 cea_next_vic(u8 vic)
> +{
> + return vic + 1;
Is there any specific reason for adding a new helper function, just to
return vic + 1 ?
> +}
> +
> /*
> * Calculate the alternate clock for the CEA mode
> * (60Hz vs. 59.94Hz etc.)
> @@ -3104,14 +3122,14 @@ cea_mode_alternate_timings(u8 vic, struct drm_display_mode *mode)
> * get the other variants by simply increasing the
> * vertical front porch length.
> */
> - BUILD_BUG_ON(edid_cea_modes[8].vtotal != 262 ||
> - edid_cea_modes[9].vtotal != 262 ||
> - edid_cea_modes[12].vtotal != 262 ||
> - edid_cea_modes[13].vtotal != 262 ||
> - edid_cea_modes[23].vtotal != 312 ||
> - edid_cea_modes[24].vtotal != 312 ||
> - edid_cea_modes[27].vtotal != 312 ||
> - edid_cea_modes[28].vtotal != 312);
> + BUILD_BUG_ON(cea_mode_for_vic(8)->vtotal != 262 ||
> + cea_mode_for_vic(9)->vtotal != 262 ||
> + cea_mode_for_vic(12)->vtotal != 262 ||
> + cea_mode_for_vic(13)->vtotal != 262 ||
> + cea_mode_for_vic(23)->vtotal != 312 ||
> + cea_mode_for_vic(24)->vtotal != 312 ||
> + cea_mode_for_vic(27)->vtotal != 312 ||
> + cea_mode_for_vic(28)->vtotal != 312);
>
> if (((vic == 8 || vic == 9 ||
> vic == 12 || vic == 13) && mode->vtotal < 263) ||
> @@ -3139,10 +3157,16 @@ static u8 drm_match_cea_mode_clock_tolerance(const struct drm_display_mode *to_m
> if (to_match->picture_aspect_ratio)
> match_flags |= DRM_MODE_MATCH_ASPECT_RATIO;
>
> - for (vic = 1; vic < ARRAY_SIZE(edid_cea_modes); vic++) {
> - struct drm_display_mode cea_mode = edid_cea_modes[vic];
> + for (vic = 1; vic < cea_num_vics(); vic = cea_next_vic(vic)) {
> + const struct drm_display_mode *mode = cea_mode_for_vic(vic);
> + struct drm_display_mode cea_mode;
> unsigned int clock1, clock2;
>
> + if (!mode)
> + continue;
> +
> + cea_mode = *mode;
> +
> /* Check both 60Hz and 59.94Hz */
> clock1 = cea_mode.clock;
> clock2 = cea_mode_alternate_clock(&cea_mode);
> @@ -3178,10 +3202,16 @@ u8 drm_match_cea_mode(const struct drm_display_mode *to_match)
> if (to_match->picture_aspect_ratio)
> match_flags |= DRM_MODE_MATCH_ASPECT_RATIO;
>
> - for (vic = 1; vic < ARRAY_SIZE(edid_cea_modes); vic++) {
> - struct drm_display_mode cea_mode = edid_cea_modes[vic];
> + for (vic = 1; vic < cea_num_vics(); vic = cea_next_vic(vic)) {
Again, why not just vic+=1 :) ?
> + const struct drm_display_mode *mode = cea_mode_for_vic(vic);
> + struct drm_display_mode cea_mode;
> unsigned int clock1, clock2;
>
> + if (!mode)
> + continue;
> +
> + cea_mode = *mode;
> +
> /* Check both 60Hz and 59.94Hz */
> clock1 = cea_mode.clock;
> clock2 = cea_mode_alternate_clock(&cea_mode);
> @@ -3202,7 +3232,7 @@ EXPORT_SYMBOL(drm_match_cea_mode);
>
> static bool drm_valid_cea_vic(u8 vic)
> {
> - return vic > 0 && vic < ARRAY_SIZE(edid_cea_modes);
> + return cea_mode_for_vic(vic) != NULL;
> }
>
> /**
> @@ -3214,7 +3244,13 @@ static bool drm_valid_cea_vic(u8 vic)
> */
> enum hdmi_picture_aspect drm_get_cea_aspect_ratio(const u8 video_code)
> {
> - return edid_cea_modes[video_code].picture_aspect_ratio;
> + const struct drm_display_mode *mode;
> +
> + mode = cea_mode_for_vic(video_code);
> + if (mode)
> + return mode->picture_aspect_ratio;
> +
> + return HDMI_PICTURE_ASPECT_NONE;
> }
> EXPORT_SYMBOL(drm_get_cea_aspect_ratio);
>
> @@ -3323,7 +3359,7 @@ add_alternate_cea_modes(struct drm_connector *connector, struct edid *edid)
> unsigned int clock1, clock2;
>
> if (drm_valid_cea_vic(vic)) {
> - cea_mode = &edid_cea_modes[vic];
> + cea_mode = cea_mode_for_vic(vic);
> clock2 = cea_mode_alternate_clock(cea_mode);
> } else {
> vic = drm_match_hdmi_mode(mode);
> @@ -3398,7 +3434,7 @@ drm_display_mode_from_vic_index(struct drm_connector *connector,
> if (!drm_valid_cea_vic(vic))
> return NULL;
>
> - newmode = drm_mode_duplicate(dev, &edid_cea_modes[vic]);
> + newmode = drm_mode_duplicate(dev, cea_mode_for_vic(vic));
> if (!newmode)
> return NULL;
>
> @@ -3432,7 +3468,7 @@ static int do_y420vdb_modes(struct drm_connector *connector,
> if (!drm_valid_cea_vic(vic))
> continue;
>
> - newmode = drm_mode_duplicate(dev, &edid_cea_modes[vic]);
> + newmode = drm_mode_duplicate(dev, cea_mode_for_vic(vic));
> if (!newmode)
> break;
> bitmap_set(hdmi->y420_vdb_modes, vic, 1);
> @@ -4001,7 +4037,7 @@ static void fixup_detailed_cea_mode_clock(struct drm_display_mode *mode)
> vic = drm_match_cea_mode_clock_tolerance(mode, 5);
> if (drm_valid_cea_vic(vic)) {
> type = "CEA";
> - cea_mode = &edid_cea_modes[vic];
> + cea_mode = cea_mode_for_vic(vic);
> clock1 = cea_mode->clock;
> clock2 = cea_mode_alternate_clock(cea_mode);
> } else {
- Shashank
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^ permalink raw reply [flat|nested] 25+ messages in thread
* Re: [PATCH v3 2/4] drm/edid: Add CTA-861-G modes with VIC >= 193
2019-09-25 13:55 ` Ville Syrjala
2019-09-27 21:35 ` Manasi Navare
@ 2019-10-03 8:22 ` Sharma, Shashank
2019-10-03 14:15 ` Ville Syrjälä
2019-12-10 23:16 ` [v3,2/4] " Tom Anderson
2 siblings, 1 reply; 25+ messages in thread
From: Sharma, Shashank @ 2019-10-03 8:22 UTC (permalink / raw)
To: Ville Syrjala, dri-devel; +Cc: Hans Verkuil, Intel Graphics Development
On 9/25/2019 7:25 PM, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> Add a second table to the cea modes with VIC >= 193.
>
> Cc: Hans Verkuil <hansverk@cisco.com>
> Cc: Shashank Sharma <shashank.sharma@intel.com>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
> drivers/gpu/drm/drm_edid.c | 151 ++++++++++++++++++++++++++++++++++++-
> 1 file changed, 149 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
> index b700fc075257..9f6996323efa 100644
> --- a/drivers/gpu/drm/drm_edid.c
> +++ b/drivers/gpu/drm/drm_edid.c
> @@ -1376,6 +1376,149 @@ static const struct drm_display_mode edid_cea_modes_0[] = {
> .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
> };
>
> +/*
> + * From CEA/CTA-861 spec.
> + *
> + * Index with VIC-193.
> + */
> +static const struct drm_display_mode edid_cea_modes_193[] = {
just like previous patch, should we call it edid_cea_861_g_modes ?
> + /* 193 - 5120x2160@120Hz 64:27 */
> + { DRM_MODE("5120x2160", DRM_MODE_TYPE_DRIVER, 1485000, 5120, 5284,
> + 5372, 5500, 0, 2160, 2168, 2178, 2250, 0,
> + DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
> + .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
> + /* 194 - 7680x4320@24Hz 16:9 */
> + { DRM_MODE("7680x4320", DRM_MODE_TYPE_DRIVER, 1188000, 7680, 10232,
> + 10408, 11000, 0, 4320, 4336, 4356, 4500, 0,
> + DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
> + .vrefresh = 24, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
> + /* 195 - 7680x4320@25Hz 16:9 */
> + { DRM_MODE("7680x4320", DRM_MODE_TYPE_DRIVER, 1188000, 7680, 10032,
> + 10208, 10800, 0, 4320, 4336, 4356, 4400, 0,
> + DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
> + .vrefresh = 25, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
> + /* 196 - 7680x4320@30Hz 16:9 */
> + { DRM_MODE("7680x4320", DRM_MODE_TYPE_DRIVER, 1188000, 7680, 8232,
> + 8408, 9000, 0, 4320, 4336, 4356, 4400, 0,
> + DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
> + .vrefresh = 30, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
> + /* 197 - 7680x4320@48Hz 16:9 */
> + { DRM_MODE("7680x4320", DRM_MODE_TYPE_DRIVER, 2376000, 7680, 10232,
> + 10408, 11000, 0, 4320, 4336, 4356, 4500, 0,
> + DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
> + .vrefresh = 48, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
> + /* 198 - 7680x4320@50Hz 16:9 */
> + { DRM_MODE("7680x4320", DRM_MODE_TYPE_DRIVER, 2376000, 7680, 10032,
> + 10208, 10800, 0, 4320, 4336, 4356, 4400, 0,
> + DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
> + .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
> + /* 199 - 7680x4320@60Hz 16:9 */
> + { DRM_MODE("7680x4320", DRM_MODE_TYPE_DRIVER, 2376000, 7680, 8232,
> + 8408, 9000, 0, 4320, 4336, 4356, 4400, 0,
> + DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
> + .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
> + /* 200 - 7680x4320@100Hz 16:9 */
> + { DRM_MODE("7680x4320", DRM_MODE_TYPE_DRIVER, 4752000, 7680, 9792,
> + 9968, 10560, 0, 4320, 4336, 4356, 4500, 0,
> + DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
> + .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
> + /* 201 - 7680x4320@120Hz 16:9 */
> + { DRM_MODE("7680x4320", DRM_MODE_TYPE_DRIVER, 4752000, 7680, 8032,
> + 8208, 8800, 0, 4320, 4336, 4356, 4500, 0,
> + DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
> + .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
> + /* 202 - 7680x4320@24Hz 64:27 */
> + { DRM_MODE("7680x4320", DRM_MODE_TYPE_DRIVER, 1188000, 7680, 10232,
> + 10408, 11000, 0, 4320, 4336, 4356, 4500, 0,
> + DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
> + .vrefresh = 24, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
> + /* 203 - 7680x4320@25Hz 64:27 */
> + { DRM_MODE("7680x4320", DRM_MODE_TYPE_DRIVER, 1188000, 7680, 10032,
> + 10208, 10800, 0, 4320, 4336, 4356, 4400, 0,
> + DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
> + .vrefresh = 25, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
> + /* 204 - 7680x4320@30Hz 64:27 */
> + { DRM_MODE("7680x4320", DRM_MODE_TYPE_DRIVER, 1188000, 7680, 8232,
> + 8408, 9000, 0, 4320, 4336, 4356, 4400, 0,
> + DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
> + .vrefresh = 30, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
> + /* 205 - 7680x4320@48Hz 64:27 */
> + { DRM_MODE("7680x4320", DRM_MODE_TYPE_DRIVER, 2376000, 7680, 10232,
> + 10408, 11000, 0, 4320, 4336, 4356, 4500, 0,
> + DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
> + .vrefresh = 48, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
> + /* 206 - 7680x4320@50Hz 64:27 */
> + { DRM_MODE("7680x4320", DRM_MODE_TYPE_DRIVER, 2376000, 7680, 10032,
> + 10208, 10800, 0, 4320, 4336, 4356, 4400, 0,
> + DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
> + .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
> + /* 207 - 7680x4320@60Hz 64:27 */
> + { DRM_MODE("7680x4320", DRM_MODE_TYPE_DRIVER, 2376000, 7680, 8232,
> + 8408, 9000, 0, 4320, 4336, 4356, 4400, 0,
> + DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
> + .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
> + /* 208 - 7680x4320@100Hz 64:27 */
> + { DRM_MODE("7680x4320", DRM_MODE_TYPE_DRIVER, 4752000, 7680, 9792,
> + 9968, 10560, 0, 4320, 4336, 4356, 4500, 0,
> + DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
> + .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
> + /* 209 - 7680x4320@120Hz 64:27 */
> + { DRM_MODE("7680x4320", DRM_MODE_TYPE_DRIVER, 4752000, 7680, 8032,
> + 8208, 8800, 0, 4320, 4336, 4356, 4500, 0,
> + DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
> + .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
> + /* 210 - 10240x4320@24Hz 64:27 */
> + { DRM_MODE("10240x4320", DRM_MODE_TYPE_DRIVER, 1485000, 10240, 11732,
> + 11908, 12500, 0, 4320, 4336, 4356, 4950, 0,
> + DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
> + .vrefresh = 24, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
> + /* 211 - 10240x4320@25Hz 64:27 */
> + { DRM_MODE("10240x4320", DRM_MODE_TYPE_DRIVER, 1485000, 10240, 12732,
> + 12908, 13500, 0, 4320, 4336, 4356, 4400, 0,
> + DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
> + .vrefresh = 25, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
> + /* 212 - 10240x4320@30Hz 64:27 */
> + { DRM_MODE("10240x4320", DRM_MODE_TYPE_DRIVER, 1485000, 10240, 10528,
> + 10704, 11000, 0, 4320, 4336, 4356, 4500, 0,
> + DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
> + .vrefresh = 30, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
> + /* 213 - 10240x4320@48Hz 64:27 */
> + { DRM_MODE("10240x4320", DRM_MODE_TYPE_DRIVER, 2970000, 10240, 11732,
> + 11908, 12500, 0, 4320, 4336, 4356, 4950, 0,
> + DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
> + .vrefresh = 48, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
> + /* 214 - 10240x4320@50Hz 64:27 */
> + { DRM_MODE("10240x4320", DRM_MODE_TYPE_DRIVER, 2970000, 10240, 12732,
> + 12908, 13500, 0, 4320, 4336, 4356, 4400, 0,
> + DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
> + .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
> + /* 215 - 10240x4320@60Hz 64:27 */
> + { DRM_MODE("10240x4320", DRM_MODE_TYPE_DRIVER, 2970000, 10240, 10528,
> + 10704, 11000, 0, 4320, 4336, 4356, 4500, 0,
> + DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
> + .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
> + /* 216 - 10240x4320@100Hz 64:27 */
> + { DRM_MODE("10240x4320", DRM_MODE_TYPE_DRIVER, 5940000, 10240, 12432,
> + 12608, 13200, 0, 4320, 4336, 4356, 4500, 0,
> + DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
> + .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
> + /* 217 - 10240x4320@120Hz 64:27 */
> + { DRM_MODE("10240x4320", DRM_MODE_TYPE_DRIVER, 5940000, 10240, 10528,
> + 10704, 11000, 0, 4320, 4336, 4356, 4500, 0,
> + DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
> + .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
> + /* 218 - 4096x2160@100Hz 256:135 */
> + { DRM_MODE("4096x2160", DRM_MODE_TYPE_DRIVER, 1188000, 4096, 4896,
> + 4984, 5280, 0, 2160, 2168, 2178, 2250, 0,
> + DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
> + .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_256_135, },
> + /* 219 - 4096x2160@120Hz 256:135 */
> + { DRM_MODE("4096x2160", DRM_MODE_TYPE_DRIVER, 1188000, 4096, 4184,
> + 4272, 4400, 0, 2160, 2168, 2178, 2250, 0,
> + DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
> + .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_256_135, },
> +};
> +
> /*
> * HDMI 1.4 4k modes. Index using the VIC.
> */
> @@ -3072,17 +3215,21 @@ static const struct drm_display_mode *cea_mode_for_vic(u8 vic)
> return NULL;
> if (vic < ARRAY_SIZE(edid_cea_modes_0))
> return &edid_cea_modes_0[vic];
> + if (vic >= 193 && vic < 193 + ARRAY_SIZE(edid_cea_modes_193))
> + return &edid_cea_modes_193[vic - 193];
> return NULL;
> }
>
> static u8 cea_num_vics(void)
> {
> - return ARRAY_SIZE(edid_cea_modes_0);
> + return 193 + ARRAY_SIZE(edid_cea_modes_193);
Now that we are planning to remove the dummy mode index at 0, shouldn't
this be 192 + ARRAY_SZ(), as this array starts from VIC 193 ?
> }
>
> static u8 cea_next_vic(u8 vic)
> {
> - return vic + 1;
> + if (++vic == ARRAY_SIZE(edid_cea_modes_0))
> + vic = 193;
Ok, this explains why separate function for next vic :)
- Shashank
> + return vic;
> }
>
> /*
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^ permalink raw reply [flat|nested] 25+ messages in thread
* Re: [PATCH v3 3/4] drm/edid: Throw away the dummy VIC 0 cea mode
2019-09-25 13:55 ` [PATCH v3 3/4] drm/edid: Throw away the dummy VIC 0 cea mode Ville Syrjala
@ 2019-10-03 8:29 ` Sharma, Shashank
2019-10-03 14:16 ` Ville Syrjälä
2019-12-10 23:18 ` [v3,3/4] " Tom Anderson
1 sibling, 1 reply; 25+ messages in thread
From: Sharma, Shashank @ 2019-10-03 8:29 UTC (permalink / raw)
To: Ville Syrjala, dri-devel; +Cc: Hans Verkuil, Intel Graphics Development
On 9/25/2019 7:25 PM, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> Now that the cea mode handling is not 100% tied to the single
> array the dummy VIC 0 mode is pretty much pointles. Throw it
> out.
>
> Cc: Hans Verkuil <hansverk@cisco.com>
> Cc: Shashank Sharma <shashank.sharma@intel.com>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
> drivers/gpu/drm/drm_edid.c | 14 +++++---------
> 1 file changed, 5 insertions(+), 9 deletions(-)
>
> diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
> index 9f6996323efa..0007004d3221 100644
> --- a/drivers/gpu/drm/drm_edid.c
> +++ b/drivers/gpu/drm/drm_edid.c
> @@ -709,11 +709,9 @@ static const struct minimode extra_modes[] = {
> /*
> * From CEA/CTA-861 spec.
> *
> - * Index with VIC.
> + * Index with VIC-1.
Do we want to really do this ? Till now, due to dummy VIC, indexing was
pretty direct as per VIC, which was making the code easy to read and
understand. I would still think that keeping the dummy VIC and adjusting
the size of cea_modes_0[] in the size function, would be something
neater to do, do you think so ?
- Shashank
> */
> -static const struct drm_display_mode edid_cea_modes_0[] = {
> - /* 0 - dummy, VICs start at 1 */
> - { },
> +static const struct drm_display_mode edid_cea_modes_1[] = {
> /* 1 - 640x480@60Hz 4:3 */
> { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25175, 640, 656,
> 752, 800, 0, 480, 490, 492, 525, 0,
> @@ -3211,10 +3209,8 @@ static u8 *drm_find_cea_extension(const struct edid *edid)
>
> static const struct drm_display_mode *cea_mode_for_vic(u8 vic)
> {
> - if (!vic)
> - return NULL;
> - if (vic < ARRAY_SIZE(edid_cea_modes_0))
> - return &edid_cea_modes_0[vic];
> + if (vic >= 1 && vic < 1 + ARRAY_SIZE(edid_cea_modes_1))
> + return &edid_cea_modes_1[vic - 1];
> if (vic >= 193 && vic < 193 + ARRAY_SIZE(edid_cea_modes_193))
> return &edid_cea_modes_193[vic - 193];
> return NULL;
> @@ -3227,7 +3223,7 @@ static u8 cea_num_vics(void)
>
> static u8 cea_next_vic(u8 vic)
> {
> - if (++vic == ARRAY_SIZE(edid_cea_modes_0))
> + if (++vic == 1 + ARRAY_SIZE(edid_cea_modes_1))
> vic = 193;
> return vic;
> }
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^ permalink raw reply [flat|nested] 25+ messages in thread
* Re: [PATCH v3 1/4] drm/edid: Abstract away cea_edid_modes[]
2019-10-03 8:16 ` Sharma, Shashank
@ 2019-10-03 13:55 ` Ville Syrjälä
0 siblings, 0 replies; 25+ messages in thread
From: Ville Syrjälä @ 2019-10-03 13:55 UTC (permalink / raw)
To: Sharma, Shashank; +Cc: Hans Verkuil, Intel Graphics Development, dri-devel
On Thu, Oct 03, 2019 at 01:46:16PM +0530, Sharma, Shashank wrote:
> Hello Ville,
>
> On 9/25/2019 7:24 PM, Ville Syrjala wrote:
> > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> >
> > We're going to need two cea mode tables (on for VICs < 128,
> > another one for VICs >= 193). To that end replace the direct
> > edid_cea_modes[] lookups with a function call. And we'll rename
> > the array to edid_cea_modes_0[] to indicathe how it's to be
> Should we call it something which indicates the spec version, instead of
> a random '0', like edid_cea_861_F_modes[] and the next one as _G_modes
> or CTA_3 modes ?
The spec version is not particularly interesting. New specs just add more
modes. If we really want to indicate that somehow I think a few comments
would do.
> > indexed.
> >
> > Cc: Hans Verkuil <hansverk@cisco.com>
> > Cc: Shashank Sharma <shashank.sharma@intel.com>
> > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > ---
> > drivers/gpu/drm/drm_edid.c | 80 +++++++++++++++++++++++++++-----------
> > 1 file changed, 58 insertions(+), 22 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
> > index 3c9703b08491..b700fc075257 100644
> > --- a/drivers/gpu/drm/drm_edid.c
> > +++ b/drivers/gpu/drm/drm_edid.c
> > @@ -707,12 +707,11 @@ static const struct minimode extra_modes[] = {
> > };
> >
> > /*
> > - * Probably taken from CEA-861 spec.
> > - * This table is converted from xorg's hw/xfree86/modes/xf86EdidModes.c.
> > + * From CEA/CTA-861 spec.
> > *
> > - * Index using the VIC.
> > + * Index with VIC.
> > */
> > -static const struct drm_display_mode edid_cea_modes[] = {
> > +static const struct drm_display_mode edid_cea_modes_0[] = {
> > /* 0 - dummy, VICs start at 1 */
> > { },
> > /* 1 - 640x480@60Hz 4:3 */
> > @@ -3067,6 +3066,25 @@ static u8 *drm_find_cea_extension(const struct edid *edid)
> > return cea;
> > }
> >
> > +static const struct drm_display_mode *cea_mode_for_vic(u8 vic)
> > +{
> > + if (!vic)
> > + return NULL;
> > + if (vic < ARRAY_SIZE(edid_cea_modes_0))
> > + return &edid_cea_modes_0[vic];
> > + return NULL;
> > +}
> > +
> > +static u8 cea_num_vics(void)
> > +{
> > + return ARRAY_SIZE(edid_cea_modes_0);
> > +}
> > +
> > +static u8 cea_next_vic(u8 vic)
> > +{
> > + return vic + 1;
> Is there any specific reason for adding a new helper function, just to
> return vic + 1 ?
See the next patch.
> > +}
> > +
> > /*
> > * Calculate the alternate clock for the CEA mode
> > * (60Hz vs. 59.94Hz etc.)
> > @@ -3104,14 +3122,14 @@ cea_mode_alternate_timings(u8 vic, struct drm_display_mode *mode)
> > * get the other variants by simply increasing the
> > * vertical front porch length.
> > */
> > - BUILD_BUG_ON(edid_cea_modes[8].vtotal != 262 ||
> > - edid_cea_modes[9].vtotal != 262 ||
> > - edid_cea_modes[12].vtotal != 262 ||
> > - edid_cea_modes[13].vtotal != 262 ||
> > - edid_cea_modes[23].vtotal != 312 ||
> > - edid_cea_modes[24].vtotal != 312 ||
> > - edid_cea_modes[27].vtotal != 312 ||
> > - edid_cea_modes[28].vtotal != 312);
> > + BUILD_BUG_ON(cea_mode_for_vic(8)->vtotal != 262 ||
> > + cea_mode_for_vic(9)->vtotal != 262 ||
> > + cea_mode_for_vic(12)->vtotal != 262 ||
> > + cea_mode_for_vic(13)->vtotal != 262 ||
> > + cea_mode_for_vic(23)->vtotal != 312 ||
> > + cea_mode_for_vic(24)->vtotal != 312 ||
> > + cea_mode_for_vic(27)->vtotal != 312 ||
> > + cea_mode_for_vic(28)->vtotal != 312);
> >
> > if (((vic == 8 || vic == 9 ||
> > vic == 12 || vic == 13) && mode->vtotal < 263) ||
> > @@ -3139,10 +3157,16 @@ static u8 drm_match_cea_mode_clock_tolerance(const struct drm_display_mode *to_m
> > if (to_match->picture_aspect_ratio)
> > match_flags |= DRM_MODE_MATCH_ASPECT_RATIO;
> >
> > - for (vic = 1; vic < ARRAY_SIZE(edid_cea_modes); vic++) {
> > - struct drm_display_mode cea_mode = edid_cea_modes[vic];
> > + for (vic = 1; vic < cea_num_vics(); vic = cea_next_vic(vic)) {
> > + const struct drm_display_mode *mode = cea_mode_for_vic(vic);
> > + struct drm_display_mode cea_mode;
> > unsigned int clock1, clock2;
> >
> > + if (!mode)
> > + continue;
> > +
> > + cea_mode = *mode;
> > +
> > /* Check both 60Hz and 59.94Hz */
> > clock1 = cea_mode.clock;
> > clock2 = cea_mode_alternate_clock(&cea_mode);
> > @@ -3178,10 +3202,16 @@ u8 drm_match_cea_mode(const struct drm_display_mode *to_match)
> > if (to_match->picture_aspect_ratio)
> > match_flags |= DRM_MODE_MATCH_ASPECT_RATIO;
> >
> > - for (vic = 1; vic < ARRAY_SIZE(edid_cea_modes); vic++) {
> > - struct drm_display_mode cea_mode = edid_cea_modes[vic];
> > + for (vic = 1; vic < cea_num_vics(); vic = cea_next_vic(vic)) {
> Again, why not just vic+=1 :) ?
> > + const struct drm_display_mode *mode = cea_mode_for_vic(vic);
> > + struct drm_display_mode cea_mode;
> > unsigned int clock1, clock2;
> >
> > + if (!mode)
> > + continue;
> > +
> > + cea_mode = *mode;
> > +
> > /* Check both 60Hz and 59.94Hz */
> > clock1 = cea_mode.clock;
> > clock2 = cea_mode_alternate_clock(&cea_mode);
> > @@ -3202,7 +3232,7 @@ EXPORT_SYMBOL(drm_match_cea_mode);
> >
> > static bool drm_valid_cea_vic(u8 vic)
> > {
> > - return vic > 0 && vic < ARRAY_SIZE(edid_cea_modes);
> > + return cea_mode_for_vic(vic) != NULL;
> > }
> >
> > /**
> > @@ -3214,7 +3244,13 @@ static bool drm_valid_cea_vic(u8 vic)
> > */
> > enum hdmi_picture_aspect drm_get_cea_aspect_ratio(const u8 video_code)
> > {
> > - return edid_cea_modes[video_code].picture_aspect_ratio;
> > + const struct drm_display_mode *mode;
> > +
> > + mode = cea_mode_for_vic(video_code);
> > + if (mode)
> > + return mode->picture_aspect_ratio;
> > +
> > + return HDMI_PICTURE_ASPECT_NONE;
> > }
> > EXPORT_SYMBOL(drm_get_cea_aspect_ratio);
> >
> > @@ -3323,7 +3359,7 @@ add_alternate_cea_modes(struct drm_connector *connector, struct edid *edid)
> > unsigned int clock1, clock2;
> >
> > if (drm_valid_cea_vic(vic)) {
> > - cea_mode = &edid_cea_modes[vic];
> > + cea_mode = cea_mode_for_vic(vic);
> > clock2 = cea_mode_alternate_clock(cea_mode);
> > } else {
> > vic = drm_match_hdmi_mode(mode);
> > @@ -3398,7 +3434,7 @@ drm_display_mode_from_vic_index(struct drm_connector *connector,
> > if (!drm_valid_cea_vic(vic))
> > return NULL;
> >
> > - newmode = drm_mode_duplicate(dev, &edid_cea_modes[vic]);
> > + newmode = drm_mode_duplicate(dev, cea_mode_for_vic(vic));
> > if (!newmode)
> > return NULL;
> >
> > @@ -3432,7 +3468,7 @@ static int do_y420vdb_modes(struct drm_connector *connector,
> > if (!drm_valid_cea_vic(vic))
> > continue;
> >
> > - newmode = drm_mode_duplicate(dev, &edid_cea_modes[vic]);
> > + newmode = drm_mode_duplicate(dev, cea_mode_for_vic(vic));
> > if (!newmode)
> > break;
> > bitmap_set(hdmi->y420_vdb_modes, vic, 1);
> > @@ -4001,7 +4037,7 @@ static void fixup_detailed_cea_mode_clock(struct drm_display_mode *mode)
> > vic = drm_match_cea_mode_clock_tolerance(mode, 5);
> > if (drm_valid_cea_vic(vic)) {
> > type = "CEA";
> > - cea_mode = &edid_cea_modes[vic];
> > + cea_mode = cea_mode_for_vic(vic);
> > clock1 = cea_mode->clock;
> > clock2 = cea_mode_alternate_clock(cea_mode);
> > } else {
> - Shashank
--
Ville Syrjälä
Intel
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^ permalink raw reply [flat|nested] 25+ messages in thread
* Re: [PATCH v3 2/4] drm/edid: Add CTA-861-G modes with VIC >= 193
2019-10-03 8:22 ` Sharma, Shashank
@ 2019-10-03 14:15 ` Ville Syrjälä
0 siblings, 0 replies; 25+ messages in thread
From: Ville Syrjälä @ 2019-10-03 14:15 UTC (permalink / raw)
To: Sharma, Shashank; +Cc: Hans Verkuil, Intel Graphics Development, dri-devel
On Thu, Oct 03, 2019 at 01:52:58PM +0530, Sharma, Shashank wrote:
>
> On 9/25/2019 7:25 PM, Ville Syrjala wrote:
> > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> >
> > Add a second table to the cea modes with VIC >= 193.
> >
> > Cc: Hans Verkuil <hansverk@cisco.com>
> > Cc: Shashank Sharma <shashank.sharma@intel.com>
> > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > ---
> > drivers/gpu/drm/drm_edid.c | 151 ++++++++++++++++++++++++++++++++++++-
> > 1 file changed, 149 insertions(+), 2 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
> > index b700fc075257..9f6996323efa 100644
> > --- a/drivers/gpu/drm/drm_edid.c
> > +++ b/drivers/gpu/drm/drm_edid.c
> > @@ -1376,6 +1376,149 @@ static const struct drm_display_mode edid_cea_modes_0[] = {
> > .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
> > };
> >
> > +/*
> > + * From CEA/CTA-861 spec.
> > + *
> > + * Index with VIC-193.
> > + */
> > +static const struct drm_display_mode edid_cea_modes_193[] = {
> just like previous patch, should we call it edid_cea_861_g_modes ?
> > + /* 193 - 5120x2160@120Hz 64:27 */
> > + { DRM_MODE("5120x2160", DRM_MODE_TYPE_DRIVER, 1485000, 5120, 5284,
> > + 5372, 5500, 0, 2160, 2168, 2178, 2250, 0,
> > + DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
> > + .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
> > + /* 194 - 7680x4320@24Hz 16:9 */
> > + { DRM_MODE("7680x4320", DRM_MODE_TYPE_DRIVER, 1188000, 7680, 10232,
> > + 10408, 11000, 0, 4320, 4336, 4356, 4500, 0,
> > + DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
> > + .vrefresh = 24, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
> > + /* 195 - 7680x4320@25Hz 16:9 */
> > + { DRM_MODE("7680x4320", DRM_MODE_TYPE_DRIVER, 1188000, 7680, 10032,
> > + 10208, 10800, 0, 4320, 4336, 4356, 4400, 0,
> > + DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
> > + .vrefresh = 25, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
> > + /* 196 - 7680x4320@30Hz 16:9 */
> > + { DRM_MODE("7680x4320", DRM_MODE_TYPE_DRIVER, 1188000, 7680, 8232,
> > + 8408, 9000, 0, 4320, 4336, 4356, 4400, 0,
> > + DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
> > + .vrefresh = 30, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
> > + /* 197 - 7680x4320@48Hz 16:9 */
> > + { DRM_MODE("7680x4320", DRM_MODE_TYPE_DRIVER, 2376000, 7680, 10232,
> > + 10408, 11000, 0, 4320, 4336, 4356, 4500, 0,
> > + DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
> > + .vrefresh = 48, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
> > + /* 198 - 7680x4320@50Hz 16:9 */
> > + { DRM_MODE("7680x4320", DRM_MODE_TYPE_DRIVER, 2376000, 7680, 10032,
> > + 10208, 10800, 0, 4320, 4336, 4356, 4400, 0,
> > + DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
> > + .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
> > + /* 199 - 7680x4320@60Hz 16:9 */
> > + { DRM_MODE("7680x4320", DRM_MODE_TYPE_DRIVER, 2376000, 7680, 8232,
> > + 8408, 9000, 0, 4320, 4336, 4356, 4400, 0,
> > + DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
> > + .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
> > + /* 200 - 7680x4320@100Hz 16:9 */
> > + { DRM_MODE("7680x4320", DRM_MODE_TYPE_DRIVER, 4752000, 7680, 9792,
> > + 9968, 10560, 0, 4320, 4336, 4356, 4500, 0,
> > + DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
> > + .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
> > + /* 201 - 7680x4320@120Hz 16:9 */
> > + { DRM_MODE("7680x4320", DRM_MODE_TYPE_DRIVER, 4752000, 7680, 8032,
> > + 8208, 8800, 0, 4320, 4336, 4356, 4500, 0,
> > + DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
> > + .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
> > + /* 202 - 7680x4320@24Hz 64:27 */
> > + { DRM_MODE("7680x4320", DRM_MODE_TYPE_DRIVER, 1188000, 7680, 10232,
> > + 10408, 11000, 0, 4320, 4336, 4356, 4500, 0,
> > + DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
> > + .vrefresh = 24, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
> > + /* 203 - 7680x4320@25Hz 64:27 */
> > + { DRM_MODE("7680x4320", DRM_MODE_TYPE_DRIVER, 1188000, 7680, 10032,
> > + 10208, 10800, 0, 4320, 4336, 4356, 4400, 0,
> > + DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
> > + .vrefresh = 25, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
> > + /* 204 - 7680x4320@30Hz 64:27 */
> > + { DRM_MODE("7680x4320", DRM_MODE_TYPE_DRIVER, 1188000, 7680, 8232,
> > + 8408, 9000, 0, 4320, 4336, 4356, 4400, 0,
> > + DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
> > + .vrefresh = 30, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
> > + /* 205 - 7680x4320@48Hz 64:27 */
> > + { DRM_MODE("7680x4320", DRM_MODE_TYPE_DRIVER, 2376000, 7680, 10232,
> > + 10408, 11000, 0, 4320, 4336, 4356, 4500, 0,
> > + DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
> > + .vrefresh = 48, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
> > + /* 206 - 7680x4320@50Hz 64:27 */
> > + { DRM_MODE("7680x4320", DRM_MODE_TYPE_DRIVER, 2376000, 7680, 10032,
> > + 10208, 10800, 0, 4320, 4336, 4356, 4400, 0,
> > + DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
> > + .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
> > + /* 207 - 7680x4320@60Hz 64:27 */
> > + { DRM_MODE("7680x4320", DRM_MODE_TYPE_DRIVER, 2376000, 7680, 8232,
> > + 8408, 9000, 0, 4320, 4336, 4356, 4400, 0,
> > + DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
> > + .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
> > + /* 208 - 7680x4320@100Hz 64:27 */
> > + { DRM_MODE("7680x4320", DRM_MODE_TYPE_DRIVER, 4752000, 7680, 9792,
> > + 9968, 10560, 0, 4320, 4336, 4356, 4500, 0,
> > + DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
> > + .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
> > + /* 209 - 7680x4320@120Hz 64:27 */
> > + { DRM_MODE("7680x4320", DRM_MODE_TYPE_DRIVER, 4752000, 7680, 8032,
> > + 8208, 8800, 0, 4320, 4336, 4356, 4500, 0,
> > + DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
> > + .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
> > + /* 210 - 10240x4320@24Hz 64:27 */
> > + { DRM_MODE("10240x4320", DRM_MODE_TYPE_DRIVER, 1485000, 10240, 11732,
> > + 11908, 12500, 0, 4320, 4336, 4356, 4950, 0,
> > + DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
> > + .vrefresh = 24, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
> > + /* 211 - 10240x4320@25Hz 64:27 */
> > + { DRM_MODE("10240x4320", DRM_MODE_TYPE_DRIVER, 1485000, 10240, 12732,
> > + 12908, 13500, 0, 4320, 4336, 4356, 4400, 0,
> > + DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
> > + .vrefresh = 25, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
> > + /* 212 - 10240x4320@30Hz 64:27 */
> > + { DRM_MODE("10240x4320", DRM_MODE_TYPE_DRIVER, 1485000, 10240, 10528,
> > + 10704, 11000, 0, 4320, 4336, 4356, 4500, 0,
> > + DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
> > + .vrefresh = 30, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
> > + /* 213 - 10240x4320@48Hz 64:27 */
> > + { DRM_MODE("10240x4320", DRM_MODE_TYPE_DRIVER, 2970000, 10240, 11732,
> > + 11908, 12500, 0, 4320, 4336, 4356, 4950, 0,
> > + DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
> > + .vrefresh = 48, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
> > + /* 214 - 10240x4320@50Hz 64:27 */
> > + { DRM_MODE("10240x4320", DRM_MODE_TYPE_DRIVER, 2970000, 10240, 12732,
> > + 12908, 13500, 0, 4320, 4336, 4356, 4400, 0,
> > + DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
> > + .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
> > + /* 215 - 10240x4320@60Hz 64:27 */
> > + { DRM_MODE("10240x4320", DRM_MODE_TYPE_DRIVER, 2970000, 10240, 10528,
> > + 10704, 11000, 0, 4320, 4336, 4356, 4500, 0,
> > + DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
> > + .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
> > + /* 216 - 10240x4320@100Hz 64:27 */
> > + { DRM_MODE("10240x4320", DRM_MODE_TYPE_DRIVER, 5940000, 10240, 12432,
> > + 12608, 13200, 0, 4320, 4336, 4356, 4500, 0,
> > + DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
> > + .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
> > + /* 217 - 10240x4320@120Hz 64:27 */
> > + { DRM_MODE("10240x4320", DRM_MODE_TYPE_DRIVER, 5940000, 10240, 10528,
> > + 10704, 11000, 0, 4320, 4336, 4356, 4500, 0,
> > + DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
> > + .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
> > + /* 218 - 4096x2160@100Hz 256:135 */
> > + { DRM_MODE("4096x2160", DRM_MODE_TYPE_DRIVER, 1188000, 4096, 4896,
> > + 4984, 5280, 0, 2160, 2168, 2178, 2250, 0,
> > + DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
> > + .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_256_135, },
> > + /* 219 - 4096x2160@120Hz 256:135 */
> > + { DRM_MODE("4096x2160", DRM_MODE_TYPE_DRIVER, 1188000, 4096, 4184,
> > + 4272, 4400, 0, 2160, 2168, 2178, 2250, 0,
> > + DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
> > + .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_256_135, },
> > +};
> > +
> > /*
> > * HDMI 1.4 4k modes. Index using the VIC.
> > */
> > @@ -3072,17 +3215,21 @@ static const struct drm_display_mode *cea_mode_for_vic(u8 vic)
> > return NULL;
> > if (vic < ARRAY_SIZE(edid_cea_modes_0))
> > return &edid_cea_modes_0[vic];
> > + if (vic >= 193 && vic < 193 + ARRAY_SIZE(edid_cea_modes_193))
> > + return &edid_cea_modes_193[vic - 193];
> > return NULL;
> > }
> >
> > static u8 cea_num_vics(void)
> > {
> > - return ARRAY_SIZE(edid_cea_modes_0);
> > + return 193 + ARRAY_SIZE(edid_cea_modes_193);
> Now that we are planning to remove the dummy mode index at 0, shouldn't
> this be 192 + ARRAY_SZ(), as this array starts from VIC 193 ?
No. This just returns the <last VIC we have a definition for>+1.
If that definition happens to be stored in foo[ARRAY_SIZE(foo)-1]
and foo[0] == <definition for VIC 193> and there is no extra
junk in the middle of foo[] then the answer should be
193+ARRAY_SIZE(foo).
> > }
> >
> > static u8 cea_next_vic(u8 vic)
> > {
> > - return vic + 1;
> > + if (++vic == ARRAY_SIZE(edid_cea_modes_0))
> > + vic = 193;
>
> Ok, this explains why separate function for next vic :)
>
> - Shashank
>
> > + return vic;
> > }
> >
> > /*
--
Ville Syrjälä
Intel
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^ permalink raw reply [flat|nested] 25+ messages in thread
* Re: [PATCH v3 3/4] drm/edid: Throw away the dummy VIC 0 cea mode
2019-10-03 8:29 ` Sharma, Shashank
@ 2019-10-03 14:16 ` Ville Syrjälä
0 siblings, 0 replies; 25+ messages in thread
From: Ville Syrjälä @ 2019-10-03 14:16 UTC (permalink / raw)
To: Sharma, Shashank; +Cc: Hans Verkuil, Intel Graphics Development, dri-devel
On Thu, Oct 03, 2019 at 01:59:42PM +0530, Sharma, Shashank wrote:
>
> On 9/25/2019 7:25 PM, Ville Syrjala wrote:
> > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> >
> > Now that the cea mode handling is not 100% tied to the single
> > array the dummy VIC 0 mode is pretty much pointles. Throw it
> > out.
> >
> > Cc: Hans Verkuil <hansverk@cisco.com>
> > Cc: Shashank Sharma <shashank.sharma@intel.com>
> > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > ---
> > drivers/gpu/drm/drm_edid.c | 14 +++++---------
> > 1 file changed, 5 insertions(+), 9 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
> > index 9f6996323efa..0007004d3221 100644
> > --- a/drivers/gpu/drm/drm_edid.c
> > +++ b/drivers/gpu/drm/drm_edid.c
> > @@ -709,11 +709,9 @@ static const struct minimode extra_modes[] = {
> > /*
> > * From CEA/CTA-861 spec.
> > *
> > - * Index with VIC.
> > + * Index with VIC-1.
>
> Do we want to really do this ? Till now, due to dummy VIC, indexing was
> pretty direct as per VIC, which was making the code easy to read and
> understand. I would still think that keeping the dummy VIC and adjusting
> the size of cea_modes_0[] in the size function, would be something
> neater to do, do you think so ?
I don't see the point of wasting that space. The access is now fully
abstraced so you *never* index this directly.
>
> - Shashank
>
> > */
> > -static const struct drm_display_mode edid_cea_modes_0[] = {
> > - /* 0 - dummy, VICs start at 1 */
> > - { },
> > +static const struct drm_display_mode edid_cea_modes_1[] = {
> > /* 1 - 640x480@60Hz 4:3 */
> > { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25175, 640, 656,
> > 752, 800, 0, 480, 490, 492, 525, 0,
> > @@ -3211,10 +3209,8 @@ static u8 *drm_find_cea_extension(const struct edid *edid)
> >
> > static const struct drm_display_mode *cea_mode_for_vic(u8 vic)
> > {
> > - if (!vic)
> > - return NULL;
> > - if (vic < ARRAY_SIZE(edid_cea_modes_0))
> > - return &edid_cea_modes_0[vic];
> > + if (vic >= 1 && vic < 1 + ARRAY_SIZE(edid_cea_modes_1))
> > + return &edid_cea_modes_1[vic - 1];
> > if (vic >= 193 && vic < 193 + ARRAY_SIZE(edid_cea_modes_193))
> > return &edid_cea_modes_193[vic - 193];
> > return NULL;
> > @@ -3227,7 +3223,7 @@ static u8 cea_num_vics(void)
> >
> > static u8 cea_next_vic(u8 vic)
> > {
> > - if (++vic == ARRAY_SIZE(edid_cea_modes_0))
> > + if (++vic == 1 + ARRAY_SIZE(edid_cea_modes_1))
> > vic = 193;
> > return vic;
> > }
--
Ville Syrjälä
Intel
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^ permalink raw reply [flat|nested] 25+ messages in thread
* Re: [v3,1/4] drm/edid: Abstract away cea_edid_modes[]
[not found] ` <20191210223423.GA85292@google.com>
@ 2019-12-10 23:06 ` Tom Anderson
0 siblings, 0 replies; 25+ messages in thread
From: Tom Anderson @ 2019-12-10 23:06 UTC (permalink / raw)
To: Ville Syrjala; +Cc: Hans Verkuil, intel-gfc, dri-devel
+CCs that were accidnetally lost
On Tue, Dec 10, 2019 at 02:34:23PM -0800, Tom Anderson wrote:
> On Wed, Sep 25, 2019 at 04:54:59PM +0300, Ville Syrjala wrote:
> > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> >
> > We're going to need two cea mode tables (on for VICs < 128,
>
> s/on/one
>
> > another one for VICs >= 193). To that end replace the direct
> > edid_cea_modes[] lookups with a function call. And we'll rename
> > the array to edid_cea_modes_0[] to indicathe how it's to be
>
> s/indicathe/indicate
>
> > indexed.
> >
> > Cc: Hans Verkuil <hansverk@cisco.com>
> > Cc: Shashank Sharma <shashank.sharma@intel.com>
> > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > ---
> > drivers/gpu/drm/drm_edid.c | 80 +++++++++++++++++++++++++++-----------
> > 1 file changed, 58 insertions(+), 22 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
> > index 3c9703b08491..b700fc075257 100644
> > --- a/drivers/gpu/drm/drm_edid.c
> > +++ b/drivers/gpu/drm/drm_edid.c
> > @@ -707,12 +707,11 @@ static const struct minimode extra_modes[] = {
> > };
> >
> > /*
> > - * Probably taken from CEA-861 spec.
> > - * This table is converted from xorg's hw/xfree86/modes/xf86EdidModes.c.
> > + * From CEA/CTA-861 spec.
> > *
> > - * Index using the VIC.
> > + * Index with VIC.
> > */
> > -static const struct drm_display_mode edid_cea_modes[] = {
> > +static const struct drm_display_mode edid_cea_modes_0[] = {
>
> Nit: The "_0" suffix is a bit odd. Maybe edid_cea_modes_{lo,hi}, but I'm not
> sure if that's actually better. Up to you.
>
> > /* 0 - dummy, VICs start at 1 */
> > { },
> > /* 1 - 640x480@60Hz 4:3 */
> > @@ -3067,6 +3066,25 @@ static u8 *drm_find_cea_extension(const struct edid *edid)
> > return cea;
> > }
> >
> > +static const struct drm_display_mode *cea_mode_for_vic(u8 vic)
> > +{
> > + if (!vic)
> > + return NULL;
> > + if (vic < ARRAY_SIZE(edid_cea_modes_0))
> > + return &edid_cea_modes_0[vic];
> > + return NULL;
> > +}
> > +
> > +static u8 cea_num_vics(void)
> > +{
> > + return ARRAY_SIZE(edid_cea_modes_0);
> > +}
> > +
> > +static u8 cea_next_vic(u8 vic)
> > +{
> > + return vic + 1;
> > +}
> > +
> > /*
> > * Calculate the alternate clock for the CEA mode
> > * (60Hz vs. 59.94Hz etc.)
> > @@ -3104,14 +3122,14 @@ cea_mode_alternate_timings(u8 vic, struct drm_display_mode *mode)
> > * get the other variants by simply increasing the
> > * vertical front porch length.
> > */
> > - BUILD_BUG_ON(edid_cea_modes[8].vtotal != 262 ||
> > - edid_cea_modes[9].vtotal != 262 ||
> > - edid_cea_modes[12].vtotal != 262 ||
> > - edid_cea_modes[13].vtotal != 262 ||
> > - edid_cea_modes[23].vtotal != 312 ||
> > - edid_cea_modes[24].vtotal != 312 ||
> > - edid_cea_modes[27].vtotal != 312 ||
> > - edid_cea_modes[28].vtotal != 312);
> > + BUILD_BUG_ON(cea_mode_for_vic(8)->vtotal != 262 ||
> > + cea_mode_for_vic(9)->vtotal != 262 ||
> > + cea_mode_for_vic(12)->vtotal != 262 ||
> > + cea_mode_for_vic(13)->vtotal != 262 ||
> > + cea_mode_for_vic(23)->vtotal != 312 ||
> > + cea_mode_for_vic(24)->vtotal != 312 ||
> > + cea_mode_for_vic(27)->vtotal != 312 ||
> > + cea_mode_for_vic(28)->vtotal != 312);
> >
> > if (((vic == 8 || vic == 9 ||
> > vic == 12 || vic == 13) && mode->vtotal < 263) ||
> > @@ -3139,10 +3157,16 @@ static u8 drm_match_cea_mode_clock_tolerance(const struct drm_display_mode *to_m
> > if (to_match->picture_aspect_ratio)
> > match_flags |= DRM_MODE_MATCH_ASPECT_RATIO;
> >
> > - for (vic = 1; vic < ARRAY_SIZE(edid_cea_modes); vic++) {
> > - struct drm_display_mode cea_mode = edid_cea_modes[vic];
> > + for (vic = 1; vic < cea_num_vics(); vic = cea_next_vic(vic)) {
> > + const struct drm_display_mode *mode = cea_mode_for_vic(vic);
> > + struct drm_display_mode cea_mode;
> > unsigned int clock1, clock2;
> >
> > + if (!mode)
> > + continue;
>
> Isn't this check is a no-op now that we have cea_next_vic()?
>
> > +
> > + cea_mode = *mode;
> > +
>
> Get rid of |cea_mode| and use *mode. There's only 1 place where cea_mode.*
> was used, and 3 places where &cea_mode was used, so using a pointer seems
> better.
>
> > /* Check both 60Hz and 59.94Hz */
> > clock1 = cea_mode.clock;
> > clock2 = cea_mode_alternate_clock(&cea_mode);
> > @@ -3178,10 +3202,16 @@ u8 drm_match_cea_mode(const struct drm_display_mode *to_match)
> > if (to_match->picture_aspect_ratio)
> > match_flags |= DRM_MODE_MATCH_ASPECT_RATIO;
> >
> > - for (vic = 1; vic < ARRAY_SIZE(edid_cea_modes); vic++) {
> > - struct drm_display_mode cea_mode = edid_cea_modes[vic];
> > + for (vic = 1; vic < cea_num_vics(); vic = cea_next_vic(vic)) {
> > + const struct drm_display_mode *mode = cea_mode_for_vic(vic);
> > + struct drm_display_mode cea_mode;
> > unsigned int clock1, clock2;
> >
> > + if (!mode)
> > + continue;
> > +
> > + cea_mode = *mode;
> > +
>
> Same 2 comments as above.
>
> > /* Check both 60Hz and 59.94Hz */
> > clock1 = cea_mode.clock;
> > clock2 = cea_mode_alternate_clock(&cea_mode);
> > @@ -3202,7 +3232,7 @@ EXPORT_SYMBOL(drm_match_cea_mode);
> >
> > static bool drm_valid_cea_vic(u8 vic)
> > {
> > - return vic > 0 && vic < ARRAY_SIZE(edid_cea_modes);
> > + return cea_mode_for_vic(vic) != NULL;
> > }
> >
> > /**
> > @@ -3214,7 +3244,13 @@ static bool drm_valid_cea_vic(u8 vic)
> > */
> > enum hdmi_picture_aspect drm_get_cea_aspect_ratio(const u8 video_code)
> > {
> > - return edid_cea_modes[video_code].picture_aspect_ratio;
> > + const struct drm_display_mode *mode;
> > +
> > + mode = cea_mode_for_vic(video_code);
>
> Nit: do declaration and assignment for |mode| on the same line?
>
> > + if (mode)
> > + return mode->picture_aspect_ratio;
> > +
> > + return HDMI_PICTURE_ASPECT_NONE;
> > }
> > EXPORT_SYMBOL(drm_get_cea_aspect_ratio);
> >
> > @@ -3323,7 +3359,7 @@ add_alternate_cea_modes(struct drm_connector *connector, struct edid *edid)
> > unsigned int clock1, clock2;
> >
> > if (drm_valid_cea_vic(vic)) {
> > - cea_mode = &edid_cea_modes[vic];
> > + cea_mode = cea_mode_for_vic(vic);
> > clock2 = cea_mode_alternate_clock(cea_mode);
> > } else {
> > vic = drm_match_hdmi_mode(mode);
> > @@ -3398,7 +3434,7 @@ drm_display_mode_from_vic_index(struct drm_connector *connector,
> > if (!drm_valid_cea_vic(vic))
> > return NULL;
> >
> > - newmode = drm_mode_duplicate(dev, &edid_cea_modes[vic]);
> > + newmode = drm_mode_duplicate(dev, cea_mode_for_vic(vic));
> > if (!newmode)
> > return NULL;
> >
> > @@ -3432,7 +3468,7 @@ static int do_y420vdb_modes(struct drm_connector *connector,
> > if (!drm_valid_cea_vic(vic))
> > continue;
> >
> > - newmode = drm_mode_duplicate(dev, &edid_cea_modes[vic]);
> > + newmode = drm_mode_duplicate(dev, cea_mode_for_vic(vic));
> > if (!newmode)
> > break;
> > bitmap_set(hdmi->y420_vdb_modes, vic, 1);
> > @@ -4001,7 +4037,7 @@ static void fixup_detailed_cea_mode_clock(struct drm_display_mode *mode)
> > vic = drm_match_cea_mode_clock_tolerance(mode, 5);
> > if (drm_valid_cea_vic(vic)) {
> > type = "CEA";
> > - cea_mode = &edid_cea_modes[vic];
> > + cea_mode = cea_mode_for_vic(vic);
> > clock1 = cea_mode->clock;
> > clock2 = cea_mode_alternate_clock(cea_mode);
> > } else {
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^ permalink raw reply [flat|nested] 25+ messages in thread
* Re: [v3,2/4] drm/edid: Add CTA-861-G modes with VIC >= 193
2019-09-25 13:55 ` Ville Syrjala
2019-09-27 21:35 ` Manasi Navare
2019-10-03 8:22 ` Sharma, Shashank
@ 2019-12-10 23:16 ` Tom Anderson
2 siblings, 0 replies; 25+ messages in thread
From: Tom Anderson @ 2019-12-10 23:16 UTC (permalink / raw)
To: Ville Syrjala; +Cc: Hans Verkuil, dri-devel
Reviewed-by: Thomas Anderson <thomasanderson@google.com>
On Wed, Sep 25, 2019 at 04:55:00PM +0300, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> Add a second table to the cea modes with VIC >= 193.
>
> Cc: Hans Verkuil <hansverk@cisco.com>
> Cc: Shashank Sharma <shashank.sharma@intel.com>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Reviewed-by: Manasi Navare <manasi.d.navare@intel.com>
> ---
> drivers/gpu/drm/drm_edid.c | 151 ++++++++++++++++++++++++++++++++++++-
> 1 file changed, 149 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
> index b700fc075257..9f6996323efa 100644
> --- a/drivers/gpu/drm/drm_edid.c
> +++ b/drivers/gpu/drm/drm_edid.c
> @@ -1376,6 +1376,149 @@ static const struct drm_display_mode edid_cea_modes_0[] = {
> .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
> };
>
> +/*
> + * From CEA/CTA-861 spec.
> + *
> + * Index with VIC-193.
> + */
> +static const struct drm_display_mode edid_cea_modes_193[] = {
> + /* 193 - 5120x2160@120Hz 64:27 */
> + { DRM_MODE("5120x2160", DRM_MODE_TYPE_DRIVER, 1485000, 5120, 5284,
> + 5372, 5500, 0, 2160, 2168, 2178, 2250, 0,
> + DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
> + .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
> + /* 194 - 7680x4320@24Hz 16:9 */
> + { DRM_MODE("7680x4320", DRM_MODE_TYPE_DRIVER, 1188000, 7680, 10232,
> + 10408, 11000, 0, 4320, 4336, 4356, 4500, 0,
> + DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
> + .vrefresh = 24, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
> + /* 195 - 7680x4320@25Hz 16:9 */
> + { DRM_MODE("7680x4320", DRM_MODE_TYPE_DRIVER, 1188000, 7680, 10032,
> + 10208, 10800, 0, 4320, 4336, 4356, 4400, 0,
> + DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
> + .vrefresh = 25, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
> + /* 196 - 7680x4320@30Hz 16:9 */
> + { DRM_MODE("7680x4320", DRM_MODE_TYPE_DRIVER, 1188000, 7680, 8232,
> + 8408, 9000, 0, 4320, 4336, 4356, 4400, 0,
> + DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
> + .vrefresh = 30, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
> + /* 197 - 7680x4320@48Hz 16:9 */
> + { DRM_MODE("7680x4320", DRM_MODE_TYPE_DRIVER, 2376000, 7680, 10232,
> + 10408, 11000, 0, 4320, 4336, 4356, 4500, 0,
> + DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
> + .vrefresh = 48, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
> + /* 198 - 7680x4320@50Hz 16:9 */
> + { DRM_MODE("7680x4320", DRM_MODE_TYPE_DRIVER, 2376000, 7680, 10032,
> + 10208, 10800, 0, 4320, 4336, 4356, 4400, 0,
> + DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
> + .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
> + /* 199 - 7680x4320@60Hz 16:9 */
> + { DRM_MODE("7680x4320", DRM_MODE_TYPE_DRIVER, 2376000, 7680, 8232,
> + 8408, 9000, 0, 4320, 4336, 4356, 4400, 0,
> + DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
> + .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
> + /* 200 - 7680x4320@100Hz 16:9 */
> + { DRM_MODE("7680x4320", DRM_MODE_TYPE_DRIVER, 4752000, 7680, 9792,
> + 9968, 10560, 0, 4320, 4336, 4356, 4500, 0,
> + DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
> + .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
> + /* 201 - 7680x4320@120Hz 16:9 */
> + { DRM_MODE("7680x4320", DRM_MODE_TYPE_DRIVER, 4752000, 7680, 8032,
> + 8208, 8800, 0, 4320, 4336, 4356, 4500, 0,
> + DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
> + .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
> + /* 202 - 7680x4320@24Hz 64:27 */
> + { DRM_MODE("7680x4320", DRM_MODE_TYPE_DRIVER, 1188000, 7680, 10232,
> + 10408, 11000, 0, 4320, 4336, 4356, 4500, 0,
> + DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
> + .vrefresh = 24, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
> + /* 203 - 7680x4320@25Hz 64:27 */
> + { DRM_MODE("7680x4320", DRM_MODE_TYPE_DRIVER, 1188000, 7680, 10032,
> + 10208, 10800, 0, 4320, 4336, 4356, 4400, 0,
> + DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
> + .vrefresh = 25, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
> + /* 204 - 7680x4320@30Hz 64:27 */
> + { DRM_MODE("7680x4320", DRM_MODE_TYPE_DRIVER, 1188000, 7680, 8232,
> + 8408, 9000, 0, 4320, 4336, 4356, 4400, 0,
> + DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
> + .vrefresh = 30, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
> + /* 205 - 7680x4320@48Hz 64:27 */
> + { DRM_MODE("7680x4320", DRM_MODE_TYPE_DRIVER, 2376000, 7680, 10232,
> + 10408, 11000, 0, 4320, 4336, 4356, 4500, 0,
> + DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
> + .vrefresh = 48, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
> + /* 206 - 7680x4320@50Hz 64:27 */
> + { DRM_MODE("7680x4320", DRM_MODE_TYPE_DRIVER, 2376000, 7680, 10032,
> + 10208, 10800, 0, 4320, 4336, 4356, 4400, 0,
> + DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
> + .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
> + /* 207 - 7680x4320@60Hz 64:27 */
> + { DRM_MODE("7680x4320", DRM_MODE_TYPE_DRIVER, 2376000, 7680, 8232,
> + 8408, 9000, 0, 4320, 4336, 4356, 4400, 0,
> + DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
> + .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
> + /* 208 - 7680x4320@100Hz 64:27 */
> + { DRM_MODE("7680x4320", DRM_MODE_TYPE_DRIVER, 4752000, 7680, 9792,
> + 9968, 10560, 0, 4320, 4336, 4356, 4500, 0,
> + DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
> + .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
> + /* 209 - 7680x4320@120Hz 64:27 */
> + { DRM_MODE("7680x4320", DRM_MODE_TYPE_DRIVER, 4752000, 7680, 8032,
> + 8208, 8800, 0, 4320, 4336, 4356, 4500, 0,
> + DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
> + .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
> + /* 210 - 10240x4320@24Hz 64:27 */
> + { DRM_MODE("10240x4320", DRM_MODE_TYPE_DRIVER, 1485000, 10240, 11732,
> + 11908, 12500, 0, 4320, 4336, 4356, 4950, 0,
> + DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
> + .vrefresh = 24, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
> + /* 211 - 10240x4320@25Hz 64:27 */
> + { DRM_MODE("10240x4320", DRM_MODE_TYPE_DRIVER, 1485000, 10240, 12732,
> + 12908, 13500, 0, 4320, 4336, 4356, 4400, 0,
> + DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
> + .vrefresh = 25, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
> + /* 212 - 10240x4320@30Hz 64:27 */
> + { DRM_MODE("10240x4320", DRM_MODE_TYPE_DRIVER, 1485000, 10240, 10528,
> + 10704, 11000, 0, 4320, 4336, 4356, 4500, 0,
> + DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
> + .vrefresh = 30, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
> + /* 213 - 10240x4320@48Hz 64:27 */
> + { DRM_MODE("10240x4320", DRM_MODE_TYPE_DRIVER, 2970000, 10240, 11732,
> + 11908, 12500, 0, 4320, 4336, 4356, 4950, 0,
> + DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
> + .vrefresh = 48, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
> + /* 214 - 10240x4320@50Hz 64:27 */
> + { DRM_MODE("10240x4320", DRM_MODE_TYPE_DRIVER, 2970000, 10240, 12732,
> + 12908, 13500, 0, 4320, 4336, 4356, 4400, 0,
> + DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
> + .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
> + /* 215 - 10240x4320@60Hz 64:27 */
> + { DRM_MODE("10240x4320", DRM_MODE_TYPE_DRIVER, 2970000, 10240, 10528,
> + 10704, 11000, 0, 4320, 4336, 4356, 4500, 0,
> + DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
> + .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
> + /* 216 - 10240x4320@100Hz 64:27 */
> + { DRM_MODE("10240x4320", DRM_MODE_TYPE_DRIVER, 5940000, 10240, 12432,
> + 12608, 13200, 0, 4320, 4336, 4356, 4500, 0,
> + DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
> + .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
> + /* 217 - 10240x4320@120Hz 64:27 */
> + { DRM_MODE("10240x4320", DRM_MODE_TYPE_DRIVER, 5940000, 10240, 10528,
> + 10704, 11000, 0, 4320, 4336, 4356, 4500, 0,
> + DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
> + .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
> + /* 218 - 4096x2160@100Hz 256:135 */
> + { DRM_MODE("4096x2160", DRM_MODE_TYPE_DRIVER, 1188000, 4096, 4896,
> + 4984, 5280, 0, 2160, 2168, 2178, 2250, 0,
> + DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
> + .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_256_135, },
> + /* 219 - 4096x2160@120Hz 256:135 */
> + { DRM_MODE("4096x2160", DRM_MODE_TYPE_DRIVER, 1188000, 4096, 4184,
> + 4272, 4400, 0, 2160, 2168, 2178, 2250, 0,
> + DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
> + .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_256_135, },
> +};
> +
> /*
> * HDMI 1.4 4k modes. Index using the VIC.
> */
> @@ -3072,17 +3215,21 @@ static const struct drm_display_mode *cea_mode_for_vic(u8 vic)
> return NULL;
> if (vic < ARRAY_SIZE(edid_cea_modes_0))
> return &edid_cea_modes_0[vic];
> + if (vic >= 193 && vic < 193 + ARRAY_SIZE(edid_cea_modes_193))
> + return &edid_cea_modes_193[vic - 193];
> return NULL;
> }
>
> static u8 cea_num_vics(void)
> {
> - return ARRAY_SIZE(edid_cea_modes_0);
> + return 193 + ARRAY_SIZE(edid_cea_modes_193);
> }
>
> static u8 cea_next_vic(u8 vic)
> {
> - return vic + 1;
> + if (++vic == ARRAY_SIZE(edid_cea_modes_0))
> + vic = 193;
> + return vic;
> }
>
> /*
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^ permalink raw reply [flat|nested] 25+ messages in thread
* Re: [v3,3/4] drm/edid: Throw away the dummy VIC 0 cea mode
2019-09-25 13:55 ` [PATCH v3 3/4] drm/edid: Throw away the dummy VIC 0 cea mode Ville Syrjala
2019-10-03 8:29 ` Sharma, Shashank
@ 2019-12-10 23:18 ` Tom Anderson
2019-12-11 11:07 ` Ville Syrjälä
1 sibling, 1 reply; 25+ messages in thread
From: Tom Anderson @ 2019-12-10 23:18 UTC (permalink / raw)
To: Ville Syrjala; +Cc: Hans Verkuil, dri-devel
On Wed, Sep 25, 2019 at 04:55:01PM +0300, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> Now that the cea mode handling is not 100% tied to the single
> array the dummy VIC 0 mode is pretty much pointles. Throw it
> out.
>
> Cc: Hans Verkuil <hansverk@cisco.com>
> Cc: Shashank Sharma <shashank.sharma@intel.com>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
> drivers/gpu/drm/drm_edid.c | 14 +++++---------
> 1 file changed, 5 insertions(+), 9 deletions(-)
>
> diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
> index 9f6996323efa..0007004d3221 100644
> --- a/drivers/gpu/drm/drm_edid.c
> +++ b/drivers/gpu/drm/drm_edid.c
> @@ -709,11 +709,9 @@ static const struct minimode extra_modes[] = {
> /*
> * From CEA/CTA-861 spec.
> *
> - * Index with VIC.
> + * Index with VIC-1.
Since we shouldn't be indexing into this array directly any more, this comment
should instead be changed to say which functions should be used.
> */
> -static const struct drm_display_mode edid_cea_modes_0[] = {
> - /* 0 - dummy, VICs start at 1 */
> - { },
> +static const struct drm_display_mode edid_cea_modes_1[] = {
> /* 1 - 640x480@60Hz 4:3 */
> { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25175, 640, 656,
> 752, 800, 0, 480, 490, 492, 525, 0,
> @@ -3211,10 +3209,8 @@ static u8 *drm_find_cea_extension(const struct edid *edid)
>
> static const struct drm_display_mode *cea_mode_for_vic(u8 vic)
> {
> - if (!vic)
> - return NULL;
> - if (vic < ARRAY_SIZE(edid_cea_modes_0))
> - return &edid_cea_modes_0[vic];
> + if (vic >= 1 && vic < 1 + ARRAY_SIZE(edid_cea_modes_1))
> + return &edid_cea_modes_1[vic - 1];
> if (vic >= 193 && vic < 193 + ARRAY_SIZE(edid_cea_modes_193))
> return &edid_cea_modes_193[vic - 193];
> return NULL;
> @@ -3227,7 +3223,7 @@ static u8 cea_num_vics(void)
>
> static u8 cea_next_vic(u8 vic)
> {
> - if (++vic == ARRAY_SIZE(edid_cea_modes_0))
> + if (++vic == 1 + ARRAY_SIZE(edid_cea_modes_1))
> vic = 193;
> return vic;
> }
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^ permalink raw reply [flat|nested] 25+ messages in thread
* Re: [v3,4/4] drm/edid: Make sure the CEA mode arrays have the correct amount of modes
2019-09-25 13:55 ` [PATCH v3 4/4] drm/edid: Make sure the CEA mode arrays have the correct amount of modes Ville Syrjala
2019-09-27 21:38 ` Manasi Navare
@ 2019-12-10 23:20 ` Tom Anderson
1 sibling, 0 replies; 25+ messages in thread
From: Tom Anderson @ 2019-12-10 23:20 UTC (permalink / raw)
To: Ville Syrjala; +Cc: Hans Verkuil, dri-devel
Reviewed-by: Thomas Anderson <thomasanderson@google.com>
On Wed, Sep 25, 2019 at 04:55:02PM +0300, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> We depend on a specific relationship between the VIC number and the
> index in the CEA mode arrays. Assert that the arrays have the excpected
> size to make sure we've not accidentally left holes in them.
>
> v2: Pimp the BUILD_BUG_ON()s
>
> Cc: Hans Verkuil <hansverk@cisco.com>
> Cc: Shashank Sharma <shashank.sharma@intel.com>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Reviewed-by: Manasi Navare <manasi.d.navare@intel.com>
> ---
> drivers/gpu/drm/drm_edid.c | 3 +++
> 1 file changed, 3 insertions(+)
>
> diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
> index 0007004d3221..06cac8e2afc2 100644
> --- a/drivers/gpu/drm/drm_edid.c
> +++ b/drivers/gpu/drm/drm_edid.c
> @@ -3209,6 +3209,9 @@ static u8 *drm_find_cea_extension(const struct edid *edid)
>
> static const struct drm_display_mode *cea_mode_for_vic(u8 vic)
> {
> + BUILD_BUG_ON(1 + ARRAY_SIZE(edid_cea_modes_1) - 1 != 127);
> + BUILD_BUG_ON(193 + ARRAY_SIZE(edid_cea_modes_193) - 1 != 219);
> +
> if (vic >= 1 && vic < 1 + ARRAY_SIZE(edid_cea_modes_1))
> return &edid_cea_modes_1[vic - 1];
> if (vic >= 193 && vic < 193 + ARRAY_SIZE(edid_cea_modes_193))
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^ permalink raw reply [flat|nested] 25+ messages in thread
* Re: [v3,3/4] drm/edid: Throw away the dummy VIC 0 cea mode
2019-12-10 23:18 ` [v3,3/4] " Tom Anderson
@ 2019-12-11 11:07 ` Ville Syrjälä
0 siblings, 0 replies; 25+ messages in thread
From: Ville Syrjälä @ 2019-12-11 11:07 UTC (permalink / raw)
To: Tom Anderson; +Cc: Hans Verkuil, dri-devel
On Tue, Dec 10, 2019 at 03:18:54PM -0800, Tom Anderson wrote:
> On Wed, Sep 25, 2019 at 04:55:01PM +0300, Ville Syrjala wrote:
> > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> >
> > Now that the cea mode handling is not 100% tied to the single
> > array the dummy VIC 0 mode is pretty much pointles. Throw it
> > out.
> >
> > Cc: Hans Verkuil <hansverk@cisco.com>
> > Cc: Shashank Sharma <shashank.sharma@intel.com>
> > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > ---
> > drivers/gpu/drm/drm_edid.c | 14 +++++---------
> > 1 file changed, 5 insertions(+), 9 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
> > index 9f6996323efa..0007004d3221 100644
> > --- a/drivers/gpu/drm/drm_edid.c
> > +++ b/drivers/gpu/drm/drm_edid.c
> > @@ -709,11 +709,9 @@ static const struct minimode extra_modes[] = {
> > /*
> > * From CEA/CTA-861 spec.
> > *
> > - * Index with VIC.
> > + * Index with VIC-1.
>
> Since we shouldn't be indexing into this array directly any more, this comment
> should instead be changed to say which functions should be used.
Seems reasonable.
>
> > */
> > -static const struct drm_display_mode edid_cea_modes_0[] = {
> > - /* 0 - dummy, VICs start at 1 */
> > - { },
> > +static const struct drm_display_mode edid_cea_modes_1[] = {
> > /* 1 - 640x480@60Hz 4:3 */
> > { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25175, 640, 656,
> > 752, 800, 0, 480, 490, 492, 525, 0,
> > @@ -3211,10 +3209,8 @@ static u8 *drm_find_cea_extension(const struct edid *edid)
> >
> > static const struct drm_display_mode *cea_mode_for_vic(u8 vic)
> > {
> > - if (!vic)
> > - return NULL;
> > - if (vic < ARRAY_SIZE(edid_cea_modes_0))
> > - return &edid_cea_modes_0[vic];
> > + if (vic >= 1 && vic < 1 + ARRAY_SIZE(edid_cea_modes_1))
> > + return &edid_cea_modes_1[vic - 1];
> > if (vic >= 193 && vic < 193 + ARRAY_SIZE(edid_cea_modes_193))
> > return &edid_cea_modes_193[vic - 193];
> > return NULL;
> > @@ -3227,7 +3223,7 @@ static u8 cea_num_vics(void)
> >
> > static u8 cea_next_vic(u8 vic)
> > {
> > - if (++vic == ARRAY_SIZE(edid_cea_modes_0))
> > + if (++vic == 1 + ARRAY_SIZE(edid_cea_modes_1))
> > vic = 193;
> > return vic;
> > }
--
Ville Syrjälä
Intel
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^ permalink raw reply [flat|nested] 25+ messages in thread
end of thread, other threads:[~2019-12-11 11:23 UTC | newest]
Thread overview: 25+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2019-09-25 13:54 [PATCH v3 0/4] drm/edid: Add new modes from CTA-861-G Ville Syrjala
2019-09-25 13:54 ` [PATCH v3 1/4] drm/edid: Abstract away cea_edid_modes[] Ville Syrjala
2019-10-03 8:16 ` Sharma, Shashank
2019-10-03 13:55 ` Ville Syrjälä
[not found] ` <20191210223423.GA85292@google.com>
2019-12-10 23:06 ` [v3,1/4] " Tom Anderson
2019-09-25 13:54 ` [PATCH v3 1/4] " Ville Syrjala
2019-09-25 13:55 ` [PATCH v3 2/4] drm/edid: Add CTA-861-G modes with VIC >= 193 Ville Syrjala
2019-09-25 13:55 ` Ville Syrjala
2019-09-27 21:35 ` Manasi Navare
2019-10-03 8:22 ` Sharma, Shashank
2019-10-03 14:15 ` Ville Syrjälä
2019-12-10 23:16 ` [v3,2/4] " Tom Anderson
2019-09-25 13:55 ` [PATCH v3 3/4] drm/edid: Throw away the dummy VIC 0 cea mode Ville Syrjala
2019-10-03 8:29 ` Sharma, Shashank
2019-10-03 14:16 ` Ville Syrjälä
2019-12-10 23:18 ` [v3,3/4] " Tom Anderson
2019-12-11 11:07 ` Ville Syrjälä
2019-09-25 13:55 ` [PATCH v3 3/4] " Ville Syrjala
2019-09-25 13:55 ` [PATCH v3 4/4] drm/edid: Make sure the CEA mode arrays have the correct amount of modes Ville Syrjala
2019-09-27 21:38 ` Manasi Navare
2019-12-10 23:20 ` [v3,4/4] " Tom Anderson
2019-09-25 13:55 ` [PATCH v3 4/4] " Ville Syrjala
2019-09-25 16:19 ` ✗ Fi.CI.CHECKPATCH: warning for drm/edid: Add new modes from CTA-861-G (rev2) Patchwork
2019-09-25 16:42 ` ✓ Fi.CI.BAT: success " Patchwork
2019-09-26 8:37 ` ✗ Fi.CI.IGT: failure " Patchwork
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