* [RFC PATCH 0/1] GuC engine reset support
@ 2019-09-25 23:00 Fernando Pacheco
2019-09-25 23:00 ` [RFC PATCH 1/1] drm/i915/guc: Provide mmio list to be saved/restored on engine reset Fernando Pacheco
` (2 more replies)
0 siblings, 3 replies; 4+ messages in thread
From: Fernando Pacheco @ 2019-09-25 23:00 UTC (permalink / raw)
To: intel-gfx
Another attempt at providing GuC a list of registers to
save/restore during engine resets [1].
The list we provide GuC should mirror, with possibly some exceptions,
the list of registers applied during execlists_resume/enable_execlists.
Any ideas on how to flag any discrepancies (yet flexible enough to
handle exceptions) between the two lists e.g. via a selftest? I would
like something stronger than a comment that just states the other needs
updating. Or should I take this to mean a different approach is needed?
Thanks,
Fernando
[1] https://patchwork.freedesktop.org/patch/161888/
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Fernando Pacheco (1):
drm/i915/guc: Provide mmio list to be saved/restored on engine reset
drivers/gpu/drm/i915/gt/intel_workarounds.c | 23 +++--
.../gpu/drm/i915/gt/intel_workarounds_types.h | 1 +
drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c | 87 +++++++++++++++++++
3 files changed, 105 insertions(+), 6 deletions(-)
--
2.23.0
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^ permalink raw reply [flat|nested] 4+ messages in thread* [RFC PATCH 1/1] drm/i915/guc: Provide mmio list to be saved/restored on engine reset 2019-09-25 23:00 [RFC PATCH 0/1] GuC engine reset support Fernando Pacheco @ 2019-09-25 23:00 ` Fernando Pacheco 2019-09-25 23:33 ` ✓ Fi.CI.BAT: success for GuC engine reset support Patchwork 2019-09-26 18:58 ` ✓ Fi.CI.IGT: " Patchwork 2 siblings, 0 replies; 4+ messages in thread From: Fernando Pacheco @ 2019-09-25 23:00 UTC (permalink / raw) To: intel-gfx The driver must provide GuC with a list of mmio registers that should be saved/restored during a GuC-based engine reset. We provide a minimal set of registers that should get things working and extend as needed. Signed-off-by: Fernando Pacheco <fernando.pacheco@intel.com> --- drivers/gpu/drm/i915/gt/intel_workarounds.c | 23 +++-- .../gpu/drm/i915/gt/intel_workarounds_types.h | 1 + drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c | 87 +++++++++++++++++++ 3 files changed, 105 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c b/drivers/gpu/drm/i915/gt/intel_workarounds.c index ba65e5018978..694e6c82425d 100644 --- a/drivers/gpu/drm/i915/gt/intel_workarounds.c +++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c @@ -146,23 +146,31 @@ static void _wa_add(struct i915_wa_list *wal, const struct i915_wa *wa) } static void -wa_write_masked_or(struct i915_wa_list *wal, i915_reg_t reg, u32 mask, - u32 val) +__wa_write_masked_or(struct i915_wa_list *wal, i915_reg_t reg, u32 mask, + u32 val, bool masked_bits) { struct i915_wa wa = { .reg = reg, .mask = mask, .val = val, .read = mask, + .masked_bits = masked_bits, }; _wa_add(wal, &wa); } +static void +wa_write_masked_or(struct i915_wa_list *wal, i915_reg_t reg, u32 mask, + u32 val) +{ + __wa_write_masked_or(wal, reg, mask, val, false); +} + static void wa_masked_en(struct i915_wa_list *wal, i915_reg_t reg, u32 val) { - wa_write_masked_or(wal, reg, val, _MASKED_BIT_ENABLE(val)); + __wa_write_masked_or(wal, reg, val, _MASKED_BIT_ENABLE(val), true); } static void @@ -178,13 +186,16 @@ wa_write_or(struct i915_wa_list *wal, i915_reg_t reg, u32 val) } #define WA_SET_BIT_MASKED(addr, mask) \ - wa_write_masked_or(wal, (addr), (mask), _MASKED_BIT_ENABLE(mask)) + __wa_write_masked_or(wal, (addr), (mask), \ + _MASKED_BIT_ENABLE(mask), true) #define WA_CLR_BIT_MASKED(addr, mask) \ - wa_write_masked_or(wal, (addr), (mask), _MASKED_BIT_DISABLE(mask)) + __wa_write_masked_or(wal, (addr), (mask), \ + _MASKED_BIT_DISABLE(mask), true) #define WA_SET_FIELD_MASKED(addr, mask, value) \ - wa_write_masked_or(wal, (addr), (mask), _MASKED_FIELD((mask), (value))) + __wa_write_masked_or(wal, (addr), (mask), \ + _MASKED_FIELD((mask), (value)), true) static void gen8_ctx_workarounds_init(struct intel_engine_cs *engine, struct i915_wa_list *wal) diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds_types.h b/drivers/gpu/drm/i915/gt/intel_workarounds_types.h index e27ab1b710b3..a43d5f968f2d 100644 --- a/drivers/gpu/drm/i915/gt/intel_workarounds_types.h +++ b/drivers/gpu/drm/i915/gt/intel_workarounds_types.h @@ -16,6 +16,7 @@ struct i915_wa { u32 mask; u32 val; u32 read; + bool masked_bits; }; struct i915_wa_list { diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c index ca6674b8e00c..ba75a5ea3a4b 100644 --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c @@ -3,6 +3,8 @@ * Copyright © 2014-2019 Intel Corporation */ +#include <linux/bsearch.h> + #include "gt/intel_gt.h" #include "intel_guc_ads.h" #include "intel_uc.h" @@ -16,6 +18,9 @@ * its internal state for sleep. */ +static void guc_mmio_reg_state_init(struct guc_mmio_reg_state *reg_state, + struct intel_engine_cs *engine); + static void guc_policy_init(struct guc_policy *policy) { policy->execution_quantum = POLICY_DEFAULT_EXECUTION_QUANTUM_US; @@ -70,9 +75,15 @@ static void __guc_ads_init(struct intel_guc *guc) struct drm_i915_private *dev_priv = guc_to_gt(guc)->i915; struct __guc_ads_blob *blob = guc->ads_blob; const u32 skipped_size = LRC_PPHWSP_SZ * PAGE_SIZE + LR_HW_CONTEXT_SIZE; + struct intel_engine_cs *engine; + enum intel_engine_id id; u32 base; u8 engine_class; + /* GuC mmio save/restore list */ + for_each_engine(engine, dev_priv, id) + guc_mmio_reg_state_init(&blob->reg_state, engine); + /* GuC scheduling policies */ guc_policies_init(&blob->policies); @@ -182,3 +193,79 @@ void intel_guc_ads_reset(struct intel_guc *guc) return; __guc_ads_init(guc); } + +static int guc_mmio_reg_cmp(const void *a, const void *b) +{ + const struct guc_mmio_reg *ra = a; + const struct guc_mmio_reg *rb = b; + + return (int)ra->offset - (int)rb->offset; +} + +static void guc_mmio_reg_add(struct guc_mmio_regset *regset, + u32 offset, u32 flags) +{ + u32 count = regset->number_of_registers; + struct guc_mmio_reg reg = { + .offset = offset, + .flags = flags, + }; + struct guc_mmio_reg *slot; + + GEM_BUG_ON(count >= GUC_REGSET_MAX_REGISTERS); + + if (bsearch(®, regset->registers, count, + sizeof(reg), guc_mmio_reg_cmp)) + return; + + slot = ®set->registers[count]; + regset->number_of_registers++; + *slot = reg; + + while (slot-- > regset->registers) { + GEM_BUG_ON(slot[0].offset == slot[1].offset); + if (slot[1].offset > slot[0].offset) + break; + + swap(slot[1], slot[0]); + } +} + +#define GUC_MMIO_REG_ADD(regset, reg, masked) \ + guc_mmio_reg_add(regset, \ + i915_mmio_reg_offset((reg)), \ + (masked) ? GUC_REGSET_MASKED : 0) + +static void guc_mmio_regset_init(struct guc_mmio_regset *regset, + struct intel_engine_cs *engine) +{ + const u32 base = engine->mmio_base; + struct i915_wa_list *wal = &engine->wa_list; + struct i915_wa *wa; + unsigned int i; + + GUC_MMIO_REG_ADD(regset, RING_MODE_GEN7(base), true); + GUC_MMIO_REG_ADD(regset, RING_HWS_PGA(base), false); + GUC_MMIO_REG_ADD(regset, RING_IMR(base), false); + + for (i = 0, wa = wal->list; i < wal->count; i++, wa++) + GUC_MMIO_REG_ADD(regset, wa->reg, wa->masked_bits); + + /* Be extra paranoid and include all whitelist registers. */ + for (i = 0; i < RING_MAX_NONPRIV_SLOTS; i++) + GUC_MMIO_REG_ADD(regset, + RING_FORCE_TO_NONPRIV(base, i), + false); +} + +static void guc_mmio_reg_state_init(struct guc_mmio_reg_state *reg_state, + struct intel_engine_cs *engine) +{ + struct guc_mmio_regset *regset; + + GEM_BUG_ON(engine->class >= GUC_MAX_ENGINE_CLASSES); + GEM_BUG_ON(engine->instance >= GUC_MAX_INSTANCES_PER_CLASS); + regset = ®_state->engine_reg[engine->class][engine->instance]; + + guc_mmio_regset_init(regset, engine); +} -- 2.23.0 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply related [flat|nested] 4+ messages in thread
* ✓ Fi.CI.BAT: success for GuC engine reset support 2019-09-25 23:00 [RFC PATCH 0/1] GuC engine reset support Fernando Pacheco 2019-09-25 23:00 ` [RFC PATCH 1/1] drm/i915/guc: Provide mmio list to be saved/restored on engine reset Fernando Pacheco @ 2019-09-25 23:33 ` Patchwork 2019-09-26 18:58 ` ✓ Fi.CI.IGT: " Patchwork 2 siblings, 0 replies; 4+ messages in thread From: Patchwork @ 2019-09-25 23:33 UTC (permalink / raw) To: Fernando Pacheco; +Cc: intel-gfx == Series Details == Series: GuC engine reset support URL : https://patchwork.freedesktop.org/series/67251/ State : success == Summary == CI Bug Log - changes from CI_DRM_6958 -> Patchwork_14543 ==================================================== Summary ------- **SUCCESS** No regressions found. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14543/ Possible new issues ------------------- Here are the unknown changes that may have been introduced in Patchwork_14543: ### IGT changes ### #### Suppressed #### The following results come from untrusted machines, tests, or statuses. They do not affect the overall result. * igt@gem_exec_suspend@basic-s4-devices: - {fi-tgl-u2}: NOTRUN -> [INCOMPLETE][1] [1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14543/fi-tgl-u2/igt@gem_exec_suspend@basic-s4-devices.html Known issues ------------ Here are the changes found in Patchwork_14543 that come from known issues: ### IGT changes ### #### Possible fixes #### * igt@gem_ctx_switch@rcs0: - {fi-icl-guc}: [INCOMPLETE][2] ([fdo#107713]) -> [PASS][3] [2]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6958/fi-icl-guc/igt@gem_ctx_switch@rcs0.html [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14543/fi-icl-guc/igt@gem_ctx_switch@rcs0.html * igt@gem_exec_suspend@basic-s3: - fi-blb-e6850: [INCOMPLETE][4] ([fdo#107718]) -> [PASS][5] [4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6958/fi-blb-e6850/igt@gem_exec_suspend@basic-s3.html [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14543/fi-blb-e6850/igt@gem_exec_suspend@basic-s3.html * igt@kms_chamelium@hdmi-hpd-fast: - fi-kbl-7500u: [FAIL][6] ([fdo#111045] / [fdo#111096]) -> [PASS][7] [6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6958/fi-kbl-7500u/igt@kms_chamelium@hdmi-hpd-fast.html [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14543/fi-kbl-7500u/igt@kms_chamelium@hdmi-hpd-fast.html * igt@kms_frontbuffer_tracking@basic: - fi-hsw-peppy: [DMESG-WARN][8] ([fdo#102614]) -> [PASS][9] [8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6958/fi-hsw-peppy/igt@kms_frontbuffer_tracking@basic.html [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14543/fi-hsw-peppy/igt@kms_frontbuffer_tracking@basic.html {name}: This element is suppressed. This means it is ignored when computing the status of the difference (SUCCESS, WARNING, or FAILURE). [fdo#102614]: https://bugs.freedesktop.org/show_bug.cgi?id=102614 [fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713 [fdo#107718]: https://bugs.freedesktop.org/show_bug.cgi?id=107718 [fdo#111045]: https://bugs.freedesktop.org/show_bug.cgi?id=111045 [fdo#111096]: https://bugs.freedesktop.org/show_bug.cgi?id=111096 Participating hosts (50 -> 44) ------------------------------ Additional (1): fi-tgl-u2 Missing (7): fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-icl-y fi-byt-clapper fi-bdw-samus Build changes ------------- * CI: CI-20190529 -> None * Linux: CI_DRM_6958 -> Patchwork_14543 CI-20190529: 20190529 CI_DRM_6958: d5c4d0bc1c0570ba9128e7afb419d5d5a8ebd4bc @ git://anongit.freedesktop.org/gfx-ci/linux IGT_5203: 82326332f7af336d390e00ae87187bc207fd33dd @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_14543: f9c0e1f14061273ed6ee26ed5460e8a642f3a30e @ git://anongit.freedesktop.org/gfx-ci/linux == Linux commits == f9c0e1f14061 drm/i915/guc: Provide mmio list to be saved/restored on engine reset == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14543/index.html _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 4+ messages in thread
* ✓ Fi.CI.IGT: success for GuC engine reset support 2019-09-25 23:00 [RFC PATCH 0/1] GuC engine reset support Fernando Pacheco 2019-09-25 23:00 ` [RFC PATCH 1/1] drm/i915/guc: Provide mmio list to be saved/restored on engine reset Fernando Pacheco 2019-09-25 23:33 ` ✓ Fi.CI.BAT: success for GuC engine reset support Patchwork @ 2019-09-26 18:58 ` Patchwork 2 siblings, 0 replies; 4+ messages in thread From: Patchwork @ 2019-09-26 18:58 UTC (permalink / raw) To: Fernando Pacheco; +Cc: intel-gfx == Series Details == Series: GuC engine reset support URL : https://patchwork.freedesktop.org/series/67251/ State : success == Summary == CI Bug Log - changes from CI_DRM_6958_full -> Patchwork_14543_full ==================================================== Summary ------- **SUCCESS** No regressions found. Known issues ------------ Here are the changes found in Patchwork_14543_full that come from known issues: ### IGT changes ### #### Issues hit #### * igt@gem_ctx_isolation@rcs0-s3: - shard-apl: [PASS][1] -> [DMESG-WARN][2] ([fdo#108566]) +4 similar issues [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6958/shard-apl3/igt@gem_ctx_isolation@rcs0-s3.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14543/shard-apl8/igt@gem_ctx_isolation@rcs0-s3.html * igt@gem_exec_schedule@preemptive-hang-bsd: - shard-iclb: [PASS][3] -> [SKIP][4] ([fdo#111325]) +4 similar issues [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6958/shard-iclb6/igt@gem_exec_schedule@preemptive-hang-bsd.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14543/shard-iclb2/igt@gem_exec_schedule@preemptive-hang-bsd.html * igt@kms_cursor_crc@pipe-c-cursor-64x64-sliding: - shard-iclb: [PASS][5] -> [INCOMPLETE][6] ([fdo#107713]) +1 similar issue [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6958/shard-iclb2/igt@kms_cursor_crc@pipe-c-cursor-64x64-sliding.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14543/shard-iclb7/igt@kms_cursor_crc@pipe-c-cursor-64x64-sliding.html * igt@kms_cursor_legacy@2x-flip-vs-cursor-atomic: - shard-glk: [PASS][7] -> [FAIL][8] ([fdo#104873]) [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6958/shard-glk1/igt@kms_cursor_legacy@2x-flip-vs-cursor-atomic.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14543/shard-glk9/igt@kms_cursor_legacy@2x-flip-vs-cursor-atomic.html * igt@kms_flip@flip-vs-expired-vblank-interruptible: - shard-kbl: [PASS][9] -> [FAIL][10] ([fdo#105363]) [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6958/shard-kbl3/igt@kms_flip@flip-vs-expired-vblank-interruptible.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14543/shard-kbl1/igt@kms_flip@flip-vs-expired-vblank-interruptible.html * igt@kms_flip@flip-vs-suspend-interruptible: - shard-hsw: [PASS][11] -> [INCOMPLETE][12] ([fdo#103540]) [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6958/shard-hsw4/igt@kms_flip@flip-vs-suspend-interruptible.html [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14543/shard-hsw6/igt@kms_flip@flip-vs-suspend-interruptible.html * igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-cur-indfb-draw-render: - shard-iclb: [PASS][13] -> [FAIL][14] ([fdo#103167]) +6 similar issues [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6958/shard-iclb2/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-cur-indfb-draw-render.html [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14543/shard-iclb8/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-cur-indfb-draw-render.html * igt@kms_pipe_crc_basic@hang-read-crc-pipe-a: - shard-skl: [PASS][15] -> [FAIL][16] ([fdo#103191]) [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6958/shard-skl9/igt@kms_pipe_crc_basic@hang-read-crc-pipe-a.html [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14543/shard-skl10/igt@kms_pipe_crc_basic@hang-read-crc-pipe-a.html * igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min: - shard-skl: [PASS][17] -> [FAIL][18] ([fdo#108145]) +2 similar issues [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6958/shard-skl1/igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min.html [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14543/shard-skl8/igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min.html * igt@kms_psr@psr2_cursor_mmap_gtt: - shard-iclb: [PASS][19] -> [SKIP][20] ([fdo#109441]) [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6958/shard-iclb2/igt@kms_psr@psr2_cursor_mmap_gtt.html [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14543/shard-iclb6/igt@kms_psr@psr2_cursor_mmap_gtt.html * igt@kms_vblank@pipe-b-ts-continuation-dpms-suspend: - shard-kbl: [PASS][21] -> [INCOMPLETE][22] ([fdo#103665]) [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6958/shard-kbl1/igt@kms_vblank@pipe-b-ts-continuation-dpms-suspend.html [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14543/shard-kbl1/igt@kms_vblank@pipe-b-ts-continuation-dpms-suspend.html * igt@prime_busy@hang-bsd2: - shard-iclb: [PASS][23] -> [SKIP][24] ([fdo#109276]) +13 similar issues [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6958/shard-iclb1/igt@prime_busy@hang-bsd2.html [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14543/shard-iclb3/igt@prime_busy@hang-bsd2.html #### Possible fixes #### * igt@gem_ctx_isolation@rcs0-s3: - shard-skl: [INCOMPLETE][25] ([fdo#104108]) -> [PASS][26] [25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6958/shard-skl4/igt@gem_ctx_isolation@rcs0-s3.html [26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14543/shard-skl6/igt@gem_ctx_isolation@rcs0-s3.html * igt@gem_exec_schedule@in-order-bsd: - shard-iclb: [SKIP][27] ([fdo#111325]) -> [PASS][28] +2 similar issues [27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6958/shard-iclb2/igt@gem_exec_schedule@in-order-bsd.html [28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14543/shard-iclb8/igt@gem_exec_schedule@in-order-bsd.html * igt@gem_exec_schedule@promotion-bsd1: - shard-iclb: [SKIP][29] ([fdo#109276]) -> [PASS][30] +17 similar issues [29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6958/shard-iclb8/igt@gem_exec_schedule@promotion-bsd1.html [30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14543/shard-iclb4/igt@gem_exec_schedule@promotion-bsd1.html * igt@kms_atomic_transition@1x-modeset-transitions-fencing: - shard-apl: [INCOMPLETE][31] ([fdo#103927]) -> [PASS][32] +1 similar issue [31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6958/shard-apl1/igt@kms_atomic_transition@1x-modeset-transitions-fencing.html [32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14543/shard-apl7/igt@kms_atomic_transition@1x-modeset-transitions-fencing.html * igt@kms_flip@flip-vs-expired-vblank-interruptible: - shard-glk: [FAIL][33] ([fdo#105363]) -> [PASS][34] [33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6958/shard-glk1/igt@kms_flip@flip-vs-expired-vblank-interruptible.html [34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14543/shard-glk9/igt@kms_flip@flip-vs-expired-vblank-interruptible.html * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-render: - shard-iclb: [FAIL][35] ([fdo#103167]) -> [PASS][36] [35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6958/shard-iclb2/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-render.html [36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14543/shard-iclb6/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-render.html * igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a: - shard-iclb: [INCOMPLETE][37] ([fdo#107713]) -> [PASS][38] [37]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6958/shard-iclb7/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a.html [38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14543/shard-iclb2/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a.html * igt@kms_pipe_crc_basic@suspend-read-crc-pipe-c: - shard-apl: [DMESG-WARN][39] ([fdo#108566]) -> [PASS][40] +2 similar issues [39]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6958/shard-apl1/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-c.html [40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14543/shard-apl1/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-c.html * igt@kms_psr@psr2_sprite_plane_move: - shard-iclb: [SKIP][41] ([fdo#109441]) -> [PASS][42] [41]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6958/shard-iclb6/igt@kms_psr@psr2_sprite_plane_move.html [42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14543/shard-iclb2/igt@kms_psr@psr2_sprite_plane_move.html * igt@kms_rotation_crc@sprite-rotation-90: - shard-iclb: [INCOMPLETE][43] ([fdo#107713] / [fdo#110026]) -> [PASS][44] [43]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6958/shard-iclb7/igt@kms_rotation_crc@sprite-rotation-90.html [44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14543/shard-iclb6/igt@kms_rotation_crc@sprite-rotation-90.html * igt@kms_setmode@basic: - shard-apl: [FAIL][45] ([fdo#99912]) -> [PASS][46] [45]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6958/shard-apl1/igt@kms_setmode@basic.html [46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14543/shard-apl5/igt@kms_setmode@basic.html - shard-kbl: [FAIL][47] ([fdo#99912]) -> [PASS][48] [47]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6958/shard-kbl2/igt@kms_setmode@basic.html [48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14543/shard-kbl1/igt@kms_setmode@basic.html * igt@kms_vblank@pipe-a-ts-continuation-suspend: - shard-kbl: [DMESG-WARN][49] ([fdo#108566]) -> [PASS][50] +3 similar issues [49]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6958/shard-kbl3/igt@kms_vblank@pipe-a-ts-continuation-suspend.html [50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14543/shard-kbl4/igt@kms_vblank@pipe-a-ts-continuation-suspend.html #### Warnings #### * igt@gem_mocs_settings@mocs-settings-bsd2: - shard-iclb: [SKIP][51] ([fdo#109276]) -> [FAIL][52] ([fdo#111330]) +1 similar issue [51]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6958/shard-iclb6/igt@gem_mocs_settings@mocs-settings-bsd2.html [52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14543/shard-iclb2/igt@gem_mocs_settings@mocs-settings-bsd2.html * igt@gem_workarounds@suspend-resume-context: - shard-apl: [INCOMPLETE][53] ([fdo#103927]) -> [DMESG-WARN][54] ([fdo#108566]) [53]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6958/shard-apl6/igt@gem_workarounds@suspend-resume-context.html [54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14543/shard-apl4/igt@gem_workarounds@suspend-resume-context.html [fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167 [fdo#103191]: https://bugs.freedesktop.org/show_bug.cgi?id=103191 [fdo#103540]: https://bugs.freedesktop.org/show_bug.cgi?id=103540 [fdo#103665]: https://bugs.freedesktop.org/show_bug.cgi?id=103665 [fdo#103927]: https://bugs.freedesktop.org/show_bug.cgi?id=103927 [fdo#104108]: https://bugs.freedesktop.org/show_bug.cgi?id=104108 [fdo#104873]: https://bugs.freedesktop.org/show_bug.cgi?id=104873 [fdo#105363]: https://bugs.freedesktop.org/show_bug.cgi?id=105363 [fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713 [fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145 [fdo#108566]: https://bugs.freedesktop.org/show_bug.cgi?id=108566 [fdo#109276]: https://bugs.freedesktop.org/show_bug.cgi?id=109276 [fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441 [fdo#110026]: https://bugs.freedesktop.org/show_bug.cgi?id=110026 [fdo#111325]: https://bugs.freedesktop.org/show_bug.cgi?id=111325 [fdo#111330]: https://bugs.freedesktop.org/show_bug.cgi?id=111330 [fdo#99912]: https://bugs.freedesktop.org/show_bug.cgi?id=99912 Participating hosts (9 -> 9) ------------------------------ Additional (1): pig-glk-j5005 Missing (1): pig-hsw-4770r Build changes ------------- * CI: CI-20190529 -> None * Linux: CI_DRM_6958 -> Patchwork_14543 CI-20190529: 20190529 CI_DRM_6958: d5c4d0bc1c0570ba9128e7afb419d5d5a8ebd4bc @ git://anongit.freedesktop.org/gfx-ci/linux IGT_5203: 82326332f7af336d390e00ae87187bc207fd33dd @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_14543: f9c0e1f14061273ed6ee26ed5460e8a642f3a30e @ git://anongit.freedesktop.org/gfx-ci/linux piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14543/ _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 4+ messages in thread
end of thread, other threads:[~2019-09-26 18:58 UTC | newest] Thread overview: 4+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2019-09-25 23:00 [RFC PATCH 0/1] GuC engine reset support Fernando Pacheco 2019-09-25 23:00 ` [RFC PATCH 1/1] drm/i915/guc: Provide mmio list to be saved/restored on engine reset Fernando Pacheco 2019-09-25 23:33 ` ✓ Fi.CI.BAT: success for GuC engine reset support Patchwork 2019-09-26 18:58 ` ✓ Fi.CI.IGT: " Patchwork
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