* [PATCH] drm/i915/selftests: Exercise potential false lite-restore
@ 2019-10-01 9:45 Chris Wilson
2019-10-01 9:51 ` Chris Wilson
` (13 more replies)
0 siblings, 14 replies; 25+ messages in thread
From: Chris Wilson @ 2019-10-01 9:45 UTC (permalink / raw)
To: intel-gfx
If execlists's lite-restore is based on the common GEM context tag
rather than the per-intel_context LRCA, then a context switch between
two intel_contexts on the same engine derived from the same GEM context
will perform a lite-restore instead of a full context switch. We can
exploit this by poisoning the ringbuffer of the first context and trying
to trick a simple RING_TAIL update (i.e. lite-restore)
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
---
drivers/gpu/drm/i915/gt/selftest_lrc.c | 117 +++++++++++++++++++++++++
1 file changed, 117 insertions(+)
diff --git a/drivers/gpu/drm/i915/gt/selftest_lrc.c b/drivers/gpu/drm/i915/gt/selftest_lrc.c
index 93f2fcdc49bf..464b2e325970 100644
--- a/drivers/gpu/drm/i915/gt/selftest_lrc.c
+++ b/drivers/gpu/drm/i915/gt/selftest_lrc.c
@@ -79,6 +79,122 @@ static int live_sanitycheck(void *arg)
return err;
}
+static int live_unlite_restore(void *arg)
+{
+ struct drm_i915_private *i915 = arg;
+ struct intel_engine_cs *engine;
+ struct i915_gem_context *ctx;
+ enum intel_engine_id id;
+ intel_wakeref_t wakeref;
+ struct igt_spinner spin;
+ int err = -ENOMEM;
+
+ /*
+ * Check that we can correctly context switch between 2 instances
+ * on the same engine from the same parent context.
+ */
+
+ mutex_lock(&i915->drm.struct_mutex);
+ wakeref = intel_runtime_pm_get(&i915->runtime_pm);
+
+ if (igt_spinner_init(&spin, &i915->gt))
+ goto err_unlock;
+
+ ctx = kernel_context(i915);
+ if (!ctx)
+ goto err_spin;
+
+ for_each_engine(engine, i915, id) {
+ struct intel_context *ce[2] = {};
+ struct i915_request *rq[2];
+ struct igt_live_test t;
+ int n;
+
+ if (!intel_engine_can_store_dword(engine))
+ continue;
+
+ if (igt_live_test_begin(&t, i915, __func__, engine->name)) {
+ err = -EIO;
+ break;
+ }
+
+ for (n = 0; n < ARRAY_SIZE(ce); n++) {
+ ce[n] = intel_context_create(ctx, engine);
+ if (IS_ERR(ce[n])) {
+ err = PTR_ERR(ce[n]);
+ goto err_ce;
+ }
+
+ err = intel_context_pin(ce[n]);
+ if (err)
+ goto err_ce;
+
+ /*
+ * Setup the pair of contexts such that if we
+ * lite-restore using the RING_TAIL from ce[1] it
+ * will execute garbage from ce[0]->ring.
+ */
+ memset(ce[n]->ring->vaddr,
+ POISON_INUSE,
+ ce[n]->ring->vma->size);
+ }
+ intel_ring_reset(ce[1]->ring, ce[1]->ring->vma->size / 2);
+ __execlists_update_reg_state(ce[1], engine);
+
+ rq[0] = igt_spinner_create_request(&spin, ce[0], MI_ARB_CHECK);
+ if (IS_ERR(rq[0])) {
+ err = PTR_ERR(rq[0]);
+ goto err_ce;
+ }
+
+ GEM_BUG_ON(rq[0]->tail > ce[1]->ring->emit);
+ i915_request_get(rq[0]);
+ i915_request_add(rq[0]);
+
+ if (!igt_wait_for_spinner(&spin, rq[0])) {
+ i915_request_put(rq[0]);
+ goto err_ce;
+ }
+
+ rq[1] = i915_request_create(ce[1]);
+ if (IS_ERR(rq[1])) {
+ err = PTR_ERR(rq[1]);
+ i915_request_put(rq[0]);
+ goto err_ce;
+ }
+ GEM_BUG_ON(rq[1]->tail <= rq[0]->tail);
+
+ /* Ensure we do a completion switch from ce[0] to ce[1] */
+ i915_request_await_dma_fence(rq[1], &rq[0]->fence);
+ i915_request_put(rq[0]);
+
+ i915_request_add(rq[1]);
+
+err_ce:
+ igt_spinner_end(&spin);
+ for (n = 0; n < ARRAY_SIZE(ce); n++) {
+ if (IS_ERR_OR_NULL(ce[n]))
+ break;
+
+ intel_context_unpin(ce[n]);
+ intel_context_put(ce[n]);
+ }
+
+ if (igt_live_test_end(&t))
+ err = -EIO;
+ if (err)
+ break;
+ }
+
+ kernel_context_close(ctx);
+err_spin:
+ igt_spinner_fini(&spin);
+err_unlock:
+ intel_runtime_pm_put(&i915->runtime_pm, wakeref);
+ mutex_unlock(&i915->drm.struct_mutex);
+ return err;
+}
+
static int
emit_semaphore_chain(struct i915_request *rq, struct i915_vma *vma, int idx)
{
@@ -2178,6 +2294,7 @@ int intel_execlists_live_selftests(struct drm_i915_private *i915)
{
static const struct i915_subtest tests[] = {
SUBTEST(live_sanitycheck),
+ SUBTEST(live_unlite_restore),
SUBTEST(live_timeslice_preempt),
SUBTEST(live_busywait_preempt),
SUBTEST(live_preempt),
--
2.23.0
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 25+ messages in thread
* [PATCH] drm/i915/selftests: Exercise potential false lite-restore
2019-10-01 9:45 [PATCH] drm/i915/selftests: Exercise potential false lite-restore Chris Wilson
@ 2019-10-01 9:51 ` Chris Wilson
2019-10-01 12:16 ` Tvrtko Ursulin
2019-10-01 12:43 ` [PATCH v2] " Chris Wilson
` (12 subsequent siblings)
13 siblings, 1 reply; 25+ messages in thread
From: Chris Wilson @ 2019-10-01 9:51 UTC (permalink / raw)
To: intel-gfx
If execlists's lite-restore is based on the common GEM context tag
rather than the per-intel_context LRCA, then a context switch between
two intel_contexts on the same engine derived from the same GEM context
will perform a lite-restore instead of a full context switch. We can
exploit this by poisoning the ringbuffer of the first context and trying
to trick a simple RING_TAIL update (i.e. lite-restore)
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
---
Then switch back to ce[0] for fun.
---
drivers/gpu/drm/i915/gt/selftest_lrc.c | 132 +++++++++++++++++++++++++
1 file changed, 132 insertions(+)
diff --git a/drivers/gpu/drm/i915/gt/selftest_lrc.c b/drivers/gpu/drm/i915/gt/selftest_lrc.c
index 93f2fcdc49bf..b90b970a44b9 100644
--- a/drivers/gpu/drm/i915/gt/selftest_lrc.c
+++ b/drivers/gpu/drm/i915/gt/selftest_lrc.c
@@ -79,6 +79,137 @@ static int live_sanitycheck(void *arg)
return err;
}
+static int live_unlite_restore(void *arg)
+{
+ struct drm_i915_private *i915 = arg;
+ struct intel_engine_cs *engine;
+ struct i915_gem_context *ctx;
+ enum intel_engine_id id;
+ intel_wakeref_t wakeref;
+ struct igt_spinner spin;
+ int err = -ENOMEM;
+
+ /*
+ * Check that we can correctly context switch between 2 instances
+ * on the same engine from the same parent context.
+ */
+
+ mutex_lock(&i915->drm.struct_mutex);
+ wakeref = intel_runtime_pm_get(&i915->runtime_pm);
+
+ if (igt_spinner_init(&spin, &i915->gt))
+ goto err_unlock;
+
+ ctx = kernel_context(i915);
+ if (!ctx)
+ goto err_spin;
+
+ for_each_engine(engine, i915, id) {
+ struct intel_context *ce[2] = {};
+ struct i915_request *rq[3];
+ struct igt_live_test t;
+ int n;
+
+ if (!intel_engine_can_store_dword(engine))
+ continue;
+
+ if (igt_live_test_begin(&t, i915, __func__, engine->name)) {
+ err = -EIO;
+ break;
+ }
+
+ for (n = 0; n < ARRAY_SIZE(ce); n++) {
+ ce[n] = intel_context_create(ctx, engine);
+ if (IS_ERR(ce[n])) {
+ err = PTR_ERR(ce[n]);
+ goto err_ce;
+ }
+
+ err = intel_context_pin(ce[n]);
+ if (err)
+ goto err_ce;
+
+ /*
+ * Setup the pair of contexts such that if we
+ * lite-restore using the RING_TAIL from ce[1] it
+ * will execute garbage from ce[0]->ring.
+ */
+ memset(ce[n]->ring->vaddr,
+ POISON_INUSE,
+ ce[n]->ring->vma->size);
+ }
+ intel_ring_reset(ce[1]->ring, ce[1]->ring->vma->size / 2);
+ __execlists_update_reg_state(ce[1], engine);
+
+ rq[0] = igt_spinner_create_request(&spin, ce[0], MI_ARB_CHECK);
+ if (IS_ERR(rq[0])) {
+ err = PTR_ERR(rq[0]);
+ goto err_ce;
+ }
+
+ GEM_BUG_ON(rq[0]->tail > ce[1]->ring->emit);
+ i915_request_get(rq[0]);
+ i915_request_add(rq[0]);
+
+ if (!igt_wait_for_spinner(&spin, rq[0])) {
+ i915_request_put(rq[0]);
+ goto err_ce;
+ }
+
+ rq[1] = i915_request_create(ce[1]);
+ if (IS_ERR(rq[1])) {
+ err = PTR_ERR(rq[1]);
+ i915_request_put(rq[0]);
+ goto err_ce;
+ }
+ GEM_BUG_ON(rq[1]->tail <= rq[0]->tail);
+
+ /* Ensure we do a completion switch from ce[0] to ce[1] */
+ i915_request_await_dma_fence(rq[1], &rq[0]->fence);
+ i915_request_put(rq[0]);
+
+ i915_request_get(rq[1]);
+ i915_request_add(rq[1]);
+
+ /* And switch back to ce[0] for good measure */
+ rq[2] = i915_request_create(ce[0]);
+ if (IS_ERR(rq[2])) {
+ err = PTR_ERR(rq[2]);
+ i915_request_put(rq[1]);
+ goto err_ce;
+ }
+ GEM_BUG_ON(rq[2]->tail > rq[1]->tail);
+
+ i915_request_await_dma_fence(rq[2], &rq[1]->fence);
+ i915_request_put(rq[1]);
+
+ i915_request_add(rq[2]);
+
+err_ce:
+ igt_spinner_end(&spin);
+ for (n = 0; n < ARRAY_SIZE(ce); n++) {
+ if (IS_ERR_OR_NULL(ce[n]))
+ break;
+
+ intel_context_unpin(ce[n]);
+ intel_context_put(ce[n]);
+ }
+
+ if (igt_live_test_end(&t))
+ err = -EIO;
+ if (err)
+ break;
+ }
+
+ kernel_context_close(ctx);
+err_spin:
+ igt_spinner_fini(&spin);
+err_unlock:
+ intel_runtime_pm_put(&i915->runtime_pm, wakeref);
+ mutex_unlock(&i915->drm.struct_mutex);
+ return err;
+}
+
static int
emit_semaphore_chain(struct i915_request *rq, struct i915_vma *vma, int idx)
{
@@ -2178,6 +2309,7 @@ int intel_execlists_live_selftests(struct drm_i915_private *i915)
{
static const struct i915_subtest tests[] = {
SUBTEST(live_sanitycheck),
+ SUBTEST(live_unlite_restore),
SUBTEST(live_timeslice_preempt),
SUBTEST(live_busywait_preempt),
SUBTEST(live_preempt),
--
2.23.0
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 25+ messages in thread
* Re: [PATCH] drm/i915/selftests: Exercise potential false lite-restore
2019-10-01 9:51 ` Chris Wilson
@ 2019-10-01 12:16 ` Tvrtko Ursulin
2019-10-01 12:22 ` Chris Wilson
0 siblings, 1 reply; 25+ messages in thread
From: Tvrtko Ursulin @ 2019-10-01 12:16 UTC (permalink / raw)
To: Chris Wilson, intel-gfx
On 01/10/2019 10:51, Chris Wilson wrote:
> If execlists's lite-restore is based on the common GEM context tag
> rather than the per-intel_context LRCA, then a context switch between
> two intel_contexts on the same engine derived from the same GEM context
> will perform a lite-restore instead of a full context switch. We can
> exploit this by poisoning the ringbuffer of the first context and trying
> to trick a simple RING_TAIL update (i.e. lite-restore)
>
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
> ---
> Then switch back to ce[0] for fun.
> ---
> drivers/gpu/drm/i915/gt/selftest_lrc.c | 132 +++++++++++++++++++++++++
> 1 file changed, 132 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/gt/selftest_lrc.c b/drivers/gpu/drm/i915/gt/selftest_lrc.c
> index 93f2fcdc49bf..b90b970a44b9 100644
> --- a/drivers/gpu/drm/i915/gt/selftest_lrc.c
> +++ b/drivers/gpu/drm/i915/gt/selftest_lrc.c
> @@ -79,6 +79,137 @@ static int live_sanitycheck(void *arg)
> return err;
> }
>
> +static int live_unlite_restore(void *arg)
> +{
> + struct drm_i915_private *i915 = arg;
> + struct intel_engine_cs *engine;
> + struct i915_gem_context *ctx;
> + enum intel_engine_id id;
> + intel_wakeref_t wakeref;
> + struct igt_spinner spin;
> + int err = -ENOMEM;
> +
> + /*
> + * Check that we can correctly context switch between 2 instances
> + * on the same engine from the same parent context.
> + */
> +
> + mutex_lock(&i915->drm.struct_mutex);
> + wakeref = intel_runtime_pm_get(&i915->runtime_pm);
> +
> + if (igt_spinner_init(&spin, &i915->gt))
> + goto err_unlock;
> +
> + ctx = kernel_context(i915);
> + if (!ctx)
> + goto err_spin;
> +
> + for_each_engine(engine, i915, id) {
> + struct intel_context *ce[2] = {};
> + struct i915_request *rq[3];
> + struct igt_live_test t;
> + int n;
> +
> + if (!intel_engine_can_store_dword(engine))
> + continue;
> +
> + if (igt_live_test_begin(&t, i915, __func__, engine->name)) {
> + err = -EIO;
> + break;
> + }
> +
> + for (n = 0; n < ARRAY_SIZE(ce); n++) {
> + ce[n] = intel_context_create(ctx, engine);
> + if (IS_ERR(ce[n])) {
> + err = PTR_ERR(ce[n]);
> + goto err_ce;
> + }
> +
> + err = intel_context_pin(ce[n]);
> + if (err)
> + goto err_ce;
If pinning fails err_ce path will underflow the unpin. Perhaps you need
to only store in ce[] when both steps have passed and keep it in a local
until then.
> +
> + /*
> + * Setup the pair of contexts such that if we
> + * lite-restore using the RING_TAIL from ce[1] it
> + * will execute garbage from ce[0]->ring.
> + */
> + memset(ce[n]->ring->vaddr,
> + POISON_INUSE,
> + ce[n]->ring->vma->size);
> + }
> + intel_ring_reset(ce[1]->ring, ce[1]->ring->vma->size / 2);
> + __execlists_update_reg_state(ce[1], engine);
> +
> + rq[0] = igt_spinner_create_request(&spin, ce[0], MI_ARB_CHECK);
> + if (IS_ERR(rq[0])) {
> + err = PTR_ERR(rq[0]);
> + goto err_ce;
> + }
> +
> + GEM_BUG_ON(rq[0]->tail > ce[1]->ring->emit);
> + i915_request_get(rq[0]);
> + i915_request_add(rq[0]);
> +
> + if (!igt_wait_for_spinner(&spin, rq[0])) {
> + i915_request_put(rq[0]);
> + goto err_ce;
> + }
> +
> + rq[1] = i915_request_create(ce[1]);
> + if (IS_ERR(rq[1])) {
> + err = PTR_ERR(rq[1]);
> + i915_request_put(rq[0]);
> + goto err_ce;
> + }
> + GEM_BUG_ON(rq[1]->tail <= rq[0]->tail);
> +
> + /* Ensure we do a completion switch from ce[0] to ce[1] */
> + i915_request_await_dma_fence(rq[1], &rq[0]->fence);
What do you mean by completion switch? You are setting up a dependency
so rq[1] (and rq[2]) won't be put into the elsp until spinner is ended
so it may not even be a context switch. Wouldn't you actually need the
opposite? I was expecting you would let the spinner run, make sure rq[1]
is in elsp and then count on time slicing to trigger a context switch.
Regards,
Tvrtko
> + i915_request_put(rq[0]);
> +
> + i915_request_get(rq[1]);
> + i915_request_add(rq[1]);
> +
> + /* And switch back to ce[0] for good measure */
> + rq[2] = i915_request_create(ce[0]);
> + if (IS_ERR(rq[2])) {
> + err = PTR_ERR(rq[2]);
> + i915_request_put(rq[1]);
> + goto err_ce;
> + }
> + GEM_BUG_ON(rq[2]->tail > rq[1]->tail);
> +
> + i915_request_await_dma_fence(rq[2], &rq[1]->fence);
> + i915_request_put(rq[1]);
> +
> + i915_request_add(rq[2]);
> +
> +err_ce:
> + igt_spinner_end(&spin);
> + for (n = 0; n < ARRAY_SIZE(ce); n++) {
> + if (IS_ERR_OR_NULL(ce[n]))
> + break;
> +
> + intel_context_unpin(ce[n]);
> + intel_context_put(ce[n]);
> + }
> +
> + if (igt_live_test_end(&t))
> + err = -EIO;
> + if (err)
> + break;
> + }
> +
> + kernel_context_close(ctx);
> +err_spin:
> + igt_spinner_fini(&spin);
> +err_unlock:
> + intel_runtime_pm_put(&i915->runtime_pm, wakeref);
> + mutex_unlock(&i915->drm.struct_mutex);
> + return err;
> +}
> +
> static int
> emit_semaphore_chain(struct i915_request *rq, struct i915_vma *vma, int idx)
> {
> @@ -2178,6 +2309,7 @@ int intel_execlists_live_selftests(struct drm_i915_private *i915)
> {
> static const struct i915_subtest tests[] = {
> SUBTEST(live_sanitycheck),
> + SUBTEST(live_unlite_restore),
> SUBTEST(live_timeslice_preempt),
> SUBTEST(live_busywait_preempt),
> SUBTEST(live_preempt),
>
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 25+ messages in thread
* Re: [PATCH] drm/i915/selftests: Exercise potential false lite-restore
2019-10-01 12:16 ` Tvrtko Ursulin
@ 2019-10-01 12:22 ` Chris Wilson
2019-10-01 12:30 ` Tvrtko Ursulin
0 siblings, 1 reply; 25+ messages in thread
From: Chris Wilson @ 2019-10-01 12:22 UTC (permalink / raw)
To: Tvrtko Ursulin, intel-gfx
Quoting Tvrtko Ursulin (2019-10-01 13:16:19)
>
> On 01/10/2019 10:51, Chris Wilson wrote:
> > +
> > + /*
> > + * Setup the pair of contexts such that if we
> > + * lite-restore using the RING_TAIL from ce[1] it
> > + * will execute garbage from ce[0]->ring.
> > + */
> > + memset(ce[n]->ring->vaddr,
> > + POISON_INUSE,
> > + ce[n]->ring->vma->size);
> > + }
> > + intel_ring_reset(ce[1]->ring, ce[1]->ring->vma->size / 2);
> > + __execlists_update_reg_state(ce[1], engine);
> > +
> > + rq[0] = igt_spinner_create_request(&spin, ce[0], MI_ARB_CHECK);
> > + if (IS_ERR(rq[0])) {
> > + err = PTR_ERR(rq[0]);
> > + goto err_ce;
> > + }
> > +
> > + GEM_BUG_ON(rq[0]->tail > ce[1]->ring->emit);
> > + i915_request_get(rq[0]);
> > + i915_request_add(rq[0]);
> > +
> > + if (!igt_wait_for_spinner(&spin, rq[0])) {
> > + i915_request_put(rq[0]);
> > + goto err_ce;
> > + }
> > +
> > + rq[1] = i915_request_create(ce[1]);
> > + if (IS_ERR(rq[1])) {
> > + err = PTR_ERR(rq[1]);
> > + i915_request_put(rq[0]);
> > + goto err_ce;
> > + }
> > + GEM_BUG_ON(rq[1]->tail <= rq[0]->tail);
> > +
> > + /* Ensure we do a completion switch from ce[0] to ce[1] */
> > + i915_request_await_dma_fence(rq[1], &rq[0]->fence);
>
> What do you mean by completion switch? You are setting up a dependency
> so rq[1] (and rq[2]) won't be put into the elsp until spinner is ended
> so it may not even be a context switch. Wouldn't you actually need the
> opposite? I was expecting you would let the spinner run, make sure rq[1]
> is in elsp and then count on time slicing to trigger a context switch.
The test I had in mind was to have
ELSP[0] = ce[0]
ELSP[1] = ce[1]
and so chose to prevent any timeslicing reordering that. Same engine, so
it will add a wait-on-submit-fence (i.e. a no-op) but would install the
dependency link to prevent any reordering.
A second test to have the spinner running then using priority to preempt
it, seems like a good addition.
-Chris
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 25+ messages in thread
* Re: [PATCH] drm/i915/selftests: Exercise potential false lite-restore
2019-10-01 12:22 ` Chris Wilson
@ 2019-10-01 12:30 ` Tvrtko Ursulin
0 siblings, 0 replies; 25+ messages in thread
From: Tvrtko Ursulin @ 2019-10-01 12:30 UTC (permalink / raw)
To: Chris Wilson, intel-gfx
On 01/10/2019 13:22, Chris Wilson wrote:
> Quoting Tvrtko Ursulin (2019-10-01 13:16:19)
>>
>> On 01/10/2019 10:51, Chris Wilson wrote:
>>> +
>>> + /*
>>> + * Setup the pair of contexts such that if we
>>> + * lite-restore using the RING_TAIL from ce[1] it
>>> + * will execute garbage from ce[0]->ring.
>>> + */
>>> + memset(ce[n]->ring->vaddr,
>>> + POISON_INUSE,
>>> + ce[n]->ring->vma->size);
>>> + }
>>> + intel_ring_reset(ce[1]->ring, ce[1]->ring->vma->size / 2);
>>> + __execlists_update_reg_state(ce[1], engine);
>>> +
>>> + rq[0] = igt_spinner_create_request(&spin, ce[0], MI_ARB_CHECK);
>>> + if (IS_ERR(rq[0])) {
>>> + err = PTR_ERR(rq[0]);
>>> + goto err_ce;
>>> + }
>>> +
>>> + GEM_BUG_ON(rq[0]->tail > ce[1]->ring->emit);
>>> + i915_request_get(rq[0]);
>>> + i915_request_add(rq[0]);
>>> +
>>> + if (!igt_wait_for_spinner(&spin, rq[0])) {
>>> + i915_request_put(rq[0]);
>>> + goto err_ce;
>>> + }
>>> +
>>> + rq[1] = i915_request_create(ce[1]);
>>> + if (IS_ERR(rq[1])) {
>>> + err = PTR_ERR(rq[1]);
>>> + i915_request_put(rq[0]);
>>> + goto err_ce;
>>> + }
>>> + GEM_BUG_ON(rq[1]->tail <= rq[0]->tail);
>>> +
>>> + /* Ensure we do a completion switch from ce[0] to ce[1] */
>>> + i915_request_await_dma_fence(rq[1], &rq[0]->fence);
>>
>> What do you mean by completion switch? You are setting up a dependency
>> so rq[1] (and rq[2]) won't be put into the elsp until spinner is ended
>> so it may not even be a context switch. Wouldn't you actually need the
>> opposite? I was expecting you would let the spinner run, make sure rq[1]
>> is in elsp and then count on time slicing to trigger a context switch.
>
> The test I had in mind was to have
>
> ELSP[0] = ce[0]
> ELSP[1] = ce[1]
>
> and so chose to prevent any timeslicing reordering that. Same engine, so
> it will add a wait-on-submit-fence (i.e. a no-op) but would install the
> dependency link to prevent any reordering.
Ah my bad, did not think about the same engine optimisation. Expand the
comment? :)
> A second test to have the spinner running then using priority to preempt
> it, seems like a good addition.
Priority it more controllable than timeslicing, true.
Regards,
Tvrtko
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https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 25+ messages in thread
* [PATCH v2] drm/i915/selftests: Exercise potential false lite-restore
2019-10-01 9:45 [PATCH] drm/i915/selftests: Exercise potential false lite-restore Chris Wilson
2019-10-01 9:51 ` Chris Wilson
@ 2019-10-01 12:43 ` Chris Wilson
2019-10-01 12:59 ` Tvrtko Ursulin
2019-10-01 15:53 ` Chris Wilson
` (11 subsequent siblings)
13 siblings, 1 reply; 25+ messages in thread
From: Chris Wilson @ 2019-10-01 12:43 UTC (permalink / raw)
To: intel-gfx
If execlists's lite-restore is based on the common GEM context tag
rather than the per-intel_context LRCA, then a context switch between
two intel_contexts on the same engine derived from the same GEM context
will perform a lite-restore instead of a full context switch. We can
exploit this by poisoning the ringbuffer of the first context and trying
to trick a simple RING_TAIL update (i.e. lite-restore)
v2: Also check what happens if preempt ce[0] with ce[1] (both instances
on the same engine from the same parent context) [Tvrtko]
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
---
drivers/gpu/drm/i915/gt/selftest_lrc.c | 173 +++++++++++++++++++++++++
1 file changed, 173 insertions(+)
diff --git a/drivers/gpu/drm/i915/gt/selftest_lrc.c b/drivers/gpu/drm/i915/gt/selftest_lrc.c
index 93f2fcdc49bf..de498c38a006 100644
--- a/drivers/gpu/drm/i915/gt/selftest_lrc.c
+++ b/drivers/gpu/drm/i915/gt/selftest_lrc.c
@@ -79,6 +79,177 @@ static int live_sanitycheck(void *arg)
return err;
}
+static int live_unlite_restore(struct drm_i915_private *i915, int prio)
+{
+ struct intel_engine_cs *engine;
+ struct i915_gem_context *ctx;
+ enum intel_engine_id id;
+ intel_wakeref_t wakeref;
+ struct igt_spinner spin;
+ int err = -ENOMEM;
+
+ /*
+ * Check that we can correctly context switch between 2 instances
+ * on the same engine from the same parent context.
+ */
+
+ mutex_lock(&i915->drm.struct_mutex);
+ wakeref = intel_runtime_pm_get(&i915->runtime_pm);
+
+ if (igt_spinner_init(&spin, &i915->gt))
+ goto err_unlock;
+
+ ctx = kernel_context(i915);
+ if (!ctx)
+ goto err_spin;
+
+ err = 0;
+ for_each_engine(engine, i915, id) {
+ struct intel_context *ce[2] = {};
+ struct i915_request *rq[2];
+ struct igt_live_test t;
+ int n;
+
+ if (prio && !intel_engine_has_preemption(engine))
+ continue;
+
+ if (!intel_engine_can_store_dword(engine))
+ continue;
+
+ if (igt_live_test_begin(&t, i915, __func__, engine->name)) {
+ err = -EIO;
+ break;
+ }
+
+ for (n = 0; n < ARRAY_SIZE(ce); n++) {
+ struct intel_context *tmp;
+
+ tmp = intel_context_create(ctx, engine);
+ if (IS_ERR(tmp)) {
+ err = PTR_ERR(tmp);
+ goto err_ce;
+ }
+
+ err = intel_context_pin(tmp);
+ if (err) {
+ intel_context_put(tmp);
+ goto err_ce;
+ }
+
+ /*
+ * Setup the pair of contexts such that if we
+ * lite-restore using the RING_TAIL from ce[1] it
+ * will execute garbage from ce[0]->ring.
+ */
+ memset(tmp->ring->vaddr,
+ POISON_INUSE, /* IPEHR: 0x5a5a5a5a [hung!] */
+ tmp->ring->vma->size);
+
+ ce[n] = tmp;
+ }
+ intel_ring_reset(ce[1]->ring, ce[1]->ring->vma->size / 2);
+ __execlists_update_reg_state(ce[1], engine);
+
+ rq[0] = igt_spinner_create_request(&spin, ce[0], MI_ARB_CHECK);
+ if (IS_ERR(rq[0])) {
+ err = PTR_ERR(rq[0]);
+ goto err_ce;
+ }
+
+ GEM_BUG_ON(rq[0]->tail > ce[1]->ring->emit);
+ i915_request_get(rq[0]);
+ i915_request_add(rq[0]);
+
+ if (!igt_wait_for_spinner(&spin, rq[0])) {
+ i915_request_put(rq[0]);
+ goto err_ce;
+ }
+
+ rq[1] = i915_request_create(ce[1]);
+ if (IS_ERR(rq[1])) {
+ err = PTR_ERR(rq[1]);
+ i915_request_put(rq[0]);
+ goto err_ce;
+ }
+ GEM_BUG_ON(rq[1]->tail <= rq[0]->tail);
+
+ if (!prio) {
+ /*
+ * Ensure we do the switch to ce[1] on completion.
+ *
+ * rq[0] is already submitted, so this should reduce
+ * to a no-op (a wait on a request on the same engine
+ * uses the submit fence, not the completion fence),
+ * but it will install a dependency on rq[1] for rq[0]
+ * that will prevent the pair being reordered by
+ * timeslicing.
+ */
+ i915_request_await_dma_fence(rq[1], &rq[0]->fence);
+ }
+ i915_request_put(rq[0]);
+
+ i915_request_get(rq[1]);
+ i915_request_add(rq[1]);
+
+ if (prio) {
+ struct i915_sched_attr attr = {
+ .priority = prio,
+ };
+
+ /* Alternatively preempt the spinner with ce[1] */
+ engine->schedule(rq[1], &attr);
+ }
+
+ /* And switch back to ce[0] for good measure */
+ rq[0] = i915_request_create(ce[0]);
+ if (IS_ERR(rq[0])) {
+ err = PTR_ERR(rq[0]);
+ i915_request_put(rq[1]);
+ goto err_ce;
+ }
+ GEM_BUG_ON(rq[0]->tail > rq[1]->tail);
+
+ i915_request_await_dma_fence(rq[0], &rq[1]->fence);
+ i915_request_put(rq[1]);
+
+ i915_request_add(rq[0]);
+
+err_ce:
+ tasklet_kill(&engine->execlists.tasklet); /* flush submission */
+ igt_spinner_end(&spin);
+ for (n = 0; n < ARRAY_SIZE(ce); n++) {
+ if (IS_ERR_OR_NULL(ce[n]))
+ break;
+
+ intel_context_unpin(ce[n]);
+ intel_context_put(ce[n]);
+ }
+
+ if (igt_live_test_end(&t))
+ err = -EIO;
+ if (err)
+ break;
+ }
+
+ kernel_context_close(ctx);
+err_spin:
+ igt_spinner_fini(&spin);
+err_unlock:
+ intel_runtime_pm_put(&i915->runtime_pm, wakeref);
+ mutex_unlock(&i915->drm.struct_mutex);
+ return err;
+}
+
+static int live_unlite_switch(void *arg)
+{
+ return live_unlite_restore(arg, 0);
+}
+
+static int live_unlite_preempt(void *arg)
+{
+ return live_unlite_restore(arg, I915_USER_PRIORITY(I915_PRIORITY_MAX));
+}
+
static int
emit_semaphore_chain(struct i915_request *rq, struct i915_vma *vma, int idx)
{
@@ -2178,6 +2349,8 @@ int intel_execlists_live_selftests(struct drm_i915_private *i915)
{
static const struct i915_subtest tests[] = {
SUBTEST(live_sanitycheck),
+ SUBTEST(live_unlite_switch),
+ SUBTEST(live_unlite_preempt),
SUBTEST(live_timeslice_preempt),
SUBTEST(live_busywait_preempt),
SUBTEST(live_preempt),
--
2.23.0
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 25+ messages in thread
* Re: [PATCH v2] drm/i915/selftests: Exercise potential false lite-restore
2019-10-01 12:43 ` [PATCH v2] " Chris Wilson
@ 2019-10-01 12:59 ` Tvrtko Ursulin
2019-10-01 13:08 ` Chris Wilson
0 siblings, 1 reply; 25+ messages in thread
From: Tvrtko Ursulin @ 2019-10-01 12:59 UTC (permalink / raw)
To: Chris Wilson, intel-gfx
On 01/10/2019 13:43, Chris Wilson wrote:
> If execlists's lite-restore is based on the common GEM context tag
> rather than the per-intel_context LRCA, then a context switch between
> two intel_contexts on the same engine derived from the same GEM context
> will perform a lite-restore instead of a full context switch. We can
> exploit this by poisoning the ringbuffer of the first context and trying
> to trick a simple RING_TAIL update (i.e. lite-restore)
>
> v2: Also check what happens if preempt ce[0] with ce[1] (both instances
> on the same engine from the same parent context) [Tvrtko]
>
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
> ---
> drivers/gpu/drm/i915/gt/selftest_lrc.c | 173 +++++++++++++++++++++++++
> 1 file changed, 173 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/gt/selftest_lrc.c b/drivers/gpu/drm/i915/gt/selftest_lrc.c
> index 93f2fcdc49bf..de498c38a006 100644
> --- a/drivers/gpu/drm/i915/gt/selftest_lrc.c
> +++ b/drivers/gpu/drm/i915/gt/selftest_lrc.c
> @@ -79,6 +79,177 @@ static int live_sanitycheck(void *arg)
> return err;
> }
>
> +static int live_unlite_restore(struct drm_i915_private *i915, int prio)
> +{
> + struct intel_engine_cs *engine;
> + struct i915_gem_context *ctx;
> + enum intel_engine_id id;
> + intel_wakeref_t wakeref;
> + struct igt_spinner spin;
> + int err = -ENOMEM;
> +
> + /*
> + * Check that we can correctly context switch between 2 instances
> + * on the same engine from the same parent context.
> + */
> +
> + mutex_lock(&i915->drm.struct_mutex);
> + wakeref = intel_runtime_pm_get(&i915->runtime_pm);
> +
> + if (igt_spinner_init(&spin, &i915->gt))
> + goto err_unlock;
> +
> + ctx = kernel_context(i915);
> + if (!ctx)
> + goto err_spin;
> +
> + err = 0;
> + for_each_engine(engine, i915, id) {
> + struct intel_context *ce[2] = {};
> + struct i915_request *rq[2];
> + struct igt_live_test t;
> + int n;
> +
> + if (prio && !intel_engine_has_preemption(engine))
> + continue;
> +
> + if (!intel_engine_can_store_dword(engine))
> + continue;
> +
> + if (igt_live_test_begin(&t, i915, __func__, engine->name)) {
> + err = -EIO;
> + break;
> + }
> +
> + for (n = 0; n < ARRAY_SIZE(ce); n++) {
> + struct intel_context *tmp;
> +
> + tmp = intel_context_create(ctx, engine);
> + if (IS_ERR(tmp)) {
> + err = PTR_ERR(tmp);
> + goto err_ce;
> + }
> +
> + err = intel_context_pin(tmp);
> + if (err) {
> + intel_context_put(tmp);
> + goto err_ce;
> + }
> +
> + /*
> + * Setup the pair of contexts such that if we
> + * lite-restore using the RING_TAIL from ce[1] it
> + * will execute garbage from ce[0]->ring.
> + */
> + memset(tmp->ring->vaddr,
> + POISON_INUSE, /* IPEHR: 0x5a5a5a5a [hung!] */
> + tmp->ring->vma->size);
> +
> + ce[n] = tmp;
> + }
> + intel_ring_reset(ce[1]->ring, ce[1]->ring->vma->size / 2);
> + __execlists_update_reg_state(ce[1], engine);
> +
> + rq[0] = igt_spinner_create_request(&spin, ce[0], MI_ARB_CHECK);
> + if (IS_ERR(rq[0])) {
> + err = PTR_ERR(rq[0]);
> + goto err_ce;
> + }
> +
> + GEM_BUG_ON(rq[0]->tail > ce[1]->ring->emit);
> + i915_request_get(rq[0]);
> + i915_request_add(rq[0]);
> +
> + if (!igt_wait_for_spinner(&spin, rq[0])) {
> + i915_request_put(rq[0]);
> + goto err_ce;
> + }
> +
> + rq[1] = i915_request_create(ce[1]);
> + if (IS_ERR(rq[1])) {
> + err = PTR_ERR(rq[1]);
> + i915_request_put(rq[0]);
> + goto err_ce;
> + }
> + GEM_BUG_ON(rq[1]->tail <= rq[0]->tail);
> +
> + if (!prio) {
> + /*
> + * Ensure we do the switch to ce[1] on completion.
> + *
> + * rq[0] is already submitted, so this should reduce
> + * to a no-op (a wait on a request on the same engine
> + * uses the submit fence, not the completion fence),
> + * but it will install a dependency on rq[1] for rq[0]
> + * that will prevent the pair being reordered by
> + * timeslicing.
> + */
> + i915_request_await_dma_fence(rq[1], &rq[0]->fence);
> + }
> + i915_request_put(rq[0]);
> +
> + i915_request_get(rq[1]);
> + i915_request_add(rq[1]);
> +
> + if (prio) {
> + struct i915_sched_attr attr = {
> + .priority = prio,
> + };
> +
> + /* Alternatively preempt the spinner with ce[1] */
> + engine->schedule(rq[1], &attr);
> + }
> +
> + /* And switch back to ce[0] for good measure */
> + rq[0] = i915_request_create(ce[0]);
> + if (IS_ERR(rq[0])) {
> + err = PTR_ERR(rq[0]);
> + i915_request_put(rq[1]);
> + goto err_ce;
> + }
> + GEM_BUG_ON(rq[0]->tail > rq[1]->tail);
> +
> + i915_request_await_dma_fence(rq[0], &rq[1]->fence);
> + i915_request_put(rq[1]);
> +
> + i915_request_add(rq[0]);
> +
> +err_ce:
> + tasklet_kill(&engine->execlists.tasklet); /* flush submission */
Is this really needed, why?
> + igt_spinner_end(&spin);
> + for (n = 0; n < ARRAY_SIZE(ce); n++) {
> + if (IS_ERR_OR_NULL(ce[n]))
> + break;
> +
> + intel_context_unpin(ce[n]);
> + intel_context_put(ce[n]);
> + }
> +
> + if (igt_live_test_end(&t))
> + err = -EIO;
> + if (err)
> + break;
> + }
> +
> + kernel_context_close(ctx);
> +err_spin:
> + igt_spinner_fini(&spin);
> +err_unlock:
> + intel_runtime_pm_put(&i915->runtime_pm, wakeref);
> + mutex_unlock(&i915->drm.struct_mutex);
> + return err;
> +}
> +
> +static int live_unlite_switch(void *arg)
> +{
> + return live_unlite_restore(arg, 0);
> +}
> +
> +static int live_unlite_preempt(void *arg)
> +{
> + return live_unlite_restore(arg, I915_USER_PRIORITY(I915_PRIORITY_MAX));
> +}
> +
> static int
> emit_semaphore_chain(struct i915_request *rq, struct i915_vma *vma, int idx)
> {
> @@ -2178,6 +2349,8 @@ int intel_execlists_live_selftests(struct drm_i915_private *i915)
> {
> static const struct i915_subtest tests[] = {
> SUBTEST(live_sanitycheck),
> + SUBTEST(live_unlite_switch),
> + SUBTEST(live_unlite_preempt),
> SUBTEST(live_timeslice_preempt),
> SUBTEST(live_busywait_preempt),
> SUBTEST(live_preempt),
>
Apart from the tasklet_kill head scratcher looks good.
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Regards,
Tvrtko
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 25+ messages in thread
* Re: [PATCH v2] drm/i915/selftests: Exercise potential false lite-restore
2019-10-01 12:59 ` Tvrtko Ursulin
@ 2019-10-01 13:08 ` Chris Wilson
0 siblings, 0 replies; 25+ messages in thread
From: Chris Wilson @ 2019-10-01 13:08 UTC (permalink / raw)
To: Tvrtko Ursulin, intel-gfx
Quoting Tvrtko Ursulin (2019-10-01 13:59:14)
>
> On 01/10/2019 13:43, Chris Wilson wrote:
> > + tasklet_kill(&engine->execlists.tasklet); /* flush submission */
>
> Is this really needed, why?
In a pathological case where we are using the tasklet (e.g. preemption
and ksoftirqd active), it would then be possible for the spinner to
complete (thanks to the igt_spinner_end below) before we process the
preemption request (thus we would not perform a preemption request). Now
it may still complete before the HW has a chance to process the ELSP
submit, but that risk feels less likely. (We would need to wait on
!execlists->pending with a timeout to be sure.)
tasklet_kill() is
while tasklet is queued and not run:
yield();
I think we need only the one flush as we only really care about the
first available execlists_submit_port that has both ELSP filled to check
for a possible lite-restore between the different contexts.
-Chris
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^ permalink raw reply [flat|nested] 25+ messages in thread
* [PATCH v2] drm/i915/selftests: Exercise potential false lite-restore
2019-10-01 9:45 [PATCH] drm/i915/selftests: Exercise potential false lite-restore Chris Wilson
2019-10-01 9:51 ` Chris Wilson
2019-10-01 12:43 ` [PATCH v2] " Chris Wilson
@ 2019-10-01 15:53 ` Chris Wilson
2019-10-01 21:10 ` [PATCH v3] " Chris Wilson
` (4 more replies)
2019-10-01 20:30 ` ✗ Fi.CI.CHECKPATCH: warning for drm/i915/selftests: Exercise potential false lite-restore (rev4) Patchwork
` (10 subsequent siblings)
13 siblings, 5 replies; 25+ messages in thread
From: Chris Wilson @ 2019-10-01 15:53 UTC (permalink / raw)
To: intel-gfx
If execlists's lite-restore is based on the common GEM context tag
rather than the per-intel_context LRCA, then a context switch between
two intel_contexts on the same engine derived from the same GEM context
will perform a lite-restore instead of a full context switch. We can
exploit this by poisoning the ringbuffer of the first context and trying
to trick a simple RING_TAIL update (i.e. lite-restore)
v2: Also check what happens if preempt ce[0] with ce[1] (both instances
on the same engine from the same parent context) [Tvrtko]
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
---
Fixup GEM_BUG_ON to look at rq->tail only after it is set!
---
drivers/gpu/drm/i915/gt/selftest_lrc.c | 174 +++++++++++++++++++++++++
1 file changed, 174 insertions(+)
diff --git a/drivers/gpu/drm/i915/gt/selftest_lrc.c b/drivers/gpu/drm/i915/gt/selftest_lrc.c
index 93f2fcdc49bf..f4d6a1b734ae 100644
--- a/drivers/gpu/drm/i915/gt/selftest_lrc.c
+++ b/drivers/gpu/drm/i915/gt/selftest_lrc.c
@@ -79,6 +79,178 @@ static int live_sanitycheck(void *arg)
return err;
}
+static int live_unlite_restore(struct drm_i915_private *i915, int prio)
+{
+ struct intel_engine_cs *engine;
+ struct i915_gem_context *ctx;
+ enum intel_engine_id id;
+ intel_wakeref_t wakeref;
+ struct igt_spinner spin;
+ int err = -ENOMEM;
+
+ /*
+ * Check that we can correctly context switch between 2 instances
+ * on the same engine from the same parent context.
+ */
+
+ mutex_lock(&i915->drm.struct_mutex);
+ wakeref = intel_runtime_pm_get(&i915->runtime_pm);
+
+ if (igt_spinner_init(&spin, &i915->gt))
+ goto err_unlock;
+
+ ctx = kernel_context(i915);
+ if (!ctx)
+ goto err_spin;
+
+ err = 0;
+ for_each_engine(engine, i915, id) {
+ struct intel_context *ce[2] = {};
+ struct i915_request *rq[2];
+ struct igt_live_test t;
+ int n;
+
+ if (prio && !intel_engine_has_preemption(engine))
+ continue;
+
+ if (!intel_engine_can_store_dword(engine))
+ continue;
+
+ if (igt_live_test_begin(&t, i915, __func__, engine->name)) {
+ err = -EIO;
+ break;
+ }
+
+ for (n = 0; n < ARRAY_SIZE(ce); n++) {
+ struct intel_context *tmp;
+
+ tmp = intel_context_create(ctx, engine);
+ if (IS_ERR(tmp)) {
+ err = PTR_ERR(tmp);
+ goto err_ce;
+ }
+
+ err = intel_context_pin(tmp);
+ if (err) {
+ intel_context_put(tmp);
+ goto err_ce;
+ }
+
+ /*
+ * Setup the pair of contexts such that if we
+ * lite-restore using the RING_TAIL from ce[1] it
+ * will execute garbage from ce[0]->ring.
+ */
+ memset(tmp->ring->vaddr,
+ POISON_INUSE, /* IPEHR: 0x5a5a5a5a [hung!] */
+ tmp->ring->vma->size);
+
+ ce[n] = tmp;
+ }
+ GEM_BUG_ON(!ce[1]->ring->size);
+ intel_ring_reset(ce[1]->ring, ce[1]->ring->size / 2);
+ __execlists_update_reg_state(ce[1], engine);
+
+
+ rq[0] = igt_spinner_create_request(&spin, ce[0], MI_ARB_CHECK);
+ if (IS_ERR(rq[0])) {
+ err = PTR_ERR(rq[0]);
+ goto err_ce;
+ }
+
+ i915_request_get(rq[0]);
+ i915_request_add(rq[0]);
+ GEM_BUG_ON(rq[0]->tail > ce[1]->ring->emit);
+
+ if (!igt_wait_for_spinner(&spin, rq[0])) {
+ i915_request_put(rq[0]);
+ goto err_ce;
+ }
+
+ rq[1] = i915_request_create(ce[1]);
+ if (IS_ERR(rq[1])) {
+ err = PTR_ERR(rq[1]);
+ i915_request_put(rq[0]);
+ goto err_ce;
+ }
+
+ if (!prio) {
+ /*
+ * Ensure we do the switch to ce[1] on completion.
+ *
+ * rq[0] is already submitted, so this should reduce
+ * to a no-op (a wait on a request on the same engine
+ * uses the submit fence, not the completion fence),
+ * but it will install a dependency on rq[1] for rq[0]
+ * that will prevent the pair being reordered by
+ * timeslicing.
+ */
+ i915_request_await_dma_fence(rq[1], &rq[0]->fence);
+ }
+
+ i915_request_get(rq[1]);
+ i915_request_add(rq[1]);
+ GEM_BUG_ON(rq[1]->tail <= rq[0]->tail);
+ i915_request_put(rq[0]);
+
+ if (prio) {
+ struct i915_sched_attr attr = {
+ .priority = prio,
+ };
+
+ /* Alternatively preempt the spinner with ce[1] */
+ engine->schedule(rq[1], &attr);
+ }
+
+ /* And switch back to ce[0] for good measure */
+ rq[0] = i915_request_create(ce[0]);
+ if (IS_ERR(rq[0])) {
+ err = PTR_ERR(rq[0]);
+ i915_request_put(rq[1]);
+ goto err_ce;
+ }
+
+ i915_request_await_dma_fence(rq[0], &rq[1]->fence);
+ i915_request_add(rq[0]);
+ GEM_BUG_ON(rq[0]->tail > rq[1]->tail);
+ i915_request_put(rq[1]);
+
+err_ce:
+ tasklet_kill(&engine->execlists.tasklet); /* flush submission */
+ igt_spinner_end(&spin);
+ for (n = 0; n < ARRAY_SIZE(ce); n++) {
+ if (IS_ERR_OR_NULL(ce[n]))
+ break;
+
+ intel_context_unpin(ce[n]);
+ intel_context_put(ce[n]);
+ }
+
+ if (igt_live_test_end(&t))
+ err = -EIO;
+ if (err)
+ break;
+ }
+
+ kernel_context_close(ctx);
+err_spin:
+ igt_spinner_fini(&spin);
+err_unlock:
+ intel_runtime_pm_put(&i915->runtime_pm, wakeref);
+ mutex_unlock(&i915->drm.struct_mutex);
+ return err;
+}
+
+static int live_unlite_switch(void *arg)
+{
+ return live_unlite_restore(arg, 0);
+}
+
+static int live_unlite_preempt(void *arg)
+{
+ return live_unlite_restore(arg, I915_USER_PRIORITY(I915_PRIORITY_MAX));
+}
+
static int
emit_semaphore_chain(struct i915_request *rq, struct i915_vma *vma, int idx)
{
@@ -2178,6 +2350,8 @@ int intel_execlists_live_selftests(struct drm_i915_private *i915)
{
static const struct i915_subtest tests[] = {
SUBTEST(live_sanitycheck),
+ SUBTEST(live_unlite_switch),
+ SUBTEST(live_unlite_preempt),
SUBTEST(live_timeslice_preempt),
SUBTEST(live_busywait_preempt),
SUBTEST(live_preempt),
--
2.23.0
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 25+ messages in thread
* ✗ Fi.CI.CHECKPATCH: warning for drm/i915/selftests: Exercise potential false lite-restore (rev4)
2019-10-01 9:45 [PATCH] drm/i915/selftests: Exercise potential false lite-restore Chris Wilson
` (2 preceding siblings ...)
2019-10-01 15:53 ` Chris Wilson
@ 2019-10-01 20:30 ` Patchwork
2019-10-01 20:57 ` ✗ Fi.CI.BAT: failure " Patchwork
` (9 subsequent siblings)
13 siblings, 0 replies; 25+ messages in thread
From: Patchwork @ 2019-10-01 20:30 UTC (permalink / raw)
To: Chris Wilson; +Cc: intel-gfx
== Series Details ==
Series: drm/i915/selftests: Exercise potential false lite-restore (rev4)
URL : https://patchwork.freedesktop.org/series/67438/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
d13633b978e3 drm/i915/selftests: Exercise potential false lite-restore
-:100: CHECK:LINE_SPACING: Please don't use multiple blank lines
#100: FILE: drivers/gpu/drm/i915/gt/selftest_lrc.c:154:
+
+
total: 0 errors, 0 warnings, 1 checks, 186 lines checked
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 25+ messages in thread
* ✗ Fi.CI.BAT: failure for drm/i915/selftests: Exercise potential false lite-restore (rev4)
2019-10-01 9:45 [PATCH] drm/i915/selftests: Exercise potential false lite-restore Chris Wilson
` (3 preceding siblings ...)
2019-10-01 20:30 ` ✗ Fi.CI.CHECKPATCH: warning for drm/i915/selftests: Exercise potential false lite-restore (rev4) Patchwork
@ 2019-10-01 20:57 ` Patchwork
2019-10-01 23:45 ` ✗ Fi.CI.CHECKPATCH: warning for drm/i915/selftests: Exercise potential false lite-restore (rev5) Patchwork
` (8 subsequent siblings)
13 siblings, 0 replies; 25+ messages in thread
From: Patchwork @ 2019-10-01 20:57 UTC (permalink / raw)
To: Chris Wilson; +Cc: intel-gfx
== Series Details ==
Series: drm/i915/selftests: Exercise potential false lite-restore (rev4)
URL : https://patchwork.freedesktop.org/series/67438/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_6986 -> Patchwork_14616
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with Patchwork_14616 absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_14616, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14616/index.html
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in Patchwork_14616:
### IGT changes ###
#### Possible regressions ####
* igt@i915_selftest@live_execlists:
- fi-cfl-8700k: [PASS][1] -> [DMESG-WARN][2]
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6986/fi-cfl-8700k/igt@i915_selftest@live_execlists.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14616/fi-cfl-8700k/igt@i915_selftest@live_execlists.html
- fi-bdw-gvtdvm: [PASS][3] -> [DMESG-WARN][4]
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6986/fi-bdw-gvtdvm/igt@i915_selftest@live_execlists.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14616/fi-bdw-gvtdvm/igt@i915_selftest@live_execlists.html
- fi-skl-guc: [PASS][5] -> [INCOMPLETE][6]
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6986/fi-skl-guc/igt@i915_selftest@live_execlists.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14616/fi-skl-guc/igt@i915_selftest@live_execlists.html
- fi-cfl-guc: [PASS][7] -> [DMESG-WARN][8]
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6986/fi-cfl-guc/igt@i915_selftest@live_execlists.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14616/fi-cfl-guc/igt@i915_selftest@live_execlists.html
- fi-skl-iommu: [PASS][9] -> [INCOMPLETE][10]
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6986/fi-skl-iommu/igt@i915_selftest@live_execlists.html
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14616/fi-skl-iommu/igt@i915_selftest@live_execlists.html
- fi-whl-u: [PASS][11] -> [DMESG-WARN][12]
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6986/fi-whl-u/igt@i915_selftest@live_execlists.html
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14616/fi-whl-u/igt@i915_selftest@live_execlists.html
- fi-kbl-7500u: [PASS][13] -> [DMESG-WARN][14]
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6986/fi-kbl-7500u/igt@i915_selftest@live_execlists.html
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14616/fi-kbl-7500u/igt@i915_selftest@live_execlists.html
- fi-kbl-guc: [PASS][15] -> [DMESG-WARN][16]
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6986/fi-kbl-guc/igt@i915_selftest@live_execlists.html
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14616/fi-kbl-guc/igt@i915_selftest@live_execlists.html
- fi-kbl-8809g: [PASS][17] -> [DMESG-WARN][18]
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6986/fi-kbl-8809g/igt@i915_selftest@live_execlists.html
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14616/fi-kbl-8809g/igt@i915_selftest@live_execlists.html
- fi-glk-dsi: [PASS][19] -> [DMESG-WARN][20]
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6986/fi-glk-dsi/igt@i915_selftest@live_execlists.html
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14616/fi-glk-dsi/igt@i915_selftest@live_execlists.html
- fi-kbl-x1275: [PASS][21] -> [DMESG-WARN][22]
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6986/fi-kbl-x1275/igt@i915_selftest@live_execlists.html
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14616/fi-kbl-x1275/igt@i915_selftest@live_execlists.html
- fi-skl-6600u: [PASS][23] -> [DMESG-WARN][24]
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6986/fi-skl-6600u/igt@i915_selftest@live_execlists.html
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14616/fi-skl-6600u/igt@i915_selftest@live_execlists.html
- fi-bsw-n3050: [PASS][25] -> [DMESG-WARN][26]
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6986/fi-bsw-n3050/igt@i915_selftest@live_execlists.html
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14616/fi-bsw-n3050/igt@i915_selftest@live_execlists.html
- fi-bsw-kefka: [PASS][27] -> [DMESG-WARN][28]
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6986/fi-bsw-kefka/igt@i915_selftest@live_execlists.html
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14616/fi-bsw-kefka/igt@i915_selftest@live_execlists.html
- fi-bxt-dsi: [PASS][29] -> [DMESG-WARN][30]
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6986/fi-bxt-dsi/igt@i915_selftest@live_execlists.html
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14616/fi-bxt-dsi/igt@i915_selftest@live_execlists.html
- fi-skl-6700k2: [PASS][31] -> [DMESG-WARN][32]
[31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6986/fi-skl-6700k2/igt@i915_selftest@live_execlists.html
[32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14616/fi-skl-6700k2/igt@i915_selftest@live_execlists.html
- fi-skl-6260u: [PASS][33] -> [DMESG-WARN][34]
[33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6986/fi-skl-6260u/igt@i915_selftest@live_execlists.html
[34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14616/fi-skl-6260u/igt@i915_selftest@live_execlists.html
- fi-bdw-5557u: [PASS][35] -> [DMESG-WARN][36]
[35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6986/fi-bdw-5557u/igt@i915_selftest@live_execlists.html
[36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14616/fi-bdw-5557u/igt@i915_selftest@live_execlists.html
- fi-kbl-r: [PASS][37] -> [DMESG-WARN][38]
[37]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6986/fi-kbl-r/igt@i915_selftest@live_execlists.html
[38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14616/fi-kbl-r/igt@i915_selftest@live_execlists.html
- fi-skl-lmem: [PASS][39] -> [DMESG-WARN][40]
[39]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6986/fi-skl-lmem/igt@i915_selftest@live_execlists.html
[40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14616/fi-skl-lmem/igt@i915_selftest@live_execlists.html
- fi-cfl-8109u: [PASS][41] -> [DMESG-WARN][42]
[41]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6986/fi-cfl-8109u/igt@i915_selftest@live_execlists.html
[42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14616/fi-cfl-8109u/igt@i915_selftest@live_execlists.html
* igt@runner@aborted:
- fi-bdw-gvtdvm: NOTRUN -> [FAIL][43]
[43]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14616/fi-bdw-gvtdvm/igt@runner@aborted.html
- fi-cfl-8109u: NOTRUN -> [FAIL][44]
[44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14616/fi-cfl-8109u/igt@runner@aborted.html
- fi-kbl-7500u: NOTRUN -> [FAIL][45]
[45]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14616/fi-kbl-7500u/igt@runner@aborted.html
- fi-whl-u: NOTRUN -> [FAIL][46]
[46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14616/fi-whl-u/igt@runner@aborted.html
- fi-cml-u2: NOTRUN -> [FAIL][47]
[47]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14616/fi-cml-u2/igt@runner@aborted.html
- fi-bxt-dsi: NOTRUN -> [FAIL][48]
[48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14616/fi-bxt-dsi/igt@runner@aborted.html
- fi-kbl-x1275: NOTRUN -> [FAIL][49]
[49]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14616/fi-kbl-x1275/igt@runner@aborted.html
- fi-cfl-8700k: NOTRUN -> [FAIL][50]
[50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14616/fi-cfl-8700k/igt@runner@aborted.html
- fi-kbl-8809g: NOTRUN -> [FAIL][51]
[51]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14616/fi-kbl-8809g/igt@runner@aborted.html
- fi-kbl-r: NOTRUN -> [FAIL][52]
[52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14616/fi-kbl-r/igt@runner@aborted.html
- fi-bdw-5557u: NOTRUN -> [FAIL][53]
[53]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14616/fi-bdw-5557u/igt@runner@aborted.html
#### Suppressed ####
The following results come from untrusted machines, tests, or statuses.
They do not affect the overall result.
* igt@i915_selftest@live_execlists:
- {fi-cml-s}: [PASS][54] -> [DMESG-WARN][55]
[54]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6986/fi-cml-s/igt@i915_selftest@live_execlists.html
[55]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14616/fi-cml-s/igt@i915_selftest@live_execlists.html
- {fi-icl-u4}: [PASS][56] -> [DMESG-WARN][57]
[56]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6986/fi-icl-u4/igt@i915_selftest@live_execlists.html
[57]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14616/fi-icl-u4/igt@i915_selftest@live_execlists.html
* igt@runner@aborted:
- {fi-cml-s}: NOTRUN -> [FAIL][58]
[58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14616/fi-cml-s/igt@runner@aborted.html
Known issues
------------
Here are the changes found in Patchwork_14616 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_flink_basic@double-flink:
- fi-icl-u3: [PASS][59] -> [DMESG-WARN][60] ([fdo#107724]) +1 similar issue
[59]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6986/fi-icl-u3/igt@gem_flink_basic@double-flink.html
[60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14616/fi-icl-u3/igt@gem_flink_basic@double-flink.html
* igt@i915_selftest@live_execlists:
- fi-icl-u2: [PASS][61] -> [INCOMPLETE][62] ([fdo#107713])
[61]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6986/fi-icl-u2/igt@i915_selftest@live_execlists.html
[62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14616/fi-icl-u2/igt@i915_selftest@live_execlists.html
- fi-icl-u3: [PASS][63] -> [INCOMPLETE][64] ([fdo#107713])
[63]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6986/fi-icl-u3/igt@i915_selftest@live_execlists.html
[64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14616/fi-icl-u3/igt@i915_selftest@live_execlists.html
- fi-cml-u2: [PASS][65] -> [INCOMPLETE][66] ([fdo#110566])
[65]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6986/fi-cml-u2/igt@i915_selftest@live_execlists.html
[66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14616/fi-cml-u2/igt@i915_selftest@live_execlists.html
#### Possible fixes ####
* igt@gem_linear_blits@basic:
- fi-icl-u3: [DMESG-WARN][67] ([fdo#107724]) -> [PASS][68]
[67]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6986/fi-icl-u3/igt@gem_linear_blits@basic.html
[68]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14616/fi-icl-u3/igt@gem_linear_blits@basic.html
* igt@i915_module_load@reload:
- fi-icl-u3: [DMESG-WARN][69] ([fdo#107724] / [fdo#111214]) -> [PASS][70]
[69]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6986/fi-icl-u3/igt@i915_module_load@reload.html
[70]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14616/fi-icl-u3/igt@i915_module_load@reload.html
#### Warnings ####
* igt@kms_chamelium@hdmi-hpd-fast:
- fi-kbl-7500u: [FAIL][71] ([fdo#111407]) -> [FAIL][72] ([fdo#111045] / [fdo#111096])
[71]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6986/fi-kbl-7500u/igt@kms_chamelium@hdmi-hpd-fast.html
[72]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14616/fi-kbl-7500u/igt@kms_chamelium@hdmi-hpd-fast.html
* igt@kms_chamelium@vga-edid-read:
- fi-icl-u2: [SKIP][73] ([fdo#109309]) -> [FAIL][74] ([fdo#109483])
[73]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6986/fi-icl-u2/igt@kms_chamelium@vga-edid-read.html
[74]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14616/fi-icl-u2/igt@kms_chamelium@vga-edid-read.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713
[fdo#107724]: https://bugs.freedesktop.org/show_bug.cgi?id=107724
[fdo#109100]: https://bugs.freedesktop.org/show_bug.cgi?id=109100
[fdo#109309]: https://bugs.freedesktop.org/show_bug.cgi?id=109309
[fdo#109483]: https://bugs.freedesktop.org/show_bug.cgi?id=109483
[fdo#110566]: https://bugs.freedesktop.org/show_bug.cgi?id=110566
[fdo#111045]: https://bugs.freedesktop.org/show_bug.cgi?id=111045
[fdo#111096]: https://bugs.freedesktop.org/show_bug.cgi?id=111096
[fdo#111214]: https://bugs.freedesktop.org/show_bug.cgi?id=111214
[fdo#111407]: https://bugs.freedesktop.org/show_bug.cgi?id=111407
[fdo#111647]: https://bugs.freedesktop.org/show_bug.cgi?id=111647
[fdo#111867]: https://bugs.freedesktop.org/show_bug.cgi?id=111867
Participating hosts (54 -> 44)
------------------------------
Missing (10): fi-kbl-soraka fi-ilk-m540 fi-cml-h fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-bwr-2160 fi-icl-y fi-byt-clapper fi-bdw-samus
Build changes
-------------
* CI: CI-20190529 -> None
* Linux: CI_DRM_6986 -> Patchwork_14616
CI-20190529: 20190529
CI_DRM_6986: 9300459553e8c1032f10ec1953e1a375a99aba13 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_5208: c0131b4f132acf287d9d05b0f5078003d3159e1c @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_14616: d13633b978e32e17cd2f0add4998907b7720179b @ git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
d13633b978e3 drm/i915/selftests: Exercise potential false lite-restore
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14616/index.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 25+ messages in thread
* [PATCH v3] drm/i915/selftests: Exercise potential false lite-restore
2019-10-01 15:53 ` Chris Wilson
@ 2019-10-01 21:10 ` Chris Wilson
2019-10-02 7:35 ` Chris Wilson
` (3 subsequent siblings)
4 siblings, 0 replies; 25+ messages in thread
From: Chris Wilson @ 2019-10-01 21:10 UTC (permalink / raw)
To: intel-gfx
If execlists's lite-restore is based on the common GEM context tag
rather than the per-intel_context LRCA, then a context switch between
two intel_contexts on the same engine derived from the same GEM context
will perform a lite-restore instead of a full context switch. We can
exploit this by poisoning the ringbuffer of the first context and trying
to trick a simple RING_TAIL update (i.e. lite-restore)
v2: Also check what happens if preempt ce[0] with ce[1] (both instances
on the same engine from the same parent context) [Tvrtko]
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
---
Mark up the context image adjustment to appease lockdep
---
drivers/gpu/drm/i915/gt/intel_lrc.c | 18 ++-
drivers/gpu/drm/i915/gt/selftest_lrc.c | 176 +++++++++++++++++++++++++
2 files changed, 190 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_lrc.c b/drivers/gpu/drm/i915/gt/intel_lrc.c
index 9877b6ba13df..2cef06be3882 100644
--- a/drivers/gpu/drm/i915/gt/intel_lrc.c
+++ b/drivers/gpu/drm/i915/gt/intel_lrc.c
@@ -235,6 +235,16 @@ static void execlists_init_reg_state(u32 *reg_state,
const struct intel_ring *ring,
bool close);
+static void __context_pin_acquire(struct intel_context *ce)
+{
+ mutex_acquire(&ce->pin_mutex.dep_map, 2, 0, _RET_IP_);
+}
+
+static void __context_pin_release(struct intel_context *ce)
+{
+ mutex_release(&ce->pin_mutex.dep_map, 0, _RET_IP_);
+}
+
static void mark_eio(struct i915_request *rq)
{
if (!i915_request_signaled(rq))
@@ -2761,7 +2771,7 @@ static void __execlists_reset(struct intel_engine_cs *engine, bool stalled)
GEM_BUG_ON(!i915_vma_is_pinned(ce->state));
/* Proclaim we have exclusive access to the context image! */
- mutex_acquire(&ce->pin_mutex.dep_map, 2, 0, _THIS_IP_);
+ __context_pin_acquire(ce);
rq = active_request(rq);
if (!rq) {
@@ -2825,7 +2835,7 @@ static void __execlists_reset(struct intel_engine_cs *engine, bool stalled)
__execlists_reset_reg_state(ce, engine);
__execlists_update_reg_state(ce, engine);
ce->lrc_desc |= CTX_DESC_FORCE_RESTORE; /* paranoid: GPU was reset! */
- mutex_release(&ce->pin_mutex.dep_map, 0, _THIS_IP_);
+ __context_pin_release(ce);
unwind:
/* Push back any incomplete requests for replay after the reset. */
@@ -4439,7 +4449,7 @@ void intel_lr_context_reset(struct intel_engine_cs *engine,
bool scrub)
{
GEM_BUG_ON(!intel_context_is_pinned(ce));
- mutex_acquire(&ce->pin_mutex.dep_map, 2, 0, _THIS_IP_);
+ __context_pin_acquire(ce);
/*
* We want a simple context + ring to execute the breadcrumb update.
@@ -4465,7 +4475,7 @@ void intel_lr_context_reset(struct intel_engine_cs *engine,
intel_ring_update_space(ce->ring);
__execlists_update_reg_state(ce, engine);
- mutex_release(&ce->pin_mutex.dep_map, 0, _THIS_IP_);
+ __context_pin_release(ce);
}
#if IS_ENABLED(CONFIG_DRM_I915_SELFTEST)
diff --git a/drivers/gpu/drm/i915/gt/selftest_lrc.c b/drivers/gpu/drm/i915/gt/selftest_lrc.c
index 93f2fcdc49bf..5936f46eeb08 100644
--- a/drivers/gpu/drm/i915/gt/selftest_lrc.c
+++ b/drivers/gpu/drm/i915/gt/selftest_lrc.c
@@ -79,6 +79,180 @@ static int live_sanitycheck(void *arg)
return err;
}
+static int live_unlite_restore(struct drm_i915_private *i915, int prio)
+{
+ struct intel_engine_cs *engine;
+ struct i915_gem_context *ctx;
+ enum intel_engine_id id;
+ intel_wakeref_t wakeref;
+ struct igt_spinner spin;
+ int err = -ENOMEM;
+
+ /*
+ * Check that we can correctly context switch between 2 instances
+ * on the same engine from the same parent context.
+ */
+
+ mutex_lock(&i915->drm.struct_mutex);
+ wakeref = intel_runtime_pm_get(&i915->runtime_pm);
+
+ if (igt_spinner_init(&spin, &i915->gt))
+ goto err_unlock;
+
+ ctx = kernel_context(i915);
+ if (!ctx)
+ goto err_spin;
+
+ err = 0;
+ for_each_engine(engine, i915, id) {
+ struct intel_context *ce[2] = {};
+ struct i915_request *rq[2];
+ struct igt_live_test t;
+ int n;
+
+ if (prio && !intel_engine_has_preemption(engine))
+ continue;
+
+ if (!intel_engine_can_store_dword(engine))
+ continue;
+
+ if (igt_live_test_begin(&t, i915, __func__, engine->name)) {
+ err = -EIO;
+ break;
+ }
+
+ for (n = 0; n < ARRAY_SIZE(ce); n++) {
+ struct intel_context *tmp;
+
+ tmp = intel_context_create(ctx, engine);
+ if (IS_ERR(tmp)) {
+ err = PTR_ERR(tmp);
+ goto err_ce;
+ }
+
+ err = intel_context_pin(tmp);
+ if (err) {
+ intel_context_put(tmp);
+ goto err_ce;
+ }
+
+ /*
+ * Setup the pair of contexts such that if we
+ * lite-restore using the RING_TAIL from ce[1] it
+ * will execute garbage from ce[0]->ring.
+ */
+ memset(tmp->ring->vaddr,
+ POISON_INUSE, /* IPEHR: 0x5a5a5a5a [hung!] */
+ tmp->ring->vma->size);
+
+ ce[n] = tmp;
+ }
+ GEM_BUG_ON(!ce[1]->ring->size);
+ intel_ring_reset(ce[1]->ring, ce[1]->ring->size / 2);
+
+ __context_pin_acquire(ce[1]);
+ __execlists_update_reg_state(ce[1], engine);
+ __context_pin_release(ce[1]);
+
+ rq[0] = igt_spinner_create_request(&spin, ce[0], MI_ARB_CHECK);
+ if (IS_ERR(rq[0])) {
+ err = PTR_ERR(rq[0]);
+ goto err_ce;
+ }
+
+ i915_request_get(rq[0]);
+ i915_request_add(rq[0]);
+ GEM_BUG_ON(rq[0]->tail > ce[1]->ring->emit);
+
+ if (!igt_wait_for_spinner(&spin, rq[0])) {
+ i915_request_put(rq[0]);
+ goto err_ce;
+ }
+
+ rq[1] = i915_request_create(ce[1]);
+ if (IS_ERR(rq[1])) {
+ err = PTR_ERR(rq[1]);
+ i915_request_put(rq[0]);
+ goto err_ce;
+ }
+
+ if (!prio) {
+ /*
+ * Ensure we do the switch to ce[1] on completion.
+ *
+ * rq[0] is already submitted, so this should reduce
+ * to a no-op (a wait on a request on the same engine
+ * uses the submit fence, not the completion fence),
+ * but it will install a dependency on rq[1] for rq[0]
+ * that will prevent the pair being reordered by
+ * timeslicing.
+ */
+ i915_request_await_dma_fence(rq[1], &rq[0]->fence);
+ }
+
+ i915_request_get(rq[1]);
+ i915_request_add(rq[1]);
+ GEM_BUG_ON(rq[1]->tail <= rq[0]->tail);
+ i915_request_put(rq[0]);
+
+ if (prio) {
+ struct i915_sched_attr attr = {
+ .priority = prio,
+ };
+
+ /* Alternatively preempt the spinner with ce[1] */
+ engine->schedule(rq[1], &attr);
+ }
+
+ /* And switch back to ce[0] for good measure */
+ rq[0] = i915_request_create(ce[0]);
+ if (IS_ERR(rq[0])) {
+ err = PTR_ERR(rq[0]);
+ i915_request_put(rq[1]);
+ goto err_ce;
+ }
+
+ i915_request_await_dma_fence(rq[0], &rq[1]->fence);
+ i915_request_add(rq[0]);
+ GEM_BUG_ON(rq[0]->tail > rq[1]->tail);
+ i915_request_put(rq[1]);
+
+err_ce:
+ tasklet_kill(&engine->execlists.tasklet); /* flush submission */
+ igt_spinner_end(&spin);
+ for (n = 0; n < ARRAY_SIZE(ce); n++) {
+ if (IS_ERR_OR_NULL(ce[n]))
+ break;
+
+ intel_context_unpin(ce[n]);
+ intel_context_put(ce[n]);
+ }
+
+ if (igt_live_test_end(&t))
+ err = -EIO;
+ if (err)
+ break;
+ }
+
+ kernel_context_close(ctx);
+err_spin:
+ igt_spinner_fini(&spin);
+err_unlock:
+ intel_runtime_pm_put(&i915->runtime_pm, wakeref);
+ mutex_unlock(&i915->drm.struct_mutex);
+ return err;
+}
+
+static int live_unlite_switch(void *arg)
+{
+ return live_unlite_restore(arg, 0);
+}
+
+static int live_unlite_preempt(void *arg)
+{
+ return live_unlite_restore(arg, I915_USER_PRIORITY(I915_PRIORITY_MAX));
+}
+
static int
emit_semaphore_chain(struct i915_request *rq, struct i915_vma *vma, int idx)
{
@@ -2178,6 +2352,8 @@ int intel_execlists_live_selftests(struct drm_i915_private *i915)
{
static const struct i915_subtest tests[] = {
SUBTEST(live_sanitycheck),
+ SUBTEST(live_unlite_switch),
+ SUBTEST(live_unlite_preempt),
SUBTEST(live_timeslice_preempt),
SUBTEST(live_busywait_preempt),
SUBTEST(live_preempt),
--
2.23.0
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 25+ messages in thread
* ✗ Fi.CI.CHECKPATCH: warning for drm/i915/selftests: Exercise potential false lite-restore (rev5)
2019-10-01 9:45 [PATCH] drm/i915/selftests: Exercise potential false lite-restore Chris Wilson
` (4 preceding siblings ...)
2019-10-01 20:57 ` ✗ Fi.CI.BAT: failure " Patchwork
@ 2019-10-01 23:45 ` Patchwork
2019-10-02 0:11 ` ✗ Fi.CI.BAT: failure " Patchwork
` (7 subsequent siblings)
13 siblings, 0 replies; 25+ messages in thread
From: Patchwork @ 2019-10-01 23:45 UTC (permalink / raw)
To: Chris Wilson; +Cc: intel-gfx
== Series Details ==
Series: drm/i915/selftests: Exercise potential false lite-restore (rev5)
URL : https://patchwork.freedesktop.org/series/67438/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
d506cfeafc6e drm/i915/selftests: Exercise potential false lite-restore
-:30: WARNING:LEADING_SPACE: please, no spaces at the start of a line
#30: FILE: drivers/gpu/drm/i915/gt/intel_lrc.c:240:
+ mutex_acquire(&ce->pin_mutex.dep_map, 2, 0, _RET_IP_);$
-:35: WARNING:LEADING_SPACE: please, no spaces at the start of a line
#35: FILE: drivers/gpu/drm/i915/gt/intel_lrc.c:245:
+ mutex_release(&ce->pin_mutex.dep_map, 0, _RET_IP_);$
total: 0 errors, 2 warnings, 0 checks, 236 lines checked
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 25+ messages in thread
* ✗ Fi.CI.BAT: failure for drm/i915/selftests: Exercise potential false lite-restore (rev5)
2019-10-01 9:45 [PATCH] drm/i915/selftests: Exercise potential false lite-restore Chris Wilson
` (5 preceding siblings ...)
2019-10-01 23:45 ` ✗ Fi.CI.CHECKPATCH: warning for drm/i915/selftests: Exercise potential false lite-restore (rev5) Patchwork
@ 2019-10-02 0:11 ` Patchwork
2019-10-02 8:03 ` ✗ Fi.CI.CHECKPATCH: warning for drm/i915/selftests: Exercise potential false lite-restore (rev6) Patchwork
` (6 subsequent siblings)
13 siblings, 0 replies; 25+ messages in thread
From: Patchwork @ 2019-10-02 0:11 UTC (permalink / raw)
To: Chris Wilson; +Cc: intel-gfx
== Series Details ==
Series: drm/i915/selftests: Exercise potential false lite-restore (rev5)
URL : https://patchwork.freedesktop.org/series/67438/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_6986 -> Patchwork_14621
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with Patchwork_14621 absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_14621, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14621/index.html
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in Patchwork_14621:
### IGT changes ###
#### Possible regressions ####
* igt@i915_selftest@live_execlists:
- fi-skl-guc: [PASS][1] -> [INCOMPLETE][2]
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6986/fi-skl-guc/igt@i915_selftest@live_execlists.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14621/fi-skl-guc/igt@i915_selftest@live_execlists.html
- fi-cfl-guc: [PASS][3] -> [DMESG-WARN][4]
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6986/fi-cfl-guc/igt@i915_selftest@live_execlists.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14621/fi-cfl-guc/igt@i915_selftest@live_execlists.html
- fi-skl-iommu: [PASS][5] -> [DMESG-WARN][6]
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6986/fi-skl-iommu/igt@i915_selftest@live_execlists.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14621/fi-skl-iommu/igt@i915_selftest@live_execlists.html
- fi-kbl-guc: [PASS][7] -> [INCOMPLETE][8]
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6986/fi-kbl-guc/igt@i915_selftest@live_execlists.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14621/fi-kbl-guc/igt@i915_selftest@live_execlists.html
- fi-kbl-8809g: [PASS][9] -> [DMESG-WARN][10]
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6986/fi-kbl-8809g/igt@i915_selftest@live_execlists.html
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14621/fi-kbl-8809g/igt@i915_selftest@live_execlists.html
- fi-glk-dsi: [PASS][11] -> [DMESG-WARN][12]
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6986/fi-glk-dsi/igt@i915_selftest@live_execlists.html
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14621/fi-glk-dsi/igt@i915_selftest@live_execlists.html
- fi-kbl-x1275: [PASS][13] -> [DMESG-WARN][14]
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6986/fi-kbl-x1275/igt@i915_selftest@live_execlists.html
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14621/fi-kbl-x1275/igt@i915_selftest@live_execlists.html
- fi-skl-6600u: [PASS][15] -> [DMESG-WARN][16]
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6986/fi-skl-6600u/igt@i915_selftest@live_execlists.html
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14621/fi-skl-6600u/igt@i915_selftest@live_execlists.html
- fi-bxt-dsi: [PASS][17] -> [DMESG-WARN][18]
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6986/fi-bxt-dsi/igt@i915_selftest@live_execlists.html
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14621/fi-bxt-dsi/igt@i915_selftest@live_execlists.html
- fi-skl-6700k2: [PASS][19] -> [DMESG-WARN][20]
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6986/fi-skl-6700k2/igt@i915_selftest@live_execlists.html
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14621/fi-skl-6700k2/igt@i915_selftest@live_execlists.html
- fi-skl-6260u: [PASS][21] -> [DMESG-WARN][22]
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6986/fi-skl-6260u/igt@i915_selftest@live_execlists.html
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14621/fi-skl-6260u/igt@i915_selftest@live_execlists.html
- fi-kbl-r: [PASS][23] -> [DMESG-WARN][24]
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6986/fi-kbl-r/igt@i915_selftest@live_execlists.html
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14621/fi-kbl-r/igt@i915_selftest@live_execlists.html
- fi-skl-lmem: [PASS][25] -> [DMESG-WARN][26]
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6986/fi-skl-lmem/igt@i915_selftest@live_execlists.html
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14621/fi-skl-lmem/igt@i915_selftest@live_execlists.html
- fi-cfl-8109u: [PASS][27] -> [DMESG-WARN][28]
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6986/fi-cfl-8109u/igt@i915_selftest@live_execlists.html
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14621/fi-cfl-8109u/igt@i915_selftest@live_execlists.html
* igt@runner@aborted:
- fi-cml-u2: NOTRUN -> [FAIL][29]
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14621/fi-cml-u2/igt@runner@aborted.html
- fi-cfl-8700k: NOTRUN -> [FAIL][30]
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14621/fi-cfl-8700k/igt@runner@aborted.html
#### Suppressed ####
The following results come from untrusted machines, tests, or statuses.
They do not affect the overall result.
* igt@i915_selftest@live_execlists:
- {fi-tgl-u}: [PASS][31] -> [DMESG-WARN][32]
[31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6986/fi-tgl-u/igt@i915_selftest@live_execlists.html
[32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14621/fi-tgl-u/igt@i915_selftest@live_execlists.html
- {fi-kbl-soraka}: [PASS][33] -> [DMESG-WARN][34]
[33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6986/fi-kbl-soraka/igt@i915_selftest@live_execlists.html
[34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14621/fi-kbl-soraka/igt@i915_selftest@live_execlists.html
- {fi-cml-h}: [PASS][35] -> [DMESG-WARN][36]
[35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6986/fi-cml-h/igt@i915_selftest@live_execlists.html
[36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14621/fi-cml-h/igt@i915_selftest@live_execlists.html
* igt@runner@aborted:
- {fi-cml-s}: NOTRUN -> [FAIL][37]
[37]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14621/fi-cml-s/igt@runner@aborted.html
Known issues
------------
Here are the changes found in Patchwork_14621 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@i915_selftest@live_execlists:
- fi-cfl-8700k: [PASS][38] -> [INCOMPLETE][39] ([fdo#110977])
[38]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6986/fi-cfl-8700k/igt@i915_selftest@live_execlists.html
[39]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14621/fi-cfl-8700k/igt@i915_selftest@live_execlists.html
- fi-icl-u2: [PASS][40] -> [INCOMPLETE][41] ([fdo#107713])
[40]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6986/fi-icl-u2/igt@i915_selftest@live_execlists.html
[41]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14621/fi-icl-u2/igt@i915_selftest@live_execlists.html
- fi-cml-u2: [PASS][42] -> [INCOMPLETE][43] ([fdo#110566])
[42]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6986/fi-cml-u2/igt@i915_selftest@live_execlists.html
[43]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14621/fi-cml-u2/igt@i915_selftest@live_execlists.html
#### Possible fixes ####
* igt@gem_exec_suspend@basic-s3:
- fi-blb-e6850: [INCOMPLETE][44] ([fdo#107718]) -> [PASS][45]
[44]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6986/fi-blb-e6850/igt@gem_exec_suspend@basic-s3.html
[45]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14621/fi-blb-e6850/igt@gem_exec_suspend@basic-s3.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#106107]: https://bugs.freedesktop.org/show_bug.cgi?id=106107
[fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713
[fdo#107718]: https://bugs.freedesktop.org/show_bug.cgi?id=107718
[fdo#110566]: https://bugs.freedesktop.org/show_bug.cgi?id=110566
[fdo#110977]: https://bugs.freedesktop.org/show_bug.cgi?id=110977
[fdo#111381]: https://bugs.freedesktop.org/show_bug.cgi?id=111381
Participating hosts (54 -> 41)
------------------------------
Missing (13): fi-ilk-m540 fi-tgl-u2 fi-byt-j1900 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-kbl-7500u fi-whl-u fi-icl-u3 fi-pnv-d510 fi-icl-y fi-byt-clapper fi-bdw-samus
Build changes
-------------
* CI: CI-20190529 -> None
* Linux: CI_DRM_6986 -> Patchwork_14621
CI-20190529: 20190529
CI_DRM_6986: 9300459553e8c1032f10ec1953e1a375a99aba13 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_5208: c0131b4f132acf287d9d05b0f5078003d3159e1c @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_14621: d506cfeafc6ea1b506f7ab76d726974f77edec1e @ git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
d506cfeafc6e drm/i915/selftests: Exercise potential false lite-restore
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14621/index.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 25+ messages in thread
* [PATCH v3] drm/i915/selftests: Exercise potential false lite-restore
2019-10-01 15:53 ` Chris Wilson
2019-10-01 21:10 ` [PATCH v3] " Chris Wilson
@ 2019-10-02 7:35 ` Chris Wilson
2019-10-02 8:38 ` Chris Wilson
` (2 subsequent siblings)
4 siblings, 0 replies; 25+ messages in thread
From: Chris Wilson @ 2019-10-02 7:35 UTC (permalink / raw)
To: intel-gfx
If execlists's lite-restore is based on the common GEM context tag
rather than the per-intel_context LRCA, then a context switch between
two intel_contexts on the same engine derived from the same GEM context
will perform a lite-restore instead of a full context switch. We can
exploit this by poisoning the ringbuffer of the first context and trying
to trick a simple RING_TAIL update (i.e. lite-restore)
v2: Also check what happens if preempt ce[0] with ce[1] (both instances
on the same engine from the same parent context) [Tvrtko]
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
---
More lockdep appeasement
---
drivers/gpu/drm/i915/gt/intel_lrc.c | 18 ++-
drivers/gpu/drm/i915/gt/selftest_lrc.c | 178 +++++++++++++++++++++++++
2 files changed, 192 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_lrc.c b/drivers/gpu/drm/i915/gt/intel_lrc.c
index 9877b6ba13df..2cef06be3882 100644
--- a/drivers/gpu/drm/i915/gt/intel_lrc.c
+++ b/drivers/gpu/drm/i915/gt/intel_lrc.c
@@ -235,6 +235,16 @@ static void execlists_init_reg_state(u32 *reg_state,
const struct intel_ring *ring,
bool close);
+static void __context_pin_acquire(struct intel_context *ce)
+{
+ mutex_acquire(&ce->pin_mutex.dep_map, 2, 0, _RET_IP_);
+}
+
+static void __context_pin_release(struct intel_context *ce)
+{
+ mutex_release(&ce->pin_mutex.dep_map, 0, _RET_IP_);
+}
+
static void mark_eio(struct i915_request *rq)
{
if (!i915_request_signaled(rq))
@@ -2761,7 +2771,7 @@ static void __execlists_reset(struct intel_engine_cs *engine, bool stalled)
GEM_BUG_ON(!i915_vma_is_pinned(ce->state));
/* Proclaim we have exclusive access to the context image! */
- mutex_acquire(&ce->pin_mutex.dep_map, 2, 0, _THIS_IP_);
+ __context_pin_acquire(ce);
rq = active_request(rq);
if (!rq) {
@@ -2825,7 +2835,7 @@ static void __execlists_reset(struct intel_engine_cs *engine, bool stalled)
__execlists_reset_reg_state(ce, engine);
__execlists_update_reg_state(ce, engine);
ce->lrc_desc |= CTX_DESC_FORCE_RESTORE; /* paranoid: GPU was reset! */
- mutex_release(&ce->pin_mutex.dep_map, 0, _THIS_IP_);
+ __context_pin_release(ce);
unwind:
/* Push back any incomplete requests for replay after the reset. */
@@ -4439,7 +4449,7 @@ void intel_lr_context_reset(struct intel_engine_cs *engine,
bool scrub)
{
GEM_BUG_ON(!intel_context_is_pinned(ce));
- mutex_acquire(&ce->pin_mutex.dep_map, 2, 0, _THIS_IP_);
+ __context_pin_acquire(ce);
/*
* We want a simple context + ring to execute the breadcrumb update.
@@ -4465,7 +4475,7 @@ void intel_lr_context_reset(struct intel_engine_cs *engine,
intel_ring_update_space(ce->ring);
__execlists_update_reg_state(ce, engine);
- mutex_release(&ce->pin_mutex.dep_map, 0, _THIS_IP_);
+ __context_pin_release(ce);
}
#if IS_ENABLED(CONFIG_DRM_I915_SELFTEST)
diff --git a/drivers/gpu/drm/i915/gt/selftest_lrc.c b/drivers/gpu/drm/i915/gt/selftest_lrc.c
index 93f2fcdc49bf..322abf49b578 100644
--- a/drivers/gpu/drm/i915/gt/selftest_lrc.c
+++ b/drivers/gpu/drm/i915/gt/selftest_lrc.c
@@ -79,6 +79,182 @@ static int live_sanitycheck(void *arg)
return err;
}
+static int live_unlite_restore(struct drm_i915_private *i915, int prio)
+{
+ struct intel_engine_cs *engine;
+ struct i915_gem_context *ctx;
+ enum intel_engine_id id;
+ intel_wakeref_t wakeref;
+ struct igt_spinner spin;
+ int err = -ENOMEM;
+
+ /*
+ * Check that we can correctly context switch between 2 instances
+ * on the same engine from the same parent context.
+ */
+
+ mutex_lock(&i915->drm.struct_mutex);
+ wakeref = intel_runtime_pm_get(&i915->runtime_pm);
+
+ if (igt_spinner_init(&spin, &i915->gt))
+ goto err_unlock;
+
+ ctx = kernel_context(i915);
+ if (!ctx)
+ goto err_spin;
+
+ err = 0;
+ for_each_engine(engine, i915, id) {
+ struct intel_context *ce[2] = {};
+ struct i915_request *rq[2];
+ struct igt_live_test t;
+ int n;
+
+ if (prio && !intel_engine_has_preemption(engine))
+ continue;
+
+ if (!intel_engine_can_store_dword(engine))
+ continue;
+
+ if (igt_live_test_begin(&t, i915, __func__, engine->name)) {
+ err = -EIO;
+ break;
+ }
+
+ for (n = 0; n < ARRAY_SIZE(ce); n++) {
+ struct intel_context *tmp;
+
+ tmp = intel_context_create(ctx, engine);
+ if (IS_ERR(tmp)) {
+ err = PTR_ERR(tmp);
+ goto err_ce;
+ }
+
+ err = intel_context_pin(tmp);
+ if (err) {
+ intel_context_put(tmp);
+ goto err_ce;
+ }
+
+ /*
+ * Setup the pair of contexts such that if we
+ * lite-restore using the RING_TAIL from ce[1] it
+ * will execute garbage from ce[0]->ring.
+ */
+ memset(tmp->ring->vaddr,
+ POISON_INUSE, /* IPEHR: 0x5a5a5a5a [hung!] */
+ tmp->ring->vma->size);
+
+ ce[n] = tmp;
+ }
+ GEM_BUG_ON(!ce[1]->ring->size);
+ intel_ring_reset(ce[1]->ring, ce[1]->ring->size / 2);
+
+ local_bh_disable(); /* appease lockdep */
+ __context_pin_acquire(ce[1]);
+ __execlists_update_reg_state(ce[1], engine);
+ __context_pin_release(ce[1]);
+ local_bh_enable();
+
+ rq[0] = igt_spinner_create_request(&spin, ce[0], MI_ARB_CHECK);
+ if (IS_ERR(rq[0])) {
+ err = PTR_ERR(rq[0]);
+ goto err_ce;
+ }
+
+ i915_request_get(rq[0]);
+ i915_request_add(rq[0]);
+ GEM_BUG_ON(rq[0]->tail > ce[1]->ring->emit);
+
+ if (!igt_wait_for_spinner(&spin, rq[0])) {
+ i915_request_put(rq[0]);
+ goto err_ce;
+ }
+
+ rq[1] = i915_request_create(ce[1]);
+ if (IS_ERR(rq[1])) {
+ err = PTR_ERR(rq[1]);
+ i915_request_put(rq[0]);
+ goto err_ce;
+ }
+
+ if (!prio) {
+ /*
+ * Ensure we do the switch to ce[1] on completion.
+ *
+ * rq[0] is already submitted, so this should reduce
+ * to a no-op (a wait on a request on the same engine
+ * uses the submit fence, not the completion fence),
+ * but it will install a dependency on rq[1] for rq[0]
+ * that will prevent the pair being reordered by
+ * timeslicing.
+ */
+ i915_request_await_dma_fence(rq[1], &rq[0]->fence);
+ }
+
+ i915_request_get(rq[1]);
+ i915_request_add(rq[1]);
+ GEM_BUG_ON(rq[1]->tail <= rq[0]->tail);
+ i915_request_put(rq[0]);
+
+ if (prio) {
+ struct i915_sched_attr attr = {
+ .priority = prio,
+ };
+
+ /* Alternatively preempt the spinner with ce[1] */
+ engine->schedule(rq[1], &attr);
+ }
+
+ /* And switch back to ce[0] for good measure */
+ rq[0] = i915_request_create(ce[0]);
+ if (IS_ERR(rq[0])) {
+ err = PTR_ERR(rq[0]);
+ i915_request_put(rq[1]);
+ goto err_ce;
+ }
+
+ i915_request_await_dma_fence(rq[0], &rq[1]->fence);
+ i915_request_add(rq[0]);
+ GEM_BUG_ON(rq[0]->tail > rq[1]->tail);
+ i915_request_put(rq[1]);
+
+err_ce:
+ tasklet_kill(&engine->execlists.tasklet); /* flush submission */
+ igt_spinner_end(&spin);
+ for (n = 0; n < ARRAY_SIZE(ce); n++) {
+ if (IS_ERR_OR_NULL(ce[n]))
+ break;
+
+ intel_context_unpin(ce[n]);
+ intel_context_put(ce[n]);
+ }
+
+ if (igt_live_test_end(&t))
+ err = -EIO;
+ if (err)
+ break;
+ }
+
+ kernel_context_close(ctx);
+err_spin:
+ igt_spinner_fini(&spin);
+err_unlock:
+ intel_runtime_pm_put(&i915->runtime_pm, wakeref);
+ mutex_unlock(&i915->drm.struct_mutex);
+ return err;
+}
+
+static int live_unlite_switch(void *arg)
+{
+ return live_unlite_restore(arg, 0);
+}
+
+static int live_unlite_preempt(void *arg)
+{
+ return live_unlite_restore(arg, I915_USER_PRIORITY(I915_PRIORITY_MAX));
+}
+
static int
emit_semaphore_chain(struct i915_request *rq, struct i915_vma *vma, int idx)
{
@@ -2178,6 +2354,8 @@ int intel_execlists_live_selftests(struct drm_i915_private *i915)
{
static const struct i915_subtest tests[] = {
SUBTEST(live_sanitycheck),
+ SUBTEST(live_unlite_switch),
+ SUBTEST(live_unlite_preempt),
SUBTEST(live_timeslice_preempt),
SUBTEST(live_busywait_preempt),
SUBTEST(live_preempt),
--
2.23.0
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 25+ messages in thread
* ✗ Fi.CI.CHECKPATCH: warning for drm/i915/selftests: Exercise potential false lite-restore (rev6)
2019-10-01 9:45 [PATCH] drm/i915/selftests: Exercise potential false lite-restore Chris Wilson
` (6 preceding siblings ...)
2019-10-02 0:11 ` ✗ Fi.CI.BAT: failure " Patchwork
@ 2019-10-02 8:03 ` Patchwork
2019-10-02 8:29 ` ✗ Fi.CI.BAT: failure " Patchwork
` (5 subsequent siblings)
13 siblings, 0 replies; 25+ messages in thread
From: Patchwork @ 2019-10-02 8:03 UTC (permalink / raw)
To: Chris Wilson; +Cc: intel-gfx
== Series Details ==
Series: drm/i915/selftests: Exercise potential false lite-restore (rev6)
URL : https://patchwork.freedesktop.org/series/67438/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
352a7d913600 drm/i915/selftests: Exercise potential false lite-restore
-:30: WARNING:LEADING_SPACE: please, no spaces at the start of a line
#30: FILE: drivers/gpu/drm/i915/gt/intel_lrc.c:240:
+ mutex_acquire(&ce->pin_mutex.dep_map, 2, 0, _RET_IP_);$
-:35: WARNING:LEADING_SPACE: please, no spaces at the start of a line
#35: FILE: drivers/gpu/drm/i915/gt/intel_lrc.c:245:
+ mutex_release(&ce->pin_mutex.dep_map, 0, _RET_IP_);$
total: 0 errors, 2 warnings, 0 checks, 238 lines checked
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 25+ messages in thread
* ✗ Fi.CI.BAT: failure for drm/i915/selftests: Exercise potential false lite-restore (rev6)
2019-10-01 9:45 [PATCH] drm/i915/selftests: Exercise potential false lite-restore Chris Wilson
` (7 preceding siblings ...)
2019-10-02 8:03 ` ✗ Fi.CI.CHECKPATCH: warning for drm/i915/selftests: Exercise potential false lite-restore (rev6) Patchwork
@ 2019-10-02 8:29 ` Patchwork
2019-10-02 8:51 ` ✗ Fi.CI.CHECKPATCH: warning for drm/i915/selftests: Exercise potential false lite-restore (rev7) Patchwork
` (4 subsequent siblings)
13 siblings, 0 replies; 25+ messages in thread
From: Patchwork @ 2019-10-02 8:29 UTC (permalink / raw)
To: Chris Wilson; +Cc: intel-gfx
== Series Details ==
Series: drm/i915/selftests: Exercise potential false lite-restore (rev6)
URL : https://patchwork.freedesktop.org/series/67438/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_6986 -> Patchwork_14622
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with Patchwork_14622 absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_14622, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14622/index.html
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in Patchwork_14622:
### IGT changes ###
#### Possible regressions ####
* igt@i915_selftest@live_execlists:
- fi-whl-u: [PASS][1] -> [INCOMPLETE][2]
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6986/fi-whl-u/igt@i915_selftest@live_execlists.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14622/fi-whl-u/igt@i915_selftest@live_execlists.html
* igt@runner@aborted:
- fi-cfl-8109u: NOTRUN -> [FAIL][3]
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14622/fi-cfl-8109u/igt@runner@aborted.html
- fi-whl-u: NOTRUN -> [FAIL][4]
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14622/fi-whl-u/igt@runner@aborted.html
- fi-cml-u2: NOTRUN -> [FAIL][5]
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14622/fi-cml-u2/igt@runner@aborted.html
Known issues
------------
Here are the changes found in Patchwork_14622 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_mmap_gtt@basic-write-no-prefault:
- fi-icl-u3: [PASS][6] -> [DMESG-WARN][7] ([fdo#107724]) +1 similar issue
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6986/fi-icl-u3/igt@gem_mmap_gtt@basic-write-no-prefault.html
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14622/fi-icl-u3/igt@gem_mmap_gtt@basic-write-no-prefault.html
* igt@i915_selftest@live_execlists:
- fi-icl-u2: [PASS][8] -> [INCOMPLETE][9] ([fdo#107713])
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6986/fi-icl-u2/igt@i915_selftest@live_execlists.html
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14622/fi-icl-u2/igt@i915_selftest@live_execlists.html
- fi-cfl-guc: [PASS][10] -> [INCOMPLETE][11] ([fdo#110977])
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6986/fi-cfl-guc/igt@i915_selftest@live_execlists.html
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14622/fi-cfl-guc/igt@i915_selftest@live_execlists.html
- fi-cml-u2: [PASS][12] -> [INCOMPLETE][13] ([fdo#110566])
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6986/fi-cml-u2/igt@i915_selftest@live_execlists.html
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14622/fi-cml-u2/igt@i915_selftest@live_execlists.html
- fi-cfl-8109u: [PASS][14] -> [INCOMPLETE][15] ([fdo#110977])
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6986/fi-cfl-8109u/igt@i915_selftest@live_execlists.html
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14622/fi-cfl-8109u/igt@i915_selftest@live_execlists.html
* igt@kms_chamelium@hdmi-hpd-fast:
- fi-icl-u2: [PASS][16] -> [FAIL][17] ([fdo#109483])
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6986/fi-icl-u2/igt@kms_chamelium@hdmi-hpd-fast.html
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14622/fi-icl-u2/igt@kms_chamelium@hdmi-hpd-fast.html
#### Possible fixes ####
* igt@gem_exec_suspend@basic-s3:
- fi-blb-e6850: [INCOMPLETE][18] ([fdo#107718]) -> [PASS][19]
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6986/fi-blb-e6850/igt@gem_exec_suspend@basic-s3.html
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14622/fi-blb-e6850/igt@gem_exec_suspend@basic-s3.html
* igt@gem_linear_blits@basic:
- fi-icl-u3: [DMESG-WARN][20] ([fdo#107724]) -> [PASS][21]
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6986/fi-icl-u3/igt@gem_linear_blits@basic.html
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14622/fi-icl-u3/igt@gem_linear_blits@basic.html
* igt@i915_module_load@reload:
- fi-icl-u3: [DMESG-WARN][22] ([fdo#107724] / [fdo#111214]) -> [PASS][23]
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6986/fi-icl-u3/igt@i915_module_load@reload.html
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14622/fi-icl-u3/igt@i915_module_load@reload.html
* igt@kms_chamelium@hdmi-edid-read:
- {fi-icl-u4}: [FAIL][24] ([fdo#111045]) -> [PASS][25] +1 similar issue
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6986/fi-icl-u4/igt@kms_chamelium@hdmi-edid-read.html
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14622/fi-icl-u4/igt@kms_chamelium@hdmi-edid-read.html
* igt@kms_chamelium@hdmi-hpd-fast:
- fi-kbl-7500u: [FAIL][26] ([fdo#111407]) -> [PASS][27]
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6986/fi-kbl-7500u/igt@kms_chamelium@hdmi-hpd-fast.html
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14622/fi-kbl-7500u/igt@kms_chamelium@hdmi-hpd-fast.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#102505]: https://bugs.freedesktop.org/show_bug.cgi?id=102505
[fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713
[fdo#107718]: https://bugs.freedesktop.org/show_bug.cgi?id=107718
[fdo#107724]: https://bugs.freedesktop.org/show_bug.cgi?id=107724
[fdo#109100]: https://bugs.freedesktop.org/show_bug.cgi?id=109100
[fdo#109483]: https://bugs.freedesktop.org/show_bug.cgi?id=109483
[fdo#110566]: https://bugs.freedesktop.org/show_bug.cgi?id=110566
[fdo#110977]: https://bugs.freedesktop.org/show_bug.cgi?id=110977
[fdo#111045]: https://bugs.freedesktop.org/show_bug.cgi?id=111045
[fdo#111049]: https://bugs.freedesktop.org/show_bug.cgi?id=111049
[fdo#111214]: https://bugs.freedesktop.org/show_bug.cgi?id=111214
[fdo#111407]: https://bugs.freedesktop.org/show_bug.cgi?id=111407
Participating hosts (54 -> 44)
------------------------------
Missing (10): fi-kbl-soraka fi-ilk-m540 fi-cml-h fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-icl-y fi-skl-lmem fi-byt-clapper fi-bdw-samus
Build changes
-------------
* CI: CI-20190529 -> None
* Linux: CI_DRM_6986 -> Patchwork_14622
CI-20190529: 20190529
CI_DRM_6986: 9300459553e8c1032f10ec1953e1a375a99aba13 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_5208: c0131b4f132acf287d9d05b0f5078003d3159e1c @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_14622: 352a7d9136002a6a72e06edec4e53b0a68b148d9 @ git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
352a7d913600 drm/i915/selftests: Exercise potential false lite-restore
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14622/index.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 25+ messages in thread
* [PATCH v3] drm/i915/selftests: Exercise potential false lite-restore
2019-10-01 15:53 ` Chris Wilson
2019-10-01 21:10 ` [PATCH v3] " Chris Wilson
2019-10-02 7:35 ` Chris Wilson
@ 2019-10-02 8:38 ` Chris Wilson
2019-10-02 13:56 ` Chris Wilson
2019-10-02 18:34 ` Chris Wilson
4 siblings, 0 replies; 25+ messages in thread
From: Chris Wilson @ 2019-10-02 8:38 UTC (permalink / raw)
To: intel-gfx
If execlists's lite-restore is based on the common GEM context tag
rather than the per-intel_context LRCA, then a context switch between
two intel_contexts on the same engine derived from the same GEM context
will perform a lite-restore instead of a full context switch. We can
exploit this by poisoning the ringbuffer of the first context and trying
to trick a simple RING_TAIL update (i.e. lite-restore)
v2: Also check what happens if preempt ce[0] with ce[1] (both instances
on the same engine from the same parent context) [Tvrtko]
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
---
Hmm,
<0> [525.755333] i915_sel-6886 4.... 515007577us : live_unlite_restore: live_unlite_restore:219 GEM_BUG_ON(rq[0]->tail > rq[1]->tail)
2 requests take more than 2 pages? Weird, but for later.
---
drivers/gpu/drm/i915/gt/intel_lrc.c | 18 ++-
drivers/gpu/drm/i915/gt/selftest_lrc.c | 177 +++++++++++++++++++++++++
2 files changed, 191 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_lrc.c b/drivers/gpu/drm/i915/gt/intel_lrc.c
index 9877b6ba13df..2cef06be3882 100644
--- a/drivers/gpu/drm/i915/gt/intel_lrc.c
+++ b/drivers/gpu/drm/i915/gt/intel_lrc.c
@@ -235,6 +235,16 @@ static void execlists_init_reg_state(u32 *reg_state,
const struct intel_ring *ring,
bool close);
+static void __context_pin_acquire(struct intel_context *ce)
+{
+ mutex_acquire(&ce->pin_mutex.dep_map, 2, 0, _RET_IP_);
+}
+
+static void __context_pin_release(struct intel_context *ce)
+{
+ mutex_release(&ce->pin_mutex.dep_map, 0, _RET_IP_);
+}
+
static void mark_eio(struct i915_request *rq)
{
if (!i915_request_signaled(rq))
@@ -2761,7 +2771,7 @@ static void __execlists_reset(struct intel_engine_cs *engine, bool stalled)
GEM_BUG_ON(!i915_vma_is_pinned(ce->state));
/* Proclaim we have exclusive access to the context image! */
- mutex_acquire(&ce->pin_mutex.dep_map, 2, 0, _THIS_IP_);
+ __context_pin_acquire(ce);
rq = active_request(rq);
if (!rq) {
@@ -2825,7 +2835,7 @@ static void __execlists_reset(struct intel_engine_cs *engine, bool stalled)
__execlists_reset_reg_state(ce, engine);
__execlists_update_reg_state(ce, engine);
ce->lrc_desc |= CTX_DESC_FORCE_RESTORE; /* paranoid: GPU was reset! */
- mutex_release(&ce->pin_mutex.dep_map, 0, _THIS_IP_);
+ __context_pin_release(ce);
unwind:
/* Push back any incomplete requests for replay after the reset. */
@@ -4439,7 +4449,7 @@ void intel_lr_context_reset(struct intel_engine_cs *engine,
bool scrub)
{
GEM_BUG_ON(!intel_context_is_pinned(ce));
- mutex_acquire(&ce->pin_mutex.dep_map, 2, 0, _THIS_IP_);
+ __context_pin_acquire(ce);
/*
* We want a simple context + ring to execute the breadcrumb update.
@@ -4465,7 +4475,7 @@ void intel_lr_context_reset(struct intel_engine_cs *engine,
intel_ring_update_space(ce->ring);
__execlists_update_reg_state(ce, engine);
- mutex_release(&ce->pin_mutex.dep_map, 0, _THIS_IP_);
+ __context_pin_release(ce);
}
#if IS_ENABLED(CONFIG_DRM_I915_SELFTEST)
diff --git a/drivers/gpu/drm/i915/gt/selftest_lrc.c b/drivers/gpu/drm/i915/gt/selftest_lrc.c
index 93f2fcdc49bf..0c603e28f396 100644
--- a/drivers/gpu/drm/i915/gt/selftest_lrc.c
+++ b/drivers/gpu/drm/i915/gt/selftest_lrc.c
@@ -79,6 +79,181 @@ static int live_sanitycheck(void *arg)
return err;
}
+static int live_unlite_restore(struct drm_i915_private *i915, int prio)
+{
+ struct intel_engine_cs *engine;
+ struct i915_gem_context *ctx;
+ enum intel_engine_id id;
+ intel_wakeref_t wakeref;
+ struct igt_spinner spin;
+ int err = -ENOMEM;
+
+ /*
+ * Check that we can correctly context switch between 2 instances
+ * on the same engine from the same parent context.
+ */
+
+ mutex_lock(&i915->drm.struct_mutex);
+ wakeref = intel_runtime_pm_get(&i915->runtime_pm);
+
+ if (igt_spinner_init(&spin, &i915->gt))
+ goto err_unlock;
+
+ ctx = kernel_context(i915);
+ if (!ctx)
+ goto err_spin;
+
+ err = 0;
+ for_each_engine(engine, i915, id) {
+ struct intel_context *ce[2] = {};
+ struct i915_request *rq[2];
+ struct igt_live_test t;
+ int n;
+
+ if (prio && !intel_engine_has_preemption(engine))
+ continue;
+
+ if (!intel_engine_can_store_dword(engine))
+ continue;
+
+ if (igt_live_test_begin(&t, i915, __func__, engine->name)) {
+ err = -EIO;
+ break;
+ }
+
+ for (n = 0; n < ARRAY_SIZE(ce); n++) {
+ struct intel_context *tmp;
+
+ tmp = intel_context_create(ctx, engine);
+ if (IS_ERR(tmp)) {
+ err = PTR_ERR(tmp);
+ goto err_ce;
+ }
+
+ err = intel_context_pin(tmp);
+ if (err) {
+ intel_context_put(tmp);
+ goto err_ce;
+ }
+
+ /*
+ * Setup the pair of contexts such that if we
+ * lite-restore using the RING_TAIL from ce[1] it
+ * will execute garbage from ce[0]->ring.
+ */
+ memset(tmp->ring->vaddr,
+ POISON_INUSE, /* IPEHR: 0x5a5a5a5a [hung!] */
+ tmp->ring->vma->size);
+
+ ce[n] = tmp;
+ }
+ GEM_BUG_ON(!ce[1]->ring->size);
+ intel_ring_reset(ce[1]->ring, ce[1]->ring->size / 2);
+
+ local_bh_disable(); /* appease lockdep */
+ __context_pin_acquire(ce[1]);
+ __execlists_update_reg_state(ce[1], engine);
+ __context_pin_release(ce[1]);
+ local_bh_enable();
+
+ rq[0] = igt_spinner_create_request(&spin, ce[0], MI_ARB_CHECK);
+ if (IS_ERR(rq[0])) {
+ err = PTR_ERR(rq[0]);
+ goto err_ce;
+ }
+
+ i915_request_get(rq[0]);
+ i915_request_add(rq[0]);
+ GEM_BUG_ON(rq[0]->tail > ce[1]->ring->emit);
+
+ if (!igt_wait_for_spinner(&spin, rq[0])) {
+ i915_request_put(rq[0]);
+ goto err_ce;
+ }
+
+ rq[1] = i915_request_create(ce[1]);
+ if (IS_ERR(rq[1])) {
+ err = PTR_ERR(rq[1]);
+ i915_request_put(rq[0]);
+ goto err_ce;
+ }
+
+ if (!prio) {
+ /*
+ * Ensure we do the switch to ce[1] on completion.
+ *
+ * rq[0] is already submitted, so this should reduce
+ * to a no-op (a wait on a request on the same engine
+ * uses the submit fence, not the completion fence),
+ * but it will install a dependency on rq[1] for rq[0]
+ * that will prevent the pair being reordered by
+ * timeslicing.
+ */
+ i915_request_await_dma_fence(rq[1], &rq[0]->fence);
+ }
+
+ i915_request_get(rq[1]);
+ i915_request_add(rq[1]);
+ GEM_BUG_ON(rq[1]->tail <= rq[0]->tail);
+ i915_request_put(rq[0]);
+
+ if (prio) {
+ struct i915_sched_attr attr = {
+ .priority = prio,
+ };
+
+ /* Alternatively preempt the spinner with ce[1] */
+ engine->schedule(rq[1], &attr);
+ }
+
+ /* And switch back to ce[0] for good measure */
+ rq[0] = i915_request_create(ce[0]);
+ if (IS_ERR(rq[0])) {
+ err = PTR_ERR(rq[0]);
+ i915_request_put(rq[1]);
+ goto err_ce;
+ }
+
+ i915_request_await_dma_fence(rq[0], &rq[1]->fence);
+ i915_request_add(rq[0]);
+ i915_request_put(rq[1]);
+
+err_ce:
+ tasklet_kill(&engine->execlists.tasklet); /* flush submission */
+ igt_spinner_end(&spin);
+ for (n = 0; n < ARRAY_SIZE(ce); n++) {
+ if (IS_ERR_OR_NULL(ce[n]))
+ break;
+
+ intel_context_unpin(ce[n]);
+ intel_context_put(ce[n]);
+ }
+
+ if (igt_live_test_end(&t))
+ err = -EIO;
+ if (err)
+ break;
+ }
+
+ kernel_context_close(ctx);
+err_spin:
+ igt_spinner_fini(&spin);
+err_unlock:
+ intel_runtime_pm_put(&i915->runtime_pm, wakeref);
+ mutex_unlock(&i915->drm.struct_mutex);
+ return err;
+}
+
+static int live_unlite_switch(void *arg)
+{
+ return live_unlite_restore(arg, 0);
+}
+
+static int live_unlite_preempt(void *arg)
+{
+ return live_unlite_restore(arg, I915_USER_PRIORITY(I915_PRIORITY_MAX));
+}
+
static int
emit_semaphore_chain(struct i915_request *rq, struct i915_vma *vma, int idx)
{
@@ -2178,6 +2353,8 @@ int intel_execlists_live_selftests(struct drm_i915_private *i915)
{
static const struct i915_subtest tests[] = {
SUBTEST(live_sanitycheck),
+ SUBTEST(live_unlite_switch),
+ SUBTEST(live_unlite_preempt),
SUBTEST(live_timeslice_preempt),
SUBTEST(live_busywait_preempt),
SUBTEST(live_preempt),
--
2.23.0
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 25+ messages in thread
* ✗ Fi.CI.CHECKPATCH: warning for drm/i915/selftests: Exercise potential false lite-restore (rev7)
2019-10-01 9:45 [PATCH] drm/i915/selftests: Exercise potential false lite-restore Chris Wilson
` (8 preceding siblings ...)
2019-10-02 8:29 ` ✗ Fi.CI.BAT: failure " Patchwork
@ 2019-10-02 8:51 ` Patchwork
2019-10-02 9:17 ` ✗ Fi.CI.BAT: failure " Patchwork
` (3 subsequent siblings)
13 siblings, 0 replies; 25+ messages in thread
From: Patchwork @ 2019-10-02 8:51 UTC (permalink / raw)
To: Chris Wilson; +Cc: intel-gfx
== Series Details ==
Series: drm/i915/selftests: Exercise potential false lite-restore (rev7)
URL : https://patchwork.freedesktop.org/series/67438/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
8ec84e229d3e drm/i915/selftests: Exercise potential false lite-restore
-:30: WARNING:LEADING_SPACE: please, no spaces at the start of a line
#30: FILE: drivers/gpu/drm/i915/gt/intel_lrc.c:240:
+ mutex_acquire(&ce->pin_mutex.dep_map, 2, 0, _RET_IP_);$
-:35: WARNING:LEADING_SPACE: please, no spaces at the start of a line
#35: FILE: drivers/gpu/drm/i915/gt/intel_lrc.c:245:
+ mutex_release(&ce->pin_mutex.dep_map, 0, _RET_IP_);$
total: 0 errors, 2 warnings, 0 checks, 237 lines checked
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 25+ messages in thread
* ✗ Fi.CI.BAT: failure for drm/i915/selftests: Exercise potential false lite-restore (rev7)
2019-10-01 9:45 [PATCH] drm/i915/selftests: Exercise potential false lite-restore Chris Wilson
` (9 preceding siblings ...)
2019-10-02 8:51 ` ✗ Fi.CI.CHECKPATCH: warning for drm/i915/selftests: Exercise potential false lite-restore (rev7) Patchwork
@ 2019-10-02 9:17 ` Patchwork
2019-10-02 18:24 ` ✗ Fi.CI.BAT: failure for drm/i915/selftests: Exercise potential false lite-restore (rev8) Patchwork
` (2 subsequent siblings)
13 siblings, 0 replies; 25+ messages in thread
From: Patchwork @ 2019-10-02 9:17 UTC (permalink / raw)
To: Chris Wilson; +Cc: intel-gfx
== Series Details ==
Series: drm/i915/selftests: Exercise potential false lite-restore (rev7)
URL : https://patchwork.freedesktop.org/series/67438/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_6986 -> Patchwork_14623
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with Patchwork_14623 absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_14623, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14623/index.html
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in Patchwork_14623:
### IGT changes ###
#### Possible regressions ####
* igt@runner@aborted:
- fi-cml-u2: NOTRUN -> [FAIL][1]
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14623/fi-cml-u2/igt@runner@aborted.html
Known issues
------------
Here are the changes found in Patchwork_14623 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@core_auth@basic-auth:
- fi-icl-u3: [PASS][2] -> [DMESG-WARN][3] ([fdo#107724]) +1 similar issue
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6986/fi-icl-u3/igt@core_auth@basic-auth.html
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14623/fi-icl-u3/igt@core_auth@basic-auth.html
* igt@gem_ctx_switch@legacy-render:
- fi-apl-guc: [PASS][4] -> [INCOMPLETE][5] ([fdo#103927] / [fdo#111381])
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6986/fi-apl-guc/igt@gem_ctx_switch@legacy-render.html
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14623/fi-apl-guc/igt@gem_ctx_switch@legacy-render.html
* igt@i915_selftest@live_execlists:
- fi-icl-u2: [PASS][6] -> [INCOMPLETE][7] ([fdo#107713])
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6986/fi-icl-u2/igt@i915_selftest@live_execlists.html
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14623/fi-icl-u2/igt@i915_selftest@live_execlists.html
- fi-cml-u2: [PASS][8] -> [INCOMPLETE][9] ([fdo#110566])
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6986/fi-cml-u2/igt@i915_selftest@live_execlists.html
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14623/fi-cml-u2/igt@i915_selftest@live_execlists.html
#### Possible fixes ####
* igt@gem_linear_blits@basic:
- fi-icl-u3: [DMESG-WARN][10] ([fdo#107724]) -> [PASS][11]
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6986/fi-icl-u3/igt@gem_linear_blits@basic.html
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14623/fi-icl-u3/igt@gem_linear_blits@basic.html
* igt@i915_module_load@reload:
- fi-icl-u3: [DMESG-WARN][12] ([fdo#107724] / [fdo#111214]) -> [PASS][13]
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6986/fi-icl-u3/igt@i915_module_load@reload.html
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14623/fi-icl-u3/igt@i915_module_load@reload.html
* igt@kms_chamelium@hdmi-edid-read:
- {fi-icl-u4}: [FAIL][14] ([fdo#111045]) -> [PASS][15] +1 similar issue
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6986/fi-icl-u4/igt@kms_chamelium@hdmi-edid-read.html
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14623/fi-icl-u4/igt@kms_chamelium@hdmi-edid-read.html
* igt@kms_chamelium@hdmi-hpd-fast:
- fi-kbl-7500u: [FAIL][16] ([fdo#111407]) -> [PASS][17]
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6986/fi-kbl-7500u/igt@kms_chamelium@hdmi-hpd-fast.html
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14623/fi-kbl-7500u/igt@kms_chamelium@hdmi-hpd-fast.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#102505]: https://bugs.freedesktop.org/show_bug.cgi?id=102505
[fdo#103927]: https://bugs.freedesktop.org/show_bug.cgi?id=103927
[fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713
[fdo#107724]: https://bugs.freedesktop.org/show_bug.cgi?id=107724
[fdo#110566]: https://bugs.freedesktop.org/show_bug.cgi?id=110566
[fdo#111045]: https://bugs.freedesktop.org/show_bug.cgi?id=111045
[fdo#111049]: https://bugs.freedesktop.org/show_bug.cgi?id=111049
[fdo#111214]: https://bugs.freedesktop.org/show_bug.cgi?id=111214
[fdo#111381]: https://bugs.freedesktop.org/show_bug.cgi?id=111381
[fdo#111407]: https://bugs.freedesktop.org/show_bug.cgi?id=111407
Participating hosts (54 -> 43)
------------------------------
Missing (11): fi-ilk-m540 fi-tgl-u fi-bsw-n3050 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-icl-y fi-skl-lmem fi-byt-clapper fi-bdw-samus fi-kbl-r
Build changes
-------------
* CI: CI-20190529 -> None
* Linux: CI_DRM_6986 -> Patchwork_14623
CI-20190529: 20190529
CI_DRM_6986: 9300459553e8c1032f10ec1953e1a375a99aba13 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_5208: c0131b4f132acf287d9d05b0f5078003d3159e1c @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_14623: 8ec84e229d3efe526b394fab19ca4ac6be7ac356 @ git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
8ec84e229d3e drm/i915/selftests: Exercise potential false lite-restore
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14623/index.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 25+ messages in thread
* [PATCH v3] drm/i915/selftests: Exercise potential false lite-restore
2019-10-01 15:53 ` Chris Wilson
` (2 preceding siblings ...)
2019-10-02 8:38 ` Chris Wilson
@ 2019-10-02 13:56 ` Chris Wilson
2019-10-02 18:34 ` Chris Wilson
4 siblings, 0 replies; 25+ messages in thread
From: Chris Wilson @ 2019-10-02 13:56 UTC (permalink / raw)
To: intel-gfx
If execlists's lite-restore is based on the common GEM context tag
rather than the per-intel_context LRCA, then a context switch between
two intel_contexts on the same engine derived from the same GEM context
will perform a lite-restore instead of a full context switch. We can
exploit this by poisoning the ringbuffer of the first context and trying
to trick a simple RING_TAIL update (i.e. lite-restore)
v2: Also check what happens if preempt ce[0] with ce[1] (both instances
on the same engine from the same parent context) [Tvrtko]
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
---
Don't let rq[0] out of your sight!
---
drivers/gpu/drm/i915/gt/intel_lrc.c | 18 ++-
drivers/gpu/drm/i915/gt/selftest_lrc.c | 180 +++++++++++++++++++++++++
2 files changed, 194 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_lrc.c b/drivers/gpu/drm/i915/gt/intel_lrc.c
index 9877b6ba13df..431d3b8c3371 100644
--- a/drivers/gpu/drm/i915/gt/intel_lrc.c
+++ b/drivers/gpu/drm/i915/gt/intel_lrc.c
@@ -235,6 +235,16 @@ static void execlists_init_reg_state(u32 *reg_state,
const struct intel_ring *ring,
bool close);
+static void __context_pin_acquire(struct intel_context *ce)
+{
+ mutex_acquire(&ce->pin_mutex.dep_map, 2, 0, _RET_IP_);
+}
+
+static void __context_pin_release(struct intel_context *ce)
+{
+ mutex_release(&ce->pin_mutex.dep_map, 0, _RET_IP_);
+}
+
static void mark_eio(struct i915_request *rq)
{
if (!i915_request_signaled(rq))
@@ -2761,7 +2771,7 @@ static void __execlists_reset(struct intel_engine_cs *engine, bool stalled)
GEM_BUG_ON(!i915_vma_is_pinned(ce->state));
/* Proclaim we have exclusive access to the context image! */
- mutex_acquire(&ce->pin_mutex.dep_map, 2, 0, _THIS_IP_);
+ __context_pin_acquire(ce);
rq = active_request(rq);
if (!rq) {
@@ -2825,7 +2835,7 @@ static void __execlists_reset(struct intel_engine_cs *engine, bool stalled)
__execlists_reset_reg_state(ce, engine);
__execlists_update_reg_state(ce, engine);
ce->lrc_desc |= CTX_DESC_FORCE_RESTORE; /* paranoid: GPU was reset! */
- mutex_release(&ce->pin_mutex.dep_map, 0, _THIS_IP_);
+ __context_pin_release(ce);
unwind:
/* Push back any incomplete requests for replay after the reset. */
@@ -4439,7 +4449,7 @@ void intel_lr_context_reset(struct intel_engine_cs *engine,
bool scrub)
{
GEM_BUG_ON(!intel_context_is_pinned(ce));
- mutex_acquire(&ce->pin_mutex.dep_map, 2, 0, _THIS_IP_);
+ __context_pin_acquire(ce);
/*
* We want a simple context + ring to execute the breadcrumb update.
@@ -4465,7 +4475,7 @@ void intel_lr_context_reset(struct intel_engine_cs *engine,
intel_ring_update_space(ce->ring);
__execlists_update_reg_state(ce, engine);
- mutex_release(&ce->pin_mutex.dep_map, 0, _THIS_IP_);
+ __context_pin_release(ce);
}
#if IS_ENABLED(CONFIG_DRM_I915_SELFTEST)
diff --git a/drivers/gpu/drm/i915/gt/selftest_lrc.c b/drivers/gpu/drm/i915/gt/selftest_lrc.c
index 93f2fcdc49bf..d33d7508b3f1 100644
--- a/drivers/gpu/drm/i915/gt/selftest_lrc.c
+++ b/drivers/gpu/drm/i915/gt/selftest_lrc.c
@@ -79,6 +79,184 @@ static int live_sanitycheck(void *arg)
return err;
}
+static int live_unlite_restore(struct drm_i915_private *i915, int prio)
+{
+ struct intel_engine_cs *engine;
+ struct i915_gem_context *ctx;
+ enum intel_engine_id id;
+ intel_wakeref_t wakeref;
+ struct igt_spinner spin;
+ int err = -ENOMEM;
+
+ /*
+ * Check that we can correctly context switch between 2 instances
+ * on the same engine from the same parent context.
+ */
+
+ mutex_lock(&i915->drm.struct_mutex);
+ wakeref = intel_runtime_pm_get(&i915->runtime_pm);
+
+ if (igt_spinner_init(&spin, &i915->gt))
+ goto err_unlock;
+
+ ctx = kernel_context(i915);
+ if (!ctx)
+ goto err_spin;
+
+ err = 0;
+ for_each_engine(engine, i915, id) {
+ struct intel_context *ce[2] = {};
+ struct i915_request *rq[2];
+ struct igt_live_test t;
+ int n;
+
+ if (prio && !intel_engine_has_preemption(engine))
+ continue;
+
+ if (!intel_engine_can_store_dword(engine))
+ continue;
+
+ if (igt_live_test_begin(&t, i915, __func__, engine->name)) {
+ err = -EIO;
+ break;
+ }
+
+ for (n = 0; n < ARRAY_SIZE(ce); n++) {
+ struct intel_context *tmp;
+
+ tmp = intel_context_create(ctx, engine);
+ if (IS_ERR(tmp)) {
+ err = PTR_ERR(tmp);
+ goto err_ce;
+ }
+
+ err = intel_context_pin(tmp);
+ if (err) {
+ intel_context_put(tmp);
+ goto err_ce;
+ }
+
+ /*
+ * Setup the pair of contexts such that if we
+ * lite-restore using the RING_TAIL from ce[1] it
+ * will execute garbage from ce[0]->ring.
+ */
+ memset(tmp->ring->vaddr,
+ POISON_INUSE, /* IPEHR: 0x5a5a5a5a [hung!] */
+ tmp->ring->vma->size);
+
+ ce[n] = tmp;
+ }
+ GEM_BUG_ON(!ce[1]->ring->size);
+ intel_ring_reset(ce[1]->ring, ce[1]->ring->size / 2);
+
+ local_bh_disable(); /* appease lockdep */
+ __context_pin_acquire(ce[1]);
+ __execlists_update_reg_state(ce[1], engine);
+ __context_pin_release(ce[1]);
+ local_bh_enable();
+
+ rq[0] = igt_spinner_create_request(&spin, ce[0], MI_ARB_CHECK);
+ if (IS_ERR(rq[0])) {
+ err = PTR_ERR(rq[0]);
+ goto err_ce;
+ }
+
+ i915_request_get(rq[0]);
+ i915_request_add(rq[0]);
+ GEM_BUG_ON(rq[0]->tail > ce[1]->ring->emit);
+
+ if (!igt_wait_for_spinner(&spin, rq[0])) {
+ i915_request_put(rq[0]);
+ goto err_ce;
+ }
+
+ rq[1] = i915_request_create(ce[1]);
+ if (IS_ERR(rq[1])) {
+ err = PTR_ERR(rq[1]);
+ i915_request_put(rq[0]);
+ goto err_ce;
+ }
+
+ if (!prio) {
+ /*
+ * Ensure we do the switch to ce[1] on completion.
+ *
+ * rq[0] is already submitted, so this should reduce
+ * to a no-op (a wait on a request on the same engine
+ * uses the submit fence, not the completion fence),
+ * but it will install a dependency on rq[1] for rq[0]
+ * that will prevent the pair being reordered by
+ * timeslicing.
+ */
+ i915_request_await_dma_fence(rq[1], &rq[0]->fence);
+ }
+
+ i915_request_get(rq[1]);
+ i915_request_add(rq[1]);
+ GEM_BUG_ON(rq[1]->tail <= rq[0]->tail);
+ i915_request_put(rq[0]);
+
+ if (prio) {
+ struct i915_sched_attr attr = {
+ .priority = prio,
+ };
+
+ /* Alternatively preempt the spinner with ce[1] */
+ engine->schedule(rq[1], &attr);
+ }
+
+ /* And switch back to ce[0] for good measure */
+ rq[0] = i915_request_create(ce[0]);
+ if (IS_ERR(rq[0])) {
+ err = PTR_ERR(rq[0]);
+ i915_request_put(rq[1]);
+ goto err_ce;
+ }
+
+ i915_request_await_dma_fence(rq[0], &rq[1]->fence);
+ i915_request_get(rq[0]);
+ i915_request_add(rq[0]);
+ GEM_BUG_ON(rq[0]->tail > rq[1]->tail);
+ i915_request_put(rq[1]);
+ i915_request_put(rq[0]);
+
+err_ce:
+ tasklet_kill(&engine->execlists.tasklet); /* flush submission */
+ igt_spinner_end(&spin);
+ for (n = 0; n < ARRAY_SIZE(ce); n++) {
+ if (IS_ERR_OR_NULL(ce[n]))
+ break;
+
+ intel_context_unpin(ce[n]);
+ intel_context_put(ce[n]);
+ }
+
+ if (igt_live_test_end(&t))
+ err = -EIO;
+ if (err)
+ break;
+ }
+
+ kernel_context_close(ctx);
+err_spin:
+ igt_spinner_fini(&spin);
+err_unlock:
+ intel_runtime_pm_put(&i915->runtime_pm, wakeref);
+ mutex_unlock(&i915->drm.struct_mutex);
+ return err;
+}
+
+static int live_unlite_switch(void *arg)
+{
+ return live_unlite_restore(arg, 0);
+}
+
+static int live_unlite_preempt(void *arg)
+{
+ return live_unlite_restore(arg, I915_USER_PRIORITY(I915_PRIORITY_MAX));
+}
+
static int
emit_semaphore_chain(struct i915_request *rq, struct i915_vma *vma, int idx)
{
@@ -2178,6 +2356,8 @@ int intel_execlists_live_selftests(struct drm_i915_private *i915)
{
static const struct i915_subtest tests[] = {
SUBTEST(live_sanitycheck),
+ SUBTEST(live_unlite_switch),
+ SUBTEST(live_unlite_preempt),
SUBTEST(live_timeslice_preempt),
SUBTEST(live_busywait_preempt),
SUBTEST(live_preempt),
--
2.23.0
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 25+ messages in thread
* ✗ Fi.CI.BAT: failure for drm/i915/selftests: Exercise potential false lite-restore (rev8)
2019-10-01 9:45 [PATCH] drm/i915/selftests: Exercise potential false lite-restore Chris Wilson
` (10 preceding siblings ...)
2019-10-02 9:17 ` ✗ Fi.CI.BAT: failure " Patchwork
@ 2019-10-02 18:24 ` Patchwork
2019-10-02 23:21 ` ✓ Fi.CI.BAT: success for drm/i915/selftests: Exercise potential false lite-restore (rev9) Patchwork
2019-10-03 8:03 ` ✗ Fi.CI.IGT: failure " Patchwork
13 siblings, 0 replies; 25+ messages in thread
From: Patchwork @ 2019-10-02 18:24 UTC (permalink / raw)
To: Chris Wilson; +Cc: intel-gfx
== Series Details ==
Series: drm/i915/selftests: Exercise potential false lite-restore (rev8)
URL : https://patchwork.freedesktop.org/series/67438/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_6991 -> Patchwork_14630
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with Patchwork_14630 absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_14630, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14630/index.html
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in Patchwork_14630:
### IGT changes ###
#### Possible regressions ####
* igt@i915_selftest@live_execlists:
- fi-whl-u: [PASS][1] -> [INCOMPLETE][2]
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6991/fi-whl-u/igt@i915_selftest@live_execlists.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14630/fi-whl-u/igt@i915_selftest@live_execlists.html
* igt@runner@aborted:
- fi-whl-u: NOTRUN -> [FAIL][3]
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14630/fi-whl-u/igt@runner@aborted.html
- fi-cml-u2: NOTRUN -> [FAIL][4]
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14630/fi-cml-u2/igt@runner@aborted.html
- fi-cfl-8700k: NOTRUN -> [FAIL][5]
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14630/fi-cfl-8700k/igt@runner@aborted.html
- fi-kbl-8809g: NOTRUN -> [FAIL][6]
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14630/fi-kbl-8809g/igt@runner@aborted.html
#### Suppressed ####
The following results come from untrusted machines, tests, or statuses.
They do not affect the overall result.
* igt@runner@aborted:
- {fi-cml-s}: NOTRUN -> [FAIL][7]
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14630/fi-cml-s/igt@runner@aborted.html
Known issues
------------
Here are the changes found in Patchwork_14630 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_exec_suspend@basic-s4-devices:
- fi-blb-e6850: [PASS][8] -> [INCOMPLETE][9] ([fdo#107718])
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6991/fi-blb-e6850/igt@gem_exec_suspend@basic-s4-devices.html
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14630/fi-blb-e6850/igt@gem_exec_suspend@basic-s4-devices.html
* igt@gem_flink_basic@basic:
- fi-icl-u3: [PASS][10] -> [DMESG-WARN][11] ([fdo#107724]) +2 similar issues
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6991/fi-icl-u3/igt@gem_flink_basic@basic.html
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14630/fi-icl-u3/igt@gem_flink_basic@basic.html
* igt@i915_selftest@live_execlists:
- fi-cfl-8700k: [PASS][12] -> [INCOMPLETE][13] ([fdo#110977])
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6991/fi-cfl-8700k/igt@i915_selftest@live_execlists.html
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14630/fi-cfl-8700k/igt@i915_selftest@live_execlists.html
- fi-icl-u2: [PASS][14] -> [INCOMPLETE][15] ([fdo#107713])
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6991/fi-icl-u2/igt@i915_selftest@live_execlists.html
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14630/fi-icl-u2/igt@i915_selftest@live_execlists.html
- fi-cfl-guc: [PASS][16] -> [INCOMPLETE][17] ([fdo#110977])
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6991/fi-cfl-guc/igt@i915_selftest@live_execlists.html
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14630/fi-cfl-guc/igt@i915_selftest@live_execlists.html
- fi-icl-u3: [PASS][18] -> [INCOMPLETE][19] ([fdo#107713])
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6991/fi-icl-u3/igt@i915_selftest@live_execlists.html
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14630/fi-icl-u3/igt@i915_selftest@live_execlists.html
- fi-kbl-8809g: [PASS][20] -> [INCOMPLETE][21] ([fdo#108767])
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6991/fi-kbl-8809g/igt@i915_selftest@live_execlists.html
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14630/fi-kbl-8809g/igt@i915_selftest@live_execlists.html
- fi-apl-guc: [PASS][22] -> [INCOMPLETE][23] ([fdo#103927])
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6991/fi-apl-guc/igt@i915_selftest@live_execlists.html
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14630/fi-apl-guc/igt@i915_selftest@live_execlists.html
- fi-cml-u2: [PASS][24] -> [INCOMPLETE][25] ([fdo#110566])
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6991/fi-cml-u2/igt@i915_selftest@live_execlists.html
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14630/fi-cml-u2/igt@i915_selftest@live_execlists.html
#### Possible fixes ####
* igt@gem_mmap_gtt@basic-small-bo-tiledx:
- fi-icl-u3: [DMESG-WARN][26] ([fdo#107724]) -> [PASS][27] +1 similar issue
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6991/fi-icl-u3/igt@gem_mmap_gtt@basic-small-bo-tiledx.html
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14630/fi-icl-u3/igt@gem_mmap_gtt@basic-small-bo-tiledx.html
* igt@kms_chamelium@hdmi-crc-fast:
- {fi-icl-u4}: [FAIL][28] ([fdo#111045]) -> [PASS][29]
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6991/fi-icl-u4/igt@kms_chamelium@hdmi-crc-fast.html
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14630/fi-icl-u4/igt@kms_chamelium@hdmi-crc-fast.html
- fi-icl-u2: [FAIL][30] ([fdo#109635 ]) -> [PASS][31]
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6991/fi-icl-u2/igt@kms_chamelium@hdmi-crc-fast.html
[31]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14630/fi-icl-u2/igt@kms_chamelium@hdmi-crc-fast.html
* igt@kms_chamelium@hdmi-hpd-fast:
- fi-icl-u2: [FAIL][32] ([fdo#109483]) -> [PASS][33] +1 similar issue
[32]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6991/fi-icl-u2/igt@kms_chamelium@hdmi-hpd-fast.html
[33]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14630/fi-icl-u2/igt@kms_chamelium@hdmi-hpd-fast.html
- fi-kbl-7500u: [FAIL][34] ([fdo#111045] / [fdo#111096]) -> [PASS][35]
[34]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6991/fi-kbl-7500u/igt@kms_chamelium@hdmi-hpd-fast.html
[35]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14630/fi-kbl-7500u/igt@kms_chamelium@hdmi-hpd-fast.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#103927]: https://bugs.freedesktop.org/show_bug.cgi?id=103927
[fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713
[fdo#107718]: https://bugs.freedesktop.org/show_bug.cgi?id=107718
[fdo#107724]: https://bugs.freedesktop.org/show_bug.cgi?id=107724
[fdo#108767]: https://bugs.freedesktop.org/show_bug.cgi?id=108767
[fdo#109483]: https://bugs.freedesktop.org/show_bug.cgi?id=109483
[fdo#109635 ]: https://bugs.freedesktop.org/show_bug.cgi?id=109635
[fdo#110566]: https://bugs.freedesktop.org/show_bug.cgi?id=110566
[fdo#110977]: https://bugs.freedesktop.org/show_bug.cgi?id=110977
[fdo#111045]: https://bugs.freedesktop.org/show_bug.cgi?id=111045
[fdo#111096]: https://bugs.freedesktop.org/show_bug.cgi?id=111096
[fdo#111647]: https://bugs.freedesktop.org/show_bug.cgi?id=111647
Participating hosts (51 -> 45)
------------------------------
Additional (1): fi-kbl-soraka
Missing (7): fi-ilk-m540 fi-hsw-4200u fi-bsw-n3050 fi-byt-squawks fi-bsw-cyan fi-byt-clapper fi-bdw-samus
Build changes
-------------
* CI: CI-20190529 -> None
* Linux: CI_DRM_6991 -> Patchwork_14630
CI-20190529: 20190529
CI_DRM_6991: 1f02b477cc08d4560a0c2cf6cc98340e09c7c734 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_5209: ec639c89860b859fdf4b038c2fa8ad593bd6909e @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_14630: 1ec027c39354e10a85abf9414e50067fb3ed9738 @ git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
1ec027c39354 drm/i915/selftests: Exercise potential false lite-restore
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14630/index.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 25+ messages in thread
* [PATCH v3] drm/i915/selftests: Exercise potential false lite-restore
2019-10-01 15:53 ` Chris Wilson
` (3 preceding siblings ...)
2019-10-02 13:56 ` Chris Wilson
@ 2019-10-02 18:34 ` Chris Wilson
4 siblings, 0 replies; 25+ messages in thread
From: Chris Wilson @ 2019-10-02 18:34 UTC (permalink / raw)
To: intel-gfx
If execlists's lite-restore is based on the common GEM context tag
rather than the per-intel_context LRCA, then a context switch between
two intel_contexts on the same engine derived from the same GEM context
will perform a lite-restore instead of a full context switch. We can
exploit this by poisoning the ringbuffer of the first context and trying
to trick a simple RING_TAIL update (i.e. lite-restore)
v2: Also check what happens if preempt ce[0] with ce[1] (both instances
on the same engine from the same parent context) [Tvrtko]
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
---
Assert postfix as tail isn't written until submit. Oops.
---
drivers/gpu/drm/i915/gt/intel_lrc.c | 18 ++-
drivers/gpu/drm/i915/gt/selftest_lrc.c | 180 +++++++++++++++++++++++++
2 files changed, 194 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_lrc.c b/drivers/gpu/drm/i915/gt/intel_lrc.c
index 9877b6ba13df..431d3b8c3371 100644
--- a/drivers/gpu/drm/i915/gt/intel_lrc.c
+++ b/drivers/gpu/drm/i915/gt/intel_lrc.c
@@ -235,6 +235,16 @@ static void execlists_init_reg_state(u32 *reg_state,
const struct intel_ring *ring,
bool close);
+static void __context_pin_acquire(struct intel_context *ce)
+{
+ mutex_acquire(&ce->pin_mutex.dep_map, 2, 0, _RET_IP_);
+}
+
+static void __context_pin_release(struct intel_context *ce)
+{
+ mutex_release(&ce->pin_mutex.dep_map, 0, _RET_IP_);
+}
+
static void mark_eio(struct i915_request *rq)
{
if (!i915_request_signaled(rq))
@@ -2761,7 +2771,7 @@ static void __execlists_reset(struct intel_engine_cs *engine, bool stalled)
GEM_BUG_ON(!i915_vma_is_pinned(ce->state));
/* Proclaim we have exclusive access to the context image! */
- mutex_acquire(&ce->pin_mutex.dep_map, 2, 0, _THIS_IP_);
+ __context_pin_acquire(ce);
rq = active_request(rq);
if (!rq) {
@@ -2825,7 +2835,7 @@ static void __execlists_reset(struct intel_engine_cs *engine, bool stalled)
__execlists_reset_reg_state(ce, engine);
__execlists_update_reg_state(ce, engine);
ce->lrc_desc |= CTX_DESC_FORCE_RESTORE; /* paranoid: GPU was reset! */
- mutex_release(&ce->pin_mutex.dep_map, 0, _THIS_IP_);
+ __context_pin_release(ce);
unwind:
/* Push back any incomplete requests for replay after the reset. */
@@ -4439,7 +4449,7 @@ void intel_lr_context_reset(struct intel_engine_cs *engine,
bool scrub)
{
GEM_BUG_ON(!intel_context_is_pinned(ce));
- mutex_acquire(&ce->pin_mutex.dep_map, 2, 0, _THIS_IP_);
+ __context_pin_acquire(ce);
/*
* We want a simple context + ring to execute the breadcrumb update.
@@ -4465,7 +4475,7 @@ void intel_lr_context_reset(struct intel_engine_cs *engine,
intel_ring_update_space(ce->ring);
__execlists_update_reg_state(ce, engine);
- mutex_release(&ce->pin_mutex.dep_map, 0, _THIS_IP_);
+ __context_pin_release(ce);
}
#if IS_ENABLED(CONFIG_DRM_I915_SELFTEST)
diff --git a/drivers/gpu/drm/i915/gt/selftest_lrc.c b/drivers/gpu/drm/i915/gt/selftest_lrc.c
index 93f2fcdc49bf..e7bc2dbbb2a5 100644
--- a/drivers/gpu/drm/i915/gt/selftest_lrc.c
+++ b/drivers/gpu/drm/i915/gt/selftest_lrc.c
@@ -79,6 +79,184 @@ static int live_sanitycheck(void *arg)
return err;
}
+static int live_unlite_restore(struct drm_i915_private *i915, int prio)
+{
+ struct intel_engine_cs *engine;
+ struct i915_gem_context *ctx;
+ enum intel_engine_id id;
+ intel_wakeref_t wakeref;
+ struct igt_spinner spin;
+ int err = -ENOMEM;
+
+ /*
+ * Check that we can correctly context switch between 2 instances
+ * on the same engine from the same parent context.
+ */
+
+ mutex_lock(&i915->drm.struct_mutex);
+ wakeref = intel_runtime_pm_get(&i915->runtime_pm);
+
+ if (igt_spinner_init(&spin, &i915->gt))
+ goto err_unlock;
+
+ ctx = kernel_context(i915);
+ if (!ctx)
+ goto err_spin;
+
+ err = 0;
+ for_each_engine(engine, i915, id) {
+ struct intel_context *ce[2] = {};
+ struct i915_request *rq[2];
+ struct igt_live_test t;
+ int n;
+
+ if (prio && !intel_engine_has_preemption(engine))
+ continue;
+
+ if (!intel_engine_can_store_dword(engine))
+ continue;
+
+ if (igt_live_test_begin(&t, i915, __func__, engine->name)) {
+ err = -EIO;
+ break;
+ }
+
+ for (n = 0; n < ARRAY_SIZE(ce); n++) {
+ struct intel_context *tmp;
+
+ tmp = intel_context_create(ctx, engine);
+ if (IS_ERR(tmp)) {
+ err = PTR_ERR(tmp);
+ goto err_ce;
+ }
+
+ err = intel_context_pin(tmp);
+ if (err) {
+ intel_context_put(tmp);
+ goto err_ce;
+ }
+
+ /*
+ * Setup the pair of contexts such that if we
+ * lite-restore using the RING_TAIL from ce[1] it
+ * will execute garbage from ce[0]->ring.
+ */
+ memset(tmp->ring->vaddr,
+ POISON_INUSE, /* IPEHR: 0x5a5a5a5a [hung!] */
+ tmp->ring->vma->size);
+
+ ce[n] = tmp;
+ }
+ GEM_BUG_ON(!ce[1]->ring->size);
+ intel_ring_reset(ce[1]->ring, ce[1]->ring->size / 2);
+
+ local_bh_disable(); /* appease lockdep */
+ __context_pin_acquire(ce[1]);
+ __execlists_update_reg_state(ce[1], engine);
+ __context_pin_release(ce[1]);
+ local_bh_enable();
+
+ rq[0] = igt_spinner_create_request(&spin, ce[0], MI_ARB_CHECK);
+ if (IS_ERR(rq[0])) {
+ err = PTR_ERR(rq[0]);
+ goto err_ce;
+ }
+
+ i915_request_get(rq[0]);
+ i915_request_add(rq[0]);
+ GEM_BUG_ON(rq[0]->postfix > ce[1]->ring->emit);
+
+ if (!igt_wait_for_spinner(&spin, rq[0])) {
+ i915_request_put(rq[0]);
+ goto err_ce;
+ }
+
+ rq[1] = i915_request_create(ce[1]);
+ if (IS_ERR(rq[1])) {
+ err = PTR_ERR(rq[1]);
+ i915_request_put(rq[0]);
+ goto err_ce;
+ }
+
+ if (!prio) {
+ /*
+ * Ensure we do the switch to ce[1] on completion.
+ *
+ * rq[0] is already submitted, so this should reduce
+ * to a no-op (a wait on a request on the same engine
+ * uses the submit fence, not the completion fence),
+ * but it will install a dependency on rq[1] for rq[0]
+ * that will prevent the pair being reordered by
+ * timeslicing.
+ */
+ i915_request_await_dma_fence(rq[1], &rq[0]->fence);
+ }
+
+ i915_request_get(rq[1]);
+ i915_request_add(rq[1]);
+ GEM_BUG_ON(rq[1]->postfix <= rq[0]->postfix);
+ i915_request_put(rq[0]);
+
+ if (prio) {
+ struct i915_sched_attr attr = {
+ .priority = prio,
+ };
+
+ /* Alternatively preempt the spinner with ce[1] */
+ engine->schedule(rq[1], &attr);
+ }
+
+ /* And switch back to ce[0] for good measure */
+ rq[0] = i915_request_create(ce[0]);
+ if (IS_ERR(rq[0])) {
+ err = PTR_ERR(rq[0]);
+ i915_request_put(rq[1]);
+ goto err_ce;
+ }
+
+ i915_request_await_dma_fence(rq[0], &rq[1]->fence);
+ i915_request_get(rq[0]);
+ i915_request_add(rq[0]);
+ GEM_BUG_ON(rq[0]->postfix > rq[1]->postfix);
+ i915_request_put(rq[1]);
+ i915_request_put(rq[0]);
+
+err_ce:
+ tasklet_kill(&engine->execlists.tasklet); /* flush submission */
+ igt_spinner_end(&spin);
+ for (n = 0; n < ARRAY_SIZE(ce); n++) {
+ if (IS_ERR_OR_NULL(ce[n]))
+ break;
+
+ intel_context_unpin(ce[n]);
+ intel_context_put(ce[n]);
+ }
+
+ if (igt_live_test_end(&t))
+ err = -EIO;
+ if (err)
+ break;
+ }
+
+ kernel_context_close(ctx);
+err_spin:
+ igt_spinner_fini(&spin);
+err_unlock:
+ intel_runtime_pm_put(&i915->runtime_pm, wakeref);
+ mutex_unlock(&i915->drm.struct_mutex);
+ return err;
+}
+
+static int live_unlite_switch(void *arg)
+{
+ return live_unlite_restore(arg, 0);
+}
+
+static int live_unlite_preempt(void *arg)
+{
+ return live_unlite_restore(arg, I915_USER_PRIORITY(I915_PRIORITY_MAX));
+}
+
static int
emit_semaphore_chain(struct i915_request *rq, struct i915_vma *vma, int idx)
{
@@ -2178,6 +2356,8 @@ int intel_execlists_live_selftests(struct drm_i915_private *i915)
{
static const struct i915_subtest tests[] = {
SUBTEST(live_sanitycheck),
+ SUBTEST(live_unlite_switch),
+ SUBTEST(live_unlite_preempt),
SUBTEST(live_timeslice_preempt),
SUBTEST(live_busywait_preempt),
SUBTEST(live_preempt),
--
2.23.0
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 25+ messages in thread
* ✓ Fi.CI.BAT: success for drm/i915/selftests: Exercise potential false lite-restore (rev9)
2019-10-01 9:45 [PATCH] drm/i915/selftests: Exercise potential false lite-restore Chris Wilson
` (11 preceding siblings ...)
2019-10-02 18:24 ` ✗ Fi.CI.BAT: failure for drm/i915/selftests: Exercise potential false lite-restore (rev8) Patchwork
@ 2019-10-02 23:21 ` Patchwork
2019-10-03 8:03 ` ✗ Fi.CI.IGT: failure " Patchwork
13 siblings, 0 replies; 25+ messages in thread
From: Patchwork @ 2019-10-02 23:21 UTC (permalink / raw)
To: Chris Wilson; +Cc: intel-gfx
== Series Details ==
Series: drm/i915/selftests: Exercise potential false lite-restore (rev9)
URL : https://patchwork.freedesktop.org/series/67438/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_6992 -> Patchwork_14638
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14638/index.html
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in Patchwork_14638:
### IGT changes ###
#### Suppressed ####
The following results come from untrusted machines, tests, or statuses.
They do not affect the overall result.
* igt@i915_selftest@live_gem_contexts:
- {fi-tgl-u}: NOTRUN -> [INCOMPLETE][1]
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14638/fi-tgl-u/igt@i915_selftest@live_gem_contexts.html
Known issues
------------
Here are the changes found in Patchwork_14638 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_ctx_switch@rcs0:
- fi-bxt-dsi: [PASS][2] -> [INCOMPLETE][3] ([fdo#103927])
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6992/fi-bxt-dsi/igt@gem_ctx_switch@rcs0.html
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14638/fi-bxt-dsi/igt@gem_ctx_switch@rcs0.html
* igt@gem_exec_suspend@basic-s4-devices:
- fi-icl-u3: [PASS][4] -> [DMESG-WARN][5] ([fdo#107724]) +3 similar issues
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6992/fi-icl-u3/igt@gem_exec_suspend@basic-s4-devices.html
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14638/fi-icl-u3/igt@gem_exec_suspend@basic-s4-devices.html
* igt@i915_selftest@live_hangcheck:
- fi-kbl-r: [PASS][6] -> [INCOMPLETE][7] ([fdo#108744])
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6992/fi-kbl-r/igt@i915_selftest@live_hangcheck.html
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14638/fi-kbl-r/igt@i915_selftest@live_hangcheck.html
* igt@kms_frontbuffer_tracking@basic:
- fi-icl-u3: [PASS][8] -> [FAIL][9] ([fdo#103167])
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6992/fi-icl-u3/igt@kms_frontbuffer_tracking@basic.html
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14638/fi-icl-u3/igt@kms_frontbuffer_tracking@basic.html
#### Possible fixes ####
* igt@gem_mmap_gtt@basic:
- fi-icl-u3: [DMESG-WARN][10] ([fdo#107724]) -> [PASS][11] +1 similar issue
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6992/fi-icl-u3/igt@gem_mmap_gtt@basic.html
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14638/fi-icl-u3/igt@gem_mmap_gtt@basic.html
* {igt@i915_selftest@live_gt_timelines}:
- {fi-tgl-u}: [INCOMPLETE][12] ([fdo#111831]) -> [PASS][13]
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6992/fi-tgl-u/igt@i915_selftest@live_gt_timelines.html
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14638/fi-tgl-u/igt@i915_selftest@live_gt_timelines.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#102505]: https://bugs.freedesktop.org/show_bug.cgi?id=102505
[fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167
[fdo#103927]: https://bugs.freedesktop.org/show_bug.cgi?id=103927
[fdo#107724]: https://bugs.freedesktop.org/show_bug.cgi?id=107724
[fdo#108744]: https://bugs.freedesktop.org/show_bug.cgi?id=108744
[fdo#111045]: https://bugs.freedesktop.org/show_bug.cgi?id=111045
[fdo#111049]: https://bugs.freedesktop.org/show_bug.cgi?id=111049
[fdo#111831]: https://bugs.freedesktop.org/show_bug.cgi?id=111831
Participating hosts (51 -> 44)
------------------------------
Additional (1): fi-kbl-7500u
Missing (8): fi-ilk-m540 fi-hsw-4200u fi-bdw-gvtdvm fi-byt-squawks fi-bsw-cyan fi-icl-y fi-byt-clapper fi-bdw-samus
Build changes
-------------
* CI: CI-20190529 -> None
* Linux: CI_DRM_6992 -> Patchwork_14638
CI-20190529: 20190529
CI_DRM_6992: 7116520f059e12d50596bdbe73b48ba8e8d50daf @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_5210: 74f55119f9920b65996535210a09147997804136 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_14638: 8108e4e9d01b2c3fb43298e1082a2d1bef524eea @ git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
8108e4e9d01b drm/i915/selftests: Exercise potential false lite-restore
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14638/index.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 25+ messages in thread
* ✗ Fi.CI.IGT: failure for drm/i915/selftests: Exercise potential false lite-restore (rev9)
2019-10-01 9:45 [PATCH] drm/i915/selftests: Exercise potential false lite-restore Chris Wilson
` (12 preceding siblings ...)
2019-10-02 23:21 ` ✓ Fi.CI.BAT: success for drm/i915/selftests: Exercise potential false lite-restore (rev9) Patchwork
@ 2019-10-03 8:03 ` Patchwork
13 siblings, 0 replies; 25+ messages in thread
From: Patchwork @ 2019-10-03 8:03 UTC (permalink / raw)
To: Chris Wilson; +Cc: intel-gfx
== Series Details ==
Series: drm/i915/selftests: Exercise potential false lite-restore (rev9)
URL : https://patchwork.freedesktop.org/series/67438/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_6992_full -> Patchwork_14638_full
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with Patchwork_14638_full absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_14638_full, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in Patchwork_14638_full:
### IGT changes ###
#### Possible regressions ####
* igt@gem_mmap_gtt@hang:
- shard-kbl: [PASS][1] -> [DMESG-WARN][2]
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6992/shard-kbl1/igt@gem_mmap_gtt@hang.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14638/shard-kbl6/igt@gem_mmap_gtt@hang.html
Known issues
------------
Here are the changes found in Patchwork_14638_full that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_exec_schedule@preempt-other-chain-bsd:
- shard-iclb: [PASS][3] -> [SKIP][4] ([fdo#111325]) +6 similar issues
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6992/shard-iclb8/igt@gem_exec_schedule@preempt-other-chain-bsd.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14638/shard-iclb2/igt@gem_exec_schedule@preempt-other-chain-bsd.html
* igt@gem_userptr_blits@map-fixed-invalidate-overlap-busy:
- shard-hsw: [PASS][5] -> [DMESG-WARN][6] ([fdo#111870]) +1 similar issue
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6992/shard-hsw6/igt@gem_userptr_blits@map-fixed-invalidate-overlap-busy.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14638/shard-hsw5/igt@gem_userptr_blits@map-fixed-invalidate-overlap-busy.html
* igt@gem_userptr_blits@sync-unmap:
- shard-snb: [PASS][7] -> [DMESG-WARN][8] ([fdo#111870]) +1 similar issue
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6992/shard-snb6/igt@gem_userptr_blits@sync-unmap.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14638/shard-snb6/igt@gem_userptr_blits@sync-unmap.html
* igt@gem_userptr_blits@sync-unmap-cycles:
- shard-apl: [PASS][9] -> [DMESG-WARN][10] ([fdo#109385] / [fdo#111870])
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6992/shard-apl4/igt@gem_userptr_blits@sync-unmap-cycles.html
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14638/shard-apl4/igt@gem_userptr_blits@sync-unmap-cycles.html
* igt@kms_atomic_transition@plane-all-modeset-transition-fencing:
- shard-apl: [PASS][11] -> [INCOMPLETE][12] ([fdo#103927]) +1 similar issue
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6992/shard-apl2/igt@kms_atomic_transition@plane-all-modeset-transition-fencing.html
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14638/shard-apl3/igt@kms_atomic_transition@plane-all-modeset-transition-fencing.html
* igt@kms_color@pipe-a-legacy-gamma:
- shard-kbl: [PASS][13] -> [FAIL][14] ([fdo#104782] / [fdo#108145])
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6992/shard-kbl1/igt@kms_color@pipe-a-legacy-gamma.html
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14638/shard-kbl6/igt@kms_color@pipe-a-legacy-gamma.html
* igt@kms_flip@flip-vs-expired-vblank-interruptible:
- shard-skl: [PASS][15] -> [FAIL][16] ([fdo#105363])
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6992/shard-skl7/igt@kms_flip@flip-vs-expired-vblank-interruptible.html
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14638/shard-skl2/igt@kms_flip@flip-vs-expired-vblank-interruptible.html
* igt@kms_frontbuffer_tracking@fbc-modesetfrombusy:
- shard-iclb: [PASS][17] -> [FAIL][18] ([fdo#103167]) +3 similar issues
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6992/shard-iclb2/igt@kms_frontbuffer_tracking@fbc-modesetfrombusy.html
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14638/shard-iclb4/igt@kms_frontbuffer_tracking@fbc-modesetfrombusy.html
* igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min:
- shard-skl: [PASS][19] -> [FAIL][20] ([fdo#108145])
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6992/shard-skl2/igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min.html
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14638/shard-skl8/igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min.html
* igt@kms_plane_alpha_blend@pipe-c-coverage-7efc:
- shard-skl: [PASS][21] -> [FAIL][22] ([fdo#108145] / [fdo#110403]) +1 similar issue
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6992/shard-skl7/igt@kms_plane_alpha_blend@pipe-c-coverage-7efc.html
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14638/shard-skl2/igt@kms_plane_alpha_blend@pipe-c-coverage-7efc.html
* igt@kms_psr@psr2_sprite_plane_move:
- shard-iclb: [PASS][23] -> [SKIP][24] ([fdo#109441]) +1 similar issue
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6992/shard-iclb2/igt@kms_psr@psr2_sprite_plane_move.html
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14638/shard-iclb8/igt@kms_psr@psr2_sprite_plane_move.html
* igt@kms_vblank@pipe-a-ts-continuation-suspend:
- shard-apl: [PASS][25] -> [DMESG-WARN][26] ([fdo#108566]) +3 similar issues
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6992/shard-apl8/igt@kms_vblank@pipe-a-ts-continuation-suspend.html
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14638/shard-apl7/igt@kms_vblank@pipe-a-ts-continuation-suspend.html
* igt@prime_vgem@fence-wait-bsd2:
- shard-iclb: [PASS][27] -> [SKIP][28] ([fdo#109276]) +17 similar issues
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6992/shard-iclb4/igt@prime_vgem@fence-wait-bsd2.html
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14638/shard-iclb6/igt@prime_vgem@fence-wait-bsd2.html
#### Possible fixes ####
* igt@gem_ctx_shared@exec-single-timeline-bsd:
- shard-iclb: [SKIP][29] ([fdo#110841]) -> [PASS][30]
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6992/shard-iclb1/igt@gem_ctx_shared@exec-single-timeline-bsd.html
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14638/shard-iclb8/igt@gem_ctx_shared@exec-single-timeline-bsd.html
* igt@gem_eio@in-flight-suspend:
- shard-snb: [INCOMPLETE][31] ([fdo#105411]) -> [PASS][32] +1 similar issue
[31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6992/shard-snb1/igt@gem_eio@in-flight-suspend.html
[32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14638/shard-snb7/igt@gem_eio@in-flight-suspend.html
* igt@gem_exec_schedule@reorder-wide-bsd:
- shard-iclb: [SKIP][33] ([fdo#111325]) -> [PASS][34] +6 similar issues
[33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6992/shard-iclb2/igt@gem_exec_schedule@reorder-wide-bsd.html
[34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14638/shard-iclb5/igt@gem_exec_schedule@reorder-wide-bsd.html
* igt@gem_mmap_gtt@basic-small-copy:
- shard-snb: [DMESG-WARN][35] -> [PASS][36]
[35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6992/shard-snb1/igt@gem_mmap_gtt@basic-small-copy.html
[36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14638/shard-snb5/igt@gem_mmap_gtt@basic-small-copy.html
* igt@gem_softpin@noreloc-s3:
- shard-skl: [INCOMPLETE][37] ([fdo#104108]) -> [PASS][38] +1 similar issue
[37]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6992/shard-skl2/igt@gem_softpin@noreloc-s3.html
[38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14638/shard-skl8/igt@gem_softpin@noreloc-s3.html
* igt@gem_userptr_blits@map-fixed-invalidate-busy:
- shard-snb: [DMESG-WARN][39] ([fdo#111870]) -> [PASS][40]
[39]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6992/shard-snb1/igt@gem_userptr_blits@map-fixed-invalidate-busy.html
[40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14638/shard-snb7/igt@gem_userptr_blits@map-fixed-invalidate-busy.html
- shard-hsw: [DMESG-WARN][41] ([fdo#111870]) -> [PASS][42]
[41]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6992/shard-hsw1/igt@gem_userptr_blits@map-fixed-invalidate-busy.html
[42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14638/shard-hsw2/igt@gem_userptr_blits@map-fixed-invalidate-busy.html
* igt@gem_userptr_blits@map-fixed-invalidate-overlap-busy-gup:
- shard-apl: [DMESG-WARN][43] ([fdo#109385] / [fdo#111870]) -> [PASS][44]
[43]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6992/shard-apl1/igt@gem_userptr_blits@map-fixed-invalidate-overlap-busy-gup.html
[44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14638/shard-apl1/igt@gem_userptr_blits@map-fixed-invalidate-overlap-busy-gup.html
* igt@gem_userptr_blits@sync-unmap-cycles:
- shard-kbl: [DMESG-WARN][45] ([fdo#111870]) -> [PASS][46]
[45]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6992/shard-kbl6/igt@gem_userptr_blits@sync-unmap-cycles.html
[46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14638/shard-kbl6/igt@gem_userptr_blits@sync-unmap-cycles.html
* igt@i915_pm_rpm@modeset-stress-extra-wait:
- shard-glk: [DMESG-WARN][47] ([fdo#105763] / [fdo#106538]) -> [PASS][48]
[47]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6992/shard-glk8/igt@i915_pm_rpm@modeset-stress-extra-wait.html
[48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14638/shard-glk7/igt@i915_pm_rpm@modeset-stress-extra-wait.html
* igt@i915_suspend@sysfs-reader:
- shard-apl: [DMESG-WARN][49] ([fdo#108566]) -> [PASS][50] +3 similar issues
[49]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6992/shard-apl8/igt@i915_suspend@sysfs-reader.html
[50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14638/shard-apl7/igt@i915_suspend@sysfs-reader.html
* igt@kms_atomic_interruptible@universal-setplane-primary:
- shard-hsw: [DMESG-WARN][51] ([fdo#102614]) -> [PASS][52]
[51]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6992/shard-hsw5/igt@kms_atomic_interruptible@universal-setplane-primary.html
[52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14638/shard-hsw6/igt@kms_atomic_interruptible@universal-setplane-primary.html
* igt@kms_cursor_crc@pipe-a-cursor-256x85-onscreen:
- shard-apl: [FAIL][53] ([fdo#103232]) -> [PASS][54]
[53]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6992/shard-apl2/igt@kms_cursor_crc@pipe-a-cursor-256x85-onscreen.html
[54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14638/shard-apl8/igt@kms_cursor_crc@pipe-a-cursor-256x85-onscreen.html
* igt@kms_cursor_legacy@2x-nonblocking-modeset-vs-cursor-atomic:
- shard-glk: [FAIL][55] ([fdo#106509] / [fdo#107409]) -> [PASS][56]
[55]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6992/shard-glk4/igt@kms_cursor_legacy@2x-nonblocking-modeset-vs-cursor-atomic.html
[56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14638/shard-glk6/igt@kms_cursor_legacy@2x-nonblocking-modeset-vs-cursor-atomic.html
* igt@kms_flip@2x-flip-vs-expired-vblank:
- shard-glk: [FAIL][57] ([fdo#105363]) -> [PASS][58]
[57]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6992/shard-glk7/igt@kms_flip@2x-flip-vs-expired-vblank.html
[58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14638/shard-glk7/igt@kms_flip@2x-flip-vs-expired-vblank.html
* igt@kms_frontbuffer_tracking@fbc-1p-pri-indfb-multidraw:
- shard-iclb: [FAIL][59] ([fdo#103167]) -> [PASS][60] +2 similar issues
[59]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6992/shard-iclb1/igt@kms_frontbuffer_tracking@fbc-1p-pri-indfb-multidraw.html
[60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14638/shard-iclb3/igt@kms_frontbuffer_tracking@fbc-1p-pri-indfb-multidraw.html
* igt@kms_frontbuffer_tracking@fbcpsr-1p-rte:
- shard-iclb: [FAIL][61] ([fdo#103167] / [fdo#110378]) -> [PASS][62]
[61]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6992/shard-iclb6/igt@kms_frontbuffer_tracking@fbcpsr-1p-rte.html
[62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14638/shard-iclb3/igt@kms_frontbuffer_tracking@fbcpsr-1p-rte.html
* igt@kms_psr@no_drrs:
- shard-iclb: [FAIL][63] ([fdo#108341]) -> [PASS][64]
[63]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6992/shard-iclb1/igt@kms_psr@no_drrs.html
[64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14638/shard-iclb8/igt@kms_psr@no_drrs.html
* igt@kms_psr@psr2_primary_mmap_cpu:
- shard-iclb: [SKIP][65] ([fdo#109441]) -> [PASS][66] +3 similar issues
[65]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6992/shard-iclb1/igt@kms_psr@psr2_primary_mmap_cpu.html
[66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14638/shard-iclb2/igt@kms_psr@psr2_primary_mmap_cpu.html
* igt@kms_vblank@pipe-b-ts-continuation-suspend:
- shard-iclb: [INCOMPLETE][67] ([fdo#107713]) -> [PASS][68]
[67]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6992/shard-iclb7/igt@kms_vblank@pipe-b-ts-continuation-suspend.html
[68]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14638/shard-iclb6/igt@kms_vblank@pipe-b-ts-continuation-suspend.html
* igt@prime_busy@hang-bsd2:
- shard-iclb: [SKIP][69] ([fdo#109276]) -> [PASS][70] +18 similar issues
[69]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6992/shard-iclb7/igt@prime_busy@hang-bsd2.html
[70]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14638/shard-iclb1/igt@prime_busy@hang-bsd2.html
#### Warnings ####
* igt@gem_ctx_isolation@vcs1-nonpriv:
- shard-iclb: [SKIP][71] ([fdo#109276]) -> [FAIL][72] ([fdo#111329])
[71]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6992/shard-iclb7/igt@gem_ctx_isolation@vcs1-nonpriv.html
[72]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14638/shard-iclb1/igt@gem_ctx_isolation@vcs1-nonpriv.html
* igt@gem_mocs_settings@mocs-reset-bsd2:
- shard-iclb: [SKIP][73] ([fdo#109276]) -> [FAIL][74] ([fdo#111330])
[73]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6992/shard-iclb8/igt@gem_mocs_settings@mocs-reset-bsd2.html
[74]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14638/shard-iclb2/igt@gem_mocs_settings@mocs-reset-bsd2.html
* igt@kms_chamelium@dp-edid-read:
- shard-iclb: [SKIP][75] ([fdo#109284]) -> [INCOMPLETE][76] ([fdo#107713])
[75]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6992/shard-iclb3/igt@kms_chamelium@dp-edid-read.html
[76]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14638/shard-iclb1/igt@kms_chamelium@dp-edid-read.html
* igt@kms_dp_dsc@basic-dsc-enable-edp:
- shard-iclb: [DMESG-WARN][77] ([fdo#107724]) -> [SKIP][78] ([fdo#109349])
[77]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6992/shard-iclb2/igt@kms_dp_dsc@basic-dsc-enable-edp.html
[78]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14638/shard-iclb8/igt@kms_dp_dsc@basic-dsc-enable-edp.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#102614]: https://bugs.freedesktop.org/show_bug.cgi?id=102614
[fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167
[fdo#103232]: https://bugs.freedesktop.org/show_bug.cgi?id=103232
[fdo#103927]: https://bugs.freedesktop.org/show_bug.cgi?id=103927
[fdo#104108]: https://bugs.freedesktop.org/show_bug.cgi?id=104108
[fdo#104782]: https://bugs.freedesktop.org/show_bug.cgi?id=104782
[fdo#105363]: https://bugs.freedesktop.org/show_bug.cgi?id=105363
[fdo#105411]: https://bugs.freedesktop.org/show_bug.cgi?id=105411
[fdo#105763]: https://bugs.freedesktop.org/show_bug.cgi?id=105763
[fdo#106509]: https://bugs.freedesktop.org/show_bug.cgi?id=106509
[fdo#106538]: https://bugs.freedesktop.org/show_bug.cgi?id=106538
[fdo#107409]: https://bugs.freedesktop.org/show_bug.cgi?id=107409
[fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713
[fdo#107724]: https://bugs.freedesktop.org/show_bug.cgi?id=107724
[fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145
[fdo#108341]: https://bugs.freedesktop.org/show_bug.cgi?id=108341
[fdo#108566]: https://bugs.freedesktop.org/show_bug.cgi?id=108566
[fdo#109276]: https://bugs.freedesktop.org/show_bug.cgi?id=109276
[fdo#109284]: https://bugs.freedesktop.org/show_bug.cgi?id=109284
[fdo#109349]: https://bugs.freedesktop.org/show_bug.cgi?id=109349
[fdo#109385]: https://bugs.freedesktop.org/show_bug.cgi?id=109385
[fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441
[fdo#110378]: https://bugs.freedesktop.org/show_bug.cgi?id=110378
[fdo#110403]: https://bugs.freedesktop.org/show_bug.cgi?id=110403
[fdo#110841]: https://bugs.freedesktop.org/show_bug.cgi?id=110841
[fdo#111325]: https://bugs.freedesktop.org/show_bug.cgi?id=111325
[fdo#111329]: https://bugs.freedesktop.org/show_bug.cgi?id=111329
[fdo#111330]: https://bugs.freedesktop.org/show_bug.cgi?id=111330
[fdo#111870]: https://bugs.freedesktop.org/show_bug.cgi?id=111870
Participating hosts (11 -> 10)
------------------------------
Missing (1): shard-tglb
Build changes
-------------
* CI: CI-20190529 -> None
* Linux: CI_DRM_6992 -> Patchwork_14638
CI-20190529: 20190529
CI_DRM_6992: 7116520f059e12d50596bdbe73b48ba8e8d50daf @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_5210: 74f55119f9920b65996535210a09147997804136 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_14638: 8108e4e9d01b2c3fb43298e1082a2d1bef524eea @ git://anongit.freedesktop.org/gfx-ci/linux
piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14638/index.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 25+ messages in thread
end of thread, other threads:[~2019-10-03 8:03 UTC | newest]
Thread overview: 25+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2019-10-01 9:45 [PATCH] drm/i915/selftests: Exercise potential false lite-restore Chris Wilson
2019-10-01 9:51 ` Chris Wilson
2019-10-01 12:16 ` Tvrtko Ursulin
2019-10-01 12:22 ` Chris Wilson
2019-10-01 12:30 ` Tvrtko Ursulin
2019-10-01 12:43 ` [PATCH v2] " Chris Wilson
2019-10-01 12:59 ` Tvrtko Ursulin
2019-10-01 13:08 ` Chris Wilson
2019-10-01 15:53 ` Chris Wilson
2019-10-01 21:10 ` [PATCH v3] " Chris Wilson
2019-10-02 7:35 ` Chris Wilson
2019-10-02 8:38 ` Chris Wilson
2019-10-02 13:56 ` Chris Wilson
2019-10-02 18:34 ` Chris Wilson
2019-10-01 20:30 ` ✗ Fi.CI.CHECKPATCH: warning for drm/i915/selftests: Exercise potential false lite-restore (rev4) Patchwork
2019-10-01 20:57 ` ✗ Fi.CI.BAT: failure " Patchwork
2019-10-01 23:45 ` ✗ Fi.CI.CHECKPATCH: warning for drm/i915/selftests: Exercise potential false lite-restore (rev5) Patchwork
2019-10-02 0:11 ` ✗ Fi.CI.BAT: failure " Patchwork
2019-10-02 8:03 ` ✗ Fi.CI.CHECKPATCH: warning for drm/i915/selftests: Exercise potential false lite-restore (rev6) Patchwork
2019-10-02 8:29 ` ✗ Fi.CI.BAT: failure " Patchwork
2019-10-02 8:51 ` ✗ Fi.CI.CHECKPATCH: warning for drm/i915/selftests: Exercise potential false lite-restore (rev7) Patchwork
2019-10-02 9:17 ` ✗ Fi.CI.BAT: failure " Patchwork
2019-10-02 18:24 ` ✗ Fi.CI.BAT: failure for drm/i915/selftests: Exercise potential false lite-restore (rev8) Patchwork
2019-10-02 23:21 ` ✓ Fi.CI.BAT: success for drm/i915/selftests: Exercise potential false lite-restore (rev9) Patchwork
2019-10-03 8:03 ` ✗ Fi.CI.IGT: failure " Patchwork
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