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From: Stephen Warren <swarren@wwwdotorg.org>
To: Thierry Reding <thierry.reding@gmail.com>,
	Jonathan Hunter <jonathanh@nvidia.com>,
	Peter De Schrijver <pdeschrijver@nvidia.com>,
	Prashant Gaikwad <pgaikwad@nvidia.com>
Cc: Stephen Boyd <sboyd@kernel.org>,
	linux-tegra@vger.kernel.org,
	Michael Turquette <mturquette@baylibre.com>,
	linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org
Subject: PATCH 4/4] ARM: tegra: use clk_m CPU on Tegra124 LP1 resume
Date: Tue,  1 Oct 2019 15:13:46 -0600	[thread overview]
Message-ID: <20191001211346.104400-4-swarren@wwwdotorg.org> (raw)
In-Reply-To: <20191001211346.104400-1-swarren@wwwdotorg.org>

From: Stephen Warren <swarren@nvidia.com>

Configure the clock controller to set an alternate clock for the CPU when
it receives an IRQ during LP1 (system suspend). Specifically, use clk_m
(the crystal) rather than clk_s (a 32KHz clock). Such an IRQ will be the
LP1 wake event. This reduces the amount of time taken to resume from LP1.

NVIDIA's downstream kernel executes this code on both Tegra30 and
Tegra124, so it appears OK to make this change unconditionally.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
---
 arch/arm/mach-tegra/sleep-tegra30.S | 8 ++++++--
 1 file changed, 6 insertions(+), 2 deletions(-)

diff --git a/arch/arm/mach-tegra/sleep-tegra30.S b/arch/arm/mach-tegra/sleep-tegra30.S
index 6191f9456288..ba5e9c07d1b6 100644
--- a/arch/arm/mach-tegra/sleep-tegra30.S
+++ b/arch/arm/mach-tegra/sleep-tegra30.S
@@ -670,8 +670,12 @@ tegra30_switch_cpu_to_clk32k:
 	pll_iddq_entry r1, r5, CLK_RESET_PLLX_MISC3, CLK_RESET_PLLX_MISC3_IDDQ
 _no_pll_in_iddq:
 
-	/* switch to CLKS */
-	mov	r0, #0	/* brust policy = 32KHz */
+	/*
+	 * Switch to clk_s (32KHz); bits 28:31=0
+	 * Enable burst on CPU IRQ; bit 24=1
+	 * Set IRQ burst clock source to clk_m; bits 10:8=0
+	 */
+	mov	r0, #(1 << 24)
 	str	r0, [r5, #CLK_RESET_SCLK_BURST]
 
 	ret	lr
-- 
2.23.0

WARNING: multiple messages have this Message-ID (diff)
From: Stephen Warren <swarren@wwwdotorg.org>
To: Thierry Reding <thierry.reding@gmail.com>,
	Jonathan Hunter <jonathanh@nvidia.com>,
	Peter De Schrijver <pdeschrijver@nvidia.com>,
	Prashant Gaikwad <pgaikwad@nvidia.com>
Cc: Michael Turquette <mturquette@baylibre.com>,
	Stephen Boyd <sboyd@kernel.org>,
	linux-arm-kernel@lists.infradead.org,
	linux-tegra@vger.kernel.org, linux-clk@vger.kernel.org
Subject: PATCH 4/4] ARM: tegra: use clk_m CPU on Tegra124 LP1 resume
Date: Tue,  1 Oct 2019 15:13:46 -0600	[thread overview]
Message-ID: <20191001211346.104400-4-swarren@wwwdotorg.org> (raw)
In-Reply-To: <20191001211346.104400-1-swarren@wwwdotorg.org>

From: Stephen Warren <swarren@nvidia.com>

Configure the clock controller to set an alternate clock for the CPU when
it receives an IRQ during LP1 (system suspend). Specifically, use clk_m
(the crystal) rather than clk_s (a 32KHz clock). Such an IRQ will be the
LP1 wake event. This reduces the amount of time taken to resume from LP1.

NVIDIA's downstream kernel executes this code on both Tegra30 and
Tegra124, so it appears OK to make this change unconditionally.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
---
 arch/arm/mach-tegra/sleep-tegra30.S | 8 ++++++--
 1 file changed, 6 insertions(+), 2 deletions(-)

diff --git a/arch/arm/mach-tegra/sleep-tegra30.S b/arch/arm/mach-tegra/sleep-tegra30.S
index 6191f9456288..ba5e9c07d1b6 100644
--- a/arch/arm/mach-tegra/sleep-tegra30.S
+++ b/arch/arm/mach-tegra/sleep-tegra30.S
@@ -670,8 +670,12 @@ tegra30_switch_cpu_to_clk32k:
 	pll_iddq_entry r1, r5, CLK_RESET_PLLX_MISC3, CLK_RESET_PLLX_MISC3_IDDQ
 _no_pll_in_iddq:
 
-	/* switch to CLKS */
-	mov	r0, #0	/* brust policy = 32KHz */
+	/*
+	 * Switch to clk_s (32KHz); bits 28:31=0
+	 * Enable burst on CPU IRQ; bit 24=1
+	 * Set IRQ burst clock source to clk_m; bits 10:8=0
+	 */
+	mov	r0, #(1 << 24)
 	str	r0, [r5, #CLK_RESET_SCLK_BURST]
 
 	ret	lr
-- 
2.23.0


WARNING: multiple messages have this Message-ID (diff)
From: Stephen Warren <swarren@wwwdotorg.org>
To: Thierry Reding <thierry.reding@gmail.com>,
	Jonathan Hunter <jonathanh@nvidia.com>,
	Peter De Schrijver <pdeschrijver@nvidia.com>,
	Prashant Gaikwad <pgaikwad@nvidia.com>
Cc: Stephen Boyd <sboyd@kernel.org>,
	linux-tegra@vger.kernel.org,
	Michael Turquette <mturquette@baylibre.com>,
	linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org
Subject: PATCH 4/4] ARM: tegra: use clk_m CPU on Tegra124 LP1 resume
Date: Tue,  1 Oct 2019 15:13:46 -0600	[thread overview]
Message-ID: <20191001211346.104400-4-swarren@wwwdotorg.org> (raw)
In-Reply-To: <20191001211346.104400-1-swarren@wwwdotorg.org>

From: Stephen Warren <swarren@nvidia.com>

Configure the clock controller to set an alternate clock for the CPU when
it receives an IRQ during LP1 (system suspend). Specifically, use clk_m
(the crystal) rather than clk_s (a 32KHz clock). Such an IRQ will be the
LP1 wake event. This reduces the amount of time taken to resume from LP1.

NVIDIA's downstream kernel executes this code on both Tegra30 and
Tegra124, so it appears OK to make this change unconditionally.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
---
 arch/arm/mach-tegra/sleep-tegra30.S | 8 ++++++--
 1 file changed, 6 insertions(+), 2 deletions(-)

diff --git a/arch/arm/mach-tegra/sleep-tegra30.S b/arch/arm/mach-tegra/sleep-tegra30.S
index 6191f9456288..ba5e9c07d1b6 100644
--- a/arch/arm/mach-tegra/sleep-tegra30.S
+++ b/arch/arm/mach-tegra/sleep-tegra30.S
@@ -670,8 +670,12 @@ tegra30_switch_cpu_to_clk32k:
 	pll_iddq_entry r1, r5, CLK_RESET_PLLX_MISC3, CLK_RESET_PLLX_MISC3_IDDQ
 _no_pll_in_iddq:
 
-	/* switch to CLKS */
-	mov	r0, #0	/* brust policy = 32KHz */
+	/*
+	 * Switch to clk_s (32KHz); bits 28:31=0
+	 * Enable burst on CPU IRQ; bit 24=1
+	 * Set IRQ burst clock source to clk_m; bits 10:8=0
+	 */
+	mov	r0, #(1 << 24)
 	str	r0, [r5, #CLK_RESET_SCLK_BURST]
 
 	ret	lr
-- 
2.23.0


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

  parent reply	other threads:[~2019-10-01 21:13 UTC|newest]

Thread overview: 33+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-10-01 21:13 [PATCH 1/4] clk: tegra: Enable fuse clock on Tegra124 Stephen Warren
2019-10-01 21:13 ` Stephen Warren
2019-10-01 21:13 ` Stephen Warren
2019-10-01 21:13 ` [PATCH 2/4] ARM: tegra: Enable PLLP bypass during Tegra124 LP1 Stephen Warren
2019-10-01 21:13   ` Stephen Warren
2019-10-01 21:13   ` Stephen Warren
2019-10-03 11:27   ` Dmitry Osipenko
2019-10-03 11:27     ` Dmitry Osipenko
2019-10-03 16:34     ` Stephen Warren
2019-10-03 16:34       ` Stephen Warren
2019-10-03 18:00       ` Dmitry Osipenko
2019-10-03 18:00         ` Dmitry Osipenko
2019-10-01 21:13 ` [PATCH 3/4] ARM: tegra: modify reshift divider during LP1 Stephen Warren
2019-10-01 21:13   ` Stephen Warren
2019-10-01 21:13   ` Stephen Warren
2019-10-01 21:13 ` Stephen Warren [this message]
2019-10-01 21:13   ` PATCH 4/4] ARM: tegra: use clk_m CPU on Tegra124 LP1 resume Stephen Warren
2019-10-01 21:13   ` Stephen Warren
2019-10-02 11:04 ` [PATCH 1/4] clk: tegra: Enable fuse clock on Tegra124 Thierry Reding
2019-10-02 11:04   ` Thierry Reding
2019-10-02 20:59   ` Stephen Warren
2019-10-02 20:59     ` Stephen Warren
2019-10-02 20:59     ` Stephen Warren
2019-10-04 12:18     ` Thierry Reding
2019-10-04 12:18       ` Thierry Reding
2019-10-04 16:07       ` Stephen Warren
2019-10-04 16:07         ` Stephen Warren
2019-10-04 16:07         ` Stephen Warren
     [not found] ` <20191002224944.D324720659@mail.kernel.org>
2019-10-02 23:07   ` Stephen Warren
2019-10-03 11:23 ` Dmitry Osipenko
2019-10-03 11:23   ` Dmitry Osipenko
2019-10-03 16:28   ` Stephen Warren
2019-10-03 16:28     ` Stephen Warren

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