[PATCH v10 RESEND 0/6] DC3CO Support for TGL test with DC3CO IGT

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* [PATCH v10 RESEND 0/6] DC3CO Support for TGL test with DC3CO IGT
@ 2019-10-03  8:17 Anshuman Gupta
  2019-10-03  8:17 ` [PATCH v10 1/6] drm/i915/tgl: Add DC3CO required register and bits Anshuman Gupta
                   ` (10 more replies)
  0 siblings, 11 replies; 20+ messages in thread
From: Anshuman Gupta @ 2019-10-03  8:17 UTC (permalink / raw)
  To: intel-gfx

Resending this series to test with DC3CO IGT series.
https://patchwork.freedesktop.org/series/66648/

Test-with: <1570088709-3605-2-git-send-email-jeevan.b@intel.com>

Anshuman Gupta (6):
  drm/i915/tgl: Add DC3CO required register and bits
  drm/i915/tgl: Add DC3CO mask to allowed_dc_mask and gen9_dc_mask
  drm/i915/tgl: Enable DC3CO state in "DC Off" power well
  drm/i915/tgl: Do modeset to enable and configure DC3CO exitline
  drm/i915/tgl: Switch between dc3co and dc5 based on display idleness
  drm/i915/tgl: Add DC3CO counter in i915_dmc_info

 drivers/gpu/drm/i915/display/intel_ddi.c      |  93 ++++++++++-
 drivers/gpu/drm/i915/display/intel_display.c  |   1 +
 .../drm/i915/display/intel_display_power.c    | 154 ++++++++++++++++--
 .../drm/i915/display/intel_display_power.h    |   3 +
 .../drm/i915/display/intel_display_types.h    |   1 +
 drivers/gpu/drm/i915/display/intel_psr.c      | 114 ++++++++++++-
 drivers/gpu/drm/i915/i915_debugfs.c           |   7 +
 drivers/gpu/drm/i915/i915_drv.h               |   4 +
 drivers/gpu/drm/i915/i915_params.c            |   3 +-
 drivers/gpu/drm/i915/i915_reg.h               |  10 ++
 10 files changed, 371 insertions(+), 19 deletions(-)

-- 
2.21.0

_______________________________________________
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https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 20+ messages in thread

* [PATCH v10 1/6] drm/i915/tgl: Add DC3CO required register and bits
  2019-10-03  8:17 [PATCH v10 RESEND 0/6] DC3CO Support for TGL test with DC3CO IGT Anshuman Gupta
@ 2019-10-03  8:17 ` Anshuman Gupta
  2019-10-04 15:48   ` Ville Syrjälä
  2019-10-07  9:46   ` Anshuman Gupta
  2019-10-03  8:17 ` [PATCH v10 2/6] drm/i915/tgl: Add DC3CO mask to allowed_dc_mask and gen9_dc_mask Anshuman Gupta
                   ` (9 subsequent siblings)
  10 siblings, 2 replies; 20+ messages in thread
From: Anshuman Gupta @ 2019-10-03  8:17 UTC (permalink / raw)
  To: intel-gfx

Adding following definition to i915_reg.h
1. DC_STATE_EN register DC3CO bit fields and masks.
   DC3CO enable bit will be used by driver to make DC3CO
   ready for DMC f/w and status bit will be used as DC3CO
   entry status.
2. Transcoder EXITLINE register and its bit fields and mask.
   Transcoder EXITLINE enable bit represents PSR2 idle frame
   reset should be applied at exit line and exitlines mask
   represent required number of scanlines at which DC3CO
   exit happens.

   B.Specs:49196

v1: Use of REG_BIT and using extra space for EXITLINE_ macro
    definition. [Animesh]

Cc: Jani Nikula <jani.nikula@intel.com>
Cc: Imre Deak <imre.deak@intel.com>
Cc: Animesh Manna <animesh.manna@intel.com>
Reviewed-by: Animesh Manna <animesh.manna@intel.com>
Reviewed-by: Imre Deak <imre.deak@intel.com>
Signed-off-by: Anshuman Gupta <anshuman.gupta@intel.com>
---
 drivers/gpu/drm/i915/i915_reg.h | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index eefd789b9a28..8fd93008214b 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -4144,6 +4144,7 @@ enum {
 #define _VTOTAL_A	0x6000c
 #define _VBLANK_A	0x60010
 #define _VSYNC_A	0x60014
+#define _EXITLINE_A	0x60018
 #define _PIPEASRC	0x6001c
 #define _BCLRPAT_A	0x60020
 #define _VSYNCSHIFT_A	0x60028
@@ -4190,11 +4191,16 @@ enum {
 #define VTOTAL(trans)		_MMIO_TRANS2(trans, _VTOTAL_A)
 #define VBLANK(trans)		_MMIO_TRANS2(trans, _VBLANK_A)
 #define VSYNC(trans)		_MMIO_TRANS2(trans, _VSYNC_A)
+#define EXITLINE(trans)		_MMIO_TRANS2(trans, _EXITLINE_A)
 #define BCLRPAT(trans)		_MMIO_TRANS2(trans, _BCLRPAT_A)
 #define VSYNCSHIFT(trans)	_MMIO_TRANS2(trans, _VSYNCSHIFT_A)
 #define PIPESRC(trans)		_MMIO_TRANS2(trans, _PIPEASRC)
 #define PIPE_MULT(trans)	_MMIO_TRANS2(trans, _PIPE_MULT_A)
 
+#define   EXITLINE_ENABLE	REG_BIT(31)
+#define   EXITLINE_MASK		REG_GENMASK(12, 0)
+#define   EXITLINE_SHIFT	0
+
 /*
  * HSW+ eDP PSR registers
  *
@@ -10288,6 +10294,8 @@ enum skl_power_gate {
 /* GEN9 DC */
 #define DC_STATE_EN			_MMIO(0x45504)
 #define  DC_STATE_DISABLE		0
+#define  DC_STATE_EN_DC3CO		REG_BIT(30)
+#define  DC_STATE_DC3CO_STATUS		REG_BIT(29)
 #define  DC_STATE_EN_UPTO_DC5		(1 << 0)
 #define  DC_STATE_EN_DC9		(1 << 3)
 #define  DC_STATE_EN_UPTO_DC6		(2 << 0)
-- 
2.21.0

_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply related	[flat|nested] 20+ messages in thread

* Re: [PATCH v10 1/6] drm/i915/tgl: Add DC3CO required register and bits
  2019-10-03  8:17 ` [PATCH v10 1/6] drm/i915/tgl: Add DC3CO required register and bits Anshuman Gupta
@ 2019-10-04 15:48   ` Ville Syrjälä
  2019-10-04 16:40     ` Anshuman Gupta
  2019-10-07  9:46   ` Anshuman Gupta
  1 sibling, 1 reply; 20+ messages in thread
From: Ville Syrjälä @ 2019-10-04 15:48 UTC (permalink / raw)
  To: Anshuman Gupta; +Cc: intel-gfx

On Thu, Oct 03, 2019 at 01:47:33PM +0530, Anshuman Gupta wrote:
> Adding following definition to i915_reg.h
> 1. DC_STATE_EN register DC3CO bit fields and masks.
>    DC3CO enable bit will be used by driver to make DC3CO
>    ready for DMC f/w and status bit will be used as DC3CO
>    entry status.
> 2. Transcoder EXITLINE register and its bit fields and mask.
>    Transcoder EXITLINE enable bit represents PSR2 idle frame
>    reset should be applied at exit line and exitlines mask
>    represent required number of scanlines at which DC3CO
>    exit happens.
> 
>    B.Specs:49196
> 
> v1: Use of REG_BIT and using extra space for EXITLINE_ macro
>     definition. [Animesh]
> 
> Cc: Jani Nikula <jani.nikula@intel.com>
> Cc: Imre Deak <imre.deak@intel.com>
> Cc: Animesh Manna <animesh.manna@intel.com>
> Reviewed-by: Animesh Manna <animesh.manna@intel.com>
> Reviewed-by: Imre Deak <imre.deak@intel.com>
> Signed-off-by: Anshuman Gupta <anshuman.gupta@intel.com>
> ---
>  drivers/gpu/drm/i915/i915_reg.h | 8 ++++++++
>  1 file changed, 8 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index eefd789b9a28..8fd93008214b 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -4144,6 +4144,7 @@ enum {
>  #define _VTOTAL_A	0x6000c
>  #define _VBLANK_A	0x60010
>  #define _VSYNC_A	0x60014
> +#define _EXITLINE_A	0x60018
>  #define _PIPEASRC	0x6001c
>  #define _BCLRPAT_A	0x60020
>  #define _VSYNCSHIFT_A	0x60028
> @@ -4190,11 +4191,16 @@ enum {
>  #define VTOTAL(trans)		_MMIO_TRANS2(trans, _VTOTAL_A)
>  #define VBLANK(trans)		_MMIO_TRANS2(trans, _VBLANK_A)
>  #define VSYNC(trans)		_MMIO_TRANS2(trans, _VSYNC_A)
> +#define EXITLINE(trans)		_MMIO_TRANS2(trans, _EXITLINE_A)
>  #define BCLRPAT(trans)		_MMIO_TRANS2(trans, _BCLRPAT_A)
>  #define VSYNCSHIFT(trans)	_MMIO_TRANS2(trans, _VSYNCSHIFT_A)
>  #define PIPESRC(trans)		_MMIO_TRANS2(trans, _PIPEASRC)
>  #define PIPE_MULT(trans)	_MMIO_TRANS2(trans, _PIPE_MULT_A)
>  
> +#define   EXITLINE_ENABLE	REG_BIT(31)
> +#define   EXITLINE_MASK		REG_GENMASK(12, 0)
> +#define   EXITLINE_SHIFT	0

Why are these defines hanging mid-air?

> +
>  /*
>   * HSW+ eDP PSR registers
>   *
> @@ -10288,6 +10294,8 @@ enum skl_power_gate {
>  /* GEN9 DC */
>  #define DC_STATE_EN			_MMIO(0x45504)
>  #define  DC_STATE_DISABLE		0
> +#define  DC_STATE_EN_DC3CO		REG_BIT(30)
> +#define  DC_STATE_DC3CO_STATUS		REG_BIT(29)
>  #define  DC_STATE_EN_UPTO_DC5		(1 << 0)
>  #define  DC_STATE_EN_DC9		(1 << 3)
>  #define  DC_STATE_EN_UPTO_DC6		(2 << 0)
> -- 
> 2.21.0
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
Ville Syrjälä
Intel
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 20+ messages in thread

* Re: [PATCH v10 1/6] drm/i915/tgl: Add DC3CO required register and bits
  2019-10-04 15:48   ` Ville Syrjälä
@ 2019-10-04 16:40     ` Anshuman Gupta
  0 siblings, 0 replies; 20+ messages in thread
From: Anshuman Gupta @ 2019-10-04 16:40 UTC (permalink / raw)
  To: Ville Syrjälä; +Cc: intel-gfx

On 2019-10-04 at 18:48:08 +0300, Ville Syrjälä wrote:
> On Thu, Oct 03, 2019 at 01:47:33PM +0530, Anshuman Gupta wrote:
> > Adding following definition to i915_reg.h
> > 1. DC_STATE_EN register DC3CO bit fields and masks.
> >    DC3CO enable bit will be used by driver to make DC3CO
> >    ready for DMC f/w and status bit will be used as DC3CO
> >    entry status.
> > 2. Transcoder EXITLINE register and its bit fields and mask.
> >    Transcoder EXITLINE enable bit represents PSR2 idle frame
> >    reset should be applied at exit line and exitlines mask
> >    represent required number of scanlines at which DC3CO
> >    exit happens.
> > 
> >    B.Specs:49196
> > 
> > v1: Use of REG_BIT and using extra space for EXITLINE_ macro
> >     definition. [Animesh]
> > 
> > Cc: Jani Nikula <jani.nikula@intel.com>
> > Cc: Imre Deak <imre.deak@intel.com>
> > Cc: Animesh Manna <animesh.manna@intel.com>
> > Reviewed-by: Animesh Manna <animesh.manna@intel.com>
> > Reviewed-by: Imre Deak <imre.deak@intel.com>
> > Signed-off-by: Anshuman Gupta <anshuman.gupta@intel.com>
> > ---
> >  drivers/gpu/drm/i915/i915_reg.h | 8 ++++++++
> >  1 file changed, 8 insertions(+)
> > 
> > diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> > index eefd789b9a28..8fd93008214b 100644
> > --- a/drivers/gpu/drm/i915/i915_reg.h
> > +++ b/drivers/gpu/drm/i915/i915_reg.h
> > @@ -4144,6 +4144,7 @@ enum {
> >  #define _VTOTAL_A	0x6000c
> >  #define _VBLANK_A	0x60010
> >  #define _VSYNC_A	0x60014
> > +#define _EXITLINE_A	0x60018
> >  #define _PIPEASRC	0x6001c
> >  #define _BCLRPAT_A	0x60020
> >  #define _VSYNCSHIFT_A	0x60028
> > @@ -4190,11 +4191,16 @@ enum {
> >  #define VTOTAL(trans)		_MMIO_TRANS2(trans, _VTOTAL_A)
> >  #define VBLANK(trans)		_MMIO_TRANS2(trans, _VBLANK_A)
> >  #define VSYNC(trans)		_MMIO_TRANS2(trans, _VSYNC_A)
> > +#define EXITLINE(trans)		_MMIO_TRANS2(trans, _EXITLINE_A)
> >  #define BCLRPAT(trans)		_MMIO_TRANS2(trans, _BCLRPAT_A)
> >  #define VSYNCSHIFT(trans)	_MMIO_TRANS2(trans, _VSYNCSHIFT_A)
> >  #define PIPESRC(trans)		_MMIO_TRANS2(trans, _PIPEASRC)
> >  #define PIPE_MULT(trans)	_MMIO_TRANS2(trans, _PIPE_MULT_A)
> >  
> > +#define   EXITLINE_ENABLE	REG_BIT(31)
> > +#define   EXITLINE_MASK		REG_GENMASK(12, 0)
> > +#define   EXITLINE_SHIFT	0
> 
> Why are these defines hanging mid-air?
If i understand your comment correctly, the place these EXITLINE
bit defines is not correct, and it should be moved after
EXITLINE(trans) define, am i correct ? 
> 
> > +
> >  /*
> >   * HSW+ eDP PSR registers
> >   *
> > @@ -10288,6 +10294,8 @@ enum skl_power_gate {
> >  /* GEN9 DC */
> >  #define DC_STATE_EN			_MMIO(0x45504)
> >  #define  DC_STATE_DISABLE		0
> > +#define  DC_STATE_EN_DC3CO		REG_BIT(30)
> > +#define  DC_STATE_DC3CO_STATUS		REG_BIT(29)
> >  #define  DC_STATE_EN_UPTO_DC5		(1 << 0)
> >  #define  DC_STATE_EN_DC9		(1 << 3)
> >  #define  DC_STATE_EN_UPTO_DC6		(2 << 0)
> > -- 
> > 2.21.0
> > 
> > _______________________________________________
> > Intel-gfx mailing list
> > Intel-gfx@lists.freedesktop.org
> > https://lists.freedesktop.org/mailman/listinfo/intel-gfx
> 
> -- 
> Ville Syrjälä
> Intel
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 20+ messages in thread

* [PATCH v10 1/6] drm/i915/tgl: Add DC3CO required register and bits
  2019-10-03  8:17 ` [PATCH v10 1/6] drm/i915/tgl: Add DC3CO required register and bits Anshuman Gupta
  2019-10-04 15:48   ` Ville Syrjälä
@ 2019-10-07  9:46   ` Anshuman Gupta
  1 sibling, 0 replies; 20+ messages in thread
From: Anshuman Gupta @ 2019-10-07  9:46 UTC (permalink / raw)
  To: intel-gfx; +Cc: jani.nikula

Adding following definition to i915_reg.h
1. DC_STATE_EN register DC3CO bit fields and masks.
   DC3CO enable bit will be used by driver to make DC3CO
   ready for DMC f/w and status bit will be used as DC3CO
   entry status.
2. Transcoder EXITLINE register and its bit fields and mask.
   Transcoder EXITLINE enable bit represents PSR2 idle frame
   reset should be applied at exit line and exitlines mask
   represent required number of scanlines at which DC3CO
   exit happens.

   B.Specs:49196

v1: Use of REG_BIT and using extra space for EXITLINE_ macro
    definition. [Animesh]
v2: Grouping EXITLINE reg bits with EXITLINE(trans) define,
    no functional change. [Ville]

Cc: Jani Nikula <jani.nikula@intel.com>
Cc: Imre Deak <imre.deak@intel.com>
Cc: Animesh Manna <animesh.manna@intel.com>
Reviewed-by: Animesh Manna <animesh.manna@intel.com>
Reviewed-by: Imre Deak <imre.deak@intel.com>
Signed-off-by: Anshuman Gupta <anshuman.gupta@intel.com>
---
 drivers/gpu/drm/i915/i915_reg.h | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index eefd789b9a28..3d3580ea38f7 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -4144,6 +4144,7 @@ enum {
 #define _VTOTAL_A	0x6000c
 #define _VBLANK_A	0x60010
 #define _VSYNC_A	0x60014
+#define _EXITLINE_A	0x60018
 #define _PIPEASRC	0x6001c
 #define _BCLRPAT_A	0x60020
 #define _VSYNCSHIFT_A	0x60028
@@ -4195,6 +4196,11 @@ enum {
 #define PIPESRC(trans)		_MMIO_TRANS2(trans, _PIPEASRC)
 #define PIPE_MULT(trans)	_MMIO_TRANS2(trans, _PIPE_MULT_A)
 
+#define EXITLINE(trans)		_MMIO_TRANS2(trans, _EXITLINE_A)
+#define   EXITLINE_ENABLE	REG_BIT(31)
+#define   EXITLINE_MASK		REG_GENMASK(12, 0)
+#define   EXITLINE_SHIFT	0
+
 /*
  * HSW+ eDP PSR registers
  *
@@ -10288,6 +10294,8 @@ enum skl_power_gate {
 /* GEN9 DC */
 #define DC_STATE_EN			_MMIO(0x45504)
 #define  DC_STATE_DISABLE		0
+#define  DC_STATE_EN_DC3CO		REG_BIT(30)
+#define  DC_STATE_DC3CO_STATUS		REG_BIT(29)
 #define  DC_STATE_EN_UPTO_DC5		(1 << 0)
 #define  DC_STATE_EN_DC9		(1 << 3)
 #define  DC_STATE_EN_UPTO_DC6		(2 << 0)
-- 
2.21.0

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply related	[flat|nested] 20+ messages in thread

* [PATCH v10 2/6] drm/i915/tgl: Add DC3CO mask to allowed_dc_mask and gen9_dc_mask
  2019-10-03  8:17 [PATCH v10 RESEND 0/6] DC3CO Support for TGL test with DC3CO IGT Anshuman Gupta
  2019-10-03  8:17 ` [PATCH v10 1/6] drm/i915/tgl: Add DC3CO required register and bits Anshuman Gupta
@ 2019-10-03  8:17 ` Anshuman Gupta
  2019-10-03  8:17 ` [PATCH v10 3/6] drm/i915/tgl: Enable DC3CO state in "DC Off" power well Anshuman Gupta
                   ` (8 subsequent siblings)
  10 siblings, 0 replies; 20+ messages in thread
From: Anshuman Gupta @ 2019-10-03  8:17 UTC (permalink / raw)
  To: intel-gfx

Enable dc3co state in enable_dc module param and add dc3co
enable mask to allowed_dc_mask and gen9_dc_mask.

v1: Adding enable_dc=3,4 options to enable DC3CO with DC5 and DC6
    independently. [Animesh]
v2: Using a switch statement for cleaner code. [Animesh]

Cc: Jani Nikula <jani.nikula@intel.com>
Cc: Imre Deak <imre.deak@intel.com>
Cc: Animesh Manna <animesh.manna@intel.com>
Reviewed-by: Animesh Manna <animesh.manna@intel.com>
Reviewed-by: Imre Deak <imre.deak@intel.com>
Signed-off-by: Anshuman Gupta <anshuman.gupta@intel.com>
---
 .../drm/i915/display/intel_display_power.c    | 29 +++++++++++++++----
 drivers/gpu/drm/i915/i915_params.c            |  3 +-
 2 files changed, 25 insertions(+), 7 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c b/drivers/gpu/drm/i915/display/intel_display_power.c
index bb642a1a0dd4..12886a2ea6db 100644
--- a/drivers/gpu/drm/i915/display/intel_display_power.c
+++ b/drivers/gpu/drm/i915/display/intel_display_power.c
@@ -695,7 +695,11 @@ static u32 gen9_dc_mask(struct drm_i915_private *dev_priv)
 	u32 mask;
 
 	mask = DC_STATE_EN_UPTO_DC5;
-	if (INTEL_GEN(dev_priv) >= 11)
+
+	if (INTEL_GEN(dev_priv) >= 12)
+		mask |= DC_STATE_EN_DC3CO | DC_STATE_EN_UPTO_DC6
+					  | DC_STATE_EN_DC9;
+	else if (IS_GEN(dev_priv, 11))
 		mask |= DC_STATE_EN_UPTO_DC6 | DC_STATE_EN_DC9;
 	else if (IS_GEN9_LP(dev_priv))
 		mask |= DC_STATE_EN_DC9;
@@ -3924,14 +3928,17 @@ static u32 get_allowed_dc_mask(const struct drm_i915_private *dev_priv,
 	int requested_dc;
 	int max_dc;
 
-	if (INTEL_GEN(dev_priv) >= 11) {
-		max_dc = 2;
+	if (INTEL_GEN(dev_priv) >= 12) {
+		max_dc = 4;
 		/*
 		 * DC9 has a separate HW flow from the rest of the DC states,
 		 * not depending on the DMC firmware. It's needed by system
 		 * suspend/resume, so allow it unconditionally.
 		 */
 		mask = DC_STATE_EN_DC9;
+	} else if (IS_GEN(dev_priv, 11)) {
+		max_dc = 2;
+		mask = DC_STATE_EN_DC9;
 	} else if (IS_GEN(dev_priv, 10) || IS_GEN9_BC(dev_priv)) {
 		max_dc = 2;
 		mask = 0;
@@ -3950,7 +3957,7 @@ static u32 get_allowed_dc_mask(const struct drm_i915_private *dev_priv,
 		requested_dc = enable_dc;
 	} else if (enable_dc == -1) {
 		requested_dc = max_dc;
-	} else if (enable_dc > max_dc && enable_dc <= 2) {
+	} else if (enable_dc > max_dc && enable_dc <= 4) {
 		DRM_DEBUG_KMS("Adjusting requested max DC state (%d->%d)\n",
 			      enable_dc, max_dc);
 		requested_dc = max_dc;
@@ -3959,10 +3966,20 @@ static u32 get_allowed_dc_mask(const struct drm_i915_private *dev_priv,
 		requested_dc = max_dc;
 	}
 
-	if (requested_dc > 1)
+	switch (requested_dc) {
+	case 4:
+		mask |= DC_STATE_EN_DC3CO | DC_STATE_EN_UPTO_DC6;
+		break;
+	case 3:
+		mask |= DC_STATE_EN_DC3CO | DC_STATE_EN_UPTO_DC5;
+		break;
+	case 2:
 		mask |= DC_STATE_EN_UPTO_DC6;
-	if (requested_dc > 0)
+		break;
+	case 1:
 		mask |= DC_STATE_EN_UPTO_DC5;
+		break;
+	}
 
 	DRM_DEBUG_KMS("Allowed DC state mask %02x\n", mask);
 
diff --git a/drivers/gpu/drm/i915/i915_params.c b/drivers/gpu/drm/i915/i915_params.c
index 296452f9efe4..4f1806f65040 100644
--- a/drivers/gpu/drm/i915/i915_params.c
+++ b/drivers/gpu/drm/i915/i915_params.c
@@ -46,7 +46,8 @@ i915_param_named(modeset, int, 0400,
 
 i915_param_named_unsafe(enable_dc, int, 0400,
 	"Enable power-saving display C-states. "
-	"(-1=auto [default]; 0=disable; 1=up to DC5; 2=up to DC6)");
+	"(-1=auto [default]; 0=disable; 1=up to DC5; 2=up to DC6; "
+	"3=up to DC5 with DC3CO; 4=up to DC6 with DC3CO)");
 
 i915_param_named_unsafe(enable_fbc, int, 0600,
 	"Enable frame buffer compression for power savings "
-- 
2.21.0

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply related	[flat|nested] 20+ messages in thread

* [PATCH v10 3/6] drm/i915/tgl: Enable DC3CO state in "DC Off" power well
  2019-10-03  8:17 [PATCH v10 RESEND 0/6] DC3CO Support for TGL test with DC3CO IGT Anshuman Gupta
  2019-10-03  8:17 ` [PATCH v10 1/6] drm/i915/tgl: Add DC3CO required register and bits Anshuman Gupta
  2019-10-03  8:17 ` [PATCH v10 2/6] drm/i915/tgl: Add DC3CO mask to allowed_dc_mask and gen9_dc_mask Anshuman Gupta
@ 2019-10-03  8:17 ` Anshuman Gupta
  2019-10-03  8:17 ` [PATCH v10 4/6] drm/i915/tgl: Do modeset to enable and configure DC3CO exitline Anshuman Gupta
                   ` (7 subsequent siblings)
  10 siblings, 0 replies; 20+ messages in thread
From: Anshuman Gupta @ 2019-10-03  8:17 UTC (permalink / raw)
  To: intel-gfx

Add target_dc_state and used by set_target_dc_state API
in order to enable DC3CO state with existing DC states.
target_dc_state will enable/disable the desired DC state in
DC_STATE_EN reg when "DC Off" power well gets disable/enable.

v2: commit log improvement.
v3: Used intel_wait_for_register to wait for DC3CO exit. [Imre]
    Used gen9_set_dc_state() to allow/disallow DC3CO. [Imre]
    Moved transcoder psr2 exit line enablement from tgl_allow_dc3co()
    to a appropriate place haswell_crtc_enable(). [Imre]
    Changed the DC3CO power well enabled call back logic as
    recommended in review comments. [Imre]
v4: Used wait_for_us() instead of intel_wait_for_reg(). [Imre (IRC)]
v5: using udelay() instead of waiting for DC3CO exit status.
v6: Fixed minor unwanted change.
v7: Removed DC3CO powerwell and POWER_DOMAIN_VIDEO.
v8: Uniform checks by using only target_dc_state instead of allowed_dc_mask
    in "DC off" power well callback. [Imre]
    Adding "DC off" power well id to older platforms. [Imre]
    Removed psr2_deep_sleep flag from tgl_set_target_dc_state. [Imre]
v9: Used switch case for target DC state in
    gen9_dc_off_power_well_disable(), checking DC3CO state against
    allowed DC mask, using WARN_ON() in
    tgl_set_target_dc_state(). [Imre]
v10: Code refactoring and using sanitize_target_dc_state(). [Imre]

Cc: Jani Nikula <jani.nikula@intel.com>
Cc: Imre Deak <imre.deak@intel.com>
Cc: Animesh Manna <animesh.manna@intel.com>
Reviewed-by: Imre Deak <imre.deak@intel.com>
Signed-off-by: Anshuman Gupta <anshuman.gupta@intel.com>
---
 .../drm/i915/display/intel_display_power.c    | 80 ++++++++++++++++---
 .../drm/i915/display/intel_display_power.h    |  1 +
 drivers/gpu/drm/i915/i915_drv.h               |  1 +
 3 files changed, 73 insertions(+), 9 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c b/drivers/gpu/drm/i915/display/intel_display_power.c
index 12886a2ea6db..c2cbfc210b54 100644
--- a/drivers/gpu/drm/i915/display/intel_display_power.c
+++ b/drivers/gpu/drm/i915/display/intel_display_power.c
@@ -769,6 +769,52 @@ static void gen9_set_dc_state(struct drm_i915_private *dev_priv, u32 state)
 	dev_priv->csr.dc_state = val & mask;
 }
 
+static u32
+sanitize_target_dc_state(struct drm_i915_private *dev_priv,
+			 u32 target_dc_state)
+{
+	u32 states[] = {
+		DC_STATE_EN_UPTO_DC6,
+		DC_STATE_EN_UPTO_DC5,
+		DC_STATE_EN_DC3CO,
+		DC_STATE_DISABLE,
+	};
+	int i;
+
+	for (i = 0; i < ARRAY_SIZE(states) - 1; i++) {
+		if (target_dc_state != states[i])
+			continue;
+
+		if (dev_priv->csr.allowed_dc_mask & target_dc_state)
+			break;
+
+		target_dc_state = states[i + 1];
+	}
+
+	return target_dc_state;
+}
+
+static void tgl_enable_dc3co(struct drm_i915_private *dev_priv)
+{
+	DRM_DEBUG_KMS("Enabling DC3CO\n");
+	gen9_set_dc_state(dev_priv, DC_STATE_EN_DC3CO);
+}
+
+static void tgl_disable_dc3co(struct drm_i915_private *dev_priv)
+{
+	u32 val;
+
+	DRM_DEBUG_KMS("Disabling DC3CO\n");
+	val = I915_READ(DC_STATE_EN);
+	val &= ~DC_STATE_DC3CO_STATUS;
+	I915_WRITE(DC_STATE_EN, val);
+	gen9_set_dc_state(dev_priv, DC_STATE_DISABLE);
+	/*
+	 * Delay of 200us DC3CO Exit time B.Spec 49196
+	 */
+	usleep_range(200, 210);
+}
+
 static void bxt_enable_dc9(struct drm_i915_private *dev_priv)
 {
 	assert_can_enable_dc9(dev_priv);
@@ -936,7 +982,8 @@ static void bxt_verify_ddi_phy_power_wells(struct drm_i915_private *dev_priv)
 static bool gen9_dc_off_power_well_enabled(struct drm_i915_private *dev_priv,
 					   struct i915_power_well *power_well)
 {
-	return (I915_READ(DC_STATE_EN) & DC_STATE_EN_UPTO_DC5_DC6_MASK) == 0;
+	return ((I915_READ(DC_STATE_EN) & DC_STATE_EN_DC3CO) == 0 &&
+		(I915_READ(DC_STATE_EN) & DC_STATE_EN_UPTO_DC5_DC6_MASK) == 0);
 }
 
 static void gen9_assert_dbuf_enabled(struct drm_i915_private *dev_priv)
@@ -952,6 +999,11 @@ static void gen9_disable_dc_states(struct drm_i915_private *dev_priv)
 {
 	struct intel_cdclk_state cdclk_state = {};
 
+	if (dev_priv->csr.target_dc_state == DC_STATE_EN_DC3CO) {
+		tgl_disable_dc3co(dev_priv);
+		return;
+	}
+
 	gen9_set_dc_state(dev_priv, DC_STATE_DISABLE);
 
 	dev_priv->display.get_cdclk(dev_priv, &cdclk_state);
@@ -984,10 +1036,17 @@ static void gen9_dc_off_power_well_disable(struct drm_i915_private *dev_priv,
 	if (!dev_priv->csr.dmc_payload)
 		return;
 
-	if (dev_priv->csr.allowed_dc_mask & DC_STATE_EN_UPTO_DC6)
+	switch (dev_priv->csr.target_dc_state) {
+	case DC_STATE_EN_DC3CO:
+		tgl_enable_dc3co(dev_priv);
+		break;
+	case DC_STATE_EN_UPTO_DC6:
 		skl_enable_dc6(dev_priv);
-	else if (dev_priv->csr.allowed_dc_mask & DC_STATE_EN_UPTO_DC5)
+		break;
+	case DC_STATE_EN_UPTO_DC5:
 		gen9_enable_dc5(dev_priv);
+		break;
+	}
 }
 
 static void i9xx_power_well_sync_hw_noop(struct drm_i915_private *dev_priv,
@@ -2935,7 +2994,7 @@ static const struct i915_power_well_desc skl_power_wells[] = {
 		.name = "DC off",
 		.domains = SKL_DISPLAY_DC_OFF_POWER_DOMAINS,
 		.ops = &gen9_dc_off_power_well_ops,
-		.id = DISP_PW_ID_NONE,
+		.id = SKL_DISP_DC_OFF,
 	},
 	{
 		.name = "power well 2",
@@ -3017,7 +3076,7 @@ static const struct i915_power_well_desc bxt_power_wells[] = {
 		.name = "DC off",
 		.domains = BXT_DISPLAY_DC_OFF_POWER_DOMAINS,
 		.ops = &gen9_dc_off_power_well_ops,
-		.id = DISP_PW_ID_NONE,
+		.id = SKL_DISP_DC_OFF,
 	},
 	{
 		.name = "power well 2",
@@ -3077,7 +3136,7 @@ static const struct i915_power_well_desc glk_power_wells[] = {
 		.name = "DC off",
 		.domains = GLK_DISPLAY_DC_OFF_POWER_DOMAINS,
 		.ops = &gen9_dc_off_power_well_ops,
-		.id = DISP_PW_ID_NONE,
+		.id = SKL_DISP_DC_OFF,
 	},
 	{
 		.name = "power well 2",
@@ -3246,7 +3305,7 @@ static const struct i915_power_well_desc cnl_power_wells[] = {
 		.name = "DC off",
 		.domains = CNL_DISPLAY_DC_OFF_POWER_DOMAINS,
 		.ops = &gen9_dc_off_power_well_ops,
-		.id = DISP_PW_ID_NONE,
+		.id = SKL_DISP_DC_OFF,
 	},
 	{
 		.name = "power well 2",
@@ -3374,7 +3433,7 @@ static const struct i915_power_well_desc icl_power_wells[] = {
 		.name = "DC off",
 		.domains = ICL_DISPLAY_DC_OFF_POWER_DOMAINS,
 		.ops = &gen9_dc_off_power_well_ops,
-		.id = DISP_PW_ID_NONE,
+		.id = SKL_DISP_DC_OFF,
 	},
 	{
 		.name = "power well 2",
@@ -3607,7 +3666,7 @@ static const struct i915_power_well_desc tgl_power_wells[] = {
 		.name = "DC off",
 		.domains = TGL_DISPLAY_DC_OFF_POWER_DOMAINS,
 		.ops = &gen9_dc_off_power_well_ops,
-		.id = DISP_PW_ID_NONE,
+		.id = SKL_DISP_DC_OFF,
 	},
 	{
 		.name = "power well 2",
@@ -4040,6 +4099,9 @@ int intel_power_domains_init(struct drm_i915_private *dev_priv)
 	dev_priv->csr.allowed_dc_mask =
 		get_allowed_dc_mask(dev_priv, i915_modparams.enable_dc);
 
+	dev_priv->csr.target_dc_state =
+		sanitize_target_dc_state(dev_priv, DC_STATE_EN_UPTO_DC6);
+
 	BUILD_BUG_ON(POWER_DOMAIN_NUM > 64);
 
 	mutex_init(&power_domains->lock);
diff --git a/drivers/gpu/drm/i915/display/intel_display_power.h b/drivers/gpu/drm/i915/display/intel_display_power.h
index 737b5def7fc6..7d72faf474b2 100644
--- a/drivers/gpu/drm/i915/display/intel_display_power.h
+++ b/drivers/gpu/drm/i915/display/intel_display_power.h
@@ -100,6 +100,7 @@ enum i915_power_well_id {
 	SKL_DISP_PW_MISC_IO,
 	SKL_DISP_PW_1,
 	SKL_DISP_PW_2,
+	SKL_DISP_DC_OFF,
 };
 
 #define POWER_DOMAIN_PIPE(pipe) ((pipe) + POWER_DOMAIN_PIPE_A)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 337d8306416a..6521a62e6817 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -338,6 +338,7 @@ struct intel_csr {
 	i915_reg_t mmioaddr[20];
 	u32 mmiodata[20];
 	u32 dc_state;
+	u32 target_dc_state;
 	u32 allowed_dc_mask;
 	intel_wakeref_t wakeref;
 };
-- 
2.21.0

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply related	[flat|nested] 20+ messages in thread

* [PATCH v10 4/6] drm/i915/tgl: Do modeset to enable and configure DC3CO exitline
  2019-10-03  8:17 [PATCH v10 RESEND 0/6] DC3CO Support for TGL test with DC3CO IGT Anshuman Gupta
                   ` (2 preceding siblings ...)
  2019-10-03  8:17 ` [PATCH v10 3/6] drm/i915/tgl: Enable DC3CO state in "DC Off" power well Anshuman Gupta
@ 2019-10-03  8:17 ` Anshuman Gupta
  2019-10-03  8:17 ` [PATCH v10 5/6] drm/i915/tgl: Switch between dc3co and dc5 based on display idleness Anshuman Gupta
                   ` (6 subsequent siblings)
  10 siblings, 0 replies; 20+ messages in thread
From: Anshuman Gupta @ 2019-10-03  8:17 UTC (permalink / raw)
  To: intel-gfx

DC3CO enabling B.Specs sequence requires to enable end configure
exit scanlines to TRANS_EXITLINE register, programming this register
has to be part of modeset sequence as this can't be change when
transcoder or port is enabled.
When system boots with only eDP panel there may not be real
modeset as BIOS has already programmed the necessary registers,
therefore it needs to force a modeset to enable and configure
DC3CO exitline.

v1: Computing dc3co_exitline crtc state from a DP encoder
    compute config. [Imre]
    Enabling and disabling DC3CO PSR2 transcoder exitline from
    encoder pre_enable and post_disable hooks. [Imre]
    Computing dc3co_exitline instead of has_dc3co_exitline bool. [Imre]
v2: Code refactoring for symmetry and to avoid exported function. [Imre]
    Removing IS_TIGERLAKE check from compute_config, adding PIPE_A
    restriction and clearing dc3co_exitline state if crtc is not active
    or it is not PSR2 capable in dc3co exitline compute_config. [Imre]
    Using GEN >= 12 check in dc3co exitline get_config. [Imre]

Cc: Jani Nikula <jani.nikula@intel.com>
Cc: Imre Deak <imre.deak@intel.com>
Cc: Animesh Manna <animesh.manna@intel.com>
Reviewed-by: Imre Deak <imre.deak@intel.com>
Signed-off-by: Anshuman Gupta <anshuman.gupta@intel.com>
---
 drivers/gpu/drm/i915/display/intel_ddi.c      | 93 ++++++++++++++++++-
 drivers/gpu/drm/i915/display/intel_display.c  |  1 +
 .../drm/i915/display/intel_display_types.h    |  1 +
 3 files changed, 93 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
index 3c1e885e0187..6c1315c7bcde 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -45,6 +45,7 @@
 #include "intel_lspcon.h"
 #include "intel_panel.h"
 #include "intel_psr.h"
+#include "intel_sprite.h"
 #include "intel_tc.h"
 #include "intel_vdsc.h"
 
@@ -3330,6 +3331,86 @@ static void intel_ddi_disable_fec_state(struct intel_encoder *encoder,
 	POSTING_READ(intel_dp->regs.dp_tp_ctl);
 }
 
+static void
+tgl_clear_psr2_transcoder_exitline(const struct intel_crtc_state *cstate)
+{
+	struct drm_i915_private *dev_priv = to_i915(cstate->base.crtc->dev);
+	u32 val;
+
+	if (!cstate->dc3co_exitline)
+		return;
+
+	val = I915_READ(EXITLINE(cstate->cpu_transcoder));
+	val &= ~(EXITLINE_MASK | EXITLINE_ENABLE);
+	I915_WRITE(EXITLINE(cstate->cpu_transcoder), val);
+}
+
+static void
+tgl_set_psr2_transcoder_exitline(const struct intel_crtc_state *cstate)
+{
+	u32 val, exit_scanlines;
+	struct drm_i915_private *dev_priv = to_i915(cstate->base.crtc->dev);
+
+	if (!cstate->dc3co_exitline)
+		return;
+
+	exit_scanlines = cstate->dc3co_exitline;
+	exit_scanlines <<= EXITLINE_SHIFT;
+	val = I915_READ(EXITLINE(cstate->cpu_transcoder));
+	val &= ~(EXITLINE_MASK | EXITLINE_ENABLE);
+	val |= exit_scanlines;
+	val |= EXITLINE_ENABLE;
+	I915_WRITE(EXITLINE(cstate->cpu_transcoder), val);
+}
+
+static void tgl_dc3co_exitline_compute_config(struct intel_encoder *encoder,
+					      struct intel_crtc_state *cstate)
+{
+	u32 exit_scanlines;
+	struct drm_i915_private *dev_priv = to_i915(cstate->base.crtc->dev);
+	u32 crtc_vdisplay = cstate->base.adjusted_mode.crtc_vdisplay;
+
+	cstate->dc3co_exitline = 0;
+
+	if (!(dev_priv->csr.allowed_dc_mask & DC_STATE_EN_DC3CO))
+		return;
+
+	/* B.Specs:49196 DC3CO only works with pipeA and DDIA.*/
+	if (to_intel_crtc(cstate->base.crtc)->pipe != PIPE_A ||
+	    encoder->port != PORT_A)
+		return;
+
+	if (!cstate->has_psr2 || !cstate->base.active)
+		return;
+
+	/*
+	 * DC3CO Exit time 200us B.Spec 49196
+	 * PSR2 transcoder Early Exit scanlines = ROUNDUP(200 / line time) + 1
+	 */
+	exit_scanlines =
+		intel_usecs_to_scanlines(&cstate->base.adjusted_mode, 200) + 1;
+
+	if (WARN_ON(exit_scanlines > crtc_vdisplay))
+		return;
+
+	cstate->dc3co_exitline = crtc_vdisplay - exit_scanlines;
+	DRM_DEBUG_KMS("DC3CO exit scanlines %d\n", cstate->dc3co_exitline);
+}
+
+static void tgl_dc3co_exitline_get_config(struct intel_crtc_state *crtc_state)
+{
+	u32 val;
+	struct drm_i915_private *dev_priv = to_i915(crtc_state->base.crtc->dev);
+
+	if (INTEL_GEN(dev_priv) < 12)
+		return;
+
+	val = I915_READ(EXITLINE(crtc_state->cpu_transcoder));
+
+	if (val & EXITLINE_ENABLE)
+		crtc_state->dc3co_exitline = val & EXITLINE_MASK;
+}
+
 static void tgl_ddi_pre_enable_dp(struct intel_encoder *encoder,
 				  const struct intel_crtc_state *crtc_state,
 				  const struct drm_connector_state *conn_state)
@@ -3342,6 +3423,7 @@ static void tgl_ddi_pre_enable_dp(struct intel_encoder *encoder,
 	int level = intel_ddi_dp_level(intel_dp);
 	enum transcoder transcoder = crtc_state->cpu_transcoder;
 
+	tgl_set_psr2_transcoder_exitline(crtc_state);
 	intel_dp_set_link_params(intel_dp, crtc_state->port_clock,
 				 crtc_state->lane_count, is_mst);
 
@@ -3666,6 +3748,7 @@ static void intel_ddi_post_disable_dp(struct intel_encoder *encoder,
 						  dig_port->ddi_io_power_domain);
 
 	intel_ddi_clk_disable(encoder);
+	tgl_clear_psr2_transcoder_exitline(old_crtc_state);
 }
 
 static void intel_ddi_post_disable_hdmi(struct intel_encoder *encoder,
@@ -4212,6 +4295,9 @@ void intel_ddi_get_config(struct intel_encoder *encoder,
 		break;
 	}
 
+	if (encoder->type == INTEL_OUTPUT_EDP)
+		tgl_dc3co_exitline_get_config(pipe_config);
+
 	pipe_config->has_audio =
 		intel_ddi_is_audio_enabled(dev_priv, cpu_transcoder);
 
@@ -4289,10 +4375,13 @@ static int intel_ddi_compute_config(struct intel_encoder *encoder,
 	if (HAS_TRANSCODER_EDP(dev_priv) && port == PORT_A)
 		pipe_config->cpu_transcoder = TRANSCODER_EDP;
 
-	if (intel_crtc_has_type(pipe_config, INTEL_OUTPUT_HDMI))
+	if (intel_crtc_has_type(pipe_config, INTEL_OUTPUT_HDMI)) {
 		ret = intel_hdmi_compute_config(encoder, pipe_config, conn_state);
-	else
+	} else {
 		ret = intel_dp_compute_config(encoder, pipe_config, conn_state);
+		tgl_dc3co_exitline_compute_config(encoder, pipe_config);
+	}
+
 	if (ret)
 		return ret;
 
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 20ec8a1dc5e1..f72429cd0861 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -12820,6 +12820,7 @@ intel_pipe_config_compare(const struct intel_crtc_state *current_config,
 
 	PIPE_CONF_CHECK_I(pixel_multiplier);
 	PIPE_CONF_CHECK_I(output_format);
+	PIPE_CONF_CHECK_I(dc3co_exitline);
 	PIPE_CONF_CHECK_BOOL(has_hdmi_sink);
 	if ((INTEL_GEN(dev_priv) < 8 && !IS_HASWELL(dev_priv)) ||
 	    IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv))
diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
index 976669f01a8c..8aa38ace7845 100644
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -870,6 +870,7 @@ struct intel_crtc_state {
 
 	bool has_psr;
 	bool has_psr2;
+	u32 dc3co_exitline;
 
 	/*
 	 * Frequence the dpll for the port should run at. Differs from the
-- 
2.21.0

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply related	[flat|nested] 20+ messages in thread

* [PATCH v10 5/6] drm/i915/tgl: Switch between dc3co and dc5 based on display idleness
  2019-10-03  8:17 [PATCH v10 RESEND 0/6] DC3CO Support for TGL test with DC3CO IGT Anshuman Gupta
                   ` (3 preceding siblings ...)
  2019-10-03  8:17 ` [PATCH v10 4/6] drm/i915/tgl: Do modeset to enable and configure DC3CO exitline Anshuman Gupta
@ 2019-10-03  8:17 ` Anshuman Gupta
  2019-10-03  8:17 ` [PATCH v10 6/6] drm/i915/tgl: Add DC3CO counter in i915_dmc_info Anshuman Gupta
                   ` (5 subsequent siblings)
  10 siblings, 0 replies; 20+ messages in thread
From: Anshuman Gupta @ 2019-10-03  8:17 UTC (permalink / raw)
  To: intel-gfx

DC3CO is useful power state, when DMC detects PSR2 idle frame
while an active video playback, playing 30fps video on 60hz panel
is the classic example of this use case.

B.Specs:49196 has a restriction to enable DC3CO only for Video Playback.
It will be worthy to enable DC3CO after completion of each pageflip
and switch back to DC5 when display is idle because driver doesn't
differentiate between video playback and a normal pageflip.
We will use Frontbuffer flush call tgl_dc3co_flush() to enable DC3CO
state only for ORIGIN_FLIP flush call, because DC3CO state has primarily
targeted for VPB use case. We are not interested here for frontbuffer
invalidates calls because that triggers PSR2 exit, which will
explicitly disable DC3CO.

DC5 and DC6 saves more power, but can't be entered during video
playback because there are not enough idle frames in a row to meet
most PSR2 panel deep sleep entry requirement typically 4 frames.
As PSR2 existing implementation is using minimum 6 idle frames for
deep sleep, it is safer to enable DC5/6 after 6 idle frames
(By scheduling a delayed work of 6 idle frames, once DC3CO has been
enabled after a pageflip).

After manually waiting for 6 idle frames DC5/6 will be enabled and
PSR2 deep sleep idle frames will be restored to 6 idle frames, at this
point DMC will triggers DC5/6 once PSR2 enters to deep sleep after
6 idle frames.
In future when we will enable S/W PSR2 tracking, we can change the
PSR2 required deep sleep idle frames to 1 so DMC can trigger the
DC5/6 immediately after S/W manual waiting of 6 idle frames get
complete.

v2: calculated s/w state to switch over dc3co when there is an
    update. [Imre]
    Used cancel_delayed_work_sync() in order to avoid any race
    with already scheduled delayed work. [Imre]
v3: Cancel_delayed_work_sync() may blocked the commit work.
    hence dropping it, dc5_idle_thread() checks the valid wakeref before
    putting the reference count, which avoids any chances of dropping
    a zero wakeref. [Imre (IRC)]
v4: Used frontbuffer flush mechanism. [Imre]
v5: Used psr.pipe to extract frontbuffer busy bits. [Imre]
    Used cancel_delayed_work_sync() in encoder disable path. [Imre]
    Used mod_delayed_work() instead of cancelling and scheduling a
    delayed work. [Imre]
    Used psr.lock in tgl_dc5_idle_thread() to enable psr2 deep
    sleep. [Imre]
    Removed DC5_REQ_IDLE_FRAMES macro. [Imre]
v6: Used dc3co_exitline check instead of TGL and dc3co allowed_dc_mask
    checks, used delayed_work_pending with the psr lock and removed the
    psr2_deep_slp_disabled flag. [Imre]
v7: Code refactoring, moved most of functional code to inte_psr.c [Imre]
    Using frontbuffer_bits on psr.pipe check instead of
    busy_frontbuffer_bits. [Imre]
    Calculating dc3co_exit_delay in intel_psr_enable_locked. [Imre]

Cc: Jani Nikula <jani.nikula@intel.com>
Cc: Imre Deak <imre.deak@intel.com>
Cc: Animesh Manna <animesh.manna@intel.com>
Reviewed-by: Imre Deak <imre.deak@intel.com>
Signed-off-by: Anshuman Gupta <anshuman.gupta@intel.com>
---
 .../drm/i915/display/intel_display_power.c    |  45 +++++++
 .../drm/i915/display/intel_display_power.h    |   2 +
 drivers/gpu/drm/i915/display/intel_psr.c      | 114 +++++++++++++++++-
 drivers/gpu/drm/i915/i915_drv.h               |   3 +
 4 files changed, 163 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c b/drivers/gpu/drm/i915/display/intel_display_power.c
index c2cbfc210b54..1e995d004bb8 100644
--- a/drivers/gpu/drm/i915/display/intel_display_power.c
+++ b/drivers/gpu/drm/i915/display/intel_display_power.c
@@ -870,6 +870,51 @@ lookup_power_well(struct drm_i915_private *dev_priv,
 	return &dev_priv->power_domains.power_wells[0];
 }
 
+/**
+ * intel_display_power_set_target_dc_state - Set target dc state.
+ * @dev_priv: i915 device
+ * @state: state which needs to be set as target_dc_state.
+ *
+ * This function set the "DC off" power well target_dc_state,
+ * based upon this target_dc_stste, "DC off" power well will
+ * enable desired DC state.
+ */
+void intel_display_power_set_target_dc_state(struct drm_i915_private *dev_priv,
+					     u32 state)
+{
+	struct i915_power_well *power_well;
+	bool dc_off_enabled;
+	struct i915_power_domains *power_domains = &dev_priv->power_domains;
+
+	mutex_lock(&power_domains->lock);
+	power_well = lookup_power_well(dev_priv, SKL_DISP_DC_OFF);
+
+	if (WARN_ON(!power_well))
+		goto unlock;
+
+	state = sanitize_target_dc_state(dev_priv, state);
+
+	if (state == dev_priv->csr.target_dc_state)
+		goto unlock;
+
+	dc_off_enabled = power_well->desc->ops->is_enabled(dev_priv,
+							   power_well);
+	/*
+	 * If DC off power well is disabled, need to enable and disable the
+	 * DC off power well to effect target DC state.
+	 */
+	if (!dc_off_enabled)
+		power_well->desc->ops->enable(dev_priv, power_well);
+
+	dev_priv->csr.target_dc_state = state;
+
+	if (!dc_off_enabled)
+		power_well->desc->ops->disable(dev_priv, power_well);
+
+unlock:
+	mutex_unlock(&power_domains->lock);
+}
+
 static void assert_can_enable_dc5(struct drm_i915_private *dev_priv)
 {
 	bool pg2_enabled = intel_display_power_well_is_enabled(dev_priv,
diff --git a/drivers/gpu/drm/i915/display/intel_display_power.h b/drivers/gpu/drm/i915/display/intel_display_power.h
index 7d72faf474b2..1da04f3e0fb3 100644
--- a/drivers/gpu/drm/i915/display/intel_display_power.h
+++ b/drivers/gpu/drm/i915/display/intel_display_power.h
@@ -257,6 +257,8 @@ void intel_display_power_suspend_late(struct drm_i915_private *i915);
 void intel_display_power_resume_early(struct drm_i915_private *i915);
 void intel_display_power_suspend(struct drm_i915_private *i915);
 void intel_display_power_resume(struct drm_i915_private *i915);
+void intel_display_power_set_target_dc_state(struct drm_i915_private *dev_priv,
+					     u32 state);
 
 const char *
 intel_display_power_domain_str(enum intel_display_power_domain domain);
diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
index b3c7eef53bf3..50f22abcd30e 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -534,6 +534,73 @@ transcoder_has_psr2(struct drm_i915_private *dev_priv, enum transcoder trans)
 		return trans == TRANSCODER_EDP;
 }
 
+static u32 intel_get_frame_time_us(const struct intel_crtc_state *cstate)
+{
+	if (!cstate || !cstate->base.active)
+		return 0;
+
+	return DIV_ROUND_UP(1000 * 1000,
+			    drm_mode_vrefresh(&cstate->base.adjusted_mode));
+}
+
+static void psr2_program_idle_frames(struct drm_i915_private *dev_priv,
+				     u32 idle_frames)
+{
+	u32 val;
+
+	idle_frames <<=  EDP_PSR2_IDLE_FRAME_SHIFT;
+	val = I915_READ(EDP_PSR2_CTL(dev_priv->psr.transcoder));
+	val &= ~EDP_PSR2_IDLE_FRAME_MASK;
+	val |= idle_frames;
+	I915_WRITE(EDP_PSR2_CTL(dev_priv->psr.transcoder), val);
+}
+
+static void tgl_psr2_enable_dc3co(struct drm_i915_private *dev_priv)
+{
+	psr2_program_idle_frames(dev_priv, 0);
+	intel_display_power_set_target_dc_state(dev_priv, DC_STATE_EN_DC3CO);
+}
+
+static void tgl_psr2_disable_dc3co(struct drm_i915_private *dev_priv)
+{
+	int idle_frames;
+
+	intel_display_power_set_target_dc_state(dev_priv, DC_STATE_EN_UPTO_DC6);
+	/*
+	 * Restore PSR2 idle frame let's use 6 as the minimum to cover all known
+	 * cases including the off-by-one issue that HW has in some cases.
+	 */
+	idle_frames = max(6, dev_priv->vbt.psr.idle_frames);
+	idle_frames = max(idle_frames, dev_priv->psr.sink_sync_latency + 1);
+	psr2_program_idle_frames(dev_priv, idle_frames);
+}
+
+static void tgl_dc5_idle_thread(struct work_struct *work)
+{
+	struct drm_i915_private *dev_priv =
+		container_of(work, typeof(*dev_priv), psr.idle_work.work);
+
+	mutex_lock(&dev_priv->psr.lock);
+	/* If delayed work is pending, it is not idle */
+	if (delayed_work_pending(&dev_priv->psr.idle_work))
+		goto unlock;
+
+	DRM_DEBUG_KMS("DC5/6 idle thread\n");
+	tgl_psr2_disable_dc3co(dev_priv);
+unlock:
+	mutex_unlock(&dev_priv->psr.lock);
+}
+
+static void tgl_disallow_dc3co_on_psr2_exit(struct drm_i915_private *dev_priv)
+{
+	if (!dev_priv->psr.dc3co_enabled)
+		return;
+
+	cancel_delayed_work(&dev_priv->psr.idle_work);
+	/* Before PSR2 exit disallow dc3co*/
+	tgl_psr2_disable_dc3co(dev_priv);
+}
+
 static bool intel_psr2_config_valid(struct intel_dp *intel_dp,
 				    struct intel_crtc_state *crtc_state)
 {
@@ -746,6 +813,8 @@ static void intel_psr_enable_locked(struct drm_i915_private *dev_priv,
 	dev_priv->psr.psr2_enabled = intel_psr2_enabled(dev_priv, crtc_state);
 	dev_priv->psr.busy_frontbuffer_bits = 0;
 	dev_priv->psr.pipe = to_intel_crtc(crtc_state->base.crtc)->pipe;
+	dev_priv->psr.dc3co_enabled = !!crtc_state->dc3co_exitline;
+	dev_priv->psr.dc3co_exit_delay = intel_get_frame_time_us(crtc_state);
 	dev_priv->psr.transcoder = crtc_state->cpu_transcoder;
 
 	/*
@@ -829,6 +898,7 @@ static void intel_psr_exit(struct drm_i915_private *dev_priv)
 	}
 
 	if (dev_priv->psr.psr2_enabled) {
+		tgl_disallow_dc3co_on_psr2_exit(dev_priv);
 		val = I915_READ(EDP_PSR2_CTL(dev_priv->psr.transcoder));
 		WARN_ON(!(val & EDP_PSR2_ENABLE));
 		val &= ~EDP_PSR2_ENABLE;
@@ -901,6 +971,7 @@ void intel_psr_disable(struct intel_dp *intel_dp,
 
 	mutex_unlock(&dev_priv->psr.lock);
 	cancel_work_sync(&dev_priv->psr.work);
+	cancel_delayed_work_sync(&dev_priv->psr.idle_work);
 }
 
 static void psr_force_hw_tracking_exit(struct drm_i915_private *dev_priv)
@@ -1208,6 +1279,44 @@ void intel_psr_invalidate(struct drm_i915_private *dev_priv,
 	mutex_unlock(&dev_priv->psr.lock);
 }
 
+/*
+ * When we will be completely rely on PSR2 S/W tracking in future,
+ * intel_psr_flush() will invalidate and flush the PSR for ORIGIN_FLIP
+ * event also therefore tgl_dc3co_flush() require to be changed
+ * accrodingly in future.
+ */
+static void
+tgl_dc3co_flush(struct drm_i915_private *dev_priv,
+		unsigned int frontbuffer_bits, enum fb_op_origin origin)
+{
+	u32 delay;
+
+	mutex_lock(&dev_priv->psr.lock);
+
+	if (!dev_priv->psr.dc3co_enabled)
+		goto unlock;
+
+	if (!dev_priv->psr.psr2_enabled || !dev_priv->psr.active)
+		goto unlock;
+
+	/*
+	 * At every frontbuffer flush flip event modified delay of delayed work,
+	 * when delayed work schedules that means display has been idle.
+	 */
+	if (!(frontbuffer_bits &
+	    INTEL_FRONTBUFFER_ALL_MASK(dev_priv->psr.pipe)))
+		goto unlock;
+
+	tgl_psr2_enable_dc3co(dev_priv);
+	/* DC5/DC6 required idle frames = 6 */
+	delay = 6 * dev_priv->psr.dc3co_exit_delay;
+	mod_delayed_work(system_wq, &dev_priv->psr.idle_work,
+			 usecs_to_jiffies(delay));
+
+unlock:
+	mutex_unlock(&dev_priv->psr.lock);
+}
+
 /**
  * intel_psr_flush - Flush PSR
  * @dev_priv: i915 device
@@ -1227,8 +1336,10 @@ void intel_psr_flush(struct drm_i915_private *dev_priv,
 	if (!CAN_PSR(dev_priv))
 		return;
 
-	if (origin == ORIGIN_FLIP)
+	if (origin == ORIGIN_FLIP) {
+		tgl_dc3co_flush(dev_priv, frontbuffer_bits, origin);
 		return;
+	}
 
 	mutex_lock(&dev_priv->psr.lock);
 	if (!dev_priv->psr.enabled) {
@@ -1284,6 +1395,7 @@ void intel_psr_init(struct drm_i915_private *dev_priv)
 		dev_priv->psr.link_standby = dev_priv->vbt.psr.full_link;
 
 	INIT_WORK(&dev_priv->psr.work, intel_psr_work);
+	INIT_DELAYED_WORK(&dev_priv->psr.idle_work, tgl_dc5_idle_thread);
 	mutex_init(&dev_priv->psr.lock);
 }
 
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 6521a62e6817..ac0160989656 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -501,6 +501,9 @@ struct i915_psr {
 	bool sink_not_reliable;
 	bool irq_aux_error;
 	u16 su_x_granularity;
+	bool dc3co_enabled;
+	u32 dc3co_exit_delay;
+	struct delayed_work idle_work;
 };
 
 #define QUIRK_LVDS_SSC_DISABLE (1<<1)
-- 
2.21.0

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply related	[flat|nested] 20+ messages in thread

* [PATCH v10 6/6] drm/i915/tgl: Add DC3CO counter in i915_dmc_info
  2019-10-03  8:17 [PATCH v10 RESEND 0/6] DC3CO Support for TGL test with DC3CO IGT Anshuman Gupta
                   ` (4 preceding siblings ...)
  2019-10-03  8:17 ` [PATCH v10 5/6] drm/i915/tgl: Switch between dc3co and dc5 based on display idleness Anshuman Gupta
@ 2019-10-03  8:17 ` Anshuman Gupta
  2019-10-03 10:20 ` ✓ Fi.CI.BAT: success for DC3CO Support for TGL test with DC3CO IGT Patchwork
                   ` (4 subsequent siblings)
  10 siblings, 0 replies; 20+ messages in thread
From: Anshuman Gupta @ 2019-10-03  8:17 UTC (permalink / raw)
  To: intel-gfx

Adding DC3CO counter in i915_dmc_info debugfs will be
useful for DC3CO validation.
DMC firmware uses DMC_DEBUG3 register as DC3CO counter
register on TGL, as per B.Specs DMC_DEBUG3 is general
purpose register.

v1: comment modification for DMC_DBUG3.
    using GEN >= 12 check instead of IS_TIGERLAKE()
    to print DMC_DEBUG3 counter value.

Cc: Jani Nikula <jani.nikula@intel.com>
Cc: Imre Deak <imre.deak@intel.com>
Cc: Animesh Manna <animesh.manna@intel.com>
Reviewed-by: Imre Deak <imre.deak@intel.com>
Signed-off-by: Anshuman Gupta <anshuman.gupta@intel.com>
---
 drivers/gpu/drm/i915/i915_debugfs.c | 7 +++++++
 drivers/gpu/drm/i915/i915_reg.h     | 2 ++
 2 files changed, 9 insertions(+)

diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
index fec9fb7cc384..a3882e6abf68 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -2413,6 +2413,13 @@ static int i915_dmc_info(struct seq_file *m, void *unused)
 	if (INTEL_GEN(dev_priv) >= 12) {
 		dc5_reg = TGL_DMC_DEBUG_DC5_COUNT;
 		dc6_reg = TGL_DMC_DEBUG_DC6_COUNT;
+		/*
+		 * NOTE: DMC_DEBUG3 is a general purpose reg.
+		 * According to B.Specs:49196 DMC f/w reuses DC5/6 counter
+		 * reg for DC3CO debugging and validation,
+		 * but TGL DMC f/w is using DMC_DEBUG3 reg for DC3CO counter.
+		 */
+		seq_printf(m, "DC3CO count: %d\n", I915_READ(DMC_DEBUG3));
 	} else {
 		dc5_reg = IS_BROXTON(dev_priv) ? BXT_CSR_DC3_DC5_COUNT :
 						 SKL_CSR_DC3_DC5_COUNT;
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 8fd93008214b..8a537c5aa71e 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -7267,6 +7267,8 @@ enum {
 #define TGL_DMC_DEBUG_DC5_COUNT	_MMIO(0x101084)
 #define TGL_DMC_DEBUG_DC6_COUNT	_MMIO(0x101088)
 
+#define DMC_DEBUG3		_MMIO(0x101090)
+
 /* interrupts */
 #define DE_MASTER_IRQ_CONTROL   (1 << 31)
 #define DE_SPRITEB_FLIP_DONE    (1 << 29)
-- 
2.21.0

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply related	[flat|nested] 20+ messages in thread

* ✓ Fi.CI.BAT: success for DC3CO Support for TGL test with DC3CO IGT
  2019-10-03  8:17 [PATCH v10 RESEND 0/6] DC3CO Support for TGL test with DC3CO IGT Anshuman Gupta
                   ` (5 preceding siblings ...)
  2019-10-03  8:17 ` [PATCH v10 6/6] drm/i915/tgl: Add DC3CO counter in i915_dmc_info Anshuman Gupta
@ 2019-10-03 10:20 ` Patchwork
  2019-10-03 16:37 ` ✓ Fi.CI.IGT: " Patchwork
                   ` (3 subsequent siblings)
  10 siblings, 0 replies; 20+ messages in thread
From: Patchwork @ 2019-10-03 10:20 UTC (permalink / raw)
  To: Anshuman Gupta; +Cc: intel-gfx

== Series Details ==

Series: DC3CO Support for TGL test with DC3CO IGT
URL   : https://patchwork.freedesktop.org/series/67525/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_6996 -> Patchwork_14642
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14642/index.html

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in Patchwork_14642:

### IGT changes ###

#### Possible regressions ####

  * {igt@i915_pm_dc@dc3co-vpb-simulation} (NEW):
    - {fi-icl-dsi}:       NOTRUN -> [SKIP][1]
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14642/fi-icl-dsi/igt@i915_pm_dc@dc3co-vpb-simulation.html
    - {fi-icl-u4}:        NOTRUN -> [SKIP][2]
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14642/fi-icl-u4/igt@i915_pm_dc@dc3co-vpb-simulation.html
    - fi-icl-u2:          NOTRUN -> [SKIP][3]
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14642/fi-icl-u2/igt@i915_pm_dc@dc3co-vpb-simulation.html
    - fi-cml-u2:          NOTRUN -> [SKIP][4]
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14642/fi-cml-u2/igt@i915_pm_dc@dc3co-vpb-simulation.html
    - {fi-cml-s}:         NOTRUN -> [SKIP][5]
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14642/fi-cml-s/igt@i915_pm_dc@dc3co-vpb-simulation.html

  
New tests
---------

  New tests have been introduced between CI_DRM_6996 and Patchwork_14642:

### New IGT tests (1) ###

  * igt@i915_pm_dc@dc3co-vpb-simulation:
    - Statuses : 1 pass(s) 41 skip(s)
    - Exec time: [0.0, 4.09] s

  

Known issues
------------

  Here are the changes found in Patchwork_14642 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@i915_module_load@reload:
    - fi-blb-e6850:       [PASS][6] -> [INCOMPLETE][7] ([fdo#107718])
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6996/fi-blb-e6850/igt@i915_module_load@reload.html
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14642/fi-blb-e6850/igt@i915_module_load@reload.html

  
#### Possible fixes ####

  * igt@i915_selftest@live_gem_contexts:
    - {fi-tgl-u}:         [INCOMPLETE][8] -> [PASS][9]
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6996/fi-tgl-u/igt@i915_selftest@live_gem_contexts.html
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14642/fi-tgl-u/igt@i915_selftest@live_gem_contexts.html

  * igt@i915_selftest@live_hangcheck:
    - fi-cfl-8109u:       [INCOMPLETE][10] ([fdo#106070]) -> [PASS][11]
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6996/fi-cfl-8109u/igt@i915_selftest@live_hangcheck.html
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14642/fi-cfl-8109u/igt@i915_selftest@live_hangcheck.html

  
#### Warnings ####

  * igt@i915_module_load@reload:
    - fi-icl-u2:          [DMESG-WARN][12] ([fdo#110595]) -> [DMESG-WARN][13] ([fdo#110595] / [fdo#111214])
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6996/fi-icl-u2/igt@i915_module_load@reload.html
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14642/fi-icl-u2/igt@i915_module_load@reload.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#106070]: https://bugs.freedesktop.org/show_bug.cgi?id=106070
  [fdo#107718]: https://bugs.freedesktop.org/show_bug.cgi?id=107718
  [fdo#110595]: https://bugs.freedesktop.org/show_bug.cgi?id=110595
  [fdo#111214]: https://bugs.freedesktop.org/show_bug.cgi?id=111214


Participating hosts (52 -> 43)
------------------------------

  Missing    (9): fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-apl-guc fi-icl-y fi-icl-guc fi-byt-clapper fi-bdw-samus 


Build changes
-------------

  * CI: CI-20190529 -> None
  * IGT: IGT_5210 -> IGTPW_3531
  * Linux: CI_DRM_6996 -> Patchwork_14642

  CI-20190529: 20190529
  CI_DRM_6996: 98596d29a3cff9d996c42468eb606036faf42954 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGTPW_3531: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3531/index.html
  IGT_5210: 74f55119f9920b65996535210a09147997804136 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_14642: 0e2031500f6d744f3bea3bde4c00e2ee7fefa95f @ git://anongit.freedesktop.org/gfx-ci/linux


== Linux commits ==

0e2031500f6d drm/i915/tgl: Add DC3CO counter in i915_dmc_info
552a6d9759e0 drm/i915/tgl: Switch between dc3co and dc5 based on display idleness
e2f6b0ee1a22 drm/i915/tgl: Do modeset to enable and configure DC3CO exitline
8abf259c21df drm/i915/tgl: Enable DC3CO state in "DC Off" power well
1e0dc8871bed drm/i915/tgl: Add DC3CO mask to allowed_dc_mask and gen9_dc_mask
394fcdf39c39 drm/i915/tgl: Add DC3CO required register and bits

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14642/index.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 20+ messages in thread

* ✓ Fi.CI.IGT: success for DC3CO Support for TGL test with DC3CO IGT
  2019-10-03  8:17 [PATCH v10 RESEND 0/6] DC3CO Support for TGL test with DC3CO IGT Anshuman Gupta
                   ` (6 preceding siblings ...)
  2019-10-03 10:20 ` ✓ Fi.CI.BAT: success for DC3CO Support for TGL test with DC3CO IGT Patchwork
@ 2019-10-03 16:37 ` Patchwork
  2019-10-07 10:46 ` ✗ Fi.CI.BAT: failure for DC3CO Support for TGL test with DC3CO IGT (rev2) Patchwork
                   ` (2 subsequent siblings)
  10 siblings, 0 replies; 20+ messages in thread
From: Patchwork @ 2019-10-03 16:37 UTC (permalink / raw)
  To: Anshuman Gupta; +Cc: intel-gfx

== Series Details ==

Series: DC3CO Support for TGL test with DC3CO IGT
URL   : https://patchwork.freedesktop.org/series/67525/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_6996_full -> Patchwork_14642_full
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in Patchwork_14642_full:

### IGT changes ###

#### Possible regressions ####

  * {igt@i915_pm_dc@dc3co-vpb-simulation} (NEW):
    - shard-iclb:         NOTRUN -> [SKIP][1]
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14642/shard-iclb8/igt@i915_pm_dc@dc3co-vpb-simulation.html

  
#### Suppressed ####

  The following results come from untrusted machines, tests, or statuses.
  They do not affect the overall result.

  * igt@kms_cursor_edge_walk@pipe-a-128x128-bottom-edge:
    - {shard-tglb}:       NOTRUN -> [INCOMPLETE][2]
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14642/shard-tglb4/igt@kms_cursor_edge_walk@pipe-a-128x128-bottom-edge.html

  
New tests
---------

  New tests have been introduced between CI_DRM_6996_full and Patchwork_14642_full:

### New IGT tests (1) ###

  * igt@i915_pm_dc@dc3co-vpb-simulation:
    - Statuses : 6 skip(s)
    - Exec time: [0.0] s

  

Known issues
------------

  Here are the changes found in Patchwork_14642_full that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@gem_ctx_isolation@bcs0-s3:
    - shard-iclb:         [PASS][3] -> [INCOMPLETE][4] ([fdo#107713] / [fdo#109100])
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6996/shard-iclb1/igt@gem_ctx_isolation@bcs0-s3.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14642/shard-iclb1/igt@gem_ctx_isolation@bcs0-s3.html

  * igt@gem_eio@unwedge-stress:
    - shard-apl:          [PASS][5] -> [INCOMPLETE][6] ([fdo#103927]) +2 similar issues
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6996/shard-apl1/igt@gem_eio@unwedge-stress.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14642/shard-apl6/igt@gem_eio@unwedge-stress.html

  * igt@gem_exec_schedule@independent-bsd2:
    - shard-iclb:         [PASS][7] -> [SKIP][8] ([fdo#109276]) +21 similar issues
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6996/shard-iclb2/igt@gem_exec_schedule@independent-bsd2.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14642/shard-iclb7/igt@gem_exec_schedule@independent-bsd2.html

  * igt@gem_exec_schedule@reorder-wide-bsd:
    - shard-iclb:         [PASS][9] -> [SKIP][10] ([fdo#111325]) +3 similar issues
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6996/shard-iclb3/igt@gem_exec_schedule@reorder-wide-bsd.html
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14642/shard-iclb1/igt@gem_exec_schedule@reorder-wide-bsd.html

  * igt@gem_userptr_blits@dmabuf-sync:
    - shard-snb:          [PASS][11] -> [DMESG-WARN][12] ([fdo#111870]) +2 similar issues
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6996/shard-snb2/igt@gem_userptr_blits@dmabuf-sync.html
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14642/shard-snb7/igt@gem_userptr_blits@dmabuf-sync.html

  * igt@gem_userptr_blits@sync-unmap-after-close:
    - shard-hsw:          [PASS][13] -> [DMESG-WARN][14] ([fdo#111870]) +1 similar issue
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6996/shard-hsw6/igt@gem_userptr_blits@sync-unmap-after-close.html
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14642/shard-hsw1/igt@gem_userptr_blits@sync-unmap-after-close.html
    - shard-skl:          [PASS][15] -> [DMESG-WARN][16] ([fdo#111870])
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6996/shard-skl5/igt@gem_userptr_blits@sync-unmap-after-close.html
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14642/shard-skl1/igt@gem_userptr_blits@sync-unmap-after-close.html

  * igt@gem_userptr_blits@sync-unmap-cycles:
    - shard-apl:          [PASS][17] -> [DMESG-WARN][18] ([fdo#109385] / [fdo#111870]) +1 similar issue
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6996/shard-apl3/igt@gem_userptr_blits@sync-unmap-cycles.html
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14642/shard-apl6/igt@gem_userptr_blits@sync-unmap-cycles.html

  * igt@i915_suspend@fence-restore-tiled2untiled:
    - shard-apl:          [PASS][19] -> [DMESG-WARN][20] ([fdo#108566]) +5 similar issues
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6996/shard-apl3/igt@i915_suspend@fence-restore-tiled2untiled.html
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14642/shard-apl3/igt@i915_suspend@fence-restore-tiled2untiled.html

  * igt@kms_cursor_crc@pipe-b-cursor-alpha-transparent:
    - shard-skl:          [PASS][21] -> [FAIL][22] ([fdo#103232])
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6996/shard-skl6/igt@kms_cursor_crc@pipe-b-cursor-alpha-transparent.html
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14642/shard-skl8/igt@kms_cursor_crc@pipe-b-cursor-alpha-transparent.html

  * igt@kms_flip@flip-vs-expired-vblank:
    - shard-skl:          [PASS][23] -> [FAIL][24] ([fdo#105363])
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6996/shard-skl7/igt@kms_flip@flip-vs-expired-vblank.html
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14642/shard-skl5/igt@kms_flip@flip-vs-expired-vblank.html

  * igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-indfb-draw-pwrite:
    - shard-iclb:         [PASS][25] -> [FAIL][26] ([fdo#103167]) +3 similar issues
   [25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6996/shard-iclb5/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-indfb-draw-pwrite.html
   [26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14642/shard-iclb7/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-indfb-draw-pwrite.html

  * igt@kms_plane_alpha_blend@pipe-b-coverage-7efc:
    - shard-skl:          [PASS][27] -> [FAIL][28] ([fdo#108145] / [fdo#110403])
   [27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6996/shard-skl9/igt@kms_plane_alpha_blend@pipe-b-coverage-7efc.html
   [28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14642/shard-skl2/igt@kms_plane_alpha_blend@pipe-b-coverage-7efc.html

  * igt@kms_plane_alpha_blend@pipe-c-constant-alpha-min:
    - shard-skl:          [PASS][29] -> [FAIL][30] ([fdo#108145])
   [29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6996/shard-skl1/igt@kms_plane_alpha_blend@pipe-c-constant-alpha-min.html
   [30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14642/shard-skl8/igt@kms_plane_alpha_blend@pipe-c-constant-alpha-min.html

  * igt@kms_psr2_su@frontbuffer:
    - shard-iclb:         [PASS][31] -> [SKIP][32] ([fdo#109642] / [fdo#111068])
   [31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6996/shard-iclb2/igt@kms_psr2_su@frontbuffer.html
   [32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14642/shard-iclb4/igt@kms_psr2_su@frontbuffer.html

  * igt@kms_psr@no_drrs:
    - shard-iclb:         [PASS][33] -> [FAIL][34] ([fdo#108341])
   [33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6996/shard-iclb5/igt@kms_psr@no_drrs.html
   [34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14642/shard-iclb1/igt@kms_psr@no_drrs.html

  * igt@kms_psr@psr2_suspend:
    - shard-iclb:         [PASS][35] -> [SKIP][36] ([fdo#109441]) +1 similar issue
   [35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6996/shard-iclb2/igt@kms_psr@psr2_suspend.html
   [36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14642/shard-iclb8/igt@kms_psr@psr2_suspend.html

  * igt@kms_setmode@basic:
    - shard-skl:          [PASS][37] -> [FAIL][38] ([fdo#99912])
   [37]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6996/shard-skl2/igt@kms_setmode@basic.html
   [38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14642/shard-skl2/igt@kms_setmode@basic.html

  
#### Possible fixes ####

  * igt@gem_exec_balancer@smoke:
    - shard-iclb:         [SKIP][39] ([fdo#110854]) -> [PASS][40]
   [39]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6996/shard-iclb8/igt@gem_exec_balancer@smoke.html
   [40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14642/shard-iclb4/igt@gem_exec_balancer@smoke.html

  * igt@gem_exec_schedule@preempt-queue-bsd:
    - shard-iclb:         [SKIP][41] ([fdo#111325]) -> [PASS][42]
   [41]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6996/shard-iclb2/igt@gem_exec_schedule@preempt-queue-bsd.html
   [42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14642/shard-iclb6/igt@gem_exec_schedule@preempt-queue-bsd.html

  * igt@gem_exec_schedule@preempt-queue-bsd1:
    - shard-iclb:         [SKIP][43] ([fdo#109276]) -> [PASS][44] +11 similar issues
   [43]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6996/shard-iclb8/igt@gem_exec_schedule@preempt-queue-bsd1.html
   [44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14642/shard-iclb1/igt@gem_exec_schedule@preempt-queue-bsd1.html

  * igt@gem_mmap_gtt@basic-small-copy:
    - shard-hsw:          [DMESG-WARN][45] -> [PASS][46]
   [45]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6996/shard-hsw6/igt@gem_mmap_gtt@basic-small-copy.html
   [46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14642/shard-hsw6/igt@gem_mmap_gtt@basic-small-copy.html

  * igt@gem_userptr_blits@map-fixed-invalidate-busy:
    - shard-glk:          [DMESG-WARN][47] ([fdo#111870]) -> [PASS][48]
   [47]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6996/shard-glk2/igt@gem_userptr_blits@map-fixed-invalidate-busy.html
   [48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14642/shard-glk6/igt@gem_userptr_blits@map-fixed-invalidate-busy.html
    - shard-apl:          [DMESG-WARN][49] ([fdo#109385] / [fdo#111870]) -> [PASS][50]
   [49]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6996/shard-apl3/igt@gem_userptr_blits@map-fixed-invalidate-busy.html
   [50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14642/shard-apl3/igt@gem_userptr_blits@map-fixed-invalidate-busy.html

  * igt@gem_userptr_blits@map-fixed-invalidate-overlap-busy:
    - shard-iclb:         [DMESG-WARN][51] ([fdo#111870]) -> [PASS][52] +1 similar issue
   [51]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6996/shard-iclb4/igt@gem_userptr_blits@map-fixed-invalidate-overlap-busy.html
   [52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14642/shard-iclb4/igt@gem_userptr_blits@map-fixed-invalidate-overlap-busy.html
    - shard-skl:          [DMESG-WARN][53] ([fdo#111870]) -> [PASS][54] +2 similar issues
   [53]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6996/shard-skl7/igt@gem_userptr_blits@map-fixed-invalidate-overlap-busy.html
   [54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14642/shard-skl10/igt@gem_userptr_blits@map-fixed-invalidate-overlap-busy.html
    - shard-hsw:          [DMESG-WARN][55] ([fdo#111870]) -> [PASS][56] +1 similar issue
   [55]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6996/shard-hsw8/igt@gem_userptr_blits@map-fixed-invalidate-overlap-busy.html
   [56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14642/shard-hsw5/igt@gem_userptr_blits@map-fixed-invalidate-overlap-busy.html

  * igt@gem_userptr_blits@sync-unmap:
    - shard-snb:          [DMESG-WARN][57] ([fdo#111870]) -> [PASS][58]
   [57]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6996/shard-snb5/igt@gem_userptr_blits@sync-unmap.html
   [58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14642/shard-snb7/igt@gem_userptr_blits@sync-unmap.html

  * igt@gem_userptr_blits@sync-unmap-cycles:
    - shard-kbl:          [DMESG-WARN][59] ([fdo#111870]) -> [PASS][60] +2 similar issues
   [59]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6996/shard-kbl6/igt@gem_userptr_blits@sync-unmap-cycles.html
   [60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14642/shard-kbl1/igt@gem_userptr_blits@sync-unmap-cycles.html

  * igt@kms_atomic_transition@plane-all-modeset-transition-fencing:
    - shard-apl:          [INCOMPLETE][61] ([fdo#103927]) -> [PASS][62] +2 similar issues
   [61]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6996/shard-apl3/igt@kms_atomic_transition@plane-all-modeset-transition-fencing.html
   [62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14642/shard-apl4/igt@kms_atomic_transition@plane-all-modeset-transition-fencing.html

  * igt@kms_color@pipe-a-ctm-0-75:
    - shard-skl:          [FAIL][63] ([fdo#108682]) -> [PASS][64]
   [63]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6996/shard-skl7/igt@kms_color@pipe-a-ctm-0-75.html
   [64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14642/shard-skl1/igt@kms_color@pipe-a-ctm-0-75.html

  * igt@kms_cursor_crc@pipe-a-cursor-128x128-random:
    - shard-skl:          [FAIL][65] ([fdo#103232]) -> [PASS][66]
   [65]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6996/shard-skl7/igt@kms_cursor_crc@pipe-a-cursor-128x128-random.html
   [66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14642/shard-skl10/igt@kms_cursor_crc@pipe-a-cursor-128x128-random.html

  * igt@kms_cursor_crc@pipe-c-cursor-suspend:
    - shard-apl:          [DMESG-WARN][67] ([fdo#108566]) -> [PASS][68] +4 similar issues
   [67]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6996/shard-apl2/igt@kms_cursor_crc@pipe-c-cursor-suspend.html
   [68]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14642/shard-apl7/igt@kms_cursor_crc@pipe-c-cursor-suspend.html

  * igt@kms_draw_crc@draw-method-xrgb2101010-mmap-wc-untiled:
    - shard-skl:          [FAIL][69] ([fdo#103184] / [fdo#103232]) -> [PASS][70]
   [69]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6996/shard-skl7/igt@kms_draw_crc@draw-method-xrgb2101010-mmap-wc-untiled.html
   [70]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14642/shard-skl6/igt@kms_draw_crc@draw-method-xrgb2101010-mmap-wc-untiled.html

  * igt@kms_flip@2x-flip-vs-suspend:
    - shard-hsw:          [INCOMPLETE][71] ([fdo#103540]) -> [PASS][72]
   [71]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6996/shard-hsw6/igt@kms_flip@2x-flip-vs-suspend.html
   [72]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14642/shard-hsw7/igt@kms_flip@2x-flip-vs-suspend.html

  * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-indfb-draw-blt:
    - shard-iclb:         [FAIL][73] ([fdo#103167]) -> [PASS][74] +4 similar issues
   [73]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6996/shard-iclb4/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-indfb-draw-blt.html
   [74]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14642/shard-iclb8/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-indfb-draw-blt.html

  * igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-spr-indfb-draw-blt:
    - {shard-tglb}:       [FAIL][75] ([fdo#103167]) -> [PASS][76]
   [75]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6996/shard-tglb8/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-spr-indfb-draw-blt.html
   [76]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14642/shard-tglb6/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-spr-indfb-draw-blt.html

  * igt@kms_frontbuffer_tracking@psr-1p-primscrn-cur-indfb-draw-mmap-wc:
    - shard-skl:          [FAIL][77] ([fdo#103167]) -> [PASS][78]
   [77]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6996/shard-skl7/igt@kms_frontbuffer_tracking@psr-1p-primscrn-cur-indfb-draw-mmap-wc.html
   [78]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14642/shard-skl8/igt@kms_frontbuffer_tracking@psr-1p-primscrn-cur-indfb-draw-mmap-wc.html

  * igt@kms_plane_alpha_blend@pipe-b-constant-alpha-min:
    - shard-skl:          [FAIL][79] ([fdo#108145]) -> [PASS][80]
   [79]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6996/shard-skl3/igt@kms_plane_alpha_blend@pipe-b-constant-alpha-min.html
   [80]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14642/shard-skl6/igt@kms_plane_alpha_blend@pipe-b-constant-alpha-min.html

  * igt@kms_plane_alpha_blend@pipe-c-coverage-7efc:
    - shard-skl:          [FAIL][81] ([fdo#108145] / [fdo#110403]) -> [PASS][82]
   [81]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6996/shard-skl8/igt@kms_plane_alpha_blend@pipe-c-coverage-7efc.html
   [82]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14642/shard-skl2/igt@kms_plane_alpha_blend@pipe-c-coverage-7efc.html

  * igt@kms_psr@psr2_primary_page_flip:
    - shard-iclb:         [SKIP][83] ([fdo#109441]) -> [PASS][84] +1 similar issue
   [83]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6996/shard-iclb4/igt@kms_psr@psr2_primary_page_flip.html
   [84]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14642/shard-iclb2/igt@kms_psr@psr2_primary_page_flip.html

  * igt@kms_setmode@basic:
    - shard-hsw:          [FAIL][85] ([fdo#99912]) -> [PASS][86]
   [85]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6996/shard-hsw1/igt@kms_setmode@basic.html
   [86]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14642/shard-hsw7/igt@kms_setmode@basic.html

  * igt@kms_setmode@invalid-clone-exclusive-crtc:
    - {shard-tglb}:       [DMESG-WARN][87] ([fdo#111600]) -> [PASS][88]
   [87]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6996/shard-tglb2/igt@kms_setmode@invalid-clone-exclusive-crtc.html
   [88]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14642/shard-tglb1/igt@kms_setmode@invalid-clone-exclusive-crtc.html

  
#### Warnings ####

  * igt@gem_mocs_settings@mocs-rc6-bsd2:
    - shard-iclb:         [FAIL][89] ([fdo#111330]) -> [SKIP][90] ([fdo#109276])
   [89]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6996/shard-iclb2/igt@gem_mocs_settings@mocs-rc6-bsd2.html
   [90]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14642/shard-iclb3/igt@gem_mocs_settings@mocs-rc6-bsd2.html

  * igt@gem_mocs_settings@mocs-reset-bsd2:
    - shard-iclb:         [SKIP][91] ([fdo#109276]) -> [FAIL][92] ([fdo#111330]) +1 similar issue
   [91]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6996/shard-iclb3/igt@gem_mocs_settings@mocs-reset-bsd2.html
   [92]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14642/shard-iclb4/igt@gem_mocs_settings@mocs-reset-bsd2.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167
  [fdo#103184]: https://bugs.freedesktop.org/show_bug.cgi?id=103184
  [fdo#103232]: https://bugs.freedesktop.org/show_bug.cgi?id=103232
  [fdo#103540]: https://bugs.freedesktop.org/show_bug.cgi?id=103540
  [fdo#103927]: https://bugs.freedesktop.org/show_bug.cgi?id=103927
  [fdo#105363]: https://bugs.freedesktop.org/show_bug.cgi?id=105363
  [fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713
  [fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145
  [fdo#108341]: https://bugs.freedesktop.org/show_bug.cgi?id=108341
  [fdo#108566]: https://bugs.freedesktop.org/show_bug.cgi?id=108566
  [fdo#108682]: https://bugs.freedesktop.org/show_bug.cgi?id=108682
  [fdo#109100]: https://bugs.freedesktop.org/show_bug.cgi?id=109100
  [fdo#109276]: https://bugs.freedesktop.org/show_bug.cgi?id=109276
  [fdo#109385]: https://bugs.freedesktop.org/show_bug.cgi?id=109385
  [fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441
  [fdo#109642]: https://bugs.freedesktop.org/show_bug.cgi?id=109642
  [fdo#110403]: https://bugs.freedesktop.org/show_bug.cgi?id=110403
  [fdo#110548]: https://bugs.freedesktop.org/show_bug.cgi?id=110548
  [fdo#110854]: https://bugs.freedesktop.org/show_bug.cgi?id=110854
  [fdo#111068]: https://bugs.freedesktop.org/show_bug.cgi?id=111068
  [fdo#111325]: https://bugs.freedesktop.org/show_bug.cgi?id=111325
  [fdo#111329]: https://bugs.freedesktop.org/show_bug.cgi?id=111329
  [fdo#111330]: https://bugs.freedesktop.org/show_bug.cgi?id=111330
  [fdo#111600]: https://bugs.freedesktop.org/show_bug.cgi?id=111600
  [fdo#111870]: https://bugs.freedesktop.org/show_bug.cgi?id=111870
  [fdo#99912]: https://bugs.freedesktop.org/show_bug.cgi?id=99912


Participating hosts (11 -> 10)
------------------------------

  Missing    (1): pig-skl-6260u 


Build changes
----

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14642/index.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 20+ messages in thread

* ✗ Fi.CI.BAT: failure for DC3CO Support for TGL test with DC3CO IGT (rev2)
  2019-10-03  8:17 [PATCH v10 RESEND 0/6] DC3CO Support for TGL test with DC3CO IGT Anshuman Gupta
                   ` (7 preceding siblings ...)
  2019-10-03 16:37 ` ✓ Fi.CI.IGT: " Patchwork
@ 2019-10-07 10:46 ` Patchwork
  2019-10-07 11:02   ` Anshuman Gupta
  2019-10-07 15:14 ` ✓ Fi.CI.BAT: success " Patchwork
  2019-10-07 18:37 ` ✗ Fi.CI.IGT: failure " Patchwork
  10 siblings, 1 reply; 20+ messages in thread
From: Patchwork @ 2019-10-07 10:46 UTC (permalink / raw)
  To: Anshuman Gupta; +Cc: intel-gfx

== Series Details ==

Series: DC3CO Support for TGL test with DC3CO IGT (rev2)
URL   : https://patchwork.freedesktop.org/series/67525/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_7021 -> Patchwork_14686
====================================================

Summary
-------

  **FAILURE**

  Serious unknown changes coming with Patchwork_14686 absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_14686, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/index.html

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in Patchwork_14686:

### IGT changes ###

#### Possible regressions ####

  * {igt@i915_pm_dc@dc3co-vpb-simulation} (NEW):
    - {fi-icl-dsi}:       NOTRUN -> [SKIP][1]
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/fi-icl-dsi/igt@i915_pm_dc@dc3co-vpb-simulation.html
    - {fi-icl-guc}:       NOTRUN -> [SKIP][2]
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/fi-icl-guc/igt@i915_pm_dc@dc3co-vpb-simulation.html
    - {fi-icl-u4}:        NOTRUN -> [SKIP][3]
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/fi-icl-u4/igt@i915_pm_dc@dc3co-vpb-simulation.html
    - fi-icl-u2:          NOTRUN -> [SKIP][4]
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/fi-icl-u2/igt@i915_pm_dc@dc3co-vpb-simulation.html
    - fi-cml-u2:          NOTRUN -> [SKIP][5]
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/fi-cml-u2/igt@i915_pm_dc@dc3co-vpb-simulation.html
    - {fi-cml-s}:         NOTRUN -> [SKIP][6]
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/fi-cml-s/igt@i915_pm_dc@dc3co-vpb-simulation.html
    - fi-icl-u3:          NOTRUN -> [SKIP][7]
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/fi-icl-u3/igt@i915_pm_dc@dc3co-vpb-simulation.html

  * igt@i915_selftest@live_execlists:
    - fi-cfl-8109u:       [PASS][8] -> [DMESG-FAIL][9]
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/fi-cfl-8109u/igt@i915_selftest@live_execlists.html
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/fi-cfl-8109u/igt@i915_selftest@live_execlists.html

  
New tests
---------

  New tests have been introduced between CI_DRM_7021 and Patchwork_14686:

### New IGT tests (1) ###

  * igt@i915_pm_dc@dc3co-vpb-simulation:
    - Statuses : 1 pass(s) 44 skip(s)
    - Exec time: [0.0, 4.04] s

  

Known issues
------------

  Here are the changes found in Patchwork_14686 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@gem_mmap_gtt@basic-read-write-distinct:
    - fi-icl-u3:          [PASS][10] -> [DMESG-WARN][11] ([fdo#107724]) +1 similar issue
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/fi-icl-u3/igt@gem_mmap_gtt@basic-read-write-distinct.html
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/fi-icl-u3/igt@gem_mmap_gtt@basic-read-write-distinct.html

  
#### Possible fixes ####

  * igt@gem_ctx_create@basic-files:
    - {fi-tgl-u}:         [INCOMPLETE][12] ([fdo#111735]) -> [PASS][13]
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/fi-tgl-u/igt@gem_ctx_create@basic-files.html
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/fi-tgl-u/igt@gem_ctx_create@basic-files.html

  * igt@gem_exec_suspend@basic:
    - fi-icl-u3:          [FAIL][14] ([fdo#111699]) -> [PASS][15]
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/fi-icl-u3/igt@gem_exec_suspend@basic.html
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/fi-icl-u3/igt@gem_exec_suspend@basic.html

  * igt@gem_mmap_gtt@basic-small-bo-tiledy:
    - fi-icl-u3:          [DMESG-WARN][16] ([fdo#107724]) -> [PASS][17] +1 similar issue
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/fi-icl-u3/igt@gem_mmap_gtt@basic-small-bo-tiledy.html
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/fi-icl-u3/igt@gem_mmap_gtt@basic-small-bo-tiledy.html

  * igt@i915_selftest@live_execlists:
    - fi-icl-u3:          [DMESG-WARN][18] -> [PASS][19]
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/fi-icl-u3/igt@i915_selftest@live_execlists.html
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/fi-icl-u3/igt@i915_selftest@live_execlists.html

  * igt@kms_frontbuffer_tracking@basic:
    - fi-hsw-peppy:       [DMESG-WARN][20] ([fdo#102614]) -> [PASS][21]
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/fi-hsw-peppy/igt@kms_frontbuffer_tracking@basic.html
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/fi-hsw-peppy/igt@kms_frontbuffer_tracking@basic.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#102614]: https://bugs.freedesktop.org/show_bug.cgi?id=102614
  [fdo#107724]: https://bugs.freedesktop.org/show_bug.cgi?id=107724
  [fdo#111699]: https://bugs.freedesktop.org/show_bug.cgi?id=111699
  [fdo#111735]: https://bugs.freedesktop.org/show_bug.cgi?id=111735


Participating hosts (52 -> 45)
------------------------------

  Missing    (7): fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-icl-y fi-byt-clapper fi-bdw-samus 


Build changes
-------------

  * CI: CI-20190529 -> None
  * IGT: IGT_5215 -> IGTPW_3531
  * Linux: CI_DRM_7021 -> Patchwork_14686

  CI-20190529: 20190529
  CI_DRM_7021: fc1c1e3f1cfa9bad973b7547b8c123b3ac80c678 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGTPW_3531: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3531/index.html
  IGT_5215: 880c8d3c9831349a269ac6822c8d44e80807089f @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_14686: 6338b6ab8948f60fb24c6959a936d3938b2aeca4 @ git://anongit.freedesktop.org/gfx-ci/linux


== Linux commits ==

6338b6ab8948 drm/i915/tgl: Add DC3CO counter in i915_dmc_info
3e3548454ce1 drm/i915/tgl: Switch between dc3co and dc5 based on display idleness
d03246a7f6a5 drm/i915/tgl: Do modeset to enable and configure DC3CO exitline
3aa8daffb53e drm/i915/tgl: Enable DC3CO state in "DC Off" power well
e4283eee90b0 drm/i915/tgl: Add DC3CO mask to allowed_dc_mask and gen9_dc_mask
15f3dbf20193 drm/i915/tgl: Add DC3CO required register and bits

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/index.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 20+ messages in thread

* Re: ✗ Fi.CI.BAT: failure for DC3CO Support for TGL test with DC3CO IGT (rev2)
  2019-10-07 10:46 ` ✗ Fi.CI.BAT: failure for DC3CO Support for TGL test with DC3CO IGT (rev2) Patchwork
@ 2019-10-07 11:02   ` Anshuman Gupta
  2019-10-07 13:31     ` Vudum, Lakshminarayana
  0 siblings, 1 reply; 20+ messages in thread
From: Anshuman Gupta @ 2019-10-07 11:02 UTC (permalink / raw)
  To: intel-gfx, lakshminarayana.vudum

On 2019-10-07 at 10:46:35 +0000, Patchwork wrote:
> == Series Details ==
> 
> Series: DC3CO Support for TGL test with DC3CO IGT (rev2)
> URL   : https://patchwork.freedesktop.org/series/67525/
> State : failure
> 
> == Summary ==
> 
> CI Bug Log - changes from CI_DRM_7021 -> Patchwork_14686
> ====================================================
> 
> Summary
> -------
> 
>   **FAILURE**
> 
>   Serious unknown changes coming with Patchwork_14686 absolutely need to be
>   verified manually.
>   
>   If you think the reported changes have nothing to do with the changes
>   introduced in Patchwork_14686, please notify your bug team to allow them
>   to document this new failure mode, which will reduce false positives in CI.
> 
>   External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/index.html
> 
> Possible new issues
> -------------------
> 
>   Here are the unknown changes that may have been introduced in Patchwork_14686:
> 
> ### IGT changes ###
> 
> #### Possible regressions ####
> 
>   * {igt@i915_pm_dc@dc3co-vpb-simulation} (NEW):
>     - {fi-icl-dsi}:       NOTRUN -> [SKIP][1]
>    [1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/fi-icl-dsi/igt@i915_pm_dc@dc3co-vpb-simulation.html
>     - {fi-icl-guc}:       NOTRUN -> [SKIP][2]
>    [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/fi-icl-guc/igt@i915_pm_dc@dc3co-vpb-simulation.html
>     - {fi-icl-u4}:        NOTRUN -> [SKIP][3]
>    [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/fi-icl-u4/igt@i915_pm_dc@dc3co-vpb-simulation.html
>     - fi-icl-u2:          NOTRUN -> [SKIP][4]
>    [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/fi-icl-u2/igt@i915_pm_dc@dc3co-vpb-simulation.html
>     - fi-cml-u2:          NOTRUN -> [SKIP][5]
>    [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/fi-cml-u2/igt@i915_pm_dc@dc3co-vpb-simulation.html
>     - {fi-cml-s}:         NOTRUN -> [SKIP][6]
>    [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/fi-cml-s/igt@i915_pm_dc@dc3co-vpb-simulation.html
>     - fi-icl-u3:          NOTRUN -> [SKIP][7]
>    [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/fi-icl-u3/igt@i915_pm_dc@dc3co-vpb-simulation.html
> 
>   * igt@i915_selftest@live_execlists:
>     - fi-cfl-8109u:       [PASS][8] -> [DMESG-FAIL][9]
>    [8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/fi-cfl-8109u/igt@i915_selftest@live_execlists.html
>    [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/fi-cfl-8109u/igt@i915_selftest@live_execlists.html
Hi Lakshmi,
Above CI failure DMESG warning has also occured during IGTPW_3538 execution, this is not related to this DC3CO 
series. 
IGTPW_3538:
  - fi-cfl-8109u:       [PASS][3] -> [DMESG-WARN][4]
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7012/fi-cfl-8109u/igt@i915_selftest@live_execlists.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3538/fi-cfl-8109u/igt@i915_selftest@live_execlists.html 

Could you please create a bug for this CI failure and update the filter.

Thanks,
Anshuman Gupta.
> 
>   
> New tests
> ---------
> 
>   New tests have been introduced between CI_DRM_7021 and Patchwork_14686:
> 
> ### New IGT tests (1) ###
> 
>   * igt@i915_pm_dc@dc3co-vpb-simulation:
>     - Statuses : 1 pass(s) 44 skip(s)
>     - Exec time: [0.0, 4.04] s
> 
>   
> 
> Known issues
> ------------
> 
>   Here are the changes found in Patchwork_14686 that come from known issues:
> 
> ### IGT changes ###
> 
> #### Issues hit ####
> 
>   * igt@gem_mmap_gtt@basic-read-write-distinct:
>     - fi-icl-u3:          [PASS][10] -> [DMESG-WARN][11] ([fdo#107724]) +1 similar issue
>    [10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/fi-icl-u3/igt@gem_mmap_gtt@basic-read-write-distinct.html
>    [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/fi-icl-u3/igt@gem_mmap_gtt@basic-read-write-distinct.html
> 
>   
> #### Possible fixes ####
> 
>   * igt@gem_ctx_create@basic-files:
>     - {fi-tgl-u}:         [INCOMPLETE][12] ([fdo#111735]) -> [PASS][13]
>    [12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/fi-tgl-u/igt@gem_ctx_create@basic-files.html
>    [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/fi-tgl-u/igt@gem_ctx_create@basic-files.html
> 
>   * igt@gem_exec_suspend@basic:
>     - fi-icl-u3:          [FAIL][14] ([fdo#111699]) -> [PASS][15]
>    [14]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/fi-icl-u3/igt@gem_exec_suspend@basic.html
>    [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/fi-icl-u3/igt@gem_exec_suspend@basic.html
> 
>   * igt@gem_mmap_gtt@basic-small-bo-tiledy:
>     - fi-icl-u3:          [DMESG-WARN][16] ([fdo#107724]) -> [PASS][17] +1 similar issue
>    [16]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/fi-icl-u3/igt@gem_mmap_gtt@basic-small-bo-tiledy.html
>    [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/fi-icl-u3/igt@gem_mmap_gtt@basic-small-bo-tiledy.html
> 
>   * igt@i915_selftest@live_execlists:
>     - fi-icl-u3:          [DMESG-WARN][18] -> [PASS][19]
>    [18]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/fi-icl-u3/igt@i915_selftest@live_execlists.html
>    [19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/fi-icl-u3/igt@i915_selftest@live_execlists.html
> 
>   * igt@kms_frontbuffer_tracking@basic:
>     - fi-hsw-peppy:       [DMESG-WARN][20] ([fdo#102614]) -> [PASS][21]
>    [20]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/fi-hsw-peppy/igt@kms_frontbuffer_tracking@basic.html
>    [21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/fi-hsw-peppy/igt@kms_frontbuffer_tracking@basic.html
> 
>   
>   {name}: This element is suppressed. This means it is ignored when computing
>           the status of the difference (SUCCESS, WARNING, or FAILURE).
> 
>   [fdo#102614]: https://bugs.freedesktop.org/show_bug.cgi?id=102614
>   [fdo#107724]: https://bugs.freedesktop.org/show_bug.cgi?id=107724
>   [fdo#111699]: https://bugs.freedesktop.org/show_bug.cgi?id=111699
>   [fdo#111735]: https://bugs.freedesktop.org/show_bug.cgi?id=111735
> 
> 
> Participating hosts (52 -> 45)
> ------------------------------
> 
>   Missing    (7): fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-icl-y fi-byt-clapper fi-bdw-samus 
> 
> 
> Build changes
> -------------
> 
>   * CI: CI-20190529 -> None
>   * IGT: IGT_5215 -> IGTPW_3531
>   * Linux: CI_DRM_7021 -> Patchwork_14686
> 
>   CI-20190529: 20190529
>   CI_DRM_7021: fc1c1e3f1cfa9bad973b7547b8c123b3ac80c678 @ git://anongit.freedesktop.org/gfx-ci/linux
>   IGTPW_3531: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3531/index.html
>   IGT_5215: 880c8d3c9831349a269ac6822c8d44e80807089f @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
>   Patchwork_14686: 6338b6ab8948f60fb24c6959a936d3938b2aeca4 @ git://anongit.freedesktop.org/gfx-ci/linux
> 
> 
> == Linux commits ==
> 
> 6338b6ab8948 drm/i915/tgl: Add DC3CO counter in i915_dmc_info
> 3e3548454ce1 drm/i915/tgl: Switch between dc3co and dc5 based on display idleness
> d03246a7f6a5 drm/i915/tgl: Do modeset to enable and configure DC3CO exitline
> 3aa8daffb53e drm/i915/tgl: Enable DC3CO state in "DC Off" power well
> e4283eee90b0 drm/i915/tgl: Add DC3CO mask to allowed_dc_mask and gen9_dc_mask
> 15f3dbf20193 drm/i915/tgl: Add DC3CO required register and bits
> 
> == Logs ==
> 
> For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/index.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 20+ messages in thread

* Re: ✗ Fi.CI.BAT: failure for DC3CO Support for TGL test with DC3CO IGT (rev2)
  2019-10-07 11:02   ` Anshuman Gupta
@ 2019-10-07 13:31     ` Vudum, Lakshminarayana
  0 siblings, 0 replies; 20+ messages in thread
From: Vudum, Lakshminarayana @ 2019-10-07 13:31 UTC (permalink / raw)
  To: Gupta, Anshuman, intel-gfx

Anshuman, I have addressed below failures and updated filters for Bug 111872 .
Lakshmi.
-----Original Message-----
From: Gupta, Anshuman <anshuman.gupta@intel.com> 
Sent: Monday, October 7, 2019 2:02 PM
To: intel-gfx@lists.freedesktop.org; Vudum, Lakshminarayana <lakshminarayana.vudum@intel.com>
Cc: Deak, Imre <imre.deak@intel.com>
Subject: Re: ✗ Fi.CI.BAT: failure for DC3CO Support for TGL test with DC3CO IGT (rev2)

On 2019-10-07 at 10:46:35 +0000, Patchwork wrote:
> == Series Details ==
> 
> Series: DC3CO Support for TGL test with DC3CO IGT (rev2)
> URL   : https://patchwork.freedesktop.org/series/67525/
> State : failure
> 
> == Summary ==
> 
> CI Bug Log - changes from CI_DRM_7021 -> Patchwork_14686 
> ====================================================
> 
> Summary
> -------
> 
>   **FAILURE**
> 
>   Serious unknown changes coming with Patchwork_14686 absolutely need to be
>   verified manually.
>   
>   If you think the reported changes have nothing to do with the changes
>   introduced in Patchwork_14686, please notify your bug team to allow them
>   to document this new failure mode, which will reduce false positives in CI.
> 
>   External URL: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/index.html
> 
> Possible new issues
> -------------------
> 
>   Here are the unknown changes that may have been introduced in Patchwork_14686:
> 
> ### IGT changes ###
> 
> #### Possible regressions ####
> 
>   * {igt@i915_pm_dc@dc3co-vpb-simulation} (NEW):
>     - {fi-icl-dsi}:       NOTRUN -> [SKIP][1]
>    [1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/fi-icl-dsi/igt@i915_pm_dc@dc3co-vpb-simulation.html
>     - {fi-icl-guc}:       NOTRUN -> [SKIP][2]
>    [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/fi-icl-guc/igt@i915_pm_dc@dc3co-vpb-simulation.html
>     - {fi-icl-u4}:        NOTRUN -> [SKIP][3]
>    [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/fi-icl-u4/igt@i915_pm_dc@dc3co-vpb-simulation.html
>     - fi-icl-u2:          NOTRUN -> [SKIP][4]
>    [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/fi-icl-u2/igt@i915_pm_dc@dc3co-vpb-simulation.html
>     - fi-cml-u2:          NOTRUN -> [SKIP][5]
>    [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/fi-cml-u2/igt@i915_pm_dc@dc3co-vpb-simulation.html
>     - {fi-cml-s}:         NOTRUN -> [SKIP][6]
>    [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/fi-cml-s/igt@i915_pm_dc@dc3co-vpb-simulation.html
>     - fi-icl-u3:          NOTRUN -> [SKIP][7]
>    [7]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/fi-icl-u3/igt
> @i915_pm_dc@dc3co-vpb-simulation.html
> 
>   * igt@i915_selftest@live_execlists:
>     - fi-cfl-8109u:       [PASS][8] -> [DMESG-FAIL][9]
>    [8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/fi-cfl-8109u/igt@i915_selftest@live_execlists.html
>    [9]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/fi-cfl-8109u/
> igt@i915_selftest@live_execlists.html
Hi Lakshmi,
Above CI failure DMESG warning has also occured during IGTPW_3538 execution, this is not related to this DC3CO series. 
IGTPW_3538:
  - fi-cfl-8109u:       [PASS][3] -> [DMESG-WARN][4]
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7012/fi-cfl-8109u/igt@i915_selftest@live_execlists.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3538/fi-cfl-8109u/igt@i915_selftest@live_execlists.html 

Could you please create a bug for this CI failure and update the filter.

Thanks,
Anshuman Gupta.
> 
>   
> New tests
> ---------
> 
>   New tests have been introduced between CI_DRM_7021 and Patchwork_14686:
> 
> ### New IGT tests (1) ###
> 
>   * igt@i915_pm_dc@dc3co-vpb-simulation:
>     - Statuses : 1 pass(s) 44 skip(s)
>     - Exec time: [0.0, 4.04] s
> 
>   
> 
> Known issues
> ------------
> 
>   Here are the changes found in Patchwork_14686 that come from known issues:
> 
> ### IGT changes ###
> 
> #### Issues hit ####
> 
>   * igt@gem_mmap_gtt@basic-read-write-distinct:
>     - fi-icl-u3:          [PASS][10] -> [DMESG-WARN][11] ([fdo#107724]) +1 similar issue
>    [10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/fi-icl-u3/igt@gem_mmap_gtt@basic-read-write-distinct.html
>    [11]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/fi-icl-u3/igt
> @gem_mmap_gtt@basic-read-write-distinct.html
> 
>   
> #### Possible fixes ####
> 
>   * igt@gem_ctx_create@basic-files:
>     - {fi-tgl-u}:         [INCOMPLETE][12] ([fdo#111735]) -> [PASS][13]
>    [12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/fi-tgl-u/igt@gem_ctx_create@basic-files.html
>    [13]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/fi-tgl-u/igt@
> gem_ctx_create@basic-files.html
> 
>   * igt@gem_exec_suspend@basic:
>     - fi-icl-u3:          [FAIL][14] ([fdo#111699]) -> [PASS][15]
>    [14]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/fi-icl-u3/igt@gem_exec_suspend@basic.html
>    [15]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/fi-icl-u3/igt
> @gem_exec_suspend@basic.html
> 
>   * igt@gem_mmap_gtt@basic-small-bo-tiledy:
>     - fi-icl-u3:          [DMESG-WARN][16] ([fdo#107724]) -> [PASS][17] +1 similar issue
>    [16]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/fi-icl-u3/igt@gem_mmap_gtt@basic-small-bo-tiledy.html
>    [17]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/fi-icl-u3/igt
> @gem_mmap_gtt@basic-small-bo-tiledy.html
> 
>   * igt@i915_selftest@live_execlists:
>     - fi-icl-u3:          [DMESG-WARN][18] -> [PASS][19]
>    [18]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/fi-icl-u3/igt@i915_selftest@live_execlists.html
>    [19]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/fi-icl-u3/igt
> @i915_selftest@live_execlists.html
> 
>   * igt@kms_frontbuffer_tracking@basic:
>     - fi-hsw-peppy:       [DMESG-WARN][20] ([fdo#102614]) -> [PASS][21]
>    [20]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/fi-hsw-peppy/igt@kms_frontbuffer_tracking@basic.html
>    [21]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/fi-hsw-peppy/
> igt@kms_frontbuffer_tracking@basic.html
> 
>   
>   {name}: This element is suppressed. This means it is ignored when computing
>           the status of the difference (SUCCESS, WARNING, or FAILURE).
> 
>   [fdo#102614]: https://bugs.freedesktop.org/show_bug.cgi?id=102614
>   [fdo#107724]: https://bugs.freedesktop.org/show_bug.cgi?id=107724
>   [fdo#111699]: https://bugs.freedesktop.org/show_bug.cgi?id=111699
>   [fdo#111735]: https://bugs.freedesktop.org/show_bug.cgi?id=111735
> 
> 
> Participating hosts (52 -> 45)
> ------------------------------
> 
>   Missing    (7): fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-icl-y fi-byt-clapper fi-bdw-samus 
> 
> 
> Build changes
> -------------
> 
>   * CI: CI-20190529 -> None
>   * IGT: IGT_5215 -> IGTPW_3531
>   * Linux: CI_DRM_7021 -> Patchwork_14686
> 
>   CI-20190529: 20190529
>   CI_DRM_7021: fc1c1e3f1cfa9bad973b7547b8c123b3ac80c678 @ git://anongit.freedesktop.org/gfx-ci/linux
>   IGTPW_3531: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3531/index.html
>   IGT_5215: 880c8d3c9831349a269ac6822c8d44e80807089f @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
>   Patchwork_14686: 6338b6ab8948f60fb24c6959a936d3938b2aeca4 @ 
> git://anongit.freedesktop.org/gfx-ci/linux
> 
> 
> == Linux commits ==
> 
> 6338b6ab8948 drm/i915/tgl: Add DC3CO counter in i915_dmc_info
> 3e3548454ce1 drm/i915/tgl: Switch between dc3co and dc5 based on 
> display idleness
> d03246a7f6a5 drm/i915/tgl: Do modeset to enable and configure DC3CO 
> exitline 3aa8daffb53e drm/i915/tgl: Enable DC3CO state in "DC Off" 
> power well
> e4283eee90b0 drm/i915/tgl: Add DC3CO mask to allowed_dc_mask and 
> gen9_dc_mask
> 15f3dbf20193 drm/i915/tgl: Add DC3CO required register and bits
> 
> == Logs ==
> 
> For more details see: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/index.html
---------------------------------------------------------------------
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^ permalink raw reply	[flat|nested] 20+ messages in thread

* ✓ Fi.CI.BAT: success for DC3CO Support for TGL test with DC3CO IGT (rev2)
  2019-10-03  8:17 [PATCH v10 RESEND 0/6] DC3CO Support for TGL test with DC3CO IGT Anshuman Gupta
                   ` (8 preceding siblings ...)
  2019-10-07 10:46 ` ✗ Fi.CI.BAT: failure for DC3CO Support for TGL test with DC3CO IGT (rev2) Patchwork
@ 2019-10-07 15:14 ` Patchwork
  2019-10-07 18:37 ` ✗ Fi.CI.IGT: failure " Patchwork
  10 siblings, 0 replies; 20+ messages in thread
From: Patchwork @ 2019-10-07 15:14 UTC (permalink / raw)
  To: Anshuman Gupta; +Cc: intel-gfx

== Series Details ==

Series: DC3CO Support for TGL test with DC3CO IGT (rev2)
URL   : https://patchwork.freedesktop.org/series/67525/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_7021 -> Patchwork_14686
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/index.html

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in Patchwork_14686:

### IGT changes ###

#### Possible regressions ####

  * {igt@i915_pm_dc@dc3co-vpb-simulation} (NEW):
    - {fi-icl-dsi}:       NOTRUN -> [SKIP][1]
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/fi-icl-dsi/igt@i915_pm_dc@dc3co-vpb-simulation.html
    - {fi-icl-guc}:       NOTRUN -> [SKIP][2]
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/fi-icl-guc/igt@i915_pm_dc@dc3co-vpb-simulation.html
    - {fi-icl-u4}:        NOTRUN -> [SKIP][3]
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/fi-icl-u4/igt@i915_pm_dc@dc3co-vpb-simulation.html
    - fi-icl-u2:          NOTRUN -> [SKIP][4]
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/fi-icl-u2/igt@i915_pm_dc@dc3co-vpb-simulation.html
    - fi-cml-u2:          NOTRUN -> [SKIP][5]
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/fi-cml-u2/igt@i915_pm_dc@dc3co-vpb-simulation.html
    - {fi-cml-s}:         NOTRUN -> [SKIP][6]
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/fi-cml-s/igt@i915_pm_dc@dc3co-vpb-simulation.html
    - fi-icl-u3:          NOTRUN -> [SKIP][7]
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/fi-icl-u3/igt@i915_pm_dc@dc3co-vpb-simulation.html

  
New tests
---------

  New tests have been introduced between CI_DRM_7021 and Patchwork_14686:

### New IGT tests (1) ###

  * igt@i915_pm_dc@dc3co-vpb-simulation:
    - Statuses : 1 pass(s) 44 skip(s)
    - Exec time: [0.0, 4.04] s

  

Known issues
------------

  Here are the changes found in Patchwork_14686 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@gem_mmap_gtt@basic-read-write-distinct:
    - fi-icl-u3:          [PASS][8] -> [DMESG-WARN][9] ([fdo#107724]) +1 similar issue
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/fi-icl-u3/igt@gem_mmap_gtt@basic-read-write-distinct.html
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/fi-icl-u3/igt@gem_mmap_gtt@basic-read-write-distinct.html

  * igt@i915_selftest@live_execlists:
    - fi-cfl-8109u:       [PASS][10] -> [DMESG-FAIL][11] ([fdo#111872])
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/fi-cfl-8109u/igt@i915_selftest@live_execlists.html
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/fi-cfl-8109u/igt@i915_selftest@live_execlists.html

  
#### Possible fixes ####

  * igt@gem_ctx_create@basic-files:
    - {fi-tgl-u}:         [INCOMPLETE][12] ([fdo#111735]) -> [PASS][13]
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/fi-tgl-u/igt@gem_ctx_create@basic-files.html
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/fi-tgl-u/igt@gem_ctx_create@basic-files.html

  * igt@gem_exec_suspend@basic:
    - fi-icl-u3:          [FAIL][14] ([fdo#111699]) -> [PASS][15]
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/fi-icl-u3/igt@gem_exec_suspend@basic.html
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/fi-icl-u3/igt@gem_exec_suspend@basic.html

  * igt@gem_mmap_gtt@basic-small-bo-tiledy:
    - fi-icl-u3:          [DMESG-WARN][16] ([fdo#107724]) -> [PASS][17] +1 similar issue
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/fi-icl-u3/igt@gem_mmap_gtt@basic-small-bo-tiledy.html
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/fi-icl-u3/igt@gem_mmap_gtt@basic-small-bo-tiledy.html

  * igt@i915_selftest@live_execlists:
    - fi-icl-u3:          [DMESG-WARN][18] -> [PASS][19]
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/fi-icl-u3/igt@i915_selftest@live_execlists.html
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/fi-icl-u3/igt@i915_selftest@live_execlists.html

  * igt@kms_frontbuffer_tracking@basic:
    - fi-hsw-peppy:       [DMESG-WARN][20] ([fdo#102614]) -> [PASS][21]
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/fi-hsw-peppy/igt@kms_frontbuffer_tracking@basic.html
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/fi-hsw-peppy/igt@kms_frontbuffer_tracking@basic.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#102614]: https://bugs.freedesktop.org/show_bug.cgi?id=102614
  [fdo#107724]: https://bugs.freedesktop.org/show_bug.cgi?id=107724
  [fdo#111699]: https://bugs.freedesktop.org/show_bug.cgi?id=111699
  [fdo#111735]: https://bugs.freedesktop.org/show_bug.cgi?id=111735
  [fdo#111872]: https://bugs.freedesktop.org/show_bug.cgi?id=111872


Participating hosts (52 -> 45)
------------------------------

  Missing    (7): fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-icl-y fi-byt-clapper fi-bdw-samus 


Build changes
-------------

  * CI: CI-20190529 -> None
  * IGT: IGT_5215 -> IGTPW_3531
  * Linux: CI_DRM_7021 -> Patchwork_14686

  CI-20190529: 20190529
  CI_DRM_7021: fc1c1e3f1cfa9bad973b7547b8c123b3ac80c678 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGTPW_3531: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3531/index.html
  IGT_5215: 880c8d3c9831349a269ac6822c8d44e80807089f @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_14686: 6338b6ab8948f60fb24c6959a936d3938b2aeca4 @ git://anongit.freedesktop.org/gfx-ci/linux


== Linux commits ==

6338b6ab8948 drm/i915/tgl: Add DC3CO counter in i915_dmc_info
3e3548454ce1 drm/i915/tgl: Switch between dc3co and dc5 based on display idleness
d03246a7f6a5 drm/i915/tgl: Do modeset to enable and configure DC3CO exitline
3aa8daffb53e drm/i915/tgl: Enable DC3CO state in "DC Off" power well
e4283eee90b0 drm/i915/tgl: Add DC3CO mask to allowed_dc_mask and gen9_dc_mask
15f3dbf20193 drm/i915/tgl: Add DC3CO required register and bits

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/index.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 20+ messages in thread

* ✗ Fi.CI.IGT: failure for DC3CO Support for TGL test with DC3CO IGT (rev2)
  2019-10-03  8:17 [PATCH v10 RESEND 0/6] DC3CO Support for TGL test with DC3CO IGT Anshuman Gupta
                   ` (9 preceding siblings ...)
  2019-10-07 15:14 ` ✓ Fi.CI.BAT: success " Patchwork
@ 2019-10-07 18:37 ` Patchwork
  2019-10-08  8:28   ` Imre Deak
  10 siblings, 1 reply; 20+ messages in thread
From: Patchwork @ 2019-10-07 18:37 UTC (permalink / raw)
  To: Anshuman Gupta; +Cc: intel-gfx

== Series Details ==

Series: DC3CO Support for TGL test with DC3CO IGT (rev2)
URL   : https://patchwork.freedesktop.org/series/67525/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_7021_full -> Patchwork_14686_full
====================================================

Summary
-------

  **FAILURE**

  Serious unknown changes coming with Patchwork_14686_full absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_14686_full, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in Patchwork_14686_full:

### IGT changes ###

#### Possible regressions ####

  * igt@gem_tiled_swapping@non-threaded:
    - shard-hsw:          [PASS][1] -> [DMESG-FAIL][2]
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/shard-hsw4/igt@gem_tiled_swapping@non-threaded.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/shard-hsw5/igt@gem_tiled_swapping@non-threaded.html

  * {igt@i915_pm_dc@dc3co-vpb-simulation} (NEW):
    - shard-iclb:         NOTRUN -> [SKIP][3]
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/shard-iclb2/igt@i915_pm_dc@dc3co-vpb-simulation.html

  
#### Suppressed ####

  The following results come from untrusted machines, tests, or statuses.
  They do not affect the overall result.

  * igt@kms_plane_lowres@pipe-c-tiling-none:
    - {shard-tglb}:       [PASS][4] -> [INCOMPLETE][5]
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/shard-tglb1/igt@kms_plane_lowres@pipe-c-tiling-none.html
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/shard-tglb1/igt@kms_plane_lowres@pipe-c-tiling-none.html

  
New tests
---------

  New tests have been introduced between CI_DRM_7021_full and Patchwork_14686_full:

### New IGT tests (1) ###

  * igt@i915_pm_dc@dc3co-vpb-simulation:
    - Statuses : 7 skip(s)
    - Exec time: [0.0] s

  


### New Piglit tests (4) ###

  * spec@arb_gpu_shader5@texturegather@vs-rgba-0-int-cubearray:
    - Statuses : 1 incomplete(s)
    - Exec time: [0.0] s

  * spec@arb_gpu_shader5@texturegather@vs-rgba-1-int-cubearray:
    - Statuses : 1 incomplete(s)
    - Exec time: [0.0] s

  * spec@arb_gpu_shader5@texturegather@vs-rgba-2-int-cubearray:
    - Statuses : 1 incomplete(s)
    - Exec time: [0.0] s

  * spec@arb_gpu_shader5@texturegather@vs-rgba-3-int-cubearray:
    - Statuses : 1 incomplete(s)
    - Exec time: [0.0] s

  

Known issues
------------

  Here are the changes found in Patchwork_14686_full that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@gem_ctx_isolation@bcs0-s3:
    - shard-apl:          [PASS][6] -> [DMESG-WARN][7] ([fdo#108566]) +5 similar issues
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/shard-apl3/igt@gem_ctx_isolation@bcs0-s3.html
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/shard-apl5/igt@gem_ctx_isolation@bcs0-s3.html

  * igt@gem_ctx_isolation@vcs1-s3:
    - shard-kbl:          [PASS][8] -> [INCOMPLETE][9] ([fdo#103665])
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/shard-kbl1/igt@gem_ctx_isolation@vcs1-s3.html
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/shard-kbl3/igt@gem_ctx_isolation@vcs1-s3.html

  * igt@gem_ctx_shared@exec-single-timeline-bsd:
    - shard-iclb:         [PASS][10] -> [SKIP][11] ([fdo#110841])
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/shard-iclb7/igt@gem_ctx_shared@exec-single-timeline-bsd.html
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/shard-iclb2/igt@gem_ctx_shared@exec-single-timeline-bsd.html

  * igt@gem_exec_balancer@smoke:
    - shard-iclb:         [PASS][12] -> [SKIP][13] ([fdo#110854])
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/shard-iclb2/igt@gem_exec_balancer@smoke.html
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/shard-iclb3/igt@gem_exec_balancer@smoke.html

  * igt@gem_exec_nop@basic-parallel:
    - shard-apl:          [PASS][14] -> [INCOMPLETE][15] ([fdo#103927]) +1 similar issue
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/shard-apl7/igt@gem_exec_nop@basic-parallel.html
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/shard-apl6/igt@gem_exec_nop@basic-parallel.html

  * igt@gem_exec_schedule@out-order-bsd2:
    - shard-iclb:         [PASS][16] -> [SKIP][17] ([fdo#109276]) +12 similar issues
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/shard-iclb1/igt@gem_exec_schedule@out-order-bsd2.html
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/shard-iclb5/igt@gem_exec_schedule@out-order-bsd2.html

  * igt@gem_exec_schedule@preempt-other-chain-bsd:
    - shard-iclb:         [PASS][18] -> [SKIP][19] ([fdo#111325]) +3 similar issues
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/shard-iclb5/igt@gem_exec_schedule@preempt-other-chain-bsd.html
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/shard-iclb2/igt@gem_exec_schedule@preempt-other-chain-bsd.html

  * igt@gem_softpin@softpin:
    - shard-skl:          [PASS][20] -> [TIMEOUT][21] ([fdo#111732 ])
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/shard-skl7/igt@gem_softpin@softpin.html
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/shard-skl3/igt@gem_softpin@softpin.html

  * igt@gem_userptr_blits@map-fixed-invalidate-busy-gup:
    - shard-hsw:          [PASS][22] -> [DMESG-WARN][23] ([fdo#111870]) +1 similar issue
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/shard-hsw5/igt@gem_userptr_blits@map-fixed-invalidate-busy-gup.html
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/shard-hsw4/igt@gem_userptr_blits@map-fixed-invalidate-busy-gup.html

  * igt@gem_userptr_blits@sync-unmap-cycles:
    - shard-snb:          [PASS][24] -> [DMESG-WARN][25] ([fdo#111870]) +2 similar issues
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/shard-snb4/igt@gem_userptr_blits@sync-unmap-cycles.html
   [25]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/shard-snb7/igt@gem_userptr_blits@sync-unmap-cycles.html

  * igt@i915_pm_rc6_residency@rc6-accuracy:
    - shard-kbl:          [PASS][26] -> [SKIP][27] ([fdo#109271])
   [26]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/shard-kbl6/igt@i915_pm_rc6_residency@rc6-accuracy.html
   [27]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/shard-kbl2/igt@i915_pm_rc6_residency@rc6-accuracy.html

  * igt@i915_pm_rpm@modeset-lpsp-stress:
    - shard-iclb:         [PASS][28] -> [INCOMPLETE][29] ([fdo#107713] / [fdo#108840])
   [28]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/shard-iclb7/igt@i915_pm_rpm@modeset-lpsp-stress.html
   [29]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/shard-iclb1/igt@i915_pm_rpm@modeset-lpsp-stress.html

  * igt@i915_suspend@sysfs-reader:
    - shard-skl:          [PASS][30] -> [INCOMPLETE][31] ([fdo#104108]) +2 similar issues
   [30]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/shard-skl7/igt@i915_suspend@sysfs-reader.html
   [31]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/shard-skl6/igt@i915_suspend@sysfs-reader.html

  * igt@kms_cursor_crc@pipe-b-cursor-alpha-transparent:
    - shard-skl:          [PASS][32] -> [FAIL][33] ([fdo#103232])
   [32]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/shard-skl8/igt@kms_cursor_crc@pipe-b-cursor-alpha-transparent.html
   [33]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/shard-skl10/igt@kms_cursor_crc@pipe-b-cursor-alpha-transparent.html

  * igt@kms_flip@flip-vs-suspend-interruptible:
    - shard-snb:          [PASS][34] -> [INCOMPLETE][35] ([fdo#105411])
   [34]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/shard-snb6/igt@kms_flip@flip-vs-suspend-interruptible.html
   [35]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/shard-snb1/igt@kms_flip@flip-vs-suspend-interruptible.html

  * igt@kms_flip@plain-flip-fb-recreate-interruptible:
    - shard-skl:          [PASS][36] -> [FAIL][37] ([fdo#100368])
   [36]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/shard-skl7/igt@kms_flip@plain-flip-fb-recreate-interruptible.html
   [37]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/shard-skl10/igt@kms_flip@plain-flip-fb-recreate-interruptible.html

  * igt@kms_frontbuffer_tracking@fbc-rgb565-draw-blt:
    - shard-iclb:         [PASS][38] -> [FAIL][39] ([fdo#103167]) +3 similar issues
   [38]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/shard-iclb6/igt@kms_frontbuffer_tracking@fbc-rgb565-draw-blt.html
   [39]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/shard-iclb2/igt@kms_frontbuffer_tracking@fbc-rgb565-draw-blt.html

  * igt@kms_psr@psr2_cursor_blt:
    - shard-iclb:         [PASS][40] -> [SKIP][41] ([fdo#109441]) +1 similar issue
   [40]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/shard-iclb2/igt@kms_psr@psr2_cursor_blt.html
   [41]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/shard-iclb5/igt@kms_psr@psr2_cursor_blt.html

  * igt@kms_setmode@basic:
    - shard-apl:          [PASS][42] -> [FAIL][43] ([fdo#99912])
   [42]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/shard-apl7/igt@kms_setmode@basic.html
   [43]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/shard-apl5/igt@kms_setmode@basic.html

  
#### Possible fixes ####

  * igt@gem_ctx_isolation@rcs0-s3:
    - shard-apl:          [DMESG-WARN][44] ([fdo#108566]) -> [PASS][45] +9 similar issues
   [44]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/shard-apl2/igt@gem_ctx_isolation@rcs0-s3.html
   [45]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/shard-apl4/igt@gem_ctx_isolation@rcs0-s3.html

  * igt@gem_ctx_switch@all-light:
    - shard-hsw:          [INCOMPLETE][46] ([fdo#103540]) -> [PASS][47]
   [46]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/shard-hsw2/igt@gem_ctx_switch@all-light.html
   [47]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/shard-hsw2/igt@gem_ctx_switch@all-light.html

  * igt@gem_eio@unwedge-stress:
    - shard-snb:          [FAIL][48] ([fdo#109661]) -> [PASS][49]
   [48]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/shard-snb5/igt@gem_eio@unwedge-stress.html
   [49]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/shard-snb4/igt@gem_eio@unwedge-stress.html

  * igt@gem_exec_schedule@preemptive-hang-bsd:
    - shard-iclb:         [SKIP][50] ([fdo#111325]) -> [PASS][51] +4 similar issues
   [50]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/shard-iclb2/igt@gem_exec_schedule@preemptive-hang-bsd.html
   [51]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/shard-iclb8/igt@gem_exec_schedule@preemptive-hang-bsd.html

  * igt@gem_userptr_blits@map-fixed-invalidate-busy:
    - shard-snb:          [DMESG-WARN][52] ([fdo#111870]) -> [PASS][53] +2 similar issues
   [52]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/shard-snb4/igt@gem_userptr_blits@map-fixed-invalidate-busy.html
   [53]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/shard-snb4/igt@gem_userptr_blits@map-fixed-invalidate-busy.html

  * igt@gem_userptr_blits@sync-unmap-cycles:
    - shard-hsw:          [DMESG-WARN][54] ([fdo#111870]) -> [PASS][55] +3 similar issues
   [54]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/shard-hsw1/igt@gem_userptr_blits@sync-unmap-cycles.html
   [55]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/shard-hsw1/igt@gem_userptr_blits@sync-unmap-cycles.html

  * igt@i915_selftest@live_hangcheck:
    - shard-snb:          [INCOMPLETE][56] ([fdo#105411]) -> [PASS][57]
   [56]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/shard-snb7/igt@i915_selftest@live_hangcheck.html
   [57]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/shard-snb7/igt@i915_selftest@live_hangcheck.html

  * igt@i915_selftest@live_workarounds:
    - shard-kbl:          [DMESG-FAIL][58] -> [PASS][59]
   [58]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/shard-kbl2/igt@i915_selftest@live_workarounds.html
   [59]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/shard-kbl4/igt@i915_selftest@live_workarounds.html

  * igt@kms_cursor_crc@pipe-c-cursor-size-change:
    - shard-skl:          [FAIL][60] ([fdo#103232]) -> [PASS][61]
   [60]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/shard-skl8/igt@kms_cursor_crc@pipe-c-cursor-size-change.html
   [61]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/shard-skl3/igt@kms_cursor_crc@pipe-c-cursor-size-change.html

  * igt@kms_fbcon_fbt@psr-suspend:
    - {shard-tglb}:       [INCOMPLETE][62] ([fdo#111832]) -> [PASS][63]
   [62]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/shard-tglb1/igt@kms_fbcon_fbt@psr-suspend.html
   [63]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/shard-tglb6/igt@kms_fbcon_fbt@psr-suspend.html

  * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-render:
    - shard-iclb:         [FAIL][64] ([fdo#103167]) -> [PASS][65] +3 similar issues
   [64]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/shard-iclb7/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-render.html
   [65]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/shard-iclb5/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-render.html

  * igt@kms_frontbuffer_tracking@fbc-tilingchange:
    - shard-apl:          [FAIL][66] ([fdo#103167]) -> [PASS][67]
   [66]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/shard-apl1/igt@kms_frontbuffer_tracking@fbc-tilingchange.html
   [67]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/shard-apl5/igt@kms_frontbuffer_tracking@fbc-tilingchange.html
    - shard-glk:          [FAIL][68] ([fdo#103167]) -> [PASS][69]
   [68]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/shard-glk7/igt@kms_frontbuffer_tracking@fbc-tilingchange.html
   [69]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/shard-glk1/igt@kms_frontbuffer_tracking@fbc-tilingchange.html
    - shard-kbl:          [FAIL][70] ([fdo#103167]) -> [PASS][71]
   [70]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/shard-kbl1/igt@kms_frontbuffer_tracking@fbc-tilingchange.html
   [71]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/shard-kbl3/igt@kms_frontbuffer_tracking@fbc-tilingchange.html

  * igt@kms_frontbuffer_tracking@fbcpsr-1p-indfb-fliptrack:
    - {shard-tglb}:       [FAIL][72] ([fdo#103167]) -> [PASS][73] +1 similar issue
   [72]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/shard-tglb7/igt@kms_frontbuffer_tracking@fbcpsr-1p-indfb-fliptrack.html
   [73]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/shard-tglb6/igt@kms_frontbuffer_tracking@fbcpsr-1p-indfb-fliptrack.html

  * igt@kms_frontbuffer_tracking@psr-1p-primscrn-cur-indfb-draw-mmap-gtt:
    - shard-skl:          [FAIL][74] ([fdo#103167]) -> [PASS][75]
   [74]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/shard-skl4/igt@kms_frontbuffer_tracking@psr-1p-primscrn-cur-indfb-draw-mmap-gtt.html
   [75]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/shard-skl3/igt@kms_frontbuffer_tracking@psr-1p-primscrn-cur-indfb-draw-mmap-gtt.html

  * igt@kms_plane@plane-panning-bottom-right-suspend-pipe-a-planes:
    - shard-skl:          [INCOMPLETE][76] ([fdo#104108]) -> [PASS][77]
   [76]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/shard-skl1/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-a-planes.html
   [77]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/shard-skl2/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-a-planes.html

  * igt@kms_plane_alpha_blend@pipe-a-alpha-opaque-fb:
    - shard-iclb:         [INCOMPLETE][78] ([fdo#107713]) -> [PASS][79] +2 similar issues
   [78]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/shard-iclb7/igt@kms_plane_alpha_blend@pipe-a-alpha-opaque-fb.html
   [79]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/shard-iclb1/igt@kms_plane_alpha_blend@pipe-a-alpha-opaque-fb.html

  * igt@kms_plane_alpha_blend@pipe-c-constant-alpha-min:
    - shard-skl:          [FAIL][80] ([fdo#108145]) -> [PASS][81] +1 similar issue
   [80]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/shard-skl8/igt@kms_plane_alpha_blend@pipe-c-constant-alpha-min.html
   [81]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/shard-skl6/igt@kms_plane_alpha_blend@pipe-c-constant-alpha-min.html

  * igt@kms_plane_alpha_blend@pipe-c-coverage-7efc:
    - shard-skl:          [FAIL][82] ([fdo#108145] / [fdo#110403]) -> [PASS][83]
   [82]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/shard-skl4/igt@kms_plane_alpha_blend@pipe-c-coverage-7efc.html
   [83]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/shard-skl2/igt@kms_plane_alpha_blend@pipe-c-coverage-7efc.html

  * igt@kms_psr@psr2_primary_mmap_cpu:
    - shard-iclb:         [SKIP][84] ([fdo#109441]) -> [PASS][85] +3 similar issues
   [84]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/shard-iclb6/igt@kms_psr@psr2_primary_mmap_cpu.html
   [85]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/shard-iclb2/igt@kms_psr@psr2_primary_mmap_cpu.html

  * igt@prime_vgem@fence-wait-bsd2:
    - shard-iclb:         [SKIP][86] ([fdo#109276]) -> [PASS][87] +13 similar issues
   [86]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/shard-iclb8/igt@prime_vgem@fence-wait-bsd2.html
   [87]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/shard-iclb2/igt@prime_vgem@fence-wait-bsd2.html

  
#### Warnings ####

  * igt@gem_mocs_settings@mocs-reset-bsd2:
    - shard-iclb:         [FAIL][88] ([fdo#111330]) -> [SKIP][89] ([fdo#109276]) +1 similar issue
   [88]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/shard-iclb1/igt@gem_mocs_settings@mocs-reset-bsd2.html
   [89]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/shard-iclb3/igt@gem_mocs_settings@mocs-reset-bsd2.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#100368]: https://bugs.freedesktop.org/show_bug.cgi?id=100368
  [fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167
  [fdo#103232]: https://bugs.freedesktop.org/show_bug.cgi?id=103232
  [fdo#103540]: https://bugs.freedesktop.org/show_bug.cgi?id=103540
  [fdo#103665]: https://bugs.freedesktop.org/show_bug.cgi?id=103665
  [fdo#103927]: https://bugs.freedesktop.org/show_bug.cgi?id=103927
  [fdo#104108]: https://bugs.freedesktop.org/show_bug.cgi?id=104108
  [fdo#105411]: https://bugs.freedesktop.org/show_bug.cgi?id=105411
  [fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713
  [fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145
  [fdo#108566]: https://bugs.freedesktop.org/show_bug.cgi?id=108566
  [fdo#108840]: https://bugs.freedesktop.org/show_bug.cgi?id=108840
  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [fdo#109276]: https://bugs.freedesktop.org/show_bug.cgi?id=109276
  [fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441
  [fdo#109661]: https://bugs.freedesktop.org/show_bug.cgi?id=109661
  [fdo#110403]: https://bugs.freedesktop.org/show_bug.cgi?id=110403
  [fdo#110841]: https://bugs.freedesktop.org/show_bug.cgi?id=110841
  [fdo#110854]: https://bugs.freedesktop.org/show_bug.cgi?id=110854
  [fdo#111325]: https://bugs.freedesktop.org/show_bug.cgi?id=111325
  [fdo#111330]: https://bugs.freedesktop.org/show_bug.cgi?id=111330
  [fdo#111599]: https://bugs.freedesktop.org/show_bug.cgi?id=111599
  [fdo#111703]: https://bugs.freedesktop.org/show_bug.cgi?id=111703
  [fdo#111732 ]: https://bugs.freedesktop.org/show_bug.cgi?id=111732 
  [fdo#111832]: https://bugs.freedesktop.org/show_bug.cgi?id=111832
  [fdo#111870]: https://bugs.freedesktop.org/show_bug.cgi?id=111870
  [fdo#111912]: https://bugs.freedesktop.org/show_bug.cgi?id=111912
  [fdo#99912]: https://bugs.freedesktop.org/show_bug

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/index.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 20+ messages in thread

* Re: ✗ Fi.CI.IGT: failure for DC3CO Support for TGL test with DC3CO IGT (rev2)
  2019-10-07 18:37 ` ✗ Fi.CI.IGT: failure " Patchwork
@ 2019-10-08  8:28   ` Imre Deak
  2019-10-08  8:40     ` Gupta, Anshuman
  0 siblings, 1 reply; 20+ messages in thread
From: Imre Deak @ 2019-10-08  8:28 UTC (permalink / raw)
  To: intel-gfx, Anshuman Gupta, Lakshminarayana Vudum

On Mon, Oct 07, 2019 at 06:37:48PM +0000, Patchwork wrote:
> == Series Details ==
> 
> Series: DC3CO Support for TGL test with DC3CO IGT (rev2)
> URL   : https://patchwork.freedesktop.org/series/67525/
> State : failure

Thanks for the patches merged to -dinq. For the failure see below.

> 
> == Summary ==
> 
> CI Bug Log - changes from CI_DRM_7021_full -> Patchwork_14686_full
> ====================================================
> 
> Summary
> -------
> 
>   **FAILURE**
> 
>   Serious unknown changes coming with Patchwork_14686_full absolutely need to be
>   verified manually.
>   
>   If you think the reported changes have nothing to do with the changes
>   introduced in Patchwork_14686_full, please notify your bug team to allow them
>   to document this new failure mode, which will reduce false positives in CI.
> 
>   
> 
> Possible new issues
> -------------------
> 
>   Here are the unknown changes that may have been introduced in Patchwork_14686_full:
> 
> ### IGT changes ###
> 
> #### Possible regressions ####
> 
>   * igt@gem_tiled_swapping@non-threaded:
>     - shard-hsw:          [PASS][1] -> [DMESG-FAIL][2]
>    [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/shard-hsw4/igt@gem_tiled_swapping@non-threaded.html

Unrelated platform and looks like the following existing bug:
https://bugs.freedesktop.org/show_bug.cgi?id=108686

Lakshmi, does the filter needs to be updated for HSW?



>    [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/shard-hsw5/igt@gem_tiled_swapping@non-threaded.html
> 
>   * {igt@i915_pm_dc@dc3co-vpb-simulation} (NEW):
>     - shard-iclb:         NOTRUN -> [SKIP][3]
>    [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/shard-iclb2/igt@i915_pm_dc@dc3co-vpb-simulation.html
> 
>   
> #### Suppressed ####
> 
>   The following results come from untrusted machines, tests, or statuses.
>   They do not affect the overall result.
> 
>   * igt@kms_plane_lowres@pipe-c-tiling-none:
>     - {shard-tglb}:       [PASS][4] -> [INCOMPLETE][5]
>    [4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/shard-tglb1/igt@kms_plane_lowres@pipe-c-tiling-none.html
>    [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/shard-tglb1/igt@kms_plane_lowres@pipe-c-tiling-none.html
> 
>   
> New tests
> ---------
> 
>   New tests have been introduced between CI_DRM_7021_full and Patchwork_14686_full:
> 
> ### New IGT tests (1) ###
> 
>   * igt@i915_pm_dc@dc3co-vpb-simulation:
>     - Statuses : 7 skip(s)
>     - Exec time: [0.0] s
> 
>   
> 
> 
> ### New Piglit tests (4) ###
> 
>   * spec@arb_gpu_shader5@texturegather@vs-rgba-0-int-cubearray:
>     - Statuses : 1 incomplete(s)
>     - Exec time: [0.0] s
> 
>   * spec@arb_gpu_shader5@texturegather@vs-rgba-1-int-cubearray:
>     - Statuses : 1 incomplete(s)
>     - Exec time: [0.0] s
> 
>   * spec@arb_gpu_shader5@texturegather@vs-rgba-2-int-cubearray:
>     - Statuses : 1 incomplete(s)
>     - Exec time: [0.0] s
> 
>   * spec@arb_gpu_shader5@texturegather@vs-rgba-3-int-cubearray:
>     - Statuses : 1 incomplete(s)
>     - Exec time: [0.0] s
> 
>   
> 
> Known issues
> ------------
> 
>   Here are the changes found in Patchwork_14686_full that come from known issues:
> 
> ### IGT changes ###
> 
> #### Issues hit ####
> 
>   * igt@gem_ctx_isolation@bcs0-s3:
>     - shard-apl:          [PASS][6] -> [DMESG-WARN][7] ([fdo#108566]) +5 similar issues
>    [6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/shard-apl3/igt@gem_ctx_isolation@bcs0-s3.html
>    [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/shard-apl5/igt@gem_ctx_isolation@bcs0-s3.html
> 
>   * igt@gem_ctx_isolation@vcs1-s3:
>     - shard-kbl:          [PASS][8] -> [INCOMPLETE][9] ([fdo#103665])
>    [8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/shard-kbl1/igt@gem_ctx_isolation@vcs1-s3.html
>    [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/shard-kbl3/igt@gem_ctx_isolation@vcs1-s3.html
> 
>   * igt@gem_ctx_shared@exec-single-timeline-bsd:
>     - shard-iclb:         [PASS][10] -> [SKIP][11] ([fdo#110841])
>    [10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/shard-iclb7/igt@gem_ctx_shared@exec-single-timeline-bsd.html
>    [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/shard-iclb2/igt@gem_ctx_shared@exec-single-timeline-bsd.html
> 
>   * igt@gem_exec_balancer@smoke:
>     - shard-iclb:         [PASS][12] -> [SKIP][13] ([fdo#110854])
>    [12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/shard-iclb2/igt@gem_exec_balancer@smoke.html
>    [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/shard-iclb3/igt@gem_exec_balancer@smoke.html
> 
>   * igt@gem_exec_nop@basic-parallel:
>     - shard-apl:          [PASS][14] -> [INCOMPLETE][15] ([fdo#103927]) +1 similar issue
>    [14]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/shard-apl7/igt@gem_exec_nop@basic-parallel.html
>    [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/shard-apl6/igt@gem_exec_nop@basic-parallel.html
> 
>   * igt@gem_exec_schedule@out-order-bsd2:
>     - shard-iclb:         [PASS][16] -> [SKIP][17] ([fdo#109276]) +12 similar issues
>    [16]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/shard-iclb1/igt@gem_exec_schedule@out-order-bsd2.html
>    [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/shard-iclb5/igt@gem_exec_schedule@out-order-bsd2.html
> 
>   * igt@gem_exec_schedule@preempt-other-chain-bsd:
>     - shard-iclb:         [PASS][18] -> [SKIP][19] ([fdo#111325]) +3 similar issues
>    [18]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/shard-iclb5/igt@gem_exec_schedule@preempt-other-chain-bsd.html
>    [19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/shard-iclb2/igt@gem_exec_schedule@preempt-other-chain-bsd.html
> 
>   * igt@gem_softpin@softpin:
>     - shard-skl:          [PASS][20] -> [TIMEOUT][21] ([fdo#111732 ])
>    [20]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/shard-skl7/igt@gem_softpin@softpin.html
>    [21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/shard-skl3/igt@gem_softpin@softpin.html
> 
>   * igt@gem_userptr_blits@map-fixed-invalidate-busy-gup:
>     - shard-hsw:          [PASS][22] -> [DMESG-WARN][23] ([fdo#111870]) +1 similar issue
>    [22]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/shard-hsw5/igt@gem_userptr_blits@map-fixed-invalidate-busy-gup.html
>    [23]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/shard-hsw4/igt@gem_userptr_blits@map-fixed-invalidate-busy-gup.html
> 
>   * igt@gem_userptr_blits@sync-unmap-cycles:
>     - shard-snb:          [PASS][24] -> [DMESG-WARN][25] ([fdo#111870]) +2 similar issues
>    [24]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/shard-snb4/igt@gem_userptr_blits@sync-unmap-cycles.html
>    [25]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/shard-snb7/igt@gem_userptr_blits@sync-unmap-cycles.html
> 
>   * igt@i915_pm_rc6_residency@rc6-accuracy:
>     - shard-kbl:          [PASS][26] -> [SKIP][27] ([fdo#109271])
>    [26]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/shard-kbl6/igt@i915_pm_rc6_residency@rc6-accuracy.html
>    [27]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/shard-kbl2/igt@i915_pm_rc6_residency@rc6-accuracy.html
> 
>   * igt@i915_pm_rpm@modeset-lpsp-stress:
>     - shard-iclb:         [PASS][28] -> [INCOMPLETE][29] ([fdo#107713] / [fdo#108840])
>    [28]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/shard-iclb7/igt@i915_pm_rpm@modeset-lpsp-stress.html
>    [29]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/shard-iclb1/igt@i915_pm_rpm@modeset-lpsp-stress.html
> 
>   * igt@i915_suspend@sysfs-reader:
>     - shard-skl:          [PASS][30] -> [INCOMPLETE][31] ([fdo#104108]) +2 similar issues
>    [30]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/shard-skl7/igt@i915_suspend@sysfs-reader.html
>    [31]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/shard-skl6/igt@i915_suspend@sysfs-reader.html
> 
>   * igt@kms_cursor_crc@pipe-b-cursor-alpha-transparent:
>     - shard-skl:          [PASS][32] -> [FAIL][33] ([fdo#103232])
>    [32]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/shard-skl8/igt@kms_cursor_crc@pipe-b-cursor-alpha-transparent.html
>    [33]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/shard-skl10/igt@kms_cursor_crc@pipe-b-cursor-alpha-transparent.html
> 
>   * igt@kms_flip@flip-vs-suspend-interruptible:
>     - shard-snb:          [PASS][34] -> [INCOMPLETE][35] ([fdo#105411])
>    [34]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/shard-snb6/igt@kms_flip@flip-vs-suspend-interruptible.html
>    [35]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/shard-snb1/igt@kms_flip@flip-vs-suspend-interruptible.html
> 
>   * igt@kms_flip@plain-flip-fb-recreate-interruptible:
>     - shard-skl:          [PASS][36] -> [FAIL][37] ([fdo#100368])
>    [36]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/shard-skl7/igt@kms_flip@plain-flip-fb-recreate-interruptible.html
>    [37]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/shard-skl10/igt@kms_flip@plain-flip-fb-recreate-interruptible.html
> 
>   * igt@kms_frontbuffer_tracking@fbc-rgb565-draw-blt:
>     - shard-iclb:         [PASS][38] -> [FAIL][39] ([fdo#103167]) +3 similar issues
>    [38]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/shard-iclb6/igt@kms_frontbuffer_tracking@fbc-rgb565-draw-blt.html
>    [39]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/shard-iclb2/igt@kms_frontbuffer_tracking@fbc-rgb565-draw-blt.html
> 
>   * igt@kms_psr@psr2_cursor_blt:
>     - shard-iclb:         [PASS][40] -> [SKIP][41] ([fdo#109441]) +1 similar issue
>    [40]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/shard-iclb2/igt@kms_psr@psr2_cursor_blt.html
>    [41]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/shard-iclb5/igt@kms_psr@psr2_cursor_blt.html
> 
>   * igt@kms_setmode@basic:
>     - shard-apl:          [PASS][42] -> [FAIL][43] ([fdo#99912])
>    [42]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/shard-apl7/igt@kms_setmode@basic.html
>    [43]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/shard-apl5/igt@kms_setmode@basic.html
> 
>   
> #### Possible fixes ####
> 
>   * igt@gem_ctx_isolation@rcs0-s3:
>     - shard-apl:          [DMESG-WARN][44] ([fdo#108566]) -> [PASS][45] +9 similar issues
>    [44]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/shard-apl2/igt@gem_ctx_isolation@rcs0-s3.html
>    [45]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/shard-apl4/igt@gem_ctx_isolation@rcs0-s3.html
> 
>   * igt@gem_ctx_switch@all-light:
>     - shard-hsw:          [INCOMPLETE][46] ([fdo#103540]) -> [PASS][47]
>    [46]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/shard-hsw2/igt@gem_ctx_switch@all-light.html
>    [47]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/shard-hsw2/igt@gem_ctx_switch@all-light.html
> 
>   * igt@gem_eio@unwedge-stress:
>     - shard-snb:          [FAIL][48] ([fdo#109661]) -> [PASS][49]
>    [48]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/shard-snb5/igt@gem_eio@unwedge-stress.html
>    [49]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/shard-snb4/igt@gem_eio@unwedge-stress.html
> 
>   * igt@gem_exec_schedule@preemptive-hang-bsd:
>     - shard-iclb:         [SKIP][50] ([fdo#111325]) -> [PASS][51] +4 similar issues
>    [50]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/shard-iclb2/igt@gem_exec_schedule@preemptive-hang-bsd.html
>    [51]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/shard-iclb8/igt@gem_exec_schedule@preemptive-hang-bsd.html
> 
>   * igt@gem_userptr_blits@map-fixed-invalidate-busy:
>     - shard-snb:          [DMESG-WARN][52] ([fdo#111870]) -> [PASS][53] +2 similar issues
>    [52]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/shard-snb4/igt@gem_userptr_blits@map-fixed-invalidate-busy.html
>    [53]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/shard-snb4/igt@gem_userptr_blits@map-fixed-invalidate-busy.html
> 
>   * igt@gem_userptr_blits@sync-unmap-cycles:
>     - shard-hsw:          [DMESG-WARN][54] ([fdo#111870]) -> [PASS][55] +3 similar issues
>    [54]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/shard-hsw1/igt@gem_userptr_blits@sync-unmap-cycles.html
>    [55]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/shard-hsw1/igt@gem_userptr_blits@sync-unmap-cycles.html
> 
>   * igt@i915_selftest@live_hangcheck:
>     - shard-snb:          [INCOMPLETE][56] ([fdo#105411]) -> [PASS][57]
>    [56]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/shard-snb7/igt@i915_selftest@live_hangcheck.html
>    [57]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/shard-snb7/igt@i915_selftest@live_hangcheck.html
> 
>   * igt@i915_selftest@live_workarounds:
>     - shard-kbl:          [DMESG-FAIL][58] -> [PASS][59]
>    [58]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/shard-kbl2/igt@i915_selftest@live_workarounds.html
>    [59]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/shard-kbl4/igt@i915_selftest@live_workarounds.html
> 
>   * igt@kms_cursor_crc@pipe-c-cursor-size-change:
>     - shard-skl:          [FAIL][60] ([fdo#103232]) -> [PASS][61]
>    [60]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/shard-skl8/igt@kms_cursor_crc@pipe-c-cursor-size-change.html
>    [61]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/shard-skl3/igt@kms_cursor_crc@pipe-c-cursor-size-change.html
> 
>   * igt@kms_fbcon_fbt@psr-suspend:
>     - {shard-tglb}:       [INCOMPLETE][62] ([fdo#111832]) -> [PASS][63]
>    [62]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/shard-tglb1/igt@kms_fbcon_fbt@psr-suspend.html
>    [63]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/shard-tglb6/igt@kms_fbcon_fbt@psr-suspend.html
> 
>   * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-render:
>     - shard-iclb:         [FAIL][64] ([fdo#103167]) -> [PASS][65] +3 similar issues
>    [64]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/shard-iclb7/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-render.html
>    [65]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/shard-iclb5/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-render.html
> 
>   * igt@kms_frontbuffer_tracking@fbc-tilingchange:
>     - shard-apl:          [FAIL][66] ([fdo#103167]) -> [PASS][67]
>    [66]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/shard-apl1/igt@kms_frontbuffer_tracking@fbc-tilingchange.html
>    [67]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/shard-apl5/igt@kms_frontbuffer_tracking@fbc-tilingchange.html
>     - shard-glk:          [FAIL][68] ([fdo#103167]) -> [PASS][69]
>    [68]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/shard-glk7/igt@kms_frontbuffer_tracking@fbc-tilingchange.html
>    [69]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/shard-glk1/igt@kms_frontbuffer_tracking@fbc-tilingchange.html
>     - shard-kbl:          [FAIL][70] ([fdo#103167]) -> [PASS][71]
>    [70]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/shard-kbl1/igt@kms_frontbuffer_tracking@fbc-tilingchange.html
>    [71]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/shard-kbl3/igt@kms_frontbuffer_tracking@fbc-tilingchange.html
> 
>   * igt@kms_frontbuffer_tracking@fbcpsr-1p-indfb-fliptrack:
>     - {shard-tglb}:       [FAIL][72] ([fdo#103167]) -> [PASS][73] +1 similar issue
>    [72]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/shard-tglb7/igt@kms_frontbuffer_tracking@fbcpsr-1p-indfb-fliptrack.html
>    [73]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/shard-tglb6/igt@kms_frontbuffer_tracking@fbcpsr-1p-indfb-fliptrack.html
> 
>   * igt@kms_frontbuffer_tracking@psr-1p-primscrn-cur-indfb-draw-mmap-gtt:
>     - shard-skl:          [FAIL][74] ([fdo#103167]) -> [PASS][75]
>    [74]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/shard-skl4/igt@kms_frontbuffer_tracking@psr-1p-primscrn-cur-indfb-draw-mmap-gtt.html
>    [75]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/shard-skl3/igt@kms_frontbuffer_tracking@psr-1p-primscrn-cur-indfb-draw-mmap-gtt.html
> 
>   * igt@kms_plane@plane-panning-bottom-right-suspend-pipe-a-planes:
>     - shard-skl:          [INCOMPLETE][76] ([fdo#104108]) -> [PASS][77]
>    [76]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/shard-skl1/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-a-planes.html
>    [77]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/shard-skl2/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-a-planes.html
> 
>   * igt@kms_plane_alpha_blend@pipe-a-alpha-opaque-fb:
>     - shard-iclb:         [INCOMPLETE][78] ([fdo#107713]) -> [PASS][79] +2 similar issues
>    [78]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/shard-iclb7/igt@kms_plane_alpha_blend@pipe-a-alpha-opaque-fb.html
>    [79]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/shard-iclb1/igt@kms_plane_alpha_blend@pipe-a-alpha-opaque-fb.html
> 
>   * igt@kms_plane_alpha_blend@pipe-c-constant-alpha-min:
>     - shard-skl:          [FAIL][80] ([fdo#108145]) -> [PASS][81] +1 similar issue
>    [80]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/shard-skl8/igt@kms_plane_alpha_blend@pipe-c-constant-alpha-min.html
>    [81]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/shard-skl6/igt@kms_plane_alpha_blend@pipe-c-constant-alpha-min.html
> 
>   * igt@kms_plane_alpha_blend@pipe-c-coverage-7efc:
>     - shard-skl:          [FAIL][82] ([fdo#108145] / [fdo#110403]) -> [PASS][83]
>    [82]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/shard-skl4/igt@kms_plane_alpha_blend@pipe-c-coverage-7efc.html
>    [83]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/shard-skl2/igt@kms_plane_alpha_blend@pipe-c-coverage-7efc.html
> 
>   * igt@kms_psr@psr2_primary_mmap_cpu:
>     - shard-iclb:         [SKIP][84] ([fdo#109441]) -> [PASS][85] +3 similar issues
>    [84]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/shard-iclb6/igt@kms_psr@psr2_primary_mmap_cpu.html
>    [85]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/shard-iclb2/igt@kms_psr@psr2_primary_mmap_cpu.html
> 
>   * igt@prime_vgem@fence-wait-bsd2:
>     - shard-iclb:         [SKIP][86] ([fdo#109276]) -> [PASS][87] +13 similar issues
>    [86]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/shard-iclb8/igt@prime_vgem@fence-wait-bsd2.html
>    [87]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/shard-iclb2/igt@prime_vgem@fence-wait-bsd2.html
> 
>   
> #### Warnings ####
> 
>   * igt@gem_mocs_settings@mocs-reset-bsd2:
>     - shard-iclb:         [FAIL][88] ([fdo#111330]) -> [SKIP][89] ([fdo#109276]) +1 similar issue
>    [88]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/shard-iclb1/igt@gem_mocs_settings@mocs-reset-bsd2.html
>    [89]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/shard-iclb3/igt@gem_mocs_settings@mocs-reset-bsd2.html
> 
>   
>   {name}: This element is suppressed. This means it is ignored when computing
>           the status of the difference (SUCCESS, WARNING, or FAILURE).
> 
>   [fdo#100368]: https://bugs.freedesktop.org/show_bug.cgi?id=100368
>   [fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167
>   [fdo#103232]: https://bugs.freedesktop.org/show_bug.cgi?id=103232
>   [fdo#103540]: https://bugs.freedesktop.org/show_bug.cgi?id=103540
>   [fdo#103665]: https://bugs.freedesktop.org/show_bug.cgi?id=103665
>   [fdo#103927]: https://bugs.freedesktop.org/show_bug.cgi?id=103927
>   [fdo#104108]: https://bugs.freedesktop.org/show_bug.cgi?id=104108
>   [fdo#105411]: https://bugs.freedesktop.org/show_bug.cgi?id=105411
>   [fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713
>   [fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145
>   [fdo#108566]: https://bugs.freedesktop.org/show_bug.cgi?id=108566
>   [fdo#108840]: https://bugs.freedesktop.org/show_bug.cgi?id=108840
>   [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
>   [fdo#109276]: https://bugs.freedesktop.org/show_bug.cgi?id=109276
>   [fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441
>   [fdo#109661]: https://bugs.freedesktop.org/show_bug.cgi?id=109661
>   [fdo#110403]: https://bugs.freedesktop.org/show_bug.cgi?id=110403
>   [fdo#110841]: https://bugs.freedesktop.org/show_bug.cgi?id=110841
>   [fdo#110854]: https://bugs.freedesktop.org/show_bug.cgi?id=110854
>   [fdo#111325]: https://bugs.freedesktop.org/show_bug.cgi?id=111325
>   [fdo#111330]: https://bugs.freedesktop.org/show_bug.cgi?id=111330
>   [fdo#111599]: https://bugs.freedesktop.org/show_bug.cgi?id=111599
>   [fdo#111703]: https://bugs.freedesktop.org/show_bug.cgi?id=111703
>   [fdo#111732 ]: https://bugs.freedesktop.org/show_bug.cgi?id=111732 
>   [fdo#111832]: https://bugs.freedesktop.org/show_bug.cgi?id=111832
>   [fdo#111870]: https://bugs.freedesktop.org/show_bug.cgi?id=111870
>   [fdo#111912]: https://bugs.freedesktop.org/show_bug.cgi?id=111912
>   [fdo#99912]: https://bugs.freedesktop.org/show_bug
> 
> == Logs ==
> 
> For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/index.html
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 20+ messages in thread

* Re: ✗ Fi.CI.IGT: failure for DC3CO Support for TGL test with DC3CO IGT (rev2)
  2019-10-08  8:28   ` Imre Deak
@ 2019-10-08  8:40     ` Gupta, Anshuman
  2019-10-08  8:50       ` Vudum, Lakshminarayana
  0 siblings, 1 reply; 20+ messages in thread
From: Gupta, Anshuman @ 2019-10-08  8:40 UTC (permalink / raw)
  To: Deak, Imre, intel-gfx, Vudum, Lakshminarayana

Thanks Imre for merging the patches 😊 

-----Original Message-----
From: Imre Deak <imre.deak@intel.com> 
Sent: Tuesday, October 8, 2019 1:59 PM
To: intel-gfx@lists.freedesktop.org; Gupta, Anshuman <anshuman.gupta@intel.com>; Vudum, Lakshminarayana <lakshminarayana.vudum@intel.com>
Subject: Re: [Intel-gfx] ✗ Fi.CI.IGT: failure for DC3CO Support for TGL test with DC3CO IGT (rev2)

On Mon, Oct 07, 2019 at 06:37:48PM +0000, Patchwork wrote:
> == Series Details ==
> 
> Series: DC3CO Support for TGL test with DC3CO IGT (rev2)
> URL   : https://patchwork.freedesktop.org/series/67525/
> State : failure

Thanks for the patches merged to -dinq. For the failure see below.

> 
> == Summary ==
> 
> CI Bug Log - changes from CI_DRM_7021_full -> Patchwork_14686_full 
> ====================================================
> 
> Summary
> -------
> 
>   **FAILURE**
> 
>   Serious unknown changes coming with Patchwork_14686_full absolutely need to be
>   verified manually.
>   
>   If you think the reported changes have nothing to do with the changes
>   introduced in Patchwork_14686_full, please notify your bug team to allow them
>   to document this new failure mode, which will reduce false positives in CI.
> 
>   
> 
> Possible new issues
> -------------------
> 
>   Here are the unknown changes that may have been introduced in Patchwork_14686_full:
> 
> ### IGT changes ###
> 
> #### Possible regressions ####
> 
>   * igt@gem_tiled_swapping@non-threaded:
>     - shard-hsw:          [PASS][1] -> [DMESG-FAIL][2]
>    [1]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/shard-hsw4/igt@ge
> m_tiled_swapping@non-threaded.html

Unrelated platform and looks like the following existing bug:
https://bugs.freedesktop.org/show_bug.cgi?id=108686

Lakshmi, does the filter needs to be updated for HSW?



>    [2]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/shard-hsw5/ig
> t@gem_tiled_swapping@non-threaded.html
> 
>   * {igt@i915_pm_dc@dc3co-vpb-simulation} (NEW):
>     - shard-iclb:         NOTRUN -> [SKIP][3]
>    [3]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/shard-iclb2/i
> gt@i915_pm_dc@dc3co-vpb-simulation.html
> 
>   
> #### Suppressed ####
> 
>   The following results come from untrusted machines, tests, or statuses.
>   They do not affect the overall result.
> 
>   * igt@kms_plane_lowres@pipe-c-tiling-none:
>     - {shard-tglb}:       [PASS][4] -> [INCOMPLETE][5]
>    [4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/shard-tglb1/igt@kms_plane_lowres@pipe-c-tiling-none.html
>    [5]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/shard-tglb1/i
> gt@kms_plane_lowres@pipe-c-tiling-none.html
> 
>   
> New tests
> ---------
> 
>   New tests have been introduced between CI_DRM_7021_full and Patchwork_14686_full:
> 
> ### New IGT tests (1) ###
> 
>   * igt@i915_pm_dc@dc3co-vpb-simulation:
>     - Statuses : 7 skip(s)
>     - Exec time: [0.0] s
> 
>   
> 
> 
> ### New Piglit tests (4) ###
> 
>   * spec@arb_gpu_shader5@texturegather@vs-rgba-0-int-cubearray:
>     - Statuses : 1 incomplete(s)
>     - Exec time: [0.0] s
> 
>   * spec@arb_gpu_shader5@texturegather@vs-rgba-1-int-cubearray:
>     - Statuses : 1 incomplete(s)
>     - Exec time: [0.0] s
> 
>   * spec@arb_gpu_shader5@texturegather@vs-rgba-2-int-cubearray:
>     - Statuses : 1 incomplete(s)
>     - Exec time: [0.0] s
> 
>   * spec@arb_gpu_shader5@texturegather@vs-rgba-3-int-cubearray:
>     - Statuses : 1 incomplete(s)
>     - Exec time: [0.0] s
> 
>   
> 
> Known issues
> ------------
> 
>   Here are the changes found in Patchwork_14686_full that come from known issues:
> 
> ### IGT changes ###
> 
> #### Issues hit ####
> 
>   * igt@gem_ctx_isolation@bcs0-s3:
>     - shard-apl:          [PASS][6] -> [DMESG-WARN][7] ([fdo#108566]) +5 similar issues
>    [6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/shard-apl3/igt@gem_ctx_isolation@bcs0-s3.html
>    [7]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/shard-apl5/ig
> t@gem_ctx_isolation@bcs0-s3.html
> 
>   * igt@gem_ctx_isolation@vcs1-s3:
>     - shard-kbl:          [PASS][8] -> [INCOMPLETE][9] ([fdo#103665])
>    [8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/shard-kbl1/igt@gem_ctx_isolation@vcs1-s3.html
>    [9]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/shard-kbl3/ig
> t@gem_ctx_isolation@vcs1-s3.html
> 
>   * igt@gem_ctx_shared@exec-single-timeline-bsd:
>     - shard-iclb:         [PASS][10] -> [SKIP][11] ([fdo#110841])
>    [10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/shard-iclb7/igt@gem_ctx_shared@exec-single-timeline-bsd.html
>    [11]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/shard-iclb2/i
> gt@gem_ctx_shared@exec-single-timeline-bsd.html
> 
>   * igt@gem_exec_balancer@smoke:
>     - shard-iclb:         [PASS][12] -> [SKIP][13] ([fdo#110854])
>    [12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/shard-iclb2/igt@gem_exec_balancer@smoke.html
>    [13]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/shard-iclb3/i
> gt@gem_exec_balancer@smoke.html
> 
>   * igt@gem_exec_nop@basic-parallel:
>     - shard-apl:          [PASS][14] -> [INCOMPLETE][15] ([fdo#103927]) +1 similar issue
>    [14]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/shard-apl7/igt@gem_exec_nop@basic-parallel.html
>    [15]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/shard-apl6/ig
> t@gem_exec_nop@basic-parallel.html
> 
>   * igt@gem_exec_schedule@out-order-bsd2:
>     - shard-iclb:         [PASS][16] -> [SKIP][17] ([fdo#109276]) +12 similar issues
>    [16]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/shard-iclb1/igt@gem_exec_schedule@out-order-bsd2.html
>    [17]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/shard-iclb5/i
> gt@gem_exec_schedule@out-order-bsd2.html
> 
>   * igt@gem_exec_schedule@preempt-other-chain-bsd:
>     - shard-iclb:         [PASS][18] -> [SKIP][19] ([fdo#111325]) +3 similar issues
>    [18]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/shard-iclb5/igt@gem_exec_schedule@preempt-other-chain-bsd.html
>    [19]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/shard-iclb2/i
> gt@gem_exec_schedule@preempt-other-chain-bsd.html
> 
>   * igt@gem_softpin@softpin:
>     - shard-skl:          [PASS][20] -> [TIMEOUT][21] ([fdo#111732 ])
>    [20]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/shard-skl7/igt@gem_softpin@softpin.html
>    [21]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/shard-skl3/ig
> t@gem_softpin@softpin.html
> 
>   * igt@gem_userptr_blits@map-fixed-invalidate-busy-gup:
>     - shard-hsw:          [PASS][22] -> [DMESG-WARN][23] ([fdo#111870]) +1 similar issue
>    [22]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/shard-hsw5/igt@gem_userptr_blits@map-fixed-invalidate-busy-gup.html
>    [23]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/shard-hsw4/ig
> t@gem_userptr_blits@map-fixed-invalidate-busy-gup.html
> 
>   * igt@gem_userptr_blits@sync-unmap-cycles:
>     - shard-snb:          [PASS][24] -> [DMESG-WARN][25] ([fdo#111870]) +2 similar issues
>    [24]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/shard-snb4/igt@gem_userptr_blits@sync-unmap-cycles.html
>    [25]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/shard-snb7/ig
> t@gem_userptr_blits@sync-unmap-cycles.html
> 
>   * igt@i915_pm_rc6_residency@rc6-accuracy:
>     - shard-kbl:          [PASS][26] -> [SKIP][27] ([fdo#109271])
>    [26]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/shard-kbl6/igt@i915_pm_rc6_residency@rc6-accuracy.html
>    [27]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/shard-kbl2/ig
> t@i915_pm_rc6_residency@rc6-accuracy.html
> 
>   * igt@i915_pm_rpm@modeset-lpsp-stress:
>     - shard-iclb:         [PASS][28] -> [INCOMPLETE][29] ([fdo#107713] / [fdo#108840])
>    [28]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/shard-iclb7/igt@i915_pm_rpm@modeset-lpsp-stress.html
>    [29]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/shard-iclb1/i
> gt@i915_pm_rpm@modeset-lpsp-stress.html
> 
>   * igt@i915_suspend@sysfs-reader:
>     - shard-skl:          [PASS][30] -> [INCOMPLETE][31] ([fdo#104108]) +2 similar issues
>    [30]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/shard-skl7/igt@i915_suspend@sysfs-reader.html
>    [31]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/shard-skl6/ig
> t@i915_suspend@sysfs-reader.html
> 
>   * igt@kms_cursor_crc@pipe-b-cursor-alpha-transparent:
>     - shard-skl:          [PASS][32] -> [FAIL][33] ([fdo#103232])
>    [32]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/shard-skl8/igt@kms_cursor_crc@pipe-b-cursor-alpha-transparent.html
>    [33]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/shard-skl10/i
> gt@kms_cursor_crc@pipe-b-cursor-alpha-transparent.html
> 
>   * igt@kms_flip@flip-vs-suspend-interruptible:
>     - shard-snb:          [PASS][34] -> [INCOMPLETE][35] ([fdo#105411])
>    [34]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/shard-snb6/igt@kms_flip@flip-vs-suspend-interruptible.html
>    [35]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/shard-snb1/ig
> t@kms_flip@flip-vs-suspend-interruptible.html
> 
>   * igt@kms_flip@plain-flip-fb-recreate-interruptible:
>     - shard-skl:          [PASS][36] -> [FAIL][37] ([fdo#100368])
>    [36]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/shard-skl7/igt@kms_flip@plain-flip-fb-recreate-interruptible.html
>    [37]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/shard-skl10/i
> gt@kms_flip@plain-flip-fb-recreate-interruptible.html
> 
>   * igt@kms_frontbuffer_tracking@fbc-rgb565-draw-blt:
>     - shard-iclb:         [PASS][38] -> [FAIL][39] ([fdo#103167]) +3 similar issues
>    [38]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/shard-iclb6/igt@kms_frontbuffer_tracking@fbc-rgb565-draw-blt.html
>    [39]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/shard-iclb2/i
> gt@kms_frontbuffer_tracking@fbc-rgb565-draw-blt.html
> 
>   * igt@kms_psr@psr2_cursor_blt:
>     - shard-iclb:         [PASS][40] -> [SKIP][41] ([fdo#109441]) +1 similar issue
>    [40]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/shard-iclb2/igt@kms_psr@psr2_cursor_blt.html
>    [41]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/shard-iclb5/i
> gt@kms_psr@psr2_cursor_blt.html
> 
>   * igt@kms_setmode@basic:
>     - shard-apl:          [PASS][42] -> [FAIL][43] ([fdo#99912])
>    [42]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/shard-apl7/igt@kms_setmode@basic.html
>    [43]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/shard-apl5/ig
> t@kms_setmode@basic.html
> 
>   
> #### Possible fixes ####
> 
>   * igt@gem_ctx_isolation@rcs0-s3:
>     - shard-apl:          [DMESG-WARN][44] ([fdo#108566]) -> [PASS][45] +9 similar issues
>    [44]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/shard-apl2/igt@gem_ctx_isolation@rcs0-s3.html
>    [45]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/shard-apl4/ig
> t@gem_ctx_isolation@rcs0-s3.html
> 
>   * igt@gem_ctx_switch@all-light:
>     - shard-hsw:          [INCOMPLETE][46] ([fdo#103540]) -> [PASS][47]
>    [46]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/shard-hsw2/igt@gem_ctx_switch@all-light.html
>    [47]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/shard-hsw2/ig
> t@gem_ctx_switch@all-light.html
> 
>   * igt@gem_eio@unwedge-stress:
>     - shard-snb:          [FAIL][48] ([fdo#109661]) -> [PASS][49]
>    [48]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/shard-snb5/igt@gem_eio@unwedge-stress.html
>    [49]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/shard-snb4/ig
> t@gem_eio@unwedge-stress.html
> 
>   * igt@gem_exec_schedule@preemptive-hang-bsd:
>     - shard-iclb:         [SKIP][50] ([fdo#111325]) -> [PASS][51] +4 similar issues
>    [50]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/shard-iclb2/igt@gem_exec_schedule@preemptive-hang-bsd.html
>    [51]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/shard-iclb8/i
> gt@gem_exec_schedule@preemptive-hang-bsd.html
> 
>   * igt@gem_userptr_blits@map-fixed-invalidate-busy:
>     - shard-snb:          [DMESG-WARN][52] ([fdo#111870]) -> [PASS][53] +2 similar issues
>    [52]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/shard-snb4/igt@gem_userptr_blits@map-fixed-invalidate-busy.html
>    [53]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/shard-snb4/ig
> t@gem_userptr_blits@map-fixed-invalidate-busy.html
> 
>   * igt@gem_userptr_blits@sync-unmap-cycles:
>     - shard-hsw:          [DMESG-WARN][54] ([fdo#111870]) -> [PASS][55] +3 similar issues
>    [54]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/shard-hsw1/igt@gem_userptr_blits@sync-unmap-cycles.html
>    [55]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/shard-hsw1/ig
> t@gem_userptr_blits@sync-unmap-cycles.html
> 
>   * igt@i915_selftest@live_hangcheck:
>     - shard-snb:          [INCOMPLETE][56] ([fdo#105411]) -> [PASS][57]
>    [56]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/shard-snb7/igt@i915_selftest@live_hangcheck.html
>    [57]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/shard-snb7/ig
> t@i915_selftest@live_hangcheck.html
> 
>   * igt@i915_selftest@live_workarounds:
>     - shard-kbl:          [DMESG-FAIL][58] -> [PASS][59]
>    [58]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/shard-kbl2/igt@i915_selftest@live_workarounds.html
>    [59]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/shard-kbl4/ig
> t@i915_selftest@live_workarounds.html
> 
>   * igt@kms_cursor_crc@pipe-c-cursor-size-change:
>     - shard-skl:          [FAIL][60] ([fdo#103232]) -> [PASS][61]
>    [60]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/shard-skl8/igt@kms_cursor_crc@pipe-c-cursor-size-change.html
>    [61]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/shard-skl3/ig
> t@kms_cursor_crc@pipe-c-cursor-size-change.html
> 
>   * igt@kms_fbcon_fbt@psr-suspend:
>     - {shard-tglb}:       [INCOMPLETE][62] ([fdo#111832]) -> [PASS][63]
>    [62]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/shard-tglb1/igt@kms_fbcon_fbt@psr-suspend.html
>    [63]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/shard-tglb6/i
> gt@kms_fbcon_fbt@psr-suspend.html
> 
>   * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-render:
>     - shard-iclb:         [FAIL][64] ([fdo#103167]) -> [PASS][65] +3 similar issues
>    [64]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/shard-iclb7/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-render.html
>    [65]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/shard-iclb5/i
> gt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-render.html
> 
>   * igt@kms_frontbuffer_tracking@fbc-tilingchange:
>     - shard-apl:          [FAIL][66] ([fdo#103167]) -> [PASS][67]
>    [66]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/shard-apl1/igt@kms_frontbuffer_tracking@fbc-tilingchange.html
>    [67]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/shard-apl5/igt@kms_frontbuffer_tracking@fbc-tilingchange.html
>     - shard-glk:          [FAIL][68] ([fdo#103167]) -> [PASS][69]
>    [68]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/shard-glk7/igt@kms_frontbuffer_tracking@fbc-tilingchange.html
>    [69]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/shard-glk1/igt@kms_frontbuffer_tracking@fbc-tilingchange.html
>     - shard-kbl:          [FAIL][70] ([fdo#103167]) -> [PASS][71]
>    [70]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/shard-kbl1/igt@kms_frontbuffer_tracking@fbc-tilingchange.html
>    [71]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/shard-kbl3/ig
> t@kms_frontbuffer_tracking@fbc-tilingchange.html
> 
>   * igt@kms_frontbuffer_tracking@fbcpsr-1p-indfb-fliptrack:
>     - {shard-tglb}:       [FAIL][72] ([fdo#103167]) -> [PASS][73] +1 similar issue
>    [72]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/shard-tglb7/igt@kms_frontbuffer_tracking@fbcpsr-1p-indfb-fliptrack.html
>    [73]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/shard-tglb6/i
> gt@kms_frontbuffer_tracking@fbcpsr-1p-indfb-fliptrack.html
> 
>   * igt@kms_frontbuffer_tracking@psr-1p-primscrn-cur-indfb-draw-mmap-gtt:
>     - shard-skl:          [FAIL][74] ([fdo#103167]) -> [PASS][75]
>    [74]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/shard-skl4/igt@kms_frontbuffer_tracking@psr-1p-primscrn-cur-indfb-draw-mmap-gtt.html
>    [75]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/shard-skl3/ig
> t@kms_frontbuffer_tracking@psr-1p-primscrn-cur-indfb-draw-mmap-gtt.htm
> l
> 
>   * igt@kms_plane@plane-panning-bottom-right-suspend-pipe-a-planes:
>     - shard-skl:          [INCOMPLETE][76] ([fdo#104108]) -> [PASS][77]
>    [76]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/shard-skl1/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-a-planes.html
>    [77]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/shard-skl2/ig
> t@kms_plane@plane-panning-bottom-right-suspend-pipe-a-planes.html
> 
>   * igt@kms_plane_alpha_blend@pipe-a-alpha-opaque-fb:
>     - shard-iclb:         [INCOMPLETE][78] ([fdo#107713]) -> [PASS][79] +2 similar issues
>    [78]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/shard-iclb7/igt@kms_plane_alpha_blend@pipe-a-alpha-opaque-fb.html
>    [79]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/shard-iclb1/i
> gt@kms_plane_alpha_blend@pipe-a-alpha-opaque-fb.html
> 
>   * igt@kms_plane_alpha_blend@pipe-c-constant-alpha-min:
>     - shard-skl:          [FAIL][80] ([fdo#108145]) -> [PASS][81] +1 similar issue
>    [80]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/shard-skl8/igt@kms_plane_alpha_blend@pipe-c-constant-alpha-min.html
>    [81]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/shard-skl6/ig
> t@kms_plane_alpha_blend@pipe-c-constant-alpha-min.html
> 
>   * igt@kms_plane_alpha_blend@pipe-c-coverage-7efc:
>     - shard-skl:          [FAIL][82] ([fdo#108145] / [fdo#110403]) -> [PASS][83]
>    [82]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/shard-skl4/igt@kms_plane_alpha_blend@pipe-c-coverage-7efc.html
>    [83]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/shard-skl2/ig
> t@kms_plane_alpha_blend@pipe-c-coverage-7efc.html
> 
>   * igt@kms_psr@psr2_primary_mmap_cpu:
>     - shard-iclb:         [SKIP][84] ([fdo#109441]) -> [PASS][85] +3 similar issues
>    [84]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/shard-iclb6/igt@kms_psr@psr2_primary_mmap_cpu.html
>    [85]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/shard-iclb2/i
> gt@kms_psr@psr2_primary_mmap_cpu.html
> 
>   * igt@prime_vgem@fence-wait-bsd2:
>     - shard-iclb:         [SKIP][86] ([fdo#109276]) -> [PASS][87] +13 similar issues
>    [86]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/shard-iclb8/igt@prime_vgem@fence-wait-bsd2.html
>    [87]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/shard-iclb2/i
> gt@prime_vgem@fence-wait-bsd2.html
> 
>   
> #### Warnings ####
> 
>   * igt@gem_mocs_settings@mocs-reset-bsd2:
>     - shard-iclb:         [FAIL][88] ([fdo#111330]) -> [SKIP][89] ([fdo#109276]) +1 similar issue
>    [88]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/shard-iclb1/igt@gem_mocs_settings@mocs-reset-bsd2.html
>    [89]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/shard-iclb3/i
> gt@gem_mocs_settings@mocs-reset-bsd2.html
> 
>   
>   {name}: This element is suppressed. This means it is ignored when computing
>           the status of the difference (SUCCESS, WARNING, or FAILURE).
> 
>   [fdo#100368]: https://bugs.freedesktop.org/show_bug.cgi?id=100368
>   [fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167
>   [fdo#103232]: https://bugs.freedesktop.org/show_bug.cgi?id=103232
>   [fdo#103540]: https://bugs.freedesktop.org/show_bug.cgi?id=103540
>   [fdo#103665]: https://bugs.freedesktop.org/show_bug.cgi?id=103665
>   [fdo#103927]: https://bugs.freedesktop.org/show_bug.cgi?id=103927
>   [fdo#104108]: https://bugs.freedesktop.org/show_bug.cgi?id=104108
>   [fdo#105411]: https://bugs.freedesktop.org/show_bug.cgi?id=105411
>   [fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713
>   [fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145
>   [fdo#108566]: https://bugs.freedesktop.org/show_bug.cgi?id=108566
>   [fdo#108840]: https://bugs.freedesktop.org/show_bug.cgi?id=108840
>   [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
>   [fdo#109276]: https://bugs.freedesktop.org/show_bug.cgi?id=109276
>   [fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441
>   [fdo#109661]: https://bugs.freedesktop.org/show_bug.cgi?id=109661
>   [fdo#110403]: https://bugs.freedesktop.org/show_bug.cgi?id=110403
>   [fdo#110841]: https://bugs.freedesktop.org/show_bug.cgi?id=110841
>   [fdo#110854]: https://bugs.freedesktop.org/show_bug.cgi?id=110854
>   [fdo#111325]: https://bugs.freedesktop.org/show_bug.cgi?id=111325
>   [fdo#111330]: https://bugs.freedesktop.org/show_bug.cgi?id=111330
>   [fdo#111599]: https://bugs.freedesktop.org/show_bug.cgi?id=111599
>   [fdo#111703]: https://bugs.freedesktop.org/show_bug.cgi?id=111703
>   [fdo#111732 ]: https://bugs.freedesktop.org/show_bug.cgi?id=111732 
>   [fdo#111832]: https://bugs.freedesktop.org/show_bug.cgi?id=111832
>   [fdo#111870]: https://bugs.freedesktop.org/show_bug.cgi?id=111870
>   [fdo#111912]: https://bugs.freedesktop.org/show_bug.cgi?id=111912
>   [fdo#99912]: https://bugs.freedesktop.org/show_bug
> 
> == Logs ==
> 
> For more details see: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/index.html
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 20+ messages in thread

* Re: ✗ Fi.CI.IGT: failure for DC3CO Support for TGL test with DC3CO IGT (rev2)
  2019-10-08  8:40     ` Gupta, Anshuman
@ 2019-10-08  8:50       ` Vudum, Lakshminarayana
  0 siblings, 0 replies; 20+ messages in thread
From: Vudum, Lakshminarayana @ 2019-10-08  8:50 UTC (permalink / raw)
  To: Gupta, Anshuman, Deak, Imre, intel-gfx

CI bug log filter is updated for Bug 108686 to associate dmesg-fail as well.

Lakshmi.

-----Original Message-----
From: Gupta, Anshuman <anshuman.gupta@intel.com> 
Sent: Tuesday, October 8, 2019 11:40 AM
To: Deak, Imre <imre.deak@intel.com>; intel-gfx@lists.freedesktop.org; Vudum, Lakshminarayana <lakshminarayana.vudum@intel.com>
Subject: RE: [Intel-gfx] ✗ Fi.CI.IGT: failure for DC3CO Support for TGL test with DC3CO IGT (rev2)

Thanks Imre for merging the patches 😊 

-----Original Message-----
From: Imre Deak <imre.deak@intel.com>
Sent: Tuesday, October 8, 2019 1:59 PM
To: intel-gfx@lists.freedesktop.org; Gupta, Anshuman <anshuman.gupta@intel.com>; Vudum, Lakshminarayana <lakshminarayana.vudum@intel.com>
Subject: Re: [Intel-gfx] ✗ Fi.CI.IGT: failure for DC3CO Support for TGL test with DC3CO IGT (rev2)

On Mon, Oct 07, 2019 at 06:37:48PM +0000, Patchwork wrote:
> == Series Details ==
> 
> Series: DC3CO Support for TGL test with DC3CO IGT (rev2)
> URL   : https://patchwork.freedesktop.org/series/67525/
> State : failure

Thanks for the patches merged to -dinq. For the failure see below.

> 
> == Summary ==
> 
> CI Bug Log - changes from CI_DRM_7021_full -> Patchwork_14686_full 
> ====================================================
> 
> Summary
> -------
> 
>   **FAILURE**
> 
>   Serious unknown changes coming with Patchwork_14686_full absolutely need to be
>   verified manually.
>   
>   If you think the reported changes have nothing to do with the changes
>   introduced in Patchwork_14686_full, please notify your bug team to allow them
>   to document this new failure mode, which will reduce false positives in CI.
> 
>   
> 
> Possible new issues
> -------------------
> 
>   Here are the unknown changes that may have been introduced in Patchwork_14686_full:
> 
> ### IGT changes ###
> 
> #### Possible regressions ####
> 
>   * igt@gem_tiled_swapping@non-threaded:
>     - shard-hsw:          [PASS][1] -> [DMESG-FAIL][2]
>    [1]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/shard-hsw4/igt@ge
> m_tiled_swapping@non-threaded.html

Unrelated platform and looks like the following existing bug:
https://bugs.freedesktop.org/show_bug.cgi?id=108686

Lakshmi, does the filter needs to be updated for HSW?



>    [2]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/shard-hsw5/ig
> t@gem_tiled_swapping@non-threaded.html
> 
>   * {igt@i915_pm_dc@dc3co-vpb-simulation} (NEW):
>     - shard-iclb:         NOTRUN -> [SKIP][3]
>    [3]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/shard-iclb2/i
> gt@i915_pm_dc@dc3co-vpb-simulation.html
> 
>   
> #### Suppressed ####
> 
>   The following results come from untrusted machines, tests, or statuses.
>   They do not affect the overall result.
> 
>   * igt@kms_plane_lowres@pipe-c-tiling-none:
>     - {shard-tglb}:       [PASS][4] -> [INCOMPLETE][5]
>    [4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/shard-tglb1/igt@kms_plane_lowres@pipe-c-tiling-none.html
>    [5]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/shard-tglb1/i
> gt@kms_plane_lowres@pipe-c-tiling-none.html
> 
>   
> New tests
> ---------
> 
>   New tests have been introduced between CI_DRM_7021_full and Patchwork_14686_full:
> 
> ### New IGT tests (1) ###
> 
>   * igt@i915_pm_dc@dc3co-vpb-simulation:
>     - Statuses : 7 skip(s)
>     - Exec time: [0.0] s
> 
>   
> 
> 
> ### New Piglit tests (4) ###
> 
>   * spec@arb_gpu_shader5@texturegather@vs-rgba-0-int-cubearray:
>     - Statuses : 1 incomplete(s)
>     - Exec time: [0.0] s
> 
>   * spec@arb_gpu_shader5@texturegather@vs-rgba-1-int-cubearray:
>     - Statuses : 1 incomplete(s)
>     - Exec time: [0.0] s
> 
>   * spec@arb_gpu_shader5@texturegather@vs-rgba-2-int-cubearray:
>     - Statuses : 1 incomplete(s)
>     - Exec time: [0.0] s
> 
>   * spec@arb_gpu_shader5@texturegather@vs-rgba-3-int-cubearray:
>     - Statuses : 1 incomplete(s)
>     - Exec time: [0.0] s
> 
>   
> 
> Known issues
> ------------
> 
>   Here are the changes found in Patchwork_14686_full that come from known issues:
> 
> ### IGT changes ###
> 
> #### Issues hit ####
> 
>   * igt@gem_ctx_isolation@bcs0-s3:
>     - shard-apl:          [PASS][6] -> [DMESG-WARN][7] ([fdo#108566]) +5 similar issues
>    [6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/shard-apl3/igt@gem_ctx_isolation@bcs0-s3.html
>    [7]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/shard-apl5/ig
> t@gem_ctx_isolation@bcs0-s3.html
> 
>   * igt@gem_ctx_isolation@vcs1-s3:
>     - shard-kbl:          [PASS][8] -> [INCOMPLETE][9] ([fdo#103665])
>    [8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/shard-kbl1/igt@gem_ctx_isolation@vcs1-s3.html
>    [9]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/shard-kbl3/ig
> t@gem_ctx_isolation@vcs1-s3.html
> 
>   * igt@gem_ctx_shared@exec-single-timeline-bsd:
>     - shard-iclb:         [PASS][10] -> [SKIP][11] ([fdo#110841])
>    [10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/shard-iclb7/igt@gem_ctx_shared@exec-single-timeline-bsd.html
>    [11]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/shard-iclb2/i
> gt@gem_ctx_shared@exec-single-timeline-bsd.html
> 
>   * igt@gem_exec_balancer@smoke:
>     - shard-iclb:         [PASS][12] -> [SKIP][13] ([fdo#110854])
>    [12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/shard-iclb2/igt@gem_exec_balancer@smoke.html
>    [13]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/shard-iclb3/i
> gt@gem_exec_balancer@smoke.html
> 
>   * igt@gem_exec_nop@basic-parallel:
>     - shard-apl:          [PASS][14] -> [INCOMPLETE][15] ([fdo#103927]) +1 similar issue
>    [14]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/shard-apl7/igt@gem_exec_nop@basic-parallel.html
>    [15]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/shard-apl6/ig
> t@gem_exec_nop@basic-parallel.html
> 
>   * igt@gem_exec_schedule@out-order-bsd2:
>     - shard-iclb:         [PASS][16] -> [SKIP][17] ([fdo#109276]) +12 similar issues
>    [16]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/shard-iclb1/igt@gem_exec_schedule@out-order-bsd2.html
>    [17]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/shard-iclb5/i
> gt@gem_exec_schedule@out-order-bsd2.html
> 
>   * igt@gem_exec_schedule@preempt-other-chain-bsd:
>     - shard-iclb:         [PASS][18] -> [SKIP][19] ([fdo#111325]) +3 similar issues
>    [18]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/shard-iclb5/igt@gem_exec_schedule@preempt-other-chain-bsd.html
>    [19]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/shard-iclb2/i
> gt@gem_exec_schedule@preempt-other-chain-bsd.html
> 
>   * igt@gem_softpin@softpin:
>     - shard-skl:          [PASS][20] -> [TIMEOUT][21] ([fdo#111732 ])
>    [20]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/shard-skl7/igt@gem_softpin@softpin.html
>    [21]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/shard-skl3/ig
> t@gem_softpin@softpin.html
> 
>   * igt@gem_userptr_blits@map-fixed-invalidate-busy-gup:
>     - shard-hsw:          [PASS][22] -> [DMESG-WARN][23] ([fdo#111870]) +1 similar issue
>    [22]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/shard-hsw5/igt@gem_userptr_blits@map-fixed-invalidate-busy-gup.html
>    [23]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/shard-hsw4/ig
> t@gem_userptr_blits@map-fixed-invalidate-busy-gup.html
> 
>   * igt@gem_userptr_blits@sync-unmap-cycles:
>     - shard-snb:          [PASS][24] -> [DMESG-WARN][25] ([fdo#111870]) +2 similar issues
>    [24]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/shard-snb4/igt@gem_userptr_blits@sync-unmap-cycles.html
>    [25]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/shard-snb7/ig
> t@gem_userptr_blits@sync-unmap-cycles.html
> 
>   * igt@i915_pm_rc6_residency@rc6-accuracy:
>     - shard-kbl:          [PASS][26] -> [SKIP][27] ([fdo#109271])
>    [26]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/shard-kbl6/igt@i915_pm_rc6_residency@rc6-accuracy.html
>    [27]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/shard-kbl2/ig
> t@i915_pm_rc6_residency@rc6-accuracy.html
> 
>   * igt@i915_pm_rpm@modeset-lpsp-stress:
>     - shard-iclb:         [PASS][28] -> [INCOMPLETE][29] ([fdo#107713] / [fdo#108840])
>    [28]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/shard-iclb7/igt@i915_pm_rpm@modeset-lpsp-stress.html
>    [29]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/shard-iclb1/i
> gt@i915_pm_rpm@modeset-lpsp-stress.html
> 
>   * igt@i915_suspend@sysfs-reader:
>     - shard-skl:          [PASS][30] -> [INCOMPLETE][31] ([fdo#104108]) +2 similar issues
>    [30]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/shard-skl7/igt@i915_suspend@sysfs-reader.html
>    [31]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/shard-skl6/ig
> t@i915_suspend@sysfs-reader.html
> 
>   * igt@kms_cursor_crc@pipe-b-cursor-alpha-transparent:
>     - shard-skl:          [PASS][32] -> [FAIL][33] ([fdo#103232])
>    [32]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/shard-skl8/igt@kms_cursor_crc@pipe-b-cursor-alpha-transparent.html
>    [33]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/shard-skl10/i
> gt@kms_cursor_crc@pipe-b-cursor-alpha-transparent.html
> 
>   * igt@kms_flip@flip-vs-suspend-interruptible:
>     - shard-snb:          [PASS][34] -> [INCOMPLETE][35] ([fdo#105411])
>    [34]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/shard-snb6/igt@kms_flip@flip-vs-suspend-interruptible.html
>    [35]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/shard-snb1/ig
> t@kms_flip@flip-vs-suspend-interruptible.html
> 
>   * igt@kms_flip@plain-flip-fb-recreate-interruptible:
>     - shard-skl:          [PASS][36] -> [FAIL][37] ([fdo#100368])
>    [36]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/shard-skl7/igt@kms_flip@plain-flip-fb-recreate-interruptible.html
>    [37]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/shard-skl10/i
> gt@kms_flip@plain-flip-fb-recreate-interruptible.html
> 
>   * igt@kms_frontbuffer_tracking@fbc-rgb565-draw-blt:
>     - shard-iclb:         [PASS][38] -> [FAIL][39] ([fdo#103167]) +3 similar issues
>    [38]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/shard-iclb6/igt@kms_frontbuffer_tracking@fbc-rgb565-draw-blt.html
>    [39]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/shard-iclb2/i
> gt@kms_frontbuffer_tracking@fbc-rgb565-draw-blt.html
> 
>   * igt@kms_psr@psr2_cursor_blt:
>     - shard-iclb:         [PASS][40] -> [SKIP][41] ([fdo#109441]) +1 similar issue
>    [40]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/shard-iclb2/igt@kms_psr@psr2_cursor_blt.html
>    [41]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/shard-iclb5/i
> gt@kms_psr@psr2_cursor_blt.html
> 
>   * igt@kms_setmode@basic:
>     - shard-apl:          [PASS][42] -> [FAIL][43] ([fdo#99912])
>    [42]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/shard-apl7/igt@kms_setmode@basic.html
>    [43]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/shard-apl5/ig
> t@kms_setmode@basic.html
> 
>   
> #### Possible fixes ####
> 
>   * igt@gem_ctx_isolation@rcs0-s3:
>     - shard-apl:          [DMESG-WARN][44] ([fdo#108566]) -> [PASS][45] +9 similar issues
>    [44]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/shard-apl2/igt@gem_ctx_isolation@rcs0-s3.html
>    [45]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/shard-apl4/ig
> t@gem_ctx_isolation@rcs0-s3.html
> 
>   * igt@gem_ctx_switch@all-light:
>     - shard-hsw:          [INCOMPLETE][46] ([fdo#103540]) -> [PASS][47]
>    [46]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/shard-hsw2/igt@gem_ctx_switch@all-light.html
>    [47]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/shard-hsw2/ig
> t@gem_ctx_switch@all-light.html
> 
>   * igt@gem_eio@unwedge-stress:
>     - shard-snb:          [FAIL][48] ([fdo#109661]) -> [PASS][49]
>    [48]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/shard-snb5/igt@gem_eio@unwedge-stress.html
>    [49]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/shard-snb4/ig
> t@gem_eio@unwedge-stress.html
> 
>   * igt@gem_exec_schedule@preemptive-hang-bsd:
>     - shard-iclb:         [SKIP][50] ([fdo#111325]) -> [PASS][51] +4 similar issues
>    [50]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/shard-iclb2/igt@gem_exec_schedule@preemptive-hang-bsd.html
>    [51]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/shard-iclb8/i
> gt@gem_exec_schedule@preemptive-hang-bsd.html
> 
>   * igt@gem_userptr_blits@map-fixed-invalidate-busy:
>     - shard-snb:          [DMESG-WARN][52] ([fdo#111870]) -> [PASS][53] +2 similar issues
>    [52]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/shard-snb4/igt@gem_userptr_blits@map-fixed-invalidate-busy.html
>    [53]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/shard-snb4/ig
> t@gem_userptr_blits@map-fixed-invalidate-busy.html
> 
>   * igt@gem_userptr_blits@sync-unmap-cycles:
>     - shard-hsw:          [DMESG-WARN][54] ([fdo#111870]) -> [PASS][55] +3 similar issues
>    [54]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/shard-hsw1/igt@gem_userptr_blits@sync-unmap-cycles.html
>    [55]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/shard-hsw1/ig
> t@gem_userptr_blits@sync-unmap-cycles.html
> 
>   * igt@i915_selftest@live_hangcheck:
>     - shard-snb:          [INCOMPLETE][56] ([fdo#105411]) -> [PASS][57]
>    [56]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/shard-snb7/igt@i915_selftest@live_hangcheck.html
>    [57]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/shard-snb7/ig
> t@i915_selftest@live_hangcheck.html
> 
>   * igt@i915_selftest@live_workarounds:
>     - shard-kbl:          [DMESG-FAIL][58] -> [PASS][59]
>    [58]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/shard-kbl2/igt@i915_selftest@live_workarounds.html
>    [59]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/shard-kbl4/ig
> t@i915_selftest@live_workarounds.html
> 
>   * igt@kms_cursor_crc@pipe-c-cursor-size-change:
>     - shard-skl:          [FAIL][60] ([fdo#103232]) -> [PASS][61]
>    [60]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/shard-skl8/igt@kms_cursor_crc@pipe-c-cursor-size-change.html
>    [61]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/shard-skl3/ig
> t@kms_cursor_crc@pipe-c-cursor-size-change.html
> 
>   * igt@kms_fbcon_fbt@psr-suspend:
>     - {shard-tglb}:       [INCOMPLETE][62] ([fdo#111832]) -> [PASS][63]
>    [62]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/shard-tglb1/igt@kms_fbcon_fbt@psr-suspend.html
>    [63]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/shard-tglb6/i
> gt@kms_fbcon_fbt@psr-suspend.html
> 
>   * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-render:
>     - shard-iclb:         [FAIL][64] ([fdo#103167]) -> [PASS][65] +3 similar issues
>    [64]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/shard-iclb7/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-render.html
>    [65]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/shard-iclb5/i
> gt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-render.html
> 
>   * igt@kms_frontbuffer_tracking@fbc-tilingchange:
>     - shard-apl:          [FAIL][66] ([fdo#103167]) -> [PASS][67]
>    [66]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/shard-apl1/igt@kms_frontbuffer_tracking@fbc-tilingchange.html
>    [67]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/shard-apl5/igt@kms_frontbuffer_tracking@fbc-tilingchange.html
>     - shard-glk:          [FAIL][68] ([fdo#103167]) -> [PASS][69]
>    [68]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/shard-glk7/igt@kms_frontbuffer_tracking@fbc-tilingchange.html
>    [69]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/shard-glk1/igt@kms_frontbuffer_tracking@fbc-tilingchange.html
>     - shard-kbl:          [FAIL][70] ([fdo#103167]) -> [PASS][71]
>    [70]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/shard-kbl1/igt@kms_frontbuffer_tracking@fbc-tilingchange.html
>    [71]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/shard-kbl3/ig
> t@kms_frontbuffer_tracking@fbc-tilingchange.html
> 
>   * igt@kms_frontbuffer_tracking@fbcpsr-1p-indfb-fliptrack:
>     - {shard-tglb}:       [FAIL][72] ([fdo#103167]) -> [PASS][73] +1 similar issue
>    [72]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/shard-tglb7/igt@kms_frontbuffer_tracking@fbcpsr-1p-indfb-fliptrack.html
>    [73]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/shard-tglb6/i
> gt@kms_frontbuffer_tracking@fbcpsr-1p-indfb-fliptrack.html
> 
>   * igt@kms_frontbuffer_tracking@psr-1p-primscrn-cur-indfb-draw-mmap-gtt:
>     - shard-skl:          [FAIL][74] ([fdo#103167]) -> [PASS][75]
>    [74]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/shard-skl4/igt@kms_frontbuffer_tracking@psr-1p-primscrn-cur-indfb-draw-mmap-gtt.html
>    [75]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/shard-skl3/ig
> t@kms_frontbuffer_tracking@psr-1p-primscrn-cur-indfb-draw-mmap-gtt.htm
> l
> 
>   * igt@kms_plane@plane-panning-bottom-right-suspend-pipe-a-planes:
>     - shard-skl:          [INCOMPLETE][76] ([fdo#104108]) -> [PASS][77]
>    [76]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/shard-skl1/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-a-planes.html
>    [77]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/shard-skl2/ig
> t@kms_plane@plane-panning-bottom-right-suspend-pipe-a-planes.html
> 
>   * igt@kms_plane_alpha_blend@pipe-a-alpha-opaque-fb:
>     - shard-iclb:         [INCOMPLETE][78] ([fdo#107713]) -> [PASS][79] +2 similar issues
>    [78]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/shard-iclb7/igt@kms_plane_alpha_blend@pipe-a-alpha-opaque-fb.html
>    [79]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/shard-iclb1/i
> gt@kms_plane_alpha_blend@pipe-a-alpha-opaque-fb.html
> 
>   * igt@kms_plane_alpha_blend@pipe-c-constant-alpha-min:
>     - shard-skl:          [FAIL][80] ([fdo#108145]) -> [PASS][81] +1 similar issue
>    [80]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/shard-skl8/igt@kms_plane_alpha_blend@pipe-c-constant-alpha-min.html
>    [81]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/shard-skl6/ig
> t@kms_plane_alpha_blend@pipe-c-constant-alpha-min.html
> 
>   * igt@kms_plane_alpha_blend@pipe-c-coverage-7efc:
>     - shard-skl:          [FAIL][82] ([fdo#108145] / [fdo#110403]) -> [PASS][83]
>    [82]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/shard-skl4/igt@kms_plane_alpha_blend@pipe-c-coverage-7efc.html
>    [83]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/shard-skl2/ig
> t@kms_plane_alpha_blend@pipe-c-coverage-7efc.html
> 
>   * igt@kms_psr@psr2_primary_mmap_cpu:
>     - shard-iclb:         [SKIP][84] ([fdo#109441]) -> [PASS][85] +3 similar issues
>    [84]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/shard-iclb6/igt@kms_psr@psr2_primary_mmap_cpu.html
>    [85]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/shard-iclb2/i
> gt@kms_psr@psr2_primary_mmap_cpu.html
> 
>   * igt@prime_vgem@fence-wait-bsd2:
>     - shard-iclb:         [SKIP][86] ([fdo#109276]) -> [PASS][87] +13 similar issues
>    [86]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/shard-iclb8/igt@prime_vgem@fence-wait-bsd2.html
>    [87]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/shard-iclb2/i
> gt@prime_vgem@fence-wait-bsd2.html
> 
>   
> #### Warnings ####
> 
>   * igt@gem_mocs_settings@mocs-reset-bsd2:
>     - shard-iclb:         [FAIL][88] ([fdo#111330]) -> [SKIP][89] ([fdo#109276]) +1 similar issue
>    [88]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7021/shard-iclb1/igt@gem_mocs_settings@mocs-reset-bsd2.html
>    [89]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/shard-iclb3/i
> gt@gem_mocs_settings@mocs-reset-bsd2.html
> 
>   
>   {name}: This element is suppressed. This means it is ignored when computing
>           the status of the difference (SUCCESS, WARNING, or FAILURE).
> 
>   [fdo#100368]: https://bugs.freedesktop.org/show_bug.cgi?id=100368
>   [fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167
>   [fdo#103232]: https://bugs.freedesktop.org/show_bug.cgi?id=103232
>   [fdo#103540]: https://bugs.freedesktop.org/show_bug.cgi?id=103540
>   [fdo#103665]: https://bugs.freedesktop.org/show_bug.cgi?id=103665
>   [fdo#103927]: https://bugs.freedesktop.org/show_bug.cgi?id=103927
>   [fdo#104108]: https://bugs.freedesktop.org/show_bug.cgi?id=104108
>   [fdo#105411]: https://bugs.freedesktop.org/show_bug.cgi?id=105411
>   [fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713
>   [fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145
>   [fdo#108566]: https://bugs.freedesktop.org/show_bug.cgi?id=108566
>   [fdo#108840]: https://bugs.freedesktop.org/show_bug.cgi?id=108840
>   [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
>   [fdo#109276]: https://bugs.freedesktop.org/show_bug.cgi?id=109276
>   [fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441
>   [fdo#109661]: https://bugs.freedesktop.org/show_bug.cgi?id=109661
>   [fdo#110403]: https://bugs.freedesktop.org/show_bug.cgi?id=110403
>   [fdo#110841]: https://bugs.freedesktop.org/show_bug.cgi?id=110841
>   [fdo#110854]: https://bugs.freedesktop.org/show_bug.cgi?id=110854
>   [fdo#111325]: https://bugs.freedesktop.org/show_bug.cgi?id=111325
>   [fdo#111330]: https://bugs.freedesktop.org/show_bug.cgi?id=111330
>   [fdo#111599]: https://bugs.freedesktop.org/show_bug.cgi?id=111599
>   [fdo#111703]: https://bugs.freedesktop.org/show_bug.cgi?id=111703
>   [fdo#111732 ]: https://bugs.freedesktop.org/show_bug.cgi?id=111732 
>   [fdo#111832]: https://bugs.freedesktop.org/show_bug.cgi?id=111832
>   [fdo#111870]: https://bugs.freedesktop.org/show_bug.cgi?id=111870
>   [fdo#111912]: https://bugs.freedesktop.org/show_bug.cgi?id=111912
>   [fdo#99912]: https://bugs.freedesktop.org/show_bug
> 
> == Logs ==
> 
> For more details see: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14686/index.html
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
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^ permalink raw reply	[flat|nested] 20+ messages in thread

end of thread, other threads:[~2019-10-08  8:50 UTC | newest]

Thread overview: 20+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2019-10-03  8:17 [PATCH v10 RESEND 0/6] DC3CO Support for TGL test with DC3CO IGT Anshuman Gupta
2019-10-03  8:17 ` [PATCH v10 1/6] drm/i915/tgl: Add DC3CO required register and bits Anshuman Gupta
2019-10-04 15:48   ` Ville Syrjälä
2019-10-04 16:40     ` Anshuman Gupta
2019-10-07  9:46   ` Anshuman Gupta
2019-10-03  8:17 ` [PATCH v10 2/6] drm/i915/tgl: Add DC3CO mask to allowed_dc_mask and gen9_dc_mask Anshuman Gupta
2019-10-03  8:17 ` [PATCH v10 3/6] drm/i915/tgl: Enable DC3CO state in "DC Off" power well Anshuman Gupta
2019-10-03  8:17 ` [PATCH v10 4/6] drm/i915/tgl: Do modeset to enable and configure DC3CO exitline Anshuman Gupta
2019-10-03  8:17 ` [PATCH v10 5/6] drm/i915/tgl: Switch between dc3co and dc5 based on display idleness Anshuman Gupta
2019-10-03  8:17 ` [PATCH v10 6/6] drm/i915/tgl: Add DC3CO counter in i915_dmc_info Anshuman Gupta
2019-10-03 10:20 ` ✓ Fi.CI.BAT: success for DC3CO Support for TGL test with DC3CO IGT Patchwork
2019-10-03 16:37 ` ✓ Fi.CI.IGT: " Patchwork
2019-10-07 10:46 ` ✗ Fi.CI.BAT: failure for DC3CO Support for TGL test with DC3CO IGT (rev2) Patchwork
2019-10-07 11:02   ` Anshuman Gupta
2019-10-07 13:31     ` Vudum, Lakshminarayana
2019-10-07 15:14 ` ✓ Fi.CI.BAT: success " Patchwork
2019-10-07 18:37 ` ✗ Fi.CI.IGT: failure " Patchwork
2019-10-08  8:28   ` Imre Deak
2019-10-08  8:40     ` Gupta, Anshuman
2019-10-08  8:50       ` Vudum, Lakshminarayana

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