* [PATCH 1/2] drm/i915/selftests: Check known register values within the context @ 2019-10-10 15:49 Chris Wilson 2019-10-10 15:49 ` [PATCH 2/2] drm/i915/selftests: Check that GPR are cleared for new contexts Chris Wilson ` (2 more replies) 0 siblings, 3 replies; 5+ messages in thread From: Chris Wilson @ 2019-10-10 15:49 UTC (permalink / raw) To: intel-gfx Check the logical ring context by asserting that the registers hold expected start during execution. (It's a bit chicken-and-egg for how could we manage to execute our request if the registers were not being updated. Still, it's nice to verify that the HW is working as expected.) Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> --- drivers/gpu/drm/i915/gt/selftest_lrc.c | 126 +++++++++++++++++++++++++ 1 file changed, 126 insertions(+) diff --git a/drivers/gpu/drm/i915/gt/selftest_lrc.c b/drivers/gpu/drm/i915/gt/selftest_lrc.c index a691e429ca01..0aa36b1b2389 100644 --- a/drivers/gpu/drm/i915/gt/selftest_lrc.c +++ b/drivers/gpu/drm/i915/gt/selftest_lrc.c @@ -2599,10 +2599,136 @@ static int live_lrc_layout(void *arg) return err; } +static int __live_lrc_state(struct i915_gem_context *fixme, + struct intel_engine_cs *engine, + struct i915_vma *scratch) +{ + struct intel_context *ce; + struct i915_request *rq; + enum { + RING_START_IDX = 0, + RING_TAIL_IDX, + MAX_IDX + }; + u32 expected[MAX_IDX]; + u32 *cs; + int err; + int n; + + ce = intel_context_create(fixme, engine); + if (IS_ERR(ce)) + return PTR_ERR(ce); + + err = intel_context_pin(ce); + if (err) + goto err_put; + + rq = i915_request_create(ce); + if (IS_ERR(rq)) { + err = PTR_ERR(rq); + goto err_unpin; + } + + cs = intel_ring_begin(rq, 4 * MAX_IDX); + if (IS_ERR(cs)) { + err = PTR_ERR(cs); + i915_request_add(rq); + goto err_unpin; + } + + *cs++ = MI_STORE_REGISTER_MEM_GEN8 | MI_USE_GGTT; + *cs++ = i915_mmio_reg_offset(RING_START(engine->mmio_base)); + *cs++ = i915_ggtt_offset(scratch) + RING_START_IDX * sizeof(u32); + *cs++ = 0; + + expected[RING_START_IDX] = i915_ggtt_offset(ce->ring->vma); + + *cs++ = MI_STORE_REGISTER_MEM_GEN8 | MI_USE_GGTT; + *cs++ = i915_mmio_reg_offset(RING_TAIL(engine->mmio_base)); + *cs++ = i915_ggtt_offset(scratch) + RING_TAIL_IDX * sizeof(u32); + *cs++ = 0; + + i915_request_get(rq); + i915_request_add(rq); + + intel_engine_flush_submission(engine); + expected[RING_TAIL_IDX] = ce->ring->tail; + + if (i915_request_wait(rq, 0, HZ / 5) < 0) { + err = -ETIME; + goto err_rq; + } + + cs = i915_gem_object_pin_map(scratch->obj, I915_MAP_WB); + if (IS_ERR(cs)) { + err = PTR_ERR(cs); + goto err_rq; + } + + for (n = 0; n < MAX_IDX; n++) { + if (cs[n] != expected[n]) { + pr_err("%s: Stored register[%d] value[0x%x] did not match expected[0x%x]\n", + engine->name, n, cs[n], expected[n]); + err = -EINVAL; + break; + } + } + + i915_gem_object_unpin_map(scratch->obj); + +err_rq: + i915_request_put(rq); +err_unpin: + intel_context_unpin(ce); +err_put: + intel_context_put(ce); + return err; +} + +static int live_lrc_state(void *arg) +{ + struct intel_gt *gt = arg; + struct intel_engine_cs *engine; + struct i915_gem_context *fixme; + struct i915_vma *scratch; + enum intel_engine_id id; + int err = 0; + + /* + * Check the live register state matches what we expect for this + * intel_context. + */ + + fixme = kernel_context(gt->i915); + if (!fixme) + return -ENOMEM; + + scratch = create_scratch(gt); + if (IS_ERR(scratch)) { + err = PTR_ERR(scratch); + goto out_close; + } + + for_each_engine(engine, gt->i915, id) { + err = __live_lrc_state(fixme, engine, scratch); + if (err) + break; + } + + if (igt_flush_test(gt->i915)) + err = -EIO; + + i915_vma_unpin_and_release(&scratch, 0); +out_close: + kernel_context_close(fixme); + return err; +} + int intel_lrc_live_selftests(struct drm_i915_private *i915) { static const struct i915_subtest tests[] = { SUBTEST(live_lrc_layout), + SUBTEST(live_lrc_state), }; if (!HAS_LOGICAL_RING_CONTEXTS(i915)) -- 2.23.0 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply related [flat|nested] 5+ messages in thread
* [PATCH 2/2] drm/i915/selftests: Check that GPR are cleared for new contexts 2019-10-10 15:49 [PATCH 1/2] drm/i915/selftests: Check known register values within the context Chris Wilson @ 2019-10-10 15:49 ` Chris Wilson 2019-10-10 19:18 ` ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915/selftests: Check known register values within the context Patchwork 2019-10-11 9:00 ` ✗ Fi.CI.IGT: failure " Patchwork 2 siblings, 0 replies; 5+ messages in thread From: Chris Wilson @ 2019-10-10 15:49 UTC (permalink / raw) To: intel-gfx We want the general purpose registers to be clear in all new contexts so that we can be confident that no information is leaked from one to the next. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com> --- drivers/gpu/drm/i915/gt/selftest_lrc.c | 185 ++++++++++++++++++++++--- 1 file changed, 166 insertions(+), 19 deletions(-) diff --git a/drivers/gpu/drm/i915/gt/selftest_lrc.c b/drivers/gpu/drm/i915/gt/selftest_lrc.c index 0aa36b1b2389..1276da059dc6 100644 --- a/drivers/gpu/drm/i915/gt/selftest_lrc.c +++ b/drivers/gpu/drm/i915/gt/selftest_lrc.c @@ -19,6 +19,9 @@ #include "gem/selftests/igt_gem_utils.h" #include "gem/selftests/mock_context.h" +#define CS_GPR(engine, n) ((engine)->mmio_base + 0x600 + (n) * 4) +#define NUM_GPR_DW (16 * 2) /* each GPR is 2 dwords */ + static struct i915_vma *create_scratch(struct intel_gt *gt) { struct drm_i915_gem_object *obj; @@ -2107,16 +2110,14 @@ static int preserved_virtual_engine(struct drm_i915_private *i915, struct intel_engine_cs **siblings, unsigned int nsibling) { -#define CS_GPR(engine, n) ((engine)->mmio_base + 0x600 + (n) * 4) - struct i915_request *last = NULL; struct i915_gem_context *ctx; struct intel_context *ve; struct i915_vma *scratch; struct igt_live_test t; - const int num_gpr = 16 * 2; /* each GPR is 2 dwords */ unsigned int n; int err = 0; + u32 *cs; ctx = kernel_context(i915); if (!ctx) @@ -2142,10 +2143,9 @@ static int preserved_virtual_engine(struct drm_i915_private *i915, if (err) goto out_unpin; - for (n = 0; n < num_gpr; n++) { + for (n = 0; n < NUM_GPR_DW; n++) { struct intel_engine_cs *engine = siblings[n % nsibling]; struct i915_request *rq; - u32 *cs; rq = i915_request_create(ve); if (IS_ERR(rq)) { @@ -2169,7 +2169,7 @@ static int preserved_virtual_engine(struct drm_i915_private *i915, *cs++ = 0; *cs++ = MI_LOAD_REGISTER_IMM(1); - *cs++ = CS_GPR(engine, (n + 1) % num_gpr); + *cs++ = CS_GPR(engine, (n + 1) % NUM_GPR_DW); *cs++ = n + 1; *cs++ = MI_NOOP; @@ -2182,21 +2182,26 @@ static int preserved_virtual_engine(struct drm_i915_private *i915, if (i915_request_wait(last, 0, HZ / 5) < 0) { err = -ETIME; - } else { - u32 *map = i915_gem_object_pin_map(scratch->obj, I915_MAP_WB); + goto out_end; + } - for (n = 0; n < num_gpr; n++) { - if (map[n] != n) { - pr_err("Incorrect value[%d] found for GPR[%d]\n", - map[n], n); - err = -EINVAL; - break; - } - } + cs = i915_gem_object_pin_map(scratch->obj, I915_MAP_WB); + if (IS_ERR(cs)) { + err = PTR_ERR(cs); + goto out_end; + } - i915_gem_object_unpin_map(scratch->obj); + for (n = 0; n < NUM_GPR_DW; n++) { + if (cs[n] != n) { + pr_err("Incorrect value[%d] found for GPR[%d]\n", + cs[n], n); + err = -EINVAL; + break; + } } + i915_gem_object_unpin_map(scratch->obj); + out_end: if (igt_live_test_end(&t)) err = -EIO; @@ -2210,8 +2215,6 @@ static int preserved_virtual_engine(struct drm_i915_private *i915, out_close: kernel_context_close(ctx); return err; - -#undef CS_GPR } static int live_virtual_preserved(void *arg) @@ -2724,11 +2727,155 @@ static int live_lrc_state(void *arg) return err; } +static int gpr_make_dirty(struct intel_engine_cs *engine) +{ + struct i915_request *rq; + u32 *cs; + int n; + + rq = i915_request_create(engine->kernel_context); + if (IS_ERR(rq)) + return PTR_ERR(rq); + + cs = intel_ring_begin(rq, 2 * NUM_GPR_DW + 2); + if (IS_ERR(cs)) { + i915_request_add(rq); + return PTR_ERR(cs); + } + + *cs++ = MI_LOAD_REGISTER_IMM(NUM_GPR_DW); + for (n = 0; n < NUM_GPR_DW; n++) { + *cs++ = CS_GPR(engine, n); + *cs++ = STACK_MAGIC; + } + *cs++ = MI_NOOP; + + intel_ring_advance(rq, cs); + i915_request_add(rq); + + return 0; +} + +static int __live_gpr_clear(struct i915_gem_context *fixme, + struct intel_engine_cs *engine, + struct i915_vma *scratch) +{ + struct intel_context *ce; + struct i915_request *rq; + u32 *cs; + int err; + int n; + + if (INTEL_GEN(engine->i915) < 9 && engine->class != RENDER_CLASS) + return 0; /* GPR only on rcs0 for gen8 */ + + err = gpr_make_dirty(engine); + if (err) + return err; + + ce = intel_context_create(fixme, engine); + if (IS_ERR(ce)) + return PTR_ERR(ce); + + rq = intel_context_create_request(ce); + if (IS_ERR(rq)) { + err = PTR_ERR(rq); + goto err_put; + } + + cs = intel_ring_begin(rq, 4 * NUM_GPR_DW); + if (IS_ERR(cs)) { + err = PTR_ERR(cs); + i915_request_add(rq); + goto err_put; + } + + for (n = 0; n < NUM_GPR_DW; n++) { + *cs++ = MI_STORE_REGISTER_MEM_GEN8 | MI_USE_GGTT; + *cs++ = CS_GPR(engine, n); + *cs++ = i915_ggtt_offset(scratch) + n * sizeof(u32); + *cs++ = 0; + } + + i915_request_get(rq); + i915_request_add(rq); + + if (i915_request_wait(rq, 0, HZ / 5) < 0) { + err = -ETIME; + goto err_rq; + } + + cs = i915_gem_object_pin_map(scratch->obj, I915_MAP_WB); + if (IS_ERR(cs)) { + err = PTR_ERR(cs); + goto err_rq; + } + + for (n = 0; n < NUM_GPR_DW; n++) { + if (cs[n]) { + pr_err("%s: GPR[%d].%s was not zero, found 0x%08x!\n", + engine->name, + n / 2, n & 1 ? "udw" : "ldw", + cs[n]); + err = -EINVAL; + break; + } + } + + i915_gem_object_unpin_map(scratch->obj); + +err_rq: + i915_request_put(rq); +err_put: + intel_context_put(ce); + return err; +} + +static int live_gpr_clear(void *arg) +{ + struct intel_gt *gt = arg; + struct intel_engine_cs *engine; + struct i915_gem_context *fixme; + struct i915_vma *scratch; + enum intel_engine_id id; + int err = 0; + + /* + * Check that GPR registers are cleared in new contexts as we need + * to avoid leaking any information from previous contexts. + */ + + fixme = kernel_context(gt->i915); + if (!fixme) + return -ENOMEM; + + scratch = create_scratch(gt); + if (IS_ERR(scratch)) { + err = PTR_ERR(scratch); + goto out_close; + } + + for_each_engine(engine, gt->i915, id) { + err = __live_gpr_clear(fixme, engine, scratch); + if (err) + break; + } + + if (igt_flush_test(gt->i915)) + err = -EIO; + + i915_vma_unpin_and_release(&scratch, 0); +out_close: + kernel_context_close(fixme); + return err; +} + int intel_lrc_live_selftests(struct drm_i915_private *i915) { static const struct i915_subtest tests[] = { SUBTEST(live_lrc_layout), SUBTEST(live_lrc_state), + SUBTEST(live_gpr_clear), }; if (!HAS_LOGICAL_RING_CONTEXTS(i915)) -- 2.23.0 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply related [flat|nested] 5+ messages in thread
* ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915/selftests: Check known register values within the context 2019-10-10 15:49 [PATCH 1/2] drm/i915/selftests: Check known register values within the context Chris Wilson 2019-10-10 15:49 ` [PATCH 2/2] drm/i915/selftests: Check that GPR are cleared for new contexts Chris Wilson @ 2019-10-10 19:18 ` Patchwork 2019-10-11 9:00 ` ✗ Fi.CI.IGT: failure " Patchwork 2 siblings, 0 replies; 5+ messages in thread From: Patchwork @ 2019-10-10 19:18 UTC (permalink / raw) To: Chris Wilson; +Cc: intel-gfx == Series Details == Series: series starting with [1/2] drm/i915/selftests: Check known register values within the context URL : https://patchwork.freedesktop.org/series/67862/ State : success == Summary == CI Bug Log - changes from CI_DRM_7057 -> Patchwork_14754 ==================================================== Summary ------- **SUCCESS** No regressions found. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14754/index.html Known issues ------------ Here are the changes found in Patchwork_14754 that come from known issues: ### IGT changes ### #### Issues hit #### * igt@gem_mmap_gtt@basic-copy: - fi-icl-u3: [PASS][1] -> [DMESG-WARN][2] ([fdo#107724]) [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7057/fi-icl-u3/igt@gem_mmap_gtt@basic-copy.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14754/fi-icl-u3/igt@gem_mmap_gtt@basic-copy.html * igt@kms_frontbuffer_tracking@basic: - fi-hsw-peppy: [PASS][3] -> [DMESG-WARN][4] ([fdo#102614]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7057/fi-hsw-peppy/igt@kms_frontbuffer_tracking@basic.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14754/fi-hsw-peppy/igt@kms_frontbuffer_tracking@basic.html #### Possible fixes #### * igt@gem_flink_basic@double-flink: - fi-icl-u3: [DMESG-WARN][5] ([fdo#107724]) -> [PASS][6] +1 similar issue [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7057/fi-icl-u3/igt@gem_flink_basic@double-flink.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14754/fi-icl-u3/igt@gem_flink_basic@double-flink.html * igt@kms_chamelium@hdmi-hpd-fast: - fi-kbl-7500u: [FAIL][7] ([fdo#111045] / [fdo#111096]) -> [PASS][8] [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7057/fi-kbl-7500u/igt@kms_chamelium@hdmi-hpd-fast.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14754/fi-kbl-7500u/igt@kms_chamelium@hdmi-hpd-fast.html [fdo#102614]: https://bugs.freedesktop.org/show_bug.cgi?id=102614 [fdo#107724]: https://bugs.freedesktop.org/show_bug.cgi?id=107724 [fdo#111045]: https://bugs.freedesktop.org/show_bug.cgi?id=111045 [fdo#111096]: https://bugs.freedesktop.org/show_bug.cgi?id=111096 Participating hosts (52 -> 47) ------------------------------ Additional (2): fi-kbl-soraka fi-tgl-u2 Missing (7): fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-icl-y fi-byt-clapper fi-bdw-samus Build changes ------------- * CI: CI-20190529 -> None * Linux: CI_DRM_7057 -> Patchwork_14754 CI-20190529: 20190529 CI_DRM_7057: 15a100ce137c88af5eed22fa1deeb290e491629b @ git://anongit.freedesktop.org/gfx-ci/linux IGT_5220: 1e38e32d721210a780198c8293a6b8c8e881df68 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_14754: daf44ad5a4b0647879ec293ab8b83adb305b8bac @ git://anongit.freedesktop.org/gfx-ci/linux == Linux commits == daf44ad5a4b0 drm/i915/selftests: Check that GPR are cleared for new contexts 1bd3e9abe4fd drm/i915/selftests: Check known register values within the context == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14754/index.html _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 5+ messages in thread
* ✗ Fi.CI.IGT: failure for series starting with [1/2] drm/i915/selftests: Check known register values within the context 2019-10-10 15:49 [PATCH 1/2] drm/i915/selftests: Check known register values within the context Chris Wilson 2019-10-10 15:49 ` [PATCH 2/2] drm/i915/selftests: Check that GPR are cleared for new contexts Chris Wilson 2019-10-10 19:18 ` ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915/selftests: Check known register values within the context Patchwork @ 2019-10-11 9:00 ` Patchwork 2 siblings, 0 replies; 5+ messages in thread From: Patchwork @ 2019-10-11 9:00 UTC (permalink / raw) To: Chris Wilson; +Cc: intel-gfx == Series Details == Series: series starting with [1/2] drm/i915/selftests: Check known register values within the context URL : https://patchwork.freedesktop.org/series/67862/ State : failure == Summary == CI Bug Log - changes from CI_DRM_7057_full -> Patchwork_14754_full ==================================================== Summary ------- **FAILURE** Serious unknown changes coming with Patchwork_14754_full absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_14754_full, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. Possible new issues ------------------- Here are the unknown changes that may have been introduced in Patchwork_14754_full: ### IGT changes ### #### Possible regressions #### * igt@kms_atomic_transition@plane-toggle-modeset-transition: - shard-kbl: [PASS][1] -> [FAIL][2] [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7057/shard-kbl4/igt@kms_atomic_transition@plane-toggle-modeset-transition.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14754/shard-kbl7/igt@kms_atomic_transition@plane-toggle-modeset-transition.html #### Suppressed #### The following results come from untrusted machines, tests, or statuses. They do not affect the overall result. * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-mmap-wc: - {shard-tglb}: [PASS][3] -> [INCOMPLETE][4] +1 similar issue [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7057/shard-tglb6/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-mmap-wc.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14754/shard-tglb1/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-mmap-wc.html New tests --------- New tests have been introduced between CI_DRM_7057_full and Patchwork_14754_full: ### New Piglit tests (4) ### * spec@ext_transform_feedback@generatemipmap buffer: - Statuses : 1 incomplete(s) - Exec time: [0.0] s * spec@ext_transform_feedback@generatemipmap discard: - Statuses : 1 incomplete(s) - Exec time: [0.0] s * spec@ext_transform_feedback@generatemipmap prims_generated: - Statuses : 1 incomplete(s) - Exec time: [0.0] s * spec@ext_transform_feedback@generatemipmap prims_written: - Statuses : 1 incomplete(s) - Exec time: [0.0] s Known issues ------------ Here are the changes found in Patchwork_14754_full that come from known issues: ### IGT changes ### #### Issues hit #### * igt@gem_exec_schedule@preemptive-hang-bsd: - shard-iclb: [PASS][5] -> [SKIP][6] ([fdo#111325]) +6 similar issues [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7057/shard-iclb3/igt@gem_exec_schedule@preemptive-hang-bsd.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14754/shard-iclb1/igt@gem_exec_schedule@preemptive-hang-bsd.html * igt@gem_userptr_blits@map-fixed-invalidate-busy-gup: - shard-hsw: [PASS][7] -> [DMESG-WARN][8] ([fdo#111870]) [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7057/shard-hsw1/igt@gem_userptr_blits@map-fixed-invalidate-busy-gup.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14754/shard-hsw7/igt@gem_userptr_blits@map-fixed-invalidate-busy-gup.html * igt@gem_userptr_blits@sync-unmap-cycles: - shard-snb: [PASS][9] -> [DMESG-WARN][10] ([fdo#111870]) +1 similar issue [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7057/shard-snb6/igt@gem_userptr_blits@sync-unmap-cycles.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14754/shard-snb2/igt@gem_userptr_blits@sync-unmap-cycles.html * igt@kms_color@pipe-a-legacy-gamma-reset: - shard-apl: [PASS][11] -> [INCOMPLETE][12] ([fdo#103927]) [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7057/shard-apl3/igt@kms_color@pipe-a-legacy-gamma-reset.html [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14754/shard-apl2/igt@kms_color@pipe-a-legacy-gamma-reset.html * igt@kms_flip@absolute-wf_vblank: - shard-kbl: [PASS][13] -> [DMESG-WARN][14] ([fdo#103558] / [fdo#105602]) +2 similar issues [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7057/shard-kbl4/igt@kms_flip@absolute-wf_vblank.html [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14754/shard-kbl7/igt@kms_flip@absolute-wf_vblank.html * igt@kms_flip@flip-vs-expired-vblank-interruptible: - shard-glk: [PASS][15] -> [FAIL][16] ([fdo#105363]) +1 similar issue [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7057/shard-glk6/igt@kms_flip@flip-vs-expired-vblank-interruptible.html [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14754/shard-glk2/igt@kms_flip@flip-vs-expired-vblank-interruptible.html * igt@kms_flip@flip-vs-suspend: - shard-skl: [PASS][17] -> [INCOMPLETE][18] ([fdo#109507]) [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7057/shard-skl2/igt@kms_flip@flip-vs-suspend.html [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14754/shard-skl1/igt@kms_flip@flip-vs-suspend.html - shard-kbl: [PASS][19] -> [DMESG-WARN][20] ([fdo#103313]) [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7057/shard-kbl7/igt@kms_flip@flip-vs-suspend.html [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14754/shard-kbl4/igt@kms_flip@flip-vs-suspend.html * igt@kms_flip@flip-vs-suspend-interruptible: - shard-hsw: [PASS][21] -> [INCOMPLETE][22] ([fdo#103540]) [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7057/shard-hsw1/igt@kms_flip@flip-vs-suspend-interruptible.html [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14754/shard-hsw2/igt@kms_flip@flip-vs-suspend-interruptible.html * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-shrfb-draw-blt: - shard-iclb: [PASS][23] -> [FAIL][24] ([fdo#103167]) +5 similar issues [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7057/shard-iclb8/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-shrfb-draw-blt.html [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14754/shard-iclb8/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-shrfb-draw-blt.html * igt@kms_plane@plane-panning-bottom-right-suspend-pipe-b-planes: - shard-apl: [PASS][25] -> [DMESG-WARN][26] ([fdo#108566]) +4 similar issues [25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7057/shard-apl1/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-b-planes.html [26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14754/shard-apl7/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-b-planes.html * igt@kms_psr@no_drrs: - shard-iclb: [PASS][27] -> [FAIL][28] ([fdo#108341]) [27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7057/shard-iclb8/igt@kms_psr@no_drrs.html [28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14754/shard-iclb1/igt@kms_psr@no_drrs.html * igt@kms_psr@psr2_sprite_mmap_cpu: - shard-iclb: [PASS][29] -> [SKIP][30] ([fdo#109441]) +1 similar issue [29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7057/shard-iclb2/igt@kms_psr@psr2_sprite_mmap_cpu.html [30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14754/shard-iclb7/igt@kms_psr@psr2_sprite_mmap_cpu.html * igt@prime_vgem@fence-wait-bsd2: - shard-iclb: [PASS][31] -> [SKIP][32] ([fdo#109276]) +15 similar issues [31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7057/shard-iclb4/igt@prime_vgem@fence-wait-bsd2.html [32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14754/shard-iclb5/igt@prime_vgem@fence-wait-bsd2.html #### Possible fixes #### * igt@gem_ctx_shared@exec-single-timeline-bsd: - shard-iclb: [SKIP][33] ([fdo#110841]) -> [PASS][34] [33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7057/shard-iclb2/igt@gem_ctx_shared@exec-single-timeline-bsd.html [34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14754/shard-iclb6/igt@gem_ctx_shared@exec-single-timeline-bsd.html * igt@gem_exec_schedule@preempt-other-chain-bsd: - shard-iclb: [SKIP][35] ([fdo#111325]) -> [PASS][36] +8 similar issues [35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7057/shard-iclb1/igt@gem_exec_schedule@preempt-other-chain-bsd.html [36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14754/shard-iclb6/igt@gem_exec_schedule@preempt-other-chain-bsd.html * igt@gem_userptr_blits@map-fixed-invalidate-overlap-busy: - shard-snb: [DMESG-WARN][37] ([fdo#111870]) -> [PASS][38] +1 similar issue [37]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7057/shard-snb7/igt@gem_userptr_blits@map-fixed-invalidate-overlap-busy.html [38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14754/shard-snb6/igt@gem_userptr_blits@map-fixed-invalidate-overlap-busy.html * igt@gem_userptr_blits@sync-unmap-after-close: - shard-hsw: [DMESG-WARN][39] ([fdo#111870]) -> [PASS][40] [39]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7057/shard-hsw1/igt@gem_userptr_blits@sync-unmap-after-close.html [40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14754/shard-hsw4/igt@gem_userptr_blits@sync-unmap-after-close.html * igt@i915_selftest@live_hangcheck: - shard-snb: [INCOMPLETE][41] ([fdo#105411]) -> [PASS][42] +1 similar issue [41]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7057/shard-snb7/igt@i915_selftest@live_hangcheck.html [42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14754/shard-snb7/igt@i915_selftest@live_hangcheck.html * igt@i915_suspend@fence-restore-tiled2untiled: - shard-apl: [DMESG-WARN][43] ([fdo#108566]) -> [PASS][44] +6 similar issues [43]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7057/shard-apl1/igt@i915_suspend@fence-restore-tiled2untiled.html [44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14754/shard-apl7/igt@i915_suspend@fence-restore-tiled2untiled.html * igt@i915_suspend@fence-restore-untiled: - shard-kbl: [DMESG-WARN][45] ([fdo#103313]) -> [PASS][46] [45]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7057/shard-kbl4/igt@i915_suspend@fence-restore-untiled.html [46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14754/shard-kbl7/igt@i915_suspend@fence-restore-untiled.html * igt@kms_big_fb@x-tiled-16bpp-rotate-180: - shard-snb: [SKIP][47] ([fdo#109271]) -> [PASS][48] +2 similar issues [47]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7057/shard-snb2/igt@kms_big_fb@x-tiled-16bpp-rotate-180.html [48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14754/shard-snb1/igt@kms_big_fb@x-tiled-16bpp-rotate-180.html * igt@kms_cursor_crc@pipe-b-cursor-256x256-offscreen: - shard-skl: [FAIL][49] ([fdo#103232]) -> [PASS][50] [49]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7057/shard-skl9/igt@kms_cursor_crc@pipe-b-cursor-256x256-offscreen.html [50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14754/shard-skl6/igt@kms_cursor_crc@pipe-b-cursor-256x256-offscreen.html * igt@kms_cursor_crc@pipe-c-cursor-suspend: - shard-skl: [INCOMPLETE][51] ([fdo#110741]) -> [PASS][52] [51]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7057/shard-skl10/igt@kms_cursor_crc@pipe-c-cursor-suspend.html [52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14754/shard-skl7/igt@kms_cursor_crc@pipe-c-cursor-suspend.html * igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions: - shard-kbl: [DMESG-WARN][53] ([fdo#103558] / [fdo#105602]) -> [PASS][54] +10 similar issues [53]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7057/shard-kbl7/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html [54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14754/shard-kbl2/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html * igt@kms_flip_tiling@flip-changes-tiling-yf: - shard-skl: [FAIL][55] ([fdo#108303]) -> [PASS][56] [55]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7057/shard-skl5/igt@kms_flip_tiling@flip-changes-tiling-yf.html [56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14754/shard-skl4/igt@kms_flip_tiling@flip-changes-tiling-yf.html * igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-shrfb-draw-pwrite: - shard-iclb: [FAIL][57] ([fdo#103167]) -> [PASS][58] +5 similar issues [57]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7057/shard-iclb4/igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-shrfb-draw-pwrite.html [58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14754/shard-iclb5/igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-shrfb-draw-pwrite.html * igt@kms_frontbuffer_tracking@psr-suspend: - {shard-tglb}: [INCOMPLETE][59] ([fdo#111832]) -> [PASS][60] [59]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7057/shard-tglb8/igt@kms_frontbuffer_tracking@psr-suspend.html [60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14754/shard-tglb6/igt@kms_frontbuffer_tracking@psr-suspend.html * igt@kms_plane_alpha_blend@pipe-a-coverage-7efc: - shard-skl: [FAIL][61] ([fdo#108145]) -> [PASS][62] [61]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7057/shard-skl4/igt@kms_plane_alpha_blend@pipe-a-coverage-7efc.html [62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14754/shard-skl5/igt@kms_plane_alpha_blend@pipe-a-coverage-7efc.html * igt@kms_plane_alpha_blend@pipe-b-coverage-7efc: - shard-skl: [FAIL][63] ([fdo#108145] / [fdo#110403]) -> [PASS][64] [63]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7057/shard-skl9/igt@kms_plane_alpha_blend@pipe-b-coverage-7efc.html [64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14754/shard-skl6/igt@kms_plane_alpha_blend@pipe-b-coverage-7efc.html * igt@kms_psr2_su@page_flip: - shard-iclb: [SKIP][65] ([fdo#109642] / [fdo#111068]) -> [PASS][66] [65]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7057/shard-iclb3/igt@kms_psr2_su@page_flip.html [66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14754/shard-iclb2/igt@kms_psr2_su@page_flip.html * igt@kms_psr@dpms: - shard-iclb: [INCOMPLETE][67] ([fdo#107713]) -> [PASS][68] [67]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7057/shard-iclb7/igt@kms_psr@dpms.html [68]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14754/shard-iclb7/igt@kms_psr@dpms.html * igt@kms_psr@psr2_no_drrs: - shard-iclb: [SKIP][69] ([fdo#109441]) -> [PASS][70] +2 similar issues [69]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7057/shard-iclb6/igt@kms_psr@psr2_no_drrs.html [70]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14754/shard-iclb2/igt@kms_psr@psr2_no_drrs.html * igt@perf_pmu@cpu-hotplug: - shard-kbl: [TIMEOUT][71] ([fdo#111546] / [fdo#111800]) -> [PASS][72] [71]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7057/shard-kbl7/igt@perf_pmu@cpu-hotplug.html [72]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14754/shard-kbl4/igt@perf_pmu@cpu-hotplug.html * igt@prime_busy@hang-bsd2: - shard-iclb: [SKIP][73] ([fdo#109276]) -> [PASS][74] +17 similar issues [73]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7057/shard-iclb8/igt@prime_busy@hang-bsd2.html [74]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14754/shard-iclb1/igt@prime_busy@hang-bsd2.html #### Warnings #### * igt@gem_ctx_isolation@vcs1-nonpriv: - shard-iclb: [FAIL][75] ([fdo#111329]) -> [SKIP][76] ([fdo#109276]) [75]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7057/shard-iclb4/igt@gem_ctx_isolation@vcs1-nonpriv.html [76]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14754/shard-iclb5/igt@gem_ctx_isolation@vcs1-nonpriv.html * igt@kms_busy@extended-modeset-hang-oldfb-with-reset-render-f: - shard-kbl: [SKIP][77] ([fdo#109271] / [fdo#109278]) -> [SKIP][78] ([fdo#105602] / [fdo#109271] / [fdo#109278]) [77]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7057/shard-kbl4/igt@kms_busy@extended-modeset-hang-oldfb-with-reset-render-f.html [78]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14754/shard-kbl7/igt@kms_busy@extended-modeset-hang-oldfb-with-reset-render-f.html * igt@kms_dp_dsc@basic-dsc-enable-edp: - shard-iclb: [DMESG-WARN][79] ([fdo#107724]) -> [SKIP][80] ([fdo#109349]) [79]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7057/shard-iclb2/igt@kms_dp_dsc@basic-dsc-enable-edp.html [80]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14754/shard-iclb7/igt@kms_dp_dsc@basic-dsc-enable-edp.html * igt@kms_flip@flip-vs-suspend-interruptible: - shard-apl: [INCOMPLETE][81] ([fdo#103927]) -> [DMESG-WARN][82] ([fdo#108566]) [81]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7057/shard-apl7/igt@kms_flip@flip-vs-suspend-interruptible.html [82]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14754/shard-apl4/igt@kms_flip@flip-vs-suspend-interruptible.html * igt@kms_frontbuffer_tracking@fbc-2p-pri-indfb-multidraw: - shard-kbl: [SKIP][83] ([fdo#105602] / [fdo#109271]) -> [SKIP][84] ([fdo#109271]) +4 similar issues [83]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7057/shard-kbl7/igt@kms_frontbuffer_tracking@fbc-2p-pri-indfb-multidraw.html [84]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14754/shard-kbl2/igt@kms_frontbuffer_tracking@fbc-2p-pri-indfb-multidraw.html * igt@kms_frontbuffer_tracking@psr-1p-primscrn-cur-indfb-onoff: - shard-kbl: [INCOMPLETE][85] ([fdo#103665]) -> [SKIP][86] ([fdo#109271]) [85]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7057/shard-kbl7/igt@kms_frontbuffer_tracking@psr-1p-primscrn-cur-indfb-onoff.html [86]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14754/shard-kbl4/igt@kms_frontbuffer_tracking@psr-1p-primscrn-cur-indfb-onoff.html * igt@kms_frontbuffer_tracking@psr-2p-scndscrn-spr-indfb-draw-render: - shard-kbl: [SKIP][87] ([fdo#109271]) -> [SKIP][88] ([fdo#105602] / [fdo#109271]) +3 similar issues [87]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7057/shard-kbl4/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-spr-indfb-draw-render.html [88]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14754/shard-kbl7/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-spr-indfb-draw-render.html {name}: This element is suppressed. This means it is ignored when computing the status of the difference (SUCCESS, WARNING, or FAILURE). [fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167 [fdo#103232]: https://bugs.freedesktop.org/show_bug.cgi?id=103232 [fdo#103313]: https://bugs.freedesktop.org/show_bug.cgi?id=103313 [fdo#103540]: https://bugs.freedesktop.org/show_bug.cgi?id=103540 [fdo#103558]: https://bugs.freedesktop.org/show_bug.cgi?id=103558 [fdo#103665]: https://bugs.freedesktop.org/show_bug.cgi?id=103665 [fdo#103927]: https://bugs.freedesktop.org/show_bug.cgi?id=103927 [fdo#105363]: https://bugs.freedesktop.org/show_bug.cgi?id=105363 [fdo#105411]: https://bugs.freedesktop.org/show_bug.cgi?id=105411 [fdo#105602]: https://bugs.freedesktop.org/show_bug.cgi?id=105602 [fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713 [fdo#107724]: https://bugs.freedesktop.org/show_bug.cgi?id=107724 [fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145 [fdo#108303]: https://bugs.freedesktop.org/show_bug.cgi?id=108303 [fdo#108341]: https://bugs.freedesktop.org/show_bug.cgi?id=108341 [fdo#108566]: https://bugs.freedesktop.org/show_bug.cgi?id=108566 [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271 [fdo#109276]: https://bugs.freedesktop.org/show_bug.cgi?id=109276 [fdo#109278]: https://bugs.freedesktop.org/show_bug.cgi?id=109278 [fdo#109349]: https://bugs.freedesktop.org/show_bug.cgi?id=109349 [fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441 [fdo#109507]: https://bugs.freedesktop.org/show_bug.cgi?id=109507 [fdo#109642]: https://bugs.freedesktop.org/show_bug.cgi?id=109642 [fdo == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14754/index.html _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 5+ messages in thread
* [PATCH 1/2] drm/i915/selftests: Check known register values within the context @ 2019-10-10 13:15 Chris Wilson 2019-10-10 15:33 ` ✓ Fi.CI.BAT: success for series starting with [1/2] " Patchwork 0 siblings, 1 reply; 5+ messages in thread From: Chris Wilson @ 2019-10-10 13:15 UTC (permalink / raw) To: intel-gfx Check the logical ring context by asserting that the registers hold expected start during execution. (It's a bit chicken-and-egg for how could we manage to execute our request if the registers were not being updated. Still, it's nice to verify that the HW is working as expected.) Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> --- drivers/gpu/drm/i915/gt/selftest_lrc.c | 138 +++++++++++++++++++++++++ 1 file changed, 138 insertions(+) diff --git a/drivers/gpu/drm/i915/gt/selftest_lrc.c b/drivers/gpu/drm/i915/gt/selftest_lrc.c index a691e429ca01..def1e64aaf1c 100644 --- a/drivers/gpu/drm/i915/gt/selftest_lrc.c +++ b/drivers/gpu/drm/i915/gt/selftest_lrc.c @@ -2599,10 +2599,148 @@ static int live_lrc_layout(void *arg) return err; } +static int __live_lrc_state(struct i915_gem_context *fixme, + struct intel_engine_cs *engine, + struct i915_vma *scratch) +{ + struct intel_context *ce; + struct i915_request *rq; + enum { + RING_START_IDX = 0, + RING_HEAD_IDX, + RING_TAIL_IDX, + MAX_IDX + }; + u32 expected[MAX_IDX]; + u32 *cs; + int err; + int n; + + ce = intel_context_create(fixme, engine); + if (IS_ERR(ce)) + return PTR_ERR(ce); + + err = intel_context_pin(ce); + if (err) + goto err_put; + + rq = i915_request_create(ce); + if (IS_ERR(rq)) { + err = PTR_ERR(rq); + goto err_unpin; + } + + expected[RING_HEAD_IDX] = ce->ring->emit; + + cs = intel_ring_begin(rq, 4 * MAX_IDX); + if (IS_ERR(cs)) { + err = PTR_ERR(cs); + i915_request_add(rq); + goto err_unpin; + } + + *cs++ = MI_STORE_REGISTER_MEM_GEN8 | MI_USE_GGTT; + *cs++ = i915_mmio_reg_offset(RING_START(engine->mmio_base)); + *cs++ = i915_ggtt_offset(scratch) + RING_START_IDX * sizeof(u32); + *cs++ = 0; + + expected[RING_START_IDX] = i915_ggtt_offset(ce->ring->vma); + + *cs++ = MI_STORE_REGISTER_MEM_GEN8 | MI_USE_GGTT; + *cs++ = i915_mmio_reg_offset(RING_HEAD(engine->mmio_base)); + *cs++ = i915_ggtt_offset(scratch) + RING_HEAD_IDX * sizeof(u32); + *cs++ = 0; + + expected[RING_HEAD_IDX] += 6 * sizeof(u32); + if (engine->class == RENDER_CLASS) + expected[RING_HEAD_IDX] += 2 * sizeof(u32); + + *cs++ = MI_STORE_REGISTER_MEM_GEN8 | MI_USE_GGTT; + *cs++ = i915_mmio_reg_offset(RING_TAIL(engine->mmio_base)); + *cs++ = i915_ggtt_offset(scratch) + RING_TAIL_IDX * sizeof(u32); + *cs++ = 0; + + i915_request_get(rq); + i915_request_add(rq); + + intel_engine_flush_submission(engine); + expected[RING_TAIL_IDX] = ce->ring->tail; + + if (i915_request_wait(rq, 0, HZ / 5) < 0) { + err = -ETIME; + goto err_rq; + } + + cs = i915_gem_object_pin_map(scratch->obj, I915_MAP_WB); + if (IS_ERR(cs)) { + err = PTR_ERR(cs); + goto err_rq; + } + + for (n = 0; n < MAX_IDX; n++) { + if (cs[n] != expected[n]) { + pr_err("%s: Stored register[%d] value[0x%x] did not match expected[0x%x]\n", + engine->name, n, cs[n], expected[n]); + err = -EINVAL; + break; + } + } + + i915_gem_object_unpin_map(scratch->obj); + +err_rq: + i915_request_put(rq); +err_unpin: + intel_context_unpin(ce); +err_put: + intel_context_put(ce); + return err; +} + +static int live_lrc_state(void *arg) +{ + struct intel_gt *gt = arg; + struct intel_engine_cs *engine; + struct i915_gem_context *fixme; + struct i915_vma *scratch; + enum intel_engine_id id; + int err = 0; + + /* + * Check the live register state matches what we expect for this + * intel_context. + */ + + fixme = kernel_context(gt->i915); + if (!fixme) + return -ENOMEM; + + scratch = create_scratch(gt); + if (IS_ERR(scratch)) { + err = PTR_ERR(scratch); + goto out_close; + } + + for_each_engine(engine, gt->i915, id) { + err = __live_lrc_state(fixme, engine, scratch); + if (err) + break; + } + + if (igt_flush_test(gt->i915)) + err = -EIO; + + i915_vma_unpin_and_release(&scratch, 0); +out_close: + kernel_context_close(fixme); + return err; +} + int intel_lrc_live_selftests(struct drm_i915_private *i915) { static const struct i915_subtest tests[] = { SUBTEST(live_lrc_layout), + SUBTEST(live_lrc_state), }; if (!HAS_LOGICAL_RING_CONTEXTS(i915)) -- 2.23.0 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply related [flat|nested] 5+ messages in thread
* ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915/selftests: Check known register values within the context 2019-10-10 13:15 [PATCH 1/2] " Chris Wilson @ 2019-10-10 15:33 ` Patchwork 0 siblings, 0 replies; 5+ messages in thread From: Patchwork @ 2019-10-10 15:33 UTC (permalink / raw) To: Chris Wilson; +Cc: intel-gfx == Series Details == Series: series starting with [1/2] drm/i915/selftests: Check known register values within the context URL : https://patchwork.freedesktop.org/series/67849/ State : success == Summary == CI Bug Log - changes from CI_DRM_7055 -> Patchwork_14748 ==================================================== Summary ------- **SUCCESS** No regressions found. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14748/index.html Possible new issues ------------------- Here are the unknown changes that may have been introduced in Patchwork_14748: ### IGT changes ### #### Suppressed #### The following results come from untrusted machines, tests, or statuses. They do not affect the overall result. * {igt@i915_selftest@live_gt_lrc}: - fi-bdw-5557u: [PASS][1] -> [DMESG-FAIL][2] [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7055/fi-bdw-5557u/igt@i915_selftest@live_gt_lrc.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14748/fi-bdw-5557u/igt@i915_selftest@live_gt_lrc.html - fi-skl-6600u: [PASS][3] -> [DMESG-FAIL][4] [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7055/fi-skl-6600u/igt@i915_selftest@live_gt_lrc.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14748/fi-skl-6600u/igt@i915_selftest@live_gt_lrc.html - fi-cfl-8109u: [PASS][5] -> [DMESG-FAIL][6] [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7055/fi-cfl-8109u/igt@i915_selftest@live_gt_lrc.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14748/fi-cfl-8109u/igt@i915_selftest@live_gt_lrc.html - fi-kbl-r: [PASS][7] -> [DMESG-FAIL][8] [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7055/fi-kbl-r/igt@i915_selftest@live_gt_lrc.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14748/fi-kbl-r/igt@i915_selftest@live_gt_lrc.html - fi-skl-6260u: [PASS][9] -> [DMESG-FAIL][10] [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7055/fi-skl-6260u/igt@i915_selftest@live_gt_lrc.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14748/fi-skl-6260u/igt@i915_selftest@live_gt_lrc.html - {fi-icl-u4}: [PASS][11] -> [DMESG-FAIL][12] [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7055/fi-icl-u4/igt@i915_selftest@live_gt_lrc.html [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14748/fi-icl-u4/igt@i915_selftest@live_gt_lrc.html - fi-skl-6770hq: [PASS][13] -> [DMESG-FAIL][14] [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7055/fi-skl-6770hq/igt@i915_selftest@live_gt_lrc.html [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14748/fi-skl-6770hq/igt@i915_selftest@live_gt_lrc.html - fi-cfl-guc: [PASS][15] -> [DMESG-FAIL][16] [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7055/fi-cfl-guc/igt@i915_selftest@live_gt_lrc.html [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14748/fi-cfl-guc/igt@i915_selftest@live_gt_lrc.html - fi-skl-lmem: [PASS][17] -> [DMESG-FAIL][18] [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7055/fi-skl-lmem/igt@i915_selftest@live_gt_lrc.html [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14748/fi-skl-lmem/igt@i915_selftest@live_gt_lrc.html - {fi-tgl-u}: [PASS][19] -> [DMESG-FAIL][20] [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7055/fi-tgl-u/igt@i915_selftest@live_gt_lrc.html [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14748/fi-tgl-u/igt@i915_selftest@live_gt_lrc.html - fi-skl-iommu: [PASS][21] -> [DMESG-FAIL][22] [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7055/fi-skl-iommu/igt@i915_selftest@live_gt_lrc.html [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14748/fi-skl-iommu/igt@i915_selftest@live_gt_lrc.html - fi-cfl-8700k: [PASS][23] -> [DMESG-FAIL][24] [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7055/fi-cfl-8700k/igt@i915_selftest@live_gt_lrc.html [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14748/fi-cfl-8700k/igt@i915_selftest@live_gt_lrc.html - fi-icl-u2: [PASS][25] -> [DMESG-FAIL][26] [25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7055/fi-icl-u2/igt@i915_selftest@live_gt_lrc.html [26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14748/fi-icl-u2/igt@i915_selftest@live_gt_lrc.html - fi-whl-u: [PASS][27] -> [DMESG-FAIL][28] [27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7055/fi-whl-u/igt@i915_selftest@live_gt_lrc.html [28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14748/fi-whl-u/igt@i915_selftest@live_gt_lrc.html - fi-skl-guc: [PASS][29] -> [DMESG-FAIL][30] [29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7055/fi-skl-guc/igt@i915_selftest@live_gt_lrc.html [30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14748/fi-skl-guc/igt@i915_selftest@live_gt_lrc.html - fi-kbl-7500u: [PASS][31] -> [DMESG-FAIL][32] [31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7055/fi-kbl-7500u/igt@i915_selftest@live_gt_lrc.html [32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14748/fi-kbl-7500u/igt@i915_selftest@live_gt_lrc.html - fi-kbl-guc: [PASS][33] -> [DMESG-FAIL][34] [33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7055/fi-kbl-guc/igt@i915_selftest@live_gt_lrc.html [34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14748/fi-kbl-guc/igt@i915_selftest@live_gt_lrc.html - fi-kbl-8809g: [PASS][35] -> [DMESG-FAIL][36] [35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7055/fi-kbl-8809g/igt@i915_selftest@live_gt_lrc.html [36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14748/fi-kbl-8809g/igt@i915_selftest@live_gt_lrc.html - fi-glk-dsi: [PASS][37] -> [DMESG-FAIL][38] [37]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7055/fi-glk-dsi/igt@i915_selftest@live_gt_lrc.html [38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14748/fi-glk-dsi/igt@i915_selftest@live_gt_lrc.html - fi-kbl-x1275: [PASS][39] -> [DMESG-FAIL][40] [39]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7055/fi-kbl-x1275/igt@i915_selftest@live_gt_lrc.html [40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14748/fi-kbl-x1275/igt@i915_selftest@live_gt_lrc.html - {fi-cml-s}: [PASS][41] -> [DMESG-FAIL][42] [41]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7055/fi-cml-s/igt@i915_selftest@live_gt_lrc.html [42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14748/fi-cml-s/igt@i915_selftest@live_gt_lrc.html - fi-bsw-kefka: [PASS][43] -> [DMESG-FAIL][44] [43]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7055/fi-bsw-kefka/igt@i915_selftest@live_gt_lrc.html [44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14748/fi-bsw-kefka/igt@i915_selftest@live_gt_lrc.html - {fi-kbl-soraka}: [PASS][45] -> [DMESG-FAIL][46] [45]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7055/fi-kbl-soraka/igt@i915_selftest@live_gt_lrc.html [46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14748/fi-kbl-soraka/igt@i915_selftest@live_gt_lrc.html - fi-icl-u3: [PASS][47] -> [DMESG-FAIL][48] [47]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7055/fi-icl-u3/igt@i915_selftest@live_gt_lrc.html [48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14748/fi-icl-u3/igt@i915_selftest@live_gt_lrc.html - fi-bsw-n3050: [PASS][49] -> [DMESG-FAIL][50] [49]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7055/fi-bsw-n3050/igt@i915_selftest@live_gt_lrc.html [50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14748/fi-bsw-n3050/igt@i915_selftest@live_gt_lrc.html - fi-cml-u2: [PASS][51] -> [DMESG-FAIL][52] [51]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7055/fi-cml-u2/igt@i915_selftest@live_gt_lrc.html [52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14748/fi-cml-u2/igt@i915_selftest@live_gt_lrc.html - {fi-icl-guc}: [PASS][53] -> [DMESG-FAIL][54] [53]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7055/fi-icl-guc/igt@i915_selftest@live_gt_lrc.html [54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14748/fi-icl-guc/igt@i915_selftest@live_gt_lrc.html - fi-bxt-dsi: [PASS][55] -> [DMESG-FAIL][56] [55]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7055/fi-bxt-dsi/igt@i915_selftest@live_gt_lrc.html [56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14748/fi-bxt-dsi/igt@i915_selftest@live_gt_lrc.html - fi-skl-6700k2: [PASS][57] -> [DMESG-FAIL][58] [57]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7055/fi-skl-6700k2/igt@i915_selftest@live_gt_lrc.html [58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14748/fi-skl-6700k2/igt@i915_selftest@live_gt_lrc.html - fi-apl-guc: [PASS][59] -> [DMESG-FAIL][60] [59]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7055/fi-apl-guc/igt@i915_selftest@live_gt_lrc.html [60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14748/fi-apl-guc/igt@i915_selftest@live_gt_lrc.html - {fi-icl-dsi}: NOTRUN -> [DMESG-FAIL][61] [61]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14748/fi-icl-dsi/igt@i915_selftest@live_gt_lrc.html Known issues ------------ Here are the changes found in Patchwork_14748 that come from known issues: ### IGT changes ### #### Issues hit #### * igt@gem_exec_suspend@basic-s4-devices: - fi-blb-e6850: [PASS][62] -> [INCOMPLETE][63] ([fdo#107718]) [62]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7055/fi-blb-e6850/igt@gem_exec_suspend@basic-s4-devices.html [63]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14748/fi-blb-e6850/igt@gem_exec_suspend@basic-s4-devices.html * igt@gem_mmap_gtt@basic-write-cpu-read-gtt: - fi-icl-u3: [PASS][64] -> [DMESG-WARN][65] ([fdo#107724]) +1 similar issue [64]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7055/fi-icl-u3/igt@gem_mmap_gtt@basic-write-cpu-read-gtt.html [65]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14748/fi-icl-u3/igt@gem_mmap_gtt@basic-write-cpu-read-gtt.html * igt@kms_flip@basic-flip-vs-modeset: - fi-hsw-4770r: [PASS][66] -> [DMESG-WARN][67] ([fdo#105602]) [66]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7055/fi-hsw-4770r/igt@kms_flip@basic-flip-vs-modeset.html [67]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14748/fi-hsw-4770r/igt@kms_flip@basic-flip-vs-modeset.html #### Possible fixes #### * igt@gem_ctx_create@basic-files: - {fi-icl-dsi}: [INCOMPLETE][68] ([fdo#107713] / [fdo#109100]) -> [PASS][69] [68]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7055/fi-icl-dsi/igt@gem_ctx_create@basic-files.html [69]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14748/fi-icl-dsi/igt@gem_ctx_create@basic-files.html * igt@gem_flink_basic@double-flink: - fi-icl-u3: [DMESG-WARN][70] ([fdo#107724]) -> [PASS][71] +1 similar issue [70]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7055/fi-icl-u3/igt@gem_flink_basic@double-flink.html [71]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14748/fi-icl-u3/igt@gem_flink_basic@double-flink.html #### Warnings #### * igt@kms_chamelium@hdmi-hpd-fast: - fi-kbl-7500u: [FAIL][72] ([fdo#111045] / [fdo#111096]) -> [FAIL][73] ([fdo#111407]) [72]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7055/fi-kbl-7500u/igt@kms_chamelium@hdmi-hpd-fast.html [73]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14748/fi-kbl-7500u/igt@kms_chamelium@hdmi-hpd-fast.html {name}: This element is suppressed. This means it is ignored when computing the status of the difference (SUCCESS, WARNING, or FAILURE). [fdo#105602]: https://bugs.freedesktop.org/show_bug.cgi?id=105602 [fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713 [fdo#107718]: https://bugs.freedesktop.org/show_bug.cgi?id=107718 [fdo#107724]: https://bugs.freedesktop.org/show_bug.cgi?id=107724 [fdo#109100]: https://bugs.freedesktop.org/show_bug.cgi?id=109100 [fdo#111045]: https://bugs.freedesktop.org/show_bug.cgi?id=111045 [fdo#111096]: https://bugs.freedesktop.org/show_bug.cgi?id=111096 [fdo#111407]: https://bugs.freedesktop.org/show_bug.cgi?id=111407 [fdo#111736]: https://bugs.freedesktop.org/show_bug.cgi?id=111736 Participating hosts (54 -> 47) ------------------------------ Missing (7): fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-icl-y fi-byt-clapper fi-bdw-samus Build changes ------------- * CI: CI-20190529 -> None * Linux: CI_DRM_7055 -> Patchwork_14748 CI-20190529: 20190529 CI_DRM_7055: 4ce54ced67f9ebcf5acd540dc96c7f22fe7b4f8a @ git://anongit.freedesktop.org/gfx-ci/linux IGT_5220: 1e38e32d721210a780198c8293a6b8c8e881df68 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_14748: a9468255c7fdd1de7d38d4a88b76eb980603972b @ git://anongit.freedesktop.org/gfx-ci/linux == Linux commits == a9468255c7fd drm/i915/selftests: Check that GPR are cleared for new contexts e7c47c3ee024 drm/i915/selftests: Check known register values within the context == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14748/index.html _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 5+ messages in thread
end of thread, other threads:[~2019-10-11 9:00 UTC | newest] Thread overview: 5+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2019-10-10 15:49 [PATCH 1/2] drm/i915/selftests: Check known register values within the context Chris Wilson 2019-10-10 15:49 ` [PATCH 2/2] drm/i915/selftests: Check that GPR are cleared for new contexts Chris Wilson 2019-10-10 19:18 ` ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915/selftests: Check known register values within the context Patchwork 2019-10-11 9:00 ` ✗ Fi.CI.IGT: failure " Patchwork -- strict thread matches above, loose matches on Subject: below -- 2019-10-10 13:15 [PATCH 1/2] " Chris Wilson 2019-10-10 15:33 ` ✓ Fi.CI.BAT: success for series starting with [1/2] " Patchwork
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