[U-Boot] [PATCH 00/10] power: Add AVS class 0 support for AM6

[U-Boot] [PATCH 00/10] power: Add AVS class 0 support for AM6

[Keerthy]

Adaptive Voltage Scaling is a technology used in TI SoCs to optimize
the operating voltage based on characterization data written to efuse
during production.

Add support for Adaptive Voltage scaling class 0 support
for AM6 family of devices. Adaptive voltage scaling class 0
implies that optimized voltage values for a particular OPP
of a particular voltage domain are read from Efuse and programmed
on the pmic/regulator.

Tested on AM654-EVM for MPU @800 MHz.

Keerthy (2):
  arm: mach-k3: am6_init: Initialize AVS class 0
  clk: clk-ti-sci: Notify AVS driver upon setting clock rate

Tero Kristo (8):
  power: add driver for K3 Adaptive Voltage Scaling Class 0
  power: regulator: tps6236x: add support for tps6236x regulators
  arm: dts: k3-am65: Add VTM node
  arm: dts: k3-am654-r5-base-board: enable wkup_i2c0 driver for spl
  arm: dts: k3-am654-r5-base-board: add supply rail for MPU
  arm: dts: k3-am654-r5-base-board: enable wkup_vtm0 node and link in
    supplies
  configs: am65x_evm_r5_defconfig: Enable TPS62363 regulator support
  configs: am65x_evm_r5_defconfig: Enable AVS class 0 support

 arch/arm/dts/k3-am65-wakeup.dtsi             |   7 +
 arch/arm/dts/k3-am654-r5-base-board.dts      |  20 +
 arch/arm/mach-k3/am6_init.c                  |   6 +
 configs/am65x_evm_r5_defconfig               |   2 +
 drivers/Makefile                             |   2 +-
 drivers/clk/clk-ti-sci.c                     |   5 +
 drivers/power/Kconfig                        |   9 +
 drivers/power/mfd/Makefile                   |   1 +
 drivers/power/mfd/k3_avs.c                   | 371 +++++++++++++++++++
 drivers/power/regulator/Kconfig              |  10 +
 drivers/power/regulator/Makefile             |   1 +
 drivers/power/regulator/tps62360_regulator.c | 124 +++++++
 include/dm/uclass-id.h                       |   1 +
 include/k3-avs.h                             |  28 ++
 14 files changed, 586 insertions(+), 1 deletion(-)
 create mode 100644 drivers/power/mfd/k3_avs.c
 create mode 100644 drivers/power/regulator/tps62360_regulator.c
 create mode 100644 include/k3-avs.h

-- 
2.17.1

[U-Boot] [PATCH 01/10] power: add driver for K3 Adaptive Voltage Scaling Class 0

[Keerthy]

From: Tero Kristo <t-kristo@ti.com>

Adaptive Voltage Scaling is a technology used in TI SoCs to optimize
the operating voltage based on characterization data written to efuse
during production. Add a driver to support this feature for K3 line of
SoCs, initially for AM65x.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Keerthy <j-keerthy@ti.com>
---
 drivers/Makefile           |   2 +-
 drivers/power/Kconfig      |   9 +
 drivers/power/mfd/Makefile |   1 +
 drivers/power/mfd/k3_avs.c | 371 +++++++++++++++++++++++++++++++++++++
 include/dm/uclass-id.h     |   1 +
 include/k3-avs.h           |  28 +++
 6 files changed, 411 insertions(+), 1 deletion(-)
 create mode 100644 drivers/power/mfd/k3_avs.c
 create mode 100644 include/k3-avs.h

diff --git a/drivers/Makefile b/drivers/Makefile
index a4bb5e4975..4e2de903d3 100644
--- a/drivers/Makefile
+++ b/drivers/Makefile
@@ -38,7 +38,7 @@ obj-$(CONFIG_ARMADA_38X) += ddr/marvell/a38x/
 obj-$(CONFIG_ARMADA_XP) += ddr/marvell/axp/
 obj-$(CONFIG_$(SPL_)ALTERA_SDRAM) += ddr/altera/
 obj-$(CONFIG_ARCH_IMX8M) += ddr/imx/imx8m/
-obj-$(CONFIG_SPL_POWER_SUPPORT) += power/ power/pmic/
+obj-$(CONFIG_SPL_POWER_SUPPORT) += power/ power/pmic/ power/mfd/
 obj-$(CONFIG_SPL_POWER_SUPPORT) += power/regulator/
 obj-$(CONFIG_SPL_POWER_DOMAIN) += power/domain/
 obj-$(CONFIG_SPL_DM_RESET) += reset/
diff --git a/drivers/power/Kconfig b/drivers/power/Kconfig
index 9495dca33b..8e1c957e22 100644
--- a/drivers/power/Kconfig
+++ b/drivers/power/Kconfig
@@ -364,4 +364,13 @@ config TWL4030_POWER
 	The TWL4030 in a combination audio CODEC/power management with
 	GPIO and it is commonly used with the OMAP3 family of processors
 
+config K3_AVS0
+	depends on ARCH_K3 && SPL_DM_REGULATOR
+	bool "AVS class 0 support for K3 devices"
+	help
+	K3 devices have the optimized voltage values for the main voltage
+	domains stored in efuse within the VTM IP. This driver reads the
+	optimized voltage from the efuse, so that it can be programmed
+	to the PMIC on board.
+
 endmenu
diff --git a/drivers/power/mfd/Makefile b/drivers/power/mfd/Makefile
index a8eb7f81e7..54caed3f9c 100644
--- a/drivers/power/mfd/Makefile
+++ b/drivers/power/mfd/Makefile
@@ -6,3 +6,4 @@
 obj-$(CONFIG_POWER_PMIC_MAX77693) += pmic_max77693.o
 obj-$(CONFIG_POWER_MUIC_MAX77693) += muic_max77693.o
 obj-$(CONFIG_POWER_FG_MAX77693) += fg_max77693.o
+obj-$(CONFIG_K3_AVS0) += k3_avs.o
diff --git a/drivers/power/mfd/k3_avs.c b/drivers/power/mfd/k3_avs.c
new file mode 100644
index 0000000000..b3b704517a
--- /dev/null
+++ b/drivers/power/mfd/k3_avs.c
@@ -0,0 +1,371 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Texas Instruments' K3 Clas 0 Adaptive Voltage Scaling driver
+ *
+ * Copyright (C) 2019 Texas Instruments Incorporated - http://www.ti.com/
+ *      Tero Kristo <t-kristo@ti.com>
+ *
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <errno.h>
+#include <asm/io.h>
+#include <i2c.h>
+#include <k3-avs.h>
+#include <power/regulator.h>
+
+#define AM6_VTM_DEVINFO(i)	(priv->base + 0x100 + 0x20 * (i))
+#define AM6_VTM_OPPVID_VD(i)	(priv->base + 0x104 + 0x20 * (i))
+
+#define AM6_VTM_AVS0_SUPPORTED	BIT(12)
+
+#define AM6_VTM_OPP_SHIFT(opp)	(8 * (opp))
+#define AM6_VTM_OPP_MASK	0xff
+
+#define VD_FLAG_INIT_DONE	BIT(0)
+
+struct k3_avs_privdata {
+	void *base;
+	struct vd_config *vd_config;
+};
+
+struct opp {
+	u32 freq;
+	u32 volt;
+};
+
+struct vd_data {
+	int id;
+	u8 opp;
+	u8 flags;
+	int dev_id;
+	int clk_id;
+	struct opp opps[NUM_OPPS];
+	struct udevice *supply;
+};
+
+struct vd_config {
+	struct vd_data *vds;
+	u32 (*efuse_xlate)(struct k3_avs_privdata *priv, int idx, int opp);
+};
+
+static struct k3_avs_privdata *k3_avs_priv;
+
+/**
+ * am6_efuse_voltage: read efuse voltage from VTM
+ * @priv: driver private data
+ * @idx: VD to read efuse for
+ * @opp: opp id to read
+ *
+ * Reads efuse value for the specified OPP, and converts the register
+ * value to a voltage. Returns the voltage in uV, or 0 if nominal voltage
+ * should be used.
+ *
+ * Efuse val to volt conversion logic:
+ *
+ * val > 171 volt increments in 20mV steps with base 171 => 1.66V
+ * val between 115 to 11 increments in 10mV steps with base 115 => 1.1V
+ * val between 15 to 115 increments in 5mV steps with base 15 => .6V
+ * val between 1 to 15 increments in 20mv steps with base 0 => .3V
+ * val 0 is invalid
+ */
+static u32 am6_efuse_xlate(struct k3_avs_privdata *priv, int idx, int opp)
+{
+	u32 val = readl(AM6_VTM_OPPVID_VD(idx));
+
+	val >>= AM6_VTM_OPP_SHIFT(opp);
+	val &= AM6_VTM_OPP_MASK;
+
+	if (!val)
+		return 0;
+
+	if (val > 171)
+		return 1660000 + 20000 * (val - 171);
+
+	if (val > 115)
+		return 1100000 + 10000 * (val - 115);
+
+	if (val > 15)
+		return 600000 + 5000 * (val - 15);
+
+	return 300000 + 20000 * val;
+}
+
+static int k3_avs_program_voltage(struct k3_avs_privdata *priv,
+				  struct vd_data *vd,
+				  int opp_id)
+{
+	u32 volt = vd->opps[opp_id].volt;
+	struct vd_data *vd2;
+
+	if (!vd->supply)
+		return -ENODEV;
+
+	vd->opp = opp_id;
+	vd->flags |= VD_FLAG_INIT_DONE;
+
+	/* Take care of ganged rails and pick the Max amongst them*/
+	for (vd2 = priv->vd_config->vds; vd2->id >= 0; vd2++) {
+		if (vd == vd2)
+			continue;
+
+		if (vd2->supply != vd->supply)
+			continue;
+
+		if (vd2->opps[vd2->opp].volt > volt)
+			volt = vd2->opps[vd2->opp].volt;
+
+		vd2->flags |= VD_FLAG_INIT_DONE;
+	}
+
+	return regulator_set_value(vd->supply, volt);
+}
+
+static struct vd_data *get_vd(struct k3_avs_privdata *priv, int idx)
+{
+	struct vd_data *vd;
+
+	for (vd = priv->vd_config->vds; vd->id >= 0 && vd->id != idx; vd++)
+		;
+
+	if (vd->id < 0)
+		return NULL;
+
+	return vd;
+}
+
+/**
+ * k3_avs_set_opp: Sets the voltage for an arbitrary VD rail
+ * @dev: AVS device
+ * @vdd_id: voltage domain ID
+ * @opp_id: OPP ID
+ *
+ * Programs the desired OPP value for the defined voltage rail. This
+ * should be called from board files if reconfiguration is desired.
+ * Returns 0 on success, negative error value on failure.
+ */
+int k3_avs_set_opp(struct udevice *dev, int vdd_id, int opp_id)
+{
+	struct k3_avs_privdata *priv = dev_get_priv(dev);
+	struct vd_data *vd;
+
+	vd = get_vd(priv, vdd_id);
+	if (!vd)
+		return -EINVAL;
+
+	return k3_avs_program_voltage(priv, vd, opp_id);
+}
+
+static int match_opp(struct vd_data *vd, u32 freq)
+{
+	struct opp *opp;
+	int opp_id;
+
+	for (opp_id = 0; opp_id < NUM_OPPS; opp_id++) {
+		opp = &vd->opps[opp_id];
+		if (opp->freq == freq)
+			return opp_id;
+	}
+
+	printf("No matching OPP found for freq %d.\n", freq);
+
+	return -EINVAL;
+}
+
+/**
+ * k3_avs_notify_freq: Notify clock rate change towards AVS subsystem
+ * @dev_id: Device ID for the clock to be changed
+ * @clk_id: Clock ID for the clock to be changed
+ * @freq: New frequency for clock
+ *
+ * Checks if the provided clock is the MPU clock or not, if not, return
+ * immediately. If MPU clock is provided, maps the provided MPU frequency
+ * towards an MPU OPP, and programs the voltage to the regulator. Return 0
+ * on success, negative error value on failure.
+ */
+int k3_avs_notify_freq(int dev_id, int clk_id, u32 freq)
+{
+	int opp_id;
+	struct k3_avs_privdata *priv = k3_avs_priv;
+	struct vd_data *vd;
+
+	for (vd = priv->vd_config->vds; vd->id >= 0; vd++) {
+		if (vd->dev_id != dev_id || vd->clk_id != clk_id)
+			continue;
+
+		opp_id = match_opp(vd, freq);
+		if (opp_id < 0)
+			return opp_id;
+
+		vd->opp = opp_id;
+		return k3_avs_program_voltage(priv, vd, opp_id);
+	}
+
+	return -EINVAL;
+}
+
+static int k3_avs_configure(struct udevice *dev, struct k3_avs_privdata *priv)
+{
+	struct vd_config *conf;
+	int ret;
+	char pname[20];
+	struct vd_data *vd;
+
+	conf = (void *)dev_get_driver_data(dev);
+
+	priv->vd_config = conf;
+
+	for (vd = conf->vds; vd->id >= 0; vd++) {
+		sprintf(pname, "vdd-supply-%d", vd->id);
+		ret = device_get_supply_regulator(dev, pname, &vd->supply);
+		if (ret)
+			dev_warn(dev, "supply not found for VD%d.\n", vd->id);
+
+		sprintf(pname, "ti,default-opp-%d", vd->id);
+		ret = dev_read_u32_default(dev, pname, -1);
+		if (ret != -1)
+			vd->opp = ret;
+	}
+
+	return 0;
+}
+
+/**
+ * k3_avs_probe: parses VD info from VTM, and re-configures the OPP data
+ *
+ * Parses all VDs on a device calculating the AVS class-0 voltages for them,
+ * and updates the vd_data based on this. The vd_data itself shall be used
+ * to program the required OPPs later on. Returns 0 on success, negative
+ * error value on failure.
+ */
+static int k3_avs_probe(struct udevice *dev)
+{
+	int opp_id;
+	u32 volt;
+	struct opp *opp;
+	struct k3_avs_privdata *priv;
+	struct vd_data *vd;
+	int ret;
+
+	priv = dev_get_priv(dev);
+
+	k3_avs_priv = priv;
+
+	ret = k3_avs_configure(dev, priv);
+	if (ret)
+		return ret;
+
+	priv->base = dev_read_addr_ptr(dev);
+	if (!priv->base)
+		return -ENODEV;
+
+	for (vd = priv->vd_config->vds; vd->id >= 0; vd++) {
+		if (!(readl(AM6_VTM_DEVINFO(vd->id)) &
+		      AM6_VTM_AVS0_SUPPORTED)) {
+			dev_warn(dev, "AVS-class 0 not supported for VD%d\n",
+				 vd->id);
+			continue;
+		}
+
+		for (opp_id = 0; opp_id < NUM_OPPS; opp_id++) {
+			opp = &vd->opps[opp_id];
+
+			if (!opp->freq)
+				continue;
+
+			volt = priv->vd_config->efuse_xlate(priv, vd->id,
+							    opp_id);
+			if (volt)
+				opp->volt = volt;
+		}
+	}
+
+	for (vd = priv->vd_config->vds; vd->id >= 0; vd++) {
+		if (vd->flags & VD_FLAG_INIT_DONE)
+			continue;
+
+		k3_avs_program_voltage(priv, vd, vd->opp);
+	}
+
+	return 0;
+}
+
+static struct vd_data am654_vd_data[] = {
+	{
+		.id = AM6_VDD_CORE,
+		.dev_id = 82, /* AM6_DEV_CBASS0 */
+		.clk_id = 0, /* main sysclk0 */
+		.opp = AM6_OPP_NOM,
+		.opps = {
+			[AM6_OPP_NOM] = {
+				.volt = 1000000,
+				.freq = 250000000, /* CBASS0 */
+			},
+		},
+	},
+	{
+		.id = AM6_VDD_MPU0,
+		.dev_id = 202, /* AM6_DEV_COMPUTE_CLUSTER_A53_0 */
+		.clk_id = 0, /* ARM clock */
+		.opp = AM6_OPP_NOM,
+		.opps = {
+			[AM6_OPP_NOM] = {
+				.volt = 1000000,
+				.freq = 800000000,
+			},
+			[AM6_OPP_OD] = {
+				.volt = 1100000,
+				.freq = 1000000000,
+			},
+			[AM6_OPP_TURBO] = {
+				.volt = 1220000,
+				.freq = 1100000000,
+			},
+		},
+	},
+	{
+		.id = AM6_VDD_MPU1,
+		.opp = AM6_OPP_NOM,
+		.dev_id = 204, /* AM6_DEV_COMPUTE_CLUSTER_A53_2 */
+		.clk_id = 0, /* ARM clock */
+		.opps = {
+			[AM6_OPP_NOM] = {
+				.volt = 1000000,
+				.freq = 800000000,
+			},
+			[AM6_OPP_OD] = {
+				.volt = 1100000,
+				.freq = 1000000000,
+			},
+			[AM6_OPP_TURBO] = {
+				.volt = 1220000,
+				.freq = 1100000000,
+			},
+		},
+	},
+	{ .id = -1 },
+};
+
+static struct vd_config am654_vd_config = {
+	.efuse_xlate = am6_efuse_xlate,
+	.vds = am654_vd_data,
+};
+
+static const struct udevice_id k3_avs_ids[] = {
+	{ .compatible = "ti,am654-avs", .data = (ulong)&am654_vd_config },
+	{}
+};
+
+U_BOOT_DRIVER(k3_avs) = {
+	.name = "k3_avs",
+	.of_match = k3_avs_ids,
+	.id = UCLASS_AVS,
+	.probe = k3_avs_probe,
+	.priv_auto_alloc_size = sizeof(struct k3_avs_privdata),
+};
+
+UCLASS_DRIVER(avs) = {
+	.id = UCLASS_AVS,
+	.name = "avs",
+};
diff --git a/include/dm/uclass-id.h b/include/dm/uclass-id.h
index f431f3bf29..605b52905e 100644
--- a/include/dm/uclass-id.h
+++ b/include/dm/uclass-id.h
@@ -31,6 +31,7 @@ enum uclass_id {
 	UCLASS_ADC,		/* Analog-to-digital converter */
 	UCLASS_AHCI,		/* SATA disk controller */
 	UCLASS_AUDIO_CODEC,	/* Audio codec with control and data path */
+	UCLASS_AVS,		/* Adaptive voltage scaling */
 	UCLASS_AXI,		/* AXI bus */
 	UCLASS_BLK,		/* Block device */
 	UCLASS_BOARD,		/* Device information from hardware */
diff --git a/include/k3-avs.h b/include/k3-avs.h
new file mode 100644
index 0000000000..9867481617
--- /dev/null
+++ b/include/k3-avs.h
@@ -0,0 +1,28 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Texas Instruments' K3 Adaptive Voltage Scaling driver
+ *
+ * Copyright (C) 2019 Texas Instruments Incorporated - http://www.ti.com/
+ *      Tero Kristo <t-kristo@ti.com>
+ *
+ */
+
+#ifndef _K3_AVS0_
+#define _K3_AVS0_
+
+#define AM6_VDD_WKUP		0
+#define AM6_VDD_MCU		1
+#define AM6_VDD_CORE		2
+#define AM6_VDD_MPU0		3
+#define AM6_VDD_MPU1		4
+
+#define NUM_OPPS		4
+
+#define AM6_OPP_NOM		1
+#define AM6_OPP_OD		2
+#define AM6_OPP_TURBO		3
+
+int k3_avs_set_opp(struct udevice *dev, int vdd_id, int opp_id);
+int k3_avs_notify_freq(int dev_id, int clk_id, u32 freq);
+
+#endif
-- 
2.17.1

[U-Boot] [PATCH 02/10] arm: mach-k3: am6_init: Initialize AVS class 0

[Keerthy]

Initialize AVS class 0 so that mpu voltage rail is
programmed to the AVS class 0 compensated value.

Signed-off-by: Keerthy <j-keerthy@ti.com>
---
 arch/arm/mach-k3/am6_init.c | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/arch/arm/mach-k3/am6_init.c b/arch/arm/mach-k3/am6_init.c
index 0b564f7bd1..86395a72b9 100644
--- a/arch/arm/mach-k3/am6_init.c
+++ b/arch/arm/mach-k3/am6_init.c
@@ -116,6 +116,12 @@ void board_init_f(ulong dummy)
 	/* Perform EEPROM-based board detection */
 	do_board_detect();
 
+#if defined(CONFIG_CPU_V7R) && defined(CONFIG_K3_AVS0)
+	ret = uclass_get_device(UCLASS_AVS, 0, &dev);
+	if (ret)
+		printf("AVS init failed: %d\n", ret);
+#endif
+
 #ifdef CONFIG_K3_AM654_DDRSS
 	ret = uclass_get_device(UCLASS_RAM, 0, &dev);
 	if (ret)
-- 
2.17.1

[U-Boot] [PATCH 03/10] clk: clk-ti-sci: Notify AVS driver upon setting clock rate

[Keerthy]

Notify AVS driver upon setting clock rate so that voltage
is changed accordingly.

Signed-off-by: Keerthy <j-keerthy@ti.com>
---
 drivers/clk/clk-ti-sci.c | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/drivers/clk/clk-ti-sci.c b/drivers/clk/clk-ti-sci.c
index c25415d410..478349f22f 100644
--- a/drivers/clk/clk-ti-sci.c
+++ b/drivers/clk/clk-ti-sci.c
@@ -13,6 +13,7 @@
 #include <errno.h>
 #include <clk-uclass.h>
 #include <linux/soc/ti/ti_sci_protocol.h>
+#include <k3-avs.h>
 
 /**
  * struct ti_sci_clk_data - clock controller information structure
@@ -101,6 +102,10 @@ static ulong ti_sci_clk_set_rate(struct clk *clk, ulong rate)
 
 	debug("%s(clk=%p, rate=%lu)\n", __func__, clk, rate);
 
+#ifdef CONFIG_K3_AVS0
+	k3_avs_notify_freq(clk->id, clk->data, rate);
+#endif
+
 	/* Ask for exact frequency by using same value for min/target/max */
 	ret = cops->set_freq(sci, clk->id, clk->data, rate, rate, rate);
 	if (ret)
-- 
2.17.1

[U-Boot] [PATCH 04/10] power: regulator: tps6236x: add support for tps6236x regulators

[Keerthy]

From: Tero Kristo <t-kristo@ti.com>

TPS6236x is a family of step down DC-DC converters optimized for battery
powered portable applications for a small solution size. Add a regulator
driver for supporting these devices.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Keerthy <j-keerthy@ti.com>
---
 drivers/power/regulator/Kconfig              |  10 ++
 drivers/power/regulator/Makefile             |   1 +
 drivers/power/regulator/tps62360_regulator.c | 123 +++++++++++++++++++
 3 files changed, 134 insertions(+)
 create mode 100644 drivers/power/regulator/tps62360_regulator.c

diff --git a/drivers/power/regulator/Kconfig b/drivers/power/regulator/Kconfig
index 9aa00fad42..56d68ee40e 100644
--- a/drivers/power/regulator/Kconfig
+++ b/drivers/power/regulator/Kconfig
@@ -273,6 +273,16 @@ config DM_REGULATOR_TPS65910
 	regulator types of the TPS65910 (BUCK, BOOST and LDO). It implements
 	the get/set api for value and enable.
 
+config DM_REGULATOR_TPS62360
+	bool "Enable driver for TPS6236x Power Regulator"
+	depends on DM_REGULATOR
+	help
+	The TPS6236X DC/DC step down converter provides a single output
+	power line peaking at 3A current. This driver supports all four
+	variants of the chip (TPS62360, TPS62361, TPS62362, TPS62363). It
+	implements the get/set api for value only, as the power line is
+	always on.
+
 config DM_REGULATOR_STPMIC1
 	bool "Enable driver for STPMIC1 regulators"
 	depends on DM_REGULATOR && PMIC_STPMIC1
diff --git a/drivers/power/regulator/Makefile b/drivers/power/regulator/Makefile
index 6a3d4bbee4..9198841b4f 100644
--- a/drivers/power/regulator/Makefile
+++ b/drivers/power/regulator/Makefile
@@ -26,4 +26,5 @@ obj-$(CONFIG_$(SPL_)DM_REGULATOR_LP873X) += lp873x_regulator.o
 obj-$(CONFIG_$(SPL_)DM_REGULATOR_LP87565) += lp87565_regulator.o
 obj-$(CONFIG_$(SPL_)DM_REGULATOR_STM32_VREFBUF) += stm32-vrefbuf.o
 obj-$(CONFIG_DM_REGULATOR_TPS65910) += tps65910_regulator.o
+obj-$(CONFIG_DM_REGULATOR_TPS62360) += tps62360_regulator.o
 obj-$(CONFIG_$(SPL_)DM_REGULATOR_STPMIC1) += stpmic1.o
diff --git a/drivers/power/regulator/tps62360_regulator.c b/drivers/power/regulator/tps62360_regulator.c
new file mode 100644
index 0000000000..3b123f503c
--- /dev/null
+++ b/drivers/power/regulator/tps62360_regulator.c
@@ -0,0 +1,123 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2019 Texas Instruments Incorporated - http://www.ti.com/
+ *      Tero Kristo <t-kristo@ti.com>
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <i2c.h>
+#include <power/regulator.h>
+
+#define TPS62360_REG_SET0	0
+
+#define TPS62360_I2C_CHIP	0x60
+
+#define TPS62360_VSEL_STEPSIZE	10000 /* In uV */
+
+struct tps62360_regulator_config {
+	u32 vmin;
+	u32 vmax;
+};
+
+struct tps62360_regulator_pdata {
+	u8 vsel_offset;
+	struct udevice *i2c;
+	struct tps62360_regulator_config *config;
+};
+
+/*
+ * TPS62362/TPS62363 are just re-using these values for now, their preset
+ * voltage values are just different compared to TPS62360/TPS62361.
+ */
+static struct tps62360_regulator_config tps62360_data = {
+	.vmin = 770000,
+	.vmax = 1400000,
+};
+
+static struct tps62360_regulator_config tps62361_data = {
+	.vmin = 500000,
+	.vmax = 1770000,
+};
+
+static int tps62360_regulator_set_value(struct udevice *dev, int uV)
+{
+	struct tps62360_regulator_pdata *pdata = dev_get_platdata(dev);
+	u8 regval;
+
+	if (uV < pdata->config->vmin || uV > pdata->config->vmax)
+		return -EINVAL;
+
+	uV -= pdata->config->vmin;
+
+	uV = DIV_ROUND_UP(uV, TPS62360_VSEL_STEPSIZE);
+
+	if (uV > U8_MAX)
+		return -EINVAL;
+
+	regval = (u8)uV;
+
+	return dm_i2c_write(pdata->i2c, TPS62360_REG_SET0 + pdata->vsel_offset,
+			    &regval, 1);
+}
+
+static int tps62360_regulator_get_value(struct udevice *dev)
+{
+	u8 regval;
+	int ret;
+	struct tps62360_regulator_pdata *pdata = dev_get_platdata(dev);
+
+	ret = dm_i2c_read(pdata->i2c, TPS62360_REG_SET0 + pdata->vsel_offset,
+			  &regval, 1);
+	if (ret) {
+		dev_err(dev, "i2c read failed: %d\n", ret);
+		return ret;
+	}
+
+	return (u32)regval * TPS62360_VSEL_STEPSIZE + pdata->config->vmin;
+}
+
+static int tps62360_regulator_ofdata_to_platdata(struct udevice *dev)
+{
+	struct tps62360_regulator_pdata *pdata = dev_get_platdata(dev);
+	u8 vsel0;
+	u8 vsel1;
+	int ret;
+
+	pdata->config = (void *)dev_get_driver_data(dev);
+
+	vsel0 = dev_read_bool(dev, "ti,vsel0-state-high");
+	vsel1 = dev_read_bool(dev, "ti,vsel1-state-high");
+
+	pdata->vsel_offset = vsel0 + vsel1 * 2;
+
+	ret = i2c_get_chip(dev->parent, TPS62360_I2C_CHIP, 1, &pdata->i2c);
+	if (ret) {
+		dev_err(dev, "i2c dev get failed.\n");
+		return ret;
+	}
+
+	return 0;
+}
+
+static const struct dm_regulator_ops tps62360_regulator_ops = {
+	.get_value  = tps62360_regulator_get_value,
+	.set_value  = tps62360_regulator_set_value,
+};
+
+static const struct udevice_id tps62360_regulator_ids[] = {
+	{ .compatible = "ti,tps62360", .data = (ulong)&tps62360_data },
+	{ .compatible = "ti,tps62361", .data = (ulong)&tps62361_data },
+	{ .compatible = "ti,tps62362", .data = (ulong)&tps62360_data },
+	{ .compatible = "ti,tps62363", .data = (ulong)&tps62361_data },
+	{ },
+};
+
+U_BOOT_DRIVER(tps62360_regulator) = {
+	.name = "tps62360_regulator",
+	.id = UCLASS_REGULATOR,
+	.ops = &tps62360_regulator_ops,
+	.of_match = tps62360_regulator_ids,
+	.platdata_auto_alloc_size = sizeof(struct tps62360_regulator_pdata),
+	.ofdata_to_platdata = tps62360_regulator_ofdata_to_platdata,
+};
-- 
2.17.1

[U-Boot] [PATCH 05/10] arm: dts: k3-am65: Add VTM node

[Keerthy]

From: Tero Kristo <t-kristo@ti.com>

Add VTM node for voltage and thermal management. For u-boot, this is needed
for supporting AVS class 0, as the efuse values for the OPPs are stored
under the VTM.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Keerthy <j-keerthy@ti.com>
---
 arch/arm/dts/k3-am65-wakeup.dtsi | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/arch/arm/dts/k3-am65-wakeup.dtsi b/arch/arm/dts/k3-am65-wakeup.dtsi
index 2676d6035b..5d050c6fd8 100644
--- a/arch/arm/dts/k3-am65-wakeup.dtsi
+++ b/arch/arm/dts/k3-am65-wakeup.dtsi
@@ -62,4 +62,11 @@
 		clocks = <&k3_clks 115 1>;
 		power-domains = <&k3_pds 115 TI_SCI_PD_EXCLUSIVE>;
 	};
+
+	wkup_vtm0: wkup_vtm at 42050000 {
+		compatible = "ti,am654-vtm", "ti,am654-avs";
+		reg = <0x42050000 0x25c>;
+		power-domains = <&k3_pds 80>;
+		#thermal-sensor-cells = <1>;
+	};
 };
-- 
2.17.1

[U-Boot] [PATCH 06/10] arm: dts: k3-am654-r5-base-board: enable wkup_i2c0 driver for spl

[Keerthy]

From: Tero Kristo <t-kristo@ti.com>

Enable wkup_i2c0 as this is needed for voltage control.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Keerthy <j-keerthy@ti.com>
---
 arch/arm/dts/k3-am654-r5-base-board.dts | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm/dts/k3-am654-r5-base-board.dts b/arch/arm/dts/k3-am654-r5-base-board.dts
index e31ed4fe64..a2c6c5a49d 100644
--- a/arch/arm/dts/k3-am654-r5-base-board.dts
+++ b/arch/arm/dts/k3-am654-r5-base-board.dts
@@ -211,4 +211,5 @@
 	pinctrl-names = "default";
 	pinctrl-0 = <&wkup_i2c0_pins_default>;
 	clock-frequency = <400000>;
+	u-boot,dm-spl;
 };
-- 
2.17.1

[U-Boot] [PATCH 07/10] arm: dts: k3-am654-r5-base-board: add supply rail for MPU

[Keerthy]

From: Tero Kristo <t-kristo@ti.com>

MPU voltage on AM65x-evm is controlled via the TPS62363 chip attached
to i2c0 bus. Add device node for this so that it can be controlled via
a regulator driver.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Keerthy <j-keerthy@ti.com>
---
 arch/arm/dts/k3-am654-r5-base-board.dts | 13 +++++++++++++
 1 file changed, 13 insertions(+)

diff --git a/arch/arm/dts/k3-am654-r5-base-board.dts b/arch/arm/dts/k3-am654-r5-base-board.dts
index a2c6c5a49d..d6bd5def59 100644
--- a/arch/arm/dts/k3-am654-r5-base-board.dts
+++ b/arch/arm/dts/k3-am654-r5-base-board.dts
@@ -212,4 +212,17 @@
 	pinctrl-0 = <&wkup_i2c0_pins_default>;
 	clock-frequency = <400000>;
 	u-boot,dm-spl;
+
+	vdd_mpu: tps62363 at 60 {
+		compatible = "ti,tps62363";
+		reg = <0x60>;
+		regulator-name = "VDD_MPU";
+		regulator-min-microvolt = <500000>;
+		regulator-max-microvolt = <1770000>;
+		regulator-always-on;
+		regulator-boot-on;
+		ti,vsel0-state-high;
+		ti,vsel1-state-high;
+		u-boot,dm-spl;
+	};
 };
-- 
2.17.1

[U-Boot] [PATCH 08/10] arm: dts: k3-am654-r5-base-board: enable wkup_vtm0 node and link in supplies

[Keerthy]

From: Tero Kristo <t-kristo@ti.com>

Link the vdd-supplies for the voltage domains under the VTM node. Also,
enable the node under SPL. This will enable the AVS class 0 support on
am65x-evm board.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Keerthy <j-keerthy@ti.com>
---
 arch/arm/dts/k3-am654-r5-base-board.dts | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/arch/arm/dts/k3-am654-r5-base-board.dts b/arch/arm/dts/k3-am654-r5-base-board.dts
index d6bd5def59..0d924d0aae 100644
--- a/arch/arm/dts/k3-am654-r5-base-board.dts
+++ b/arch/arm/dts/k3-am654-r5-base-board.dts
@@ -131,6 +131,12 @@
 	power-domains = <&k3_pds 146 TI_SCI_PD_SHARED>;
 };
 
+&wkup_vtm0 {
+	vdd-supply-3 = <&vdd_mpu>;
+	vdd-supply-4 = <&vdd_mpu>;
+	u-boot,dm-spl;
+};
+
 &wkup_pmx0 {
 	u-boot,dm-spl;
 	wkup_uart0_pins_default: wkup_uart0_pins_default {
-- 
2.17.1

[U-Boot] [PATCH 09/10] configs: am65x_evm_r5_defconfig: Enable TPS62363 regulator support

[Keerthy]

From: Tero Kristo <t-kristo@ti.com>

TPS62363 is used to control the MPU_VDD voltage, so enable the driver
for this.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Keerthy <j-keerthy@ti.com>
---
 configs/am65x_evm_r5_defconfig | 1 +
 1 file changed, 1 insertion(+)

diff --git a/configs/am65x_evm_r5_defconfig b/configs/am65x_evm_r5_defconfig
index d0619e9b7a..a721b24ba4 100644
--- a/configs/am65x_evm_r5_defconfig
+++ b/configs/am65x_evm_r5_defconfig
@@ -84,6 +84,7 @@ CONFIG_DM_REGULATOR=y
 CONFIG_SPL_DM_REGULATOR=y
 CONFIG_DM_REGULATOR_GPIO=y
 CONFIG_SPL_DM_REGULATOR_GPIO=y
+CONFIG_DM_REGULATOR_TPS62360=y
 CONFIG_RAM=y
 CONFIG_SPL_RAM=y
 CONFIG_K3_SYSTEM_CONTROLLER=y
-- 
2.17.1

[U-Boot] [PATCH 10/10] configs: am65x_evm_r5_defconfig: Enable AVS class 0 support

[Keerthy]

From: Tero Kristo <t-kristo@ti.com>

Enable AVS class 0 support for the R5 SPL bootloader.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Keerthy <j-keerthy@ti.com>
---
 configs/am65x_evm_r5_defconfig | 1 +
 1 file changed, 1 insertion(+)

diff --git a/configs/am65x_evm_r5_defconfig b/configs/am65x_evm_r5_defconfig
index a721b24ba4..4f122808de 100644
--- a/configs/am65x_evm_r5_defconfig
+++ b/configs/am65x_evm_r5_defconfig
@@ -99,3 +99,4 @@ CONFIG_TIMER=y
 CONFIG_SPL_TIMER=y
 CONFIG_OMAP_TIMER=y
 CONFIG_FS_FAT_MAX_CLUSTSIZE=16384
+CONFIG_K3_AVS0=y
-- 
2.17.1

[U-Boot] [PATCH 01/10] power: add driver for K3 Adaptive Voltage Scaling Class 0

[Lokesh Vutla]

[..snip..]

> +};
> diff --git a/include/dm/uclass-id.h b/include/dm/uclass-id.h
> index f431f3bf29..605b52905e 100644
> --- a/include/dm/uclass-id.h
> +++ b/include/dm/uclass-id.h
> @@ -31,6 +31,7 @@ enum uclass_id {
>  	UCLASS_ADC,		/* Analog-to-digital converter */
>  	UCLASS_AHCI,		/* SATA disk controller */
>  	UCLASS_AUDIO_CODEC,	/* Audio codec with control and data path */
> +	UCLASS_AVS,		/* Adaptive voltage scaling */

In general there should be sandbox tests written for adding any such new UCLASS.

Thanks and regards,
Lokesh

>  	UCLASS_AXI,		/* AXI bus */
>  	UCLASS_BLK,		/* Block device */
>  	UCLASS_BOARD,		/* Device information from hardware */
> diff --git a/include/k3-avs.h b/include/k3-avs.h
> new file mode 100644
> index 0000000000..9867481617
> --- /dev/null
> +++ b/include/k3-avs.h
> @@ -0,0 +1,28 @@
> +// SPDX-License-Identifier: GPL-2.0+
> +/*
> + * Texas Instruments' K3 Adaptive Voltage Scaling driver
> + *
> + * Copyright (C) 2019 Texas Instruments Incorporated - http://www.ti.com/
> + *      Tero Kristo <t-kristo@ti.com>
> + *
> + */
> +
> +#ifndef _K3_AVS0_
> +#define _K3_AVS0_
> +
> +#define AM6_VDD_WKUP		0
> +#define AM6_VDD_MCU		1
> +#define AM6_VDD_CORE		2
> +#define AM6_VDD_MPU0		3
> +#define AM6_VDD_MPU1		4
> +
> +#define NUM_OPPS		4
> +
> +#define AM6_OPP_NOM		1
> +#define AM6_OPP_OD		2
> +#define AM6_OPP_TURBO		3
> +
> +int k3_avs_set_opp(struct udevice *dev, int vdd_id, int opp_id);
> +int k3_avs_notify_freq(int dev_id, int clk_id, u32 freq);
> +
> +#endif
> 

[U-Boot] [PATCH 01/10] power: add driver for K3 Adaptive Voltage Scaling Class 0

[Keerthy]

On 15/10/19 12:27 PM, Lokesh Vutla wrote:
> 
> [..snip..]
> 
>> +};
>> diff --git a/include/dm/uclass-id.h b/include/dm/uclass-id.h
>> index f431f3bf29..605b52905e 100644
>> --- a/include/dm/uclass-id.h
>> +++ b/include/dm/uclass-id.h
>> @@ -31,6 +31,7 @@ enum uclass_id {
>>   	UCLASS_ADC,		/* Analog-to-digital converter */
>>   	UCLASS_AHCI,		/* SATA disk controller */
>>   	UCLASS_AUDIO_CODEC,	/* Audio codec with control and data path */
>> +	UCLASS_AVS,		/* Adaptive voltage scaling */
> 
> In general there should be sandbox tests written for adding any such new UCLASS.

Tero,

This is not a generic UCLASS driver. This is a K3 specific driver. So 
should this be really introducing a new UCLASS?

- Keerthy

> 
> Thanks and regards,
> Lokesh
> 
>>   	UCLASS_AXI,		/* AXI bus */
>>   	UCLASS_BLK,		/* Block device */
>>   	UCLASS_BOARD,		/* Device information from hardware */
>> diff --git a/include/k3-avs.h b/include/k3-avs.h
>> new file mode 100644
>> index 0000000000..9867481617
>> --- /dev/null
>> +++ b/include/k3-avs.h
>> @@ -0,0 +1,28 @@
>> +// SPDX-License-Identifier: GPL-2.0+
>> +/*
>> + * Texas Instruments' K3 Adaptive Voltage Scaling driver
>> + *
>> + * Copyright (C) 2019 Texas Instruments Incorporated - http://www.ti.com/
>> + *      Tero Kristo <t-kristo@ti.com>
>> + *
>> + */
>> +
>> +#ifndef _K3_AVS0_
>> +#define _K3_AVS0_
>> +
>> +#define AM6_VDD_WKUP		0
>> +#define AM6_VDD_MCU		1
>> +#define AM6_VDD_CORE		2
>> +#define AM6_VDD_MPU0		3
>> +#define AM6_VDD_MPU1		4
>> +
>> +#define NUM_OPPS		4
>> +
>> +#define AM6_OPP_NOM		1
>> +#define AM6_OPP_OD		2
>> +#define AM6_OPP_TURBO		3
>> +
>> +int k3_avs_set_opp(struct udevice *dev, int vdd_id, int opp_id);
>> +int k3_avs_notify_freq(int dev_id, int clk_id, u32 freq);
>> +
>> +#endif
>>

[U-Boot] [PATCH 01/10] power: add driver for K3 Adaptive Voltage Scaling Class 0

[Tero Kristo]

On 21/10/2019 08:32, Keerthy wrote:
> 
> 
> On 15/10/19 12:27 PM, Lokesh Vutla wrote:
>>
>> [..snip..]
>>
>>> +};
>>> diff --git a/include/dm/uclass-id.h b/include/dm/uclass-id.h
>>> index f431f3bf29..605b52905e 100644
>>> --- a/include/dm/uclass-id.h
>>> +++ b/include/dm/uclass-id.h
>>> @@ -31,6 +31,7 @@ enum uclass_id {
>>>       UCLASS_ADC,        /* Analog-to-digital converter */
>>>       UCLASS_AHCI,        /* SATA disk controller */
>>>       UCLASS_AUDIO_CODEC,    /* Audio codec with control and data 
>>> path */
>>> +    UCLASS_AVS,        /* Adaptive voltage scaling */
>>
>> In general there should be sandbox tests written for adding any such 
>> new UCLASS.
> 
> Tero,
> 
> This is not a generic UCLASS driver. This is a K3 specific driver. So 
> should this be really introducing a new UCLASS?

Well, AVS is kind of generic across TI SoCs. However, I am fine just 
using UCLASS_MISC if we don't want to introduce a new uclass.... 
assuming we don't get sequencing issues with remoteproc if we do that.

-Tero

> 
> - Keerthy
> 
>>
>> Thanks and regards,
>> Lokesh
>>
>>>       UCLASS_AXI,        /* AXI bus */
>>>       UCLASS_BLK,        /* Block device */
>>>       UCLASS_BOARD,        /* Device information from hardware */
>>> diff --git a/include/k3-avs.h b/include/k3-avs.h
>>> new file mode 100644
>>> index 0000000000..9867481617
>>> --- /dev/null
>>> +++ b/include/k3-avs.h
>>> @@ -0,0 +1,28 @@
>>> +// SPDX-License-Identifier: GPL-2.0+
>>> +/*
>>> + * Texas Instruments' K3 Adaptive Voltage Scaling driver
>>> + *
>>> + * Copyright (C) 2019 Texas Instruments Incorporated - 
>>> http://www.ti.com/
>>> + *      Tero Kristo <t-kristo@ti.com>
>>> + *
>>> + */
>>> +
>>> +#ifndef _K3_AVS0_
>>> +#define _K3_AVS0_
>>> +
>>> +#define AM6_VDD_WKUP        0
>>> +#define AM6_VDD_MCU        1
>>> +#define AM6_VDD_CORE        2
>>> +#define AM6_VDD_MPU0        3
>>> +#define AM6_VDD_MPU1        4
>>> +
>>> +#define NUM_OPPS        4
>>> +
>>> +#define AM6_OPP_NOM        1
>>> +#define AM6_OPP_OD        2
>>> +#define AM6_OPP_TURBO        3
>>> +
>>> +int k3_avs_set_opp(struct udevice *dev, int vdd_id, int opp_id);
>>> +int k3_avs_notify_freq(int dev_id, int clk_id, u32 freq);
>>> +
>>> +#endif
>>>

--
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