* [PATCH] drm/i915/selftests: Teach workarounds to take intel_gt as its argument @ 2019-10-16 11:49 Chris Wilson 2019-10-16 12:41 ` Tvrtko Ursulin 2019-10-16 16:22 ` ✗ Fi.CI.BAT: failure for " Patchwork 0 siblings, 2 replies; 3+ messages in thread From: Chris Wilson @ 2019-10-16 11:49 UTC (permalink / raw) To: intel-gfx The workarounds selftests are hardware centric and so want to use the gt as its target. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com> --- .../gpu/drm/i915/gt/selftest_workarounds.c | 128 +++++++++--------- 1 file changed, 65 insertions(+), 63 deletions(-) diff --git a/drivers/gpu/drm/i915/gt/selftest_workarounds.c b/drivers/gpu/drm/i915/gt/selftest_workarounds.c index dc11f7ad50a2..8856c6c46cc4 100644 --- a/drivers/gpu/drm/i915/gt/selftest_workarounds.c +++ b/drivers/gpu/drm/i915/gt/selftest_workarounds.c @@ -58,7 +58,7 @@ static int request_add_spin(struct i915_request *rq, struct igt_spinner *spin) } static void -reference_lists_init(struct drm_i915_private *i915, struct wa_lists *lists) +reference_lists_init(struct intel_gt *gt, struct wa_lists *lists) { struct intel_engine_cs *engine; enum intel_engine_id id; @@ -66,10 +66,10 @@ reference_lists_init(struct drm_i915_private *i915, struct wa_lists *lists) memset(lists, 0, sizeof(*lists)); wa_init_start(&lists->gt_wa_list, "GT_REF", "global"); - gt_init_workarounds(i915, &lists->gt_wa_list); + gt_init_workarounds(gt->i915, &lists->gt_wa_list); wa_init_finish(&lists->gt_wa_list); - for_each_engine(engine, i915, id) { + for_each_engine(engine, gt->i915, id) { struct i915_wa_list *wal = &lists->engine[id].wa_list; wa_init_start(wal, "REF", engine->name); @@ -83,12 +83,12 @@ reference_lists_init(struct drm_i915_private *i915, struct wa_lists *lists) } static void -reference_lists_fini(struct drm_i915_private *i915, struct wa_lists *lists) +reference_lists_fini(struct intel_gt *gt, struct wa_lists *lists) { struct intel_engine_cs *engine; enum intel_engine_id id; - for_each_engine(engine, i915, id) + for_each_engine(engine, gt->i915, id) intel_wa_list_free(&lists->engine[id].wa_list); intel_wa_list_free(&lists->gt_wa_list); @@ -215,10 +215,10 @@ static int check_whitelist(struct i915_gem_context *ctx, err = 0; i915_gem_object_lock(results); - intel_wedge_on_timeout(&wedge, &ctx->i915->gt, HZ / 5) /* safety net! */ + intel_wedge_on_timeout(&wedge, engine->gt, HZ / 5) /* safety net! */ err = i915_gem_object_set_to_cpu_domain(results, false); i915_gem_object_unlock(results); - if (intel_gt_is_wedged(&ctx->i915->gt)) + if (intel_gt_is_wedged(engine->gt)) err = -EIO; if (err) goto out_put; @@ -605,7 +605,7 @@ static int check_dirty_whitelist(struct i915_gem_context *ctx, if (err) { pr_err("%s: Futzing %x timedout; cancelling test\n", engine->name, reg); - intel_gt_set_wedged(&ctx->i915->gt); + intel_gt_set_wedged(engine->gt); goto out_batch; } @@ -704,7 +704,7 @@ static int check_dirty_whitelist(struct i915_gem_context *ctx, static int live_dirty_whitelist(void *arg) { - struct drm_i915_private *i915 = arg; + struct intel_gt *gt = arg; struct intel_engine_cs *engine; struct i915_gem_context *ctx; enum intel_engine_id id; @@ -713,20 +713,20 @@ static int live_dirty_whitelist(void *arg) /* Can the user write to the whitelisted registers? */ - if (INTEL_GEN(i915) < 7) /* minimum requirement for LRI, SRM, LRM */ + if (INTEL_GEN(gt->i915) < 7) /* minimum requirement for LRI, SRM, LRM */ return 0; - file = mock_file(i915); + file = mock_file(gt->i915); if (IS_ERR(file)) return PTR_ERR(file); - ctx = live_context(i915, file); + ctx = live_context(gt->i915, file); if (IS_ERR(ctx)) { err = PTR_ERR(ctx); goto out_file; } - for_each_engine(engine, i915, id) { + for_each_engine(engine, gt->i915, id) { if (engine->whitelist.count == 0) continue; @@ -736,41 +736,43 @@ static int live_dirty_whitelist(void *arg) } out_file: - mock_file_free(i915, file); + mock_file_free(gt->i915, file); return err; } static int live_reset_whitelist(void *arg) { - struct drm_i915_private *i915 = arg; - struct intel_engine_cs *engine = i915->engine[RCS0]; + struct intel_gt *gt = arg; + struct intel_engine_cs *engine; + enum intel_engine_id id; int err = 0; /* If we reset the gpu, we should not lose the RING_NONPRIV */ + igt_global_reset_lock(gt); - if (!engine || engine->whitelist.count == 0) - return 0; - - igt_global_reset_lock(&i915->gt); + for_each_engine(engine, gt->i915, id) { + if (engine->whitelist.count == 0) + continue; - if (intel_has_reset_engine(&i915->gt)) { - err = check_whitelist_across_reset(engine, - do_engine_reset, - "engine"); - if (err) - goto out; - } + if (intel_has_reset_engine(gt)) { + err = check_whitelist_across_reset(engine, + do_engine_reset, + "engine"); + if (err) + goto out; + } - if (intel_has_gpu_reset(&i915->gt)) { - err = check_whitelist_across_reset(engine, - do_device_reset, - "device"); - if (err) - goto out; + if (intel_has_gpu_reset(gt)) { + err = check_whitelist_across_reset(engine, + do_device_reset, + "device"); + if (err) + goto out; + } } out: - igt_global_reset_unlock(&i915->gt); + igt_global_reset_unlock(gt); return err; } @@ -996,7 +998,7 @@ check_whitelisted_registers(struct intel_engine_cs *engine, static int live_isolated_whitelist(void *arg) { - struct drm_i915_private *i915 = arg; + struct intel_gt *gt = arg; struct { struct i915_gem_context *ctx; struct i915_vma *scratch[2]; @@ -1010,17 +1012,14 @@ static int live_isolated_whitelist(void *arg) * invisible to a second context. */ - if (!intel_engines_has_context_isolation(i915)) - return 0; - - if (!i915->kernel_context->vm) + if (!intel_engines_has_context_isolation(gt->i915)) return 0; for (i = 0; i < ARRAY_SIZE(client); i++) { struct i915_address_space *vm; struct i915_gem_context *c; - c = kernel_context(i915); + c = kernel_context(gt->i915); if (IS_ERR(c)) { err = PTR_ERR(c); goto err; @@ -1049,7 +1048,10 @@ static int live_isolated_whitelist(void *arg) i915_vm_put(vm); } - for_each_engine(engine, i915, id) { + for_each_engine(engine, gt->i915, id) { + if (!engine->kernel_context->vm) + continue; + if (!whitelist_writable_count(engine)) continue; @@ -1103,7 +1105,7 @@ static int live_isolated_whitelist(void *arg) kernel_context_close(client[i].ctx); } - if (igt_flush_test(i915)) + if (igt_flush_test(gt->i915)) err = -EIO; return err; @@ -1138,16 +1140,16 @@ verify_wa_lists(struct i915_gem_context *ctx, struct wa_lists *lists, static int live_gpu_reset_workarounds(void *arg) { - struct drm_i915_private *i915 = arg; + struct intel_gt *gt = arg; struct i915_gem_context *ctx; intel_wakeref_t wakeref; struct wa_lists lists; bool ok; - if (!intel_has_gpu_reset(&i915->gt)) + if (!intel_has_gpu_reset(gt)) return 0; - ctx = kernel_context(i915); + ctx = kernel_context(gt->i915); if (IS_ERR(ctx)) return PTR_ERR(ctx); @@ -1155,25 +1157,25 @@ live_gpu_reset_workarounds(void *arg) pr_info("Verifying after GPU reset...\n"); - igt_global_reset_lock(&i915->gt); - wakeref = intel_runtime_pm_get(&i915->runtime_pm); + igt_global_reset_lock(gt); + wakeref = intel_runtime_pm_get(gt->uncore->rpm); - reference_lists_init(i915, &lists); + reference_lists_init(gt, &lists); ok = verify_wa_lists(ctx, &lists, "before reset"); if (!ok) goto out; - intel_gt_reset(&i915->gt, ALL_ENGINES, "live_workarounds"); + intel_gt_reset(gt, ALL_ENGINES, "live_workarounds"); ok = verify_wa_lists(ctx, &lists, "after reset"); out: i915_gem_context_unlock_engines(ctx); kernel_context_close(ctx); - reference_lists_fini(i915, &lists); - intel_runtime_pm_put(&i915->runtime_pm, wakeref); - igt_global_reset_unlock(&i915->gt); + reference_lists_fini(gt, &lists); + intel_runtime_pm_put(gt->uncore->rpm, wakeref); + igt_global_reset_unlock(gt); return ok ? 0 : -ESRCH; } @@ -1181,7 +1183,7 @@ live_gpu_reset_workarounds(void *arg) static int live_engine_reset_workarounds(void *arg) { - struct drm_i915_private *i915 = arg; + struct intel_gt *gt = arg; struct i915_gem_engines_iter it; struct i915_gem_context *ctx; struct intel_context *ce; @@ -1191,17 +1193,17 @@ live_engine_reset_workarounds(void *arg) struct wa_lists lists; int ret = 0; - if (!intel_has_reset_engine(&i915->gt)) + if (!intel_has_reset_engine(gt)) return 0; - ctx = kernel_context(i915); + ctx = kernel_context(gt->i915); if (IS_ERR(ctx)) return PTR_ERR(ctx); - igt_global_reset_lock(&i915->gt); - wakeref = intel_runtime_pm_get(&i915->runtime_pm); + igt_global_reset_lock(gt); + wakeref = intel_runtime_pm_get(gt->uncore->rpm); - reference_lists_init(i915, &lists); + reference_lists_init(gt, &lists); for_each_gem_engine(ce, i915_gem_context_lock_engines(ctx), it) { struct intel_engine_cs *engine = ce->engine; @@ -1254,12 +1256,12 @@ live_engine_reset_workarounds(void *arg) } err: i915_gem_context_unlock_engines(ctx); - reference_lists_fini(i915, &lists); - intel_runtime_pm_put(&i915->runtime_pm, wakeref); - igt_global_reset_unlock(&i915->gt); + reference_lists_fini(gt, &lists); + intel_runtime_pm_put(gt->uncore->rpm, wakeref); + igt_global_reset_unlock(gt); kernel_context_close(ctx); - igt_flush_test(i915); + igt_flush_test(gt->i915); return ret; } @@ -1277,5 +1279,5 @@ int intel_workarounds_live_selftests(struct drm_i915_private *i915) if (intel_gt_is_wedged(&i915->gt)) return 0; - return i915_subtests(tests, i915); + return intel_gt_live_subtests(tests, &i915->gt); } -- 2.23.0 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply related [flat|nested] 3+ messages in thread
* Re: [PATCH] drm/i915/selftests: Teach workarounds to take intel_gt as its argument 2019-10-16 11:49 [PATCH] drm/i915/selftests: Teach workarounds to take intel_gt as its argument Chris Wilson @ 2019-10-16 12:41 ` Tvrtko Ursulin 2019-10-16 16:22 ` ✗ Fi.CI.BAT: failure for " Patchwork 1 sibling, 0 replies; 3+ messages in thread From: Tvrtko Ursulin @ 2019-10-16 12:41 UTC (permalink / raw) To: Chris Wilson, intel-gfx On 16/10/2019 12:49, Chris Wilson wrote: > The workarounds selftests are hardware centric and so want to use the gt > as its target. > > Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> > Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com> > --- > .../gpu/drm/i915/gt/selftest_workarounds.c | 128 +++++++++--------- > 1 file changed, 65 insertions(+), 63 deletions(-) > > diff --git a/drivers/gpu/drm/i915/gt/selftest_workarounds.c b/drivers/gpu/drm/i915/gt/selftest_workarounds.c > index dc11f7ad50a2..8856c6c46cc4 100644 > --- a/drivers/gpu/drm/i915/gt/selftest_workarounds.c > +++ b/drivers/gpu/drm/i915/gt/selftest_workarounds.c > @@ -58,7 +58,7 @@ static int request_add_spin(struct i915_request *rq, struct igt_spinner *spin) > } > > static void > -reference_lists_init(struct drm_i915_private *i915, struct wa_lists *lists) > +reference_lists_init(struct intel_gt *gt, struct wa_lists *lists) > { > struct intel_engine_cs *engine; > enum intel_engine_id id; > @@ -66,10 +66,10 @@ reference_lists_init(struct drm_i915_private *i915, struct wa_lists *lists) > memset(lists, 0, sizeof(*lists)); > > wa_init_start(&lists->gt_wa_list, "GT_REF", "global"); > - gt_init_workarounds(i915, &lists->gt_wa_list); > + gt_init_workarounds(gt->i915, &lists->gt_wa_list); > wa_init_finish(&lists->gt_wa_list); > > - for_each_engine(engine, i915, id) { > + for_each_engine(engine, gt->i915, id) { ^^^ > struct i915_wa_list *wal = &lists->engine[id].wa_list; > > wa_init_start(wal, "REF", engine->name); > @@ -83,12 +83,12 @@ reference_lists_init(struct drm_i915_private *i915, struct wa_lists *lists) > } > > static void > -reference_lists_fini(struct drm_i915_private *i915, struct wa_lists *lists) > +reference_lists_fini(struct intel_gt *gt, struct wa_lists *lists) > { > struct intel_engine_cs *engine; > enum intel_engine_id id; > > - for_each_engine(engine, i915, id) > + for_each_engine(engine, gt->i915, id) > intel_wa_list_free(&lists->engine[id].wa_list); > > intel_wa_list_free(&lists->gt_wa_list); > @@ -215,10 +215,10 @@ static int check_whitelist(struct i915_gem_context *ctx, > > err = 0; > i915_gem_object_lock(results); > - intel_wedge_on_timeout(&wedge, &ctx->i915->gt, HZ / 5) /* safety net! */ > + intel_wedge_on_timeout(&wedge, engine->gt, HZ / 5) /* safety net! */ > err = i915_gem_object_set_to_cpu_domain(results, false); > i915_gem_object_unlock(results); > - if (intel_gt_is_wedged(&ctx->i915->gt)) > + if (intel_gt_is_wedged(engine->gt)) > err = -EIO; > if (err) > goto out_put; > @@ -605,7 +605,7 @@ static int check_dirty_whitelist(struct i915_gem_context *ctx, > if (err) { > pr_err("%s: Futzing %x timedout; cancelling test\n", > engine->name, reg); > - intel_gt_set_wedged(&ctx->i915->gt); > + intel_gt_set_wedged(engine->gt); > goto out_batch; > } > > @@ -704,7 +704,7 @@ static int check_dirty_whitelist(struct i915_gem_context *ctx, > > static int live_dirty_whitelist(void *arg) > { > - struct drm_i915_private *i915 = arg; > + struct intel_gt *gt = arg; > struct intel_engine_cs *engine; > struct i915_gem_context *ctx; > enum intel_engine_id id; > @@ -713,20 +713,20 @@ static int live_dirty_whitelist(void *arg) > > /* Can the user write to the whitelisted registers? */ > > - if (INTEL_GEN(i915) < 7) /* minimum requirement for LRI, SRM, LRM */ > + if (INTEL_GEN(gt->i915) < 7) /* minimum requirement for LRI, SRM, LRM */ > return 0; > > - file = mock_file(i915); > + file = mock_file(gt->i915); > if (IS_ERR(file)) > return PTR_ERR(file); > > - ctx = live_context(i915, file); > + ctx = live_context(gt->i915, file); > if (IS_ERR(ctx)) { > err = PTR_ERR(ctx); > goto out_file; > } > > - for_each_engine(engine, i915, id) { > + for_each_engine(engine, gt->i915, id) { ^^^ > if (engine->whitelist.count == 0) > continue; > > @@ -736,41 +736,43 @@ static int live_dirty_whitelist(void *arg) > } > > out_file: > - mock_file_free(i915, file); > + mock_file_free(gt->i915, file); > return err; > } > > static int live_reset_whitelist(void *arg) > { > - struct drm_i915_private *i915 = arg; > - struct intel_engine_cs *engine = i915->engine[RCS0]; > + struct intel_gt *gt = arg; > + struct intel_engine_cs *engine; > + enum intel_engine_id id; > int err = 0; > > /* If we reset the gpu, we should not lose the RING_NONPRIV */ > + igt_global_reset_lock(gt); > > - if (!engine || engine->whitelist.count == 0) > - return 0; > - > - igt_global_reset_lock(&i915->gt); > + for_each_engine(engine, gt->i915, id) { ^^^ > + if (engine->whitelist.count == 0) > + continue; > > - if (intel_has_reset_engine(&i915->gt)) { > - err = check_whitelist_across_reset(engine, > - do_engine_reset, > - "engine"); > - if (err) > - goto out; > - } > + if (intel_has_reset_engine(gt)) { > + err = check_whitelist_across_reset(engine, > + do_engine_reset, > + "engine"); > + if (err) > + goto out; > + } > > - if (intel_has_gpu_reset(&i915->gt)) { > - err = check_whitelist_across_reset(engine, > - do_device_reset, > - "device"); > - if (err) > - goto out; > + if (intel_has_gpu_reset(gt)) { > + err = check_whitelist_across_reset(engine, > + do_device_reset, > + "device"); > + if (err) > + goto out; > + } > } > > out: > - igt_global_reset_unlock(&i915->gt); > + igt_global_reset_unlock(gt); > return err; > } > > @@ -996,7 +998,7 @@ check_whitelisted_registers(struct intel_engine_cs *engine, > > static int live_isolated_whitelist(void *arg) > { > - struct drm_i915_private *i915 = arg; > + struct intel_gt *gt = arg; > struct { > struct i915_gem_context *ctx; > struct i915_vma *scratch[2]; > @@ -1010,17 +1012,14 @@ static int live_isolated_whitelist(void *arg) > * invisible to a second context. > */ > > - if (!intel_engines_has_context_isolation(i915)) > - return 0; > - > - if (!i915->kernel_context->vm) > + if (!intel_engines_has_context_isolation(gt->i915)) > return 0; > > for (i = 0; i < ARRAY_SIZE(client); i++) { > struct i915_address_space *vm; > struct i915_gem_context *c; > > - c = kernel_context(i915); > + c = kernel_context(gt->i915); > if (IS_ERR(c)) { > err = PTR_ERR(c); > goto err; > @@ -1049,7 +1048,10 @@ static int live_isolated_whitelist(void *arg) > i915_vm_put(vm); > } > > - for_each_engine(engine, i915, id) { > + for_each_engine(engine, gt->i915, id) { ^^^ > + if (!engine->kernel_context->vm) > + continue; > + > if (!whitelist_writable_count(engine)) > continue; > > @@ -1103,7 +1105,7 @@ static int live_isolated_whitelist(void *arg) > kernel_context_close(client[i].ctx); > } > > - if (igt_flush_test(i915)) > + if (igt_flush_test(gt->i915)) > err = -EIO; > > return err; > @@ -1138,16 +1140,16 @@ verify_wa_lists(struct i915_gem_context *ctx, struct wa_lists *lists, > static int > live_gpu_reset_workarounds(void *arg) > { > - struct drm_i915_private *i915 = arg; > + struct intel_gt *gt = arg; > struct i915_gem_context *ctx; > intel_wakeref_t wakeref; > struct wa_lists lists; > bool ok; > > - if (!intel_has_gpu_reset(&i915->gt)) > + if (!intel_has_gpu_reset(gt)) > return 0; > > - ctx = kernel_context(i915); > + ctx = kernel_context(gt->i915); > if (IS_ERR(ctx)) > return PTR_ERR(ctx); > > @@ -1155,25 +1157,25 @@ live_gpu_reset_workarounds(void *arg) > > pr_info("Verifying after GPU reset...\n"); > > - igt_global_reset_lock(&i915->gt); > - wakeref = intel_runtime_pm_get(&i915->runtime_pm); > + igt_global_reset_lock(gt); > + wakeref = intel_runtime_pm_get(gt->uncore->rpm); > > - reference_lists_init(i915, &lists); > + reference_lists_init(gt, &lists); > > ok = verify_wa_lists(ctx, &lists, "before reset"); > if (!ok) > goto out; > > - intel_gt_reset(&i915->gt, ALL_ENGINES, "live_workarounds"); > + intel_gt_reset(gt, ALL_ENGINES, "live_workarounds"); > > ok = verify_wa_lists(ctx, &lists, "after reset"); > > out: > i915_gem_context_unlock_engines(ctx); > kernel_context_close(ctx); > - reference_lists_fini(i915, &lists); > - intel_runtime_pm_put(&i915->runtime_pm, wakeref); > - igt_global_reset_unlock(&i915->gt); > + reference_lists_fini(gt, &lists); > + intel_runtime_pm_put(gt->uncore->rpm, wakeref); > + igt_global_reset_unlock(gt); > > return ok ? 0 : -ESRCH; > } > @@ -1181,7 +1183,7 @@ live_gpu_reset_workarounds(void *arg) > static int > live_engine_reset_workarounds(void *arg) > { > - struct drm_i915_private *i915 = arg; > + struct intel_gt *gt = arg; > struct i915_gem_engines_iter it; > struct i915_gem_context *ctx; > struct intel_context *ce; > @@ -1191,17 +1193,17 @@ live_engine_reset_workarounds(void *arg) > struct wa_lists lists; > int ret = 0; > > - if (!intel_has_reset_engine(&i915->gt)) > + if (!intel_has_reset_engine(gt)) > return 0; > > - ctx = kernel_context(i915); > + ctx = kernel_context(gt->i915); > if (IS_ERR(ctx)) > return PTR_ERR(ctx); > > - igt_global_reset_lock(&i915->gt); > - wakeref = intel_runtime_pm_get(&i915->runtime_pm); > + igt_global_reset_lock(gt); > + wakeref = intel_runtime_pm_get(gt->uncore->rpm); > > - reference_lists_init(i915, &lists); > + reference_lists_init(gt, &lists); > > for_each_gem_engine(ce, i915_gem_context_lock_engines(ctx), it) { > struct intel_engine_cs *engine = ce->engine; > @@ -1254,12 +1256,12 @@ live_engine_reset_workarounds(void *arg) > } > err: > i915_gem_context_unlock_engines(ctx); > - reference_lists_fini(i915, &lists); > - intel_runtime_pm_put(&i915->runtime_pm, wakeref); > - igt_global_reset_unlock(&i915->gt); > + reference_lists_fini(gt, &lists); > + intel_runtime_pm_put(gt->uncore->rpm, wakeref); > + igt_global_reset_unlock(gt); > kernel_context_close(ctx); > > - igt_flush_test(i915); > + igt_flush_test(gt->i915); > > return ret; > } > @@ -1277,5 +1279,5 @@ int intel_workarounds_live_selftests(struct drm_i915_private *i915) > if (intel_gt_is_wedged(&i915->gt)) > return 0; > > - return i915_subtests(tests, i915); > + return intel_gt_live_subtests(tests, &i915->gt); > } > With gt instead of gt->i915 in for_each_engine: Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Regards, Tvrtko _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 3+ messages in thread
* ✗ Fi.CI.BAT: failure for drm/i915/selftests: Teach workarounds to take intel_gt as its argument 2019-10-16 11:49 [PATCH] drm/i915/selftests: Teach workarounds to take intel_gt as its argument Chris Wilson 2019-10-16 12:41 ` Tvrtko Ursulin @ 2019-10-16 16:22 ` Patchwork 1 sibling, 0 replies; 3+ messages in thread From: Patchwork @ 2019-10-16 16:22 UTC (permalink / raw) To: Chris Wilson; +Cc: intel-gfx == Series Details == Series: drm/i915/selftests: Teach workarounds to take intel_gt as its argument URL : https://patchwork.freedesktop.org/series/68089/ State : failure == Summary == CI Bug Log - changes from CI_DRM_7108 -> Patchwork_14833 ==================================================== Summary ------- **FAILURE** Serious unknown changes coming with Patchwork_14833 absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_14833, please notify your bug team to allow them to document this new failure mode, which will reduce false positives in CI. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14833/index.html Possible new issues ------------------- Here are the unknown changes that may have been introduced in Patchwork_14833: ### IGT changes ### #### Possible regressions #### * igt@i915_selftest@live_execlists: - fi-icl-u3: [PASS][1] -> [DMESG-FAIL][2] [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7108/fi-icl-u3/igt@i915_selftest@live_execlists.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14833/fi-icl-u3/igt@i915_selftest@live_execlists.html - fi-skl-6600u: [PASS][3] -> [DMESG-FAIL][4] [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7108/fi-skl-6600u/igt@i915_selftest@live_execlists.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14833/fi-skl-6600u/igt@i915_selftest@live_execlists.html * igt@i915_selftest@live_gem_contexts: - fi-cfl-8109u: [PASS][5] -> [DMESG-FAIL][6] [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7108/fi-cfl-8109u/igt@i915_selftest@live_gem_contexts.html [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14833/fi-cfl-8109u/igt@i915_selftest@live_gem_contexts.html #### Suppressed #### The following results come from untrusted machines, tests, or statuses. They do not affect the overall result. * igt@i915_selftest@live_execlists: - {fi-kbl-soraka}: [PASS][7] -> [INCOMPLETE][8] [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7108/fi-kbl-soraka/igt@i915_selftest@live_execlists.html [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14833/fi-kbl-soraka/igt@i915_selftest@live_execlists.html Known issues ------------ Here are the changes found in Patchwork_14833 that come from known issues: ### IGT changes ### #### Issues hit #### * igt@gem_ctx_create@basic-files: - fi-cml-u: [PASS][9] -> [INCOMPLETE][10] ([fdo#110566]) [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7108/fi-cml-u/igt@gem_ctx_create@basic-files.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14833/fi-cml-u/igt@gem_ctx_create@basic-files.html * igt@gem_tiled_blits@basic: - fi-icl-u3: [PASS][11] -> [DMESG-WARN][12] ([fdo#107724]) [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7108/fi-icl-u3/igt@gem_tiled_blits@basic.html [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14833/fi-icl-u3/igt@gem_tiled_blits@basic.html * igt@kms_chamelium@hdmi-hpd-fast: - fi-kbl-7500u: [PASS][13] -> [FAIL][14] ([fdo#111407]) [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7108/fi-kbl-7500u/igt@kms_chamelium@hdmi-hpd-fast.html [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14833/fi-kbl-7500u/igt@kms_chamelium@hdmi-hpd-fast.html #### Possible fixes #### * igt@gem_linear_blits@basic: - fi-icl-u3: [DMESG-WARN][15] ([fdo#107724]) -> [PASS][16] +1 similar issue [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7108/fi-icl-u3/igt@gem_linear_blits@basic.html [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14833/fi-icl-u3/igt@gem_linear_blits@basic.html * igt@i915_selftest@live_execlists: - fi-apl-guc: [DMESG-FAIL][17] -> [PASS][18] [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7108/fi-apl-guc/igt@i915_selftest@live_execlists.html [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14833/fi-apl-guc/igt@i915_selftest@live_execlists.html - fi-skl-6260u: [DMESG-FAIL][19] -> [PASS][20] [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7108/fi-skl-6260u/igt@i915_selftest@live_execlists.html [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14833/fi-skl-6260u/igt@i915_selftest@live_execlists.html * igt@i915_selftest@live_requests: - {fi-tgl-u}: [INCOMPLETE][21] -> [PASS][22] [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7108/fi-tgl-u/igt@i915_selftest@live_requests.html [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14833/fi-tgl-u/igt@i915_selftest@live_requests.html {name}: This element is suppressed. This means it is ignored when computing the status of the difference (SUCCESS, WARNING, or FAILURE). [fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713 [fdo#107724]: https://bugs.freedesktop.org/show_bug.cgi?id=107724 [fdo#108569]: https://bugs.freedesktop.org/show_bug.cgi?id=108569 [fdo#110566]: https://bugs.freedesktop.org/show_bug.cgi?id=110566 [fdo#111407]: https://bugs.freedesktop.org/show_bug.cgi?id=111407 Participating hosts (53 -> 44) ------------------------------ Missing (9): fi-ilk-m540 fi-hsw-4200u fi-hsw-peppy fi-bsw-n3050 fi-byt-squawks fi-bsw-cyan fi-icl-y fi-byt-clapper fi-bdw-samus Build changes ------------- * CI: CI-20190529 -> None * Linux: CI_DRM_7108 -> Patchwork_14833 CI-20190529: 20190529 CI_DRM_7108: 6087ca54af37aeb0b24ce9533a885194d9cc2be7 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_5231: e293051f8f99c72cb01d21e4b73a5928ea351eb3 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools Patchwork_14833: f0338a419ae330435483b0be99dbcfe0f804ba3f @ git://anongit.freedesktop.org/gfx-ci/linux == Linux commits == f0338a419ae3 drm/i915/selftests: Teach workarounds to take intel_gt as its argument == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14833/index.html _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 3+ messages in thread
end of thread, other threads:[~2019-10-16 16:22 UTC | newest] Thread overview: 3+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2019-10-16 11:49 [PATCH] drm/i915/selftests: Teach workarounds to take intel_gt as its argument Chris Wilson 2019-10-16 12:41 ` Tvrtko Ursulin 2019-10-16 16:22 ` ✗ Fi.CI.BAT: failure for " Patchwork
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