[PATCH] drm/i915: Do not end i915 batch buffers prematurely

[PATCH] drm/i915: Do not end i915 batch buffers prematurely

[Stuart Summers]

During engine initialization in i915 load, the batch buffers
being used to set up the initial context are being prematurely
ended. In most scenarios, this does not cause a problem, but
in the rare event the engine expects the context to be added
without an explicit MI_BATCH_BUFFER_END instruction, do not
insert this instruction prematurely.

Signed-off-by: Stuart Summers <stuart.summers@intel.com>
---
 drivers/gpu/drm/i915/gt/intel_lrc.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/gt/intel_lrc.c b/drivers/gpu/drm/i915/gt/intel_lrc.c
index e9fe9f79cedd..ec067c29ac65 100644
--- a/drivers/gpu/drm/i915/gt/intel_lrc.c
+++ b/drivers/gpu/drm/i915/gt/intel_lrc.c
@@ -3805,7 +3805,7 @@ populate_lr_context(struct intel_context *ce,
 	/* The second page of the context object contains some fields which must
 	 * be set up prior to the first execution. */
 	regs = vaddr + LRC_STATE_PN * PAGE_SIZE;
-	execlists_init_reg_state(regs, ce, engine, ring, inhibit);
+	execlists_init_reg_state(regs, ce, engine, ring, false);
 	if (inhibit)
 		regs[CTX_CONTEXT_CONTROL] |=
 			_MASKED_BIT_ENABLE(CTX_CTRL_ENGINE_CTX_RESTORE_INHIBIT);
-- 
2.22.0

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Re: [PATCH] drm/i915: Do not end i915 batch buffers prematurely

[Daniele Ceraolo Spurio]

On 10/17/19 12:37 PM, Stuart Summers wrote:
> During engine initialization in i915 load, the batch buffers
> being used to set up the initial context are being prematurely
> ended. In most scenarios, this does not cause a problem, but

That's not a batch that we add the BBEND to, that's the context itself.

> in the rare event the engine expects the context to be added
> without an explicit MI_BATCH_BUFFER_END instruction, do not
> insert this instruction prematurely.
> 

We only add the BBEND when there is no state to restore, so why would 
the engine expect to execute a bunch of no-ops?

Daniele

> Signed-off-by: Stuart Summers <stuart.summers@intel.com>
> ---
>   drivers/gpu/drm/i915/gt/intel_lrc.c | 2 +-
>   1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/i915/gt/intel_lrc.c b/drivers/gpu/drm/i915/gt/intel_lrc.c
> index e9fe9f79cedd..ec067c29ac65 100644
> --- a/drivers/gpu/drm/i915/gt/intel_lrc.c
> +++ b/drivers/gpu/drm/i915/gt/intel_lrc.c
> @@ -3805,7 +3805,7 @@ populate_lr_context(struct intel_context *ce,
>   	/* The second page of the context object contains some fields which must
>   	 * be set up prior to the first execution. */
>   	regs = vaddr + LRC_STATE_PN * PAGE_SIZE;
> -	execlists_init_reg_state(regs, ce, engine, ring, inhibit);
> +	execlists_init_reg_state(regs, ce, engine, ring, false);
>   	if (inhibit)
>   		regs[CTX_CONTEXT_CONTROL] |=
>   			_MASKED_BIT_ENABLE(CTX_CTRL_ENGINE_CTX_RESTORE_INHIBIT);
> 
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✗ Fi.CI.BAT: failure for drm/i915: Do not end i915 batch buffers prematurely

[Patchwork]

== Series Details ==

Series: drm/i915: Do not end i915 batch buffers prematurely
URL   : https://patchwork.freedesktop.org/series/68175/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_7125 -> Patchwork_14866
====================================================

Summary
-------

  **FAILURE**

  Serious unknown changes coming with Patchwork_14866 absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_14866, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14866/index.html

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in Patchwork_14866:

### IGT changes ###

#### Possible regressions ####

  * igt@i915_selftest@live_gem_contexts:
    - fi-cfl-8109u:       [PASS][1] -> [DMESG-FAIL][2] +1 similar issue
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7125/fi-cfl-8109u/igt@i915_selftest@live_gem_contexts.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14866/fi-cfl-8109u/igt@i915_selftest@live_gem_contexts.html

  
Known issues
------------

  Here are the changes found in Patchwork_14866 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@gem_ctx_switch@rcs0:
    - fi-apl-guc:         [PASS][3] -> [INCOMPLETE][4] ([fdo#103927])
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7125/fi-apl-guc/igt@gem_ctx_switch@rcs0.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14866/fi-apl-guc/igt@gem_ctx_switch@rcs0.html

  * igt@kms_addfb_basic@too-high:
    - fi-icl-u3:          [PASS][5] -> [DMESG-WARN][6] ([fdo#107724]) +1 similar issue
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7125/fi-icl-u3/igt@kms_addfb_basic@too-high.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14866/fi-icl-u3/igt@kms_addfb_basic@too-high.html

  
#### Possible fixes ####

  * igt@gem_exec_suspend@basic-s4-devices:
    - fi-icl-u3:          [DMESG-WARN][7] ([fdo#107724]) -> [PASS][8] +1 similar issue
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7125/fi-icl-u3/igt@gem_exec_suspend@basic-s4-devices.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14866/fi-icl-u3/igt@gem_exec_suspend@basic-s4-devices.html

  * igt@i915_selftest@live_execlists:
    - fi-icl-u2:          [INCOMPLETE][9] ([fdo#107713]) -> [PASS][10]
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7125/fi-icl-u2/igt@i915_selftest@live_execlists.html
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14866/fi-icl-u2/igt@i915_selftest@live_execlists.html
    - {fi-icl-dsi}:       [DMESG-FAIL][11] -> [PASS][12]
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7125/fi-icl-dsi/igt@i915_selftest@live_execlists.html
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14866/fi-icl-dsi/igt@i915_selftest@live_execlists.html
    - fi-skl-6260u:       [DMESG-FAIL][13] -> [PASS][14]
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7125/fi-skl-6260u/igt@i915_selftest@live_execlists.html
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14866/fi-skl-6260u/igt@i915_selftest@live_execlists.html

  * igt@i915_selftest@live_hangcheck:
    - fi-icl-u3:          [INCOMPLETE][15] ([fdo#107713] / [fdo#108569]) -> [PASS][16]
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7125/fi-icl-u3/igt@i915_selftest@live_hangcheck.html
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14866/fi-icl-u3/igt@i915_selftest@live_hangcheck.html

  
#### Warnings ####

  * igt@kms_chamelium@hdmi-hpd-fast:
    - fi-kbl-7500u:       [FAIL][17] ([fdo#111407]) -> [FAIL][18] ([fdo#111045] / [fdo#111096])
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7125/fi-kbl-7500u/igt@kms_chamelium@hdmi-hpd-fast.html
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14866/fi-kbl-7500u/igt@kms_chamelium@hdmi-hpd-fast.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#103927]: https://bugs.freedesktop.org/show_bug.cgi?id=103927
  [fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713
  [fdo#107724]: https://bugs.freedesktop.org/show_bug.cgi?id=107724
  [fdo#108569]: https://bugs.freedesktop.org/show_bug.cgi?id=108569
  [fdo#111045]: https://bugs.freedesktop.org/show_bug.cgi?id=111045
  [fdo#111096]: https://bugs.freedesktop.org/show_bug.cgi?id=111096
  [fdo#111407]: https://bugs.freedesktop.org/show_bug.cgi?id=111407
  [fdo#111600]: https://bugs.freedesktop.org/show_bug.cgi?id=111600


Participating hosts (53 -> 46)
------------------------------

  Missing    (7): fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-icl-y fi-byt-clapper fi-bdw-samus 


Build changes
-------------

  * CI: CI-20190529 -> None
  * Linux: CI_DRM_7125 -> Patchwork_14866

  CI-20190529: 20190529
  CI_DRM_7125: f1ac92f5feb18678a3191a45be0ee4a4d255fc61 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_5232: bb5735423eaf6fdbf6b2f94ef0b8520e74eab993 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_14866: 03b33bef8b9e27b4a449a5364a232dd96eca087a @ git://anongit.freedesktop.org/gfx-ci/linux


== Linux commits ==

03b33bef8b9e drm/i915: Do not end i915 batch buffers prematurely

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14866/index.html
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Re: [PATCH] drm/i915: Do not end i915 batch buffers prematurely

[Summers, Stuart]

[-- Attachment #1.1: Type: text/plain, Size: 1815 bytes --]

On Thu, 2019-10-17 at 14:42 -0700, Daniele Ceraolo Spurio wrote:
> 
> On 10/17/19 12:37 PM, Stuart Summers wrote:
> > During engine initialization in i915 load, the batch buffers
> > being used to set up the initial context are being prematurely
> > ended. In most scenarios, this does not cause a problem, but
> 
> That's not a batch that we add the BBEND to, that's the context
> itself.

True.

> 
> > in the rare event the engine expects the context to be added
> > without an explicit MI_BATCH_BUFFER_END instruction, do not
> > insert this instruction prematurely.
> > 
> 
> We only add the BBEND when there is no state to restore, so why
> would 
> the engine expect to execute a bunch of no-ops?

That is also true. Seems like an unlikely situation. Let me dig a bit
more before coming back here.

Thanks,
Stuart

> 
> Daniele
> 
> > Signed-off-by: Stuart Summers <stuart.summers@intel.com>
> > ---
> >   drivers/gpu/drm/i915/gt/intel_lrc.c | 2 +-
> >   1 file changed, 1 insertion(+), 1 deletion(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/gt/intel_lrc.c
> > b/drivers/gpu/drm/i915/gt/intel_lrc.c
> > index e9fe9f79cedd..ec067c29ac65 100644
> > --- a/drivers/gpu/drm/i915/gt/intel_lrc.c
> > +++ b/drivers/gpu/drm/i915/gt/intel_lrc.c
> > @@ -3805,7 +3805,7 @@ populate_lr_context(struct intel_context *ce,
> >   	/* The second page of the context object contains some fields
> > which must
> >   	 * be set up prior to the first execution. */
> >   	regs = vaddr + LRC_STATE_PN * PAGE_SIZE;
> > -	execlists_init_reg_state(regs, ce, engine, ring, inhibit);
> > +	execlists_init_reg_state(regs, ce, engine, ring, false);
> >   	if (inhibit)
> >   		regs[CTX_CONTEXT_CONTROL] |=
> >   			_MASKED_BIT_ENABLE(CTX_CTRL_ENGINE_CTX_RESTORE_
> > INHIBIT);
> > 

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