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* [PATCH] drm/amdgpu/sdma5: do not execute 0-sized IBs (v2)
@ 2019-10-22 17:22 Pelloux-prayer, Pierre-eric
       [not found] ` <20191022172136.15391-1-pierre-eric.pelloux-prayer-5C7GfCeVMHo@public.gmane.org>
  0 siblings, 1 reply; 6+ messages in thread
From: Pelloux-prayer, Pierre-eric @ 2019-10-22 17:22 UTC (permalink / raw)
  To: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW; +Cc: Pelloux-prayer, Pierre-eric

This seems to help with https://bugs.freedesktop.org/show_bug.cgi?id=111481.

v2: insert a NOP instead of skipping all 0-sized IBs to avoid breaking older hw

Signed-off-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
index fb48622c2abd..6e1b25bd1fe7 100644
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
@@ -309,6 +309,7 @@ static void gmc_v10_0_flush_gpu_tlb(struct amdgpu_device *adev, uint32_t vmid,
 
 	job->vm_pd_addr = amdgpu_gmc_pd_addr(adev->gart.bo);
 	job->vm_needs_flush = true;
+	job->ibs->ptr[job->ibs->length_dw++] = ring->funcs->nop;
 	amdgpu_ring_pad_ib(ring, &job->ibs[0]);
 	r = amdgpu_job_submit(job, &adev->mman.entity,
 			      AMDGPU_FENCE_OWNER_UNDEFINED, &fence);
-- 
2.23.0.rc1

_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx

^ permalink raw reply related	[flat|nested] 6+ messages in thread

* Re: [PATCH] drm/amdgpu/sdma5: do not execute 0-sized IBs (v2)
       [not found] ` <20191022172136.15391-1-pierre-eric.pelloux-prayer-5C7GfCeVMHo@public.gmane.org>
@ 2019-10-23  7:33   ` Christian König
       [not found]     ` <b3ddc981-c465-b008-705a-d01e44b783e3-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
  0 siblings, 1 reply; 6+ messages in thread
From: Christian König @ 2019-10-23  7:33 UTC (permalink / raw)
  To: Pelloux-prayer, Pierre-eric, amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW

Am 22.10.19 um 19:22 schrieb Pelloux-prayer, Pierre-eric:
> This seems to help with https://bugs.freedesktop.org/show_bug.cgi?id=111481.
>
> v2: insert a NOP instead of skipping all 0-sized IBs to avoid breaking older hw
>
> Signed-off-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>

Reviewed-by: Christian König <christian.koenig@amd.com>

> ---
>   drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c | 1 +
>   1 file changed, 1 insertion(+)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
> index fb48622c2abd..6e1b25bd1fe7 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
> @@ -309,6 +309,7 @@ static void gmc_v10_0_flush_gpu_tlb(struct amdgpu_device *adev, uint32_t vmid,
>   
>   	job->vm_pd_addr = amdgpu_gmc_pd_addr(adev->gart.bo);
>   	job->vm_needs_flush = true;
> +	job->ibs->ptr[job->ibs->length_dw++] = ring->funcs->nop;
>   	amdgpu_ring_pad_ib(ring, &job->ibs[0]);
>   	r = amdgpu_job_submit(job, &adev->mman.entity,
>   			      AMDGPU_FENCE_OWNER_UNDEFINED, &fence);

_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx

^ permalink raw reply	[flat|nested] 6+ messages in thread

* RE: [PATCH] drm/amdgpu/sdma5: do not execute 0-sized IBs (v2)
@ 2019-10-23 12:50         ` Deucher, Alexander
  0 siblings, 0 replies; 6+ messages in thread
From: Deucher, Alexander @ 2019-10-23 12:50 UTC (permalink / raw)
  To: Koenig, Christian, Pelloux-prayer, Pierre-eric,
	amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW

> -----Original Message-----
> From: amd-gfx <amd-gfx-bounces@lists.freedesktop.org> On Behalf Of
> Christian König
> Sent: Wednesday, October 23, 2019 3:33 AM
> To: Pelloux-prayer, Pierre-eric <Pierre-eric.Pelloux-prayer@amd.com>; amd-
> gfx@lists.freedesktop.org
> Subject: Re: [PATCH] drm/amdgpu/sdma5: do not execute 0-sized IBs (v2)
> 
> Am 22.10.19 um 19:22 schrieb Pelloux-prayer, Pierre-eric:
> > This seems to help with
> https://bugs.freedesktop.org/show_bug.cgi?id=111481.
> >
> > v2: insert a NOP instead of skipping all 0-sized IBs to avoid breaking older
> hw
> >
> > Signed-off-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-
> prayer@amd.com>
> 
> Reviewed-by: Christian König <christian.koenig@amd.com>

Do nop packets have any alignment requirements on SDMA?  Some of the other packets do.

Alex

> 
> > ---
> >   drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c | 1 +
> >   1 file changed, 1 insertion(+)
> >
> > diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
> b/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
> > index fb48622c2abd..6e1b25bd1fe7 100644
> > --- a/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
> > +++ b/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
> > @@ -309,6 +309,7 @@ static void gmc_v10_0_flush_gpu_tlb(struct
> amdgpu_device *adev, uint32_t vmid,
> >
> >   	job->vm_pd_addr = amdgpu_gmc_pd_addr(adev->gart.bo);
> >   	job->vm_needs_flush = true;
> > +	job->ibs->ptr[job->ibs->length_dw++] = ring->funcs->nop;
> >   	amdgpu_ring_pad_ib(ring, &job->ibs[0]);
> >   	r = amdgpu_job_submit(job, &adev->mman.entity,
> >   			      AMDGPU_FENCE_OWNER_UNDEFINED, &fence);
> 
> _______________________________________________
> amd-gfx mailing list
> amd-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/amd-gfx
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx

^ permalink raw reply	[flat|nested] 6+ messages in thread

* RE: [PATCH] drm/amdgpu/sdma5: do not execute 0-sized IBs (v2)
@ 2019-10-23 12:50         ` Deucher, Alexander
  0 siblings, 0 replies; 6+ messages in thread
From: Deucher, Alexander @ 2019-10-23 12:50 UTC (permalink / raw)
  To: Koenig, Christian, Pelloux-prayer, Pierre-eric, amd-gfx

> -----Original Message-----
> From: amd-gfx <amd-gfx-bounces@lists.freedesktop.org> On Behalf Of
> Christian König
> Sent: Wednesday, October 23, 2019 3:33 AM
> To: Pelloux-prayer, Pierre-eric <Pierre-eric.Pelloux-prayer@amd.com>; amd-
> gfx@lists.freedesktop.org
> Subject: Re: [PATCH] drm/amdgpu/sdma5: do not execute 0-sized IBs (v2)
> 
> Am 22.10.19 um 19:22 schrieb Pelloux-prayer, Pierre-eric:
> > This seems to help with
> https://bugs.freedesktop.org/show_bug.cgi?id=111481.
> >
> > v2: insert a NOP instead of skipping all 0-sized IBs to avoid breaking older
> hw
> >
> > Signed-off-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-
> prayer@amd.com>
> 
> Reviewed-by: Christian König <christian.koenig@amd.com>

Do nop packets have any alignment requirements on SDMA?  Some of the other packets do.

Alex

> 
> > ---
> >   drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c | 1 +
> >   1 file changed, 1 insertion(+)
> >
> > diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
> b/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
> > index fb48622c2abd..6e1b25bd1fe7 100644
> > --- a/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
> > +++ b/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
> > @@ -309,6 +309,7 @@ static void gmc_v10_0_flush_gpu_tlb(struct
> amdgpu_device *adev, uint32_t vmid,
> >
> >   	job->vm_pd_addr = amdgpu_gmc_pd_addr(adev->gart.bo);
> >   	job->vm_needs_flush = true;
> > +	job->ibs->ptr[job->ibs->length_dw++] = ring->funcs->nop;
> >   	amdgpu_ring_pad_ib(ring, &job->ibs[0]);
> >   	r = amdgpu_job_submit(job, &adev->mman.entity,
> >   			      AMDGPU_FENCE_OWNER_UNDEFINED, &fence);
> 
> _______________________________________________
> amd-gfx mailing list
> amd-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/amd-gfx
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx

^ permalink raw reply	[flat|nested] 6+ messages in thread

* Re: [PATCH] drm/amdgpu/sdma5: do not execute 0-sized IBs (v2)
@ 2019-10-23 13:01             ` Pelloux-prayer, Pierre-eric
  0 siblings, 0 replies; 6+ messages in thread
From: Pelloux-prayer, Pierre-eric @ 2019-10-23 13:01 UTC (permalink / raw)
  To: Deucher, Alexander, Koenig, Christian,
	amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW

Hi Alex,

On 23/10/2019 14:50, Deucher, Alexander wrote:
>> -----Original Message-----
>> From: amd-gfx <amd-gfx-bounces@lists.freedesktop.org> On Behalf Of
>> Christian König
>> Sent: Wednesday, October 23, 2019 3:33 AM
>> To: Pelloux-prayer, Pierre-eric <Pierre-eric.Pelloux-prayer@amd.com>; amd-
>> gfx@lists.freedesktop.org
>> Subject: Re: [PATCH] drm/amdgpu/sdma5: do not execute 0-sized IBs (v2)
>>
>> Am 22.10.19 um 19:22 schrieb Pelloux-prayer, Pierre-eric:
>>> This seems to help with
>> https://bugs.freedesktop.org/show_bug.cgi?id=111481.
>>>
>>> v2: insert a NOP instead of skipping all 0-sized IBs to avoid breaking older
>> hw
>>>
>>> Signed-off-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-
>> prayer@amd.com>
>>
>> Reviewed-by: Christian König <christian.koenig@amd.com>
> 
> Do nop packets have any alignment requirements on SDMA?  Some of the other packets do.

There's no alignment requirements for nop packets.

Pierre-Eric

> 
> Alex
> 
>>
>>> ---
>>>   drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c | 1 +
>>>   1 file changed, 1 insertion(+)
>>>
>>> diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
>> b/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
>>> index fb48622c2abd..6e1b25bd1fe7 100644
>>> --- a/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
>>> +++ b/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
>>> @@ -309,6 +309,7 @@ static void gmc_v10_0_flush_gpu_tlb(struct
>> amdgpu_device *adev, uint32_t vmid,
>>>
>>>   	job->vm_pd_addr = amdgpu_gmc_pd_addr(adev->gart.bo);
>>>   	job->vm_needs_flush = true;
>>> +	job->ibs->ptr[job->ibs->length_dw++] = ring->funcs->nop;
>>>   	amdgpu_ring_pad_ib(ring, &job->ibs[0]);
>>>   	r = amdgpu_job_submit(job, &adev->mman.entity,
>>>   			      AMDGPU_FENCE_OWNER_UNDEFINED, &fence);
>>
>> _______________________________________________
>> amd-gfx mailing list
>> amd-gfx@lists.freedesktop.org
>> https://lists.freedesktop.org/mailman/listinfo/amd-gfx
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx

^ permalink raw reply	[flat|nested] 6+ messages in thread

* Re: [PATCH] drm/amdgpu/sdma5: do not execute 0-sized IBs (v2)
@ 2019-10-23 13:01             ` Pelloux-prayer, Pierre-eric
  0 siblings, 0 replies; 6+ messages in thread
From: Pelloux-prayer, Pierre-eric @ 2019-10-23 13:01 UTC (permalink / raw)
  To: Deucher, Alexander, Koenig, Christian, amd-gfx

Hi Alex,

On 23/10/2019 14:50, Deucher, Alexander wrote:
>> -----Original Message-----
>> From: amd-gfx <amd-gfx-bounces@lists.freedesktop.org> On Behalf Of
>> Christian König
>> Sent: Wednesday, October 23, 2019 3:33 AM
>> To: Pelloux-prayer, Pierre-eric <Pierre-eric.Pelloux-prayer@amd.com>; amd-
>> gfx@lists.freedesktop.org
>> Subject: Re: [PATCH] drm/amdgpu/sdma5: do not execute 0-sized IBs (v2)
>>
>> Am 22.10.19 um 19:22 schrieb Pelloux-prayer, Pierre-eric:
>>> This seems to help with
>> https://bugs.freedesktop.org/show_bug.cgi?id=111481.
>>>
>>> v2: insert a NOP instead of skipping all 0-sized IBs to avoid breaking older
>> hw
>>>
>>> Signed-off-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-
>> prayer@amd.com>
>>
>> Reviewed-by: Christian König <christian.koenig@amd.com>
> 
> Do nop packets have any alignment requirements on SDMA?  Some of the other packets do.

There's no alignment requirements for nop packets.

Pierre-Eric

> 
> Alex
> 
>>
>>> ---
>>>   drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c | 1 +
>>>   1 file changed, 1 insertion(+)
>>>
>>> diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
>> b/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
>>> index fb48622c2abd..6e1b25bd1fe7 100644
>>> --- a/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
>>> +++ b/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
>>> @@ -309,6 +309,7 @@ static void gmc_v10_0_flush_gpu_tlb(struct
>> amdgpu_device *adev, uint32_t vmid,
>>>
>>>   	job->vm_pd_addr = amdgpu_gmc_pd_addr(adev->gart.bo);
>>>   	job->vm_needs_flush = true;
>>> +	job->ibs->ptr[job->ibs->length_dw++] = ring->funcs->nop;
>>>   	amdgpu_ring_pad_ib(ring, &job->ibs[0]);
>>>   	r = amdgpu_job_submit(job, &adev->mman.entity,
>>>   			      AMDGPU_FENCE_OWNER_UNDEFINED, &fence);
>>
>> _______________________________________________
>> amd-gfx mailing list
>> amd-gfx@lists.freedesktop.org
>> https://lists.freedesktop.org/mailman/listinfo/amd-gfx
_______________________________________________
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/amd-gfx

^ permalink raw reply	[flat|nested] 6+ messages in thread

end of thread, other threads:[~2019-10-23 13:01 UTC | newest]

Thread overview: 6+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2019-10-22 17:22 [PATCH] drm/amdgpu/sdma5: do not execute 0-sized IBs (v2) Pelloux-prayer, Pierre-eric
     [not found] ` <20191022172136.15391-1-pierre-eric.pelloux-prayer-5C7GfCeVMHo@public.gmane.org>
2019-10-23  7:33   ` Christian König
     [not found]     ` <b3ddc981-c465-b008-705a-d01e44b783e3-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2019-10-23 12:50       ` Deucher, Alexander
2019-10-23 12:50         ` Deucher, Alexander
     [not found]         ` <BN6PR12MB1809E6469D44AE818542299DF76B0-/b2+HYfkarSEx6ez0IUAagdYzm3356FpvxpqHgZTriW3zl9H0oFU5g@public.gmane.org>
2019-10-23 13:01           ` Pelloux-prayer, Pierre-eric
2019-10-23 13:01             ` Pelloux-prayer, Pierre-eric

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