From: Kishon Vijay Abraham I <kishon@ti.com>
To: Rob Herring <robh+dt@kernel.org>,
Kishon Vijay Abraham I <kishon@ti.com>,
Roger Quadros <rogerq@ti.com>, Jyri Sarha <jsarha@ti.com>
Cc: Anil Varughese <aniljoy@cadence.com>,
<linux-kernel@vger.kernel.org>, <devicetree@vger.kernel.org>
Subject: [PATCH v2 00/14] PHY: Add support for SERDES in TI's J721E SoC
Date: Wed, 23 Oct 2019 18:27:21 +0530 [thread overview]
Message-ID: <20191023125735.4713-1-kishon@ti.com> (raw)
TI's J721E SoC uses Cadence Sierra SERDES for USB, PCIe and SGMII.
TI has a wrapper named WIZ to control input signals to Sierra and
Torrent SERDES.
This patch series:
1) Add support to WIZ module present in TI's J721E SoC
2) Adapt Cadence Sierra PHY driver to be used for J721E SoC
Changes from v1:
*) Change the dt binding Documentation of WIZ wrapper to YAML format
*) Fix an issue in Sierra while doimg rmmod
Anil Varughese (1):
phy: cadence: Sierra: Configure both lane cdb and common cdb registers
for external SSC
Kishon Vijay Abraham I (13):
dt-bindings: phy: Sierra: Add bindings for Sierra in TI's J721E
phy: cadence: Sierra: Make "phy_clk" and "sierra_apb" optional
resources
phy: cadence: Sierra: Use "regmap" for read and write to Sierra
registers
phy: cadence: Sierra: Add support for SERDES_16G used in J721E SoC
phy: cadence: Sierra: Make cdns_sierra_phy_init() as phy_ops
phy: cadence: Sierra: Modify register macro names to be in sync with
Sierra user guide
phy: cadence: Sierra: Get reset control "array" for each link
phy: cadence: Sierra: Check for PLL lock during PHY power on
phy: cadence: Sierra: Change MAX_LANES of Sierra to 16
phy: cadence: Sierra: Set cmn_refclk/cmn_refclk1 frequency to 25MHz
phy: cadence: Sierra: Use correct dev pointer in
cdns_sierra_phy_remove()
dt-bindings: phy: Document WIZ (SERDES wrapper) bindings
phy: ti: j721e-wiz: Add support for WIZ module present in TI J721E SoC
.../bindings/phy/phy-cadence-sierra.txt | 13 +-
.../bindings/phy/ti,phy-j721e-wiz.yaml | 159 +++
drivers/phy/cadence/phy-cadence-sierra.c | 697 +++++++++++---
drivers/phy/ti/Kconfig | 15 +
drivers/phy/ti/Makefile | 1 +
drivers/phy/ti/phy-j721e-wiz.c | 904 ++++++++++++++++++
6 files changed, 1650 insertions(+), 139 deletions(-)
create mode 100644 Documentation/devicetree/bindings/phy/ti,phy-j721e-wiz.yaml
create mode 100644 drivers/phy/ti/phy-j721e-wiz.c
--
2.17.1
next reply other threads:[~2019-10-23 12:58 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-10-23 12:57 Kishon Vijay Abraham I [this message]
2019-10-23 12:57 ` [PATCH v2 01/14] dt-bindings: phy: Sierra: Add bindings for Sierra in TI's J721E Kishon Vijay Abraham I
2019-10-29 18:59 ` Rob Herring
2019-10-30 5:36 ` Kishon Vijay Abraham I
2019-11-05 9:40 ` Anil Joy Varughese
2019-10-23 12:57 ` [PATCH v2 02/14] phy: cadence: Sierra: Make "phy_clk" and "sierra_apb" optional resources Kishon Vijay Abraham I
2019-10-23 12:57 ` [PATCH v2 03/14] phy: cadence: Sierra: Use "regmap" for read and write to Sierra registers Kishon Vijay Abraham I
2019-10-23 12:57 ` [PATCH v2 04/14] phy: cadence: Sierra: Add support for SERDES_16G used in J721E SoC Kishon Vijay Abraham I
2019-10-23 12:57 ` [PATCH v2 05/14] phy: cadence: Sierra: Make cdns_sierra_phy_init() as phy_ops Kishon Vijay Abraham I
2019-10-23 12:57 ` [PATCH v2 06/14] phy: cadence: Sierra: Modify register macro names to be in sync with Sierra user guide Kishon Vijay Abraham I
2019-10-23 12:57 ` [PATCH v2 07/14] phy: cadence: Sierra: Configure both lane cdb and common cdb registers for external SSC Kishon Vijay Abraham I
2019-10-23 12:57 ` [PATCH v2 08/14] phy: cadence: Sierra: Get reset control "array" for each link Kishon Vijay Abraham I
2019-10-23 12:57 ` [PATCH v2 09/14] phy: cadence: Sierra: Check for PLL lock during PHY power on Kishon Vijay Abraham I
2019-10-23 12:57 ` [PATCH v2 10/14] phy: cadence: Sierra: Change MAX_LANES of Sierra to 16 Kishon Vijay Abraham I
2019-10-23 12:57 ` [PATCH v2 11/14] phy: cadence: Sierra: Set cmn_refclk/cmn_refclk1 frequency to 25MHz Kishon Vijay Abraham I
2019-10-23 12:57 ` [PATCH v2 12/14] phy: cadence: Sierra: Use correct dev pointer in cdns_sierra_phy_remove() Kishon Vijay Abraham I
2019-10-23 12:57 ` [PATCH v2 13/14] dt-bindings: phy: Document WIZ (SERDES wrapper) bindings Kishon Vijay Abraham I
2019-10-29 6:53 ` Kishon Vijay Abraham I
2019-10-29 19:08 ` Rob Herring
2019-10-30 5:45 ` Kishon Vijay Abraham I
2019-10-30 19:26 ` Rob Herring
2019-10-31 4:41 ` Kishon Vijay Abraham I
2019-10-23 12:57 ` [PATCH v2 14/14] phy: ti: j721e-wiz: Add support for WIZ module present in TI J721E SoC Kishon Vijay Abraham I
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