All of lore.kernel.org
 help / color / mirror / Atom feed
From: Ard Biesheuvel <ard.biesheuvel@linaro.org>
To: stable@vger.kernel.org
Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org>,
	Will Deacon <will@kernel.org>,
	Catalin Marinas <catalin.marinas@arm.com>,
	Marc Zyngier <maz@kernel.org>,
	Mark Rutland <mark.rutland@arm.com>,
	Suzuki K Poulose <suzuki.poulose@arm.com>,
	Jeremy Linton <jeremy.linton@arm.com>,
	Andre Przywara <andre.przywara@arm.com>,
	Alexandru Elisei <alexandru.elisei@arm.com>,
	Will Deacon <will.deacon@arm.com>,
	Dave Martin <dave.martin@arm.com>
Subject: [PATCH for-stable-4.14 22/48] arm64: capabilities: Restrict KPTI detection to boot-time CPUs
Date: Thu, 24 Oct 2019 14:48:07 +0200	[thread overview]
Message-ID: <20191024124833.4158-23-ard.biesheuvel@linaro.org> (raw)
In-Reply-To: <20191024124833.4158-1-ard.biesheuvel@linaro.org>

From: Suzuki K Poulose <suzuki.poulose@arm.com>

[ Upstream commit d3aec8a28be3b88bf75442e7c24fd9da8d69a6df ]

KPTI is treated as a system wide feature and is only detected if all
the CPUs in the sysetm needs the defense, unless it is forced via kernel
command line. This leaves a system with a mix of CPUs with and without
the defense vulnerable. Also, if a late CPU needs KPTI but KPTI was not
activated at boot time, the CPU is currently allowed to boot, which is a
potential security vulnerability.
This patch ensures that the KPTI is turned on if at least one CPU detects
the capability (i.e, change scope to SCOPE_LOCAL_CPU). Also rejetcs a late
CPU, if it requires the defense, when the system hasn't enabled it,

Cc: Will Deacon <will.deacon@arm.com>
Reviewed-by: Dave Martin <dave.martin@arm.com>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
---
 arch/arm64/include/asm/cpufeature.h |  9 +++++++++
 arch/arm64/kernel/cpufeature.c      | 16 +++++++++++-----
 2 files changed, 20 insertions(+), 5 deletions(-)

diff --git a/arch/arm64/include/asm/cpufeature.h b/arch/arm64/include/asm/cpufeature.h
index 09825b667af0..96c99b201b2f 100644
--- a/arch/arm64/include/asm/cpufeature.h
+++ b/arch/arm64/include/asm/cpufeature.h
@@ -244,6 +244,15 @@ extern struct arm64_ftr_reg arm64_ftr_reg_ctrel0;
 	 ARM64_CPUCAP_OPTIONAL_FOR_LATE_CPU	|	\
 	 ARM64_CPUCAP_PERMITTED_FOR_LATE_CPU)
 
+/*
+ * CPU feature detected at boot time, on one or more CPUs. A late CPU
+ * is not allowed to have the capability when the system doesn't have it.
+ * It is Ok for a late CPU to miss the feature.
+ */
+#define ARM64_CPUCAP_BOOT_RESTRICTED_CPU_LOCAL_FEATURE	\
+	(ARM64_CPUCAP_SCOPE_LOCAL_CPU		|	\
+	 ARM64_CPUCAP_OPTIONAL_FOR_LATE_CPU)
+
 struct arm64_cpu_capabilities {
 	const char *desc;
 	u16 capability;
diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c
index 439cdca71024..b3ebbc56bebb 100644
--- a/arch/arm64/kernel/cpufeature.c
+++ b/arch/arm64/kernel/cpufeature.c
@@ -824,10 +824,9 @@ static bool has_no_fpsimd(const struct arm64_cpu_capabilities *entry, int __unus
 static int __kpti_forced; /* 0: not forced, >0: forced on, <0: forced off */
 
 static bool unmap_kernel_at_el0(const struct arm64_cpu_capabilities *entry,
-				int __unused)
+				int scope)
 {
 	char const *str = "command line option";
-	u64 pfr0 = read_sanitised_ftr_reg(SYS_ID_AA64PFR0_EL1);
 
 	/*
 	 * For reasons that aren't entirely clear, enabling KPTI on Cavium
@@ -863,8 +862,7 @@ static bool unmap_kernel_at_el0(const struct arm64_cpu_capabilities *entry,
 	}
 
 	/* Defer to CPU feature registers */
-	return !cpuid_feature_extract_unsigned_field(pfr0,
-						     ID_AA64PFR0_CSV3_SHIFT);
+	return !has_cpuid_feature(entry, scope);
 }
 
 static void
@@ -1011,7 +1009,15 @@ static const struct arm64_cpu_capabilities arm64_features[] = {
 	{
 		.desc = "Kernel page table isolation (KPTI)",
 		.capability = ARM64_UNMAP_KERNEL_AT_EL0,
-		.type = ARM64_CPUCAP_SYSTEM_FEATURE,
+		.type = ARM64_CPUCAP_BOOT_RESTRICTED_CPU_LOCAL_FEATURE,
+		/*
+		 * The ID feature fields below are used to indicate that
+		 * the CPU doesn't need KPTI. See unmap_kernel_at_el0 for
+		 * more details.
+		 */
+		.sys_reg = SYS_ID_AA64PFR0_EL1,
+		.field_pos = ID_AA64PFR0_CSV3_SHIFT,
+		.min_field_value = 1,
 		.matches = unmap_kernel_at_el0,
 		.cpu_enable = kpti_install_ng_mappings,
 	},
-- 
2.20.1


  parent reply	other threads:[~2019-10-24 12:49 UTC|newest]

Thread overview: 59+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-10-24 12:47 [PATCH for-stable-4.14 00/48] arm64 spec mitigation backports Ard Biesheuvel
2019-10-24 12:47 ` [PATCH for-stable-4.14 01/48] arm64: sysreg: Move to use definitions for all the SCTLR bits Ard Biesheuvel
2019-10-24 12:47 ` [PATCH for-stable-4.14 02/48] arm64: Expose support for optional ARMv8-A features Ard Biesheuvel
2019-10-24 12:47 ` [PATCH for-stable-4.14 03/48] arm64: Fix the feature type for ID register fields Ard Biesheuvel
2019-10-24 12:47 ` [PATCH for-stable-4.14 04/48] arm64: v8.4: Support for new floating point multiplication instructions Ard Biesheuvel
2019-10-24 12:47 ` [PATCH for-stable-4.14 05/48] arm64: Documentation: cpu-feature-registers: Remove RES0 fields Ard Biesheuvel
2019-10-24 12:47 ` [PATCH for-stable-4.14 06/48] arm64: Expose Arm v8.4 features Ard Biesheuvel
2019-10-24 12:47 ` [PATCH for-stable-4.14 07/48] arm64: move SCTLR_EL{1,2} assertions to <asm/sysreg.h> Ard Biesheuvel
2019-10-24 12:47 ` [PATCH for-stable-4.14 08/48] arm64: add PSR_AA32_* definitions Ard Biesheuvel
2019-10-24 12:47 ` [PATCH for-stable-4.14 09/48] arm64: Introduce sysreg_clear_set() Ard Biesheuvel
2019-10-24 12:47 ` [PATCH for-stable-4.14 10/48] arm64: capabilities: Update prototype for enable call back Ard Biesheuvel
2019-10-24 12:47 ` [PATCH for-stable-4.14 11/48] arm64: capabilities: Move errata work around check on boot CPU Ard Biesheuvel
2019-10-24 12:47 ` [PATCH for-stable-4.14 12/48] arm64: capabilities: Move errata processing code Ard Biesheuvel
2019-10-24 12:47 ` [PATCH for-stable-4.14 13/48] arm64: capabilities: Prepare for fine grained capabilities Ard Biesheuvel
2019-10-24 12:47 ` [PATCH for-stable-4.14 14/48] arm64: capabilities: Add flags to handle the conflicts on late CPU Ard Biesheuvel
2019-10-24 12:48 ` [PATCH for-stable-4.14 15/48] arm64: capabilities: Unify the verification Ard Biesheuvel
2019-10-24 12:48 ` [PATCH for-stable-4.14 16/48] arm64: capabilities: Filter the entries based on a given mask Ard Biesheuvel
2019-10-24 12:48 ` [PATCH for-stable-4.14 17/48] arm64: capabilities: Prepare for grouping features and errata work arounds Ard Biesheuvel
2019-10-24 12:48 ` [PATCH for-stable-4.14 18/48] arm64: capabilities: Split the processing of " Ard Biesheuvel
2019-10-24 12:48 ` [PATCH for-stable-4.14 19/48] arm64: capabilities: Allow features based on local CPU scope Ard Biesheuvel
2019-10-24 12:48 ` [PATCH for-stable-4.14 20/48] arm64: capabilities: Group handling of features and errata workarounds Ard Biesheuvel
2019-10-24 12:48 ` [PATCH for-stable-4.14 21/48] arm64: capabilities: Introduce weak features based on local CPU Ard Biesheuvel
2019-10-24 12:48 ` Ard Biesheuvel [this message]
2019-10-24 12:48 ` [PATCH for-stable-4.14 23/48] arm64: capabilities: Add support for features enabled early Ard Biesheuvel
2019-10-24 12:48 ` [PATCH for-stable-4.14 24/48] arm64: capabilities: Change scope of VHE to Boot CPU feature Ard Biesheuvel
2019-10-24 12:48 ` [PATCH for-stable-4.14 25/48] arm64: capabilities: Clean up midr range helpers Ard Biesheuvel
2019-10-24 12:48 ` [PATCH for-stable-4.14 26/48] arm64: Add helpers for checking CPU MIDR against a range Ard Biesheuvel
2019-10-24 12:48 ` [PATCH for-stable-4.14 27/48] arm64: Add MIDR encoding for Arm Cortex-A55 and Cortex-A35 Ard Biesheuvel
2019-10-24 12:48 ` [PATCH for-stable-4.14 28/48] arm64: capabilities: Add support for checks based on a list of MIDRs Ard Biesheuvel
2019-10-24 12:48 ` [PATCH for-stable-4.14 29/48] arm64: KVM: Use SMCCC_ARCH_WORKAROUND_1 for Falkor BP hardening Ard Biesheuvel
2019-10-24 12:48 ` [PATCH for-stable-4.14 30/48] arm64: don't zero DIT on signal return Ard Biesheuvel
2019-10-24 12:48 ` [PATCH for-stable-4.14 31/48] arm64: Get rid of __smccc_workaround_1_hvc_* Ard Biesheuvel
2019-10-24 12:48 ` [PATCH for-stable-4.14 32/48] arm64: cpufeature: Detect SSBS and advertise to userspace Ard Biesheuvel
2019-10-24 12:48 ` [PATCH for-stable-4.14 33/48] arm64: ssbd: Add support for PSTATE.SSBS rather than trapping to EL3 Ard Biesheuvel
2019-10-24 12:48 ` [PATCH for-stable-4.14 34/48] KVM: arm64: Set SCTLR_EL2.DSSBS if SSBD is forcefully disabled and !vhe Ard Biesheuvel
2019-10-24 12:48 ` [PATCH for-stable-4.14 35/48] arm64: fix SSBS sanitization Ard Biesheuvel
2019-10-24 12:48 ` [PATCH for-stable-4.14 36/48] arm64: Add sysfs vulnerability show for spectre-v1 Ard Biesheuvel
2019-10-24 12:48 ` [PATCH for-stable-4.14 37/48] arm64: add sysfs vulnerability show for meltdown Ard Biesheuvel
2019-10-24 12:48 ` [PATCH for-stable-4.14 38/48] arm64: enable generic CPU vulnerabilites support Ard Biesheuvel
2019-10-24 12:48 ` [PATCH for-stable-4.14 39/48] arm64: Always enable ssb vulnerability detection Ard Biesheuvel
2019-10-24 12:48 ` [PATCH for-stable-4.14 40/48] arm64: Provide a command line to disable spectre_v2 mitigation Ard Biesheuvel
2019-10-24 12:48 ` [PATCH for-stable-4.14 41/48] arm64: Advertise mitigation of Spectre-v2, or lack thereof Ard Biesheuvel
2019-10-24 12:48 ` [PATCH for-stable-4.14 42/48] arm64: Always enable spectre-v2 vulnerability detection Ard Biesheuvel
2019-10-24 14:34   ` Alexandru Elisei
2019-10-24 14:37     ` Ard Biesheuvel
2019-10-25 15:25       ` Sasha Levin
2019-10-25 15:28         ` Ard Biesheuvel
2019-10-25 15:39           ` Ard Biesheuvel
2019-10-26  8:01             ` Greg KH
2019-10-26 15:40               ` Sasha Levin
2019-10-26 15:46                 ` Ard Biesheuvel
2019-10-27 13:39                   ` Greg KH
2019-10-27 17:39                     ` Ard Biesheuvel
2019-10-24 12:48 ` [PATCH for-stable-4.14 43/48] arm64: add sysfs vulnerability show for spectre-v2 Ard Biesheuvel
2019-10-24 12:48 ` [PATCH for-stable-4.14 44/48] arm64: add sysfs vulnerability show for speculative store bypass Ard Biesheuvel
2019-10-24 12:48 ` [PATCH for-stable-4.14 45/48] arm64: ssbs: Don't treat CPUs with SSBS as unaffected by SSB Ard Biesheuvel
2019-10-24 12:48 ` [PATCH for-stable-4.14 46/48] arm64: Force SSBS on context switch Ard Biesheuvel
2019-10-24 12:48 ` [PATCH for-stable-4.14 47/48] arm64: Use firmware to detect CPUs that are not affected by Spectre-v2 Ard Biesheuvel
2019-10-24 12:48 ` [PATCH for-stable-4.14 48/48] arm64/speculation: Support 'mitigations=' cmdline option Ard Biesheuvel

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20191024124833.4158-23-ard.biesheuvel@linaro.org \
    --to=ard.biesheuvel@linaro.org \
    --cc=alexandru.elisei@arm.com \
    --cc=andre.przywara@arm.com \
    --cc=catalin.marinas@arm.com \
    --cc=dave.martin@arm.com \
    --cc=jeremy.linton@arm.com \
    --cc=mark.rutland@arm.com \
    --cc=maz@kernel.org \
    --cc=stable@vger.kernel.org \
    --cc=suzuki.poulose@arm.com \
    --cc=will.deacon@arm.com \
    --cc=will@kernel.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.