* [Intel-gfx] [PATCH 1/6] drm/i915: Fix i845/i865 cursor width
@ 2019-10-28 11:30 ` Ville Syrjala
0 siblings, 0 replies; 29+ messages in thread
From: Ville Syrjala @ 2019-10-28 11:30 UTC (permalink / raw)
To: intel-gfx
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
The change from the uapi coordinates to the internal coordinates
broke the cursor on i845/i865 due to src and dst getting swapped.
Fix it.
Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Fixes: 3a612765f423 ("drm/i915: Remove cursor use of properties for coordinates")
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/intel_display.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 0f0c582a56d5..47a3aef0fb61 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -10947,7 +10947,7 @@ static void i845_update_cursor(struct intel_plane *plane,
unsigned long irqflags;
if (plane_state && plane_state->base.visible) {
- unsigned int width = drm_rect_width(&plane_state->base.src);
+ unsigned int width = drm_rect_width(&plane_state->base.dst);
unsigned int height = drm_rect_height(&plane_state->base.dst);
cntl = plane_state->ctl |
--
2.21.0
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^ permalink raw reply related [flat|nested] 29+ messages in thread
* [PATCH 2/6] drm/i915: Fix max cursor size for i915g/gm
@ 2019-10-28 11:30 ` Ville Syrjala
0 siblings, 0 replies; 29+ messages in thread
From: Ville Syrjala @ 2019-10-28 11:30 UTC (permalink / raw)
To: intel-gfx
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Apparently the 128x128 and 256x256 ARGB cursor modes were
only added on LPT/CST.
While the display section of bspec isn't super clear on the
subject, it does highlight these two modes in a different
color, has a few changlog entries indicating the 256x256 mode
was added for a LPT DCN, and that the 128x128 mode was also
added later (though no DCN/platform note there).
The "device dependencies" bspec section does list the 256x256x32
as a new feature for LPT/CST, and goes on to mention that current
hw only has the 64x64x32 mode (which reinforces the notion that
the 128x128 mode was also added at the same time).
Testing on actual hardware confirms all of this. CI shows all
the 128x128 and 256x256 tests failing on GDG, and my ALV
definitely doesn't like them.
So we shall limit GDG/ALV to 64x64 only. And while at it
let's adjust the mobile gen2 case to list the two platforms
explicitly so that the if-ladder looks reasonably uniform.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/intel_display.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 47a3aef0fb61..c564ceefe2ca 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -16809,7 +16809,8 @@ static void intel_mode_config_init(struct drm_i915_private *i915)
if (IS_I845G(i915) || IS_I865G(i915)) {
mode_config->cursor_width = IS_I845G(i915) ? 64 : 512;
mode_config->cursor_height = 1023;
- } else if (IS_GEN(i915, 2)) {
+ } else if (IS_I830(i915) || IS_I85X(i915) ||
+ IS_I915G(i915) || IS_I915GM(i915)) {
mode_config->cursor_width = 64;
mode_config->cursor_height = 64;
} else {
--
2.21.0
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^ permalink raw reply related [flat|nested] 29+ messages in thread
* [Intel-gfx] [PATCH 2/6] drm/i915: Fix max cursor size for i915g/gm
@ 2019-10-28 11:30 ` Ville Syrjala
0 siblings, 0 replies; 29+ messages in thread
From: Ville Syrjala @ 2019-10-28 11:30 UTC (permalink / raw)
To: intel-gfx
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Apparently the 128x128 and 256x256 ARGB cursor modes were
only added on LPT/CST.
While the display section of bspec isn't super clear on the
subject, it does highlight these two modes in a different
color, has a few changlog entries indicating the 256x256 mode
was added for a LPT DCN, and that the 128x128 mode was also
added later (though no DCN/platform note there).
The "device dependencies" bspec section does list the 256x256x32
as a new feature for LPT/CST, and goes on to mention that current
hw only has the 64x64x32 mode (which reinforces the notion that
the 128x128 mode was also added at the same time).
Testing on actual hardware confirms all of this. CI shows all
the 128x128 and 256x256 tests failing on GDG, and my ALV
definitely doesn't like them.
So we shall limit GDG/ALV to 64x64 only. And while at it
let's adjust the mobile gen2 case to list the two platforms
explicitly so that the if-ladder looks reasonably uniform.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/intel_display.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 47a3aef0fb61..c564ceefe2ca 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -16809,7 +16809,8 @@ static void intel_mode_config_init(struct drm_i915_private *i915)
if (IS_I845G(i915) || IS_I865G(i915)) {
mode_config->cursor_width = IS_I845G(i915) ? 64 : 512;
mode_config->cursor_height = 1023;
- } else if (IS_GEN(i915, 2)) {
+ } else if (IS_I830(i915) || IS_I85X(i915) ||
+ IS_I915G(i915) || IS_I915GM(i915)) {
mode_config->cursor_width = 64;
mode_config->cursor_height = 64;
} else {
--
2.21.0
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^ permalink raw reply related [flat|nested] 29+ messages in thread
* Re: [Intel-gfx] [PATCH 2/6] drm/i915: Fix max cursor size for i915g/gm
2019-10-28 11:30 ` [Intel-gfx] " Ville Syrjala
(?)
@ 2020-05-15 16:31 ` Chris Wilson
-1 siblings, 0 replies; 29+ messages in thread
From: Chris Wilson @ 2020-05-15 16:31 UTC (permalink / raw)
To: Ville Syrjala, intel-gfx
Quoting Ville Syrjala (2019-10-28 11:30:32)
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> Apparently the 128x128 and 256x256 ARGB cursor modes were
> only added on LPT/CST.
>
> While the display section of bspec isn't super clear on the
> subject, it does highlight these two modes in a different
> color, has a few changlog entries indicating the 256x256 mode
> was added for a LPT DCN, and that the 128x128 mode was also
> added later (though no DCN/platform note there).
>
> The "device dependencies" bspec section does list the 256x256x32
> as a new feature for LPT/CST, and goes on to mention that current
> hw only has the 64x64x32 mode (which reinforces the notion that
> the 128x128 mode was also added at the same time).
>
> Testing on actual hardware confirms all of this. CI shows all
> the 128x128 and 256x256 tests failing on GDG, and my ALV
> definitely doesn't like them.
>
> So we shall limit GDG/ALV to 64x64 only. And while at it
> let's adjust the mobile gen2 case to list the two platforms
> explicitly so that the if-ladder looks reasonably uniform.
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Acked-by: Chris Wilson <chris@chris-wilson.co.uk>
-Chris
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^ permalink raw reply [flat|nested] 29+ messages in thread
* [PATCH 3/6] drm/i915: Fix overlay colorkey for 30bpp and 8bpp
@ 2019-10-28 11:30 ` Ville Syrjala
0 siblings, 0 replies; 29+ messages in thread
From: Ville Syrjala @ 2019-10-28 11:30 UTC (permalink / raw)
To: intel-gfx
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
As with the video sprites the colorkey is always specified
as 8bpc. For 10bpc primary plane formats we just ignore the
two lsbs of each component. For C8 we'll replicate the same
key to each chanel, which is what the hardware wants.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/intel_overlay.c | 14 +++++++++++---
1 file changed, 11 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_overlay.c b/drivers/gpu/drm/i915/display/intel_overlay.c
index 848ce07a8ec2..23829374f751 100644
--- a/drivers/gpu/drm/i915/display/intel_overlay.c
+++ b/drivers/gpu/drm/i915/display/intel_overlay.c
@@ -101,12 +101,15 @@
#define CLK_RGB24_MASK 0x0
#define CLK_RGB16_MASK 0x070307
#define CLK_RGB15_MASK 0x070707
-#define CLK_RGB8I_MASK 0xffffff
+#define RGB30_TO_COLORKEY(c) \
+ (((c & 0x3FC00000) >> 6) | ((c & 0x000FF000) >> 4) | ((c & 0x000003FC) >> 2))
#define RGB16_TO_COLORKEY(c) \
(((c & 0xF800) << 8) | ((c & 0x07E0) << 5) | ((c & 0x001F) << 3))
#define RGB15_TO_COLORKEY(c) \
(((c & 0x7c00) << 9) | ((c & 0x03E0) << 6) | ((c & 0x001F) << 3))
+#define RGB8I_TO_COLORKEY(c) \
+ (((c & 0xFF) << 16) | ((c & 0XFF) << 8) | ((c & 0xFF) << 0))
/* overlay flip addr flag */
#define OFC_UPDATE 0x1
@@ -673,8 +676,8 @@ static void update_colorkey(struct intel_overlay *overlay,
switch (format) {
case DRM_FORMAT_C8:
- key = 0;
- flags |= CLK_RGB8I_MASK;
+ key = RGB8I_TO_COLORKEY(key);
+ flags |= CLK_RGB24_MASK;
break;
case DRM_FORMAT_XRGB1555:
key = RGB15_TO_COLORKEY(key);
@@ -684,6 +687,11 @@ static void update_colorkey(struct intel_overlay *overlay,
key = RGB16_TO_COLORKEY(key);
flags |= CLK_RGB16_MASK;
break;
+ case DRM_FORMAT_XRGB2101010:
+ case DRM_FORMAT_XBGR2101010:
+ key = RGB30_TO_COLORKEY(key);
+ flags |= CLK_RGB24_MASK;
+ break;
default:
flags |= CLK_RGB24_MASK;
break;
--
2.21.0
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^ permalink raw reply related [flat|nested] 29+ messages in thread
* [Intel-gfx] [PATCH 3/6] drm/i915: Fix overlay colorkey for 30bpp and 8bpp
@ 2019-10-28 11:30 ` Ville Syrjala
0 siblings, 0 replies; 29+ messages in thread
From: Ville Syrjala @ 2019-10-28 11:30 UTC (permalink / raw)
To: intel-gfx
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
As with the video sprites the colorkey is always specified
as 8bpc. For 10bpc primary plane formats we just ignore the
two lsbs of each component. For C8 we'll replicate the same
key to each chanel, which is what the hardware wants.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/intel_overlay.c | 14 +++++++++++---
1 file changed, 11 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_overlay.c b/drivers/gpu/drm/i915/display/intel_overlay.c
index 848ce07a8ec2..23829374f751 100644
--- a/drivers/gpu/drm/i915/display/intel_overlay.c
+++ b/drivers/gpu/drm/i915/display/intel_overlay.c
@@ -101,12 +101,15 @@
#define CLK_RGB24_MASK 0x0
#define CLK_RGB16_MASK 0x070307
#define CLK_RGB15_MASK 0x070707
-#define CLK_RGB8I_MASK 0xffffff
+#define RGB30_TO_COLORKEY(c) \
+ (((c & 0x3FC00000) >> 6) | ((c & 0x000FF000) >> 4) | ((c & 0x000003FC) >> 2))
#define RGB16_TO_COLORKEY(c) \
(((c & 0xF800) << 8) | ((c & 0x07E0) << 5) | ((c & 0x001F) << 3))
#define RGB15_TO_COLORKEY(c) \
(((c & 0x7c00) << 9) | ((c & 0x03E0) << 6) | ((c & 0x001F) << 3))
+#define RGB8I_TO_COLORKEY(c) \
+ (((c & 0xFF) << 16) | ((c & 0XFF) << 8) | ((c & 0xFF) << 0))
/* overlay flip addr flag */
#define OFC_UPDATE 0x1
@@ -673,8 +676,8 @@ static void update_colorkey(struct intel_overlay *overlay,
switch (format) {
case DRM_FORMAT_C8:
- key = 0;
- flags |= CLK_RGB8I_MASK;
+ key = RGB8I_TO_COLORKEY(key);
+ flags |= CLK_RGB24_MASK;
break;
case DRM_FORMAT_XRGB1555:
key = RGB15_TO_COLORKEY(key);
@@ -684,6 +687,11 @@ static void update_colorkey(struct intel_overlay *overlay,
key = RGB16_TO_COLORKEY(key);
flags |= CLK_RGB16_MASK;
break;
+ case DRM_FORMAT_XRGB2101010:
+ case DRM_FORMAT_XBGR2101010:
+ key = RGB30_TO_COLORKEY(key);
+ flags |= CLK_RGB24_MASK;
+ break;
default:
flags |= CLK_RGB24_MASK;
break;
--
2.21.0
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^ permalink raw reply related [flat|nested] 29+ messages in thread
* Re: [Intel-gfx] [PATCH 3/6] drm/i915: Fix overlay colorkey for 30bpp and 8bpp
2019-10-28 11:30 ` [Intel-gfx] " Ville Syrjala
(?)
@ 2020-05-15 16:38 ` Chris Wilson
-1 siblings, 0 replies; 29+ messages in thread
From: Chris Wilson @ 2020-05-15 16:38 UTC (permalink / raw)
To: Ville Syrjala, intel-gfx
Quoting Ville Syrjala (2019-10-28 11:30:33)
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> As with the video sprites the colorkey is always specified
> as 8bpc.
> For 10bpc primary plane formats we just ignore the
> two lsbs of each component.
Sensible.
> For C8 we'll replicate the same
> key to each chanel, which is what the hardware wants.
Gray, ok.
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_overlay.c | 14 +++++++++++---
> 1 file changed, 11 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_overlay.c b/drivers/gpu/drm/i915/display/intel_overlay.c
> index 848ce07a8ec2..23829374f751 100644
> --- a/drivers/gpu/drm/i915/display/intel_overlay.c
> +++ b/drivers/gpu/drm/i915/display/intel_overlay.c
> @@ -101,12 +101,15 @@
> #define CLK_RGB24_MASK 0x0
> #define CLK_RGB16_MASK 0x070307
> #define CLK_RGB15_MASK 0x070707
> -#define CLK_RGB8I_MASK 0xffffff
>
> +#define RGB30_TO_COLORKEY(c) \
> + (((c & 0x3FC00000) >> 6) | ((c & 0x000FF000) >> 4) | ((c & 0x000003FC) >> 2))
0x00ff00000 0x0000ff00 0x000000ff
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-Chris
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^ permalink raw reply [flat|nested] 29+ messages in thread
* [PATCH 4/6] drm/i915: Configure overlay cc_out precision based on crtc gamma config
@ 2019-10-28 11:30 ` Ville Syrjala
0 siblings, 0 replies; 29+ messages in thread
From: Ville Syrjala @ 2019-10-28 11:30 UTC (permalink / raw)
To: intel-gfx
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Put the overlay color conversion unit into 10bit mode if the
pipe isn't using the 8bit legacy gamma. Not 100% sure this is
what the intention of the bit was but makes at least some sense to
me.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/intel_overlay.c | 8 ++++++--
1 file changed, 6 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_overlay.c b/drivers/gpu/drm/i915/display/intel_overlay.c
index 23829374f751..e51592e35efe 100644
--- a/drivers/gpu/drm/i915/display/intel_overlay.c
+++ b/drivers/gpu/drm/i915/display/intel_overlay.c
@@ -777,9 +777,13 @@ static int intel_overlay_do_put_image(struct intel_overlay *overlay,
intel_frontbuffer_flush(new_bo->frontbuffer, ORIGIN_DIRTYFB);
if (!overlay->active) {
- u32 oconfig;
+ const struct intel_crtc_state *crtc_state =
+ overlay->crtc->config;
+ u32 oconfig = 0;
- oconfig = OCONF_CC_OUT_8BIT;
+ if (crtc_state->gamma_enable &&
+ crtc_state->gamma_mode == GAMMA_MODE_MODE_8BIT)
+ oconfig |= OCONF_CC_OUT_8BIT;
if (IS_GEN(dev_priv, 4))
oconfig |= OCONF_CSC_MODE_BT709;
oconfig |= pipe == 0 ?
--
2.21.0
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^ permalink raw reply related [flat|nested] 29+ messages in thread
* [Intel-gfx] [PATCH 4/6] drm/i915: Configure overlay cc_out precision based on crtc gamma config
@ 2019-10-28 11:30 ` Ville Syrjala
0 siblings, 0 replies; 29+ messages in thread
From: Ville Syrjala @ 2019-10-28 11:30 UTC (permalink / raw)
To: intel-gfx
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Put the overlay color conversion unit into 10bit mode if the
pipe isn't using the 8bit legacy gamma. Not 100% sure this is
what the intention of the bit was but makes at least some sense to
me.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/intel_overlay.c | 8 ++++++--
1 file changed, 6 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_overlay.c b/drivers/gpu/drm/i915/display/intel_overlay.c
index 23829374f751..e51592e35efe 100644
--- a/drivers/gpu/drm/i915/display/intel_overlay.c
+++ b/drivers/gpu/drm/i915/display/intel_overlay.c
@@ -777,9 +777,13 @@ static int intel_overlay_do_put_image(struct intel_overlay *overlay,
intel_frontbuffer_flush(new_bo->frontbuffer, ORIGIN_DIRTYFB);
if (!overlay->active) {
- u32 oconfig;
+ const struct intel_crtc_state *crtc_state =
+ overlay->crtc->config;
+ u32 oconfig = 0;
- oconfig = OCONF_CC_OUT_8BIT;
+ if (crtc_state->gamma_enable &&
+ crtc_state->gamma_mode == GAMMA_MODE_MODE_8BIT)
+ oconfig |= OCONF_CC_OUT_8BIT;
if (IS_GEN(dev_priv, 4))
oconfig |= OCONF_CSC_MODE_BT709;
oconfig |= pipe == 0 ?
--
2.21.0
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^ permalink raw reply related [flat|nested] 29+ messages in thread
* Re: [Intel-gfx] [PATCH 4/6] drm/i915: Configure overlay cc_out precision based on crtc gamma config
2019-10-28 11:30 ` [Intel-gfx] " Ville Syrjala
(?)
@ 2020-05-15 16:40 ` Chris Wilson
-1 siblings, 0 replies; 29+ messages in thread
From: Chris Wilson @ 2020-05-15 16:40 UTC (permalink / raw)
To: Ville Syrjala, intel-gfx
Quoting Ville Syrjala (2019-10-28 11:30:34)
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> Put the overlay color conversion unit into 10bit mode if the
> pipe isn't using the 8bit legacy gamma. Not 100% sure this is
> what the intention of the bit was but makes at least some sense to
> me.
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
It has 2 chances.
Acked-by: Chris Wilson <chris@chris-wilson.co.uk>
-Chris
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^ permalink raw reply [flat|nested] 29+ messages in thread
* [PATCH 5/6] drm/i915: Enable pipe gamma for the overlay
@ 2019-10-28 11:30 ` Ville Syrjala
0 siblings, 0 replies; 29+ messages in thread
From: Ville Syrjala @ 2019-10-28 11:30 UTC (permalink / raw)
To: intel-gfx
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
We pass the plane data through the pipe gamma for all the other
planes. Can't see why we should treat the overlay differently,
so let's enable pipe gamma for it as well.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/intel_overlay.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_overlay.c b/drivers/gpu/drm/i915/display/intel_overlay.c
index e51592e35efe..3241cc98e251 100644
--- a/drivers/gpu/drm/i915/display/intel_overlay.c
+++ b/drivers/gpu/drm/i915/display/intel_overlay.c
@@ -784,6 +784,8 @@ static int intel_overlay_do_put_image(struct intel_overlay *overlay,
if (crtc_state->gamma_enable &&
crtc_state->gamma_mode == GAMMA_MODE_MODE_8BIT)
oconfig |= OCONF_CC_OUT_8BIT;
+ if (crtc_state->gamma_enable)
+ oconfig |= OCONF_GAMMA2_ENABLE;
if (IS_GEN(dev_priv, 4))
oconfig |= OCONF_CSC_MODE_BT709;
oconfig |= pipe == 0 ?
--
2.21.0
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^ permalink raw reply related [flat|nested] 29+ messages in thread
* [Intel-gfx] [PATCH 5/6] drm/i915: Enable pipe gamma for the overlay
@ 2019-10-28 11:30 ` Ville Syrjala
0 siblings, 0 replies; 29+ messages in thread
From: Ville Syrjala @ 2019-10-28 11:30 UTC (permalink / raw)
To: intel-gfx
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
We pass the plane data through the pipe gamma for all the other
planes. Can't see why we should treat the overlay differently,
so let's enable pipe gamma for it as well.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/intel_overlay.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_overlay.c b/drivers/gpu/drm/i915/display/intel_overlay.c
index e51592e35efe..3241cc98e251 100644
--- a/drivers/gpu/drm/i915/display/intel_overlay.c
+++ b/drivers/gpu/drm/i915/display/intel_overlay.c
@@ -784,6 +784,8 @@ static int intel_overlay_do_put_image(struct intel_overlay *overlay,
if (crtc_state->gamma_enable &&
crtc_state->gamma_mode == GAMMA_MODE_MODE_8BIT)
oconfig |= OCONF_CC_OUT_8BIT;
+ if (crtc_state->gamma_enable)
+ oconfig |= OCONF_GAMMA2_ENABLE;
if (IS_GEN(dev_priv, 4))
oconfig |= OCONF_CSC_MODE_BT709;
oconfig |= pipe == 0 ?
--
2.21.0
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^ permalink raw reply related [flat|nested] 29+ messages in thread
* Re: [Intel-gfx] [PATCH 5/6] drm/i915: Enable pipe gamma for the overlay
2019-10-28 11:30 ` [Intel-gfx] " Ville Syrjala
(?)
@ 2020-05-15 16:40 ` Chris Wilson
-1 siblings, 0 replies; 29+ messages in thread
From: Chris Wilson @ 2020-05-15 16:40 UTC (permalink / raw)
To: Ville Syrjala, intel-gfx
Quoting Ville Syrjala (2019-10-28 11:30:35)
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> We pass the plane data through the pipe gamma for all the other
> planes. Can't see why we should treat the overlay differently,
> so let's enable pipe gamma for it as well.
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_overlay.c | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_overlay.c b/drivers/gpu/drm/i915/display/intel_overlay.c
> index e51592e35efe..3241cc98e251 100644
> --- a/drivers/gpu/drm/i915/display/intel_overlay.c
> +++ b/drivers/gpu/drm/i915/display/intel_overlay.c
> @@ -784,6 +784,8 @@ static int intel_overlay_do_put_image(struct intel_overlay *overlay,
> if (crtc_state->gamma_enable &&
> crtc_state->gamma_mode == GAMMA_MODE_MODE_8BIT)
> oconfig |= OCONF_CC_OUT_8BIT;
> + if (crtc_state->gamma_enable)
> + oconfig |= OCONF_GAMMA2_ENABLE;
Makes sense,
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-Chris
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^ permalink raw reply [flat|nested] 29+ messages in thread
* [PATCH 6/6] drm/i915: Protect overlay colorkey macro arguments
@ 2019-10-28 11:30 ` Ville Syrjala
0 siblings, 0 replies; 29+ messages in thread
From: Ville Syrjala @ 2019-10-28 11:30 UTC (permalink / raw)
To: intel-gfx
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Put the customary () around the macro argument in the overlay
colorkey macros. And while at switch to using a consistent
case for the hex constants.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/intel_overlay.c | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_overlay.c b/drivers/gpu/drm/i915/display/intel_overlay.c
index 3241cc98e251..4bc07c1057e2 100644
--- a/drivers/gpu/drm/i915/display/intel_overlay.c
+++ b/drivers/gpu/drm/i915/display/intel_overlay.c
@@ -103,13 +103,13 @@
#define CLK_RGB15_MASK 0x070707
#define RGB30_TO_COLORKEY(c) \
- (((c & 0x3FC00000) >> 6) | ((c & 0x000FF000) >> 4) | ((c & 0x000003FC) >> 2))
+ ((((c) & 0x3fc00000) >> 6) | (((c) & 0x000ff000) >> 4) | (((c) & 0x000003fc) >> 2))
#define RGB16_TO_COLORKEY(c) \
- (((c & 0xF800) << 8) | ((c & 0x07E0) << 5) | ((c & 0x001F) << 3))
+ ((((c) & 0xf800) << 8) | (((c) & 0x07e0) << 5) | (((c) & 0x001f) << 3))
#define RGB15_TO_COLORKEY(c) \
- (((c & 0x7c00) << 9) | ((c & 0x03E0) << 6) | ((c & 0x001F) << 3))
+ ((((c) & 0x7c00) << 9) | (((c) & 0x03e0) << 6) | (((c) & 0x001f) << 3))
#define RGB8I_TO_COLORKEY(c) \
- (((c & 0xFF) << 16) | ((c & 0XFF) << 8) | ((c & 0xFF) << 0))
+ ((((c) & 0xff) << 16) | (((c) & 0xff) << 8) | (((c) & 0xff) << 0))
/* overlay flip addr flag */
#define OFC_UPDATE 0x1
--
2.21.0
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^ permalink raw reply related [flat|nested] 29+ messages in thread
* [Intel-gfx] [PATCH 6/6] drm/i915: Protect overlay colorkey macro arguments
@ 2019-10-28 11:30 ` Ville Syrjala
0 siblings, 0 replies; 29+ messages in thread
From: Ville Syrjala @ 2019-10-28 11:30 UTC (permalink / raw)
To: intel-gfx
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Put the customary () around the macro argument in the overlay
colorkey macros. And while at switch to using a consistent
case for the hex constants.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/intel_overlay.c | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_overlay.c b/drivers/gpu/drm/i915/display/intel_overlay.c
index 3241cc98e251..4bc07c1057e2 100644
--- a/drivers/gpu/drm/i915/display/intel_overlay.c
+++ b/drivers/gpu/drm/i915/display/intel_overlay.c
@@ -103,13 +103,13 @@
#define CLK_RGB15_MASK 0x070707
#define RGB30_TO_COLORKEY(c) \
- (((c & 0x3FC00000) >> 6) | ((c & 0x000FF000) >> 4) | ((c & 0x000003FC) >> 2))
+ ((((c) & 0x3fc00000) >> 6) | (((c) & 0x000ff000) >> 4) | (((c) & 0x000003fc) >> 2))
#define RGB16_TO_COLORKEY(c) \
- (((c & 0xF800) << 8) | ((c & 0x07E0) << 5) | ((c & 0x001F) << 3))
+ ((((c) & 0xf800) << 8) | (((c) & 0x07e0) << 5) | (((c) & 0x001f) << 3))
#define RGB15_TO_COLORKEY(c) \
- (((c & 0x7c00) << 9) | ((c & 0x03E0) << 6) | ((c & 0x001F) << 3))
+ ((((c) & 0x7c00) << 9) | (((c) & 0x03e0) << 6) | (((c) & 0x001f) << 3))
#define RGB8I_TO_COLORKEY(c) \
- (((c & 0xFF) << 16) | ((c & 0XFF) << 8) | ((c & 0xFF) << 0))
+ ((((c) & 0xff) << 16) | (((c) & 0xff) << 8) | (((c) & 0xff) << 0))
/* overlay flip addr flag */
#define OFC_UPDATE 0x1
--
2.21.0
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^ permalink raw reply related [flat|nested] 29+ messages in thread
* Re: [Intel-gfx] [PATCH 6/6] drm/i915: Protect overlay colorkey macro arguments
2019-10-28 11:30 ` [Intel-gfx] " Ville Syrjala
(?)
@ 2020-05-15 16:41 ` Chris Wilson
-1 siblings, 0 replies; 29+ messages in thread
From: Chris Wilson @ 2020-05-15 16:41 UTC (permalink / raw)
To: Ville Syrjala, intel-gfx
Quoting Ville Syrjala (2019-10-28 11:30:36)
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> Put the customary () around the macro argument in the overlay
> colorkey macros. And while at switch to using a consistent
> case for the hex constants.
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_overlay.c | 8 ++++----
> 1 file changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_overlay.c b/drivers/gpu/drm/i915/display/intel_overlay.c
> index 3241cc98e251..4bc07c1057e2 100644
> --- a/drivers/gpu/drm/i915/display/intel_overlay.c
> +++ b/drivers/gpu/drm/i915/display/intel_overlay.c
> @@ -103,13 +103,13 @@
> #define CLK_RGB15_MASK 0x070707
>
> #define RGB30_TO_COLORKEY(c) \
> - (((c & 0x3FC00000) >> 6) | ((c & 0x000FF000) >> 4) | ((c & 0x000003FC) >> 2))
> + ((((c) & 0x3fc00000) >> 6) | (((c) & 0x000ff000) >> 4) | (((c) & 0x000003fc) >> 2))
> #define RGB16_TO_COLORKEY(c) \
> - (((c & 0xF800) << 8) | ((c & 0x07E0) << 5) | ((c & 0x001F) << 3))
> + ((((c) & 0xf800) << 8) | (((c) & 0x07e0) << 5) | (((c) & 0x001f) << 3))
> #define RGB15_TO_COLORKEY(c) \
> - (((c & 0x7c00) << 9) | ((c & 0x03E0) << 6) | ((c & 0x001F) << 3))
> + ((((c) & 0x7c00) << 9) | (((c) & 0x03e0) << 6) | (((c) & 0x001f) << 3))
> #define RGB8I_TO_COLORKEY(c) \
> - (((c & 0xFF) << 16) | ((c & 0XFF) << 8) | ((c & 0xFF) << 0))
> + ((((c) & 0xff) << 16) | (((c) & 0xff) << 8) | (((c) & 0xff) << 0))
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-Chris
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^ permalink raw reply [flat|nested] 29+ messages in thread
* Re: [PATCH 1/6] drm/i915: Fix i845/i865 cursor width
@ 2019-10-28 14:20 ` Maarten Lankhorst
0 siblings, 0 replies; 29+ messages in thread
From: Maarten Lankhorst @ 2019-10-28 14:20 UTC (permalink / raw)
To: Ville Syrjala, intel-gfx
Op 28-10-2019 om 12:30 schreef Ville Syrjala:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> The change from the uapi coordinates to the internal coordinates
> broke the cursor on i845/i865 due to src and dst getting swapped.
> Fix it.
>
> Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
> Fixes: 3a612765f423 ("drm/i915: Remove cursor use of properties for coordinates")
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_display.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> index 0f0c582a56d5..47a3aef0fb61 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -10947,7 +10947,7 @@ static void i845_update_cursor(struct intel_plane *plane,
> unsigned long irqflags;
>
> if (plane_state && plane_state->base.visible) {
> - unsigned int width = drm_rect_width(&plane_state->base.src);
> + unsigned int width = drm_rect_width(&plane_state->base.dst);
> unsigned int height = drm_rect_height(&plane_state->base.dst);
>
> cntl = plane_state->ctl |
Yeah, I guess theoretically fixes, should be ok regardless because no scaling is supported on the cursor so rectangles are identical. :)
Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
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^ permalink raw reply [flat|nested] 29+ messages in thread
* Re: [Intel-gfx] [PATCH 1/6] drm/i915: Fix i845/i865 cursor width
@ 2019-10-28 14:20 ` Maarten Lankhorst
0 siblings, 0 replies; 29+ messages in thread
From: Maarten Lankhorst @ 2019-10-28 14:20 UTC (permalink / raw)
To: Ville Syrjala, intel-gfx
Op 28-10-2019 om 12:30 schreef Ville Syrjala:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> The change from the uapi coordinates to the internal coordinates
> broke the cursor on i845/i865 due to src and dst getting swapped.
> Fix it.
>
> Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
> Fixes: 3a612765f423 ("drm/i915: Remove cursor use of properties for coordinates")
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_display.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> index 0f0c582a56d5..47a3aef0fb61 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -10947,7 +10947,7 @@ static void i845_update_cursor(struct intel_plane *plane,
> unsigned long irqflags;
>
> if (plane_state && plane_state->base.visible) {
> - unsigned int width = drm_rect_width(&plane_state->base.src);
> + unsigned int width = drm_rect_width(&plane_state->base.dst);
> unsigned int height = drm_rect_height(&plane_state->base.dst);
>
> cntl = plane_state->ctl |
Yeah, I guess theoretically fixes, should be ok regardless because no scaling is supported on the cursor so rectangles are identical. :)
Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
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^ permalink raw reply [flat|nested] 29+ messages in thread
* Re: [PATCH 1/6] drm/i915: Fix i845/i865 cursor width
@ 2019-10-28 15:05 ` Ville Syrjälä
0 siblings, 0 replies; 29+ messages in thread
From: Ville Syrjälä @ 2019-10-28 15:05 UTC (permalink / raw)
To: Maarten Lankhorst; +Cc: intel-gfx
On Mon, Oct 28, 2019 at 03:20:34PM +0100, Maarten Lankhorst wrote:
> Op 28-10-2019 om 12:30 schreef Ville Syrjala:
> > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> >
> > The change from the uapi coordinates to the internal coordinates
> > broke the cursor on i845/i865 due to src and dst getting swapped.
> > Fix it.
> >
> > Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
> > Fixes: 3a612765f423 ("drm/i915: Remove cursor use of properties for coordinates")
> > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > ---
> > drivers/gpu/drm/i915/display/intel_display.c | 2 +-
> > 1 file changed, 1 insertion(+), 1 deletion(-)
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> > index 0f0c582a56d5..47a3aef0fb61 100644
> > --- a/drivers/gpu/drm/i915/display/intel_display.c
> > +++ b/drivers/gpu/drm/i915/display/intel_display.c
> > @@ -10947,7 +10947,7 @@ static void i845_update_cursor(struct intel_plane *plane,
> > unsigned long irqflags;
> >
> > if (plane_state && plane_state->base.visible) {
> > - unsigned int width = drm_rect_width(&plane_state->base.src);
> > + unsigned int width = drm_rect_width(&plane_state->base.dst);
> > unsigned int height = drm_rect_height(&plane_state->base.dst);
> >
> > cntl = plane_state->ctl |
>
> Yeah, I guess theoretically fixes, should be ok regardless because no scaling is supported on the cursor so rectangles are identical. :)
No. One is .16 fixed point other is integer. Ie. totally broken atm,
as proven by the cursor being smeared over the whole screen on my i865.
>
> Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
--
Ville Syrjälä
Intel
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^ permalink raw reply [flat|nested] 29+ messages in thread
* Re: [Intel-gfx] [PATCH 1/6] drm/i915: Fix i845/i865 cursor width
@ 2019-10-28 15:05 ` Ville Syrjälä
0 siblings, 0 replies; 29+ messages in thread
From: Ville Syrjälä @ 2019-10-28 15:05 UTC (permalink / raw)
To: Maarten Lankhorst; +Cc: intel-gfx
On Mon, Oct 28, 2019 at 03:20:34PM +0100, Maarten Lankhorst wrote:
> Op 28-10-2019 om 12:30 schreef Ville Syrjala:
> > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> >
> > The change from the uapi coordinates to the internal coordinates
> > broke the cursor on i845/i865 due to src and dst getting swapped.
> > Fix it.
> >
> > Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
> > Fixes: 3a612765f423 ("drm/i915: Remove cursor use of properties for coordinates")
> > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > ---
> > drivers/gpu/drm/i915/display/intel_display.c | 2 +-
> > 1 file changed, 1 insertion(+), 1 deletion(-)
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> > index 0f0c582a56d5..47a3aef0fb61 100644
> > --- a/drivers/gpu/drm/i915/display/intel_display.c
> > +++ b/drivers/gpu/drm/i915/display/intel_display.c
> > @@ -10947,7 +10947,7 @@ static void i845_update_cursor(struct intel_plane *plane,
> > unsigned long irqflags;
> >
> > if (plane_state && plane_state->base.visible) {
> > - unsigned int width = drm_rect_width(&plane_state->base.src);
> > + unsigned int width = drm_rect_width(&plane_state->base.dst);
> > unsigned int height = drm_rect_height(&plane_state->base.dst);
> >
> > cntl = plane_state->ctl |
>
> Yeah, I guess theoretically fixes, should be ok regardless because no scaling is supported on the cursor so rectangles are identical. :)
No. One is .16 fixed point other is integer. Ie. totally broken atm,
as proven by the cursor being smeared over the whole screen on my i865.
>
> Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
--
Ville Syrjälä
Intel
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^ permalink raw reply [flat|nested] 29+ messages in thread
* Re: [PATCH 1/6] drm/i915: Fix i845/i865 cursor width
@ 2019-10-28 15:57 ` Maarten Lankhorst
0 siblings, 0 replies; 29+ messages in thread
From: Maarten Lankhorst @ 2019-10-28 15:57 UTC (permalink / raw)
To: Ville Syrjälä; +Cc: intel-gfx
Op 28-10-2019 om 16:05 schreef Ville Syrjälä:
> On Mon, Oct 28, 2019 at 03:20:34PM +0100, Maarten Lankhorst wrote:
>> Op 28-10-2019 om 12:30 schreef Ville Syrjala:
>>> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>>>
>>> The change from the uapi coordinates to the internal coordinates
>>> broke the cursor on i845/i865 due to src and dst getting swapped.
>>> Fix it.
>>>
>>> Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
>>> Fixes: 3a612765f423 ("drm/i915: Remove cursor use of properties for coordinates")
>>> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
>>> ---
>>> drivers/gpu/drm/i915/display/intel_display.c | 2 +-
>>> 1 file changed, 1 insertion(+), 1 deletion(-)
>>>
>>> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
>>> index 0f0c582a56d5..47a3aef0fb61 100644
>>> --- a/drivers/gpu/drm/i915/display/intel_display.c
>>> +++ b/drivers/gpu/drm/i915/display/intel_display.c
>>> @@ -10947,7 +10947,7 @@ static void i845_update_cursor(struct intel_plane *plane,
>>> unsigned long irqflags;
>>>
>>> if (plane_state && plane_state->base.visible) {
>>> - unsigned int width = drm_rect_width(&plane_state->base.src);
>>> + unsigned int width = drm_rect_width(&plane_state->base.dst);
>>> unsigned int height = drm_rect_height(&plane_state->base.dst);
>>>
>>> cntl = plane_state->ctl |
>> Yeah, I guess theoretically fixes, should be ok regardless because no scaling is supported on the cursor so rectangles are identical. :)
> No. One is .16 fixed point other is integer. Ie. totally broken atm,
> as proven by the cursor being smeared over the whole screen on my i865.
>
Ah right, missed that. :)
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^ permalink raw reply [flat|nested] 29+ messages in thread
* Re: [Intel-gfx] [PATCH 1/6] drm/i915: Fix i845/i865 cursor width
@ 2019-10-28 15:57 ` Maarten Lankhorst
0 siblings, 0 replies; 29+ messages in thread
From: Maarten Lankhorst @ 2019-10-28 15:57 UTC (permalink / raw)
To: Ville Syrjälä; +Cc: intel-gfx
Op 28-10-2019 om 16:05 schreef Ville Syrjälä:
> On Mon, Oct 28, 2019 at 03:20:34PM +0100, Maarten Lankhorst wrote:
>> Op 28-10-2019 om 12:30 schreef Ville Syrjala:
>>> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>>>
>>> The change from the uapi coordinates to the internal coordinates
>>> broke the cursor on i845/i865 due to src and dst getting swapped.
>>> Fix it.
>>>
>>> Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
>>> Fixes: 3a612765f423 ("drm/i915: Remove cursor use of properties for coordinates")
>>> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
>>> ---
>>> drivers/gpu/drm/i915/display/intel_display.c | 2 +-
>>> 1 file changed, 1 insertion(+), 1 deletion(-)
>>>
>>> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
>>> index 0f0c582a56d5..47a3aef0fb61 100644
>>> --- a/drivers/gpu/drm/i915/display/intel_display.c
>>> +++ b/drivers/gpu/drm/i915/display/intel_display.c
>>> @@ -10947,7 +10947,7 @@ static void i845_update_cursor(struct intel_plane *plane,
>>> unsigned long irqflags;
>>>
>>> if (plane_state && plane_state->base.visible) {
>>> - unsigned int width = drm_rect_width(&plane_state->base.src);
>>> + unsigned int width = drm_rect_width(&plane_state->base.dst);
>>> unsigned int height = drm_rect_height(&plane_state->base.dst);
>>>
>>> cntl = plane_state->ctl |
>> Yeah, I guess theoretically fixes, should be ok regardless because no scaling is supported on the cursor so rectangles are identical. :)
> No. One is .16 fixed point other is integer. Ie. totally broken atm,
> as proven by the cursor being smeared over the whole screen on my i865.
>
Ah right, missed that. :)
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 29+ messages in thread
* ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/6] drm/i915: Fix i845/i865 cursor width
@ 2019-10-28 14:43 ` Patchwork
0 siblings, 0 replies; 29+ messages in thread
From: Patchwork @ 2019-10-28 14:43 UTC (permalink / raw)
To: Ville Syrjala; +Cc: intel-gfx
== Series Details ==
Series: series starting with [1/6] drm/i915: Fix i845/i865 cursor width
URL : https://patchwork.freedesktop.org/series/68646/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
4da018f49855 drm/i915: Fix i845/i865 cursor width
19cde21752fa drm/i915: Fix max cursor size for i915g/gm
e8bd89048c9a drm/i915: Fix overlay colorkey for 30bpp and 8bpp
-:26: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'c' - possible side-effects?
#26: FILE: drivers/gpu/drm/i915/display/intel_overlay.c:105:
+#define RGB30_TO_COLORKEY(c) \
+ (((c & 0x3FC00000) >> 6) | ((c & 0x000FF000) >> 4) | ((c & 0x000003FC) >> 2))
-:26: CHECK:MACRO_ARG_PRECEDENCE: Macro argument 'c' may be better as '(c)' to avoid precedence issues
#26: FILE: drivers/gpu/drm/i915/display/intel_overlay.c:105:
+#define RGB30_TO_COLORKEY(c) \
+ (((c & 0x3FC00000) >> 6) | ((c & 0x000FF000) >> 4) | ((c & 0x000003FC) >> 2))
-:32: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'c' - possible side-effects?
#32: FILE: drivers/gpu/drm/i915/display/intel_overlay.c:111:
+#define RGB8I_TO_COLORKEY(c) \
+ (((c & 0xFF) << 16) | ((c & 0XFF) << 8) | ((c & 0xFF) << 0))
-:32: CHECK:MACRO_ARG_PRECEDENCE: Macro argument 'c' may be better as '(c)' to avoid precedence issues
#32: FILE: drivers/gpu/drm/i915/display/intel_overlay.c:111:
+#define RGB8I_TO_COLORKEY(c) \
+ (((c & 0xFF) << 16) | ((c & 0XFF) << 8) | ((c & 0xFF) << 0))
total: 0 errors, 0 warnings, 4 checks, 37 lines checked
db0e1a02849f drm/i915: Configure overlay cc_out precision based on crtc gamma config
c7bd1d944a4b drm/i915: Enable pipe gamma for the overlay
ff2e006cf58b drm/i915: Protect overlay colorkey macro arguments
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 29+ messages in thread
* [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/6] drm/i915: Fix i845/i865 cursor width
@ 2019-10-28 14:43 ` Patchwork
0 siblings, 0 replies; 29+ messages in thread
From: Patchwork @ 2019-10-28 14:43 UTC (permalink / raw)
To: Ville Syrjala; +Cc: intel-gfx
== Series Details ==
Series: series starting with [1/6] drm/i915: Fix i845/i865 cursor width
URL : https://patchwork.freedesktop.org/series/68646/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
4da018f49855 drm/i915: Fix i845/i865 cursor width
19cde21752fa drm/i915: Fix max cursor size for i915g/gm
e8bd89048c9a drm/i915: Fix overlay colorkey for 30bpp and 8bpp
-:26: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'c' - possible side-effects?
#26: FILE: drivers/gpu/drm/i915/display/intel_overlay.c:105:
+#define RGB30_TO_COLORKEY(c) \
+ (((c & 0x3FC00000) >> 6) | ((c & 0x000FF000) >> 4) | ((c & 0x000003FC) >> 2))
-:26: CHECK:MACRO_ARG_PRECEDENCE: Macro argument 'c' may be better as '(c)' to avoid precedence issues
#26: FILE: drivers/gpu/drm/i915/display/intel_overlay.c:105:
+#define RGB30_TO_COLORKEY(c) \
+ (((c & 0x3FC00000) >> 6) | ((c & 0x000FF000) >> 4) | ((c & 0x000003FC) >> 2))
-:32: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'c' - possible side-effects?
#32: FILE: drivers/gpu/drm/i915/display/intel_overlay.c:111:
+#define RGB8I_TO_COLORKEY(c) \
+ (((c & 0xFF) << 16) | ((c & 0XFF) << 8) | ((c & 0xFF) << 0))
-:32: CHECK:MACRO_ARG_PRECEDENCE: Macro argument 'c' may be better as '(c)' to avoid precedence issues
#32: FILE: drivers/gpu/drm/i915/display/intel_overlay.c:111:
+#define RGB8I_TO_COLORKEY(c) \
+ (((c & 0xFF) << 16) | ((c & 0XFF) << 8) | ((c & 0xFF) << 0))
total: 0 errors, 0 warnings, 4 checks, 37 lines checked
db0e1a02849f drm/i915: Configure overlay cc_out precision based on crtc gamma config
c7bd1d944a4b drm/i915: Enable pipe gamma for the overlay
ff2e006cf58b drm/i915: Protect overlay colorkey macro arguments
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 29+ messages in thread
* ✓ Fi.CI.BAT: success for series starting with [1/6] drm/i915: Fix i845/i865 cursor width
@ 2019-10-28 15:04 ` Patchwork
0 siblings, 0 replies; 29+ messages in thread
From: Patchwork @ 2019-10-28 15:04 UTC (permalink / raw)
To: Ville Syrjala; +Cc: intel-gfx
== Series Details ==
Series: series starting with [1/6] drm/i915: Fix i845/i865 cursor width
URL : https://patchwork.freedesktop.org/series/68646/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7201 -> Patchwork_15021
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15021/index.html
Known issues
------------
Here are the changes found in Patchwork_15021 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_mmap_gtt@basic-read-write-distinct:
- fi-icl-u3: [PASS][1] -> [DMESG-WARN][2] ([fdo#107724]) +2 similar issues
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7201/fi-icl-u3/igt@gem_mmap_gtt@basic-read-write-distinct.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15021/fi-icl-u3/igt@gem_mmap_gtt@basic-read-write-distinct.html
* igt@kms_cursor_legacy@basic-flip-before-cursor-varying-size:
- fi-gdg-551: [PASS][3] -> [SKIP][4] ([fdo#109271]) +1 similar issue
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7201/fi-gdg-551/igt@kms_cursor_legacy@basic-flip-before-cursor-varying-size.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15021/fi-gdg-551/igt@kms_cursor_legacy@basic-flip-before-cursor-varying-size.html
#### Possible fixes ####
* igt@gem_mmap_gtt@basic-write-gtt-no-prefault:
- fi-icl-u3: [DMESG-WARN][5] ([fdo#107724]) -> [PASS][6]
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7201/fi-icl-u3/igt@gem_mmap_gtt@basic-write-gtt-no-prefault.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15021/fi-icl-u3/igt@gem_mmap_gtt@basic-write-gtt-no-prefault.html
* igt@kms_chamelium@hdmi-hpd-fast:
- fi-kbl-7500u: [FAIL][7] ([fdo#111407]) -> [PASS][8]
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7201/fi-kbl-7500u/igt@kms_chamelium@hdmi-hpd-fast.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15021/fi-kbl-7500u/igt@kms_chamelium@hdmi-hpd-fast.html
[fdo#107724]: https://bugs.freedesktop.org/show_bug.cgi?id=107724
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#111407]: https://bugs.freedesktop.org/show_bug.cgi?id=111407
Participating hosts (53 -> 44)
------------------------------
Missing (9): fi-ilk-m540 fi-hsw-4200u fi-tgl-u2 fi-byt-squawks fi-bsw-cyan fi-icl-y fi-tgl-y fi-byt-clapper fi-bdw-samus
Build changes
-------------
* CI: CI-20190529 -> None
* Linux: CI_DRM_7201 -> Patchwork_15021
CI-20190529: 20190529
CI_DRM_7201: c5ec9a4155c4bac3d44e88fe6a4ddadfa1e5dc45 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_5247: 4d1f6036dfceeee64f92c02475f9ae2cc8ffcc1b @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_15021: ff2e006cf58b53f9bb580dbaf395da00d97352d5 @ git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
ff2e006cf58b drm/i915: Protect overlay colorkey macro arguments
c7bd1d944a4b drm/i915: Enable pipe gamma for the overlay
db0e1a02849f drm/i915: Configure overlay cc_out precision based on crtc gamma config
e8bd89048c9a drm/i915: Fix overlay colorkey for 30bpp and 8bpp
19cde21752fa drm/i915: Fix max cursor size for i915g/gm
4da018f49855 drm/i915: Fix i845/i865 cursor width
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15021/index.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 29+ messages in thread
* ✗ Fi.CI.IGT: failure for series starting with [1/6] drm/i915: Fix i845/i865 cursor width
@ 2019-10-29 10:10 ` Patchwork
0 siblings, 0 replies; 29+ messages in thread
From: Patchwork @ 2019-10-29 10:10 UTC (permalink / raw)
To: Ville Syrjälä; +Cc: intel-gfx
== Series Details ==
Series: series starting with [1/6] drm/i915: Fix i845/i865 cursor width
URL : https://patchwork.freedesktop.org/series/68646/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_7201_full -> Patchwork_15021_full
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with Patchwork_15021_full absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_15021_full, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in Patchwork_15021_full:
### IGT changes ###
#### Possible regressions ####
* igt@kms_rotation_crc@multiplane-rotation-cropping-bottom:
- shard-skl: [PASS][1] -> [INCOMPLETE][2]
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7201/shard-skl10/igt@kms_rotation_crc@multiplane-rotation-cropping-bottom.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15021/shard-skl3/igt@kms_rotation_crc@multiplane-rotation-cropping-bottom.html
Known issues
------------
Here are the changes found in Patchwork_15021_full that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_ctx_isolation@bcs0-s3:
- shard-skl: [PASS][3] -> [INCOMPLETE][4] ([fdo#104108])
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7201/shard-skl6/igt@gem_ctx_isolation@bcs0-s3.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15021/shard-skl1/igt@gem_ctx_isolation@bcs0-s3.html
* igt@gem_ctx_isolation@vcs1-reset:
- shard-iclb: [PASS][5] -> [SKIP][6] ([fdo#109276] / [fdo#112080]) +1 similar issue
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7201/shard-iclb4/igt@gem_ctx_isolation@vcs1-reset.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15021/shard-iclb8/igt@gem_ctx_isolation@vcs1-reset.html
* igt@gem_ctx_shared@exec-single-timeline-bsd:
- shard-iclb: [PASS][7] -> [SKIP][8] ([fdo#110841])
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7201/shard-iclb6/igt@gem_ctx_shared@exec-single-timeline-bsd.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15021/shard-iclb1/igt@gem_ctx_shared@exec-single-timeline-bsd.html
* igt@gem_ctx_switch@vcs1-heavy-queue:
- shard-iclb: [PASS][9] -> [SKIP][10] ([fdo#112080]) +12 similar issues
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7201/shard-iclb2/igt@gem_ctx_switch@vcs1-heavy-queue.html
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15021/shard-iclb3/igt@gem_ctx_switch@vcs1-heavy-queue.html
* igt@gem_exec_balancer@smoke:
- shard-iclb: [PASS][11] -> [SKIP][12] ([fdo#110854])
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7201/shard-iclb1/igt@gem_exec_balancer@smoke.html
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15021/shard-iclb6/igt@gem_exec_balancer@smoke.html
* igt@gem_exec_schedule@out-order-bsd1:
- shard-iclb: [PASS][13] -> [SKIP][14] ([fdo#109276]) +10 similar issues
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7201/shard-iclb2/igt@gem_exec_schedule@out-order-bsd1.html
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15021/shard-iclb3/igt@gem_exec_schedule@out-order-bsd1.html
* igt@gem_userptr_blits@map-fixed-invalidate-overlap-busy-gup:
- shard-hsw: [PASS][15] -> [DMESG-WARN][16] ([fdo#111870])
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7201/shard-hsw2/igt@gem_userptr_blits@map-fixed-invalidate-overlap-busy-gup.html
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15021/shard-hsw6/igt@gem_userptr_blits@map-fixed-invalidate-overlap-busy-gup.html
- shard-snb: [PASS][17] -> [DMESG-WARN][18] ([fdo#111870])
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7201/shard-snb5/igt@gem_userptr_blits@map-fixed-invalidate-overlap-busy-gup.html
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15021/shard-snb1/igt@gem_userptr_blits@map-fixed-invalidate-overlap-busy-gup.html
* igt@gem_workarounds@suspend-resume-context:
- shard-apl: [PASS][19] -> [DMESG-WARN][20] ([fdo#108566])
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7201/shard-apl3/igt@gem_workarounds@suspend-resume-context.html
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15021/shard-apl6/igt@gem_workarounds@suspend-resume-context.html
* igt@kms_flip@flip-vs-expired-vblank-interruptible:
- shard-apl: [PASS][21] -> [FAIL][22] ([fdo#105363])
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7201/shard-apl3/igt@kms_flip@flip-vs-expired-vblank-interruptible.html
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15021/shard-apl6/igt@kms_flip@flip-vs-expired-vblank-interruptible.html
* igt@kms_frontbuffer_tracking@fbc-1p-pri-indfb-multidraw:
- shard-iclb: [PASS][23] -> [FAIL][24] ([fdo#103167]) +3 similar issues
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7201/shard-iclb1/igt@kms_frontbuffer_tracking@fbc-1p-pri-indfb-multidraw.html
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15021/shard-iclb2/igt@kms_frontbuffer_tracking@fbc-1p-pri-indfb-multidraw.html
* igt@kms_pipe_crc_basic@suspend-read-crc-pipe-b:
- shard-kbl: [PASS][25] -> [INCOMPLETE][26] ([fdo#103665])
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7201/shard-kbl4/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-b.html
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15021/shard-kbl2/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-b.html
* igt@kms_plane@plane-panning-bottom-right-suspend-pipe-a-planes:
- shard-kbl: [PASS][27] -> [DMESG-WARN][28] ([fdo#108566]) +1 similar issue
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7201/shard-kbl6/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-a-planes.html
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15021/shard-kbl1/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-a-planes.html
* igt@kms_plane_alpha_blend@pipe-a-alpha-7efc:
- shard-iclb: [PASS][29] -> [INCOMPLETE][30] ([fdo#107713])
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7201/shard-iclb2/igt@kms_plane_alpha_blend@pipe-a-alpha-7efc.html
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15021/shard-iclb7/igt@kms_plane_alpha_blend@pipe-a-alpha-7efc.html
* igt@kms_plane_alpha_blend@pipe-b-coverage-7efc:
- shard-skl: [PASS][31] -> [FAIL][32] ([fdo#108145] / [fdo#110403])
[31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7201/shard-skl5/igt@kms_plane_alpha_blend@pipe-b-coverage-7efc.html
[32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15021/shard-skl3/igt@kms_plane_alpha_blend@pipe-b-coverage-7efc.html
* igt@kms_plane_lowres@pipe-a-tiling-x:
- shard-iclb: [PASS][33] -> [FAIL][34] ([fdo#103166])
[33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7201/shard-iclb4/igt@kms_plane_lowres@pipe-a-tiling-x.html
[34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15021/shard-iclb8/igt@kms_plane_lowres@pipe-a-tiling-x.html
* igt@kms_psr@psr2_cursor_render:
- shard-iclb: [PASS][35] -> [SKIP][36] ([fdo#109441]) +3 similar issues
[35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7201/shard-iclb2/igt@kms_psr@psr2_cursor_render.html
[36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15021/shard-iclb3/igt@kms_psr@psr2_cursor_render.html
* igt@kms_setmode@basic:
- shard-apl: [PASS][37] -> [FAIL][38] ([fdo#99912])
[37]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7201/shard-apl3/igt@kms_setmode@basic.html
[38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15021/shard-apl4/igt@kms_setmode@basic.html
- shard-kbl: [PASS][39] -> [FAIL][40] ([fdo#99912])
[39]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7201/shard-kbl2/igt@kms_setmode@basic.html
[40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15021/shard-kbl3/igt@kms_setmode@basic.html
#### Possible fixes ####
* igt@gem_exec_async@concurrent-writes-bsd:
- shard-iclb: [SKIP][41] ([fdo#112146]) -> [PASS][42] +5 similar issues
[41]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7201/shard-iclb2/igt@gem_exec_async@concurrent-writes-bsd.html
[42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15021/shard-iclb3/igt@gem_exec_async@concurrent-writes-bsd.html
* igt@gem_exec_parallel@vcs1-fds:
- shard-iclb: [SKIP][43] ([fdo#112080]) -> [PASS][44] +6 similar issues
[43]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7201/shard-iclb8/igt@gem_exec_parallel@vcs1-fds.html
[44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15021/shard-iclb4/igt@gem_exec_parallel@vcs1-fds.html
* igt@gem_exec_schedule@out-order-bsd2:
- shard-iclb: [SKIP][45] ([fdo#109276]) -> [PASS][46] +12 similar issues
[45]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7201/shard-iclb6/igt@gem_exec_schedule@out-order-bsd2.html
[46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15021/shard-iclb1/igt@gem_exec_schedule@out-order-bsd2.html
* igt@gem_persistent_relocs@forked-thrashing:
- shard-snb: [FAIL][47] ([fdo#112037]) -> [PASS][48]
[47]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7201/shard-snb6/igt@gem_persistent_relocs@forked-thrashing.html
[48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15021/shard-snb5/igt@gem_persistent_relocs@forked-thrashing.html
* igt@gem_userptr_blits@dmabuf-unsync:
- shard-hsw: [DMESG-WARN][49] ([fdo#111870]) -> [PASS][50]
[49]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7201/shard-hsw5/igt@gem_userptr_blits@dmabuf-unsync.html
[50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15021/shard-hsw5/igt@gem_userptr_blits@dmabuf-unsync.html
* igt@gem_userptr_blits@sync-unmap:
- shard-snb: [DMESG-WARN][51] ([fdo#111870]) -> [PASS][52]
[51]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7201/shard-snb4/igt@gem_userptr_blits@sync-unmap.html
[52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15021/shard-snb2/igt@gem_userptr_blits@sync-unmap.html
* igt@i915_suspend@forcewake:
- shard-kbl: [DMESG-WARN][53] ([fdo#108566]) -> [PASS][54] +1 similar issue
[53]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7201/shard-kbl4/igt@i915_suspend@forcewake.html
[54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15021/shard-kbl3/igt@i915_suspend@forcewake.html
* igt@kms_atomic_interruptible@universal-setplane-primary:
- shard-apl: [INCOMPLETE][55] ([fdo#103927]) -> [PASS][56] +1 similar issue
[55]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7201/shard-apl2/igt@kms_atomic_interruptible@universal-setplane-primary.html
[56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15021/shard-apl1/igt@kms_atomic_interruptible@universal-setplane-primary.html
* igt@kms_draw_crc@draw-method-rgb565-blt-xtiled:
- shard-skl: [FAIL][57] ([fdo#103184] / [fdo#103232]) -> [PASS][58]
[57]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7201/shard-skl1/igt@kms_draw_crc@draw-method-rgb565-blt-xtiled.html
[58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15021/shard-skl6/igt@kms_draw_crc@draw-method-rgb565-blt-xtiled.html
* igt@kms_flip@flip-vs-absolute-wf_vblank-interruptible:
- shard-hsw: [INCOMPLETE][59] ([fdo#103540]) -> [PASS][60] +1 similar issue
[59]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7201/shard-hsw1/igt@kms_flip@flip-vs-absolute-wf_vblank-interruptible.html
[60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15021/shard-hsw2/igt@kms_flip@flip-vs-absolute-wf_vblank-interruptible.html
* igt@kms_flip@flip-vs-panning-vs-hang:
- shard-iclb: [INCOMPLETE][61] ([fdo#107713]) -> [PASS][62]
[61]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7201/shard-iclb7/igt@kms_flip@flip-vs-panning-vs-hang.html
[62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15021/shard-iclb1/igt@kms_flip@flip-vs-panning-vs-hang.html
* igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-cur-indfb-draw-render:
- shard-iclb: [FAIL][63] ([fdo#103167]) -> [PASS][64] +2 similar issues
[63]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7201/shard-iclb2/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-cur-indfb-draw-render.html
[64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15021/shard-iclb1/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-cur-indfb-draw-render.html
* igt@kms_psr2_su@frontbuffer:
- shard-iclb: [SKIP][65] ([fdo#109642] / [fdo#111068]) -> [PASS][66]
[65]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7201/shard-iclb4/igt@kms_psr2_su@frontbuffer.html
[66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15021/shard-iclb2/igt@kms_psr2_su@frontbuffer.html
* igt@kms_setmode@basic:
- shard-hsw: [FAIL][67] ([fdo#99912]) -> [PASS][68]
[67]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7201/shard-hsw6/igt@kms_setmode@basic.html
[68]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15021/shard-hsw6/igt@kms_setmode@basic.html
#### Warnings ####
* igt@gem_ctx_isolation@vcs1-nonpriv:
- shard-iclb: [FAIL][69] ([fdo#111329]) -> [SKIP][70] ([fdo#109276] / [fdo#112080])
[69]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7201/shard-iclb1/igt@gem_ctx_isolation@vcs1-nonpriv.html
[70]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15021/shard-iclb6/igt@gem_ctx_isolation@vcs1-nonpriv.html
* igt@gem_mocs_settings@mocs-reset-bsd2:
- shard-iclb: [SKIP][71] ([fdo#109276]) -> [FAIL][72] ([fdo#111330]) +1 similar issue
[71]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7201/shard-iclb3/igt@gem_mocs_settings@mocs-reset-bsd2.html
[72]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15021/shard-iclb4/igt@gem_mocs_settings@mocs-reset-bsd2.html
* igt@gem_mocs_settings@mocs-settings-bsd2:
- shard-iclb: [FAIL][73] ([fdo#111330]) -> [SKIP][74] ([fdo#109276])
[73]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7201/shard-iclb1/igt@gem_mocs_settings@mocs-settings-bsd2.html
[74]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15021/shard-iclb6/igt@gem_mocs_settings@mocs-settings-bsd2.html
* igt@kms_psr@psr2_suspend:
- shard-iclb: [SKIP][75] ([fdo#109441]) -> [DMESG-WARN][76] ([fdo#107724])
[75]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7201/shard-iclb1/igt@kms_psr@psr2_suspend.html
[76]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15021/shard-iclb2/igt@kms_psr@psr2_suspend.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#103166]: https://bugs.freedesktop.org/show_bug.cgi?id=103166
[fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167
[fdo#103184]: https://bugs.freedesktop.org/show_bug.cgi?id=103184
[fdo#103232]: https://bugs.freedesktop.org/show_bug.cgi?id=103232
[fdo#103540]: https://bugs.freedesktop.org/show_bug.cgi?id=103540
[fdo#103665]: https://bugs.freedesktop.org/show_bug.cgi?id=103665
[fdo#103927]: https://bugs.freedesktop.org/show_bug.cgi?id=103927
[fdo#104108]: https://bugs.freedesktop.org/show_bug.cgi?id=104108
[fdo#105363]: https://bugs.freedesktop.org/show_bug.cgi?id=105363
[fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713
[fdo#107724]: https://bugs.freedesktop.org/show_bug.cgi?id=107724
[fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145
[fdo#108566]: https://bugs.freedesktop.org/show_bug.cgi?id=108566
[fdo#109276]: https://bugs.freedesktop.org/show_bug.cgi?id=109276
[fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441
[fdo#109642]: https://bugs.freedesktop.org/show_bug.cgi?id=109642
[fdo#110403]: https://bugs.freedesktop.org/show_bug.cgi?id=110403
[fdo#110548]: https://bugs.freedesktop.org/show_bug.cgi?id=110548
[fdo#110841]: https://bugs.freedesktop.org/show_bug.cgi?id=110841
[fdo#110854]: https://bugs.freedesktop.org/show_bug.cgi?id=110854
[fdo#111068]: https://bugs.freedesktop.org/show_bug.cgi?id=111068
[fdo#111329]: https://bugs.freedesktop.org/show_bug.cgi?id=111329
[fdo#111330]: https://bugs.freedesktop.org/show_bug.cgi?id=111330
[fdo#111870]: https://bugs.freedesktop.org/show_bug.cgi?id=111870
[fdo#112037]: https://bugs.freedesktop.org/show_bug.cgi?id=112037
[fdo#112080]: https://bugs.freedesktop.org/show_bug.cgi?id=112080
[fdo#112146]: https://bugs.freedesktop.org/show_bug.cgi?id=112146
[fdo#99912]: https://bugs.freedesktop.org/show_bug.cgi?id=99912
Participating hosts (11 -> 11)
------------------------------
No changes in participating hosts
Build changes
-------------
* CI: CI-20190529 -> None
* Linux: CI_DRM_7201 -> Patchwork_15021
CI-20190529: 20190529
CI_DRM_7201: c5ec9a4155c4bac3d44e88fe6a4ddadfa1e5dc45 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_5247: 4d1f6036dfceeee64f92c02475f9ae2cc8ffcc1b @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_15021: ff2e006cf58b53f9bb580dbaf395da00d97352d5 @ git://anongit.freedesktop.org/gfx-ci/linux
piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15021/index.html
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Intel-gfx@lists.freedesktop.org
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