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* [igt-dev] [PATCH i-g-t 1/2] tools/intel_vbt_decode: update vbt defs
@ 2019-10-28 13:54 Jani Nikula
  2019-10-28 13:54 ` [igt-dev] [PATCH i-g-t 2/2] tools/intel_vbt_decode: add decoding of the compression parameters block Jani Nikula
                   ` (3 more replies)
  0 siblings, 4 replies; 7+ messages in thread
From: Jani Nikula @ 2019-10-28 13:54 UTC (permalink / raw)
  To: igt-dev; +Cc: jani.nikula

Update intel_vbt_defs.h from kernel commit 96815f3d8b50 ("drm/i915/bios:
add compression parameter block definition").

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 tools/intel_vbt_defs.h | 58 ++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 58 insertions(+)

diff --git a/tools/intel_vbt_defs.h b/tools/intel_vbt_defs.h
index c903cda3bb5e..69a7cb1fa121 100644
--- a/tools/intel_vbt_defs.h
+++ b/tools/intel_vbt_defs.h
@@ -114,6 +114,7 @@ enum bdb_block_id {
 	BDB_LVDS_POWER			= 44,
 	BDB_MIPI_CONFIG			= 52,
 	BDB_MIPI_SEQUENCE		= 53,
+	BDB_COMPRESSION_PARAMETERS	= 56,
 	BDB_SKIP			= 254, /* VBIOS private block, ignore */
 };
 
@@ -291,6 +292,8 @@ struct bdb_general_features {
 #define DVO_PORT_HDMIE		12				/* 193 */
 #define DVO_PORT_DPF		13				/* N/A */
 #define DVO_PORT_HDMIF		14				/* N/A */
+#define DVO_PORT_DPG		15
+#define DVO_PORT_HDMIG		16
 #define DVO_PORT_MIPIA		21				/* 171 */
 #define DVO_PORT_MIPIB		22				/* 171 */
 #define DVO_PORT_MIPIC		23				/* 171 */
@@ -310,10 +313,13 @@ enum vbt_gmbus_ddi {
 	DDC_BUS_DDI_F,
 	ICL_DDC_BUS_DDI_A = 0x1,
 	ICL_DDC_BUS_DDI_B,
+	TGL_DDC_BUS_DDI_C,
 	ICL_DDC_BUS_PORT_1 = 0x4,
 	ICL_DDC_BUS_PORT_2,
 	ICL_DDC_BUS_PORT_3,
 	ICL_DDC_BUS_PORT_4,
+	TGL_DDC_BUS_PORT_5,
+	TGL_DDC_BUS_PORT_6,
 };
 
 #define DP_AUX_A 0x40
@@ -322,6 +328,7 @@ enum vbt_gmbus_ddi {
 #define DP_AUX_D 0x30
 #define DP_AUX_E 0x50
 #define DP_AUX_F 0x60
+#define DP_AUX_G 0x70
 
 #define VBT_DP_MAX_LINK_RATE_HBR3	0
 #define VBT_DP_MAX_LINK_RATE_HBR2	1
@@ -805,4 +812,55 @@ struct bdb_mipi_sequence {
 	u8 data[0]; /* up to 6 variable length blocks */
 } __packed;
 
+/*
+ * Block 56 - Compression Parameters
+ */
+
+#define VBT_RC_BUFFER_BLOCK_SIZE_1KB	0
+#define VBT_RC_BUFFER_BLOCK_SIZE_4KB	1
+#define VBT_RC_BUFFER_BLOCK_SIZE_16KB	2
+#define VBT_RC_BUFFER_BLOCK_SIZE_64KB	3
+
+#define VBT_DSC_LINE_BUFFER_DEPTH(vbt_value)	((vbt_value) + 8) /* bits */
+#define VBT_DSC_MAX_BPP(vbt_value)		(6 + (vbt_value) * 2)
+
+struct dsc_compression_parameters_entry {
+	u8 version_major:4;
+	u8 version_minor:4;
+
+	u8 rc_buffer_block_size:2;
+	u8 reserved1:6;
+
+	/*
+	 * Buffer size in bytes:
+	 *
+	 * 4 ^ rc_buffer_block_size * 1024 * (rc_buffer_size + 1) bytes
+	 */
+	u8 rc_buffer_size;
+	u32 slices_per_line;
+
+	u8 line_buffer_depth:4;
+	u8 reserved2:4;
+
+	/* Flag Bits 1 */
+	u8 block_prediction_enable:1;
+	u8 reserved3:7;
+
+	u8 max_bpp; /* mapping */
+
+	/* Color depth capabilities */
+	u8 reserved4:1;
+	u8 support_8bpc:1;
+	u8 support_10bpc:1;
+	u8 support_12bpc:1;
+	u8 reserved5:4;
+
+	u16 slice_height;
+} __packed;
+
+struct bdb_compression_parameters {
+	u16 entry_size;
+	struct dsc_compression_parameters_entry data[16];
+} __packed;
+
 #endif /* _INTEL_VBT_DEFS_H_ */
-- 
2.20.1

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igt-dev@lists.freedesktop.org
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^ permalink raw reply related	[flat|nested] 7+ messages in thread

* [igt-dev] [PATCH i-g-t 2/2] tools/intel_vbt_decode: add decoding of the compression parameters block
  2019-10-28 13:54 [igt-dev] [PATCH i-g-t 1/2] tools/intel_vbt_decode: update vbt defs Jani Nikula
@ 2019-10-28 13:54 ` Jani Nikula
  2019-10-28 16:35   ` Ville Syrjälä
  2019-10-28 14:37 ` [igt-dev] ✓ Fi.CI.BAT: success for series starting with [i-g-t,1/2] tools/intel_vbt_decode: update vbt defs Patchwork
                   ` (2 subsequent siblings)
  3 siblings, 1 reply; 7+ messages in thread
From: Jani Nikula @ 2019-10-28 13:54 UTC (permalink / raw)
  To: igt-dev; +Cc: jani.nikula

Decode block 56.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 tools/intel_vbt_decode.c | 87 ++++++++++++++++++++++++++++++++++++++++
 1 file changed, 87 insertions(+)

diff --git a/tools/intel_vbt_decode.c b/tools/intel_vbt_decode.c
index deba47994c89..625dc0787527 100644
--- a/tools/intel_vbt_decode.c
+++ b/tools/intel_vbt_decode.c
@@ -1548,6 +1548,88 @@ static void dump_mipi_sequence(struct context *context,
 			dump_sequence(sequence_ptrs[i], sequence->version);
 }
 
+#define KB(x) ((x) * 1024)
+
+static int dsc_buffer_block_size(u8 buffer_block_size)
+{
+	switch (buffer_block_size) {
+	case VBT_RC_BUFFER_BLOCK_SIZE_1KB:
+		return KB(1);
+		break;
+	case VBT_RC_BUFFER_BLOCK_SIZE_4KB:
+		return KB(4);
+		break;
+	case VBT_RC_BUFFER_BLOCK_SIZE_16KB:
+		return KB(16);
+		break;
+	case VBT_RC_BUFFER_BLOCK_SIZE_64KB:
+		return KB(64);
+		break;
+	default:
+		return 0;
+	}
+}
+
+static int actual_buffer_size(u8 buffer_block_size, u8 rc_buffer_size)
+{
+	return dsc_buffer_block_size(buffer_block_size) * (rc_buffer_size + 1);
+}
+
+static const char *dsc_max_bpp(u8 value)
+{
+	switch (value) {
+	case 0:
+		return "6";
+	case 1:
+		return "8";
+	case 2:
+		return "10";
+	case 3:
+		return "12";
+	default:
+		return "<unknown>";
+	}
+}
+
+static void dump_compression_parameters(struct context *context,
+					const struct bdb_block *block)
+{
+	const struct bdb_compression_parameters *dsc = block->data;
+	const struct dsc_compression_parameters_entry *data;
+	int i;
+
+	for (i = 0; i < ARRAY_SIZE(dsc->data); i++) {
+		/* FIXME: need to handle sizeof(*data) != dsc->entry_size */
+		data = &dsc->data[i];
+
+		if (i != context->panel_type && !context->dump_all_panel_types)
+			continue;
+
+		printf("\tDSC block %d%s\n", i,
+		       i == context->panel_type ? " *" : "");
+		printf("\t\tDSC version: %u.%u\n", data->version_major,
+		       data->version_minor);
+		printf("\t\tActual buffer size: %d\n",
+		       actual_buffer_size(data->rc_buffer_block_size,
+					  data->rc_buffer_size));
+		printf("\t\t\tRC buffer block size: %d (%u)\n",
+		       dsc_buffer_block_size(data->rc_buffer_block_size),
+		       data->rc_buffer_block_size);
+		printf("\t\t\tRC buffer size: %u\n", data->rc_buffer_size);
+		printf("\t\tSlices per line: 0x%02x\n", data->slices_per_line);
+		printf("\t\tLine buffer depth: %u bits (%u)\n",
+		       data->line_buffer_depth + 8, data->line_buffer_depth);
+		printf("\t\tBlock prediction enable: %u\n",
+		       data->block_prediction_enable);
+		printf("\t\tMax bpp: %s bpp (%u)\n", dsc_max_bpp(data->max_bpp),
+		       data->max_bpp);
+		printf("\t\tSupport 8 bpc: %u\n", data->support_8bpc);
+		printf("\t\tSupport 10 bpc: %u\n", data->support_10bpc);
+		printf("\t\tSupport 12 bpc: %u\n", data->support_12bpc);
+		printf("\t\tSlice height: %u\n", data->slice_height);
+	}
+}
+
 /* get panel type from lvds options block, or -1 if block not found */
 static int get_panel_type(struct context *context)
 {
@@ -1665,6 +1747,11 @@ struct dumper dumpers[] = {
 		.name = "MIPI sequence block",
 		.dump = dump_mipi_sequence,
 	},
+	{
+		.id = BDB_COMPRESSION_PARAMETERS,
+		.name = "Compression parameters block",
+		.dump = dump_compression_parameters,
+	},
 };
 
 static void hex_dump(const void *data, uint32_t size)
-- 
2.20.1

_______________________________________________
igt-dev mailing list
igt-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/igt-dev

^ permalink raw reply related	[flat|nested] 7+ messages in thread

* [igt-dev] ✓ Fi.CI.BAT: success for series starting with [i-g-t,1/2] tools/intel_vbt_decode: update vbt defs
  2019-10-28 13:54 [igt-dev] [PATCH i-g-t 1/2] tools/intel_vbt_decode: update vbt defs Jani Nikula
  2019-10-28 13:54 ` [igt-dev] [PATCH i-g-t 2/2] tools/intel_vbt_decode: add decoding of the compression parameters block Jani Nikula
@ 2019-10-28 14:37 ` Patchwork
  2019-10-28 16:07 ` [igt-dev] [PATCH i-g-t 1/2] " Ville Syrjälä
  2019-10-29 10:02 ` [igt-dev] ✓ Fi.CI.IGT: success for series starting with [i-g-t,1/2] " Patchwork
  3 siblings, 0 replies; 7+ messages in thread
From: Patchwork @ 2019-10-28 14:37 UTC (permalink / raw)
  To: Jani Nikula; +Cc: igt-dev

== Series Details ==

Series: series starting with [i-g-t,1/2] tools/intel_vbt_decode: update vbt defs
URL   : https://patchwork.freedesktop.org/series/68660/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_7201 -> IGTPW_3623
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3623/index.html

Known issues
------------

  Here are the changes found in IGTPW_3623 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@gem_ctx_create@basic-files:
    - fi-bxt-dsi:         [PASS][1] -> [INCOMPLETE][2] ([fdo#103927])
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7201/fi-bxt-dsi/igt@gem_ctx_create@basic-files.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3623/fi-bxt-dsi/igt@gem_ctx_create@basic-files.html

  * igt@i915_selftest@live_blt:
    - fi-hsw-peppy:       [PASS][3] -> [DMESG-FAIL][4] ([fdo#112147])
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7201/fi-hsw-peppy/igt@i915_selftest@live_blt.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3623/fi-hsw-peppy/igt@i915_selftest@live_blt.html

  * igt@vgem_basic@second-client:
    - fi-icl-u3:          [PASS][5] -> [DMESG-WARN][6] ([fdo#107724]) +1 similar issue
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7201/fi-icl-u3/igt@vgem_basic@second-client.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3623/fi-icl-u3/igt@vgem_basic@second-client.html

  
#### Possible fixes ####

  * igt@gem_mmap_gtt@basic-write-gtt-no-prefault:
    - fi-icl-u3:          [DMESG-WARN][7] ([fdo#107724]) -> [PASS][8]
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7201/fi-icl-u3/igt@gem_mmap_gtt@basic-write-gtt-no-prefault.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3623/fi-icl-u3/igt@gem_mmap_gtt@basic-write-gtt-no-prefault.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167
  [fdo#103927]: https://bugs.freedesktop.org/show_bug.cgi?id=103927
  [fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713
  [fdo#107724]: https://bugs.freedesktop.org/show_bug.cgi?id=107724
  [fdo#108569]: https://bugs.freedesktop.org/show_bug.cgi?id=108569
  [fdo#111747]: https://bugs.freedesktop.org/show_bug.cgi?id=111747
  [fdo#112147]: https://bugs.freedesktop.org/show_bug.cgi?id=112147


Participating hosts (53 -> 43)
------------------------------

  Missing    (10): fi-ilk-m540 fi-tgl-u2 fi-bsw-n3050 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-icl-y fi-tgl-y fi-byt-clapper fi-bdw-samus 


Build changes
-------------

  * CI: CI-20190529 -> None
  * IGT: IGT_5247 -> IGTPW_3623

  CI-20190529: 20190529
  CI_DRM_7201: c5ec9a4155c4bac3d44e88fe6a4ddadfa1e5dc45 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGTPW_3623: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3623/index.html
  IGT_5247: 4d1f6036dfceeee64f92c02475f9ae2cc8ffcc1b @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3623/index.html
_______________________________________________
igt-dev mailing list
igt-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/igt-dev

^ permalink raw reply	[flat|nested] 7+ messages in thread

* Re: [igt-dev] [PATCH i-g-t 1/2] tools/intel_vbt_decode: update vbt defs
  2019-10-28 13:54 [igt-dev] [PATCH i-g-t 1/2] tools/intel_vbt_decode: update vbt defs Jani Nikula
  2019-10-28 13:54 ` [igt-dev] [PATCH i-g-t 2/2] tools/intel_vbt_decode: add decoding of the compression parameters block Jani Nikula
  2019-10-28 14:37 ` [igt-dev] ✓ Fi.CI.BAT: success for series starting with [i-g-t,1/2] tools/intel_vbt_decode: update vbt defs Patchwork
@ 2019-10-28 16:07 ` Ville Syrjälä
  2019-10-29  8:39   ` Jani Nikula
  2019-10-29 10:02 ` [igt-dev] ✓ Fi.CI.IGT: success for series starting with [i-g-t,1/2] " Patchwork
  3 siblings, 1 reply; 7+ messages in thread
From: Ville Syrjälä @ 2019-10-28 16:07 UTC (permalink / raw)
  To: Jani Nikula; +Cc: igt-dev

On Mon, Oct 28, 2019 at 03:54:50PM +0200, Jani Nikula wrote:
> Update intel_vbt_defs.h from kernel commit 96815f3d8b50 ("drm/i915/bios:
> add compression parameter block definition").

Looks like this also pulls in a couple of other changes that were never
synced. Anyways, lgtm when compared with the kernel stuff.

Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

> 
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
> ---
>  tools/intel_vbt_defs.h | 58 ++++++++++++++++++++++++++++++++++++++++++
>  1 file changed, 58 insertions(+)
> 
> diff --git a/tools/intel_vbt_defs.h b/tools/intel_vbt_defs.h
> index c903cda3bb5e..69a7cb1fa121 100644
> --- a/tools/intel_vbt_defs.h
> +++ b/tools/intel_vbt_defs.h
> @@ -114,6 +114,7 @@ enum bdb_block_id {
>  	BDB_LVDS_POWER			= 44,
>  	BDB_MIPI_CONFIG			= 52,
>  	BDB_MIPI_SEQUENCE		= 53,
> +	BDB_COMPRESSION_PARAMETERS	= 56,
>  	BDB_SKIP			= 254, /* VBIOS private block, ignore */
>  };
>  
> @@ -291,6 +292,8 @@ struct bdb_general_features {
>  #define DVO_PORT_HDMIE		12				/* 193 */
>  #define DVO_PORT_DPF		13				/* N/A */
>  #define DVO_PORT_HDMIF		14				/* N/A */
> +#define DVO_PORT_DPG		15
> +#define DVO_PORT_HDMIG		16
>  #define DVO_PORT_MIPIA		21				/* 171 */
>  #define DVO_PORT_MIPIB		22				/* 171 */
>  #define DVO_PORT_MIPIC		23				/* 171 */
> @@ -310,10 +313,13 @@ enum vbt_gmbus_ddi {
>  	DDC_BUS_DDI_F,
>  	ICL_DDC_BUS_DDI_A = 0x1,
>  	ICL_DDC_BUS_DDI_B,
> +	TGL_DDC_BUS_DDI_C,
>  	ICL_DDC_BUS_PORT_1 = 0x4,
>  	ICL_DDC_BUS_PORT_2,
>  	ICL_DDC_BUS_PORT_3,
>  	ICL_DDC_BUS_PORT_4,
> +	TGL_DDC_BUS_PORT_5,
> +	TGL_DDC_BUS_PORT_6,
>  };
>  
>  #define DP_AUX_A 0x40
> @@ -322,6 +328,7 @@ enum vbt_gmbus_ddi {
>  #define DP_AUX_D 0x30
>  #define DP_AUX_E 0x50
>  #define DP_AUX_F 0x60
> +#define DP_AUX_G 0x70
>  
>  #define VBT_DP_MAX_LINK_RATE_HBR3	0
>  #define VBT_DP_MAX_LINK_RATE_HBR2	1
> @@ -805,4 +812,55 @@ struct bdb_mipi_sequence {
>  	u8 data[0]; /* up to 6 variable length blocks */
>  } __packed;
>  
> +/*
> + * Block 56 - Compression Parameters
> + */
> +
> +#define VBT_RC_BUFFER_BLOCK_SIZE_1KB	0
> +#define VBT_RC_BUFFER_BLOCK_SIZE_4KB	1
> +#define VBT_RC_BUFFER_BLOCK_SIZE_16KB	2
> +#define VBT_RC_BUFFER_BLOCK_SIZE_64KB	3
> +
> +#define VBT_DSC_LINE_BUFFER_DEPTH(vbt_value)	((vbt_value) + 8) /* bits */
> +#define VBT_DSC_MAX_BPP(vbt_value)		(6 + (vbt_value) * 2)
> +
> +struct dsc_compression_parameters_entry {
> +	u8 version_major:4;
> +	u8 version_minor:4;
> +
> +	u8 rc_buffer_block_size:2;
> +	u8 reserved1:6;
> +
> +	/*
> +	 * Buffer size in bytes:
> +	 *
> +	 * 4 ^ rc_buffer_block_size * 1024 * (rc_buffer_size + 1) bytes
> +	 */
> +	u8 rc_buffer_size;
> +	u32 slices_per_line;
> +
> +	u8 line_buffer_depth:4;
> +	u8 reserved2:4;
> +
> +	/* Flag Bits 1 */
> +	u8 block_prediction_enable:1;
> +	u8 reserved3:7;
> +
> +	u8 max_bpp; /* mapping */
> +
> +	/* Color depth capabilities */
> +	u8 reserved4:1;
> +	u8 support_8bpc:1;
> +	u8 support_10bpc:1;
> +	u8 support_12bpc:1;
> +	u8 reserved5:4;
> +
> +	u16 slice_height;
> +} __packed;
> +
> +struct bdb_compression_parameters {
> +	u16 entry_size;
> +	struct dsc_compression_parameters_entry data[16];
> +} __packed;
> +
>  #endif /* _INTEL_VBT_DEFS_H_ */
> -- 
> 2.20.1
> 
> _______________________________________________
> igt-dev mailing list
> igt-dev@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/igt-dev

-- 
Ville Syrjälä
Intel
_______________________________________________
igt-dev mailing list
igt-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/igt-dev

^ permalink raw reply	[flat|nested] 7+ messages in thread

* Re: [igt-dev] [PATCH i-g-t 2/2] tools/intel_vbt_decode: add decoding of the compression parameters block
  2019-10-28 13:54 ` [igt-dev] [PATCH i-g-t 2/2] tools/intel_vbt_decode: add decoding of the compression parameters block Jani Nikula
@ 2019-10-28 16:35   ` Ville Syrjälä
  0 siblings, 0 replies; 7+ messages in thread
From: Ville Syrjälä @ 2019-10-28 16:35 UTC (permalink / raw)
  To: Jani Nikula; +Cc: igt-dev

On Mon, Oct 28, 2019 at 03:54:51PM +0200, Jani Nikula wrote:
> Decode block 56.

lgtm

Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

> 
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
> ---
>  tools/intel_vbt_decode.c | 87 ++++++++++++++++++++++++++++++++++++++++
>  1 file changed, 87 insertions(+)
> 
> diff --git a/tools/intel_vbt_decode.c b/tools/intel_vbt_decode.c
> index deba47994c89..625dc0787527 100644
> --- a/tools/intel_vbt_decode.c
> +++ b/tools/intel_vbt_decode.c
> @@ -1548,6 +1548,88 @@ static void dump_mipi_sequence(struct context *context,
>  			dump_sequence(sequence_ptrs[i], sequence->version);
>  }
>  
> +#define KB(x) ((x) * 1024)
> +
> +static int dsc_buffer_block_size(u8 buffer_block_size)
> +{
> +	switch (buffer_block_size) {
> +	case VBT_RC_BUFFER_BLOCK_SIZE_1KB:
> +		return KB(1);
> +		break;
> +	case VBT_RC_BUFFER_BLOCK_SIZE_4KB:
> +		return KB(4);
> +		break;
> +	case VBT_RC_BUFFER_BLOCK_SIZE_16KB:
> +		return KB(16);
> +		break;
> +	case VBT_RC_BUFFER_BLOCK_SIZE_64KB:
> +		return KB(64);
> +		break;
> +	default:
> +		return 0;
> +	}
> +}
> +
> +static int actual_buffer_size(u8 buffer_block_size, u8 rc_buffer_size)
> +{
> +	return dsc_buffer_block_size(buffer_block_size) * (rc_buffer_size + 1);
> +}
> +
> +static const char *dsc_max_bpp(u8 value)
> +{
> +	switch (value) {
> +	case 0:
> +		return "6";
> +	case 1:
> +		return "8";
> +	case 2:
> +		return "10";
> +	case 3:
> +		return "12";
> +	default:
> +		return "<unknown>";
> +	}
> +}
> +
> +static void dump_compression_parameters(struct context *context,
> +					const struct bdb_block *block)
> +{
> +	const struct bdb_compression_parameters *dsc = block->data;
> +	const struct dsc_compression_parameters_entry *data;
> +	int i;
> +
> +	for (i = 0; i < ARRAY_SIZE(dsc->data); i++) {
> +		/* FIXME: need to handle sizeof(*data) != dsc->entry_size */
> +		data = &dsc->data[i];
> +
> +		if (i != context->panel_type && !context->dump_all_panel_types)
> +			continue;
> +
> +		printf("\tDSC block %d%s\n", i,
> +		       i == context->panel_type ? " *" : "");
> +		printf("\t\tDSC version: %u.%u\n", data->version_major,
> +		       data->version_minor);
> +		printf("\t\tActual buffer size: %d\n",
> +		       actual_buffer_size(data->rc_buffer_block_size,
> +					  data->rc_buffer_size));
> +		printf("\t\t\tRC buffer block size: %d (%u)\n",
> +		       dsc_buffer_block_size(data->rc_buffer_block_size),
> +		       data->rc_buffer_block_size);
> +		printf("\t\t\tRC buffer size: %u\n", data->rc_buffer_size);
> +		printf("\t\tSlices per line: 0x%02x\n", data->slices_per_line);
> +		printf("\t\tLine buffer depth: %u bits (%u)\n",
> +		       data->line_buffer_depth + 8, data->line_buffer_depth);
> +		printf("\t\tBlock prediction enable: %u\n",
> +		       data->block_prediction_enable);
> +		printf("\t\tMax bpp: %s bpp (%u)\n", dsc_max_bpp(data->max_bpp),
> +		       data->max_bpp);
> +		printf("\t\tSupport 8 bpc: %u\n", data->support_8bpc);
> +		printf("\t\tSupport 10 bpc: %u\n", data->support_10bpc);
> +		printf("\t\tSupport 12 bpc: %u\n", data->support_12bpc);
> +		printf("\t\tSlice height: %u\n", data->slice_height);
> +	}
> +}
> +
>  /* get panel type from lvds options block, or -1 if block not found */
>  static int get_panel_type(struct context *context)
>  {
> @@ -1665,6 +1747,11 @@ struct dumper dumpers[] = {
>  		.name = "MIPI sequence block",
>  		.dump = dump_mipi_sequence,
>  	},
> +	{
> +		.id = BDB_COMPRESSION_PARAMETERS,
> +		.name = "Compression parameters block",
> +		.dump = dump_compression_parameters,
> +	},
>  };
>  
>  static void hex_dump(const void *data, uint32_t size)
> -- 
> 2.20.1
> 
> _______________________________________________
> igt-dev mailing list
> igt-dev@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/igt-dev

-- 
Ville Syrjälä
Intel
_______________________________________________
igt-dev mailing list
igt-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/igt-dev

^ permalink raw reply	[flat|nested] 7+ messages in thread

* Re: [igt-dev] [PATCH i-g-t 1/2] tools/intel_vbt_decode: update vbt defs
  2019-10-28 16:07 ` [igt-dev] [PATCH i-g-t 1/2] " Ville Syrjälä
@ 2019-10-29  8:39   ` Jani Nikula
  0 siblings, 0 replies; 7+ messages in thread
From: Jani Nikula @ 2019-10-29  8:39 UTC (permalink / raw)
  To: Ville Syrjälä; +Cc: igt-dev

On Mon, 28 Oct 2019, Ville Syrjälä <ville.syrjala@linux.intel.com> wrote:
> On Mon, Oct 28, 2019 at 03:54:50PM +0200, Jani Nikula wrote:
>> Update intel_vbt_defs.h from kernel commit 96815f3d8b50 ("drm/i915/bios:
>> add compression parameter block definition").
>
> Looks like this also pulls in a couple of other changes that were never
> synced. Anyways, lgtm when compared with the kernel stuff.

Thanks for the reviews, pushed both, with a note about syncing other
changes too.

BR,
Jani.



>
> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
>> 
>> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
>> ---
>>  tools/intel_vbt_defs.h | 58 ++++++++++++++++++++++++++++++++++++++++++
>>  1 file changed, 58 insertions(+)
>> 
>> diff --git a/tools/intel_vbt_defs.h b/tools/intel_vbt_defs.h
>> index c903cda3bb5e..69a7cb1fa121 100644
>> --- a/tools/intel_vbt_defs.h
>> +++ b/tools/intel_vbt_defs.h
>> @@ -114,6 +114,7 @@ enum bdb_block_id {
>>  	BDB_LVDS_POWER			= 44,
>>  	BDB_MIPI_CONFIG			= 52,
>>  	BDB_MIPI_SEQUENCE		= 53,
>> +	BDB_COMPRESSION_PARAMETERS	= 56,
>>  	BDB_SKIP			= 254, /* VBIOS private block, ignore */
>>  };
>>  
>> @@ -291,6 +292,8 @@ struct bdb_general_features {
>>  #define DVO_PORT_HDMIE		12				/* 193 */
>>  #define DVO_PORT_DPF		13				/* N/A */
>>  #define DVO_PORT_HDMIF		14				/* N/A */
>> +#define DVO_PORT_DPG		15
>> +#define DVO_PORT_HDMIG		16
>>  #define DVO_PORT_MIPIA		21				/* 171 */
>>  #define DVO_PORT_MIPIB		22				/* 171 */
>>  #define DVO_PORT_MIPIC		23				/* 171 */
>> @@ -310,10 +313,13 @@ enum vbt_gmbus_ddi {
>>  	DDC_BUS_DDI_F,
>>  	ICL_DDC_BUS_DDI_A = 0x1,
>>  	ICL_DDC_BUS_DDI_B,
>> +	TGL_DDC_BUS_DDI_C,
>>  	ICL_DDC_BUS_PORT_1 = 0x4,
>>  	ICL_DDC_BUS_PORT_2,
>>  	ICL_DDC_BUS_PORT_3,
>>  	ICL_DDC_BUS_PORT_4,
>> +	TGL_DDC_BUS_PORT_5,
>> +	TGL_DDC_BUS_PORT_6,
>>  };
>>  
>>  #define DP_AUX_A 0x40
>> @@ -322,6 +328,7 @@ enum vbt_gmbus_ddi {
>>  #define DP_AUX_D 0x30
>>  #define DP_AUX_E 0x50
>>  #define DP_AUX_F 0x60
>> +#define DP_AUX_G 0x70
>>  
>>  #define VBT_DP_MAX_LINK_RATE_HBR3	0
>>  #define VBT_DP_MAX_LINK_RATE_HBR2	1
>> @@ -805,4 +812,55 @@ struct bdb_mipi_sequence {
>>  	u8 data[0]; /* up to 6 variable length blocks */
>>  } __packed;
>>  
>> +/*
>> + * Block 56 - Compression Parameters
>> + */
>> +
>> +#define VBT_RC_BUFFER_BLOCK_SIZE_1KB	0
>> +#define VBT_RC_BUFFER_BLOCK_SIZE_4KB	1
>> +#define VBT_RC_BUFFER_BLOCK_SIZE_16KB	2
>> +#define VBT_RC_BUFFER_BLOCK_SIZE_64KB	3
>> +
>> +#define VBT_DSC_LINE_BUFFER_DEPTH(vbt_value)	((vbt_value) + 8) /* bits */
>> +#define VBT_DSC_MAX_BPP(vbt_value)		(6 + (vbt_value) * 2)
>> +
>> +struct dsc_compression_parameters_entry {
>> +	u8 version_major:4;
>> +	u8 version_minor:4;
>> +
>> +	u8 rc_buffer_block_size:2;
>> +	u8 reserved1:6;
>> +
>> +	/*
>> +	 * Buffer size in bytes:
>> +	 *
>> +	 * 4 ^ rc_buffer_block_size * 1024 * (rc_buffer_size + 1) bytes
>> +	 */
>> +	u8 rc_buffer_size;
>> +	u32 slices_per_line;
>> +
>> +	u8 line_buffer_depth:4;
>> +	u8 reserved2:4;
>> +
>> +	/* Flag Bits 1 */
>> +	u8 block_prediction_enable:1;
>> +	u8 reserved3:7;
>> +
>> +	u8 max_bpp; /* mapping */
>> +
>> +	/* Color depth capabilities */
>> +	u8 reserved4:1;
>> +	u8 support_8bpc:1;
>> +	u8 support_10bpc:1;
>> +	u8 support_12bpc:1;
>> +	u8 reserved5:4;
>> +
>> +	u16 slice_height;
>> +} __packed;
>> +
>> +struct bdb_compression_parameters {
>> +	u16 entry_size;
>> +	struct dsc_compression_parameters_entry data[16];
>> +} __packed;
>> +
>>  #endif /* _INTEL_VBT_DEFS_H_ */
>> -- 
>> 2.20.1
>> 
>> _______________________________________________
>> igt-dev mailing list
>> igt-dev@lists.freedesktop.org
>> https://lists.freedesktop.org/mailman/listinfo/igt-dev

-- 
Jani Nikula, Intel Open Source Graphics Center
_______________________________________________
igt-dev mailing list
igt-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/igt-dev

^ permalink raw reply	[flat|nested] 7+ messages in thread

* [igt-dev] ✓ Fi.CI.IGT: success for series starting with [i-g-t,1/2] tools/intel_vbt_decode: update vbt defs
  2019-10-28 13:54 [igt-dev] [PATCH i-g-t 1/2] tools/intel_vbt_decode: update vbt defs Jani Nikula
                   ` (2 preceding siblings ...)
  2019-10-28 16:07 ` [igt-dev] [PATCH i-g-t 1/2] " Ville Syrjälä
@ 2019-10-29 10:02 ` Patchwork
  3 siblings, 0 replies; 7+ messages in thread
From: Patchwork @ 2019-10-29 10:02 UTC (permalink / raw)
  To: Jani Nikula; +Cc: igt-dev

== Series Details ==

Series: series starting with [i-g-t,1/2] tools/intel_vbt_decode: update vbt defs
URL   : https://patchwork.freedesktop.org/series/68660/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_7201_full -> IGTPW_3623_full
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3623/index.html

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in IGTPW_3623_full:

### IGT changes ###

#### Suppressed ####

  The following results come from untrusted machines, tests, or statuses.
  They do not affect the overall result.

  * igt@kms_cursor_crc@pipe-a-cursor-256x85-offscreen:
    - {shard-tglb}:       [PASS][1] -> [INCOMPLETE][2]
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7201/shard-tglb7/igt@kms_cursor_crc@pipe-a-cursor-256x85-offscreen.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3623/shard-tglb4/igt@kms_cursor_crc@pipe-a-cursor-256x85-offscreen.html

  
Known issues
------------

  Here are the changes found in IGTPW_3623_full that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@gem_ctx_isolation@vcs1-none:
    - shard-iclb:         [PASS][3] -> [SKIP][4] ([fdo#109276] / [fdo#112080]) +1 similar issue
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7201/shard-iclb1/igt@gem_ctx_isolation@vcs1-none.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3623/shard-iclb5/igt@gem_ctx_isolation@vcs1-none.html

  * igt@gem_ctx_shared@exec-single-timeline-bsd:
    - shard-iclb:         [PASS][5] -> [SKIP][6] ([fdo#110841])
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7201/shard-iclb6/igt@gem_ctx_shared@exec-single-timeline-bsd.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3623/shard-iclb1/igt@gem_ctx_shared@exec-single-timeline-bsd.html

  * igt@gem_ctx_switch@vcs1-heavy:
    - shard-iclb:         [PASS][7] -> [SKIP][8] ([fdo#112080]) +11 similar issues
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7201/shard-iclb2/igt@gem_ctx_switch@vcs1-heavy.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3623/shard-iclb3/igt@gem_ctx_switch@vcs1-heavy.html

  * igt@gem_exec_balancer@smoke:
    - shard-iclb:         [PASS][9] -> [SKIP][10] ([fdo#110854])
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7201/shard-iclb1/igt@gem_exec_balancer@smoke.html
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3623/shard-iclb6/igt@gem_exec_balancer@smoke.html

  * igt@gem_exec_schedule@fifo-bsd1:
    - shard-iclb:         [PASS][11] -> [SKIP][12] ([fdo#109276]) +13 similar issues
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7201/shard-iclb4/igt@gem_exec_schedule@fifo-bsd1.html
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3623/shard-iclb3/igt@gem_exec_schedule@fifo-bsd1.html

  * igt@gem_exec_schedule@preempt-other-chain-bsd:
    - shard-iclb:         [PASS][13] -> [SKIP][14] ([fdo#112146]) +6 similar issues
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7201/shard-iclb6/igt@gem_exec_schedule@preempt-other-chain-bsd.html
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3623/shard-iclb4/igt@gem_exec_schedule@preempt-other-chain-bsd.html

  * igt@gem_userptr_blits@dmabuf-sync:
    - shard-snb:          [PASS][15] -> [DMESG-WARN][16] ([fdo#111870])
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7201/shard-snb7/igt@gem_userptr_blits@dmabuf-sync.html
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3623/shard-snb2/igt@gem_userptr_blits@dmabuf-sync.html

  * igt@gem_userptr_blits@sync-unmap:
    - shard-hsw:          [PASS][17] -> [DMESG-WARN][18] ([fdo#111870]) +1 similar issue
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7201/shard-hsw6/igt@gem_userptr_blits@sync-unmap.html
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3623/shard-hsw5/igt@gem_userptr_blits@sync-unmap.html

  * igt@gem_workarounds@suspend-resume-fd:
    - shard-kbl:          [PASS][19] -> [DMESG-WARN][20] ([fdo#108566]) +3 similar issues
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7201/shard-kbl4/igt@gem_workarounds@suspend-resume-fd.html
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3623/shard-kbl1/igt@gem_workarounds@suspend-resume-fd.html

  * igt@kms_cursor_crc@pipe-c-cursor-128x128-onscreen:
    - shard-kbl:          [PASS][21] -> [FAIL][22] ([fdo#103232])
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7201/shard-kbl7/igt@kms_cursor_crc@pipe-c-cursor-128x128-onscreen.html
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3623/shard-kbl4/igt@kms_cursor_crc@pipe-c-cursor-128x128-onscreen.html
    - shard-apl:          [PASS][23] -> [FAIL][24] ([fdo#103232])
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7201/shard-apl7/igt@kms_cursor_crc@pipe-c-cursor-128x128-onscreen.html
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3623/shard-apl3/igt@kms_cursor_crc@pipe-c-cursor-128x128-onscreen.html

  * igt@kms_frontbuffer_tracking@fbc-1p-pri-indfb-multidraw:
    - shard-iclb:         [PASS][25] -> [FAIL][26] ([fdo#103167]) +2 similar issues
   [25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7201/shard-iclb1/igt@kms_frontbuffer_tracking@fbc-1p-pri-indfb-multidraw.html
   [26]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3623/shard-iclb6/igt@kms_frontbuffer_tracking@fbc-1p-pri-indfb-multidraw.html

  * igt@kms_frontbuffer_tracking@psr-suspend:
    - shard-iclb:         [PASS][27] -> [INCOMPLETE][28] ([fdo#106978] / [fdo#107713])
   [27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7201/shard-iclb3/igt@kms_frontbuffer_tracking@psr-suspend.html
   [28]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3623/shard-iclb1/igt@kms_frontbuffer_tracking@psr-suspend.html

  * igt@kms_plane@plane-panning-bottom-right-suspend-pipe-a-planes:
    - shard-apl:          [PASS][29] -> [DMESG-WARN][30] ([fdo#108566])
   [29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7201/shard-apl7/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-a-planes.html
   [30]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3623/shard-apl6/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-a-planes.html

  * igt@kms_plane_scaling@pipe-a-scaler-with-rotation:
    - shard-iclb:         [PASS][31] -> [INCOMPLETE][32] ([fdo#107713] / [fdo#110041])
   [31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7201/shard-iclb5/igt@kms_plane_scaling@pipe-a-scaler-with-rotation.html
   [32]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3623/shard-iclb7/igt@kms_plane_scaling@pipe-a-scaler-with-rotation.html

  * igt@kms_psr@no_drrs:
    - shard-iclb:         [PASS][33] -> [FAIL][34] ([fdo#108341])
   [33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7201/shard-iclb5/igt@kms_psr@no_drrs.html
   [34]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3623/shard-iclb1/igt@kms_psr@no_drrs.html

  * igt@kms_psr@psr2_cursor_mmap_cpu:
    - shard-iclb:         [PASS][35] -> [SKIP][36] ([fdo#109441]) +3 similar issues
   [35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7201/shard-iclb2/igt@kms_psr@psr2_cursor_mmap_cpu.html
   [36]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3623/shard-iclb4/igt@kms_psr@psr2_cursor_mmap_cpu.html

  * igt@kms_setmode@basic:
    - shard-kbl:          [PASS][37] -> [FAIL][38] ([fdo#99912])
   [37]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7201/shard-kbl2/igt@kms_setmode@basic.html
   [38]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3623/shard-kbl3/igt@kms_setmode@basic.html

  
#### Possible fixes ####

  * igt@gem_busy@busy-vcs1:
    - shard-iclb:         [SKIP][39] ([fdo#112080]) -> [PASS][40] +7 similar issues
   [39]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7201/shard-iclb6/igt@gem_busy@busy-vcs1.html
   [40]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3623/shard-iclb2/igt@gem_busy@busy-vcs1.html

  * igt@gem_ctx_isolation@vcs1-clean:
    - shard-iclb:         [SKIP][41] ([fdo#109276] / [fdo#112080]) -> [PASS][42] +1 similar issue
   [41]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7201/shard-iclb5/igt@gem_ctx_isolation@vcs1-clean.html
   [42]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3623/shard-iclb1/igt@gem_ctx_isolation@vcs1-clean.html

  * igt@gem_eio@in-flight-suspend:
    - {shard-tglb}:       [INCOMPLETE][43] ([fdo#111832] / [fdo#111850] / [fdo#112081]) -> [PASS][44]
   [43]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7201/shard-tglb7/igt@gem_eio@in-flight-suspend.html
   [44]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3623/shard-tglb8/igt@gem_eio@in-flight-suspend.html

  * igt@gem_exec_create@forked:
    - {shard-tglb}:       [INCOMPLETE][45] ([fdo#108838] / [fdo#111747]) -> [PASS][46]
   [45]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7201/shard-tglb3/igt@gem_exec_create@forked.html
   [46]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3623/shard-tglb4/igt@gem_exec_create@forked.html

  * igt@gem_exec_schedule@independent-bsd2:
    - shard-iclb:         [SKIP][47] ([fdo#109276]) -> [PASS][48] +15 similar issues
   [47]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7201/shard-iclb5/igt@gem_exec_schedule@independent-bsd2.html
   [48]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3623/shard-iclb1/igt@gem_exec_schedule@independent-bsd2.html

  * igt@gem_exec_schedule@preempt-queue-chain-bsd1:
    - {shard-tglb}:       [INCOMPLETE][49] ([fdo#111606] / [fdo#111677]) -> [PASS][50]
   [49]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7201/shard-tglb6/igt@gem_exec_schedule@preempt-queue-chain-bsd1.html
   [50]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3623/shard-tglb3/igt@gem_exec_schedule@preempt-queue-chain-bsd1.html

  * igt@gem_exec_schedule@wide-bsd:
    - shard-iclb:         [SKIP][51] ([fdo#112146]) -> [PASS][52] +4 similar issues
   [51]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7201/shard-iclb4/igt@gem_exec_schedule@wide-bsd.html
   [52]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3623/shard-iclb7/igt@gem_exec_schedule@wide-bsd.html

  * igt@gem_exec_suspend@basic-s3:
    - shard-apl:          [DMESG-WARN][53] ([fdo#108566]) -> [PASS][54]
   [53]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7201/shard-apl1/igt@gem_exec_suspend@basic-s3.html
   [54]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3623/shard-apl2/igt@gem_exec_suspend@basic-s3.html

  * igt@gem_persistent_relocs@forked-thrashing:
    - shard-snb:          [FAIL][55] ([fdo#112037]) -> [PASS][56]
   [55]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7201/shard-snb6/igt@gem_persistent_relocs@forked-thrashing.html
   [56]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3623/shard-snb5/igt@gem_persistent_relocs@forked-thrashing.html

  * igt@gem_sync@basic-each:
    - {shard-tglb}:       [INCOMPLETE][57] ([fdo#111647]) -> [PASS][58]
   [57]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7201/shard-tglb3/igt@gem_sync@basic-each.html
   [58]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3623/shard-tglb7/igt@gem_sync@basic-each.html

  * igt@gem_userptr_blits@map-fixed-invalidate-overlap-busy:
    - shard-snb:          [DMESG-WARN][59] ([fdo#111870]) -> [PASS][60] +1 similar issue
   [59]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7201/shard-snb7/igt@gem_userptr_blits@map-fixed-invalidate-overlap-busy.html
   [60]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3623/shard-snb2/igt@gem_userptr_blits@map-fixed-invalidate-overlap-busy.html

  * igt@gem_userptr_blits@sync-unmap-cycles:
    - shard-hsw:          [DMESG-WARN][61] ([fdo#111870]) -> [PASS][62] +1 similar issue
   [61]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7201/shard-hsw2/igt@gem_userptr_blits@sync-unmap-cycles.html
   [62]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3623/shard-hsw6/igt@gem_userptr_blits@sync-unmap-cycles.html

  * igt@i915_pm_backlight@fade_with_suspend:
    - {shard-tglb}:       [INCOMPLETE][63] ([fdo#111832] / [fdo#111850]) -> [PASS][64] +1 similar issue
   [63]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7201/shard-tglb1/igt@i915_pm_backlight@fade_with_suspend.html
   [64]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3623/shard-tglb4/igt@i915_pm_backlight@fade_with_suspend.html

  * igt@i915_suspend@forcewake:
    - shard-kbl:          [DMESG-WARN][65] ([fdo#108566]) -> [PASS][66] +3 similar issues
   [65]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7201/shard-kbl4/igt@i915_suspend@forcewake.html
   [66]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3623/shard-kbl2/igt@i915_suspend@forcewake.html

  * igt@kms_atomic_interruptible@universal-setplane-primary:
    - shard-apl:          [INCOMPLETE][67] ([fdo#103927]) -> [PASS][68] +2 similar issues
   [67]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7201/shard-apl2/igt@kms_atomic_interruptible@universal-setplane-primary.html
   [68]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3623/shard-apl8/igt@kms_atomic_interruptible@universal-setplane-primary.html

  * igt@kms_cursor_crc@pipe-c-cursor-suspend:
    - shard-kbl:          [INCOMPLETE][69] ([fdo#103665]) -> [PASS][70]
   [69]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7201/shard-kbl3/igt@kms_cursor_crc@pipe-c-cursor-suspend.html
   [70]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3623/shard-kbl4/igt@kms_cursor_crc@pipe-c-cursor-suspend.html

  * igt@kms_flip@flip-vs-absolute-wf_vblank-interruptible:
    - shard-hsw:          [INCOMPLETE][71] ([fdo#103540]) -> [PASS][72] +1 similar issue
   [71]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7201/shard-hsw1/igt@kms_flip@flip-vs-absolute-wf_vblank-interruptible.html
   [72]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3623/shard-hsw1/igt@kms_flip@flip-vs-absolute-wf_vblank-interruptible.html

  * igt@kms_flip@flip-vs-panning-vs-hang:
    - shard-iclb:         [INCOMPLETE][73] ([fdo#107713]) -> [PASS][74]
   [73]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7201/shard-iclb7/igt@kms_flip@flip-vs-panning-vs-hang.html
   [74]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3623/shard-iclb3/igt@kms_flip@flip-vs-panning-vs-hang.html

  * igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-draw-pwrite:
    - shard-glk:          [FAIL][75] ([fdo#103167]) -> [PASS][76]
   [75]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7201/shard-glk5/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-draw-pwrite.html
   [76]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3623/shard-glk3/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-draw-pwrite.html

  * igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-cur-indfb-draw-render:
    - shard-iclb:         [FAIL][77] ([fdo#103167]) -> [PASS][78] +2 similar issues
   [77]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7201/shard-iclb2/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-cur-indfb-draw-render.html
   [78]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3623/shard-iclb5/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-cur-indfb-draw-render.html

  * igt@kms_psr@psr2_sprite_plane_move:
    - shard-iclb:         [SKIP][79] ([fdo#109441]) -> [PASS][80] +1 similar issue
   [79]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7201/shard-iclb5/igt@kms_psr@psr2_sprite_plane_move.html
   [80]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3623/shard-iclb2/igt@kms_psr@psr2_sprite_plane_move.html

  * igt@perf_pmu@busy-double-start-vecs0:
    - {shard-tglb}:       [INCOMPLETE][81] ([fdo#111747]) -> [PASS][82] +4 similar issues
   [81]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7201/shard-tglb7/igt@perf_pmu@busy-double-start-vecs0.html
   [82]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3623/shard-tglb6/igt@perf_pmu@busy-double-start-vecs0.html

  
#### Warnings ####

  * igt@gem_ctx_isolation@vcs1-nonpriv:
    - shard-iclb:         [FAIL][83] ([fdo#111329]) -> [SKIP][84] ([fdo#109276] / [fdo#112080])
   [83]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7201/shard-iclb1/igt@gem_ctx_isolation@vcs1-nonpriv.html
   [84]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3623/shard-iclb5/igt@gem_ctx_isolation@vcs1-nonpriv.html

  * igt@gem_ctx_isolation@vcs1-s3:
    - shard-kbl:          [DMESG-WARN][85] ([fdo#108566]) -> [INCOMPLETE][86] ([fdo#103665])
   [85]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7201/shard-kbl1/igt@gem_ctx_isolation@vcs1-s3.html
   [86]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3623/shard-kbl4/igt@gem_ctx_isolation@vcs1-s3.html

  * igt@gem_mocs_settings@mocs-isolation-bsd2:
    - shard-iclb:         [FAIL][87] ([fdo#111330]) -> [SKIP][88] ([fdo#109276])
   [87]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7201/shard-iclb1/igt@gem_mocs_settings@mocs-isolation-bsd2.html
   [88]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3623/shard-iclb7/igt@gem_mocs_settings@mocs-isolation-bsd2.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167
  [fdo#103232]: https://bugs.freedesktop.org/show_bug.cgi?id=103232
  [fdo#103540]: https://bugs.freedesktop.org/show_bug.cgi?id=103540
  [fdo#103665]: https://bugs.freedesktop.org/show_bug.cgi?id=103665
  [fdo#103927]: https://bugs.freedesktop.org/show_bug.cgi?id=103927
  [fdo#106978]: https://bugs.freedesktop.org/show_bug.cgi?id=106978
  [fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713
  [fdo#108341]: https://bugs.freedesktop.org/show_bug.cgi?id=108341
  [fdo#108566]: https://bugs.freedesktop.org/show_bug.cgi?id=108566
  [fdo#108838]: https://bugs.freedesktop.org/show_bug.cgi?id=108838
  [fdo#109276]: https://bugs.freedesktop.org/show_bug.cgi?id=109276
  [fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441
  [fdo#110041]: https://bugs.freedesktop.org/show_bug.cgi?id=110041
  [fdo#110841]: https://bugs.freedesktop.org/show_bug.cgi?id=110841
  [fdo#110854]: https://bugs.freedesktop.org/show_bug.cgi?id=110854
  [fdo#111329]: https://bugs.freedesktop.org/show_bug.cgi?id=111329
  [fdo#111330]: https://bugs.freedesktop.org/show_bug.cgi?id=111330
  [fdo#111606]: https://bugs.freedesktop.org/show_bug.cgi?id=111606
  [fdo#111647]: https://bugs.freedesktop.org/show_bug.cgi?id=111647
  [fdo#111677]: https://bugs.freedesktop.org/show_bug.cgi?id=111677
  [fdo#111703]: https://bugs.freedesktop.org/show_bug.cgi?id=111703
  [fdo#111747]: https://bugs.freedesktop.org/show_bug.cgi?id=111747
  [fdo#111832]: https://bugs.freedesktop.org/show_bug.cgi?id=111832
  [fdo#111850]: https://bugs.freedesktop.org/show_bug.cgi?id=111850
  [fdo#111870]: https://bugs.freedesktop.org/show_bug.cgi?id=111870
  [fdo#111887]: https://bugs.freedesktop.org/show_bug.cgi?id=111887
  [fdo#112037]: https://bugs.freedesktop.org/show_bug.cgi?id=112037
  [fdo#112080]: https://bugs.freedesktop.org/show_bug.cgi?id=112080
  [fdo#112081]: https://bugs.freedesktop.org/show_bug.cgi?id=112081
  [fdo#112146]: https://bugs.freedesktop.org/show_bug.cgi?id=112146
  [fdo#99912]: https://bugs.freedesktop.org/show_bug.cgi?id=99912


Participating hosts (11 -> 8)
------------------------------

  Missing    (3): pig-skl-6260u pig-glk-j5005 pig-hsw-4770r 


Build changes
-------------

  * CI: CI-20190529 -> None
  * IGT: IGT_5247 -> IGTPW_3623
  * Piglit: piglit_4509 -> None

  CI-20190529: 20190529
  CI_DRM_7201: c5ec9a4155c4bac3d44e88fe6a4ddadfa1e5dc45 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGTPW_3623: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3623/index.html
  IGT_5247: 4d1f6036dfceeee64f92c02475f9ae2cc8ffcc1b @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_3623/index.html
_______________________________________________
igt-dev mailing list
igt-dev@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/igt-dev

^ permalink raw reply	[flat|nested] 7+ messages in thread

end of thread, other threads:[~2019-10-29 10:02 UTC | newest]

Thread overview: 7+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2019-10-28 13:54 [igt-dev] [PATCH i-g-t 1/2] tools/intel_vbt_decode: update vbt defs Jani Nikula
2019-10-28 13:54 ` [igt-dev] [PATCH i-g-t 2/2] tools/intel_vbt_decode: add decoding of the compression parameters block Jani Nikula
2019-10-28 16:35   ` Ville Syrjälä
2019-10-28 14:37 ` [igt-dev] ✓ Fi.CI.BAT: success for series starting with [i-g-t,1/2] tools/intel_vbt_decode: update vbt defs Patchwork
2019-10-28 16:07 ` [igt-dev] [PATCH i-g-t 1/2] " Ville Syrjälä
2019-10-29  8:39   ` Jani Nikula
2019-10-29 10:02 ` [igt-dev] ✓ Fi.CI.IGT: success for series starting with [i-g-t,1/2] " Patchwork

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