* [PATCH 0/7] drm/i915: Expose more formats
@ 2019-10-31 16:56 ` Ville Syrjala
0 siblings, 0 replies; 20+ messages in thread
From: Ville Syrjala @ 2019-10-31 16:56 UTC (permalink / raw)
To: intel-gfx
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Same series as before but fp16 caused a bunch of rebasing.
I also dropped the ckey stuff for now. It's probably time to
write actual tests for that stuff.
Everything here is reviewed already.
Ville Syrjälä (7):
drm/i915: Expose 10:10:10 XRGB formats on SNB-BDW sprites
drm/i915: Expose alpha formats on VLV/CHV primary planes
drm/i915: Add missing 10bpc formats for pipe B sprites on CHV
drm/i915: Expose C8 on VLV/CHV sprite planes
drm/i915: Add 10bpc formats with alpha for icl+
drm/i915: Sort format arrays consistently
drm/i915: Eliminate redundancy in intel_primary_plane_create()
drivers/gpu/drm/i915/display/intel_display.c | 121 +++++++++++++------
drivers/gpu/drm/i915/display/intel_sprite.c | 69 ++++++++++-
drivers/gpu/drm/i915/i915_reg.h | 16 ++-
3 files changed, 161 insertions(+), 45 deletions(-)
--
2.23.0
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 20+ messages in thread
* [Intel-gfx] [PATCH 0/7] drm/i915: Expose more formats
@ 2019-10-31 16:56 ` Ville Syrjala
0 siblings, 0 replies; 20+ messages in thread
From: Ville Syrjala @ 2019-10-31 16:56 UTC (permalink / raw)
To: intel-gfx
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Same series as before but fp16 caused a bunch of rebasing.
I also dropped the ckey stuff for now. It's probably time to
write actual tests for that stuff.
Everything here is reviewed already.
Ville Syrjälä (7):
drm/i915: Expose 10:10:10 XRGB formats on SNB-BDW sprites
drm/i915: Expose alpha formats on VLV/CHV primary planes
drm/i915: Add missing 10bpc formats for pipe B sprites on CHV
drm/i915: Expose C8 on VLV/CHV sprite planes
drm/i915: Add 10bpc formats with alpha for icl+
drm/i915: Sort format arrays consistently
drm/i915: Eliminate redundancy in intel_primary_plane_create()
drivers/gpu/drm/i915/display/intel_display.c | 121 +++++++++++++------
drivers/gpu/drm/i915/display/intel_sprite.c | 69 ++++++++++-
drivers/gpu/drm/i915/i915_reg.h | 16 ++-
3 files changed, 161 insertions(+), 45 deletions(-)
--
2.23.0
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 20+ messages in thread
* [PATCH 1/7] drm/i915: Expose 10:10:10 XRGB formats on SNB-BDW sprites
@ 2019-10-31 16:56 ` Ville Syrjala
0 siblings, 0 replies; 20+ messages in thread
From: Ville Syrjala @ 2019-10-31 16:56 UTC (permalink / raw)
To: intel-gfx
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
SNB-BDW support 10:10:10 formats on the sprite planes. Let's expose
them.
v2: Rebase due to fp16 landing
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
Reviewed-by: Uma Shankar <uma.shankar@intel.com>
---
drivers/gpu/drm/i915/display/intel_sprite.c | 16 ++++++++++++++++
1 file changed, 16 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_sprite.c b/drivers/gpu/drm/i915/display/intel_sprite.c
index edc41fc40726..514b620378d5 100644
--- a/drivers/gpu/drm/i915/display/intel_sprite.c
+++ b/drivers/gpu/drm/i915/display/intel_sprite.c
@@ -1348,6 +1348,12 @@ static u32 ivb_sprite_ctl(const struct intel_crtc_state *crtc_state,
case DRM_FORMAT_XRGB8888:
sprctl |= SPRITE_FORMAT_RGBX888;
break;
+ case DRM_FORMAT_XBGR2101010:
+ sprctl |= SPRITE_FORMAT_RGBX101010 | SPRITE_RGB_ORDER_RGBX;
+ break;
+ case DRM_FORMAT_XRGB2101010:
+ sprctl |= SPRITE_FORMAT_RGBX101010;
+ break;
case DRM_FORMAT_XBGR16161616F:
sprctl |= SPRITE_FORMAT_RGBX161616 | SPRITE_RGB_ORDER_RGBX;
break;
@@ -1653,6 +1659,12 @@ static u32 g4x_sprite_ctl(const struct intel_crtc_state *crtc_state,
case DRM_FORMAT_XRGB8888:
dvscntr |= DVS_FORMAT_RGBX888;
break;
+ case DRM_FORMAT_XBGR2101010:
+ dvscntr |= DVS_FORMAT_RGBX101010 | DVS_RGB_ORDER_XBGR;
+ break;
+ case DRM_FORMAT_XRGB2101010:
+ dvscntr |= DVS_FORMAT_RGBX101010;
+ break;
case DRM_FORMAT_XBGR16161616F:
dvscntr |= DVS_FORMAT_RGBX161616 | DVS_RGB_ORDER_XBGR;
break;
@@ -2375,6 +2387,8 @@ static const u64 i9xx_plane_format_modifiers[] = {
static const u32 snb_plane_formats[] = {
DRM_FORMAT_XRGB8888,
DRM_FORMAT_XBGR8888,
+ DRM_FORMAT_XRGB2101010,
+ DRM_FORMAT_XBGR2101010,
DRM_FORMAT_XRGB16161616F,
DRM_FORMAT_XBGR16161616F,
DRM_FORMAT_YUYV,
@@ -2593,6 +2607,8 @@ static bool snb_sprite_format_mod_supported(struct drm_plane *_plane,
switch (format) {
case DRM_FORMAT_XRGB8888:
case DRM_FORMAT_XBGR8888:
+ case DRM_FORMAT_XRGB2101010:
+ case DRM_FORMAT_XBGR2101010:
case DRM_FORMAT_XRGB16161616F:
case DRM_FORMAT_XBGR16161616F:
case DRM_FORMAT_YUYV:
--
2.23.0
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 20+ messages in thread
* [Intel-gfx] [PATCH 1/7] drm/i915: Expose 10:10:10 XRGB formats on SNB-BDW sprites
@ 2019-10-31 16:56 ` Ville Syrjala
0 siblings, 0 replies; 20+ messages in thread
From: Ville Syrjala @ 2019-10-31 16:56 UTC (permalink / raw)
To: intel-gfx
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
SNB-BDW support 10:10:10 formats on the sprite planes. Let's expose
them.
v2: Rebase due to fp16 landing
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
Reviewed-by: Uma Shankar <uma.shankar@intel.com>
---
drivers/gpu/drm/i915/display/intel_sprite.c | 16 ++++++++++++++++
1 file changed, 16 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_sprite.c b/drivers/gpu/drm/i915/display/intel_sprite.c
index edc41fc40726..514b620378d5 100644
--- a/drivers/gpu/drm/i915/display/intel_sprite.c
+++ b/drivers/gpu/drm/i915/display/intel_sprite.c
@@ -1348,6 +1348,12 @@ static u32 ivb_sprite_ctl(const struct intel_crtc_state *crtc_state,
case DRM_FORMAT_XRGB8888:
sprctl |= SPRITE_FORMAT_RGBX888;
break;
+ case DRM_FORMAT_XBGR2101010:
+ sprctl |= SPRITE_FORMAT_RGBX101010 | SPRITE_RGB_ORDER_RGBX;
+ break;
+ case DRM_FORMAT_XRGB2101010:
+ sprctl |= SPRITE_FORMAT_RGBX101010;
+ break;
case DRM_FORMAT_XBGR16161616F:
sprctl |= SPRITE_FORMAT_RGBX161616 | SPRITE_RGB_ORDER_RGBX;
break;
@@ -1653,6 +1659,12 @@ static u32 g4x_sprite_ctl(const struct intel_crtc_state *crtc_state,
case DRM_FORMAT_XRGB8888:
dvscntr |= DVS_FORMAT_RGBX888;
break;
+ case DRM_FORMAT_XBGR2101010:
+ dvscntr |= DVS_FORMAT_RGBX101010 | DVS_RGB_ORDER_XBGR;
+ break;
+ case DRM_FORMAT_XRGB2101010:
+ dvscntr |= DVS_FORMAT_RGBX101010;
+ break;
case DRM_FORMAT_XBGR16161616F:
dvscntr |= DVS_FORMAT_RGBX161616 | DVS_RGB_ORDER_XBGR;
break;
@@ -2375,6 +2387,8 @@ static const u64 i9xx_plane_format_modifiers[] = {
static const u32 snb_plane_formats[] = {
DRM_FORMAT_XRGB8888,
DRM_FORMAT_XBGR8888,
+ DRM_FORMAT_XRGB2101010,
+ DRM_FORMAT_XBGR2101010,
DRM_FORMAT_XRGB16161616F,
DRM_FORMAT_XBGR16161616F,
DRM_FORMAT_YUYV,
@@ -2593,6 +2607,8 @@ static bool snb_sprite_format_mod_supported(struct drm_plane *_plane,
switch (format) {
case DRM_FORMAT_XRGB8888:
case DRM_FORMAT_XBGR8888:
+ case DRM_FORMAT_XRGB2101010:
+ case DRM_FORMAT_XBGR2101010:
case DRM_FORMAT_XRGB16161616F:
case DRM_FORMAT_XBGR16161616F:
case DRM_FORMAT_YUYV:
--
2.23.0
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 20+ messages in thread
* [PATCH 2/7] drm/i915: Expose alpha formats on VLV/CHV primary planes
@ 2019-10-31 16:56 ` Ville Syrjala
0 siblings, 0 replies; 20+ messages in thread
From: Ville Syrjala @ 2019-10-31 16:56 UTC (permalink / raw)
To: intel-gfx
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Currently we expose VLV/CHV alpha blending only on the sprite
planes, but the primary planes can do it as well. Let's flip
it on.
v2: Rebase due to fp16 landing
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Uma Shankar <uma.shankar@intel.com>
---
drivers/gpu/drm/i915/display/intel_display.c | 62 +++++++++++++++++++-
drivers/gpu/drm/i915/i915_reg.h | 1 +
2 files changed, 60 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 348ce0456696..27fb24c1892f 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -111,6 +111,21 @@ static const u32 i965_primary_formats[] = {
DRM_FORMAT_XBGR16161616F,
};
+/* Primary plane formats for vlv/chv */
+static const u32 vlv_primary_formats[] = {
+ DRM_FORMAT_C8,
+ DRM_FORMAT_RGB565,
+ DRM_FORMAT_XRGB8888,
+ DRM_FORMAT_XBGR8888,
+ DRM_FORMAT_ARGB8888,
+ DRM_FORMAT_ABGR8888,
+ DRM_FORMAT_XRGB2101010,
+ DRM_FORMAT_XBGR2101010,
+ DRM_FORMAT_ARGB2101010,
+ DRM_FORMAT_ABGR2101010,
+ DRM_FORMAT_XBGR16161616F,
+};
+
static const u64 i9xx_format_modifiers[] = {
I915_FORMAT_MOD_X_TILED,
DRM_FORMAT_MOD_LINEAR,
@@ -2971,6 +2986,8 @@ static int i9xx_format_to_fourcc(int format)
switch (format) {
case DISPPLANE_8BPP:
return DRM_FORMAT_C8;
+ case DISPPLANE_BGRA555:
+ return DRM_FORMAT_ARGB1555;
case DISPPLANE_BGRX555:
return DRM_FORMAT_XRGB1555;
case DISPPLANE_BGRX565:
@@ -2980,10 +2997,18 @@ static int i9xx_format_to_fourcc(int format)
return DRM_FORMAT_XRGB8888;
case DISPPLANE_RGBX888:
return DRM_FORMAT_XBGR8888;
+ case DISPPLANE_BGRA888:
+ return DRM_FORMAT_ARGB8888;
+ case DISPPLANE_RGBA888:
+ return DRM_FORMAT_ABGR8888;
case DISPPLANE_BGRX101010:
return DRM_FORMAT_XRGB2101010;
case DISPPLANE_RGBX101010:
return DRM_FORMAT_XBGR2101010;
+ case DISPPLANE_BGRA101010:
+ return DRM_FORMAT_ARGB2101010;
+ case DISPPLANE_RGBA101010:
+ return DRM_FORMAT_ABGR2101010;
case DISPPLANE_RGBX161616:
return DRM_FORMAT_XBGR16161616F;
}
@@ -3707,6 +3732,9 @@ static u32 i9xx_plane_ctl(const struct intel_crtc_state *crtc_state,
case DRM_FORMAT_XRGB1555:
dspcntr |= DISPPLANE_BGRX555;
break;
+ case DRM_FORMAT_ARGB1555:
+ dspcntr |= DISPPLANE_BGRA555;
+ break;
case DRM_FORMAT_RGB565:
dspcntr |= DISPPLANE_BGRX565;
break;
@@ -3716,12 +3744,24 @@ static u32 i9xx_plane_ctl(const struct intel_crtc_state *crtc_state,
case DRM_FORMAT_XBGR8888:
dspcntr |= DISPPLANE_RGBX888;
break;
+ case DRM_FORMAT_ARGB8888:
+ dspcntr |= DISPPLANE_BGRA888;
+ break;
+ case DRM_FORMAT_ABGR8888:
+ dspcntr |= DISPPLANE_RGBA888;
+ break;
case DRM_FORMAT_XRGB2101010:
dspcntr |= DISPPLANE_BGRX101010;
break;
case DRM_FORMAT_XBGR2101010:
dspcntr |= DISPPLANE_RGBX101010;
break;
+ case DRM_FORMAT_ARGB2101010:
+ dspcntr |= DISPPLANE_BGRA101010;
+ break;
+ case DRM_FORMAT_ABGR2101010:
+ dspcntr |= DISPPLANE_RGBA101010;
+ break;
case DRM_FORMAT_XBGR16161616F:
dspcntr |= DISPPLANE_RGBX161616;
break;
@@ -15219,8 +15259,12 @@ static bool i965_plane_format_mod_supported(struct drm_plane *_plane,
case DRM_FORMAT_RGB565:
case DRM_FORMAT_XRGB8888:
case DRM_FORMAT_XBGR8888:
+ case DRM_FORMAT_ARGB8888:
+ case DRM_FORMAT_ABGR8888:
case DRM_FORMAT_XRGB2101010:
case DRM_FORMAT_XBGR2101010:
+ case DRM_FORMAT_ARGB2101010:
+ case DRM_FORMAT_ABGR2101010:
case DRM_FORMAT_XBGR16161616F:
return modifier == DRM_FORMAT_MOD_LINEAR ||
modifier == I915_FORMAT_MOD_X_TILED;
@@ -15441,7 +15485,20 @@ intel_primary_plane_create(struct drm_i915_private *dev_priv, enum pipe pipe)
fbc->possible_framebuffer_bits |= plane->frontbuffer_bit;
}
- if (INTEL_GEN(dev_priv) >= 4) {
+ if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) {
+ formats = vlv_primary_formats;
+ num_formats = ARRAY_SIZE(vlv_primary_formats);
+ modifiers = i9xx_format_modifiers;
+
+ plane->max_stride = i9xx_plane_max_stride;
+ plane->update_plane = i9xx_update_plane;
+ plane->disable_plane = i9xx_disable_plane;
+ plane->get_hw_state = i9xx_plane_get_hw_state;
+ plane->check_plane = i9xx_plane_check;
+ plane->min_cdclk = vlv_plane_min_cdclk;
+
+ plane_funcs = &i965_plane_funcs;
+ } else if (INTEL_GEN(dev_priv) >= 4) {
/*
* WaFP16GammaEnabling:ivb
* "Workaround : When using the 64-bit format, the plane
@@ -15462,6 +15519,7 @@ intel_primary_plane_create(struct drm_i915_private *dev_priv, enum pipe pipe)
formats = i965_primary_formats;
num_formats = ARRAY_SIZE(i965_primary_formats);
}
+
modifiers = i9xx_format_modifiers;
plane->max_stride = i9xx_plane_max_stride;
@@ -15474,8 +15532,6 @@ intel_primary_plane_create(struct drm_i915_private *dev_priv, enum pipe pipe)
plane->min_cdclk = hsw_plane_min_cdclk;
else if (IS_IVYBRIDGE(dev_priv))
plane->min_cdclk = ivb_plane_min_cdclk;
- else if (IS_CHERRYVIEW(dev_priv) || IS_VALLEYVIEW(dev_priv))
- plane->min_cdclk = vlv_plane_min_cdclk;
else
plane->min_cdclk = i9xx_plane_min_cdclk;
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 53c280c4e741..b819392ba700 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -6353,6 +6353,7 @@ enum {
#define DISPPLANE_RGBX101010 (0x8 << 26)
#define DISPPLANE_RGBA101010 (0x9 << 26)
#define DISPPLANE_BGRX101010 (0xa << 26)
+#define DISPPLANE_BGRA101010 (0xb << 26)
#define DISPPLANE_RGBX161616 (0xc << 26)
#define DISPPLANE_RGBX888 (0xe << 26)
#define DISPPLANE_RGBA888 (0xf << 26)
--
2.23.0
_______________________________________________
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https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 20+ messages in thread
* [Intel-gfx] [PATCH 2/7] drm/i915: Expose alpha formats on VLV/CHV primary planes
@ 2019-10-31 16:56 ` Ville Syrjala
0 siblings, 0 replies; 20+ messages in thread
From: Ville Syrjala @ 2019-10-31 16:56 UTC (permalink / raw)
To: intel-gfx
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Currently we expose VLV/CHV alpha blending only on the sprite
planes, but the primary planes can do it as well. Let's flip
it on.
v2: Rebase due to fp16 landing
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Uma Shankar <uma.shankar@intel.com>
---
drivers/gpu/drm/i915/display/intel_display.c | 62 +++++++++++++++++++-
drivers/gpu/drm/i915/i915_reg.h | 1 +
2 files changed, 60 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 348ce0456696..27fb24c1892f 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -111,6 +111,21 @@ static const u32 i965_primary_formats[] = {
DRM_FORMAT_XBGR16161616F,
};
+/* Primary plane formats for vlv/chv */
+static const u32 vlv_primary_formats[] = {
+ DRM_FORMAT_C8,
+ DRM_FORMAT_RGB565,
+ DRM_FORMAT_XRGB8888,
+ DRM_FORMAT_XBGR8888,
+ DRM_FORMAT_ARGB8888,
+ DRM_FORMAT_ABGR8888,
+ DRM_FORMAT_XRGB2101010,
+ DRM_FORMAT_XBGR2101010,
+ DRM_FORMAT_ARGB2101010,
+ DRM_FORMAT_ABGR2101010,
+ DRM_FORMAT_XBGR16161616F,
+};
+
static const u64 i9xx_format_modifiers[] = {
I915_FORMAT_MOD_X_TILED,
DRM_FORMAT_MOD_LINEAR,
@@ -2971,6 +2986,8 @@ static int i9xx_format_to_fourcc(int format)
switch (format) {
case DISPPLANE_8BPP:
return DRM_FORMAT_C8;
+ case DISPPLANE_BGRA555:
+ return DRM_FORMAT_ARGB1555;
case DISPPLANE_BGRX555:
return DRM_FORMAT_XRGB1555;
case DISPPLANE_BGRX565:
@@ -2980,10 +2997,18 @@ static int i9xx_format_to_fourcc(int format)
return DRM_FORMAT_XRGB8888;
case DISPPLANE_RGBX888:
return DRM_FORMAT_XBGR8888;
+ case DISPPLANE_BGRA888:
+ return DRM_FORMAT_ARGB8888;
+ case DISPPLANE_RGBA888:
+ return DRM_FORMAT_ABGR8888;
case DISPPLANE_BGRX101010:
return DRM_FORMAT_XRGB2101010;
case DISPPLANE_RGBX101010:
return DRM_FORMAT_XBGR2101010;
+ case DISPPLANE_BGRA101010:
+ return DRM_FORMAT_ARGB2101010;
+ case DISPPLANE_RGBA101010:
+ return DRM_FORMAT_ABGR2101010;
case DISPPLANE_RGBX161616:
return DRM_FORMAT_XBGR16161616F;
}
@@ -3707,6 +3732,9 @@ static u32 i9xx_plane_ctl(const struct intel_crtc_state *crtc_state,
case DRM_FORMAT_XRGB1555:
dspcntr |= DISPPLANE_BGRX555;
break;
+ case DRM_FORMAT_ARGB1555:
+ dspcntr |= DISPPLANE_BGRA555;
+ break;
case DRM_FORMAT_RGB565:
dspcntr |= DISPPLANE_BGRX565;
break;
@@ -3716,12 +3744,24 @@ static u32 i9xx_plane_ctl(const struct intel_crtc_state *crtc_state,
case DRM_FORMAT_XBGR8888:
dspcntr |= DISPPLANE_RGBX888;
break;
+ case DRM_FORMAT_ARGB8888:
+ dspcntr |= DISPPLANE_BGRA888;
+ break;
+ case DRM_FORMAT_ABGR8888:
+ dspcntr |= DISPPLANE_RGBA888;
+ break;
case DRM_FORMAT_XRGB2101010:
dspcntr |= DISPPLANE_BGRX101010;
break;
case DRM_FORMAT_XBGR2101010:
dspcntr |= DISPPLANE_RGBX101010;
break;
+ case DRM_FORMAT_ARGB2101010:
+ dspcntr |= DISPPLANE_BGRA101010;
+ break;
+ case DRM_FORMAT_ABGR2101010:
+ dspcntr |= DISPPLANE_RGBA101010;
+ break;
case DRM_FORMAT_XBGR16161616F:
dspcntr |= DISPPLANE_RGBX161616;
break;
@@ -15219,8 +15259,12 @@ static bool i965_plane_format_mod_supported(struct drm_plane *_plane,
case DRM_FORMAT_RGB565:
case DRM_FORMAT_XRGB8888:
case DRM_FORMAT_XBGR8888:
+ case DRM_FORMAT_ARGB8888:
+ case DRM_FORMAT_ABGR8888:
case DRM_FORMAT_XRGB2101010:
case DRM_FORMAT_XBGR2101010:
+ case DRM_FORMAT_ARGB2101010:
+ case DRM_FORMAT_ABGR2101010:
case DRM_FORMAT_XBGR16161616F:
return modifier == DRM_FORMAT_MOD_LINEAR ||
modifier == I915_FORMAT_MOD_X_TILED;
@@ -15441,7 +15485,20 @@ intel_primary_plane_create(struct drm_i915_private *dev_priv, enum pipe pipe)
fbc->possible_framebuffer_bits |= plane->frontbuffer_bit;
}
- if (INTEL_GEN(dev_priv) >= 4) {
+ if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) {
+ formats = vlv_primary_formats;
+ num_formats = ARRAY_SIZE(vlv_primary_formats);
+ modifiers = i9xx_format_modifiers;
+
+ plane->max_stride = i9xx_plane_max_stride;
+ plane->update_plane = i9xx_update_plane;
+ plane->disable_plane = i9xx_disable_plane;
+ plane->get_hw_state = i9xx_plane_get_hw_state;
+ plane->check_plane = i9xx_plane_check;
+ plane->min_cdclk = vlv_plane_min_cdclk;
+
+ plane_funcs = &i965_plane_funcs;
+ } else if (INTEL_GEN(dev_priv) >= 4) {
/*
* WaFP16GammaEnabling:ivb
* "Workaround : When using the 64-bit format, the plane
@@ -15462,6 +15519,7 @@ intel_primary_plane_create(struct drm_i915_private *dev_priv, enum pipe pipe)
formats = i965_primary_formats;
num_formats = ARRAY_SIZE(i965_primary_formats);
}
+
modifiers = i9xx_format_modifiers;
plane->max_stride = i9xx_plane_max_stride;
@@ -15474,8 +15532,6 @@ intel_primary_plane_create(struct drm_i915_private *dev_priv, enum pipe pipe)
plane->min_cdclk = hsw_plane_min_cdclk;
else if (IS_IVYBRIDGE(dev_priv))
plane->min_cdclk = ivb_plane_min_cdclk;
- else if (IS_CHERRYVIEW(dev_priv) || IS_VALLEYVIEW(dev_priv))
- plane->min_cdclk = vlv_plane_min_cdclk;
else
plane->min_cdclk = i9xx_plane_min_cdclk;
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 53c280c4e741..b819392ba700 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -6353,6 +6353,7 @@ enum {
#define DISPPLANE_RGBX101010 (0x8 << 26)
#define DISPPLANE_RGBA101010 (0x9 << 26)
#define DISPPLANE_BGRX101010 (0xa << 26)
+#define DISPPLANE_BGRA101010 (0xb << 26)
#define DISPPLANE_RGBX161616 (0xc << 26)
#define DISPPLANE_RGBX888 (0xe << 26)
#define DISPPLANE_RGBA888 (0xf << 26)
--
2.23.0
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 20+ messages in thread
* [PATCH 3/7] drm/i915: Add missing 10bpc formats for pipe B sprites on CHV
@ 2019-10-31 16:56 ` Ville Syrjala
0 siblings, 0 replies; 20+ messages in thread
From: Ville Syrjala @ 2019-10-31 16:56 UTC (permalink / raw)
To: intel-gfx
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
CHV pipe B sprites gained support for the 10bpc X/ARGB pixel formats.
On VLV and CHV pipe A/C these are only supported by the primary
plane. Add the require bits to expose the new formats.
v2: Reorder the formats for consistency
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Uma Shankar <uma.shankar@intel.com>
---
drivers/gpu/drm/i915/display/intel_sprite.c | 33 +++++++++++++++++++--
drivers/gpu/drm/i915/i915_reg.h | 14 +++++----
2 files changed, 39 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_sprite.c b/drivers/gpu/drm/i915/display/intel_sprite.c
index 514b620378d5..150ad367cf9e 100644
--- a/drivers/gpu/drm/i915/display/intel_sprite.c
+++ b/drivers/gpu/drm/i915/display/intel_sprite.c
@@ -987,6 +987,12 @@ static u32 vlv_sprite_ctl(const struct intel_crtc_state *crtc_state,
case DRM_FORMAT_ABGR2101010:
sprctl |= SP_FORMAT_RGBA1010102;
break;
+ case DRM_FORMAT_XRGB2101010:
+ sprctl |= SP_FORMAT_BGRX1010102;
+ break;
+ case DRM_FORMAT_ARGB2101010:
+ sprctl |= SP_FORMAT_BGRA1010102;
+ break;
case DRM_FORMAT_XBGR8888:
sprctl |= SP_FORMAT_RGBX8888;
break;
@@ -2411,6 +2417,22 @@ static const u32 vlv_plane_formats[] = {
DRM_FORMAT_VYUY,
};
+static const u32 chv_pipe_b_sprite_formats[] = {
+ DRM_FORMAT_RGB565,
+ DRM_FORMAT_XRGB8888,
+ DRM_FORMAT_XBGR8888,
+ DRM_FORMAT_ARGB8888,
+ DRM_FORMAT_ABGR8888,
+ DRM_FORMAT_XRGB2101010,
+ DRM_FORMAT_XBGR2101010,
+ DRM_FORMAT_ARGB2101010,
+ DRM_FORMAT_ABGR2101010,
+ DRM_FORMAT_YUYV,
+ DRM_FORMAT_YVYU,
+ DRM_FORMAT_UYVY,
+ DRM_FORMAT_VYUY,
+};
+
static const u32 skl_plane_formats[] = {
DRM_FORMAT_C8,
DRM_FORMAT_RGB565,
@@ -2643,6 +2665,8 @@ static bool vlv_sprite_format_mod_supported(struct drm_plane *_plane,
case DRM_FORMAT_XRGB8888:
case DRM_FORMAT_XBGR2101010:
case DRM_FORMAT_ABGR2101010:
+ case DRM_FORMAT_XRGB2101010:
+ case DRM_FORMAT_ARGB2101010:
case DRM_FORMAT_YUYV:
case DRM_FORMAT_YVYU:
case DRM_FORMAT_UYVY:
@@ -3041,8 +3065,13 @@ intel_sprite_plane_create(struct drm_i915_private *dev_priv,
plane->check_plane = vlv_sprite_check;
plane->min_cdclk = vlv_plane_min_cdclk;
- formats = vlv_plane_formats;
- num_formats = ARRAY_SIZE(vlv_plane_formats);
+ if (IS_CHERRYVIEW(dev_priv) && pipe == PIPE_B) {
+ formats = chv_pipe_b_sprite_formats;
+ num_formats = ARRAY_SIZE(chv_pipe_b_sprite_formats);
+ } else {
+ formats = vlv_plane_formats;
+ num_formats = ARRAY_SIZE(vlv_plane_formats);
+ }
modifiers = i9xx_plane_format_modifiers;
plane_funcs = &vlv_sprite_funcs;
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index b819392ba700..78dfdcfc724a 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -6628,12 +6628,14 @@ enum {
#define SP_ENABLE (1 << 31)
#define SP_GAMMA_ENABLE (1 << 30)
#define SP_PIXFORMAT_MASK (0xf << 26)
-#define SP_FORMAT_YUV422 (0 << 26)
-#define SP_FORMAT_BGR565 (5 << 26)
-#define SP_FORMAT_BGRX8888 (6 << 26)
-#define SP_FORMAT_BGRA8888 (7 << 26)
-#define SP_FORMAT_RGBX1010102 (8 << 26)
-#define SP_FORMAT_RGBA1010102 (9 << 26)
+#define SP_FORMAT_YUV422 (0x0 << 26)
+#define SP_FORMAT_BGR565 (0x5 << 26)
+#define SP_FORMAT_BGRX8888 (0x6 << 26)
+#define SP_FORMAT_BGRA8888 (0x7 << 26)
+#define SP_FORMAT_RGBX1010102 (0x8 << 26)
+#define SP_FORMAT_RGBA1010102 (0x9 << 26)
+#define SP_FORMAT_BGRX1010102 (0xa << 26) /* CHV pipe B */
+#define SP_FORMAT_BGRA1010102 (0xb << 26) /* CHV pipe B */
#define SP_FORMAT_RGBX8888 (0xe << 26)
#define SP_FORMAT_RGBA8888 (0xf << 26)
#define SP_ALPHA_PREMULTIPLY (1 << 23) /* CHV pipe B */
--
2.23.0
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 20+ messages in thread
* [Intel-gfx] [PATCH 3/7] drm/i915: Add missing 10bpc formats for pipe B sprites on CHV
@ 2019-10-31 16:56 ` Ville Syrjala
0 siblings, 0 replies; 20+ messages in thread
From: Ville Syrjala @ 2019-10-31 16:56 UTC (permalink / raw)
To: intel-gfx
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
CHV pipe B sprites gained support for the 10bpc X/ARGB pixel formats.
On VLV and CHV pipe A/C these are only supported by the primary
plane. Add the require bits to expose the new formats.
v2: Reorder the formats for consistency
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Uma Shankar <uma.shankar@intel.com>
---
drivers/gpu/drm/i915/display/intel_sprite.c | 33 +++++++++++++++++++--
drivers/gpu/drm/i915/i915_reg.h | 14 +++++----
2 files changed, 39 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_sprite.c b/drivers/gpu/drm/i915/display/intel_sprite.c
index 514b620378d5..150ad367cf9e 100644
--- a/drivers/gpu/drm/i915/display/intel_sprite.c
+++ b/drivers/gpu/drm/i915/display/intel_sprite.c
@@ -987,6 +987,12 @@ static u32 vlv_sprite_ctl(const struct intel_crtc_state *crtc_state,
case DRM_FORMAT_ABGR2101010:
sprctl |= SP_FORMAT_RGBA1010102;
break;
+ case DRM_FORMAT_XRGB2101010:
+ sprctl |= SP_FORMAT_BGRX1010102;
+ break;
+ case DRM_FORMAT_ARGB2101010:
+ sprctl |= SP_FORMAT_BGRA1010102;
+ break;
case DRM_FORMAT_XBGR8888:
sprctl |= SP_FORMAT_RGBX8888;
break;
@@ -2411,6 +2417,22 @@ static const u32 vlv_plane_formats[] = {
DRM_FORMAT_VYUY,
};
+static const u32 chv_pipe_b_sprite_formats[] = {
+ DRM_FORMAT_RGB565,
+ DRM_FORMAT_XRGB8888,
+ DRM_FORMAT_XBGR8888,
+ DRM_FORMAT_ARGB8888,
+ DRM_FORMAT_ABGR8888,
+ DRM_FORMAT_XRGB2101010,
+ DRM_FORMAT_XBGR2101010,
+ DRM_FORMAT_ARGB2101010,
+ DRM_FORMAT_ABGR2101010,
+ DRM_FORMAT_YUYV,
+ DRM_FORMAT_YVYU,
+ DRM_FORMAT_UYVY,
+ DRM_FORMAT_VYUY,
+};
+
static const u32 skl_plane_formats[] = {
DRM_FORMAT_C8,
DRM_FORMAT_RGB565,
@@ -2643,6 +2665,8 @@ static bool vlv_sprite_format_mod_supported(struct drm_plane *_plane,
case DRM_FORMAT_XRGB8888:
case DRM_FORMAT_XBGR2101010:
case DRM_FORMAT_ABGR2101010:
+ case DRM_FORMAT_XRGB2101010:
+ case DRM_FORMAT_ARGB2101010:
case DRM_FORMAT_YUYV:
case DRM_FORMAT_YVYU:
case DRM_FORMAT_UYVY:
@@ -3041,8 +3065,13 @@ intel_sprite_plane_create(struct drm_i915_private *dev_priv,
plane->check_plane = vlv_sprite_check;
plane->min_cdclk = vlv_plane_min_cdclk;
- formats = vlv_plane_formats;
- num_formats = ARRAY_SIZE(vlv_plane_formats);
+ if (IS_CHERRYVIEW(dev_priv) && pipe == PIPE_B) {
+ formats = chv_pipe_b_sprite_formats;
+ num_formats = ARRAY_SIZE(chv_pipe_b_sprite_formats);
+ } else {
+ formats = vlv_plane_formats;
+ num_formats = ARRAY_SIZE(vlv_plane_formats);
+ }
modifiers = i9xx_plane_format_modifiers;
plane_funcs = &vlv_sprite_funcs;
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index b819392ba700..78dfdcfc724a 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -6628,12 +6628,14 @@ enum {
#define SP_ENABLE (1 << 31)
#define SP_GAMMA_ENABLE (1 << 30)
#define SP_PIXFORMAT_MASK (0xf << 26)
-#define SP_FORMAT_YUV422 (0 << 26)
-#define SP_FORMAT_BGR565 (5 << 26)
-#define SP_FORMAT_BGRX8888 (6 << 26)
-#define SP_FORMAT_BGRA8888 (7 << 26)
-#define SP_FORMAT_RGBX1010102 (8 << 26)
-#define SP_FORMAT_RGBA1010102 (9 << 26)
+#define SP_FORMAT_YUV422 (0x0 << 26)
+#define SP_FORMAT_BGR565 (0x5 << 26)
+#define SP_FORMAT_BGRX8888 (0x6 << 26)
+#define SP_FORMAT_BGRA8888 (0x7 << 26)
+#define SP_FORMAT_RGBX1010102 (0x8 << 26)
+#define SP_FORMAT_RGBA1010102 (0x9 << 26)
+#define SP_FORMAT_BGRX1010102 (0xa << 26) /* CHV pipe B */
+#define SP_FORMAT_BGRA1010102 (0xb << 26) /* CHV pipe B */
#define SP_FORMAT_RGBX8888 (0xe << 26)
#define SP_FORMAT_RGBA8888 (0xf << 26)
#define SP_ALPHA_PREMULTIPLY (1 << 23) /* CHV pipe B */
--
2.23.0
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 20+ messages in thread
* [PATCH 4/7] drm/i915: Expose C8 on VLV/CHV sprite planes
@ 2019-10-31 16:56 ` Ville Syrjala
0 siblings, 0 replies; 20+ messages in thread
From: Ville Syrjala @ 2019-10-31 16:56 UTC (permalink / raw)
To: intel-gfx
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
VLV/CHV sprite planes also support the C8 format. Let's expose that.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Uma Shankar <uma.shankar@intel.com>
---
drivers/gpu/drm/i915/display/intel_sprite.c | 6 ++++++
drivers/gpu/drm/i915/i915_reg.h | 1 +
2 files changed, 7 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_sprite.c b/drivers/gpu/drm/i915/display/intel_sprite.c
index 150ad367cf9e..5b329ced63eb 100644
--- a/drivers/gpu/drm/i915/display/intel_sprite.c
+++ b/drivers/gpu/drm/i915/display/intel_sprite.c
@@ -972,6 +972,9 @@ static u32 vlv_sprite_ctl(const struct intel_crtc_state *crtc_state,
case DRM_FORMAT_VYUY:
sprctl |= SP_FORMAT_YUV422 | SP_YUV_ORDER_VYUY;
break;
+ case DRM_FORMAT_C8:
+ sprctl |= SP_FORMAT_8BPP;
+ break;
case DRM_FORMAT_RGB565:
sprctl |= SP_FORMAT_BGR565;
break;
@@ -2404,6 +2407,7 @@ static const u32 snb_plane_formats[] = {
};
static const u32 vlv_plane_formats[] = {
+ DRM_FORMAT_C8,
DRM_FORMAT_RGB565,
DRM_FORMAT_ABGR8888,
DRM_FORMAT_ARGB8888,
@@ -2418,6 +2422,7 @@ static const u32 vlv_plane_formats[] = {
};
static const u32 chv_pipe_b_sprite_formats[] = {
+ DRM_FORMAT_C8,
DRM_FORMAT_RGB565,
DRM_FORMAT_XRGB8888,
DRM_FORMAT_XBGR8888,
@@ -2658,6 +2663,7 @@ static bool vlv_sprite_format_mod_supported(struct drm_plane *_plane,
}
switch (format) {
+ case DRM_FORMAT_C8:
case DRM_FORMAT_RGB565:
case DRM_FORMAT_ABGR8888:
case DRM_FORMAT_ARGB8888:
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 78dfdcfc724a..a607ea520829 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -6629,6 +6629,7 @@ enum {
#define SP_GAMMA_ENABLE (1 << 30)
#define SP_PIXFORMAT_MASK (0xf << 26)
#define SP_FORMAT_YUV422 (0x0 << 26)
+#define SP_FORMAT_8BPP (0x2 << 26)
#define SP_FORMAT_BGR565 (0x5 << 26)
#define SP_FORMAT_BGRX8888 (0x6 << 26)
#define SP_FORMAT_BGRA8888 (0x7 << 26)
--
2.23.0
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 20+ messages in thread
* [Intel-gfx] [PATCH 4/7] drm/i915: Expose C8 on VLV/CHV sprite planes
@ 2019-10-31 16:56 ` Ville Syrjala
0 siblings, 0 replies; 20+ messages in thread
From: Ville Syrjala @ 2019-10-31 16:56 UTC (permalink / raw)
To: intel-gfx
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
VLV/CHV sprite planes also support the C8 format. Let's expose that.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Uma Shankar <uma.shankar@intel.com>
---
drivers/gpu/drm/i915/display/intel_sprite.c | 6 ++++++
drivers/gpu/drm/i915/i915_reg.h | 1 +
2 files changed, 7 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_sprite.c b/drivers/gpu/drm/i915/display/intel_sprite.c
index 150ad367cf9e..5b329ced63eb 100644
--- a/drivers/gpu/drm/i915/display/intel_sprite.c
+++ b/drivers/gpu/drm/i915/display/intel_sprite.c
@@ -972,6 +972,9 @@ static u32 vlv_sprite_ctl(const struct intel_crtc_state *crtc_state,
case DRM_FORMAT_VYUY:
sprctl |= SP_FORMAT_YUV422 | SP_YUV_ORDER_VYUY;
break;
+ case DRM_FORMAT_C8:
+ sprctl |= SP_FORMAT_8BPP;
+ break;
case DRM_FORMAT_RGB565:
sprctl |= SP_FORMAT_BGR565;
break;
@@ -2404,6 +2407,7 @@ static const u32 snb_plane_formats[] = {
};
static const u32 vlv_plane_formats[] = {
+ DRM_FORMAT_C8,
DRM_FORMAT_RGB565,
DRM_FORMAT_ABGR8888,
DRM_FORMAT_ARGB8888,
@@ -2418,6 +2422,7 @@ static const u32 vlv_plane_formats[] = {
};
static const u32 chv_pipe_b_sprite_formats[] = {
+ DRM_FORMAT_C8,
DRM_FORMAT_RGB565,
DRM_FORMAT_XRGB8888,
DRM_FORMAT_XBGR8888,
@@ -2658,6 +2663,7 @@ static bool vlv_sprite_format_mod_supported(struct drm_plane *_plane,
}
switch (format) {
+ case DRM_FORMAT_C8:
case DRM_FORMAT_RGB565:
case DRM_FORMAT_ABGR8888:
case DRM_FORMAT_ARGB8888:
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 78dfdcfc724a..a607ea520829 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -6629,6 +6629,7 @@ enum {
#define SP_GAMMA_ENABLE (1 << 30)
#define SP_PIXFORMAT_MASK (0xf << 26)
#define SP_FORMAT_YUV422 (0x0 << 26)
+#define SP_FORMAT_8BPP (0x2 << 26)
#define SP_FORMAT_BGR565 (0x5 << 26)
#define SP_FORMAT_BGRX8888 (0x6 << 26)
#define SP_FORMAT_BGRA8888 (0x7 << 26)
--
2.23.0
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 20+ messages in thread
* [PATCH 5/7] drm/i915: Add 10bpc formats with alpha for icl+
@ 2019-10-31 16:56 ` Ville Syrjala
0 siblings, 0 replies; 20+ messages in thread
From: Ville Syrjala @ 2019-10-31 16:56 UTC (permalink / raw)
To: intel-gfx
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
ICL+ again supports alpha blending with 10bpc pixel formats.
Expose them.
v2: Add all the stuff I missed earlier!
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
Reviewed-by: Uma Shankar <uma.shankar@intel.com>
---
drivers/gpu/drm/i915/display/intel_display.c | 19 +++++++++++++++----
drivers/gpu/drm/i915/display/intel_sprite.c | 10 ++++++++++
2 files changed, 25 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 27fb24c1892f..aba2381716d3 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -3053,10 +3053,17 @@ int skl_format_to_fourcc(int format, bool rgb_order, bool alpha)
return DRM_FORMAT_XRGB8888;
}
case PLANE_CTL_FORMAT_XRGB_2101010:
- if (rgb_order)
- return DRM_FORMAT_XBGR2101010;
- else
- return DRM_FORMAT_XRGB2101010;
+ if (rgb_order) {
+ if (alpha)
+ return DRM_FORMAT_ABGR2101010;
+ else
+ return DRM_FORMAT_XBGR2101010;
+ } else {
+ if (alpha)
+ return DRM_FORMAT_ARGB2101010;
+ else
+ return DRM_FORMAT_XRGB2101010;
+ }
case PLANE_CTL_FORMAT_XRGB_16161616F:
if (rgb_order) {
if (alpha)
@@ -4101,8 +4108,10 @@ static u32 skl_plane_ctl_format(u32 pixel_format)
case DRM_FORMAT_ARGB8888:
return PLANE_CTL_FORMAT_XRGB_8888;
case DRM_FORMAT_XBGR2101010:
+ case DRM_FORMAT_ABGR2101010:
return PLANE_CTL_FORMAT_XRGB_2101010 | PLANE_CTL_ORDER_RGBX;
case DRM_FORMAT_XRGB2101010:
+ case DRM_FORMAT_ARGB2101010:
return PLANE_CTL_FORMAT_XRGB_2101010;
case DRM_FORMAT_XBGR16161616F:
case DRM_FORMAT_ABGR16161616F:
@@ -5704,6 +5713,8 @@ static int skl_update_scaler_plane(struct intel_crtc_state *crtc_state,
case DRM_FORMAT_ARGB8888:
case DRM_FORMAT_XRGB2101010:
case DRM_FORMAT_XBGR2101010:
+ case DRM_FORMAT_ARGB2101010:
+ case DRM_FORMAT_ABGR2101010:
case DRM_FORMAT_YUYV:
case DRM_FORMAT_YVYU:
case DRM_FORMAT_UYVY:
diff --git a/drivers/gpu/drm/i915/display/intel_sprite.c b/drivers/gpu/drm/i915/display/intel_sprite.c
index 5b329ced63eb..73cb3e13657f 100644
--- a/drivers/gpu/drm/i915/display/intel_sprite.c
+++ b/drivers/gpu/drm/i915/display/intel_sprite.c
@@ -2503,6 +2503,8 @@ static const u32 icl_sdr_y_plane_formats[] = {
DRM_FORMAT_ABGR8888,
DRM_FORMAT_XRGB2101010,
DRM_FORMAT_XBGR2101010,
+ DRM_FORMAT_ARGB2101010,
+ DRM_FORMAT_ABGR2101010,
DRM_FORMAT_YUYV,
DRM_FORMAT_YVYU,
DRM_FORMAT_UYVY,
@@ -2524,6 +2526,8 @@ static const u32 icl_sdr_uv_plane_formats[] = {
DRM_FORMAT_ABGR8888,
DRM_FORMAT_XRGB2101010,
DRM_FORMAT_XBGR2101010,
+ DRM_FORMAT_ARGB2101010,
+ DRM_FORMAT_ABGR2101010,
DRM_FORMAT_YUYV,
DRM_FORMAT_YVYU,
DRM_FORMAT_UYVY,
@@ -2549,6 +2553,8 @@ static const u32 icl_hdr_plane_formats[] = {
DRM_FORMAT_ABGR8888,
DRM_FORMAT_XRGB2101010,
DRM_FORMAT_XBGR2101010,
+ DRM_FORMAT_ARGB2101010,
+ DRM_FORMAT_ABGR2101010,
DRM_FORMAT_XRGB16161616F,
DRM_FORMAT_XBGR16161616F,
DRM_FORMAT_ARGB16161616F,
@@ -2717,6 +2723,8 @@ static bool skl_plane_format_mod_supported(struct drm_plane *_plane,
case DRM_FORMAT_RGB565:
case DRM_FORMAT_XRGB2101010:
case DRM_FORMAT_XBGR2101010:
+ case DRM_FORMAT_ARGB2101010:
+ case DRM_FORMAT_ABGR2101010:
case DRM_FORMAT_YUYV:
case DRM_FORMAT_YVYU:
case DRM_FORMAT_UYVY:
@@ -2769,6 +2777,8 @@ static bool gen12_plane_format_mod_supported(struct drm_plane *_plane,
case DRM_FORMAT_RGB565:
case DRM_FORMAT_XRGB2101010:
case DRM_FORMAT_XBGR2101010:
+ case DRM_FORMAT_ARGB2101010:
+ case DRM_FORMAT_ABGR2101010:
case DRM_FORMAT_YUYV:
case DRM_FORMAT_YVYU:
case DRM_FORMAT_UYVY:
--
2.23.0
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 20+ messages in thread
* [Intel-gfx] [PATCH 5/7] drm/i915: Add 10bpc formats with alpha for icl+
@ 2019-10-31 16:56 ` Ville Syrjala
0 siblings, 0 replies; 20+ messages in thread
From: Ville Syrjala @ 2019-10-31 16:56 UTC (permalink / raw)
To: intel-gfx
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
ICL+ again supports alpha blending with 10bpc pixel formats.
Expose them.
v2: Add all the stuff I missed earlier!
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
Reviewed-by: Uma Shankar <uma.shankar@intel.com>
---
drivers/gpu/drm/i915/display/intel_display.c | 19 +++++++++++++++----
drivers/gpu/drm/i915/display/intel_sprite.c | 10 ++++++++++
2 files changed, 25 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 27fb24c1892f..aba2381716d3 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -3053,10 +3053,17 @@ int skl_format_to_fourcc(int format, bool rgb_order, bool alpha)
return DRM_FORMAT_XRGB8888;
}
case PLANE_CTL_FORMAT_XRGB_2101010:
- if (rgb_order)
- return DRM_FORMAT_XBGR2101010;
- else
- return DRM_FORMAT_XRGB2101010;
+ if (rgb_order) {
+ if (alpha)
+ return DRM_FORMAT_ABGR2101010;
+ else
+ return DRM_FORMAT_XBGR2101010;
+ } else {
+ if (alpha)
+ return DRM_FORMAT_ARGB2101010;
+ else
+ return DRM_FORMAT_XRGB2101010;
+ }
case PLANE_CTL_FORMAT_XRGB_16161616F:
if (rgb_order) {
if (alpha)
@@ -4101,8 +4108,10 @@ static u32 skl_plane_ctl_format(u32 pixel_format)
case DRM_FORMAT_ARGB8888:
return PLANE_CTL_FORMAT_XRGB_8888;
case DRM_FORMAT_XBGR2101010:
+ case DRM_FORMAT_ABGR2101010:
return PLANE_CTL_FORMAT_XRGB_2101010 | PLANE_CTL_ORDER_RGBX;
case DRM_FORMAT_XRGB2101010:
+ case DRM_FORMAT_ARGB2101010:
return PLANE_CTL_FORMAT_XRGB_2101010;
case DRM_FORMAT_XBGR16161616F:
case DRM_FORMAT_ABGR16161616F:
@@ -5704,6 +5713,8 @@ static int skl_update_scaler_plane(struct intel_crtc_state *crtc_state,
case DRM_FORMAT_ARGB8888:
case DRM_FORMAT_XRGB2101010:
case DRM_FORMAT_XBGR2101010:
+ case DRM_FORMAT_ARGB2101010:
+ case DRM_FORMAT_ABGR2101010:
case DRM_FORMAT_YUYV:
case DRM_FORMAT_YVYU:
case DRM_FORMAT_UYVY:
diff --git a/drivers/gpu/drm/i915/display/intel_sprite.c b/drivers/gpu/drm/i915/display/intel_sprite.c
index 5b329ced63eb..73cb3e13657f 100644
--- a/drivers/gpu/drm/i915/display/intel_sprite.c
+++ b/drivers/gpu/drm/i915/display/intel_sprite.c
@@ -2503,6 +2503,8 @@ static const u32 icl_sdr_y_plane_formats[] = {
DRM_FORMAT_ABGR8888,
DRM_FORMAT_XRGB2101010,
DRM_FORMAT_XBGR2101010,
+ DRM_FORMAT_ARGB2101010,
+ DRM_FORMAT_ABGR2101010,
DRM_FORMAT_YUYV,
DRM_FORMAT_YVYU,
DRM_FORMAT_UYVY,
@@ -2524,6 +2526,8 @@ static const u32 icl_sdr_uv_plane_formats[] = {
DRM_FORMAT_ABGR8888,
DRM_FORMAT_XRGB2101010,
DRM_FORMAT_XBGR2101010,
+ DRM_FORMAT_ARGB2101010,
+ DRM_FORMAT_ABGR2101010,
DRM_FORMAT_YUYV,
DRM_FORMAT_YVYU,
DRM_FORMAT_UYVY,
@@ -2549,6 +2553,8 @@ static const u32 icl_hdr_plane_formats[] = {
DRM_FORMAT_ABGR8888,
DRM_FORMAT_XRGB2101010,
DRM_FORMAT_XBGR2101010,
+ DRM_FORMAT_ARGB2101010,
+ DRM_FORMAT_ABGR2101010,
DRM_FORMAT_XRGB16161616F,
DRM_FORMAT_XBGR16161616F,
DRM_FORMAT_ARGB16161616F,
@@ -2717,6 +2723,8 @@ static bool skl_plane_format_mod_supported(struct drm_plane *_plane,
case DRM_FORMAT_RGB565:
case DRM_FORMAT_XRGB2101010:
case DRM_FORMAT_XBGR2101010:
+ case DRM_FORMAT_ARGB2101010:
+ case DRM_FORMAT_ABGR2101010:
case DRM_FORMAT_YUYV:
case DRM_FORMAT_YVYU:
case DRM_FORMAT_UYVY:
@@ -2769,6 +2777,8 @@ static bool gen12_plane_format_mod_supported(struct drm_plane *_plane,
case DRM_FORMAT_RGB565:
case DRM_FORMAT_XRGB2101010:
case DRM_FORMAT_XBGR2101010:
+ case DRM_FORMAT_ARGB2101010:
+ case DRM_FORMAT_ABGR2101010:
case DRM_FORMAT_YUYV:
case DRM_FORMAT_YVYU:
case DRM_FORMAT_UYVY:
--
2.23.0
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 20+ messages in thread
* [PATCH 6/7] drm/i915: Sort format arrays consistently
@ 2019-10-31 16:56 ` Ville Syrjala
0 siblings, 0 replies; 20+ messages in thread
From: Ville Syrjala @ 2019-10-31 16:56 UTC (permalink / raw)
To: intel-gfx
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Let's try to keep the pixel format arrays somewhat sorted:
1. RGB before YUV
2. smaller bpp before larger bpp
3. X before A
4. RGB before BGR
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
Reviewed-by: Uma Shankar <uma.shankar@intel.com>
---
drivers/gpu/drm/i915/display/intel_display.c | 2 +-
drivers/gpu/drm/i915/display/intel_sprite.c | 6 +++---
2 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index aba2381716d3..9cf6b13f79fe 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -85,8 +85,8 @@
/* Primary plane formats for gen <= 3 */
static const u32 i8xx_primary_formats[] = {
DRM_FORMAT_C8,
- DRM_FORMAT_RGB565,
DRM_FORMAT_XRGB1555,
+ DRM_FORMAT_RGB565,
DRM_FORMAT_XRGB8888,
};
diff --git a/drivers/gpu/drm/i915/display/intel_sprite.c b/drivers/gpu/drm/i915/display/intel_sprite.c
index 73cb3e13657f..92c04dc72b00 100644
--- a/drivers/gpu/drm/i915/display/intel_sprite.c
+++ b/drivers/gpu/drm/i915/display/intel_sprite.c
@@ -2409,10 +2409,10 @@ static const u32 snb_plane_formats[] = {
static const u32 vlv_plane_formats[] = {
DRM_FORMAT_C8,
DRM_FORMAT_RGB565,
- DRM_FORMAT_ABGR8888,
- DRM_FORMAT_ARGB8888,
- DRM_FORMAT_XBGR8888,
DRM_FORMAT_XRGB8888,
+ DRM_FORMAT_XBGR8888,
+ DRM_FORMAT_ARGB8888,
+ DRM_FORMAT_ABGR8888,
DRM_FORMAT_XBGR2101010,
DRM_FORMAT_ABGR2101010,
DRM_FORMAT_YUYV,
--
2.23.0
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 20+ messages in thread
* [Intel-gfx] [PATCH 6/7] drm/i915: Sort format arrays consistently
@ 2019-10-31 16:56 ` Ville Syrjala
0 siblings, 0 replies; 20+ messages in thread
From: Ville Syrjala @ 2019-10-31 16:56 UTC (permalink / raw)
To: intel-gfx
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Let's try to keep the pixel format arrays somewhat sorted:
1. RGB before YUV
2. smaller bpp before larger bpp
3. X before A
4. RGB before BGR
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
Reviewed-by: Uma Shankar <uma.shankar@intel.com>
---
drivers/gpu/drm/i915/display/intel_display.c | 2 +-
drivers/gpu/drm/i915/display/intel_sprite.c | 6 +++---
2 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index aba2381716d3..9cf6b13f79fe 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -85,8 +85,8 @@
/* Primary plane formats for gen <= 3 */
static const u32 i8xx_primary_formats[] = {
DRM_FORMAT_C8,
- DRM_FORMAT_RGB565,
DRM_FORMAT_XRGB1555,
+ DRM_FORMAT_RGB565,
DRM_FORMAT_XRGB8888,
};
diff --git a/drivers/gpu/drm/i915/display/intel_sprite.c b/drivers/gpu/drm/i915/display/intel_sprite.c
index 73cb3e13657f..92c04dc72b00 100644
--- a/drivers/gpu/drm/i915/display/intel_sprite.c
+++ b/drivers/gpu/drm/i915/display/intel_sprite.c
@@ -2409,10 +2409,10 @@ static const u32 snb_plane_formats[] = {
static const u32 vlv_plane_formats[] = {
DRM_FORMAT_C8,
DRM_FORMAT_RGB565,
- DRM_FORMAT_ABGR8888,
- DRM_FORMAT_ARGB8888,
- DRM_FORMAT_XBGR8888,
DRM_FORMAT_XRGB8888,
+ DRM_FORMAT_XBGR8888,
+ DRM_FORMAT_ARGB8888,
+ DRM_FORMAT_ABGR8888,
DRM_FORMAT_XBGR2101010,
DRM_FORMAT_ABGR2101010,
DRM_FORMAT_YUYV,
--
2.23.0
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 20+ messages in thread
* [PATCH 7/7] drm/i915: Eliminate redundancy in intel_primary_plane_create()
@ 2019-10-31 16:56 ` Ville Syrjala
0 siblings, 0 replies; 20+ messages in thread
From: Ville Syrjala @ 2019-10-31 16:56 UTC (permalink / raw)
To: intel-gfx
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Lots of redundant assignments inside intel_primary_plane_create().
Get rid of them.
v2: Rebase due to fp16 landing
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
Reviewed-by: Uma Shankar <uma.shankar@intel.com>
---
drivers/gpu/drm/i915/display/intel_display.c | 60 +++++++-------------
1 file changed, 22 insertions(+), 38 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 9cf6b13f79fe..12e4e7ef1a34 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -15464,7 +15464,6 @@ intel_primary_plane_create(struct drm_i915_private *dev_priv, enum pipe pipe)
const struct drm_plane_funcs *plane_funcs;
unsigned int supported_rotations;
unsigned int possible_crtcs;
- const u64 *modifiers;
const u32 *formats;
int num_formats;
int ret, zpos;
@@ -15499,16 +15498,6 @@ intel_primary_plane_create(struct drm_i915_private *dev_priv, enum pipe pipe)
if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) {
formats = vlv_primary_formats;
num_formats = ARRAY_SIZE(vlv_primary_formats);
- modifiers = i9xx_format_modifiers;
-
- plane->max_stride = i9xx_plane_max_stride;
- plane->update_plane = i9xx_update_plane;
- plane->disable_plane = i9xx_disable_plane;
- plane->get_hw_state = i9xx_plane_get_hw_state;
- plane->check_plane = i9xx_plane_check;
- plane->min_cdclk = vlv_plane_min_cdclk;
-
- plane_funcs = &i965_plane_funcs;
} else if (INTEL_GEN(dev_priv) >= 4) {
/*
* WaFP16GammaEnabling:ivb
@@ -15530,50 +15519,45 @@ intel_primary_plane_create(struct drm_i915_private *dev_priv, enum pipe pipe)
formats = i965_primary_formats;
num_formats = ARRAY_SIZE(i965_primary_formats);
}
-
- modifiers = i9xx_format_modifiers;
-
- plane->max_stride = i9xx_plane_max_stride;
- plane->update_plane = i9xx_update_plane;
- plane->disable_plane = i9xx_disable_plane;
- plane->get_hw_state = i9xx_plane_get_hw_state;
- plane->check_plane = i9xx_plane_check;
-
- if (IS_BROADWELL(dev_priv) || IS_HASWELL(dev_priv))
- plane->min_cdclk = hsw_plane_min_cdclk;
- else if (IS_IVYBRIDGE(dev_priv))
- plane->min_cdclk = ivb_plane_min_cdclk;
- else
- plane->min_cdclk = i9xx_plane_min_cdclk;
-
- plane_funcs = &i965_plane_funcs;
} else {
formats = i8xx_primary_formats;
num_formats = ARRAY_SIZE(i8xx_primary_formats);
- modifiers = i9xx_format_modifiers;
+ }
- plane->max_stride = i9xx_plane_max_stride;
- plane->update_plane = i9xx_update_plane;
- plane->disable_plane = i9xx_disable_plane;
- plane->get_hw_state = i9xx_plane_get_hw_state;
- plane->check_plane = i9xx_plane_check;
+ if (INTEL_GEN(dev_priv) >= 4)
+ plane_funcs = &i965_plane_funcs;
+ else
+ plane_funcs = &i8xx_plane_funcs;
+
+ if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv))
+ plane->min_cdclk = vlv_plane_min_cdclk;
+ else if (IS_BROADWELL(dev_priv) || IS_HASWELL(dev_priv))
+ plane->min_cdclk = hsw_plane_min_cdclk;
+ else if (IS_IVYBRIDGE(dev_priv))
+ plane->min_cdclk = ivb_plane_min_cdclk;
+ else
plane->min_cdclk = i9xx_plane_min_cdclk;
- plane_funcs = &i8xx_plane_funcs;
- }
+ plane->max_stride = i9xx_plane_max_stride;
+ plane->update_plane = i9xx_update_plane;
+ plane->disable_plane = i9xx_disable_plane;
+ plane->get_hw_state = i9xx_plane_get_hw_state;
+ plane->check_plane = i9xx_plane_check;
possible_crtcs = BIT(pipe);
if (INTEL_GEN(dev_priv) >= 5 || IS_G4X(dev_priv))
ret = drm_universal_plane_init(&dev_priv->drm, &plane->base,
possible_crtcs, plane_funcs,
- formats, num_formats, modifiers,
+ formats, num_formats,
+ i9xx_format_modifiers,
DRM_PLANE_TYPE_PRIMARY,
"primary %c", pipe_name(pipe));
else
ret = drm_universal_plane_init(&dev_priv->drm, &plane->base,
possible_crtcs, plane_funcs,
- formats, num_formats, modifiers,
+ formats, num_formats,
+ i9xx_format_modifiers,
DRM_PLANE_TYPE_PRIMARY,
"plane %c",
plane_name(plane->i9xx_plane));
--
2.23.0
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 20+ messages in thread
* [Intel-gfx] [PATCH 7/7] drm/i915: Eliminate redundancy in intel_primary_plane_create()
@ 2019-10-31 16:56 ` Ville Syrjala
0 siblings, 0 replies; 20+ messages in thread
From: Ville Syrjala @ 2019-10-31 16:56 UTC (permalink / raw)
To: intel-gfx
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Lots of redundant assignments inside intel_primary_plane_create().
Get rid of them.
v2: Rebase due to fp16 landing
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
Reviewed-by: Uma Shankar <uma.shankar@intel.com>
---
drivers/gpu/drm/i915/display/intel_display.c | 60 +++++++-------------
1 file changed, 22 insertions(+), 38 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 9cf6b13f79fe..12e4e7ef1a34 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -15464,7 +15464,6 @@ intel_primary_plane_create(struct drm_i915_private *dev_priv, enum pipe pipe)
const struct drm_plane_funcs *plane_funcs;
unsigned int supported_rotations;
unsigned int possible_crtcs;
- const u64 *modifiers;
const u32 *formats;
int num_formats;
int ret, zpos;
@@ -15499,16 +15498,6 @@ intel_primary_plane_create(struct drm_i915_private *dev_priv, enum pipe pipe)
if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) {
formats = vlv_primary_formats;
num_formats = ARRAY_SIZE(vlv_primary_formats);
- modifiers = i9xx_format_modifiers;
-
- plane->max_stride = i9xx_plane_max_stride;
- plane->update_plane = i9xx_update_plane;
- plane->disable_plane = i9xx_disable_plane;
- plane->get_hw_state = i9xx_plane_get_hw_state;
- plane->check_plane = i9xx_plane_check;
- plane->min_cdclk = vlv_plane_min_cdclk;
-
- plane_funcs = &i965_plane_funcs;
} else if (INTEL_GEN(dev_priv) >= 4) {
/*
* WaFP16GammaEnabling:ivb
@@ -15530,50 +15519,45 @@ intel_primary_plane_create(struct drm_i915_private *dev_priv, enum pipe pipe)
formats = i965_primary_formats;
num_formats = ARRAY_SIZE(i965_primary_formats);
}
-
- modifiers = i9xx_format_modifiers;
-
- plane->max_stride = i9xx_plane_max_stride;
- plane->update_plane = i9xx_update_plane;
- plane->disable_plane = i9xx_disable_plane;
- plane->get_hw_state = i9xx_plane_get_hw_state;
- plane->check_plane = i9xx_plane_check;
-
- if (IS_BROADWELL(dev_priv) || IS_HASWELL(dev_priv))
- plane->min_cdclk = hsw_plane_min_cdclk;
- else if (IS_IVYBRIDGE(dev_priv))
- plane->min_cdclk = ivb_plane_min_cdclk;
- else
- plane->min_cdclk = i9xx_plane_min_cdclk;
-
- plane_funcs = &i965_plane_funcs;
} else {
formats = i8xx_primary_formats;
num_formats = ARRAY_SIZE(i8xx_primary_formats);
- modifiers = i9xx_format_modifiers;
+ }
- plane->max_stride = i9xx_plane_max_stride;
- plane->update_plane = i9xx_update_plane;
- plane->disable_plane = i9xx_disable_plane;
- plane->get_hw_state = i9xx_plane_get_hw_state;
- plane->check_plane = i9xx_plane_check;
+ if (INTEL_GEN(dev_priv) >= 4)
+ plane_funcs = &i965_plane_funcs;
+ else
+ plane_funcs = &i8xx_plane_funcs;
+
+ if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv))
+ plane->min_cdclk = vlv_plane_min_cdclk;
+ else if (IS_BROADWELL(dev_priv) || IS_HASWELL(dev_priv))
+ plane->min_cdclk = hsw_plane_min_cdclk;
+ else if (IS_IVYBRIDGE(dev_priv))
+ plane->min_cdclk = ivb_plane_min_cdclk;
+ else
plane->min_cdclk = i9xx_plane_min_cdclk;
- plane_funcs = &i8xx_plane_funcs;
- }
+ plane->max_stride = i9xx_plane_max_stride;
+ plane->update_plane = i9xx_update_plane;
+ plane->disable_plane = i9xx_disable_plane;
+ plane->get_hw_state = i9xx_plane_get_hw_state;
+ plane->check_plane = i9xx_plane_check;
possible_crtcs = BIT(pipe);
if (INTEL_GEN(dev_priv) >= 5 || IS_G4X(dev_priv))
ret = drm_universal_plane_init(&dev_priv->drm, &plane->base,
possible_crtcs, plane_funcs,
- formats, num_formats, modifiers,
+ formats, num_formats,
+ i9xx_format_modifiers,
DRM_PLANE_TYPE_PRIMARY,
"primary %c", pipe_name(pipe));
else
ret = drm_universal_plane_init(&dev_priv->drm, &plane->base,
possible_crtcs, plane_funcs,
- formats, num_formats, modifiers,
+ formats, num_formats,
+ i9xx_format_modifiers,
DRM_PLANE_TYPE_PRIMARY,
"plane %c",
plane_name(plane->i9xx_plane));
--
2.23.0
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 20+ messages in thread
* ✓ Fi.CI.BAT: success for drm/i915: Expose more formats
@ 2019-10-31 19:08 ` Patchwork
0 siblings, 0 replies; 20+ messages in thread
From: Patchwork @ 2019-10-31 19:08 UTC (permalink / raw)
To: Ville Syrjala; +Cc: intel-gfx
== Series Details ==
Series: drm/i915: Expose more formats
URL : https://patchwork.freedesktop.org/series/68832/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7233 -> Patchwork_15092
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15092/index.html
Known issues
------------
Here are the changes found in Patchwork_15092 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_ringfill@basic-default:
- fi-icl-u3: [PASS][1] -> [DMESG-WARN][2] ([fdo#107724])
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7233/fi-icl-u3/igt@gem_ringfill@basic-default.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15092/fi-icl-u3/igt@gem_ringfill@basic-default.html
#### Possible fixes ####
* igt@gem_mmap_gtt@basic-small-bo-tiledy:
- fi-icl-u3: [DMESG-WARN][3] ([fdo#107724]) -> [PASS][4]
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7233/fi-icl-u3/igt@gem_mmap_gtt@basic-small-bo-tiledy.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15092/fi-icl-u3/igt@gem_mmap_gtt@basic-small-bo-tiledy.html
* igt@kms_chamelium@hdmi-hpd-fast:
- fi-kbl-7500u: [FAIL][5] ([fdo#111045] / [fdo#111096]) -> [PASS][6]
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7233/fi-kbl-7500u/igt@kms_chamelium@hdmi-hpd-fast.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15092/fi-kbl-7500u/igt@kms_chamelium@hdmi-hpd-fast.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713
[fdo#107724]: https://bugs.freedesktop.org/show_bug.cgi?id=107724
[fdo#111045]: https://bugs.freedesktop.org/show_bug.cgi?id=111045
[fdo#111096]: https://bugs.freedesktop.org/show_bug.cgi?id=111096
[fdo#111880]: https://bugs.freedesktop.org/show_bug.cgi?id=111880
Participating hosts (53 -> 45)
------------------------------
Missing (8): fi-ilk-m540 fi-hsw-4200u fi-tgl-u2 fi-byt-squawks fi-bsw-cyan fi-ctg-p8600 fi-byt-clapper fi-bdw-samus
Build changes
-------------
* CI: CI-20190529 -> None
* Linux: CI_DRM_7233 -> Patchwork_15092
CI-20190529: 20190529
CI_DRM_7233: 1cdd3a3d9f5a2b0e0879d0d2468d4c88efdcda4f @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_5255: b21b6a7aaa0db2159f22ee4427804e5a16fe2261 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_15092: e21cfa158d0f0507257ec37839c2a5912ec378b6 @ git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
e21cfa158d0f drm/i915: Eliminate redundancy in intel_primary_plane_create()
a2d1c9390e49 drm/i915: Sort format arrays consistently
35629ab74c44 drm/i915: Add 10bpc formats with alpha for icl+
0cebeab39475 drm/i915: Expose C8 on VLV/CHV sprite planes
65f2c2a216ec drm/i915: Add missing 10bpc formats for pipe B sprites on CHV
8bb2c5008932 drm/i915: Expose alpha formats on VLV/CHV primary planes
a24c3ea05189 drm/i915: Expose 10:10:10 XRGB formats on SNB-BDW sprites
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15092/index.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 20+ messages in thread
* [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Expose more formats
@ 2019-10-31 19:08 ` Patchwork
0 siblings, 0 replies; 20+ messages in thread
From: Patchwork @ 2019-10-31 19:08 UTC (permalink / raw)
To: Ville Syrjala; +Cc: intel-gfx
== Series Details ==
Series: drm/i915: Expose more formats
URL : https://patchwork.freedesktop.org/series/68832/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7233 -> Patchwork_15092
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15092/index.html
Known issues
------------
Here are the changes found in Patchwork_15092 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_ringfill@basic-default:
- fi-icl-u3: [PASS][1] -> [DMESG-WARN][2] ([fdo#107724])
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7233/fi-icl-u3/igt@gem_ringfill@basic-default.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15092/fi-icl-u3/igt@gem_ringfill@basic-default.html
#### Possible fixes ####
* igt@gem_mmap_gtt@basic-small-bo-tiledy:
- fi-icl-u3: [DMESG-WARN][3] ([fdo#107724]) -> [PASS][4]
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7233/fi-icl-u3/igt@gem_mmap_gtt@basic-small-bo-tiledy.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15092/fi-icl-u3/igt@gem_mmap_gtt@basic-small-bo-tiledy.html
* igt@kms_chamelium@hdmi-hpd-fast:
- fi-kbl-7500u: [FAIL][5] ([fdo#111045] / [fdo#111096]) -> [PASS][6]
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7233/fi-kbl-7500u/igt@kms_chamelium@hdmi-hpd-fast.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15092/fi-kbl-7500u/igt@kms_chamelium@hdmi-hpd-fast.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713
[fdo#107724]: https://bugs.freedesktop.org/show_bug.cgi?id=107724
[fdo#111045]: https://bugs.freedesktop.org/show_bug.cgi?id=111045
[fdo#111096]: https://bugs.freedesktop.org/show_bug.cgi?id=111096
[fdo#111880]: https://bugs.freedesktop.org/show_bug.cgi?id=111880
Participating hosts (53 -> 45)
------------------------------
Missing (8): fi-ilk-m540 fi-hsw-4200u fi-tgl-u2 fi-byt-squawks fi-bsw-cyan fi-ctg-p8600 fi-byt-clapper fi-bdw-samus
Build changes
-------------
* CI: CI-20190529 -> None
* Linux: CI_DRM_7233 -> Patchwork_15092
CI-20190529: 20190529
CI_DRM_7233: 1cdd3a3d9f5a2b0e0879d0d2468d4c88efdcda4f @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_5255: b21b6a7aaa0db2159f22ee4427804e5a16fe2261 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_15092: e21cfa158d0f0507257ec37839c2a5912ec378b6 @ git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
e21cfa158d0f drm/i915: Eliminate redundancy in intel_primary_plane_create()
a2d1c9390e49 drm/i915: Sort format arrays consistently
35629ab74c44 drm/i915: Add 10bpc formats with alpha for icl+
0cebeab39475 drm/i915: Expose C8 on VLV/CHV sprite planes
65f2c2a216ec drm/i915: Add missing 10bpc formats for pipe B sprites on CHV
8bb2c5008932 drm/i915: Expose alpha formats on VLV/CHV primary planes
a24c3ea05189 drm/i915: Expose 10:10:10 XRGB formats on SNB-BDW sprites
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15092/index.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 20+ messages in thread
* ✓ Fi.CI.IGT: success for drm/i915: Expose more formats
@ 2019-11-02 0:55 ` Patchwork
0 siblings, 0 replies; 20+ messages in thread
From: Patchwork @ 2019-11-02 0:55 UTC (permalink / raw)
To: Ville Syrjälä; +Cc: intel-gfx
== Series Details ==
Series: drm/i915: Expose more formats
URL : https://patchwork.freedesktop.org/series/68832/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7233_full -> Patchwork_15092_full
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in Patchwork_15092_full:
### IGT changes ###
#### Suppressed ####
The following results come from untrusted machines, tests, or statuses.
They do not affect the overall result.
* igt@gem_exec_schedule@wide-bsd1:
- {shard-tglb}: [PASS][1] -> [INCOMPLETE][2]
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7233/shard-tglb8/igt@gem_exec_schedule@wide-bsd1.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15092/shard-tglb5/igt@gem_exec_schedule@wide-bsd1.html
Known issues
------------
Here are the changes found in Patchwork_15092_full that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_ctx_isolation@vcs1-clean:
- shard-iclb: [PASS][3] -> [SKIP][4] ([fdo#109276] / [fdo#112080]) +1 similar issue
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7233/shard-iclb2/igt@gem_ctx_isolation@vcs1-clean.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15092/shard-iclb5/igt@gem_ctx_isolation@vcs1-clean.html
* igt@gem_exec_schedule@in-order-bsd:
- shard-iclb: [PASS][5] -> [SKIP][6] ([fdo#112146]) +7 similar issues
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7233/shard-iclb5/igt@gem_exec_schedule@in-order-bsd.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15092/shard-iclb2/igt@gem_exec_schedule@in-order-bsd.html
* igt@gem_userptr_blits@map-fixed-invalidate-overlap-busy:
- shard-snb: [PASS][7] -> [DMESG-WARN][8] ([fdo#111870]) +1 similar issue
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7233/shard-snb7/igt@gem_userptr_blits@map-fixed-invalidate-overlap-busy.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15092/shard-snb1/igt@gem_userptr_blits@map-fixed-invalidate-overlap-busy.html
- shard-hsw: [PASS][9] -> [DMESG-WARN][10] ([fdo#111870]) +1 similar issue
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7233/shard-hsw1/igt@gem_userptr_blits@map-fixed-invalidate-overlap-busy.html
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15092/shard-hsw6/igt@gem_userptr_blits@map-fixed-invalidate-overlap-busy.html
* igt@i915_selftest@live_hangcheck:
- shard-hsw: [PASS][11] -> [DMESG-FAIL][12] ([fdo#111991])
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7233/shard-hsw6/igt@i915_selftest@live_hangcheck.html
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15092/shard-hsw7/igt@i915_selftest@live_hangcheck.html
* igt@kms_flip@flip-vs-expired-vblank:
- shard-glk: [PASS][13] -> [FAIL][14] ([fdo#105363])
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7233/shard-glk3/igt@kms_flip@flip-vs-expired-vblank.html
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15092/shard-glk8/igt@kms_flip@flip-vs-expired-vblank.html
* igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-shrfb-plflip-blt:
- shard-iclb: [PASS][15] -> [FAIL][16] ([fdo#103167]) +3 similar issues
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7233/shard-iclb7/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-shrfb-plflip-blt.html
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15092/shard-iclb6/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-shrfb-plflip-blt.html
* igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a:
- shard-kbl: [PASS][17] -> [DMESG-WARN][18] ([fdo#108566]) +3 similar issues
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7233/shard-kbl2/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a.html
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15092/shard-kbl4/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a.html
* igt@kms_plane@plane-panning-bottom-right-suspend-pipe-b-planes:
- shard-apl: [PASS][19] -> [DMESG-WARN][20] ([fdo#108566]) +1 similar issue
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7233/shard-apl8/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-b-planes.html
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15092/shard-apl4/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-b-planes.html
* igt@kms_plane_alpha_blend@pipe-a-coverage-7efc:
- shard-skl: [PASS][21] -> [FAIL][22] ([fdo#108145])
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7233/shard-skl6/igt@kms_plane_alpha_blend@pipe-a-coverage-7efc.html
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15092/shard-skl8/igt@kms_plane_alpha_blend@pipe-a-coverage-7efc.html
* igt@kms_plane_multiple@atomic-pipe-a-tiling-y:
- shard-skl: [PASS][23] -> [DMESG-WARN][24] ([fdo#106885])
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7233/shard-skl8/igt@kms_plane_multiple@atomic-pipe-a-tiling-y.html
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15092/shard-skl10/igt@kms_plane_multiple@atomic-pipe-a-tiling-y.html
* igt@kms_psr@no_drrs:
- shard-iclb: [PASS][25] -> [FAIL][26] ([fdo#108341])
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7233/shard-iclb6/igt@kms_psr@no_drrs.html
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15092/shard-iclb1/igt@kms_psr@no_drrs.html
* igt@kms_psr@psr2_primary_render:
- shard-iclb: [PASS][27] -> [SKIP][28] ([fdo#109441])
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7233/shard-iclb2/igt@kms_psr@psr2_primary_render.html
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15092/shard-iclb5/igt@kms_psr@psr2_primary_render.html
* igt@perf_pmu@busy-no-semaphores-vcs1:
- shard-iclb: [PASS][29] -> [SKIP][30] ([fdo#112080]) +10 similar issues
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7233/shard-iclb2/igt@perf_pmu@busy-no-semaphores-vcs1.html
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15092/shard-iclb6/igt@perf_pmu@busy-no-semaphores-vcs1.html
* igt@prime_vgem@wait-bsd2:
- shard-iclb: [PASS][31] -> [SKIP][32] ([fdo#109276]) +12 similar issues
[31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7233/shard-iclb4/igt@prime_vgem@wait-bsd2.html
[32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15092/shard-iclb7/igt@prime_vgem@wait-bsd2.html
#### Possible fixes ####
* igt@gem_ctx_isolation@bcs0-s3:
- {shard-tglb}: [INCOMPLETE][33] ([fdo#111832]) -> [PASS][34]
[33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7233/shard-tglb5/igt@gem_ctx_isolation@bcs0-s3.html
[34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15092/shard-tglb8/igt@gem_ctx_isolation@bcs0-s3.html
* igt@gem_ctx_isolation@vcs1-dirty-create:
- shard-iclb: [SKIP][35] ([fdo#109276] / [fdo#112080]) -> [PASS][36] +4 similar issues
[35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7233/shard-iclb3/igt@gem_ctx_isolation@vcs1-dirty-create.html
[36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15092/shard-iclb4/igt@gem_ctx_isolation@vcs1-dirty-create.html
* igt@gem_ctx_switch@all-light:
- {shard-tglb}: [INCOMPLETE][37] ([fdo#111672]) -> [PASS][38]
[37]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7233/shard-tglb1/igt@gem_ctx_switch@all-light.html
[38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15092/shard-tglb1/igt@gem_ctx_switch@all-light.html
* igt@gem_ctx_switch@vcs1:
- shard-iclb: [SKIP][39] ([fdo#112080]) -> [PASS][40] +9 similar issues
[39]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7233/shard-iclb7/igt@gem_ctx_switch@vcs1.html
[40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15092/shard-iclb2/igt@gem_ctx_switch@vcs1.html
* igt@gem_exec_parallel@contexts:
- {shard-tglb}: [INCOMPLETE][41] ([fdo#111867]) -> [PASS][42]
[41]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7233/shard-tglb6/igt@gem_exec_parallel@contexts.html
[42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15092/shard-tglb4/igt@gem_exec_parallel@contexts.html
* igt@gem_exec_reloc@basic-range-active:
- shard-skl: [DMESG-WARN][43] ([fdo#106107]) -> [PASS][44] +1 similar issue
[43]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7233/shard-skl10/igt@gem_exec_reloc@basic-range-active.html
[44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15092/shard-skl9/igt@gem_exec_reloc@basic-range-active.html
* igt@gem_exec_schedule@preempt-queue-bsd1:
- shard-iclb: [SKIP][45] ([fdo#109276]) -> [PASS][46] +12 similar issues
[45]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7233/shard-iclb6/igt@gem_exec_schedule@preempt-queue-bsd1.html
[46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15092/shard-iclb1/igt@gem_exec_schedule@preempt-queue-bsd1.html
* igt@gem_exec_schedule@preemptive-hang-bsd:
- shard-iclb: [SKIP][47] ([fdo#112146]) -> [PASS][48] +4 similar issues
[47]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7233/shard-iclb4/igt@gem_exec_schedule@preemptive-hang-bsd.html
[48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15092/shard-iclb8/igt@gem_exec_schedule@preemptive-hang-bsd.html
* igt@gem_persistent_relocs@forked-interruptible-thrashing:
- shard-kbl: [FAIL][49] ([fdo#112037]) -> [PASS][50]
[49]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7233/shard-kbl7/igt@gem_persistent_relocs@forked-interruptible-thrashing.html
[50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15092/shard-kbl3/igt@gem_persistent_relocs@forked-interruptible-thrashing.html
* igt@gem_userptr_blits@dmabuf-unsync:
- shard-snb: [DMESG-WARN][51] ([fdo#111870]) -> [PASS][52]
[51]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7233/shard-snb2/igt@gem_userptr_blits@dmabuf-unsync.html
[52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15092/shard-snb7/igt@gem_userptr_blits@dmabuf-unsync.html
* igt@gem_userptr_blits@sync-unmap:
- shard-hsw: [DMESG-WARN][53] ([fdo#110789] / [fdo#111870]) -> [PASS][54]
[53]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7233/shard-hsw8/igt@gem_userptr_blits@sync-unmap.html
[54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15092/shard-hsw5/igt@gem_userptr_blits@sync-unmap.html
* {igt@i915_pm_dc@dc6-psr}:
- shard-iclb: [FAIL][55] ([fdo#110548]) -> [PASS][56]
[55]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7233/shard-iclb4/igt@i915_pm_dc@dc6-psr.html
[56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15092/shard-iclb7/igt@i915_pm_dc@dc6-psr.html
* {igt@i915_selftest@live_gt_timelines}:
- {shard-tglb}: [INCOMPLETE][57] ([fdo#111831]) -> [PASS][58]
[57]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7233/shard-tglb6/igt@i915_selftest@live_gt_timelines.html
[58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15092/shard-tglb5/igt@i915_selftest@live_gt_timelines.html
* igt@i915_suspend@forcewake:
- shard-apl: [DMESG-WARN][59] ([fdo#108566]) -> [PASS][60]
[59]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7233/shard-apl4/igt@i915_suspend@forcewake.html
[60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15092/shard-apl3/igt@i915_suspend@forcewake.html
* igt@kms_cursor_crc@pipe-a-cursor-dpms:
- shard-apl: [FAIL][61] ([fdo#103232]) -> [PASS][62]
[61]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7233/shard-apl1/igt@kms_cursor_crc@pipe-a-cursor-dpms.html
[62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15092/shard-apl7/igt@kms_cursor_crc@pipe-a-cursor-dpms.html
* igt@kms_frontbuffer_tracking@fbc-1p-indfb-fliptrack:
- {shard-tglb}: [FAIL][63] ([fdo#103167]) -> [PASS][64] +2 similar issues
[63]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7233/shard-tglb5/igt@kms_frontbuffer_tracking@fbc-1p-indfb-fliptrack.html
[64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15092/shard-tglb8/igt@kms_frontbuffer_tracking@fbc-1p-indfb-fliptrack.html
* igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-shrfb-draw-pwrite:
- shard-iclb: [FAIL][65] ([fdo#103167]) -> [PASS][66] +3 similar issues
[65]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7233/shard-iclb7/igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-shrfb-draw-pwrite.html
[66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15092/shard-iclb3/igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-shrfb-draw-pwrite.html
* igt@kms_frontbuffer_tracking@fbc-suspend:
- shard-kbl: [DMESG-WARN][67] ([fdo#108566]) -> [PASS][68] +5 similar issues
[67]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7233/shard-kbl4/igt@kms_frontbuffer_tracking@fbc-suspend.html
[68]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15092/shard-kbl2/igt@kms_frontbuffer_tracking@fbc-suspend.html
* igt@kms_frontbuffer_tracking@psr-1p-primscrn-cur-indfb-draw-mmap-wc:
- shard-skl: [FAIL][69] ([fdo#103167]) -> [PASS][70]
[69]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7233/shard-skl1/igt@kms_frontbuffer_tracking@psr-1p-primscrn-cur-indfb-draw-mmap-wc.html
[70]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15092/shard-skl10/igt@kms_frontbuffer_tracking@psr-1p-primscrn-cur-indfb-draw-mmap-wc.html
* igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a:
- shard-skl: [INCOMPLETE][71] ([fdo#104108]) -> [PASS][72]
[71]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7233/shard-skl3/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a.html
[72]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15092/shard-skl10/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a.html
* igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min:
- shard-skl: [FAIL][73] ([fdo#108145]) -> [PASS][74]
[73]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7233/shard-skl2/igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min.html
[74]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15092/shard-skl1/igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min.html
* igt@kms_plane_alpha_blend@pipe-b-coverage-7efc:
- shard-skl: [FAIL][75] ([fdo#108145] / [fdo#110403]) -> [PASS][76]
[75]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7233/shard-skl7/igt@kms_plane_alpha_blend@pipe-b-coverage-7efc.html
[76]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15092/shard-skl5/igt@kms_plane_alpha_blend@pipe-b-coverage-7efc.html
* igt@kms_psr@psr2_sprite_render:
- shard-iclb: [SKIP][77] ([fdo#109441]) -> [PASS][78] +2 similar issues
[77]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7233/shard-iclb5/igt@kms_psr@psr2_sprite_render.html
[78]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15092/shard-iclb2/igt@kms_psr@psr2_sprite_render.html
* igt@kms_psr@psr2_suspend:
- {shard-tglb}: [INCOMPLETE][79] ([fdo#111832] / [fdo#111850]) -> [PASS][80]
[79]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7233/shard-tglb2/igt@kms_psr@psr2_suspend.html
[80]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15092/shard-tglb5/igt@kms_psr@psr2_suspend.html
* igt@kms_universal_plane@universal-plane-pipe-c-sanity:
- shard-skl: [INCOMPLETE][81] -> [PASS][82]
[81]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7233/shard-skl1/igt@kms_universal_plane@universal-plane-pipe-c-sanity.html
[82]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15092/shard-skl10/igt@kms_universal_plane@universal-plane-pipe-c-sanity.html
* igt@perf_pmu@most-busy-check-all-rcs0:
- shard-iclb: [INCOMPLETE][83] ([fdo#107713]) -> [PASS][84]
[83]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7233/shard-iclb7/igt@perf_pmu@most-busy-check-all-rcs0.html
[84]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15092/shard-iclb2/igt@perf_pmu@most-busy-check-all-rcs0.html
* igt@tools_test@tools_test:
- shard-snb: [SKIP][85] ([fdo#109271]) -> [PASS][86]
[85]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7233/shard-snb4/igt@tools_test@tools_test.html
[86]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15092/shard-snb2/igt@tools_test@tools_test.html
#### Warnings ####
* igt@gem_mocs_settings@mocs-isolation-bsd2:
- shard-iclb: [SKIP][87] ([fdo#109276]) -> [FAIL][88] ([fdo#111330]) +1 similar issue
[87]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7233/shard-iclb6/igt@gem_mocs_settings@mocs-isolation-bsd2.html
[88]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15092/shard-iclb4/igt@gem_mocs_settings@mocs-isolation-bsd2.html
* igt@gem_userptr_blits@map-fixed-invalidate-overlap-busy-gup:
- shard-hsw: [DMESG-WARN][89] ([fdo#111870]) -> [DMESG-WARN][90] ([fdo#110789] / [fdo#111870])
[89]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7233/shard-hsw6/igt@gem_userptr_blits@map-fixed-invalidate-overlap-busy-gup.html
[90]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15092/shard-hsw5/igt@gem_userptr_blits@map-fixed-invalidate-overlap-busy-gup.html
* igt@kms_dp_dsc@basic-dsc-enable-edp:
- shard-iclb: [DMESG-WARN][91] ([fdo#107724]) -> [SKIP][92] ([fdo#109349])
[91]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7233/shard-iclb2/igt@kms_dp_dsc@basic-dsc-enable-edp.html
[92]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15092/shard-iclb6/igt@kms_dp_dsc@basic-dsc-enable-edp.html
* igt@kms_psr@psr2_suspend:
- shard-iclb: [DMESG-WARN][93] ([fdo#107724]) -> [SKIP][94] ([fdo#109441])
[93]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7233/shard-iclb2/igt@kms_psr@psr2_suspend.html
[94]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15092/shard-iclb3/igt@kms_psr@psr2_suspend.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo# 111852 ]: https://bugs.freedesktop.org/show_bug.cgi?id= 111852
[fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167
[fdo#103232]: https://bugs.freedesktop.org/show_bug.cgi?id=103232
[fdo#104108]: https://bugs.freedesktop.org/show_bug.cgi?id=104108
[fdo#105363]: https://bugs.freedesktop.org/show_bug.cgi?id=105363
[fdo#106107]: https://bugs.freedesktop.org/show_bug.cgi?id=106107
[fdo#106885]: https://bugs.freedesktop.org/show_bug.cgi?id=106885
[fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713
[fdo#107724]: https://bugs.freedesktop.org/show_bug.cgi?id=107724
[fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145
[fdo#108341]: https://bugs.freedesktop.org/show_bug.cgi?id=108341
[fdo#108566]: https://bugs.freedesktop.org/show_bug.cgi?id=108566
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109276]: https://bugs.freedesktop.org/show_bug.cgi?id=109276
[fdo#109349]: https://bugs.freedesktop.org/show_bug.cgi?id=109349
[fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441
[fdo#110403]: https://bugs.freedesktop.org/show_bug.cgi?id=110403
[fdo#110548]: https://bugs.freedesktop.org/show_bug.cgi?id=110548
[fdo#110789]: https://bugs.freedesktop.org/show_bug.cgi?id=110789
[fdo#111329]: https://bugs.freedesktop.org/show_bug.cgi?id=111329
[fdo#111330]: https://bugs.freedesktop.org/show_bug.cgi?id=111330
[fdo#111606]: https://bugs.freedesktop.org/show_bug.cgi?id=111606
[fdo#111646]: https://bugs.freedesktop.org/show_bug.cgi?id=111646
[fdo#111671]: https://bugs.freedesktop.org/show_bug.cgi?id=111671
[fdo#111672]: https://bugs.freedesktop.org/show_bug.cgi?id=111672
[fdo#111677]: https://bugs.freedesktop.org/show_bug.cgi?id=111677
[fdo#111703]: https://bugs.freedesktop.org/show_bug.cgi?id=111703
[fdo#111747]: https://bugs.freedesktop.org/show_bug.cgi?id=111747
[fdo#111771]: https://bugs.freedesktop.org/show_bug.cgi?id=111771
[fdo#1117
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15092/index.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 20+ messages in thread
* [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Expose more formats
@ 2019-11-02 0:55 ` Patchwork
0 siblings, 0 replies; 20+ messages in thread
From: Patchwork @ 2019-11-02 0:55 UTC (permalink / raw)
To: Ville Syrjälä; +Cc: intel-gfx
== Series Details ==
Series: drm/i915: Expose more formats
URL : https://patchwork.freedesktop.org/series/68832/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_7233_full -> Patchwork_15092_full
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in Patchwork_15092_full:
### IGT changes ###
#### Suppressed ####
The following results come from untrusted machines, tests, or statuses.
They do not affect the overall result.
* igt@gem_exec_schedule@wide-bsd1:
- {shard-tglb}: [PASS][1] -> [INCOMPLETE][2]
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7233/shard-tglb8/igt@gem_exec_schedule@wide-bsd1.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15092/shard-tglb5/igt@gem_exec_schedule@wide-bsd1.html
Known issues
------------
Here are the changes found in Patchwork_15092_full that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_ctx_isolation@vcs1-clean:
- shard-iclb: [PASS][3] -> [SKIP][4] ([fdo#109276] / [fdo#112080]) +1 similar issue
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7233/shard-iclb2/igt@gem_ctx_isolation@vcs1-clean.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15092/shard-iclb5/igt@gem_ctx_isolation@vcs1-clean.html
* igt@gem_exec_schedule@in-order-bsd:
- shard-iclb: [PASS][5] -> [SKIP][6] ([fdo#112146]) +7 similar issues
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7233/shard-iclb5/igt@gem_exec_schedule@in-order-bsd.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15092/shard-iclb2/igt@gem_exec_schedule@in-order-bsd.html
* igt@gem_userptr_blits@map-fixed-invalidate-overlap-busy:
- shard-snb: [PASS][7] -> [DMESG-WARN][8] ([fdo#111870]) +1 similar issue
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7233/shard-snb7/igt@gem_userptr_blits@map-fixed-invalidate-overlap-busy.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15092/shard-snb1/igt@gem_userptr_blits@map-fixed-invalidate-overlap-busy.html
- shard-hsw: [PASS][9] -> [DMESG-WARN][10] ([fdo#111870]) +1 similar issue
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7233/shard-hsw1/igt@gem_userptr_blits@map-fixed-invalidate-overlap-busy.html
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15092/shard-hsw6/igt@gem_userptr_blits@map-fixed-invalidate-overlap-busy.html
* igt@i915_selftest@live_hangcheck:
- shard-hsw: [PASS][11] -> [DMESG-FAIL][12] ([fdo#111991])
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7233/shard-hsw6/igt@i915_selftest@live_hangcheck.html
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15092/shard-hsw7/igt@i915_selftest@live_hangcheck.html
* igt@kms_flip@flip-vs-expired-vblank:
- shard-glk: [PASS][13] -> [FAIL][14] ([fdo#105363])
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7233/shard-glk3/igt@kms_flip@flip-vs-expired-vblank.html
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15092/shard-glk8/igt@kms_flip@flip-vs-expired-vblank.html
* igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-shrfb-plflip-blt:
- shard-iclb: [PASS][15] -> [FAIL][16] ([fdo#103167]) +3 similar issues
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7233/shard-iclb7/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-shrfb-plflip-blt.html
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15092/shard-iclb6/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-shrfb-plflip-blt.html
* igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a:
- shard-kbl: [PASS][17] -> [DMESG-WARN][18] ([fdo#108566]) +3 similar issues
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7233/shard-kbl2/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a.html
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15092/shard-kbl4/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a.html
* igt@kms_plane@plane-panning-bottom-right-suspend-pipe-b-planes:
- shard-apl: [PASS][19] -> [DMESG-WARN][20] ([fdo#108566]) +1 similar issue
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7233/shard-apl8/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-b-planes.html
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15092/shard-apl4/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-b-planes.html
* igt@kms_plane_alpha_blend@pipe-a-coverage-7efc:
- shard-skl: [PASS][21] -> [FAIL][22] ([fdo#108145])
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7233/shard-skl6/igt@kms_plane_alpha_blend@pipe-a-coverage-7efc.html
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15092/shard-skl8/igt@kms_plane_alpha_blend@pipe-a-coverage-7efc.html
* igt@kms_plane_multiple@atomic-pipe-a-tiling-y:
- shard-skl: [PASS][23] -> [DMESG-WARN][24] ([fdo#106885])
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7233/shard-skl8/igt@kms_plane_multiple@atomic-pipe-a-tiling-y.html
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15092/shard-skl10/igt@kms_plane_multiple@atomic-pipe-a-tiling-y.html
* igt@kms_psr@no_drrs:
- shard-iclb: [PASS][25] -> [FAIL][26] ([fdo#108341])
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7233/shard-iclb6/igt@kms_psr@no_drrs.html
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15092/shard-iclb1/igt@kms_psr@no_drrs.html
* igt@kms_psr@psr2_primary_render:
- shard-iclb: [PASS][27] -> [SKIP][28] ([fdo#109441])
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7233/shard-iclb2/igt@kms_psr@psr2_primary_render.html
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15092/shard-iclb5/igt@kms_psr@psr2_primary_render.html
* igt@perf_pmu@busy-no-semaphores-vcs1:
- shard-iclb: [PASS][29] -> [SKIP][30] ([fdo#112080]) +10 similar issues
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7233/shard-iclb2/igt@perf_pmu@busy-no-semaphores-vcs1.html
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15092/shard-iclb6/igt@perf_pmu@busy-no-semaphores-vcs1.html
* igt@prime_vgem@wait-bsd2:
- shard-iclb: [PASS][31] -> [SKIP][32] ([fdo#109276]) +12 similar issues
[31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7233/shard-iclb4/igt@prime_vgem@wait-bsd2.html
[32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15092/shard-iclb7/igt@prime_vgem@wait-bsd2.html
#### Possible fixes ####
* igt@gem_ctx_isolation@bcs0-s3:
- {shard-tglb}: [INCOMPLETE][33] ([fdo#111832]) -> [PASS][34]
[33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7233/shard-tglb5/igt@gem_ctx_isolation@bcs0-s3.html
[34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15092/shard-tglb8/igt@gem_ctx_isolation@bcs0-s3.html
* igt@gem_ctx_isolation@vcs1-dirty-create:
- shard-iclb: [SKIP][35] ([fdo#109276] / [fdo#112080]) -> [PASS][36] +4 similar issues
[35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7233/shard-iclb3/igt@gem_ctx_isolation@vcs1-dirty-create.html
[36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15092/shard-iclb4/igt@gem_ctx_isolation@vcs1-dirty-create.html
* igt@gem_ctx_switch@all-light:
- {shard-tglb}: [INCOMPLETE][37] ([fdo#111672]) -> [PASS][38]
[37]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7233/shard-tglb1/igt@gem_ctx_switch@all-light.html
[38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15092/shard-tglb1/igt@gem_ctx_switch@all-light.html
* igt@gem_ctx_switch@vcs1:
- shard-iclb: [SKIP][39] ([fdo#112080]) -> [PASS][40] +9 similar issues
[39]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7233/shard-iclb7/igt@gem_ctx_switch@vcs1.html
[40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15092/shard-iclb2/igt@gem_ctx_switch@vcs1.html
* igt@gem_exec_parallel@contexts:
- {shard-tglb}: [INCOMPLETE][41] ([fdo#111867]) -> [PASS][42]
[41]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7233/shard-tglb6/igt@gem_exec_parallel@contexts.html
[42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15092/shard-tglb4/igt@gem_exec_parallel@contexts.html
* igt@gem_exec_reloc@basic-range-active:
- shard-skl: [DMESG-WARN][43] ([fdo#106107]) -> [PASS][44] +1 similar issue
[43]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7233/shard-skl10/igt@gem_exec_reloc@basic-range-active.html
[44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15092/shard-skl9/igt@gem_exec_reloc@basic-range-active.html
* igt@gem_exec_schedule@preempt-queue-bsd1:
- shard-iclb: [SKIP][45] ([fdo#109276]) -> [PASS][46] +12 similar issues
[45]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7233/shard-iclb6/igt@gem_exec_schedule@preempt-queue-bsd1.html
[46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15092/shard-iclb1/igt@gem_exec_schedule@preempt-queue-bsd1.html
* igt@gem_exec_schedule@preemptive-hang-bsd:
- shard-iclb: [SKIP][47] ([fdo#112146]) -> [PASS][48] +4 similar issues
[47]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7233/shard-iclb4/igt@gem_exec_schedule@preemptive-hang-bsd.html
[48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15092/shard-iclb8/igt@gem_exec_schedule@preemptive-hang-bsd.html
* igt@gem_persistent_relocs@forked-interruptible-thrashing:
- shard-kbl: [FAIL][49] ([fdo#112037]) -> [PASS][50]
[49]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7233/shard-kbl7/igt@gem_persistent_relocs@forked-interruptible-thrashing.html
[50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15092/shard-kbl3/igt@gem_persistent_relocs@forked-interruptible-thrashing.html
* igt@gem_userptr_blits@dmabuf-unsync:
- shard-snb: [DMESG-WARN][51] ([fdo#111870]) -> [PASS][52]
[51]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7233/shard-snb2/igt@gem_userptr_blits@dmabuf-unsync.html
[52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15092/shard-snb7/igt@gem_userptr_blits@dmabuf-unsync.html
* igt@gem_userptr_blits@sync-unmap:
- shard-hsw: [DMESG-WARN][53] ([fdo#110789] / [fdo#111870]) -> [PASS][54]
[53]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7233/shard-hsw8/igt@gem_userptr_blits@sync-unmap.html
[54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15092/shard-hsw5/igt@gem_userptr_blits@sync-unmap.html
* {igt@i915_pm_dc@dc6-psr}:
- shard-iclb: [FAIL][55] ([fdo#110548]) -> [PASS][56]
[55]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7233/shard-iclb4/igt@i915_pm_dc@dc6-psr.html
[56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15092/shard-iclb7/igt@i915_pm_dc@dc6-psr.html
* {igt@i915_selftest@live_gt_timelines}:
- {shard-tglb}: [INCOMPLETE][57] ([fdo#111831]) -> [PASS][58]
[57]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7233/shard-tglb6/igt@i915_selftest@live_gt_timelines.html
[58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15092/shard-tglb5/igt@i915_selftest@live_gt_timelines.html
* igt@i915_suspend@forcewake:
- shard-apl: [DMESG-WARN][59] ([fdo#108566]) -> [PASS][60]
[59]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7233/shard-apl4/igt@i915_suspend@forcewake.html
[60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15092/shard-apl3/igt@i915_suspend@forcewake.html
* igt@kms_cursor_crc@pipe-a-cursor-dpms:
- shard-apl: [FAIL][61] ([fdo#103232]) -> [PASS][62]
[61]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7233/shard-apl1/igt@kms_cursor_crc@pipe-a-cursor-dpms.html
[62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15092/shard-apl7/igt@kms_cursor_crc@pipe-a-cursor-dpms.html
* igt@kms_frontbuffer_tracking@fbc-1p-indfb-fliptrack:
- {shard-tglb}: [FAIL][63] ([fdo#103167]) -> [PASS][64] +2 similar issues
[63]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7233/shard-tglb5/igt@kms_frontbuffer_tracking@fbc-1p-indfb-fliptrack.html
[64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15092/shard-tglb8/igt@kms_frontbuffer_tracking@fbc-1p-indfb-fliptrack.html
* igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-shrfb-draw-pwrite:
- shard-iclb: [FAIL][65] ([fdo#103167]) -> [PASS][66] +3 similar issues
[65]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7233/shard-iclb7/igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-shrfb-draw-pwrite.html
[66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15092/shard-iclb3/igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-shrfb-draw-pwrite.html
* igt@kms_frontbuffer_tracking@fbc-suspend:
- shard-kbl: [DMESG-WARN][67] ([fdo#108566]) -> [PASS][68] +5 similar issues
[67]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7233/shard-kbl4/igt@kms_frontbuffer_tracking@fbc-suspend.html
[68]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15092/shard-kbl2/igt@kms_frontbuffer_tracking@fbc-suspend.html
* igt@kms_frontbuffer_tracking@psr-1p-primscrn-cur-indfb-draw-mmap-wc:
- shard-skl: [FAIL][69] ([fdo#103167]) -> [PASS][70]
[69]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7233/shard-skl1/igt@kms_frontbuffer_tracking@psr-1p-primscrn-cur-indfb-draw-mmap-wc.html
[70]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15092/shard-skl10/igt@kms_frontbuffer_tracking@psr-1p-primscrn-cur-indfb-draw-mmap-wc.html
* igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a:
- shard-skl: [INCOMPLETE][71] ([fdo#104108]) -> [PASS][72]
[71]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7233/shard-skl3/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a.html
[72]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15092/shard-skl10/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a.html
* igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min:
- shard-skl: [FAIL][73] ([fdo#108145]) -> [PASS][74]
[73]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7233/shard-skl2/igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min.html
[74]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15092/shard-skl1/igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min.html
* igt@kms_plane_alpha_blend@pipe-b-coverage-7efc:
- shard-skl: [FAIL][75] ([fdo#108145] / [fdo#110403]) -> [PASS][76]
[75]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7233/shard-skl7/igt@kms_plane_alpha_blend@pipe-b-coverage-7efc.html
[76]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15092/shard-skl5/igt@kms_plane_alpha_blend@pipe-b-coverage-7efc.html
* igt@kms_psr@psr2_sprite_render:
- shard-iclb: [SKIP][77] ([fdo#109441]) -> [PASS][78] +2 similar issues
[77]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7233/shard-iclb5/igt@kms_psr@psr2_sprite_render.html
[78]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15092/shard-iclb2/igt@kms_psr@psr2_sprite_render.html
* igt@kms_psr@psr2_suspend:
- {shard-tglb}: [INCOMPLETE][79] ([fdo#111832] / [fdo#111850]) -> [PASS][80]
[79]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7233/shard-tglb2/igt@kms_psr@psr2_suspend.html
[80]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15092/shard-tglb5/igt@kms_psr@psr2_suspend.html
* igt@kms_universal_plane@universal-plane-pipe-c-sanity:
- shard-skl: [INCOMPLETE][81] -> [PASS][82]
[81]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7233/shard-skl1/igt@kms_universal_plane@universal-plane-pipe-c-sanity.html
[82]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15092/shard-skl10/igt@kms_universal_plane@universal-plane-pipe-c-sanity.html
* igt@perf_pmu@most-busy-check-all-rcs0:
- shard-iclb: [INCOMPLETE][83] ([fdo#107713]) -> [PASS][84]
[83]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7233/shard-iclb7/igt@perf_pmu@most-busy-check-all-rcs0.html
[84]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15092/shard-iclb2/igt@perf_pmu@most-busy-check-all-rcs0.html
* igt@tools_test@tools_test:
- shard-snb: [SKIP][85] ([fdo#109271]) -> [PASS][86]
[85]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7233/shard-snb4/igt@tools_test@tools_test.html
[86]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15092/shard-snb2/igt@tools_test@tools_test.html
#### Warnings ####
* igt@gem_mocs_settings@mocs-isolation-bsd2:
- shard-iclb: [SKIP][87] ([fdo#109276]) -> [FAIL][88] ([fdo#111330]) +1 similar issue
[87]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7233/shard-iclb6/igt@gem_mocs_settings@mocs-isolation-bsd2.html
[88]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15092/shard-iclb4/igt@gem_mocs_settings@mocs-isolation-bsd2.html
* igt@gem_userptr_blits@map-fixed-invalidate-overlap-busy-gup:
- shard-hsw: [DMESG-WARN][89] ([fdo#111870]) -> [DMESG-WARN][90] ([fdo#110789] / [fdo#111870])
[89]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7233/shard-hsw6/igt@gem_userptr_blits@map-fixed-invalidate-overlap-busy-gup.html
[90]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15092/shard-hsw5/igt@gem_userptr_blits@map-fixed-invalidate-overlap-busy-gup.html
* igt@kms_dp_dsc@basic-dsc-enable-edp:
- shard-iclb: [DMESG-WARN][91] ([fdo#107724]) -> [SKIP][92] ([fdo#109349])
[91]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7233/shard-iclb2/igt@kms_dp_dsc@basic-dsc-enable-edp.html
[92]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15092/shard-iclb6/igt@kms_dp_dsc@basic-dsc-enable-edp.html
* igt@kms_psr@psr2_suspend:
- shard-iclb: [DMESG-WARN][93] ([fdo#107724]) -> [SKIP][94] ([fdo#109441])
[93]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7233/shard-iclb2/igt@kms_psr@psr2_suspend.html
[94]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15092/shard-iclb3/igt@kms_psr@psr2_suspend.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo# 111852 ]: https://bugs.freedesktop.org/show_bug.cgi?id= 111852
[fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167
[fdo#103232]: https://bugs.freedesktop.org/show_bug.cgi?id=103232
[fdo#104108]: https://bugs.freedesktop.org/show_bug.cgi?id=104108
[fdo#105363]: https://bugs.freedesktop.org/show_bug.cgi?id=105363
[fdo#106107]: https://bugs.freedesktop.org/show_bug.cgi?id=106107
[fdo#106885]: https://bugs.freedesktop.org/show_bug.cgi?id=106885
[fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713
[fdo#107724]: https://bugs.freedesktop.org/show_bug.cgi?id=107724
[fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145
[fdo#108341]: https://bugs.freedesktop.org/show_bug.cgi?id=108341
[fdo#108566]: https://bugs.freedesktop.org/show_bug.cgi?id=108566
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109276]: https://bugs.freedesktop.org/show_bug.cgi?id=109276
[fdo#109349]: https://bugs.freedesktop.org/show_bug.cgi?id=109349
[fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441
[fdo#110403]: https://bugs.freedesktop.org/show_bug.cgi?id=110403
[fdo#110548]: https://bugs.freedesktop.org/show_bug.cgi?id=110548
[fdo#110789]: https://bugs.freedesktop.org/show_bug.cgi?id=110789
[fdo#111329]: https://bugs.freedesktop.org/show_bug.cgi?id=111329
[fdo#111330]: https://bugs.freedesktop.org/show_bug.cgi?id=111330
[fdo#111606]: https://bugs.freedesktop.org/show_bug.cgi?id=111606
[fdo#111646]: https://bugs.freedesktop.org/show_bug.cgi?id=111646
[fdo#111671]: https://bugs.freedesktop.org/show_bug.cgi?id=111671
[fdo#111672]: https://bugs.freedesktop.org/show_bug.cgi?id=111672
[fdo#111677]: https://bugs.freedesktop.org/show_bug.cgi?id=111677
[fdo#111703]: https://bugs.freedesktop.org/show_bug.cgi?id=111703
[fdo#111747]: https://bugs.freedesktop.org/show_bug.cgi?id=111747
[fdo#111771]: https://bugs.freedesktop.org/show_bug.cgi?id=111771
[fdo#1117
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15092/index.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 20+ messages in thread
end of thread, other threads:[~2019-11-02 0:55 UTC | newest]
Thread overview: 20+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2019-10-31 16:56 [PATCH 0/7] drm/i915: Expose more formats Ville Syrjala
2019-10-31 16:56 ` [Intel-gfx] " Ville Syrjala
2019-10-31 16:56 ` [PATCH 1/7] drm/i915: Expose 10:10:10 XRGB formats on SNB-BDW sprites Ville Syrjala
2019-10-31 16:56 ` [Intel-gfx] " Ville Syrjala
2019-10-31 16:56 ` [PATCH 2/7] drm/i915: Expose alpha formats on VLV/CHV primary planes Ville Syrjala
2019-10-31 16:56 ` [Intel-gfx] " Ville Syrjala
2019-10-31 16:56 ` [PATCH 3/7] drm/i915: Add missing 10bpc formats for pipe B sprites on CHV Ville Syrjala
2019-10-31 16:56 ` [Intel-gfx] " Ville Syrjala
2019-10-31 16:56 ` [PATCH 4/7] drm/i915: Expose C8 on VLV/CHV sprite planes Ville Syrjala
2019-10-31 16:56 ` [Intel-gfx] " Ville Syrjala
2019-10-31 16:56 ` [PATCH 5/7] drm/i915: Add 10bpc formats with alpha for icl+ Ville Syrjala
2019-10-31 16:56 ` [Intel-gfx] " Ville Syrjala
2019-10-31 16:56 ` [PATCH 6/7] drm/i915: Sort format arrays consistently Ville Syrjala
2019-10-31 16:56 ` [Intel-gfx] " Ville Syrjala
2019-10-31 16:56 ` [PATCH 7/7] drm/i915: Eliminate redundancy in intel_primary_plane_create() Ville Syrjala
2019-10-31 16:56 ` [Intel-gfx] " Ville Syrjala
2019-10-31 19:08 ` ✓ Fi.CI.BAT: success for drm/i915: Expose more formats Patchwork
2019-10-31 19:08 ` [Intel-gfx] " Patchwork
2019-11-02 0:55 ` ✓ Fi.CI.IGT: " Patchwork
2019-11-02 0:55 ` [Intel-gfx] " Patchwork
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