From: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com> To: intel-gfx@lists.freedesktop.org Subject: [PATCH v10 0/2] Refactor Gen11+ SAGV support Date: Fri, 1 Nov 2019 14:35:55 +0200 [thread overview] Message-ID: <20191101123557.1117-1-stanislav.lisovskiy@intel.com> (raw) For Gen11+ platforms BSpec suggests disabling specific QGV points separately, depending on bandwidth limitations and current display configuration. Thus it required adding a new PCode request for disabling QGV points and some refactoring of already existing SAGV code. Also had to refactor intel_can_enable_sagv function, as current seems to be outdated and using skl specific workarounds, also not following BSpec for Gen11+. Stanislav Lisovskiy (2): drm/i915: Refactor intel_can_enable_sagv drm/i915: Restrict qgv points which don't have enough bandwidth. drivers/gpu/drm/i915/display/intel_atomic.h | 3 + drivers/gpu/drm/i915/display/intel_bw.c | 108 +++++-- drivers/gpu/drm/i915/display/intel_bw.h | 2 + drivers/gpu/drm/i915/display/intel_display.c | 61 +++- .../drm/i915/display/intel_display_types.h | 12 + drivers/gpu/drm/i915/i915_drv.h | 10 +- drivers/gpu/drm/i915/i915_reg.h | 8 + drivers/gpu/drm/i915/intel_pm.c | 299 +++++++++++++++++- drivers/gpu/drm/i915/intel_sideband.c | 27 +- 9 files changed, 487 insertions(+), 43 deletions(-) -- 2.17.1 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
WARNING: multiple messages have this Message-ID (diff)
From: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com> To: intel-gfx@lists.freedesktop.org Subject: [Intel-gfx] [PATCH v10 0/2] Refactor Gen11+ SAGV support Date: Fri, 1 Nov 2019 14:35:55 +0200 [thread overview] Message-ID: <20191101123557.1117-1-stanislav.lisovskiy@intel.com> (raw) Message-ID: <20191101123555.kcKPu00kH7p6M739Ly5ENGJInqWAFMboc8Q857WLvbo@z> (raw) For Gen11+ platforms BSpec suggests disabling specific QGV points separately, depending on bandwidth limitations and current display configuration. Thus it required adding a new PCode request for disabling QGV points and some refactoring of already existing SAGV code. Also had to refactor intel_can_enable_sagv function, as current seems to be outdated and using skl specific workarounds, also not following BSpec for Gen11+. Stanislav Lisovskiy (2): drm/i915: Refactor intel_can_enable_sagv drm/i915: Restrict qgv points which don't have enough bandwidth. drivers/gpu/drm/i915/display/intel_atomic.h | 3 + drivers/gpu/drm/i915/display/intel_bw.c | 108 +++++-- drivers/gpu/drm/i915/display/intel_bw.h | 2 + drivers/gpu/drm/i915/display/intel_display.c | 61 +++- .../drm/i915/display/intel_display_types.h | 12 + drivers/gpu/drm/i915/i915_drv.h | 10 +- drivers/gpu/drm/i915/i915_reg.h | 8 + drivers/gpu/drm/i915/intel_pm.c | 299 +++++++++++++++++- drivers/gpu/drm/i915/intel_sideband.c | 27 +- 9 files changed, 487 insertions(+), 43 deletions(-) -- 2.17.1 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
next reply other threads:[~2019-11-01 12:38 UTC|newest] Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top 2019-11-01 12:35 Stanislav Lisovskiy [this message] 2019-11-01 12:35 ` [Intel-gfx] [PATCH v10 0/2] Refactor Gen11+ SAGV support Stanislav Lisovskiy 2019-11-01 12:35 ` [PATCH v10 1/2] drm/i915: Refactor intel_can_enable_sagv Stanislav Lisovskiy 2019-11-01 12:35 ` [Intel-gfx] " Stanislav Lisovskiy 2019-11-01 12:35 ` [PATCH v10 2/2] drm/i915: Restrict qgv points which don't have enough bandwidth Stanislav Lisovskiy 2019-11-01 12:35 ` [Intel-gfx] " Stanislav Lisovskiy 2019-11-01 14:10 ` ✗ Fi.CI.CHECKPATCH: warning for Refactor Gen11+ SAGV support (rev7) Patchwork 2019-11-01 14:10 ` [Intel-gfx] " Patchwork 2019-11-01 14:12 ` ✗ Fi.CI.SPARSE: " Patchwork 2019-11-01 14:12 ` [Intel-gfx] " Patchwork 2019-11-01 14:40 ` ✗ Fi.CI.BAT: failure " Patchwork 2019-11-01 14:40 ` [Intel-gfx] " Patchwork 2019-11-05 15:57 [PATCH v10 0/2] Refactor Gen11+ SAGV support Stanislav Lisovskiy 2019-11-07 10:22 Stanislav Lisovskiy 2019-11-07 15:30 Stanislav Lisovskiy
Reply instructions: You may reply publicly to this message via plain-text email using any one of the following methods: * Save the following mbox file, import it into your mail client, and reply-to-all from there: mbox Avoid top-posting and favor interleaved quoting: https://en.wikipedia.org/wiki/Posting_style#Interleaved_style * Reply using the --to, --cc, and --in-reply-to switches of git-send-email(1): git send-email \ --in-reply-to=20191101123557.1117-1-stanislav.lisovskiy@intel.com \ --to=stanislav.lisovskiy@intel.com \ --cc=intel-gfx@lists.freedesktop.org \ /path/to/YOUR_REPLY https://kernel.org/pub/software/scm/git/docs/git-send-email.html * If your mail client supports setting the In-Reply-To header via mailto: links, try the mailto: linkBe sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes, see mirroring instructions on how to clone and mirror all data and code used by this external index.