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From: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
To: Kishon Vijay Abraham I <kishon@ti.com>
Cc: Andrew Murray <andrew.murray@arm.com>,
	Xiaowei Bao <xiaowei.bao@nxp.com>,
	"gustavo.pimentel@synopsys.com" <gustavo.pimentel@synopsys.com>,
	"bhelgaas@google.com" <bhelgaas@google.com>,
	"robh+dt@kernel.org" <robh+dt@kernel.org>,
	"mark.rutland@arm.com" <mark.rutland@arm.com>,
	"shawnguo@kernel.org" <shawnguo@kernel.org>,
	Leo Li <leoyang.li@nxp.com>,
	"lorenzo.pieralisi@arm.co" <lorenzo.pieralisi@arm.co>,
	"arnd@arndb.de" <arnd@arndb.de>,
	"gregkh@linuxfoundation.org" <gregkh@linuxfoundation.org>,
	"M.h. Lian" <minghuan.lian@nxp.com>,
	Mingkai Hu <mingkai.hu@nxp.com>, Roy Zang <roy.zang@nxp.com>,
	"jingoohan1@gmail.com" <jingoohan1@gmail.com>,
	"linux-pci@vger.kernel.org" <linux-pci@vger.kernel.org>,
	"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	"linux-arm-kernel@lists.infradead.org" 
	<linux-arm-kernel@lists.infradead.org>,
	"linuxppc-dev@lists.ozlabs.org" <linuxppc-dev@lists.ozlabs.org>
Subject: Re: [PATCH v2 07/10] PCI: layerscape: Modify the MSIX to the doorbell way
Date: Tue, 5 Nov 2019 12:37:39 +0000	[thread overview]
Message-ID: <20191105123739.GB26960@e121166-lin.cambridge.arm.com> (raw)
In-Reply-To: <e64a484c-7cf5-5f65-400c-47128ab45e52@ti.com>

On Thu, Aug 29, 2019 at 10:43:18AM +0530, Kishon Vijay Abraham I wrote:
> Gustavo,
> 
> On 27/08/19 6:55 PM, Andrew Murray wrote:
> > On Sat, Aug 24, 2019 at 12:08:40AM +0000, Xiaowei Bao wrote:
> >>
> >>
> >>> -----Original Message-----
> >>> From: Andrew Murray <andrew.murray@arm.com>
> >>> Sent: 2019年8月23日 21:58
> >>> To: Xiaowei Bao <xiaowei.bao@nxp.com>
> >>> Cc: bhelgaas@google.com; robh+dt@kernel.org; mark.rutland@arm.com;
> >>> shawnguo@kernel.org; Leo Li <leoyang.li@nxp.com>; kishon@ti.com;
> >>> lorenzo.pieralisi@arm.co; arnd@arndb.de; gregkh@linuxfoundation.org; M.h.
> >>> Lian <minghuan.lian@nxp.com>; Mingkai Hu <mingkai.hu@nxp.com>; Roy
> >>> Zang <roy.zang@nxp.com>; jingoohan1@gmail.com;
> >>> gustavo.pimentel@synopsys.com; linux-pci@vger.kernel.org;
> >>> devicetree@vger.kernel.org; linux-kernel@vger.kernel.org;
> >>> linux-arm-kernel@lists.infradead.org; linuxppc-dev@lists.ozlabs.org
> >>> Subject: Re: [PATCH v2 07/10] PCI: layerscape: Modify the MSIX to the
> >>> doorbell way
> >>>
> >>> On Thu, Aug 22, 2019 at 07:22:39PM +0800, Xiaowei Bao wrote:
> >>>> The layerscape platform use the doorbell way to trigger MSIX interrupt
> >>>> in EP mode.
> >>>>
> >>>
> >>> I have no problems with this patch, however...
> >>>
> >>> Are you able to add to this message a reason for why you are making this
> >>> change? Did dw_pcie_ep_raise_msix_irq not work when func_no != 0? Or did
> >>> it work yet dw_pcie_ep_raise_msix_irq_doorbell is more efficient?
> >>
> >> The fact is that, this driver is verified in ls1046a platform of NXP before, and ls1046a don't
> >> support MSIX feature, so I set the msix_capable of pci_epc_features struct is false,
> >> but in other platform, e.g. ls1088a, it support the MSIX feature, I verified the MSIX
> >> feature in ls1088a, it is not OK, so I changed to another way. Thanks.
> > 
> > Right, so the existing pci-layerscape-ep.c driver never supported MSIX yet it
> > erroneously had a switch case statement to call dw_pcie_ep_raise_msix_irq which
> > would never get used.
> > 
> > Now that we're adding a platform with MSIX support the existing
> > dw_pcie_ep_raise_msix_irq doesn't work (for this platform) so we are adding a
> > different method.
> 
> Gustavo, can you confirm dw_pcie_ep_raise_msix_irq() works for
> designware as it didn't work for both me and Xiaowei?

This question needs an answer.

Thanks,
Lorenzo

WARNING: multiple messages have this Message-ID (diff)
From: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
To: Kishon Vijay Abraham I <kishon@ti.com>
Cc: "mark.rutland@arm.com" <mark.rutland@arm.com>,
	Roy Zang <roy.zang@nxp.com>,
	"lorenzo.pieralisi@arm.co" <lorenzo.pieralisi@arm.co>,
	Xiaowei Bao <xiaowei.bao@nxp.com>,
	"jingoohan1@gmail.com" <jingoohan1@gmail.com>,
	"gustavo.pimentel@synopsys.com" <gustavo.pimentel@synopsys.com>,
	"linuxppc-dev@lists.ozlabs.org" <linuxppc-dev@lists.ozlabs.org>,
	"linux-pci@vger.kernel.org" <linux-pci@vger.kernel.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	Leo Li <leoyang.li@nxp.com>, "M.h. Lian" <minghuan.lian@nxp.com>,
	"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
	"robh+dt@kernel.org" <robh+dt@kernel.org>,
	"arnd@arndb.de" <arnd@arndb.de>,
	"linux-arm-kernel@lists.infradead.org"
	<linux-arm-kernel@lists.infradead.org>,
	"gregkh@linuxfoundation.org" <gregkh@linuxfoundation.org>,
	"bhelgaas@google.com" <bhelgaas@google.com>,
	Andrew Murray <andrew.murray@arm.com>,
	"shawnguo@kernel.org" <shawnguo@kernel.org>,
	Mingkai Hu <mingkai.hu@nxp.com>
Subject: Re: [PATCH v2 07/10] PCI: layerscape: Modify the MSIX to the doorbell way
Date: Tue, 5 Nov 2019 12:37:39 +0000	[thread overview]
Message-ID: <20191105123739.GB26960@e121166-lin.cambridge.arm.com> (raw)
In-Reply-To: <e64a484c-7cf5-5f65-400c-47128ab45e52@ti.com>

On Thu, Aug 29, 2019 at 10:43:18AM +0530, Kishon Vijay Abraham I wrote:
> Gustavo,
> 
> On 27/08/19 6:55 PM, Andrew Murray wrote:
> > On Sat, Aug 24, 2019 at 12:08:40AM +0000, Xiaowei Bao wrote:
> >>
> >>
> >>> -----Original Message-----
> >>> From: Andrew Murray <andrew.murray@arm.com>
> >>> Sent: 2019年8月23日 21:58
> >>> To: Xiaowei Bao <xiaowei.bao@nxp.com>
> >>> Cc: bhelgaas@google.com; robh+dt@kernel.org; mark.rutland@arm.com;
> >>> shawnguo@kernel.org; Leo Li <leoyang.li@nxp.com>; kishon@ti.com;
> >>> lorenzo.pieralisi@arm.co; arnd@arndb.de; gregkh@linuxfoundation.org; M.h.
> >>> Lian <minghuan.lian@nxp.com>; Mingkai Hu <mingkai.hu@nxp.com>; Roy
> >>> Zang <roy.zang@nxp.com>; jingoohan1@gmail.com;
> >>> gustavo.pimentel@synopsys.com; linux-pci@vger.kernel.org;
> >>> devicetree@vger.kernel.org; linux-kernel@vger.kernel.org;
> >>> linux-arm-kernel@lists.infradead.org; linuxppc-dev@lists.ozlabs.org
> >>> Subject: Re: [PATCH v2 07/10] PCI: layerscape: Modify the MSIX to the
> >>> doorbell way
> >>>
> >>> On Thu, Aug 22, 2019 at 07:22:39PM +0800, Xiaowei Bao wrote:
> >>>> The layerscape platform use the doorbell way to trigger MSIX interrupt
> >>>> in EP mode.
> >>>>
> >>>
> >>> I have no problems with this patch, however...
> >>>
> >>> Are you able to add to this message a reason for why you are making this
> >>> change? Did dw_pcie_ep_raise_msix_irq not work when func_no != 0? Or did
> >>> it work yet dw_pcie_ep_raise_msix_irq_doorbell is more efficient?
> >>
> >> The fact is that, this driver is verified in ls1046a platform of NXP before, and ls1046a don't
> >> support MSIX feature, so I set the msix_capable of pci_epc_features struct is false,
> >> but in other platform, e.g. ls1088a, it support the MSIX feature, I verified the MSIX
> >> feature in ls1088a, it is not OK, so I changed to another way. Thanks.
> > 
> > Right, so the existing pci-layerscape-ep.c driver never supported MSIX yet it
> > erroneously had a switch case statement to call dw_pcie_ep_raise_msix_irq which
> > would never get used.
> > 
> > Now that we're adding a platform with MSIX support the existing
> > dw_pcie_ep_raise_msix_irq doesn't work (for this platform) so we are adding a
> > different method.
> 
> Gustavo, can you confirm dw_pcie_ep_raise_msix_irq() works for
> designware as it didn't work for both me and Xiaowei?

This question needs an answer.

Thanks,
Lorenzo

WARNING: multiple messages have this Message-ID (diff)
From: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
To: Kishon Vijay Abraham I <kishon@ti.com>
Cc: "mark.rutland@arm.com" <mark.rutland@arm.com>,
	Roy Zang <roy.zang@nxp.com>,
	"lorenzo.pieralisi@arm.co" <lorenzo.pieralisi@arm.co>,
	Xiaowei Bao <xiaowei.bao@nxp.com>,
	"jingoohan1@gmail.com" <jingoohan1@gmail.com>,
	"gustavo.pimentel@synopsys.com" <gustavo.pimentel@synopsys.com>,
	"linuxppc-dev@lists.ozlabs.org" <linuxppc-dev@lists.ozlabs.org>,
	"linux-pci@vger.kernel.org" <linux-pci@vger.kernel.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	Leo Li <leoyang.li@nxp.com>, "M.h. Lian" <minghuan.lian@nxp.com>,
	"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
	"robh+dt@kernel.org" <robh+dt@kernel.org>,
	"arnd@arndb.de" <arnd@arndb.de>,
	"linux-arm-kernel@lists.infradead.org"
	<linux-arm-kernel@lists.infradead.org>,
	"gregkh@linuxfoundation.org" <gregkh@linuxfoundation.org>,
	"bhelgaas@google.com" <bhelgaas@google.com>,
	Andrew Murray <andrew.murray@arm.com>,
	"shawnguo@kernel.org" <shawnguo@kernel.org>,
	Mingkai Hu <mingkai.hu@nxp.com>
Subject: Re: [PATCH v2 07/10] PCI: layerscape: Modify the MSIX to the doorbell way
Date: Tue, 5 Nov 2019 12:37:39 +0000	[thread overview]
Message-ID: <20191105123739.GB26960@e121166-lin.cambridge.arm.com> (raw)
In-Reply-To: <e64a484c-7cf5-5f65-400c-47128ab45e52@ti.com>

On Thu, Aug 29, 2019 at 10:43:18AM +0530, Kishon Vijay Abraham I wrote:
> Gustavo,
> 
> On 27/08/19 6:55 PM, Andrew Murray wrote:
> > On Sat, Aug 24, 2019 at 12:08:40AM +0000, Xiaowei Bao wrote:
> >>
> >>
> >>> -----Original Message-----
> >>> From: Andrew Murray <andrew.murray@arm.com>
> >>> Sent: 2019年8月23日 21:58
> >>> To: Xiaowei Bao <xiaowei.bao@nxp.com>
> >>> Cc: bhelgaas@google.com; robh+dt@kernel.org; mark.rutland@arm.com;
> >>> shawnguo@kernel.org; Leo Li <leoyang.li@nxp.com>; kishon@ti.com;
> >>> lorenzo.pieralisi@arm.co; arnd@arndb.de; gregkh@linuxfoundation.org; M.h.
> >>> Lian <minghuan.lian@nxp.com>; Mingkai Hu <mingkai.hu@nxp.com>; Roy
> >>> Zang <roy.zang@nxp.com>; jingoohan1@gmail.com;
> >>> gustavo.pimentel@synopsys.com; linux-pci@vger.kernel.org;
> >>> devicetree@vger.kernel.org; linux-kernel@vger.kernel.org;
> >>> linux-arm-kernel@lists.infradead.org; linuxppc-dev@lists.ozlabs.org
> >>> Subject: Re: [PATCH v2 07/10] PCI: layerscape: Modify the MSIX to the
> >>> doorbell way
> >>>
> >>> On Thu, Aug 22, 2019 at 07:22:39PM +0800, Xiaowei Bao wrote:
> >>>> The layerscape platform use the doorbell way to trigger MSIX interrupt
> >>>> in EP mode.
> >>>>
> >>>
> >>> I have no problems with this patch, however...
> >>>
> >>> Are you able to add to this message a reason for why you are making this
> >>> change? Did dw_pcie_ep_raise_msix_irq not work when func_no != 0? Or did
> >>> it work yet dw_pcie_ep_raise_msix_irq_doorbell is more efficient?
> >>
> >> The fact is that, this driver is verified in ls1046a platform of NXP before, and ls1046a don't
> >> support MSIX feature, so I set the msix_capable of pci_epc_features struct is false,
> >> but in other platform, e.g. ls1088a, it support the MSIX feature, I verified the MSIX
> >> feature in ls1088a, it is not OK, so I changed to another way. Thanks.
> > 
> > Right, so the existing pci-layerscape-ep.c driver never supported MSIX yet it
> > erroneously had a switch case statement to call dw_pcie_ep_raise_msix_irq which
> > would never get used.
> > 
> > Now that we're adding a platform with MSIX support the existing
> > dw_pcie_ep_raise_msix_irq doesn't work (for this platform) so we are adding a
> > different method.
> 
> Gustavo, can you confirm dw_pcie_ep_raise_msix_irq() works for
> designware as it didn't work for both me and Xiaowei?

This question needs an answer.

Thanks,
Lorenzo

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

  reply	other threads:[~2019-11-05 20:54 UTC|newest]

Thread overview: 166+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-08-22 11:22 [PATCH v2 01/10] PCI: designware-ep: Add multiple PFs support for DWC Xiaowei Bao
2019-08-22 11:22 ` Xiaowei Bao
2019-08-22 11:22 ` [PATCH v2 02/10] PCI: designware-ep: Add the doorbell mode of MSI-X in EP mode Xiaowei Bao
2019-08-22 11:22   ` Xiaowei Bao
2019-08-23 13:35   ` Andrew Murray
2019-08-23 13:35     ` Andrew Murray
2019-08-23 13:35     ` Andrew Murray
2019-08-23 23:51     ` Xiaowei Bao
2019-08-23 23:51       ` Xiaowei Bao
2019-08-23 23:51       ` Xiaowei Bao
2019-08-23 23:51       ` Xiaowei Bao
2019-08-22 11:22 ` [PATCH v2 03/10] PCI: designware-ep: Move the function of getting MSI capability forward Xiaowei Bao
2019-08-22 11:22   ` Xiaowei Bao
2019-08-23 13:38   ` Andrew Murray
2019-08-23 13:38     ` Andrew Murray
2019-08-23 13:38     ` Andrew Murray
2019-08-24  0:20     ` Xiaowei Bao
2019-08-24  0:20       ` Xiaowei Bao
2019-08-24  0:20       ` Xiaowei Bao
2019-08-24  0:20       ` Xiaowei Bao
2019-08-22 11:22 ` [PATCH v2 04/10] dt-bindings: pci: layerscape-pci: add compatible strings for ls1088a and ls2088a Xiaowei Bao
2019-08-22 11:22   ` Xiaowei Bao
2019-08-27 22:26   ` Rob Herring
2019-08-27 22:26     ` Rob Herring
2019-08-27 22:26     ` Rob Herring
2019-08-29  9:19     ` Xiaowei Bao
2019-08-29  9:19       ` Xiaowei Bao
2019-08-29  9:19       ` Xiaowei Bao
2019-08-22 11:22 ` [PATCH v2 05/10] PCI: layerscape: Fix some format issue of the code Xiaowei Bao
2019-08-22 11:22   ` Xiaowei Bao
2019-08-23 13:45   ` Andrew Murray
2019-08-23 13:45     ` Andrew Murray
2019-08-23 13:45     ` Andrew Murray
2019-08-24  0:00     ` Xiaowei Bao
2019-08-24  0:00       ` Xiaowei Bao
2019-08-24  0:00       ` Xiaowei Bao
2019-08-24  0:00       ` Xiaowei Bao
2019-08-22 11:22 ` [PATCH v2 06/10] PCI: layerscape: Modify the way of getting capability with different PEX Xiaowei Bao
2019-08-22 11:22   ` Xiaowei Bao
2019-08-22 11:43   ` Kishon Vijay Abraham I
2019-08-22 11:43     ` Kishon Vijay Abraham I
2019-08-22 11:43     ` Kishon Vijay Abraham I
2019-08-23  2:39     ` Xiaowei Bao
2019-08-23  2:39       ` Xiaowei Bao
2019-08-23  2:39       ` Xiaowei Bao
2019-08-23  2:39       ` Xiaowei Bao
2019-08-23  3:39       ` Kishon Vijay Abraham I
2019-08-23  3:39         ` Kishon Vijay Abraham I
2019-08-23  3:39         ` Kishon Vijay Abraham I
2019-08-23  3:39         ` Kishon Vijay Abraham I
2019-08-23  4:13         ` Xiaowei Bao
2019-08-23  4:13           ` Xiaowei Bao
2019-08-23  4:13           ` Xiaowei Bao
2019-08-23  4:13           ` Xiaowei Bao
2019-09-02 13:36           ` Andrew Murray
2019-09-02 13:36             ` Andrew Murray
2019-09-02 13:36             ` Andrew Murray
2019-09-02 13:36             ` Andrew Murray
2019-09-03  2:11             ` Xiaowei Bao
2019-09-03  2:11               ` Xiaowei Bao
2019-09-03  2:11               ` Xiaowei Bao
2019-09-03  2:11               ` Xiaowei Bao
2019-08-22 11:22 ` [PATCH v2 07/10] PCI: layerscape: Modify the MSIX to the doorbell way Xiaowei Bao
2019-08-22 11:22   ` Xiaowei Bao
2019-08-23 13:58   ` Andrew Murray
2019-08-23 13:58     ` Andrew Murray
2019-08-23 13:58     ` Andrew Murray
2019-08-24  0:08     ` Xiaowei Bao
2019-08-24  0:08       ` Xiaowei Bao
2019-08-24  0:08       ` Xiaowei Bao
2019-08-24  0:08       ` Xiaowei Bao
2019-08-27 13:25       ` Andrew Murray
2019-08-27 13:25         ` Andrew Murray
2019-08-27 13:25         ` Andrew Murray
2019-08-27 13:25         ` Andrew Murray
2019-08-28  2:49         ` Xiaowei Bao
2019-08-28  2:49           ` Xiaowei Bao
2019-08-28  2:49           ` Xiaowei Bao
2019-08-28  2:49           ` Xiaowei Bao
2019-08-29  5:13         ` Kishon Vijay Abraham I
2019-08-29  5:13           ` Kishon Vijay Abraham I
2019-08-29  5:13           ` Kishon Vijay Abraham I
2019-08-29  5:13           ` Kishon Vijay Abraham I
2019-11-05 12:37           ` Lorenzo Pieralisi [this message]
2019-11-05 12:37             ` Lorenzo Pieralisi
2019-11-05 12:37             ` Lorenzo Pieralisi
2019-11-06  9:33             ` Xiaowei Bao
2019-11-06  9:33               ` Xiaowei Bao
2019-11-06  9:33               ` Xiaowei Bao
2019-11-06  9:40           ` Gustavo Pimentel
2019-11-06  9:40             ` Gustavo Pimentel
2019-11-06  9:40             ` Gustavo Pimentel
2019-11-06 10:03             ` Xiaowei Bao
2019-11-06 10:03               ` Xiaowei Bao
2019-11-06 10:03               ` Xiaowei Bao
2019-11-06 13:39             ` Kishon Vijay Abraham I
2019-11-06 13:39               ` Kishon Vijay Abraham I
2019-11-06 13:39               ` Kishon Vijay Abraham I
2019-11-06 15:40               ` Gustavo Pimentel
2019-11-06 15:40                 ` Gustavo Pimentel
2019-11-06 15:40                 ` Gustavo Pimentel
2019-08-22 11:22 ` [PATCH v2 08/10] PCI: layerscape: Add EP mode support for ls1088a and ls2088a Xiaowei Bao
2019-08-22 11:22   ` Xiaowei Bao
2019-08-23 14:27   ` Andrew Murray
2019-08-23 14:27     ` Andrew Murray
2019-08-23 14:27     ` Andrew Murray
2019-08-24  0:18     ` Xiaowei Bao
2019-08-24  0:18       ` Xiaowei Bao
2019-08-24  0:18       ` Xiaowei Bao
2019-08-24  0:18       ` Xiaowei Bao
2019-08-24  6:45       ` christophe leroy
2019-08-24  6:45         ` christophe leroy
2019-08-24  6:45         ` christophe leroy
2019-08-24  6:45         ` christophe leroy
2019-08-25  3:07         ` Xiaowei Bao
2019-08-25  3:07           ` Xiaowei Bao
2019-08-25  3:07           ` Xiaowei Bao
2019-08-25  3:07           ` Xiaowei Bao
2019-08-27 14:48           ` Andrew Murray
2019-08-27 14:48             ` Andrew Murray
2019-08-27 14:48             ` Andrew Murray
2019-08-27 14:48             ` Andrew Murray
2019-08-28  3:25             ` Xiaowei Bao
2019-08-28  3:25               ` Xiaowei Bao
2019-08-28  3:25               ` Xiaowei Bao
2019-08-28  3:25               ` Xiaowei Bao
2019-08-26  9:49     ` Xiaowei Bao
2019-08-26  9:49       ` Xiaowei Bao
2019-08-26  9:49       ` Xiaowei Bao
2019-08-26  9:49       ` Xiaowei Bao
2019-08-27 13:34       ` Andrew Murray
2019-08-27 13:34         ` Andrew Murray
2019-08-27 13:34         ` Andrew Murray
2019-08-27 13:34         ` Andrew Murray
2019-08-28  4:29         ` Xiaowei Bao
2019-08-28  4:29           ` Xiaowei Bao
2019-08-28  4:29           ` Xiaowei Bao
2019-08-28  4:29           ` Xiaowei Bao
2019-08-28  9:01           ` Andrew Murray
2019-08-28  9:01             ` Andrew Murray
2019-08-28  9:01             ` Andrew Murray
2019-08-28  9:01             ` Andrew Murray
2019-08-29  2:03             ` Xiaowei Bao
2019-08-29  2:03               ` Xiaowei Bao
2019-08-29  2:03               ` Xiaowei Bao
2019-08-29  2:03               ` Xiaowei Bao
2019-08-22 11:22 ` [PATCH v2 09/10] arm64: dts: layerscape: Add PCIe EP node for ls1088a Xiaowei Bao
2019-08-22 11:22   ` Xiaowei Bao
2019-08-22 11:22 ` [PATCH v2 10/10] misc: pci_endpoint_test: Add LS1088a in pci_device_id table Xiaowei Bao
2019-08-22 11:22   ` Xiaowei Bao
2019-08-23 13:25 ` [PATCH v2 01/10] PCI: designware-ep: Add multiple PFs support for DWC Andrew Murray
2019-08-23 13:25   ` Andrew Murray
2019-08-23 13:25   ` Andrew Murray
2019-08-23 13:25   ` Andrew Murray
2019-08-23 23:50   ` Xiaowei Bao
2019-08-23 23:50     ` Xiaowei Bao
2019-08-23 23:50     ` Xiaowei Bao
2019-08-23 23:50     ` Xiaowei Bao
2019-08-27 13:10     ` Andrew Murray
2019-08-27 13:10       ` Andrew Murray
2019-08-27 13:10       ` Andrew Murray
2019-08-27 13:10       ` Andrew Murray
2019-08-28  7:22       ` Xiaowei Bao
2019-08-28  7:22         ` Xiaowei Bao
2019-08-28  7:22         ` Xiaowei Bao
2019-08-28  7:22         ` Xiaowei Bao

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    --in-reply-to=20191105123739.GB26960@e121166-lin.cambridge.arm.com \
    --to=lorenzo.pieralisi@arm.com \
    --cc=andrew.murray@arm.com \
    --cc=arnd@arndb.de \
    --cc=bhelgaas@google.com \
    --cc=devicetree@vger.kernel.org \
    --cc=gregkh@linuxfoundation.org \
    --cc=gustavo.pimentel@synopsys.com \
    --cc=jingoohan1@gmail.com \
    --cc=kishon@ti.com \
    --cc=leoyang.li@nxp.com \
    --cc=linux-arm-kernel@lists.infradead.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-pci@vger.kernel.org \
    --cc=linuxppc-dev@lists.ozlabs.org \
    --cc=lorenzo.pieralisi@arm.co \
    --cc=mark.rutland@arm.com \
    --cc=minghuan.lian@nxp.com \
    --cc=mingkai.hu@nxp.com \
    --cc=robh+dt@kernel.org \
    --cc=roy.zang@nxp.com \
    --cc=shawnguo@kernel.org \
    --cc=xiaowei.bao@nxp.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

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