* [PATCH 1/2] powerpc/perf: Add mtmmcr0(FC) after ppc_set_pmu_inuse(1)
@ 2019-11-07 13:01 Madhavan Srinivasan
2019-11-07 13:01 ` [PATCH 2/2] powerpc/perf: Check pmus_inuse flag in perf_event_print_debug() Madhavan Srinivasan
0 siblings, 1 reply; 5+ messages in thread
From: Madhavan Srinivasan @ 2019-11-07 13:01 UTC (permalink / raw)
To: mpe; +Cc: Madhavan Srinivasan, linuxppc-dev
pmu_inuse flag is part of lppaca struct which notifies the hypervisor
whether guest/partition is using PMUs. This provides a hint incase of
save/restore of PMU registers. And in power_pmu_enable(), linux sets
the pmu_inuse flag and then updates the PMU registers. Current sequence
in power_pmu_enable() is 1) update pmc_inuse flag 2)update MMCRA, MMCR1,
MMCR0 and so on. But with this sequence, there is a window where when
updating MMCRA, hypersior could load stale value to MMCR0 which could
cause a PMI exception. Patch add a mtmmcr0 with freeze counter bit set
right after updating the pmu_inuse flag to avoid any overflow scenarios.
---
arch/powerpc/perf/core-book3s.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/powerpc/perf/core-book3s.c b/arch/powerpc/perf/core-book3s.c
index 3fb6d265ed17..f455e274281a 100644
--- a/arch/powerpc/perf/core-book3s.c
+++ b/arch/powerpc/perf/core-book3s.c
@@ -1351,6 +1351,7 @@ static void power_pmu_enable(struct pmu *pmu)
* Then unfreeze the events.
*/
ppc_set_pmu_inuse(1);
+ mtspr(SPRN_MMCR0, MMCR0_FC);
mtspr(SPRN_MMCRA, cpuhw->mmcr[2] & ~MMCRA_SAMPLE_ENABLE);
mtspr(SPRN_MMCR1, cpuhw->mmcr[1]);
mtspr(SPRN_MMCR0, (cpuhw->mmcr[0] & ~(MMCR0_PMC1CE | MMCR0_PMCjCE))
--
2.21.0
^ permalink raw reply related [flat|nested] 5+ messages in thread
* [PATCH 2/2] powerpc/perf: Check pmus_inuse flag in perf_event_print_debug()
2019-11-07 13:01 [PATCH 1/2] powerpc/perf: Add mtmmcr0(FC) after ppc_set_pmu_inuse(1) Madhavan Srinivasan
@ 2019-11-07 13:01 ` Madhavan Srinivasan
2019-11-12 2:44 ` kbuild test robot
0 siblings, 1 reply; 5+ messages in thread
From: Madhavan Srinivasan @ 2019-11-07 13:01 UTC (permalink / raw)
To: mpe; +Cc: Madhavan Srinivasan, linuxppc-dev
pmu_inuse flag is part of lppaca struct which notifies the hypervisor
whether guest/partition is using PMUs. This provides a hint for
save/restore of PMU registers. Currently perf_event_print_debug()
does not check for pmu_inuse flag and it is not safe to use it to
dump PMU SPRs in a CONFIG_PSERIES.
Patch adds two things here. 1) An inline ppc_get_pmu_inuse() to get
the pmu_inuse value and 2)check in perf_event_print_debug() before
dumping the PMU SPRs.
ppc_get_pmu_inuse() is based on ppc_set_pmu_inuse() and includes same
CONFIG_ checks.
---
arch/powerpc/include/asm/pmc.h | 15 +++++++++++++++
arch/powerpc/perf/core-book3s.c | 9 +++++++++
2 files changed, 24 insertions(+)
diff --git a/arch/powerpc/include/asm/pmc.h b/arch/powerpc/include/asm/pmc.h
index c6bbe9778d3c..35179d218e2e 100644
--- a/arch/powerpc/include/asm/pmc.h
+++ b/arch/powerpc/include/asm/pmc.h
@@ -34,11 +34,26 @@ static inline void ppc_set_pmu_inuse(int inuse)
#endif
}
+static inline u8 ppc_get_pmu_inuse(void)
+{
+#if defined(CONFIG_PPC_PSERIES) || defined(CONFIG_KVM_BOOK3S_HV_POSSIBLE)
+ if (firmware_has_feature(FW_FEATURE_LPAR)) {
+#ifdef CONFIG_PPC_PSERIES
+ return get_lppaca()->pmcregs_in_use;
+#endif
+ }
+#ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
+ return get_paca()->pmcregs_in_use;
+#endif
+#endif
+}
+
extern void power4_enable_pmcs(void);
#else /* CONFIG_PPC64 */
static inline void ppc_set_pmu_inuse(int inuse) { }
+static inline u8 ppc_get_pmu_inuse(void) { }
#endif
diff --git a/arch/powerpc/perf/core-book3s.c b/arch/powerpc/perf/core-book3s.c
index f455e274281a..855a5f9589ef 100644
--- a/arch/powerpc/perf/core-book3s.c
+++ b/arch/powerpc/perf/core-book3s.c
@@ -816,6 +816,15 @@ void perf_event_print_debug(void)
if (!ppmu->n_counter)
return;
+ /*
+ * Check pmu_inuse flag. As per PAPR spec, hypersivor
+ * will save/restore the PMU regs only if pmu_inuse is
+ * set. If its not enable, values dumped from these SPRs
+ * may not be valid or useful.
+ */
+ if (!ppc_get_pmu_inuse())
+ return;
+
local_irq_save(flags);
pr_info("CPU: %d PMU registers, ppmu = %s n_counters = %d",
--
2.21.0
^ permalink raw reply related [flat|nested] 5+ messages in thread* Re: [PATCH 2/2] powerpc/perf: Check pmus_inuse flag in perf_event_print_debug()
2019-11-07 13:01 ` [PATCH 2/2] powerpc/perf: Check pmus_inuse flag in perf_event_print_debug() Madhavan Srinivasan
@ 2019-11-12 2:44 ` kbuild test robot
0 siblings, 0 replies; 5+ messages in thread
From: kbuild test robot @ 2019-11-12 2:44 UTC (permalink / raw)
To: Madhavan Srinivasan; +Cc: Madhavan Srinivasan, kbuild-all, linuxppc-dev
[-- Attachment #1: Type: text/plain, Size: 1748 bytes --]
Hi Madhavan,
Thank you for the patch! Perhaps something to improve:
[auto build test WARNING on powerpc/next]
[also build test WARNING on v5.4-rc7 next-20191111]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system. BTW, we also suggest to use '--base' option to specify the
base tree in git format-patch, please see https://stackoverflow.com/a/37406982]
url: https://github.com/0day-ci/linux/commits/Madhavan-Srinivasan/powerpc-perf-Add-mtmmcr0-FC-after-ppc_set_pmu_inuse-1/20191109-143451
base: https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git next
config: powerpc-pmac32_defconfig (attached as .config)
compiler: powerpc-linux-gcc (GCC) 7.4.0
reproduce:
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# save the attached .config to linux build tree
GCC_VERSION=7.4.0 make.cross ARCH=powerpc
If you fix the issue, kindly add following tag
Reported-by: kbuild test robot <lkp@intel.com>
All warnings (new ones prefixed by >>):
In file included from arch/powerpc/oprofile/common.c:17:0:
arch/powerpc/include/asm/pmc.h: In function 'ppc_get_pmu_inuse':
>> arch/powerpc/include/asm/pmc.h:56:1: warning: no return statement in function returning non-void [-Wreturn-type]
static inline u8 ppc_get_pmu_inuse(void) { }
^~~~~~
vim +56 arch/powerpc/include/asm/pmc.h
54
55 static inline void ppc_set_pmu_inuse(int inuse) { }
> 56 static inline u8 ppc_get_pmu_inuse(void) { }
57
---
0-DAY kernel test infrastructure Open Source Technology Center
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org Intel Corporation
[-- Attachment #2: .config.gz --]
[-- Type: application/gzip, Size: 24436 bytes --]
^ permalink raw reply [flat|nested] 5+ messages in thread
* [PATCH 1/2] powerpc/perf: Add mtmmcr0(FC) after ppc_set_pmu_inuse(1)
@ 2020-02-18 12:56 Madhavan Srinivasan
0 siblings, 0 replies; 5+ messages in thread
From: Madhavan Srinivasan @ 2020-02-18 12:56 UTC (permalink / raw)
To: mpe; +Cc: Madhavan Srinivasan, linuxppc-dev
pmu_inuse flag is part of lppaca struct which notifies the hypervisor
whether guest/partition is using PMUs. This provides a hint incase of
save/restore of PMU registers. And in power_pmu_enable(), linux sets
the pmu_inuse flag and then updates the PMU registers. Current sequence
in power_pmu_enable() is 1) update pmc_inuse flag 2)update MMCRA, MMCR1,
MMCR0 and so on. But with this sequence, there is a window where when
updating MMCRA, hypersior could load stale value to MMCR0 which could
cause a PMI exception. Patch add a mtmmcr0 with freeze counter bit set
right after updating the pmu_inuse flag to avoid any overflow scenarios.
Signed-off-by: Madhavan Srinivasan <maddy@linux.ibm.com>
---
arch/powerpc/perf/core-book3s.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/powerpc/perf/core-book3s.c b/arch/powerpc/perf/core-book3s.c
index a934e8c8a9b8..6e35bf9ff80a 100644
--- a/arch/powerpc/perf/core-book3s.c
+++ b/arch/powerpc/perf/core-book3s.c
@@ -1343,6 +1343,7 @@ static void power_pmu_enable(struct pmu *pmu)
* Then unfreeze the events.
*/
ppc_set_pmu_inuse(1);
+ mtspr(SPRN_MMCR0, MMCR0_FC);
mtspr(SPRN_MMCRA, cpuhw->mmcr[2] & ~MMCRA_SAMPLE_ENABLE);
mtspr(SPRN_MMCR1, cpuhw->mmcr[1]);
mtspr(SPRN_MMCR0, (cpuhw->mmcr[0] & ~(MMCR0_PMC1CE | MMCR0_PMCjCE))
--
2.21.1
^ permalink raw reply related [flat|nested] 5+ messages in thread
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2019-11-07 13:01 [PATCH 1/2] powerpc/perf: Add mtmmcr0(FC) after ppc_set_pmu_inuse(1) Madhavan Srinivasan
2019-11-07 13:01 ` [PATCH 2/2] powerpc/perf: Check pmus_inuse flag in perf_event_print_debug() Madhavan Srinivasan
2019-11-12 2:44 ` kbuild test robot
2019-11-12 2:44 ` kbuild test robot
2020-02-18 12:56 [PATCH 1/2] powerpc/perf: Add mtmmcr0(FC) after ppc_set_pmu_inuse(1) Madhavan Srinivasan
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