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* [PATCH 1/4] drm/i915/icl: Refine PG_HYSTERESIS
@ 2019-11-08  8:56 ` Chris Wilson
  0 siblings, 0 replies; 24+ messages in thread
From: Chris Wilson @ 2019-11-08  8:56 UTC (permalink / raw)
  To: intel-gfx

After doing some measuring, Icelake behaves on a par with Broadwell, and
without having to compromise for low power cores with long latencies, we
can reduce the powergating hysteresis so that the powersaving is enabled
faster. No impact observed on client side throughput measures (so
negligible increase in extra switching), and inspection from high
frequency polling using igt/gem_exec_nop/sequential, provided an estimate
for the upper bound before we can measure a substantial impact on
latency.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
---
 drivers/gpu/drm/i915/gt/intel_rc6.c | 13 +++++--------
 1 file changed, 5 insertions(+), 8 deletions(-)

diff --git a/drivers/gpu/drm/i915/gt/intel_rc6.c b/drivers/gpu/drm/i915/gt/intel_rc6.c
index 5ad4a92a9582..5e3ba034bd46 100644
--- a/drivers/gpu/drm/i915/gt/intel_rc6.c
+++ b/drivers/gpu/drm/i915/gt/intel_rc6.c
@@ -88,15 +88,12 @@ static void gen11_rc6_enable(struct intel_rc6 *rc6)
 	 * do not want the enable hysteresis to less than the wakeup latency.
 	 *
 	 * igt/gem_exec_nop/sequential provides a rough estimate for the
-	 * service latency, and puts it around 10us for Broadwell (and other
-	 * big core) and around 40us for Broxton (and other low power cores).
-	 * [Note that for legacy ringbuffer submission, this is less than 1us!]
-	 * However, the wakeup latency on Broxton is closer to 100us. To be
-	 * conservative, we have to factor in a context switch on top (due
-	 * to ksoftirqd).
+	 * service latency, and puts it under 10us for Icelake, similar to
+	 * Broadwell+, To be conservative, we want to factor in a context
+	 * switch on top (due to ksoftirqd).
 	 */
-	set(uncore, GEN9_MEDIA_PG_IDLE_HYSTERESIS, 250);
-	set(uncore, GEN9_RENDER_PG_IDLE_HYSTERESIS, 250);
+	set(uncore, GEN9_MEDIA_PG_IDLE_HYSTERESIS, 60);
+	set(uncore, GEN9_RENDER_PG_IDLE_HYSTERESIS, 60);
 
 	/* 3a: Enable RC6 */
 	set(uncore, GEN6_RC_CONTROL,
-- 
2.24.0

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^ permalink raw reply related	[flat|nested] 24+ messages in thread

* [Intel-gfx] [PATCH 1/4] drm/i915/icl: Refine PG_HYSTERESIS
@ 2019-11-08  8:56 ` Chris Wilson
  0 siblings, 0 replies; 24+ messages in thread
From: Chris Wilson @ 2019-11-08  8:56 UTC (permalink / raw)
  To: intel-gfx

After doing some measuring, Icelake behaves on a par with Broadwell, and
without having to compromise for low power cores with long latencies, we
can reduce the powergating hysteresis so that the powersaving is enabled
faster. No impact observed on client side throughput measures (so
negligible increase in extra switching), and inspection from high
frequency polling using igt/gem_exec_nop/sequential, provided an estimate
for the upper bound before we can measure a substantial impact on
latency.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
---
 drivers/gpu/drm/i915/gt/intel_rc6.c | 13 +++++--------
 1 file changed, 5 insertions(+), 8 deletions(-)

diff --git a/drivers/gpu/drm/i915/gt/intel_rc6.c b/drivers/gpu/drm/i915/gt/intel_rc6.c
index 5ad4a92a9582..5e3ba034bd46 100644
--- a/drivers/gpu/drm/i915/gt/intel_rc6.c
+++ b/drivers/gpu/drm/i915/gt/intel_rc6.c
@@ -88,15 +88,12 @@ static void gen11_rc6_enable(struct intel_rc6 *rc6)
 	 * do not want the enable hysteresis to less than the wakeup latency.
 	 *
 	 * igt/gem_exec_nop/sequential provides a rough estimate for the
-	 * service latency, and puts it around 10us for Broadwell (and other
-	 * big core) and around 40us for Broxton (and other low power cores).
-	 * [Note that for legacy ringbuffer submission, this is less than 1us!]
-	 * However, the wakeup latency on Broxton is closer to 100us. To be
-	 * conservative, we have to factor in a context switch on top (due
-	 * to ksoftirqd).
+	 * service latency, and puts it under 10us for Icelake, similar to
+	 * Broadwell+, To be conservative, we want to factor in a context
+	 * switch on top (due to ksoftirqd).
 	 */
-	set(uncore, GEN9_MEDIA_PG_IDLE_HYSTERESIS, 250);
-	set(uncore, GEN9_RENDER_PG_IDLE_HYSTERESIS, 250);
+	set(uncore, GEN9_MEDIA_PG_IDLE_HYSTERESIS, 60);
+	set(uncore, GEN9_RENDER_PG_IDLE_HYSTERESIS, 60);
 
 	/* 3a: Enable RC6 */
 	set(uncore, GEN6_RC_CONTROL,
-- 
2.24.0

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https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply related	[flat|nested] 24+ messages in thread

* [PATCH 2/4] drm/i915/execlists: Reduce write flush on context switch to a wmb()
@ 2019-11-08  8:56   ` Chris Wilson
  0 siblings, 0 replies; 24+ messages in thread
From: Chris Wilson @ 2019-11-08  8:56 UTC (permalink / raw)
  To: intel-gfx

Having been forced to reduce Braswell back to using the aliasing ppgtt,
the coherency issue we previously observed cannot impact us. Reduce the
performance penalty imposed on all platforms from using the mfence to a
mere sfence.

References: cf66b8a0ba14 ("drm/i915/execlists: Apply a full mb before execution for Braswell")
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
---
 drivers/gpu/drm/i915/gt/intel_lrc.c | 7 +------
 1 file changed, 1 insertion(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/i915/gt/intel_lrc.c b/drivers/gpu/drm/i915/gt/intel_lrc.c
index 1975fe4775d2..e57345795c08 100644
--- a/drivers/gpu/drm/i915/gt/intel_lrc.c
+++ b/drivers/gpu/drm/i915/gt/intel_lrc.c
@@ -1218,13 +1218,8 @@ static u64 execlists_update_context(const struct i915_request *rq)
 	 * may not be visible to the HW prior to the completion of the UC
 	 * register write and that we may begin execution from the context
 	 * before its image is complete leading to invalid PD chasing.
-	 *
-	 * Furthermore, Braswell, at least, wants a full mb to be sure that
-	 * the writes are coherent in memory (visible to the GPU) prior to
-	 * execution, and not just visible to other CPUs (as is the result of
-	 * wmb).
 	 */
-	mb();
+	wmb();
 
 	desc = ce->lrc_desc;
 	ce->lrc_desc &= ~CTX_DESC_FORCE_RESTORE;
-- 
2.24.0

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https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply related	[flat|nested] 24+ messages in thread

* [Intel-gfx] [PATCH 2/4] drm/i915/execlists: Reduce write flush on context switch to a wmb()
@ 2019-11-08  8:56   ` Chris Wilson
  0 siblings, 0 replies; 24+ messages in thread
From: Chris Wilson @ 2019-11-08  8:56 UTC (permalink / raw)
  To: intel-gfx

Having been forced to reduce Braswell back to using the aliasing ppgtt,
the coherency issue we previously observed cannot impact us. Reduce the
performance penalty imposed on all platforms from using the mfence to a
mere sfence.

References: cf66b8a0ba14 ("drm/i915/execlists: Apply a full mb before execution for Braswell")
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
---
 drivers/gpu/drm/i915/gt/intel_lrc.c | 7 +------
 1 file changed, 1 insertion(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/i915/gt/intel_lrc.c b/drivers/gpu/drm/i915/gt/intel_lrc.c
index 1975fe4775d2..e57345795c08 100644
--- a/drivers/gpu/drm/i915/gt/intel_lrc.c
+++ b/drivers/gpu/drm/i915/gt/intel_lrc.c
@@ -1218,13 +1218,8 @@ static u64 execlists_update_context(const struct i915_request *rq)
 	 * may not be visible to the HW prior to the completion of the UC
 	 * register write and that we may begin execution from the context
 	 * before its image is complete leading to invalid PD chasing.
-	 *
-	 * Furthermore, Braswell, at least, wants a full mb to be sure that
-	 * the writes are coherent in memory (visible to the GPU) prior to
-	 * execution, and not just visible to other CPUs (as is the result of
-	 * wmb).
 	 */
-	mb();
+	wmb();
 
 	desc = ce->lrc_desc;
 	ce->lrc_desc &= ~CTX_DESC_FORCE_RESTORE;
-- 
2.24.0

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https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply related	[flat|nested] 24+ messages in thread

* [PATCH 3/4] drm/i915/pmu: Cheat when reading the actual frequency to avoid fw
@ 2019-11-08  8:56   ` Chris Wilson
  0 siblings, 0 replies; 24+ messages in thread
From: Chris Wilson @ 2019-11-08  8:56 UTC (permalink / raw)
  To: intel-gfx

We want to avoid taking forcewake when querying the performance stats,
as we wish to avoid perturbing the system under observation. (And with
the forcewake being kept alive for 1ms after use, sampling the frequency
from a timer keeps forcewake 60% active.)

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
---
 drivers/gpu/drm/i915/i915_pmu.c | 8 ++++++--
 1 file changed, 6 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_pmu.c b/drivers/gpu/drm/i915/i915_pmu.c
index 05395015d1f2..dbde80a376cb 100644
--- a/drivers/gpu/drm/i915/i915_pmu.c
+++ b/drivers/gpu/drm/i915/i915_pmu.c
@@ -366,8 +366,12 @@ frequency_sample(struct intel_gt *gt, unsigned int period_ns)
 
 		val = rps->cur_freq;
 		if (intel_gt_pm_get_if_awake(gt)) {
-			val = intel_uncore_read_notrace(uncore, GEN6_RPSTAT1);
-			val = intel_get_cagf(rps, val);
+			u32 stat;
+
+			stat = intel_uncore_read_fw(uncore, GEN6_RPSTAT1);
+			if (stat)
+				val = intel_get_cagf(rps, stat);
+
 			intel_gt_pm_put(gt);
 		}
 
-- 
2.24.0

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^ permalink raw reply related	[flat|nested] 24+ messages in thread

* [Intel-gfx] [PATCH 3/4] drm/i915/pmu: Cheat when reading the actual frequency to avoid fw
@ 2019-11-08  8:56   ` Chris Wilson
  0 siblings, 0 replies; 24+ messages in thread
From: Chris Wilson @ 2019-11-08  8:56 UTC (permalink / raw)
  To: intel-gfx

We want to avoid taking forcewake when querying the performance stats,
as we wish to avoid perturbing the system under observation. (And with
the forcewake being kept alive for 1ms after use, sampling the frequency
from a timer keeps forcewake 60% active.)

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
---
 drivers/gpu/drm/i915/i915_pmu.c | 8 ++++++--
 1 file changed, 6 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_pmu.c b/drivers/gpu/drm/i915/i915_pmu.c
index 05395015d1f2..dbde80a376cb 100644
--- a/drivers/gpu/drm/i915/i915_pmu.c
+++ b/drivers/gpu/drm/i915/i915_pmu.c
@@ -366,8 +366,12 @@ frequency_sample(struct intel_gt *gt, unsigned int period_ns)
 
 		val = rps->cur_freq;
 		if (intel_gt_pm_get_if_awake(gt)) {
-			val = intel_uncore_read_notrace(uncore, GEN6_RPSTAT1);
-			val = intel_get_cagf(rps, val);
+			u32 stat;
+
+			stat = intel_uncore_read_fw(uncore, GEN6_RPSTAT1);
+			if (stat)
+				val = intel_get_cagf(rps, stat);
+
 			intel_gt_pm_put(gt);
 		}
 
-- 
2.24.0

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https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply related	[flat|nested] 24+ messages in thread

* [PATCH 4/4] drm/i915/pmu: Only use exclusive mmio access for gen7
@ 2019-11-08  8:56   ` Chris Wilson
  0 siblings, 0 replies; 24+ messages in thread
From: Chris Wilson @ 2019-11-08  8:56 UTC (permalink / raw)
  To: intel-gfx

On gen7, we have to avoid concurrent access to the same mmio cacheline,
and so coordinate all mmio access with the uncore->lock. However, for
pmu, we want to avoid perturbing the system and disabling interrupts
unnecessarily, so restrict the w/a to gen7 where it is requied to
prevent machine hangs.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
---
 drivers/gpu/drm/i915/i915_pmu.c | 11 +++++++++--
 1 file changed, 9 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_pmu.c b/drivers/gpu/drm/i915/i915_pmu.c
index dbde80a376cb..9e1627782284 100644
--- a/drivers/gpu/drm/i915/i915_pmu.c
+++ b/drivers/gpu/drm/i915/i915_pmu.c
@@ -292,6 +292,11 @@ add_sample(struct i915_pmu_sample *sample, u32 val)
 	sample->cur += val;
 }
 
+static bool exclusive_mmio_access(const struct drm_i915_private *i915)
+{
+	return IS_GEN(i915, 7);
+}
+
 static void
 engines_sample(struct intel_gt *gt, unsigned int period_ns)
 {
@@ -311,7 +316,8 @@ engines_sample(struct intel_gt *gt, unsigned int period_ns)
 		if (!intel_engine_pm_get_if_awake(engine))
 			continue;
 
-		spin_lock_irqsave(&engine->uncore->lock, flags);
+		if (exclusive_mmio_access(i915))
+			spin_lock_irqsave(&engine->uncore->lock, flags);
 
 		val = ENGINE_READ_FW(engine, RING_CTL);
 		if (val == 0) /* powerwell off => engine idle */
@@ -342,7 +348,8 @@ engines_sample(struct intel_gt *gt, unsigned int period_ns)
 			add_sample(&pmu->sample[I915_SAMPLE_BUSY], period_ns);
 
 skip:
-		spin_unlock_irqrestore(&engine->uncore->lock, flags);
+		if (exclusive_mmio_access(i915))
+			spin_unlock_irqrestore(&engine->uncore->lock, flags);
 		intel_engine_pm_put(engine);
 	}
 }
-- 
2.24.0

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https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply related	[flat|nested] 24+ messages in thread

* [Intel-gfx] [PATCH 4/4] drm/i915/pmu: Only use exclusive mmio access for gen7
@ 2019-11-08  8:56   ` Chris Wilson
  0 siblings, 0 replies; 24+ messages in thread
From: Chris Wilson @ 2019-11-08  8:56 UTC (permalink / raw)
  To: intel-gfx

On gen7, we have to avoid concurrent access to the same mmio cacheline,
and so coordinate all mmio access with the uncore->lock. However, for
pmu, we want to avoid perturbing the system and disabling interrupts
unnecessarily, so restrict the w/a to gen7 where it is requied to
prevent machine hangs.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
---
 drivers/gpu/drm/i915/i915_pmu.c | 11 +++++++++--
 1 file changed, 9 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_pmu.c b/drivers/gpu/drm/i915/i915_pmu.c
index dbde80a376cb..9e1627782284 100644
--- a/drivers/gpu/drm/i915/i915_pmu.c
+++ b/drivers/gpu/drm/i915/i915_pmu.c
@@ -292,6 +292,11 @@ add_sample(struct i915_pmu_sample *sample, u32 val)
 	sample->cur += val;
 }
 
+static bool exclusive_mmio_access(const struct drm_i915_private *i915)
+{
+	return IS_GEN(i915, 7);
+}
+
 static void
 engines_sample(struct intel_gt *gt, unsigned int period_ns)
 {
@@ -311,7 +316,8 @@ engines_sample(struct intel_gt *gt, unsigned int period_ns)
 		if (!intel_engine_pm_get_if_awake(engine))
 			continue;
 
-		spin_lock_irqsave(&engine->uncore->lock, flags);
+		if (exclusive_mmio_access(i915))
+			spin_lock_irqsave(&engine->uncore->lock, flags);
 
 		val = ENGINE_READ_FW(engine, RING_CTL);
 		if (val == 0) /* powerwell off => engine idle */
@@ -342,7 +348,8 @@ engines_sample(struct intel_gt *gt, unsigned int period_ns)
 			add_sample(&pmu->sample[I915_SAMPLE_BUSY], period_ns);
 
 skip:
-		spin_unlock_irqrestore(&engine->uncore->lock, flags);
+		if (exclusive_mmio_access(i915))
+			spin_unlock_irqrestore(&engine->uncore->lock, flags);
 		intel_engine_pm_put(engine);
 	}
 }
-- 
2.24.0

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^ permalink raw reply related	[flat|nested] 24+ messages in thread

* Re: [PATCH 3/4] drm/i915/pmu: Cheat when reading the actual frequency to avoid fw
@ 2019-11-08  9:05     ` Chris Wilson
  0 siblings, 0 replies; 24+ messages in thread
From: Chris Wilson @ 2019-11-08  9:05 UTC (permalink / raw)
  To: intel-gfx

Quoting Chris Wilson (2019-11-08 08:56:24)
> We want to avoid taking forcewake when querying the performance stats,
> as we wish to avoid perturbing the system under observation. (And with
> the forcewake being kept alive for 1ms after use, sampling the frequency
> from a timer keeps forcewake 60% active.)

Oops, rc6 was reported as 60% active => fw 40% active.
-Chris
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^ permalink raw reply	[flat|nested] 24+ messages in thread

* Re: [Intel-gfx] [PATCH 3/4] drm/i915/pmu: Cheat when reading the actual frequency to avoid fw
@ 2019-11-08  9:05     ` Chris Wilson
  0 siblings, 0 replies; 24+ messages in thread
From: Chris Wilson @ 2019-11-08  9:05 UTC (permalink / raw)
  To: intel-gfx

Quoting Chris Wilson (2019-11-08 08:56:24)
> We want to avoid taking forcewake when querying the performance stats,
> as we wish to avoid perturbing the system under observation. (And with
> the forcewake being kept alive for 1ms after use, sampling the frequency
> from a timer keeps forcewake 60% active.)

Oops, rc6 was reported as 60% active => fw 40% active.
-Chris
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^ permalink raw reply	[flat|nested] 24+ messages in thread

* ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/4] drm/i915/icl: Refine PG_HYSTERESIS
@ 2019-11-08  9:14   ` Patchwork
  0 siblings, 0 replies; 24+ messages in thread
From: Patchwork @ 2019-11-08  9:14 UTC (permalink / raw)
  To: Chris Wilson; +Cc: intel-gfx

== Series Details ==

Series: series starting with [1/4] drm/i915/icl: Refine PG_HYSTERESIS
URL   : https://patchwork.freedesktop.org/series/69181/
State : warning

== Summary ==

$ dim checkpatch origin/drm-tip
e90afdfcc256 drm/i915/icl: Refine PG_HYSTERESIS
9b2231304fc1 drm/i915/execlists: Reduce write flush on context switch to a wmb()
-:12: WARNING:COMMIT_LOG_LONG_LINE: Possible unwrapped commit description (prefer a maximum 75 chars per line)
#12: 
References: cf66b8a0ba14 ("drm/i915/execlists: Apply a full mb before execution for Braswell")

-:12: ERROR:GIT_COMMIT_ID: Please use git commit description style 'commit <12+ chars of sha1> ("<title line>")' - ie: 'commit cf66b8a0ba14 ("drm/i915/execlists: Apply a full mb before execution for Braswell")'
#12: 
References: cf66b8a0ba14 ("drm/i915/execlists: Apply a full mb before execution for Braswell")

-:32: WARNING:MEMORY_BARRIER: memory barrier without comment
#32: FILE: drivers/gpu/drm/i915/gt/intel_lrc.c:1222:
+	wmb();

total: 1 errors, 2 warnings, 0 checks, 14 lines checked
6daf4eb58122 drm/i915/pmu: Cheat when reading the actual frequency to avoid fw
2eb84d65fc46 drm/i915/pmu: Only use exclusive mmio access for gen7

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^ permalink raw reply	[flat|nested] 24+ messages in thread

* [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/4] drm/i915/icl: Refine PG_HYSTERESIS
@ 2019-11-08  9:14   ` Patchwork
  0 siblings, 0 replies; 24+ messages in thread
From: Patchwork @ 2019-11-08  9:14 UTC (permalink / raw)
  To: Chris Wilson; +Cc: intel-gfx

== Series Details ==

Series: series starting with [1/4] drm/i915/icl: Refine PG_HYSTERESIS
URL   : https://patchwork.freedesktop.org/series/69181/
State : warning

== Summary ==

$ dim checkpatch origin/drm-tip
e90afdfcc256 drm/i915/icl: Refine PG_HYSTERESIS
9b2231304fc1 drm/i915/execlists: Reduce write flush on context switch to a wmb()
-:12: WARNING:COMMIT_LOG_LONG_LINE: Possible unwrapped commit description (prefer a maximum 75 chars per line)
#12: 
References: cf66b8a0ba14 ("drm/i915/execlists: Apply a full mb before execution for Braswell")

-:12: ERROR:GIT_COMMIT_ID: Please use git commit description style 'commit <12+ chars of sha1> ("<title line>")' - ie: 'commit cf66b8a0ba14 ("drm/i915/execlists: Apply a full mb before execution for Braswell")'
#12: 
References: cf66b8a0ba14 ("drm/i915/execlists: Apply a full mb before execution for Braswell")

-:32: WARNING:MEMORY_BARRIER: memory barrier without comment
#32: FILE: drivers/gpu/drm/i915/gt/intel_lrc.c:1222:
+	wmb();

total: 1 errors, 2 warnings, 0 checks, 14 lines checked
6daf4eb58122 drm/i915/pmu: Cheat when reading the actual frequency to avoid fw
2eb84d65fc46 drm/i915/pmu: Only use exclusive mmio access for gen7

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^ permalink raw reply	[flat|nested] 24+ messages in thread

* ✗ Fi.CI.SPARSE: warning for series starting with [1/4] drm/i915/icl: Refine PG_HYSTERESIS
@ 2019-11-08  9:15   ` Patchwork
  0 siblings, 0 replies; 24+ messages in thread
From: Patchwork @ 2019-11-08  9:15 UTC (permalink / raw)
  To: Chris Wilson; +Cc: intel-gfx

== Series Details ==

Series: series starting with [1/4] drm/i915/icl: Refine PG_HYSTERESIS
URL   : https://patchwork.freedesktop.org/series/69181/
State : warning

== Summary ==

$ dim sparse origin/drm-tip
Sparse version: v0.6.0
Commit: drm/i915/icl: Refine PG_HYSTERESIS
Okay!

Commit: drm/i915/execlists: Reduce write flush on context switch to a wmb()
Okay!

Commit: drm/i915/pmu: Cheat when reading the actual frequency to avoid fw
Okay!

Commit: drm/i915/pmu: Only use exclusive mmio access for gen7
-
+./include/linux/compiler.h:199:9: warning: context imbalance in 'engines_sample' - different lock contexts for basic block

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 24+ messages in thread

* [Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [1/4] drm/i915/icl: Refine PG_HYSTERESIS
@ 2019-11-08  9:15   ` Patchwork
  0 siblings, 0 replies; 24+ messages in thread
From: Patchwork @ 2019-11-08  9:15 UTC (permalink / raw)
  To: Chris Wilson; +Cc: intel-gfx

== Series Details ==

Series: series starting with [1/4] drm/i915/icl: Refine PG_HYSTERESIS
URL   : https://patchwork.freedesktop.org/series/69181/
State : warning

== Summary ==

$ dim sparse origin/drm-tip
Sparse version: v0.6.0
Commit: drm/i915/icl: Refine PG_HYSTERESIS
Okay!

Commit: drm/i915/execlists: Reduce write flush on context switch to a wmb()
Okay!

Commit: drm/i915/pmu: Cheat when reading the actual frequency to avoid fw
Okay!

Commit: drm/i915/pmu: Only use exclusive mmio access for gen7
-
+./include/linux/compiler.h:199:9: warning: context imbalance in 'engines_sample' - different lock contexts for basic block

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 24+ messages in thread

* ✓ Fi.CI.BAT: success for series starting with [1/4] drm/i915/icl: Refine PG_HYSTERESIS
@ 2019-11-08 10:02   ` Patchwork
  0 siblings, 0 replies; 24+ messages in thread
From: Patchwork @ 2019-11-08 10:02 UTC (permalink / raw)
  To: Chris Wilson; +Cc: intel-gfx

== Series Details ==

Series: series starting with [1/4] drm/i915/icl: Refine PG_HYSTERESIS
URL   : https://patchwork.freedesktop.org/series/69181/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_7293 -> Patchwork_15192
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15192/index.html

Known issues
------------

  Here are the changes found in Patchwork_15192 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@kms_chamelium@hdmi-hpd-fast:
    - fi-icl-u2:          [PASS][1] -> [FAIL][2] ([fdo#109483])
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7293/fi-icl-u2/igt@kms_chamelium@hdmi-hpd-fast.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15192/fi-icl-u2/igt@kms_chamelium@hdmi-hpd-fast.html

  
#### Possible fixes ####

  * igt@gem_exec_create@basic:
    - {fi-tgl-u}:         [INCOMPLETE][3] ([fdo#111736]) -> [PASS][4]
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7293/fi-tgl-u/igt@gem_exec_create@basic.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15192/fi-tgl-u/igt@gem_exec_create@basic.html

  * igt@gem_exec_suspend@basic:
    - fi-icl-u4:          [FAIL][5] ([fdo#111699]) -> [PASS][6]
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7293/fi-icl-u4/igt@gem_exec_suspend@basic.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15192/fi-icl-u4/igt@gem_exec_suspend@basic.html

  * igt@i915_selftest@live_gem_contexts:
    - fi-bsw-nick:        [INCOMPLETE][7] ([fdo# 111542]) -> [PASS][8]
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7293/fi-bsw-nick/igt@i915_selftest@live_gem_contexts.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15192/fi-bsw-nick/igt@i915_selftest@live_gem_contexts.html

  * igt@kms_chamelium@hdmi-hpd-fast:
    - fi-kbl-7500u:       [FAIL][9] ([fdo#111045] / [fdo#111096]) -> [PASS][10]
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7293/fi-kbl-7500u/igt@kms_chamelium@hdmi-hpd-fast.html
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15192/fi-kbl-7500u/igt@kms_chamelium@hdmi-hpd-fast.html

  * igt@kms_flip@basic-flip-vs-modeset:
    - fi-icl-dsi:         [INCOMPLETE][11] ([fdo#107713]) -> [PASS][12]
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7293/fi-icl-dsi/igt@kms_flip@basic-flip-vs-modeset.html
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15192/fi-icl-dsi/igt@kms_flip@basic-flip-vs-modeset.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo# 111542]: https://bugs.freedesktop.org/show_bug.cgi?id= 111542
  [fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713
  [fdo#109483]: https://bugs.freedesktop.org/show_bug.cgi?id=109483
  [fdo#111045]: https://bugs.freedesktop.org/show_bug.cgi?id=111045
  [fdo#111096]: https://bugs.freedesktop.org/show_bug.cgi?id=111096
  [fdo#111699]: https://bugs.freedesktop.org/show_bug.cgi?id=111699
  [fdo#111736]: https://bugs.freedesktop.org/show_bug.cgi?id=111736


Participating hosts (51 -> 45)
------------------------------

  Missing    (6): fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-byt-clapper fi-bdw-samus 


Build changes
-------------

  * CI: CI-20190529 -> None
  * Linux: CI_DRM_7293 -> Patchwork_15192

  CI-20190529: 20190529
  CI_DRM_7293: 6813823479eb5f4cb42be38f40a140152e87b846 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_5267: faeca911dd2b301d32e246f6dad6d2e4e01ab6ac @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_15192: 2eb84d65fc469593f368e08a0060263960957743 @ git://anongit.freedesktop.org/gfx-ci/linux


== Linux commits ==

2eb84d65fc46 drm/i915/pmu: Only use exclusive mmio access for gen7
6daf4eb58122 drm/i915/pmu: Cheat when reading the actual frequency to avoid fw
9b2231304fc1 drm/i915/execlists: Reduce write flush on context switch to a wmb()
e90afdfcc256 drm/i915/icl: Refine PG_HYSTERESIS

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15192/index.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 24+ messages in thread

* [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/4] drm/i915/icl: Refine PG_HYSTERESIS
@ 2019-11-08 10:02   ` Patchwork
  0 siblings, 0 replies; 24+ messages in thread
From: Patchwork @ 2019-11-08 10:02 UTC (permalink / raw)
  To: Chris Wilson; +Cc: intel-gfx

== Series Details ==

Series: series starting with [1/4] drm/i915/icl: Refine PG_HYSTERESIS
URL   : https://patchwork.freedesktop.org/series/69181/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_7293 -> Patchwork_15192
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15192/index.html

Known issues
------------

  Here are the changes found in Patchwork_15192 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@kms_chamelium@hdmi-hpd-fast:
    - fi-icl-u2:          [PASS][1] -> [FAIL][2] ([fdo#109483])
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7293/fi-icl-u2/igt@kms_chamelium@hdmi-hpd-fast.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15192/fi-icl-u2/igt@kms_chamelium@hdmi-hpd-fast.html

  
#### Possible fixes ####

  * igt@gem_exec_create@basic:
    - {fi-tgl-u}:         [INCOMPLETE][3] ([fdo#111736]) -> [PASS][4]
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7293/fi-tgl-u/igt@gem_exec_create@basic.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15192/fi-tgl-u/igt@gem_exec_create@basic.html

  * igt@gem_exec_suspend@basic:
    - fi-icl-u4:          [FAIL][5] ([fdo#111699]) -> [PASS][6]
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7293/fi-icl-u4/igt@gem_exec_suspend@basic.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15192/fi-icl-u4/igt@gem_exec_suspend@basic.html

  * igt@i915_selftest@live_gem_contexts:
    - fi-bsw-nick:        [INCOMPLETE][7] ([fdo# 111542]) -> [PASS][8]
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7293/fi-bsw-nick/igt@i915_selftest@live_gem_contexts.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15192/fi-bsw-nick/igt@i915_selftest@live_gem_contexts.html

  * igt@kms_chamelium@hdmi-hpd-fast:
    - fi-kbl-7500u:       [FAIL][9] ([fdo#111045] / [fdo#111096]) -> [PASS][10]
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7293/fi-kbl-7500u/igt@kms_chamelium@hdmi-hpd-fast.html
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15192/fi-kbl-7500u/igt@kms_chamelium@hdmi-hpd-fast.html

  * igt@kms_flip@basic-flip-vs-modeset:
    - fi-icl-dsi:         [INCOMPLETE][11] ([fdo#107713]) -> [PASS][12]
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7293/fi-icl-dsi/igt@kms_flip@basic-flip-vs-modeset.html
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15192/fi-icl-dsi/igt@kms_flip@basic-flip-vs-modeset.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo# 111542]: https://bugs.freedesktop.org/show_bug.cgi?id= 111542
  [fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713
  [fdo#109483]: https://bugs.freedesktop.org/show_bug.cgi?id=109483
  [fdo#111045]: https://bugs.freedesktop.org/show_bug.cgi?id=111045
  [fdo#111096]: https://bugs.freedesktop.org/show_bug.cgi?id=111096
  [fdo#111699]: https://bugs.freedesktop.org/show_bug.cgi?id=111699
  [fdo#111736]: https://bugs.freedesktop.org/show_bug.cgi?id=111736


Participating hosts (51 -> 45)
------------------------------

  Missing    (6): fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-byt-clapper fi-bdw-samus 


Build changes
-------------

  * CI: CI-20190529 -> None
  * Linux: CI_DRM_7293 -> Patchwork_15192

  CI-20190529: 20190529
  CI_DRM_7293: 6813823479eb5f4cb42be38f40a140152e87b846 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_5267: faeca911dd2b301d32e246f6dad6d2e4e01ab6ac @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_15192: 2eb84d65fc469593f368e08a0060263960957743 @ git://anongit.freedesktop.org/gfx-ci/linux


== Linux commits ==

2eb84d65fc46 drm/i915/pmu: Only use exclusive mmio access for gen7
6daf4eb58122 drm/i915/pmu: Cheat when reading the actual frequency to avoid fw
9b2231304fc1 drm/i915/execlists: Reduce write flush on context switch to a wmb()
e90afdfcc256 drm/i915/icl: Refine PG_HYSTERESIS

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15192/index.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 24+ messages in thread

* Re: [PATCH 3/4] drm/i915/pmu: Cheat when reading the actual frequency to avoid fw
@ 2019-11-08 10:19     ` Tvrtko Ursulin
  0 siblings, 0 replies; 24+ messages in thread
From: Tvrtko Ursulin @ 2019-11-08 10:19 UTC (permalink / raw)
  To: Chris Wilson, intel-gfx


On 08/11/2019 08:56, Chris Wilson wrote:
> We want to avoid taking forcewake when querying the performance stats,
> as we wish to avoid perturbing the system under observation. (And with
> the forcewake being kept alive for 1ms after use, sampling the frequency
> from a timer keeps forcewake 60% active.)
> 
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
> ---
>   drivers/gpu/drm/i915/i915_pmu.c | 8 ++++++--
>   1 file changed, 6 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_pmu.c b/drivers/gpu/drm/i915/i915_pmu.c
> index 05395015d1f2..dbde80a376cb 100644
> --- a/drivers/gpu/drm/i915/i915_pmu.c
> +++ b/drivers/gpu/drm/i915/i915_pmu.c
> @@ -366,8 +366,12 @@ frequency_sample(struct intel_gt *gt, unsigned int period_ns)
>   
>   		val = rps->cur_freq;
>   		if (intel_gt_pm_get_if_awake(gt)) {
> -			val = intel_uncore_read_notrace(uncore, GEN6_RPSTAT1);
> -			val = intel_get_cagf(rps, val);
> +			u32 stat;
> +
> +			stat = intel_uncore_read_fw(uncore, GEN6_RPSTAT1);
> +			if (stat)
> +				val = intel_get_cagf(rps, stat);
> +
>   			intel_gt_pm_put(gt);
>   		}
>   
> 

Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>

Regards,

Tvrtko
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 24+ messages in thread

* Re: [Intel-gfx] [PATCH 3/4] drm/i915/pmu: Cheat when reading the actual frequency to avoid fw
@ 2019-11-08 10:19     ` Tvrtko Ursulin
  0 siblings, 0 replies; 24+ messages in thread
From: Tvrtko Ursulin @ 2019-11-08 10:19 UTC (permalink / raw)
  To: Chris Wilson, intel-gfx


On 08/11/2019 08:56, Chris Wilson wrote:
> We want to avoid taking forcewake when querying the performance stats,
> as we wish to avoid perturbing the system under observation. (And with
> the forcewake being kept alive for 1ms after use, sampling the frequency
> from a timer keeps forcewake 60% active.)
> 
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
> ---
>   drivers/gpu/drm/i915/i915_pmu.c | 8 ++++++--
>   1 file changed, 6 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_pmu.c b/drivers/gpu/drm/i915/i915_pmu.c
> index 05395015d1f2..dbde80a376cb 100644
> --- a/drivers/gpu/drm/i915/i915_pmu.c
> +++ b/drivers/gpu/drm/i915/i915_pmu.c
> @@ -366,8 +366,12 @@ frequency_sample(struct intel_gt *gt, unsigned int period_ns)
>   
>   		val = rps->cur_freq;
>   		if (intel_gt_pm_get_if_awake(gt)) {
> -			val = intel_uncore_read_notrace(uncore, GEN6_RPSTAT1);
> -			val = intel_get_cagf(rps, val);
> +			u32 stat;
> +
> +			stat = intel_uncore_read_fw(uncore, GEN6_RPSTAT1);
> +			if (stat)
> +				val = intel_get_cagf(rps, stat);
> +
>   			intel_gt_pm_put(gt);
>   		}
>   
> 

Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>

Regards,

Tvrtko
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 24+ messages in thread

* Re: [PATCH 4/4] drm/i915/pmu: Only use exclusive mmio access for gen7
@ 2019-11-08 10:21     ` Tvrtko Ursulin
  0 siblings, 0 replies; 24+ messages in thread
From: Tvrtko Ursulin @ 2019-11-08 10:21 UTC (permalink / raw)
  To: Chris Wilson, intel-gfx


On 08/11/2019 08:56, Chris Wilson wrote:
> On gen7, we have to avoid concurrent access to the same mmio cacheline,
> and so coordinate all mmio access with the uncore->lock. However, for
> pmu, we want to avoid perturbing the system and disabling interrupts
> unnecessarily, so restrict the w/a to gen7 where it is requied to
> prevent machine hangs.
> 
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
> ---
>   drivers/gpu/drm/i915/i915_pmu.c | 11 +++++++++--
>   1 file changed, 9 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_pmu.c b/drivers/gpu/drm/i915/i915_pmu.c
> index dbde80a376cb..9e1627782284 100644
> --- a/drivers/gpu/drm/i915/i915_pmu.c
> +++ b/drivers/gpu/drm/i915/i915_pmu.c
> @@ -292,6 +292,11 @@ add_sample(struct i915_pmu_sample *sample, u32 val)
>   	sample->cur += val;
>   }
>   
> +static bool exclusive_mmio_access(const struct drm_i915_private *i915)
> +{
> +	return IS_GEN(i915, 7);
> +}
> +
>   static void
>   engines_sample(struct intel_gt *gt, unsigned int period_ns)
>   {
> @@ -311,7 +316,8 @@ engines_sample(struct intel_gt *gt, unsigned int period_ns)
>   		if (!intel_engine_pm_get_if_awake(engine))
>   			continue;
>   
> -		spin_lock_irqsave(&engine->uncore->lock, flags);
> +		if (exclusive_mmio_access(i915))
> +			spin_lock_irqsave(&engine->uncore->lock, flags);
>   
>   		val = ENGINE_READ_FW(engine, RING_CTL);
>   		if (val == 0) /* powerwell off => engine idle */
> @@ -342,7 +348,8 @@ engines_sample(struct intel_gt *gt, unsigned int period_ns)
>   			add_sample(&pmu->sample[I915_SAMPLE_BUSY], period_ns);
>   
>   skip:
> -		spin_unlock_irqrestore(&engine->uncore->lock, flags);
> +		if (exclusive_mmio_access(i915))
> +			spin_unlock_irqrestore(&engine->uncore->lock, flags);
>   		intel_engine_pm_put(engine);
>   	}
>   }
> 

For bonus points cache the check in a local? Or cache the lock in a 
local for even more win, spinlock_t *lock = exclusive_mmio_access(..) ? 
&.. : NULL ?

Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>

Regards,

Tvrtko
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 24+ messages in thread

* Re: [Intel-gfx] [PATCH 4/4] drm/i915/pmu: Only use exclusive mmio access for gen7
@ 2019-11-08 10:21     ` Tvrtko Ursulin
  0 siblings, 0 replies; 24+ messages in thread
From: Tvrtko Ursulin @ 2019-11-08 10:21 UTC (permalink / raw)
  To: Chris Wilson, intel-gfx


On 08/11/2019 08:56, Chris Wilson wrote:
> On gen7, we have to avoid concurrent access to the same mmio cacheline,
> and so coordinate all mmio access with the uncore->lock. However, for
> pmu, we want to avoid perturbing the system and disabling interrupts
> unnecessarily, so restrict the w/a to gen7 where it is requied to
> prevent machine hangs.
> 
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
> ---
>   drivers/gpu/drm/i915/i915_pmu.c | 11 +++++++++--
>   1 file changed, 9 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_pmu.c b/drivers/gpu/drm/i915/i915_pmu.c
> index dbde80a376cb..9e1627782284 100644
> --- a/drivers/gpu/drm/i915/i915_pmu.c
> +++ b/drivers/gpu/drm/i915/i915_pmu.c
> @@ -292,6 +292,11 @@ add_sample(struct i915_pmu_sample *sample, u32 val)
>   	sample->cur += val;
>   }
>   
> +static bool exclusive_mmio_access(const struct drm_i915_private *i915)
> +{
> +	return IS_GEN(i915, 7);
> +}
> +
>   static void
>   engines_sample(struct intel_gt *gt, unsigned int period_ns)
>   {
> @@ -311,7 +316,8 @@ engines_sample(struct intel_gt *gt, unsigned int period_ns)
>   		if (!intel_engine_pm_get_if_awake(engine))
>   			continue;
>   
> -		spin_lock_irqsave(&engine->uncore->lock, flags);
> +		if (exclusive_mmio_access(i915))
> +			spin_lock_irqsave(&engine->uncore->lock, flags);
>   
>   		val = ENGINE_READ_FW(engine, RING_CTL);
>   		if (val == 0) /* powerwell off => engine idle */
> @@ -342,7 +348,8 @@ engines_sample(struct intel_gt *gt, unsigned int period_ns)
>   			add_sample(&pmu->sample[I915_SAMPLE_BUSY], period_ns);
>   
>   skip:
> -		spin_unlock_irqrestore(&engine->uncore->lock, flags);
> +		if (exclusive_mmio_access(i915))
> +			spin_unlock_irqrestore(&engine->uncore->lock, flags);
>   		intel_engine_pm_put(engine);
>   	}
>   }
> 

For bonus points cache the check in a local? Or cache the lock in a 
local for even more win, spinlock_t *lock = exclusive_mmio_access(..) ? 
&.. : NULL ?

Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>

Regards,

Tvrtko
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 24+ messages in thread

* Re: [PATCH 4/4] drm/i915/pmu: Only use exclusive mmio access for gen7
@ 2019-11-08 10:28       ` Chris Wilson
  0 siblings, 0 replies; 24+ messages in thread
From: Chris Wilson @ 2019-11-08 10:28 UTC (permalink / raw)
  To: Tvrtko Ursulin, intel-gfx

Quoting Tvrtko Ursulin (2019-11-08 10:21:22)
> 
> On 08/11/2019 08:56, Chris Wilson wrote:
> > On gen7, we have to avoid concurrent access to the same mmio cacheline,
> > and so coordinate all mmio access with the uncore->lock. However, for
> > pmu, we want to avoid perturbing the system and disabling interrupts
> > unnecessarily, so restrict the w/a to gen7 where it is requied to
> > prevent machine hangs.
> > 
> > Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> > Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
> > ---
> >   drivers/gpu/drm/i915/i915_pmu.c | 11 +++++++++--
> >   1 file changed, 9 insertions(+), 2 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/i915_pmu.c b/drivers/gpu/drm/i915/i915_pmu.c
> > index dbde80a376cb..9e1627782284 100644
> > --- a/drivers/gpu/drm/i915/i915_pmu.c
> > +++ b/drivers/gpu/drm/i915/i915_pmu.c
> > @@ -292,6 +292,11 @@ add_sample(struct i915_pmu_sample *sample, u32 val)
> >       sample->cur += val;
> >   }
> >   
> > +static bool exclusive_mmio_access(const struct drm_i915_private *i915)
> > +{
> > +     return IS_GEN(i915, 7);
> > +}
> > +
> >   static void
> >   engines_sample(struct intel_gt *gt, unsigned int period_ns)
> >   {
> > @@ -311,7 +316,8 @@ engines_sample(struct intel_gt *gt, unsigned int period_ns)
> >               if (!intel_engine_pm_get_if_awake(engine))
> >                       continue;
> >   
> > -             spin_lock_irqsave(&engine->uncore->lock, flags);
> > +             if (exclusive_mmio_access(i915))
> > +                     spin_lock_irqsave(&engine->uncore->lock, flags);
> >   
> >               val = ENGINE_READ_FW(engine, RING_CTL);
> >               if (val == 0) /* powerwell off => engine idle */
> > @@ -342,7 +348,8 @@ engines_sample(struct intel_gt *gt, unsigned int period_ns)
> >                       add_sample(&pmu->sample[I915_SAMPLE_BUSY], period_ns);
> >   
> >   skip:
> > -             spin_unlock_irqrestore(&engine->uncore->lock, flags);
> > +             if (exclusive_mmio_access(i915))
> > +                     spin_unlock_irqrestore(&engine->uncore->lock, flags);
> >               intel_engine_pm_put(engine);
> >       }
> >   }
> > 
> 
> For bonus points cache the check in a local? Or cache the lock in a 
> local for even more win, spinlock_t *lock = exclusive_mmio_access(..) ? 
> &.. : NULL ?

In the back of my mind, I was assuming that IS_GEN() gets compiled out
for single sku builds.

lock = exclusive_mmio_access() ...

if (lock)
	spin_lock_irqsave(lock, flags);
...
if (lock)
	spin_unlock_irqsave(lock, flags);

Ok.
-Chris
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 24+ messages in thread

* Re: [Intel-gfx] [PATCH 4/4] drm/i915/pmu: Only use exclusive mmio access for gen7
@ 2019-11-08 10:28       ` Chris Wilson
  0 siblings, 0 replies; 24+ messages in thread
From: Chris Wilson @ 2019-11-08 10:28 UTC (permalink / raw)
  To: Tvrtko Ursulin, intel-gfx

Quoting Tvrtko Ursulin (2019-11-08 10:21:22)
> 
> On 08/11/2019 08:56, Chris Wilson wrote:
> > On gen7, we have to avoid concurrent access to the same mmio cacheline,
> > and so coordinate all mmio access with the uncore->lock. However, for
> > pmu, we want to avoid perturbing the system and disabling interrupts
> > unnecessarily, so restrict the w/a to gen7 where it is requied to
> > prevent machine hangs.
> > 
> > Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> > Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
> > ---
> >   drivers/gpu/drm/i915/i915_pmu.c | 11 +++++++++--
> >   1 file changed, 9 insertions(+), 2 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/i915_pmu.c b/drivers/gpu/drm/i915/i915_pmu.c
> > index dbde80a376cb..9e1627782284 100644
> > --- a/drivers/gpu/drm/i915/i915_pmu.c
> > +++ b/drivers/gpu/drm/i915/i915_pmu.c
> > @@ -292,6 +292,11 @@ add_sample(struct i915_pmu_sample *sample, u32 val)
> >       sample->cur += val;
> >   }
> >   
> > +static bool exclusive_mmio_access(const struct drm_i915_private *i915)
> > +{
> > +     return IS_GEN(i915, 7);
> > +}
> > +
> >   static void
> >   engines_sample(struct intel_gt *gt, unsigned int period_ns)
> >   {
> > @@ -311,7 +316,8 @@ engines_sample(struct intel_gt *gt, unsigned int period_ns)
> >               if (!intel_engine_pm_get_if_awake(engine))
> >                       continue;
> >   
> > -             spin_lock_irqsave(&engine->uncore->lock, flags);
> > +             if (exclusive_mmio_access(i915))
> > +                     spin_lock_irqsave(&engine->uncore->lock, flags);
> >   
> >               val = ENGINE_READ_FW(engine, RING_CTL);
> >               if (val == 0) /* powerwell off => engine idle */
> > @@ -342,7 +348,8 @@ engines_sample(struct intel_gt *gt, unsigned int period_ns)
> >                       add_sample(&pmu->sample[I915_SAMPLE_BUSY], period_ns);
> >   
> >   skip:
> > -             spin_unlock_irqrestore(&engine->uncore->lock, flags);
> > +             if (exclusive_mmio_access(i915))
> > +                     spin_unlock_irqrestore(&engine->uncore->lock, flags);
> >               intel_engine_pm_put(engine);
> >       }
> >   }
> > 
> 
> For bonus points cache the check in a local? Or cache the lock in a 
> local for even more win, spinlock_t *lock = exclusive_mmio_access(..) ? 
> &.. : NULL ?

In the back of my mind, I was assuming that IS_GEN() gets compiled out
for single sku builds.

lock = exclusive_mmio_access() ...

if (lock)
	spin_lock_irqsave(lock, flags);
...
if (lock)
	spin_unlock_irqsave(lock, flags);

Ok.
-Chris
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 24+ messages in thread

* ✗ Fi.CI.IGT: failure for series starting with [1/4] drm/i915/icl: Refine PG_HYSTERESIS
@ 2019-11-09 18:48   ` Patchwork
  0 siblings, 0 replies; 24+ messages in thread
From: Patchwork @ 2019-11-09 18:48 UTC (permalink / raw)
  To: Chris Wilson; +Cc: intel-gfx

== Series Details ==

Series: series starting with [1/4] drm/i915/icl: Refine PG_HYSTERESIS
URL   : https://patchwork.freedesktop.org/series/69181/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_7293_full -> Patchwork_15192_full
====================================================

Summary
-------

  **FAILURE**

  Serious unknown changes coming with Patchwork_15192_full absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_15192_full, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in Patchwork_15192_full:

### IGT changes ###

#### Possible regressions ####

  * igt@i915_pm_dc@dc5-dpms:
    - shard-iclb:         [PASS][1] -> [FAIL][2] +1 similar issue
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7293/shard-iclb2/igt@i915_pm_dc@dc5-dpms.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15192/shard-iclb3/igt@i915_pm_dc@dc5-dpms.html

  
Known issues
------------

  Here are the changes found in Patchwork_15192_full that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@gem_ctx_isolation@bcs0-s3:
    - shard-tglb:         [PASS][3] -> [INCOMPLETE][4] ([fdo#111832]) +2 similar issues
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7293/shard-tglb5/igt@gem_ctx_isolation@bcs0-s3.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15192/shard-tglb4/igt@gem_ctx_isolation@bcs0-s3.html

  * igt@gem_ctx_persistence@vcs1-queued:
    - shard-iclb:         [PASS][5] -> [SKIP][6] ([fdo#109276] / [fdo#112080]) +3 similar issues
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7293/shard-iclb1/igt@gem_ctx_persistence@vcs1-queued.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15192/shard-iclb6/igt@gem_ctx_persistence@vcs1-queued.html

  * igt@gem_ctx_shared@exec-single-timeline-bsd:
    - shard-iclb:         [PASS][7] -> [SKIP][8] ([fdo#110841])
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7293/shard-iclb6/igt@gem_ctx_shared@exec-single-timeline-bsd.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15192/shard-iclb2/igt@gem_ctx_shared@exec-single-timeline-bsd.html

  * igt@gem_ctx_switch@vcs1:
    - shard-iclb:         [PASS][9] -> [SKIP][10] ([fdo#112080]) +17 similar issues
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7293/shard-iclb1/igt@gem_ctx_switch@vcs1.html
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15192/shard-iclb6/igt@gem_ctx_switch@vcs1.html

  * igt@gem_eio@in-flight-suspend:
    - shard-tglb:         [PASS][11] -> [INCOMPLETE][12] ([fdo#111832] / [fdo#111850] / [fdo#112081])
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7293/shard-tglb8/igt@gem_eio@in-flight-suspend.html
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15192/shard-tglb3/igt@gem_eio@in-flight-suspend.html

  * igt@gem_exec_balancer@smoke:
    - shard-iclb:         [PASS][13] -> [SKIP][14] ([fdo#110854])
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7293/shard-iclb2/igt@gem_exec_balancer@smoke.html
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15192/shard-iclb3/igt@gem_exec_balancer@smoke.html

  * igt@gem_exec_create@madvise:
    - shard-tglb:         [PASS][15] -> [INCOMPLETE][16] ([fdo#111747])
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7293/shard-tglb9/igt@gem_exec_create@madvise.html
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15192/shard-tglb6/igt@gem_exec_create@madvise.html

  * igt@gem_exec_gttfill@basic:
    - shard-tglb:         [PASS][17] -> [INCOMPLETE][18] ([fdo#111593])
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7293/shard-tglb1/igt@gem_exec_gttfill@basic.html
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15192/shard-tglb3/igt@gem_exec_gttfill@basic.html

  * igt@gem_exec_schedule@preempt-queue-bsd1:
    - shard-iclb:         [PASS][19] -> [SKIP][20] ([fdo#109276]) +9 similar issues
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7293/shard-iclb4/igt@gem_exec_schedule@preempt-queue-bsd1.html
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15192/shard-iclb3/igt@gem_exec_schedule@preempt-queue-bsd1.html

  * igt@gem_exec_schedule@reorder-wide-bsd:
    - shard-iclb:         [PASS][21] -> [SKIP][22] ([fdo#112146]) +6 similar issues
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7293/shard-iclb6/igt@gem_exec_schedule@reorder-wide-bsd.html
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15192/shard-iclb1/igt@gem_exec_schedule@reorder-wide-bsd.html

  * igt@gem_persistent_relocs@forked-interruptible-thrashing:
    - shard-apl:          [PASS][23] -> [FAIL][24] ([fdo#112037])
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7293/shard-apl2/igt@gem_persistent_relocs@forked-interruptible-thrashing.html
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15192/shard-apl8/igt@gem_persistent_relocs@forked-interruptible-thrashing.html

  * igt@gem_softpin@noreloc-s3:
    - shard-snb:          [PASS][25] -> [DMESG-WARN][26] ([fdo#102365])
   [25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7293/shard-snb6/igt@gem_softpin@noreloc-s3.html
   [26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15192/shard-snb4/igt@gem_softpin@noreloc-s3.html

  * igt@gem_workarounds@suspend-resume-context:
    - shard-apl:          [PASS][27] -> [DMESG-WARN][28] ([fdo#108566]) +2 similar issues
   [27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7293/shard-apl1/igt@gem_workarounds@suspend-resume-context.html
   [28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15192/shard-apl4/igt@gem_workarounds@suspend-resume-context.html

  * igt@i915_selftest@live_hangcheck:
    - shard-hsw:          [PASS][29] -> [DMESG-FAIL][30] ([fdo#111991])
   [29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7293/shard-hsw2/igt@i915_selftest@live_hangcheck.html
   [30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15192/shard-hsw5/igt@i915_selftest@live_hangcheck.html

  * igt@i915_selftest@live_requests:
    - shard-tglb:         [PASS][31] -> [INCOMPLETE][32] ([fdo#112057])
   [31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7293/shard-tglb7/igt@i915_selftest@live_requests.html
   [32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15192/shard-tglb6/igt@i915_selftest@live_requests.html

  * igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions:
    - shard-skl:          [PASS][33] -> [FAIL][34] ([fdo#102670] / [fdo#106081])
   [33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7293/shard-skl2/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html
   [34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15192/shard-skl3/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html

  * igt@kms_fbcon_fbt@psr-suspend:
    - shard-skl:          [PASS][35] -> [DMESG-WARN][36] ([fdo#106107])
   [35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7293/shard-skl6/igt@kms_fbcon_fbt@psr-suspend.html
   [36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15192/shard-skl5/igt@kms_fbcon_fbt@psr-suspend.html

  * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-mmap-cpu:
    - shard-iclb:         [PASS][37] -> [FAIL][38] ([fdo#103167]) +3 similar issues
   [37]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7293/shard-iclb8/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-mmap-cpu.html
   [38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15192/shard-iclb5/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-mmap-cpu.html

  * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-indfb-msflip-blt:
    - shard-tglb:         [PASS][39] -> [FAIL][40] ([fdo#103167]) +4 similar issues
   [39]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7293/shard-tglb1/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-indfb-msflip-blt.html
   [40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15192/shard-tglb2/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-indfb-msflip-blt.html

  * igt@kms_frontbuffer_tracking@fbcpsr-1p-rte:
    - shard-iclb:         [PASS][41] -> [FAIL][42] ([fdo#103167] / [fdo#110378])
   [41]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7293/shard-iclb5/igt@kms_frontbuffer_tracking@fbcpsr-1p-rte.html
   [42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15192/shard-iclb6/igt@kms_frontbuffer_tracking@fbcpsr-1p-rte.html

  * igt@kms_frontbuffer_tracking@fbcpsr-suspend:
    - shard-tglb:         [PASS][43] -> [INCOMPLETE][44] ([fdo#111832] / [fdo#111850] / [fdo#111884])
   [43]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7293/shard-tglb6/igt@kms_frontbuffer_tracking@fbcpsr-suspend.html
   [44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15192/shard-tglb5/igt@kms_frontbuffer_tracking@fbcpsr-suspend.html

  * igt@kms_plane@plane-panning-bottom-right-suspend-pipe-a-planes:
    - shard-tglb:         [PASS][45] -> [INCOMPLETE][46] ([fdo#111832] / [fdo#111850]) +3 similar issues
   [45]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7293/shard-tglb9/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-a-planes.html
   [46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15192/shard-tglb1/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-a-planes.html

  * igt@kms_plane@plane-panning-bottom-right-suspend-pipe-b-planes:
    - shard-kbl:          [PASS][47] -> [DMESG-WARN][48] ([fdo#108566]) +6 similar issues
   [47]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7293/shard-kbl4/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-b-planes.html
   [48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15192/shard-kbl1/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-b-planes.html

  * igt@kms_psr@psr2_cursor_blt:
    - shard-iclb:         [PASS][49] -> [SKIP][50] ([fdo#109441]) +1 similar issue
   [49]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7293/shard-iclb2/igt@kms_psr@psr2_cursor_blt.html
   [50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15192/shard-iclb6/igt@kms_psr@psr2_cursor_blt.html

  
#### Possible fixes ####

  * igt@gem_ctx_isolation@bcs0-s3:
    - shard-skl:          [INCOMPLETE][51] ([fdo#104108]) -> [PASS][52] +1 similar issue
   [51]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7293/shard-skl10/igt@gem_ctx_isolation@bcs0-s3.html
   [52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15192/shard-skl10/igt@gem_ctx_isolation@bcs0-s3.html

  * igt@gem_ctx_isolation@rcs0-s3:
    - shard-kbl:          [DMESG-WARN][53] ([fdo#108566]) -> [PASS][54] +8 similar issues
   [53]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7293/shard-kbl4/igt@gem_ctx_isolation@rcs0-s3.html
   [54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15192/shard-kbl1/igt@gem_ctx_isolation@rcs0-s3.html

  * igt@gem_ctx_isolation@vcs1-s3:
    - shard-tglb:         [INCOMPLETE][55] ([fdo#111832]) -> [PASS][56]
   [55]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7293/shard-tglb8/igt@gem_ctx_isolation@vcs1-s3.html
   [56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15192/shard-tglb7/igt@gem_ctx_isolation@vcs1-s3.html

  * igt@gem_ctx_persistence@smoketest:
    - shard-tglb:         [DMESG-WARN][57] -> [PASS][58]
   [57]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7293/shard-tglb8/igt@gem_ctx_persistence@smoketest.html
   [58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15192/shard-tglb1/igt@gem_ctx_persistence@smoketest.html
    - shard-iclb:         [DMESG-WARN][59] -> [PASS][60]
   [59]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7293/shard-iclb2/igt@gem_ctx_persistence@smoketest.html
   [60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15192/shard-iclb6/igt@gem_ctx_persistence@smoketest.html

  * igt@gem_ctx_persistence@vcs1-mixed-process:
    - shard-iclb:         [SKIP][61] ([fdo#109276] / [fdo#112080]) -> [PASS][62] +2 similar issues
   [61]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7293/shard-iclb6/igt@gem_ctx_persistence@vcs1-mixed-process.html
   [62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15192/shard-iclb2/igt@gem_ctx_persistence@vcs1-mixed-process.html

  * igt@gem_exec_balancer@smoke:
    - shard-tglb:         [INCOMPLETE][63] ([fdo#111593]) -> [PASS][64]
   [63]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7293/shard-tglb6/igt@gem_exec_balancer@smoke.html
   [64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15192/shard-tglb3/igt@gem_exec_balancer@smoke.html

  * igt@gem_exec_parallel@vcs1-fds:
    - shard-iclb:         [SKIP][65] ([fdo#112080]) -> [PASS][66] +9 similar issues
   [65]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7293/shard-iclb6/igt@gem_exec_parallel@vcs1-fds.html
   [66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15192/shard-iclb1/igt@gem_exec_parallel@vcs1-fds.html

  * igt@gem_exec_schedule@in-order-bsd:
    - shard-iclb:         [SKIP][67] ([fdo#112146]) -> [PASS][68] +6 similar issues
   [67]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7293/shard-iclb1/igt@gem_exec_schedule@in-order-bsd.html
   [68]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15192/shard-iclb8/igt@gem_exec_schedule@in-order-bsd.html

  * igt@gem_partial_pwrite_pread@write:
    - shard-snb:          [INCOMPLETE][69] ([fdo#105411]) -> [PASS][70]
   [69]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7293/shard-snb2/igt@gem_partial_pwrite_pread@write.html
   [70]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15192/shard-snb1/igt@gem_partial_pwrite_pread@write.html

  * igt@gem_userptr_blits@dmabuf-unsync:
    - shard-hsw:          [DMESG-WARN][71] ([fdo#111870]) -> [PASS][72]
   [71]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7293/shard-hsw6/igt@gem_userptr_blits@dmabuf-unsync.html
   [72]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15192/shard-hsw6/igt@gem_userptr_blits@dmabuf-unsync.html

  * igt@i915_suspend@fence-restore-tiled2untiled:
    - shard-tglb:         [INCOMPLETE][73] ([fdo#111832] / [fdo#111850]) -> [PASS][74] +3 similar issues
   [73]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7293/shard-tglb2/igt@i915_suspend@fence-restore-tiled2untiled.html
   [74]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15192/shard-tglb4/igt@i915_suspend@fence-restore-tiled2untiled.html

  * igt@kms_color@pipe-a-ctm-max:
    - shard-skl:          [FAIL][75] ([fdo#108147]) -> [PASS][76]
   [75]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7293/shard-skl7/igt@kms_color@pipe-a-ctm-max.html
   [76]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15192/shard-skl7/igt@kms_color@pipe-a-ctm-max.html

  * igt@kms_cursor_crc@pipe-b-cursor-suspend:
    - shard-apl:          [DMESG-WARN][77] ([fdo#108566]) -> [PASS][78] +1 similar issue
   [77]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7293/shard-apl6/igt@kms_cursor_crc@pipe-b-cursor-suspend.html
   [78]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15192/shard-apl1/igt@kms_cursor_crc@pipe-b-cursor-suspend.html

  * igt@kms_flip@flip-vs-expired-vblank-interruptible:
    - shard-glk:          [FAIL][79] ([fdo#105363]) -> [PASS][80]
   [79]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7293/shard-glk5/igt@kms_flip@flip-vs-expired-vblank-interruptible.html
   [80]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15192/shard-glk4/igt@kms_flip@flip-vs-expired-vblank-interruptible.html

  * igt@kms_flip@flip-vs-suspend-interruptible:
    - shard-hsw:          [INCOMPLETE][81] ([fdo#103540]) -> [PASS][82] +1 similar issue
   [81]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7293/shard-hsw5/igt@kms_flip@flip-vs-suspend-interruptible.html
   [82]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15192/shard-hsw2/igt@kms_flip@flip-vs-suspend-interruptible.html

  * igt@kms_frontbuffer_tracking@fbc-suspend:
    - shard-tglb:         [INCOMPLETE][83] ([fdo#111832] / [fdo#111850] / [fdo#111884]) -> [PASS][84]
   [83]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7293/shard-tglb7/igt@kms_frontbuffer_tracking@fbc-suspend.html
   [84]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15192/shard-tglb2/igt@kms_frontbuffer_tracking@fbc-suspend.html

  * igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-cur-indfb-draw-render:
    - shard-iclb:         [FAIL][85] ([fdo#103167]) -> [PASS][86] +2 similar issues
   [85]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7293/shard-iclb1/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-cur-indfb-draw-render.html
   [86]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15192/shard-iclb6/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-cur-indfb-draw-render.html

  * igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-cur-indfb-move:
    - shard-tglb:         [FAIL][87] ([fdo#103167]) -> [PASS][88] +1 similar issue
   [87]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7293/shard-tglb4/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-cur-indfb-move.html
   [88]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15192/shard-tglb4/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-cur-indfb-move.html

  * igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min:
    - shard-skl:          [FAIL][89] ([fdo#108145]) -> [PASS][90]
   [89]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7293/shard-skl7/igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min.html
   [90]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15192/shard-skl7/igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min.html

  * igt@kms_psr@psr2_sprite_plane_move:
    - shard-iclb:         [SKIP][91] ([fdo#109441]) -> [PASS][92] +2 similar issues
   [91]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7293/shard-iclb6/igt@kms_psr@psr2_sprite_plane_move.html
   [92]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15192/shard-iclb2/igt@kms_psr@psr2_sprite_plane_move.html

  * igt@kms_vblank@pipe-b-wait-busy-hang:
    - shard-snb:          [SKIP][93] ([fdo#109271]) -> [PASS][94] +2 similar issues
   [93]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7293/shard-snb2/igt@kms_vblank@pipe-b-wait-busy-hang.html
   [94]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15192/shard-snb5/igt@kms_vblank@pipe-b-wait-busy-hang.html

  * igt@prime_busy@hang-bsd2:
    - shard-iclb:         [SKIP][95] ([fdo#109276]) -> [PASS][96] +13 similar issues
   [95]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7293/shard-iclb6/igt@prime_busy@hang-bsd2.html
   [96]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15192/shard-iclb1/igt@prime_busy@hang-bsd2.html

  
#### Warnings ####

  * igt@gem_ctx_isolation@vcs2-dirty-create:
    - shard-tglb:         [SKIP][97] ([fdo#112080]) -> [SKIP][98] ([fdo#111912] / [fdo#112080])
   [97]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7293/shard-tglb9/igt@gem_ctx_isolation@vcs2-dirty-create.html
   [98]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15192/shard-tglb1/igt@gem_ctx_isolation@vcs2-dirty-create.html

  * igt@gem_exec_schedule@deep-bsd2:
    - shard-tglb:         [FAIL][99] ([fdo#111646]) -> [INCOMPLETE][100] ([fdo#111671])
   [99]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7293/shard-tglb3/igt@gem_exec_schedule@deep-bsd2.html
   [100]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15192/shard-tglb2/igt@gem_exec_schedule@deep-bsd2.html

  * igt@gem_exec_schedule@deep-vebox:
    - shard-tglb:         [INCOMPLETE][101] ([fdo#111671]) -> [FAIL][102] ([fdo#111646])
   [101]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7293/shard-tglb2/igt@gem_exec_schedule@deep-vebox.html
   [102]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15192/shard-tglb8/igt@gem_exec_schedule@deep-vebox.html

  * igt@gem_mocs_settings@mocs-reset-bsd2:
    - shard-iclb:         [SKIP][103] ([fdo#109276]) -> [FAIL][104] ([fdo#111330]) +1 similar issue
   [103]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7293/shard-iclb6/igt@gem_mocs_settings@mocs-reset-bsd2.html
   [104]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15192/shard-iclb2/igt@gem_mocs_settings@mocs-reset-bsd2.html

  * igt@gem_mocs_settings@mocs-settings-bsd2:
    - shard-iclb:         [FAIL]

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15192/index.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 24+ messages in thread

* [Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [1/4] drm/i915/icl: Refine PG_HYSTERESIS
@ 2019-11-09 18:48   ` Patchwork
  0 siblings, 0 replies; 24+ messages in thread
From: Patchwork @ 2019-11-09 18:48 UTC (permalink / raw)
  To: Chris Wilson; +Cc: intel-gfx

== Series Details ==

Series: series starting with [1/4] drm/i915/icl: Refine PG_HYSTERESIS
URL   : https://patchwork.freedesktop.org/series/69181/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_7293_full -> Patchwork_15192_full
====================================================

Summary
-------

  **FAILURE**

  Serious unknown changes coming with Patchwork_15192_full absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_15192_full, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in Patchwork_15192_full:

### IGT changes ###

#### Possible regressions ####

  * igt@i915_pm_dc@dc5-dpms:
    - shard-iclb:         [PASS][1] -> [FAIL][2] +1 similar issue
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7293/shard-iclb2/igt@i915_pm_dc@dc5-dpms.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15192/shard-iclb3/igt@i915_pm_dc@dc5-dpms.html

  
Known issues
------------

  Here are the changes found in Patchwork_15192_full that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@gem_ctx_isolation@bcs0-s3:
    - shard-tglb:         [PASS][3] -> [INCOMPLETE][4] ([fdo#111832]) +2 similar issues
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7293/shard-tglb5/igt@gem_ctx_isolation@bcs0-s3.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15192/shard-tglb4/igt@gem_ctx_isolation@bcs0-s3.html

  * igt@gem_ctx_persistence@vcs1-queued:
    - shard-iclb:         [PASS][5] -> [SKIP][6] ([fdo#109276] / [fdo#112080]) +3 similar issues
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7293/shard-iclb1/igt@gem_ctx_persistence@vcs1-queued.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15192/shard-iclb6/igt@gem_ctx_persistence@vcs1-queued.html

  * igt@gem_ctx_shared@exec-single-timeline-bsd:
    - shard-iclb:         [PASS][7] -> [SKIP][8] ([fdo#110841])
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7293/shard-iclb6/igt@gem_ctx_shared@exec-single-timeline-bsd.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15192/shard-iclb2/igt@gem_ctx_shared@exec-single-timeline-bsd.html

  * igt@gem_ctx_switch@vcs1:
    - shard-iclb:         [PASS][9] -> [SKIP][10] ([fdo#112080]) +17 similar issues
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7293/shard-iclb1/igt@gem_ctx_switch@vcs1.html
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15192/shard-iclb6/igt@gem_ctx_switch@vcs1.html

  * igt@gem_eio@in-flight-suspend:
    - shard-tglb:         [PASS][11] -> [INCOMPLETE][12] ([fdo#111832] / [fdo#111850] / [fdo#112081])
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7293/shard-tglb8/igt@gem_eio@in-flight-suspend.html
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15192/shard-tglb3/igt@gem_eio@in-flight-suspend.html

  * igt@gem_exec_balancer@smoke:
    - shard-iclb:         [PASS][13] -> [SKIP][14] ([fdo#110854])
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7293/shard-iclb2/igt@gem_exec_balancer@smoke.html
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15192/shard-iclb3/igt@gem_exec_balancer@smoke.html

  * igt@gem_exec_create@madvise:
    - shard-tglb:         [PASS][15] -> [INCOMPLETE][16] ([fdo#111747])
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7293/shard-tglb9/igt@gem_exec_create@madvise.html
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15192/shard-tglb6/igt@gem_exec_create@madvise.html

  * igt@gem_exec_gttfill@basic:
    - shard-tglb:         [PASS][17] -> [INCOMPLETE][18] ([fdo#111593])
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7293/shard-tglb1/igt@gem_exec_gttfill@basic.html
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15192/shard-tglb3/igt@gem_exec_gttfill@basic.html

  * igt@gem_exec_schedule@preempt-queue-bsd1:
    - shard-iclb:         [PASS][19] -> [SKIP][20] ([fdo#109276]) +9 similar issues
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7293/shard-iclb4/igt@gem_exec_schedule@preempt-queue-bsd1.html
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15192/shard-iclb3/igt@gem_exec_schedule@preempt-queue-bsd1.html

  * igt@gem_exec_schedule@reorder-wide-bsd:
    - shard-iclb:         [PASS][21] -> [SKIP][22] ([fdo#112146]) +6 similar issues
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7293/shard-iclb6/igt@gem_exec_schedule@reorder-wide-bsd.html
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15192/shard-iclb1/igt@gem_exec_schedule@reorder-wide-bsd.html

  * igt@gem_persistent_relocs@forked-interruptible-thrashing:
    - shard-apl:          [PASS][23] -> [FAIL][24] ([fdo#112037])
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7293/shard-apl2/igt@gem_persistent_relocs@forked-interruptible-thrashing.html
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15192/shard-apl8/igt@gem_persistent_relocs@forked-interruptible-thrashing.html

  * igt@gem_softpin@noreloc-s3:
    - shard-snb:          [PASS][25] -> [DMESG-WARN][26] ([fdo#102365])
   [25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7293/shard-snb6/igt@gem_softpin@noreloc-s3.html
   [26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15192/shard-snb4/igt@gem_softpin@noreloc-s3.html

  * igt@gem_workarounds@suspend-resume-context:
    - shard-apl:          [PASS][27] -> [DMESG-WARN][28] ([fdo#108566]) +2 similar issues
   [27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7293/shard-apl1/igt@gem_workarounds@suspend-resume-context.html
   [28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15192/shard-apl4/igt@gem_workarounds@suspend-resume-context.html

  * igt@i915_selftest@live_hangcheck:
    - shard-hsw:          [PASS][29] -> [DMESG-FAIL][30] ([fdo#111991])
   [29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7293/shard-hsw2/igt@i915_selftest@live_hangcheck.html
   [30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15192/shard-hsw5/igt@i915_selftest@live_hangcheck.html

  * igt@i915_selftest@live_requests:
    - shard-tglb:         [PASS][31] -> [INCOMPLETE][32] ([fdo#112057])
   [31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7293/shard-tglb7/igt@i915_selftest@live_requests.html
   [32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15192/shard-tglb6/igt@i915_selftest@live_requests.html

  * igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions:
    - shard-skl:          [PASS][33] -> [FAIL][34] ([fdo#102670] / [fdo#106081])
   [33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7293/shard-skl2/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html
   [34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15192/shard-skl3/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html

  * igt@kms_fbcon_fbt@psr-suspend:
    - shard-skl:          [PASS][35] -> [DMESG-WARN][36] ([fdo#106107])
   [35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7293/shard-skl6/igt@kms_fbcon_fbt@psr-suspend.html
   [36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15192/shard-skl5/igt@kms_fbcon_fbt@psr-suspend.html

  * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-mmap-cpu:
    - shard-iclb:         [PASS][37] -> [FAIL][38] ([fdo#103167]) +3 similar issues
   [37]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7293/shard-iclb8/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-mmap-cpu.html
   [38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15192/shard-iclb5/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-mmap-cpu.html

  * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-indfb-msflip-blt:
    - shard-tglb:         [PASS][39] -> [FAIL][40] ([fdo#103167]) +4 similar issues
   [39]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7293/shard-tglb1/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-indfb-msflip-blt.html
   [40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15192/shard-tglb2/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-indfb-msflip-blt.html

  * igt@kms_frontbuffer_tracking@fbcpsr-1p-rte:
    - shard-iclb:         [PASS][41] -> [FAIL][42] ([fdo#103167] / [fdo#110378])
   [41]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7293/shard-iclb5/igt@kms_frontbuffer_tracking@fbcpsr-1p-rte.html
   [42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15192/shard-iclb6/igt@kms_frontbuffer_tracking@fbcpsr-1p-rte.html

  * igt@kms_frontbuffer_tracking@fbcpsr-suspend:
    - shard-tglb:         [PASS][43] -> [INCOMPLETE][44] ([fdo#111832] / [fdo#111850] / [fdo#111884])
   [43]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7293/shard-tglb6/igt@kms_frontbuffer_tracking@fbcpsr-suspend.html
   [44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15192/shard-tglb5/igt@kms_frontbuffer_tracking@fbcpsr-suspend.html

  * igt@kms_plane@plane-panning-bottom-right-suspend-pipe-a-planes:
    - shard-tglb:         [PASS][45] -> [INCOMPLETE][46] ([fdo#111832] / [fdo#111850]) +3 similar issues
   [45]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7293/shard-tglb9/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-a-planes.html
   [46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15192/shard-tglb1/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-a-planes.html

  * igt@kms_plane@plane-panning-bottom-right-suspend-pipe-b-planes:
    - shard-kbl:          [PASS][47] -> [DMESG-WARN][48] ([fdo#108566]) +6 similar issues
   [47]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7293/shard-kbl4/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-b-planes.html
   [48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15192/shard-kbl1/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-b-planes.html

  * igt@kms_psr@psr2_cursor_blt:
    - shard-iclb:         [PASS][49] -> [SKIP][50] ([fdo#109441]) +1 similar issue
   [49]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7293/shard-iclb2/igt@kms_psr@psr2_cursor_blt.html
   [50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15192/shard-iclb6/igt@kms_psr@psr2_cursor_blt.html

  
#### Possible fixes ####

  * igt@gem_ctx_isolation@bcs0-s3:
    - shard-skl:          [INCOMPLETE][51] ([fdo#104108]) -> [PASS][52] +1 similar issue
   [51]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7293/shard-skl10/igt@gem_ctx_isolation@bcs0-s3.html
   [52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15192/shard-skl10/igt@gem_ctx_isolation@bcs0-s3.html

  * igt@gem_ctx_isolation@rcs0-s3:
    - shard-kbl:          [DMESG-WARN][53] ([fdo#108566]) -> [PASS][54] +8 similar issues
   [53]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7293/shard-kbl4/igt@gem_ctx_isolation@rcs0-s3.html
   [54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15192/shard-kbl1/igt@gem_ctx_isolation@rcs0-s3.html

  * igt@gem_ctx_isolation@vcs1-s3:
    - shard-tglb:         [INCOMPLETE][55] ([fdo#111832]) -> [PASS][56]
   [55]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7293/shard-tglb8/igt@gem_ctx_isolation@vcs1-s3.html
   [56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15192/shard-tglb7/igt@gem_ctx_isolation@vcs1-s3.html

  * igt@gem_ctx_persistence@smoketest:
    - shard-tglb:         [DMESG-WARN][57] -> [PASS][58]
   [57]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7293/shard-tglb8/igt@gem_ctx_persistence@smoketest.html
   [58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15192/shard-tglb1/igt@gem_ctx_persistence@smoketest.html
    - shard-iclb:         [DMESG-WARN][59] -> [PASS][60]
   [59]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7293/shard-iclb2/igt@gem_ctx_persistence@smoketest.html
   [60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15192/shard-iclb6/igt@gem_ctx_persistence@smoketest.html

  * igt@gem_ctx_persistence@vcs1-mixed-process:
    - shard-iclb:         [SKIP][61] ([fdo#109276] / [fdo#112080]) -> [PASS][62] +2 similar issues
   [61]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7293/shard-iclb6/igt@gem_ctx_persistence@vcs1-mixed-process.html
   [62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15192/shard-iclb2/igt@gem_ctx_persistence@vcs1-mixed-process.html

  * igt@gem_exec_balancer@smoke:
    - shard-tglb:         [INCOMPLETE][63] ([fdo#111593]) -> [PASS][64]
   [63]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7293/shard-tglb6/igt@gem_exec_balancer@smoke.html
   [64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15192/shard-tglb3/igt@gem_exec_balancer@smoke.html

  * igt@gem_exec_parallel@vcs1-fds:
    - shard-iclb:         [SKIP][65] ([fdo#112080]) -> [PASS][66] +9 similar issues
   [65]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7293/shard-iclb6/igt@gem_exec_parallel@vcs1-fds.html
   [66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15192/shard-iclb1/igt@gem_exec_parallel@vcs1-fds.html

  * igt@gem_exec_schedule@in-order-bsd:
    - shard-iclb:         [SKIP][67] ([fdo#112146]) -> [PASS][68] +6 similar issues
   [67]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7293/shard-iclb1/igt@gem_exec_schedule@in-order-bsd.html
   [68]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15192/shard-iclb8/igt@gem_exec_schedule@in-order-bsd.html

  * igt@gem_partial_pwrite_pread@write:
    - shard-snb:          [INCOMPLETE][69] ([fdo#105411]) -> [PASS][70]
   [69]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7293/shard-snb2/igt@gem_partial_pwrite_pread@write.html
   [70]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15192/shard-snb1/igt@gem_partial_pwrite_pread@write.html

  * igt@gem_userptr_blits@dmabuf-unsync:
    - shard-hsw:          [DMESG-WARN][71] ([fdo#111870]) -> [PASS][72]
   [71]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7293/shard-hsw6/igt@gem_userptr_blits@dmabuf-unsync.html
   [72]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15192/shard-hsw6/igt@gem_userptr_blits@dmabuf-unsync.html

  * igt@i915_suspend@fence-restore-tiled2untiled:
    - shard-tglb:         [INCOMPLETE][73] ([fdo#111832] / [fdo#111850]) -> [PASS][74] +3 similar issues
   [73]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7293/shard-tglb2/igt@i915_suspend@fence-restore-tiled2untiled.html
   [74]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15192/shard-tglb4/igt@i915_suspend@fence-restore-tiled2untiled.html

  * igt@kms_color@pipe-a-ctm-max:
    - shard-skl:          [FAIL][75] ([fdo#108147]) -> [PASS][76]
   [75]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7293/shard-skl7/igt@kms_color@pipe-a-ctm-max.html
   [76]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15192/shard-skl7/igt@kms_color@pipe-a-ctm-max.html

  * igt@kms_cursor_crc@pipe-b-cursor-suspend:
    - shard-apl:          [DMESG-WARN][77] ([fdo#108566]) -> [PASS][78] +1 similar issue
   [77]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7293/shard-apl6/igt@kms_cursor_crc@pipe-b-cursor-suspend.html
   [78]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15192/shard-apl1/igt@kms_cursor_crc@pipe-b-cursor-suspend.html

  * igt@kms_flip@flip-vs-expired-vblank-interruptible:
    - shard-glk:          [FAIL][79] ([fdo#105363]) -> [PASS][80]
   [79]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7293/shard-glk5/igt@kms_flip@flip-vs-expired-vblank-interruptible.html
   [80]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15192/shard-glk4/igt@kms_flip@flip-vs-expired-vblank-interruptible.html

  * igt@kms_flip@flip-vs-suspend-interruptible:
    - shard-hsw:          [INCOMPLETE][81] ([fdo#103540]) -> [PASS][82] +1 similar issue
   [81]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7293/shard-hsw5/igt@kms_flip@flip-vs-suspend-interruptible.html
   [82]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15192/shard-hsw2/igt@kms_flip@flip-vs-suspend-interruptible.html

  * igt@kms_frontbuffer_tracking@fbc-suspend:
    - shard-tglb:         [INCOMPLETE][83] ([fdo#111832] / [fdo#111850] / [fdo#111884]) -> [PASS][84]
   [83]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7293/shard-tglb7/igt@kms_frontbuffer_tracking@fbc-suspend.html
   [84]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15192/shard-tglb2/igt@kms_frontbuffer_tracking@fbc-suspend.html

  * igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-cur-indfb-draw-render:
    - shard-iclb:         [FAIL][85] ([fdo#103167]) -> [PASS][86] +2 similar issues
   [85]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7293/shard-iclb1/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-cur-indfb-draw-render.html
   [86]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15192/shard-iclb6/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-cur-indfb-draw-render.html

  * igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-cur-indfb-move:
    - shard-tglb:         [FAIL][87] ([fdo#103167]) -> [PASS][88] +1 similar issue
   [87]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7293/shard-tglb4/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-cur-indfb-move.html
   [88]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15192/shard-tglb4/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-cur-indfb-move.html

  * igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min:
    - shard-skl:          [FAIL][89] ([fdo#108145]) -> [PASS][90]
   [89]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7293/shard-skl7/igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min.html
   [90]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15192/shard-skl7/igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min.html

  * igt@kms_psr@psr2_sprite_plane_move:
    - shard-iclb:         [SKIP][91] ([fdo#109441]) -> [PASS][92] +2 similar issues
   [91]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7293/shard-iclb6/igt@kms_psr@psr2_sprite_plane_move.html
   [92]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15192/shard-iclb2/igt@kms_psr@psr2_sprite_plane_move.html

  * igt@kms_vblank@pipe-b-wait-busy-hang:
    - shard-snb:          [SKIP][93] ([fdo#109271]) -> [PASS][94] +2 similar issues
   [93]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7293/shard-snb2/igt@kms_vblank@pipe-b-wait-busy-hang.html
   [94]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15192/shard-snb5/igt@kms_vblank@pipe-b-wait-busy-hang.html

  * igt@prime_busy@hang-bsd2:
    - shard-iclb:         [SKIP][95] ([fdo#109276]) -> [PASS][96] +13 similar issues
   [95]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7293/shard-iclb6/igt@prime_busy@hang-bsd2.html
   [96]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15192/shard-iclb1/igt@prime_busy@hang-bsd2.html

  
#### Warnings ####

  * igt@gem_ctx_isolation@vcs2-dirty-create:
    - shard-tglb:         [SKIP][97] ([fdo#112080]) -> [SKIP][98] ([fdo#111912] / [fdo#112080])
   [97]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7293/shard-tglb9/igt@gem_ctx_isolation@vcs2-dirty-create.html
   [98]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15192/shard-tglb1/igt@gem_ctx_isolation@vcs2-dirty-create.html

  * igt@gem_exec_schedule@deep-bsd2:
    - shard-tglb:         [FAIL][99] ([fdo#111646]) -> [INCOMPLETE][100] ([fdo#111671])
   [99]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7293/shard-tglb3/igt@gem_exec_schedule@deep-bsd2.html
   [100]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15192/shard-tglb2/igt@gem_exec_schedule@deep-bsd2.html

  * igt@gem_exec_schedule@deep-vebox:
    - shard-tglb:         [INCOMPLETE][101] ([fdo#111671]) -> [FAIL][102] ([fdo#111646])
   [101]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7293/shard-tglb2/igt@gem_exec_schedule@deep-vebox.html
   [102]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15192/shard-tglb8/igt@gem_exec_schedule@deep-vebox.html

  * igt@gem_mocs_settings@mocs-reset-bsd2:
    - shard-iclb:         [SKIP][103] ([fdo#109276]) -> [FAIL][104] ([fdo#111330]) +1 similar issue
   [103]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7293/shard-iclb6/igt@gem_mocs_settings@mocs-reset-bsd2.html
   [104]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15192/shard-iclb2/igt@gem_mocs_settings@mocs-reset-bsd2.html

  * igt@gem_mocs_settings@mocs-settings-bsd2:
    - shard-iclb:         [FAIL]

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15192/index.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 24+ messages in thread

end of thread, other threads:[~2019-11-09 18:48 UTC | newest]

Thread overview: 24+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2019-11-08  8:56 [PATCH 1/4] drm/i915/icl: Refine PG_HYSTERESIS Chris Wilson
2019-11-08  8:56 ` [Intel-gfx] " Chris Wilson
2019-11-08  8:56 ` [PATCH 2/4] drm/i915/execlists: Reduce write flush on context switch to a wmb() Chris Wilson
2019-11-08  8:56   ` [Intel-gfx] " Chris Wilson
2019-11-08  8:56 ` [PATCH 3/4] drm/i915/pmu: Cheat when reading the actual frequency to avoid fw Chris Wilson
2019-11-08  8:56   ` [Intel-gfx] " Chris Wilson
2019-11-08  9:05   ` Chris Wilson
2019-11-08  9:05     ` [Intel-gfx] " Chris Wilson
2019-11-08 10:19   ` Tvrtko Ursulin
2019-11-08 10:19     ` [Intel-gfx] " Tvrtko Ursulin
2019-11-08  8:56 ` [PATCH 4/4] drm/i915/pmu: Only use exclusive mmio access for gen7 Chris Wilson
2019-11-08  8:56   ` [Intel-gfx] " Chris Wilson
2019-11-08 10:21   ` Tvrtko Ursulin
2019-11-08 10:21     ` [Intel-gfx] " Tvrtko Ursulin
2019-11-08 10:28     ` Chris Wilson
2019-11-08 10:28       ` [Intel-gfx] " Chris Wilson
2019-11-08  9:14 ` ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/4] drm/i915/icl: Refine PG_HYSTERESIS Patchwork
2019-11-08  9:14   ` [Intel-gfx] " Patchwork
2019-11-08  9:15 ` ✗ Fi.CI.SPARSE: " Patchwork
2019-11-08  9:15   ` [Intel-gfx] " Patchwork
2019-11-08 10:02 ` ✓ Fi.CI.BAT: success " Patchwork
2019-11-08 10:02   ` [Intel-gfx] " Patchwork
2019-11-09 18:48 ` ✗ Fi.CI.IGT: failure " Patchwork
2019-11-09 18:48   ` [Intel-gfx] " Patchwork

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