[U-Boot] [PATCH v2 0/4] usb: host: dwc2: use driver model for PHY and CLOCK

[U-Boot] [PATCH v2 0/4] usb: host: dwc2: use driver model for PHY and CLOCK

[Patrick Delaunay]

In this serie I update the DWC2 host driver to use the device tree
information and the associated PHY and CLOCK drivers when they are
available.

I test this serie on stm32mp157c-ev1 board, with PHY and CLK
support

The U-CLASS are provided by:
- PHY by USBPHYC driver = ./drivers/phy/phy-stm32-usbphyc.c
- CLOCK by RCC clock driver = drivers/clk/clk_stm32mp1.c
- RESET by RCC reset driver = drivers/reset/stm32-reset.c

And I activate the configuration
+CONFIG_USB_DWC2=y

PS: it is not the default configuration to avoid conflict with gadget
    driver

To solve a binding issue, I also deactivate the gadget support:
by default only one driver is bound to theusbotg_hs node with "snps,dwc2"
compatible, and today it is the device one (the first in the driver list).

I also need to deactivate hnp-srp support with:

&usbotg_hs {
	/* need to disable ONLY for HOST support */
	hnp-srp-disable;
};

WARNING: OTG with device or host support is not correctly handle by DWC2
         driver (see example for dynamic OTG role in DWC3 driver).

The tests executed on the stm32mp157c-ev1 target:

STM32MP> usb start
starting USB...
Bus usb-otg at 49000000: USB DWC2
Bus usbh-ehci at 5800d000: USB EHCI 1.00
scanning bus usb-otg at 49000000 for devices... 2 USB Device(s) found
scanning bus usbh-ehci at 5800d000 for devices... 3 USB Device(s) found
       scanning usb for storage devices... 2 Storage Device(s) found
STM32MP> usb tree
USB device tree:
  1  Hub (480 Mb/s, 0mA)
  |   U-Boot Root Hub
  |
  +-2  Mass Storage (480 Mb/s, 300mA)
       Verbatim STORE N GO 070731C8ACD7EE97

  1  Hub (480 Mb/s, 0mA)
  |  u-boot EHCI Host Controller
  |
  +-2  Hub (480 Mb/s, 2mA)
    |
    +-3  Mass Storage (480 Mb/s, 500mA)
         Generic  USB Storage

STM32MP> ls usb 0
<DIR>       4096 .
<DIR>       4096 ..
<DIR>      16384 lost+found
<DIR>       4096 record
         1490212 xipImage
        21058006 vmlinux

STM32MP> load usb 0 0xC0000000 vmlinux
21058006 bytes read in 10851 ms (1.9 MiB/s)


Changes in v2:
- update dev_err
- update commit message
- change dev_err to dev_dbg for PHY function call
- treat dwc2_shutdown_phy error
- add clk_disable_bulk in dwc2_usb_remove

Patrick Delaunay (4):
  usb: host: dwc2: add phy support
  usb: host: dwc2: add clk support
  usb: host: dwc2: force reset assert
  usb: host: dwc2: add trace to have clean usb start

 drivers/usb/host/dwc2.c | 100 +++++++++++++++++++++++++++++++++++++++-
 1 file changed, 99 insertions(+), 1 deletion(-)

-- 
2.17.1

[U-Boot] [PATCH v2 1/4] usb: host: dwc2: add phy support

[Patrick Delaunay]

Use generic phy to initialize the PHY associated to the
DWC2 device and available in the device tree.

This patch don't added dependency because when CONFIG_PHY
is not activated, the generic PHY function are stubbed.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
---

Changes in v2:
- update dev_err
- update commit message
- change dev_err to dev_dbg for PHY function call
- treat dwc2_shutdown_phy error

 drivers/usb/host/dwc2.c | 66 +++++++++++++++++++++++++++++++++++++++++
 1 file changed, 66 insertions(+)

diff --git a/drivers/usb/host/dwc2.c b/drivers/usb/host/dwc2.c
index 350d820a6e..cb2b381eb6 100644
--- a/drivers/usb/host/dwc2.c
+++ b/drivers/usb/host/dwc2.c
@@ -7,6 +7,7 @@
 #include <common.h>
 #include <dm.h>
 #include <errno.h>
+#include <generic-phy.h>
 #include <usb.h>
 #include <malloc.h>
 #include <memalign.h>
@@ -35,6 +36,7 @@ struct dwc2_priv {
 #ifdef CONFIG_DM_REGULATOR
 	struct udevice *vbus_supply;
 #endif
+	struct phy phy;
 #else
 	uint8_t *aligned_buffer;
 	uint8_t *status_buffer;
@@ -1320,13 +1322,71 @@ static int dwc2_usb_ofdata_to_platdata(struct udevice *dev)
 	return 0;
 }
 
+static int dwc2_setup_phy(struct udevice *dev)
+{
+	struct dwc2_priv *priv = dev_get_priv(dev);
+	int ret;
+
+	ret = generic_phy_get_by_index(dev, 0, &priv->phy);
+	if (ret) {
+		if (ret != -ENOENT) {
+			dev_err(dev, "Failed to get USB PHY: %d.\n", ret);
+			return ret;
+		}
+		return 0;
+	}
+
+	ret = generic_phy_init(&priv->phy);
+	if (ret) {
+		dev_dbg(dev, "Failed to init USB PHY: %d.\n", ret);
+		return ret;
+	}
+
+	ret = generic_phy_power_on(&priv->phy);
+	if (ret) {
+		dev_dbg(dev, "Failed to power on USB PHY: %d.\n", ret);
+		generic_phy_exit(&priv->phy);
+		return ret;
+	}
+
+	return 0;
+}
+
+static int dwc2_shutdown_phy(struct udevice *dev)
+{
+	struct dwc2_priv *priv = dev_get_priv(dev);
+	int ret;
+
+	if (!generic_phy_valid(&priv->phy))
+		return 0;
+
+	ret = generic_phy_power_off(&priv->phy);
+	if (ret) {
+		dev_dbg(dev, "Failed to power off USB PHY: %d.\n", ret);
+		return ret;
+	}
+
+	ret = generic_phy_exit(&priv->phy);
+	if (ret) {
+		dev_dbg(dev, "Failed to power off USB PHY: %d.\n", ret);
+		return ret;
+	}
+
+	return 0;
+}
+
 static int dwc2_usb_probe(struct udevice *dev)
 {
 	struct dwc2_priv *priv = dev_get_priv(dev);
 	struct usb_bus_priv *bus_priv = dev_get_uclass_priv(dev);
+	int ret;
 
 	bus_priv->desc_before_addr = true;
 
+	ret = dwc2_setup_phy(dev);
+	if (ret)
+		return ret;
+
 	return dwc2_init_common(dev, priv);
 }
 
@@ -1339,6 +1399,12 @@ static int dwc2_usb_remove(struct udevice *dev)
 	if (ret)
 		return ret;
 
+	ret = dwc2_shutdown_phy(dev);
+	if (ret) {
+		dev_dbg(dev, "Failed to shutdown USB PHY: %d.\n", ret);
+		return ret;
+	}
+
 	dwc2_uninit_common(priv->regs);
 
 	reset_release_bulk(&priv->resets);
-- 
2.17.1

[U-Boot] [PATCH v2 2/4] usb: host: dwc2: add clk support

[Patrick Delaunay]

Add support for clock with driver model.

This patch don't added dependency because when CONFIG_CLK
is not activated the clk function are stubbed.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
---

Changes in v2: None

 drivers/usb/host/dwc2.c | 30 +++++++++++++++++++++++++++++-
 1 file changed, 29 insertions(+), 1 deletion(-)

diff --git a/drivers/usb/host/dwc2.c b/drivers/usb/host/dwc2.c
index cb2b381eb6..9a00bea24f 100644
--- a/drivers/usb/host/dwc2.c
+++ b/drivers/usb/host/dwc2.c
@@ -5,13 +5,14 @@
  */
 
 #include <common.h>
+#include <clk.h>
 #include <dm.h>
 #include <errno.h>
 #include <generic-phy.h>
-#include <usb.h>
 #include <malloc.h>
 #include <memalign.h>
 #include <phys2bus.h>
+#include <usb.h>
 #include <usbroothubdes.h>
 #include <wait_bit.h>
 #include <asm/io.h>
@@ -37,6 +38,7 @@ struct dwc2_priv {
 	struct udevice *vbus_supply;
 #endif
 	struct phy phy;
+	struct clk_bulk clks;
 #else
 	uint8_t *aligned_buffer;
 	uint8_t *status_buffer;
@@ -1375,6 +1377,26 @@ static int dwc2_shutdown_phy(struct udevice *dev)
 	return 0;
 }
 
+static int dwc2_clk_init(struct udevice *dev)
+{
+	struct dwc2_priv *priv = dev_get_priv(dev);
+	int ret;
+
+	ret = clk_get_bulk(dev, &priv->clks);
+	if (ret == -ENOSYS || ret == -ENOENT)
+		return 0;
+	if (ret)
+		return ret;
+
+	ret = clk_enable_bulk(&priv->clks);
+	if (ret) {
+		clk_release_bulk(&priv->clks);
+		return ret;
+	}
+
+	return 0;
+}
+
 static int dwc2_usb_probe(struct udevice *dev)
 {
 	struct dwc2_priv *priv = dev_get_priv(dev);
@@ -1383,6 +1405,10 @@ static int dwc2_usb_probe(struct udevice *dev)
 
 	bus_priv->desc_before_addr = true;
 
+	ret = dwc2_clk_init(dev);
+	if (ret)
+		return ret;
+
 	ret = dwc2_setup_phy(dev);
 	if (ret)
 		return ret;
@@ -1408,6 +1434,8 @@ static int dwc2_usb_remove(struct udevice *dev)
 	dwc2_uninit_common(priv->regs);
 
 	reset_release_bulk(&priv->resets);
+	clk_disable_bulk(&priv->clks);
+	clk_release_bulk(&priv->clks);
 
 	return 0;
 }
-- 
2.17.1

[U-Boot] [PATCH v2 3/4] usb: host: dwc2: force reset assert

[Patrick Delaunay]

Assert reset before deassert in dwc2_reset;
this patch solve issues when the DWC2 registers are already
initialized with value incompatible with host mode.

Force a hardware reset of the IP reset all the DWC2 registers at
default value, the host driver start with a clean state
(Core Soft reset doen in dwc_otg_core_reset is not enought
 to reset all register).

The error can occurs in U-Boot when DWC2 device gadget driver
force device mode (called by ums or dfu command, before to execute
the usb start command).

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
---

Changes in v2:
- add clk_disable_bulk in dwc2_usb_remove

 drivers/usb/host/dwc2.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/usb/host/dwc2.c b/drivers/usb/host/dwc2.c
index 9a00bea24f..870b06459e 100644
--- a/drivers/usb/host/dwc2.c
+++ b/drivers/usb/host/dwc2.c
@@ -1149,6 +1149,8 @@ static int dwc2_reset(struct udevice *dev)
 			return ret;
 	}
 
+	/* force reset to clear all IP register */
+	reset_assert_bulk(&priv->resets);
 	ret = reset_deassert_bulk(&priv->resets);
 	if (ret) {
 		reset_release_bulk(&priv->resets);
-- 
2.17.1

[U-Boot] [PATCH v2 4/4] usb: host: dwc2: add trace to have clean usb start

[Patrick Delaunay]

Solve issue for the display of "usb start" command on stm32mp1
because one carriage return is missing in DWC2 probe.

STM32MP> usb start
starting USB...
Bus usb-otg at 49000000:    Bus usbh-ehci at 5800d000:   USB EHCI 1.00

after the patch:

STM32MP> usb start
starting USB...
Bus usb-otg at 49000000: USB DWC2
Bus usbh-ehci at 5800d000: USB EHCI 1.00

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
---

Changes in v2: None

 drivers/usb/host/dwc2.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/usb/host/dwc2.c b/drivers/usb/host/dwc2.c
index 870b06459e..2450dff9ac 100644
--- a/drivers/usb/host/dwc2.c
+++ b/drivers/usb/host/dwc2.c
@@ -1217,6 +1217,8 @@ static int dwc2_init_common(struct udevice *dev, struct dwc2_priv *priv)
 	if (readl(&regs->gintsts) & DWC2_GINTSTS_CURMODE_HOST)
 		mdelay(1000);
 
+	printf("USB DWC2\n");
+
 	return 0;
 }
 
-- 
2.17.1

[U-Boot] [PATCH v2 0/4] usb: host: dwc2: use driver model for PHY and CLOCK

[Marek Vasut]

On 11/8/19 3:47 PM, Patrick Delaunay wrote:
> 
> In this serie I update the DWC2 host driver to use the device tree
> information and the associated PHY and CLOCK drivers when they are
> available.

I'm kinda on the fence whether to add it into current release or not.
The patches look generally OK to me.

Ley, Simon, can you check this on SoCFPGA ?
Bin, can you give it a once-over ?

If this looks OK to you, I will add it.

[...]

[U-Boot] [PATCH v2 0/4] usb: host: dwc2: use driver model for PHY and CLOCK

[Simon Goldschmidt]

Marek Vasut <marex@denx.de> schrieb am Fr., 8. Nov. 2019, 16:46:

> On 11/8/19 3:47 PM, Patrick Delaunay wrote:
> >
> > In this serie I update the DWC2 host driver to use the device tree
> > information and the associated PHY and CLOCK drivers when they are
> > available.
>
> I'm kinda on the fence whether to add it into current release or not.
> The patches look generally OK to me.
>
> Ley, Simon, can you check this on SoCFPGA ?
>

Gmm, so can try, but I don't have a working setup with USB peripherals
attached... I do have USB on the socrates, but currently no cable to
connect anything...

I could test it to see if I can get the same result saying no attached
devices are found, that would mean probing still works correctly...

Regards,
Simon

Bin, can you give it a once-over ?
>
> If this looks OK to you, I will add it.
>
> [...]
>

[U-Boot] [PATCH v2 0/4] usb: host: dwc2: use driver model for PHY and CLOCK

[Patrick Delaunay]

Hi Marek,

My ci travis build is failing after the last updates (raspberry pi). I am
testing a update with sub for clk disable bulk function:

https://github.com/patrickdelaunay/u-boot/commit/1d053dd96e6623d02b84654398655a5563ccfdcb

Now buikd is ok:
https://travis-ci.org/patrickdelaunay/u-boot/builds/609496187

I will push it after the Week end (tuesday).

Sorry.

Patrick.



Le ven. 8 nov. 2019 à 16:55, Simon Goldschmidt <
simon.k.r.goldschmidt@gmail.com> a écrit :

> Marek Vasut <marex@denx.de> schrieb am Fr., 8. Nov. 2019, 16:46:
>
> > On 11/8/19 3:47 PM, Patrick Delaunay wrote:
> > >
> > > In this serie I update the DWC2 host driver to use the device tree
> > > information and the associated PHY and CLOCK drivers when they are
> > > available.
> >
> > I'm kinda on the fence whether to add it into current release or not.
> > The patches look generally OK to me.
> >
> > Ley, Simon, can you check this on SoCFPGA ?
> >
>
> Gmm, so can try, but I don't have a working setup with USB peripherals
> attached... I do have USB on the socrates, but currently no cable to
> connect anything...
>
> I could test it to see if I can get the same result saying no attached
> devices are found, that would mean probing still works correctly...
>
> Regards,
> Simon
>
> Bin, can you give it a once-over ?
> >
> > If this looks OK to you, I will add it.
> >
> > [...]
> >
> _______________________________________________
> U-Boot mailing list
> U-Boot at lists.denx.de
> https://lists.denx.de/listinfo/u-boot
>

[U-Boot] [PATCH v2 0/4] usb: host: dwc2: use driver model for PHY and CLOCK

[Simon Goldschmidt]

On Sat, Nov 9, 2019 at 4:46 PM Patrick Delaunay
<patrick.delaunay73@gmail.com> wrote:
>
> Hi Marek,
>
> My ci travis build is failing after the last updates (raspberry pi). I am testing a update with sub for clk disable bulk function:
>
> https://github.com/patrickdelaunay/u-boot/commit/1d053dd96e6623d02b84654398655a5563ccfdcb
>
> Now buikd is ok:
> https://travis-ci.org/patrickdelaunay/u-boot/builds/609496187
>
> I will push it after the Week end (tuesday).

With that additional change, it seems to build and work for me (same error
message saying USB "Port not available" than without this patch).

Regards,
Simon

>
> Sorry.
>
> Patrick.
>
>
>
> Le ven. 8 nov. 2019 à 16:55, Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> a écrit :
>>
>> Marek Vasut <marex@denx.de> schrieb am Fr., 8. Nov. 2019, 16:46:
>>
>> > On 11/8/19 3:47 PM, Patrick Delaunay wrote:
>> > >
>> > > In this serie I update the DWC2 host driver to use the device tree
>> > > information and the associated PHY and CLOCK drivers when they are
>> > > available.
>> >
>> > I'm kinda on the fence whether to add it into current release or not.
>> > The patches look generally OK to me.
>> >
>> > Ley, Simon, can you check this on SoCFPGA ?
>> >
>>
>> Gmm, so can try, but I don't have a working setup with USB peripherals
>> attached... I do have USB on the socrates, but currently no cable to
>> connect anything...
>>
>> I could test it to see if I can get the same result saying no attached
>> devices are found, that would mean probing still works correctly...
>>
>> Regards,
>> Simon
>>
>> Bin, can you give it a once-over ?
>> >
>> > If this looks OK to you, I will add it.
>> >
>> > [...]
>> >
>> _______________________________________________
>> U-Boot mailing list
>> U-Boot at lists.denx.de
>> https://lists.denx.de/listinfo/u-boot

[U-Boot] [PATCH v2 0/4] usb: host: dwc2: use driver model for PHY and CLOCK

[Tan, Ley Foon]

> -----Original Message-----
> From: Marek Vasut <marex@denx.de>
> Sent: Friday, November 8, 2019 11:43 PM
> To: Patrick Delaunay <patrick.delaunay@st.com>; u-boot at lists.denx.de
> Cc: simon.k.r.goldschmidt at gmail.com; b.galvani at gmail.com; Michal
> Suchanek <msuchanek@suse.de>; Sven Schwermer
> <sven@svenschwermer.de>; U-Boot STM32 <uboot-stm32@st-md-
> mailman.stormreply.com>; Bin Meng <bmeng.cn@gmail.com>; Tan, Ley
> Foon <ley.foon.tan@intel.com>
> Subject: Re: [PATCH v2 0/4] usb: host: dwc2: use driver model for PHY and
> CLOCK
> 
> On 11/8/19 3:47 PM, Patrick Delaunay wrote:
> >
> > In this serie I update the DWC2 host driver to use the device tree
> > information and the associated PHY and CLOCK drivers when they are
> > available.
> 
> I'm kinda on the fence whether to add it into current release or not.
> The patches look generally OK to me.
> 
> Ley, Simon, can you check this on SoCFPGA ?
There is compilation error for Stratix10. Stratix10 doesn't support clock DM framework yet. 
So, this patch needs check for CONFIG_CLK when call to all clock DM functions.

drivers/usb/host/built-in.o: In function `dwc2_usb_remove':
drivers/usb/host/dwc2.c:1441: undefined reference to `clk_disable_bulk'

Tested on Agilex, USB is working fine with this patch.

Regards
Ley Foon

> Bin, can you give it a once-over ?
> 
> If this looks OK to you, I will add it.
> 
> [...]