[PATCH 0/9] drm/i915/dsi: enable DSC

[PATCH 0/9] drm/i915/dsi: enable DSC

[Jani Nikula]

First attempt at enabling DSC on ICL+ DSI. Completely untested, fingers
crossed.

There are still gaps, and some details of the implementation, in
particular around VBT, are ghastly. But the bulk of the code should be
here.

BR,
Jani.


Jani Nikula (9):
  drm/i915/bios: use a flag for vbt hdmi level shift presence
  drm/i915/bios: store child devices in a list
  drm/i915/bios: pass devdata to parse_ddi_port
  drm/i915/bios: parse compression parameters block
  drm/i915/bios: add support for querying DSC details for encoder
  drm/i915/dsc: move DP specific compute params to intel_dp.c
  drm/i915/dsc: move slice height calculation to encoder
  drm/i915/dsc: add support for computing and writing PPS for DSI
    encoders
  drm/i915/dsi: add support for DSC

 drivers/gpu/drm/i915/display/icl_dsi.c        |  75 ++++-
 drivers/gpu/drm/i915/display/intel_bios.c     | 283 +++++++++++++-----
 drivers/gpu/drm/i915/display/intel_bios.h     |   5 +
 drivers/gpu/drm/i915/display/intel_ddi.c      |  13 +-
 drivers/gpu/drm/i915/display/intel_dp.c       |  59 +++-
 drivers/gpu/drm/i915/display/intel_vbt_defs.h |   2 +-
 drivers/gpu/drm/i915/display/intel_vdsc.c     |  85 ++----
 drivers/gpu/drm/i915/i915_drv.h               |  11 +-
 8 files changed, 377 insertions(+), 156 deletions(-)

-- 
2.20.1

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[Intel-gfx] [PATCH 0/9] drm/i915/dsi: enable DSC

[Jani Nikula]

First attempt at enabling DSC on ICL+ DSI. Completely untested, fingers
crossed.

There are still gaps, and some details of the implementation, in
particular around VBT, are ghastly. But the bulk of the code should be
here.

BR,
Jani.


Jani Nikula (9):
  drm/i915/bios: use a flag for vbt hdmi level shift presence
  drm/i915/bios: store child devices in a list
  drm/i915/bios: pass devdata to parse_ddi_port
  drm/i915/bios: parse compression parameters block
  drm/i915/bios: add support for querying DSC details for encoder
  drm/i915/dsc: move DP specific compute params to intel_dp.c
  drm/i915/dsc: move slice height calculation to encoder
  drm/i915/dsc: add support for computing and writing PPS for DSI
    encoders
  drm/i915/dsi: add support for DSC

 drivers/gpu/drm/i915/display/icl_dsi.c        |  75 ++++-
 drivers/gpu/drm/i915/display/intel_bios.c     | 283 +++++++++++++-----
 drivers/gpu/drm/i915/display/intel_bios.h     |   5 +
 drivers/gpu/drm/i915/display/intel_ddi.c      |  13 +-
 drivers/gpu/drm/i915/display/intel_dp.c       |  59 +++-
 drivers/gpu/drm/i915/display/intel_vbt_defs.h |   2 +-
 drivers/gpu/drm/i915/display/intel_vdsc.c     |  85 ++----
 drivers/gpu/drm/i915/i915_drv.h               |  11 +-
 8 files changed, 377 insertions(+), 156 deletions(-)

-- 
2.20.1

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[PATCH 1/9] drm/i915/bios: use a flag for vbt hdmi level shift presence

[Jani Nikula]

The pre-initialized magic value is a bit silly, switch to a flag
instead.

v2: Reduce paranoia to a single sanity check (Ville)

Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/i915/display/intel_bios.c | 10 +---------
 drivers/gpu/drm/i915/display/intel_ddi.c  | 13 +++++++------
 drivers/gpu/drm/i915/i915_drv.h           |  8 ++------
 3 files changed, 10 insertions(+), 21 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_bios.c b/drivers/gpu/drm/i915/display/intel_bios.c
index a03f56b7b4ef..c19b234bebe6 100644
--- a/drivers/gpu/drm/i915/display/intel_bios.c
+++ b/drivers/gpu/drm/i915/display/intel_bios.c
@@ -1509,6 +1509,7 @@ static void parse_ddi_port(struct drm_i915_private *dev_priv,
 			      port_name(port),
 			      hdmi_level_shift);
 		info->hdmi_level_shift = hdmi_level_shift;
+		info->hdmi_level_shift_set = true;
 	}
 
 	if (bdb_version >= 204) {
@@ -1692,8 +1693,6 @@ parse_general_definitions(struct drm_i915_private *dev_priv,
 static void
 init_vbt_defaults(struct drm_i915_private *dev_priv)
 {
-	enum port port;
-
 	dev_priv->vbt.crt_ddc_pin = GMBUS_PIN_VGADDC;
 
 	/* Default to having backlight */
@@ -1721,13 +1720,6 @@ init_vbt_defaults(struct drm_i915_private *dev_priv)
 	dev_priv->vbt.lvds_ssc_freq = intel_bios_ssc_frequency(dev_priv,
 			!HAS_PCH_SPLIT(dev_priv));
 	DRM_DEBUG_KMS("Set default to SSC at %d kHz\n", dev_priv->vbt.lvds_ssc_freq);
-
-	for_each_port(port) {
-		struct ddi_vbt_port_info *info =
-			&dev_priv->vbt.ddi_port_info[port];
-
-		info->hdmi_level_shift = HDMI_LEVEL_SHIFT_UNKNOWN;
-	}
 }
 
 /* Defaults to initialize only if there is no VBT. */
diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
index 092f0341d8d4..1441672c5611 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -888,11 +888,10 @@ icl_get_combo_buf_trans(struct drm_i915_private *dev_priv, int type, int rate,
 
 static int intel_ddi_hdmi_level(struct drm_i915_private *dev_priv, enum port port)
 {
+	struct ddi_vbt_port_info *port_info = &dev_priv->vbt.ddi_port_info[port];
 	int n_entries, level, default_entry;
 	enum phy phy = intel_port_to_phy(dev_priv, port);
 
-	level = dev_priv->vbt.ddi_port_info[port].hdmi_level_shift;
-
 	if (INTEL_GEN(dev_priv) >= 12) {
 		if (intel_phy_is_combo(dev_priv, phy))
 			icl_get_combo_buf_trans(dev_priv, INTEL_OUTPUT_HDMI,
@@ -927,12 +926,14 @@ static int intel_ddi_hdmi_level(struct drm_i915_private *dev_priv, enum port por
 		return 0;
 	}
 
-	/* Choose a good default if VBT is badly populated */
-	if (level == HDMI_LEVEL_SHIFT_UNKNOWN || level >= n_entries)
-		level = default_entry;
-
 	if (WARN_ON_ONCE(n_entries == 0))
 		return 0;
+
+	if (port_info->hdmi_level_shift_set)
+		level = port_info->hdmi_level_shift;
+	else
+		level = default_entry;
+
 	if (WARN_ON_ONCE(level >= n_entries))
 		level = n_entries - 1;
 
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 7e0f67babe20..67bdfe6de3fa 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -627,13 +627,9 @@ struct ddi_vbt_port_info {
 
 	int max_tmds_clock;
 
-	/*
-	 * This is an index in the HDMI/DVI DDI buffer translation table.
-	 * The special value HDMI_LEVEL_SHIFT_UNKNOWN means the VBT didn't
-	 * populate this field.
-	 */
-#define HDMI_LEVEL_SHIFT_UNKNOWN	0xff
+	/* This is an index in the HDMI/DVI DDI buffer translation table. */
 	u8 hdmi_level_shift;
+	u8 hdmi_level_shift_set:1;
 
 	u8 supports_dvi:1;
 	u8 supports_hdmi:1;
-- 
2.20.1

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[Intel-gfx] [PATCH 1/9] drm/i915/bios: use a flag for vbt hdmi level shift presence

[Jani Nikula]

The pre-initialized magic value is a bit silly, switch to a flag
instead.

v2: Reduce paranoia to a single sanity check (Ville)

Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/i915/display/intel_bios.c | 10 +---------
 drivers/gpu/drm/i915/display/intel_ddi.c  | 13 +++++++------
 drivers/gpu/drm/i915/i915_drv.h           |  8 ++------
 3 files changed, 10 insertions(+), 21 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_bios.c b/drivers/gpu/drm/i915/display/intel_bios.c
index a03f56b7b4ef..c19b234bebe6 100644
--- a/drivers/gpu/drm/i915/display/intel_bios.c
+++ b/drivers/gpu/drm/i915/display/intel_bios.c
@@ -1509,6 +1509,7 @@ static void parse_ddi_port(struct drm_i915_private *dev_priv,
 			      port_name(port),
 			      hdmi_level_shift);
 		info->hdmi_level_shift = hdmi_level_shift;
+		info->hdmi_level_shift_set = true;
 	}
 
 	if (bdb_version >= 204) {
@@ -1692,8 +1693,6 @@ parse_general_definitions(struct drm_i915_private *dev_priv,
 static void
 init_vbt_defaults(struct drm_i915_private *dev_priv)
 {
-	enum port port;
-
 	dev_priv->vbt.crt_ddc_pin = GMBUS_PIN_VGADDC;
 
 	/* Default to having backlight */
@@ -1721,13 +1720,6 @@ init_vbt_defaults(struct drm_i915_private *dev_priv)
 	dev_priv->vbt.lvds_ssc_freq = intel_bios_ssc_frequency(dev_priv,
 			!HAS_PCH_SPLIT(dev_priv));
 	DRM_DEBUG_KMS("Set default to SSC at %d kHz\n", dev_priv->vbt.lvds_ssc_freq);
-
-	for_each_port(port) {
-		struct ddi_vbt_port_info *info =
-			&dev_priv->vbt.ddi_port_info[port];
-
-		info->hdmi_level_shift = HDMI_LEVEL_SHIFT_UNKNOWN;
-	}
 }
 
 /* Defaults to initialize only if there is no VBT. */
diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
index 092f0341d8d4..1441672c5611 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -888,11 +888,10 @@ icl_get_combo_buf_trans(struct drm_i915_private *dev_priv, int type, int rate,
 
 static int intel_ddi_hdmi_level(struct drm_i915_private *dev_priv, enum port port)
 {
+	struct ddi_vbt_port_info *port_info = &dev_priv->vbt.ddi_port_info[port];
 	int n_entries, level, default_entry;
 	enum phy phy = intel_port_to_phy(dev_priv, port);
 
-	level = dev_priv->vbt.ddi_port_info[port].hdmi_level_shift;
-
 	if (INTEL_GEN(dev_priv) >= 12) {
 		if (intel_phy_is_combo(dev_priv, phy))
 			icl_get_combo_buf_trans(dev_priv, INTEL_OUTPUT_HDMI,
@@ -927,12 +926,14 @@ static int intel_ddi_hdmi_level(struct drm_i915_private *dev_priv, enum port por
 		return 0;
 	}
 
-	/* Choose a good default if VBT is badly populated */
-	if (level == HDMI_LEVEL_SHIFT_UNKNOWN || level >= n_entries)
-		level = default_entry;
-
 	if (WARN_ON_ONCE(n_entries == 0))
 		return 0;
+
+	if (port_info->hdmi_level_shift_set)
+		level = port_info->hdmi_level_shift;
+	else
+		level = default_entry;
+
 	if (WARN_ON_ONCE(level >= n_entries))
 		level = n_entries - 1;
 
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 7e0f67babe20..67bdfe6de3fa 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -627,13 +627,9 @@ struct ddi_vbt_port_info {
 
 	int max_tmds_clock;
 
-	/*
-	 * This is an index in the HDMI/DVI DDI buffer translation table.
-	 * The special value HDMI_LEVEL_SHIFT_UNKNOWN means the VBT didn't
-	 * populate this field.
-	 */
-#define HDMI_LEVEL_SHIFT_UNKNOWN	0xff
+	/* This is an index in the HDMI/DVI DDI buffer translation table. */
 	u8 hdmi_level_shift;
+	u8 hdmi_level_shift_set:1;
 
 	u8 supports_dvi:1;
 	u8 supports_hdmi:1;
-- 
2.20.1

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[PATCH 2/9] drm/i915/bios: store child devices in a list

[Jani Nikula]

Using the array is getting clumsy. Make things a bit more dynamic.

Remove early returns on not having child devices when the end result
after "iterating" the empty list would be the same.

v3:
- use list_add_tail to not reverse the child device list (Ville)

v2:
- stick to previous naming of child devices (Ville)
- use kzalloc, handle failure
- initialize list head earlier to keep intel_bios_driver_remove() safe

Cc: Ville Syrjala <ville.syrjala@linux.intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/i915/display/intel_bios.c | 123 ++++++++++------------
 drivers/gpu/drm/i915/i915_drv.h           |   3 +-
 2 files changed, 58 insertions(+), 68 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_bios.c b/drivers/gpu/drm/i915/display/intel_bios.c
index c19b234bebe6..7c0ca733bef8 100644
--- a/drivers/gpu/drm/i915/display/intel_bios.c
+++ b/drivers/gpu/drm/i915/display/intel_bios.c
@@ -58,6 +58,12 @@
  * that.
  */
 
+/* Wrapper for VBT child device config */
+struct display_device_data {
+	struct child_device_config child;
+	struct list_head node;
+};
+
 #define	SLAVE_ADDR1	0x70
 #define	SLAVE_ADDR2	0x72
 
@@ -449,8 +455,9 @@ static void
 parse_sdvo_device_mapping(struct drm_i915_private *dev_priv, u8 bdb_version)
 {
 	struct sdvo_device_mapping *mapping;
+	const struct display_device_data *devdata;
 	const struct child_device_config *child;
-	int i, count = 0;
+	int count = 0;
 
 	/*
 	 * Only parse SDVO mappings on gens that could have SDVO. This isn't
@@ -461,8 +468,8 @@ parse_sdvo_device_mapping(struct drm_i915_private *dev_priv, u8 bdb_version)
 		return;
 	}
 
-	for (i = 0, count = 0; i < dev_priv->vbt.child_dev_num; i++) {
-		child = dev_priv->vbt.child_dev + i;
+	list_for_each_entry(devdata, &dev_priv->vbt.display_devices, node) {
+		child = &devdata->child;
 
 		if (child->slave_addr != SLAVE_ADDR1 &&
 		    child->slave_addr != SLAVE_ADDR2) {
@@ -1572,8 +1579,7 @@ static void parse_ddi_port(struct drm_i915_private *dev_priv,
 
 static void parse_ddi_ports(struct drm_i915_private *dev_priv, u8 bdb_version)
 {
-	const struct child_device_config *child;
-	int i;
+	const struct display_device_data *devdata;
 
 	if (!HAS_DDI(dev_priv) && !IS_CHERRYVIEW(dev_priv))
 		return;
@@ -1581,11 +1587,8 @@ static void parse_ddi_ports(struct drm_i915_private *dev_priv, u8 bdb_version)
 	if (bdb_version < 155)
 		return;
 
-	for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {
-		child = dev_priv->vbt.child_dev + i;
-
-		parse_ddi_port(dev_priv, child, bdb_version);
-	}
+	list_for_each_entry(devdata, &dev_priv->vbt.display_devices, node)
+		parse_ddi_port(dev_priv, &devdata->child, bdb_version);
 }
 
 static void
@@ -1593,8 +1596,9 @@ parse_general_definitions(struct drm_i915_private *dev_priv,
 			  const struct bdb_header *bdb)
 {
 	const struct bdb_general_definitions *defs;
+	struct display_device_data *devdata;
 	const struct child_device_config *child;
-	int i, child_device_num, count;
+	int i, child_device_num;
 	u8 expected_size;
 	u16 block_size;
 	int bus_pin;
@@ -1650,26 +1654,7 @@ parse_general_definitions(struct drm_i915_private *dev_priv,
 
 	/* get the number of child device */
 	child_device_num = (block_size - sizeof(*defs)) / defs->child_dev_size;
-	count = 0;
-	/* get the number of child device that is present */
-	for (i = 0; i < child_device_num; i++) {
-		child = child_device_ptr(defs, i);
-		if (!child->device_type)
-			continue;
-		count++;
-	}
-	if (!count) {
-		DRM_DEBUG_KMS("no child dev is parsed from VBT\n");
-		return;
-	}
-	dev_priv->vbt.child_dev = kcalloc(count, sizeof(*child), GFP_KERNEL);
-	if (!dev_priv->vbt.child_dev) {
-		DRM_DEBUG_KMS("No memory space for child device\n");
-		return;
-	}
 
-	dev_priv->vbt.child_dev_num = count;
-	count = 0;
 	for (i = 0; i < child_device_num; i++) {
 		child = child_device_ptr(defs, i);
 		if (!child->device_type)
@@ -1678,15 +1663,23 @@ parse_general_definitions(struct drm_i915_private *dev_priv,
 		DRM_DEBUG_KMS("Found VBT child device with type 0x%x\n",
 			      child->device_type);
 
+		devdata = kzalloc(sizeof(*devdata), GFP_KERNEL);
+		if (!devdata)
+			break;
+
 		/*
 		 * Copy as much as we know (sizeof) and is available
-		 * (child_dev_size) of the child device. Accessing the data must
-		 * depend on VBT version.
+		 * (child_dev_size) of the child device config. Accessing the
+		 * data must depend on VBT version.
 		 */
-		memcpy(dev_priv->vbt.child_dev + count, child,
+		memcpy(&devdata->child, child,
 		       min_t(size_t, defs->child_dev_size, sizeof(*child)));
-		count++;
+
+		list_add_tail(&devdata->node, &dev_priv->vbt.display_devices);
 	}
+
+	if (list_empty(&dev_priv->vbt.display_devices))
+		DRM_DEBUG_KMS("no child dev is parsed from VBT\n");
 }
 
 /* Common defaults which may be overridden by VBT. */
@@ -1836,6 +1829,8 @@ void intel_bios_init(struct drm_i915_private *dev_priv)
 	const struct bdb_header *bdb;
 	u8 __iomem *bios = NULL;
 
+	INIT_LIST_HEAD(&dev_priv->vbt.display_devices);
+
 	if (!HAS_DISPLAY(dev_priv) || !INTEL_DISPLAY_ENABLED(dev_priv)) {
 		DRM_DEBUG_KMS("Skipping VBT init due to disabled display.\n");
 		return;
@@ -1895,9 +1890,13 @@ void intel_bios_init(struct drm_i915_private *dev_priv)
  */
 void intel_bios_driver_remove(struct drm_i915_private *dev_priv)
 {
-	kfree(dev_priv->vbt.child_dev);
-	dev_priv->vbt.child_dev = NULL;
-	dev_priv->vbt.child_dev_num = 0;
+	struct display_device_data *devdata, *n;
+
+	list_for_each_entry_safe(devdata, n, &dev_priv->vbt.display_devices, node) {
+		list_del(&devdata->node);
+		kfree(devdata);
+	}
+
 	kfree(dev_priv->vbt.sdvo_lvds_vbt_mode);
 	dev_priv->vbt.sdvo_lvds_vbt_mode = NULL;
 	kfree(dev_priv->vbt.lfp_lvds_vbt_mode);
@@ -1921,17 +1920,18 @@ void intel_bios_driver_remove(struct drm_i915_private *dev_priv)
  */
 bool intel_bios_is_tv_present(struct drm_i915_private *dev_priv)
 {
+	const struct display_device_data *devdata;
 	const struct child_device_config *child;
-	int i;
 
 	if (!dev_priv->vbt.int_tv_support)
 		return false;
 
-	if (!dev_priv->vbt.child_dev_num)
+	if (list_empty(&dev_priv->vbt.display_devices))
 		return true;
 
-	for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {
-		child = dev_priv->vbt.child_dev + i;
+	list_for_each_entry(devdata, &dev_priv->vbt.display_devices, node) {
+		child = &devdata->child;
+
 		/*
 		 * If the device type is not TV, continue.
 		 */
@@ -1963,14 +1963,14 @@ bool intel_bios_is_tv_present(struct drm_i915_private *dev_priv)
  */
 bool intel_bios_is_lvds_present(struct drm_i915_private *dev_priv, u8 *i2c_pin)
 {
+	const struct display_device_data *devdata;
 	const struct child_device_config *child;
-	int i;
 
-	if (!dev_priv->vbt.child_dev_num)
+	if (list_empty(&dev_priv->vbt.display_devices))
 		return true;
 
-	for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {
-		child = dev_priv->vbt.child_dev + i;
+	list_for_each_entry(devdata, &dev_priv->vbt.display_devices, node) {
+		child = &devdata->child;
 
 		/* If the device type is not LFP, continue.
 		 * We have to check both the new identifiers as well as the
@@ -2012,6 +2012,7 @@ bool intel_bios_is_lvds_present(struct drm_i915_private *dev_priv, u8 *i2c_pin)
  */
 bool intel_bios_is_port_present(struct drm_i915_private *dev_priv, enum port port)
 {
+	const struct display_device_data *devdata;
 	const struct child_device_config *child;
 	static const struct {
 		u16 dp, hdmi;
@@ -2022,7 +2023,6 @@ bool intel_bios_is_port_present(struct drm_i915_private *dev_priv, enum port por
 		[PORT_E] = { DVO_PORT_DPE, DVO_PORT_HDMIE, },
 		[PORT_F] = { DVO_PORT_DPF, DVO_PORT_HDMIF, },
 	};
-	int i;
 
 	if (HAS_DDI(dev_priv)) {
 		const struct ddi_vbt_port_info *port_info =
@@ -2037,11 +2037,8 @@ bool intel_bios_is_port_present(struct drm_i915_private *dev_priv, enum port por
 	if (WARN_ON(port == PORT_A) || port >= ARRAY_SIZE(port_mapping))
 		return false;
 
-	if (!dev_priv->vbt.child_dev_num)
-		return false;
-
-	for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {
-		child = dev_priv->vbt.child_dev + i;
+	list_for_each_entry(devdata, &dev_priv->vbt.display_devices, node) {
+		child = &devdata->child;
 
 		if ((child->dvo_port == port_mapping[port].dp ||
 		     child->dvo_port == port_mapping[port].hdmi) &&
@@ -2062,6 +2059,7 @@ bool intel_bios_is_port_present(struct drm_i915_private *dev_priv, enum port por
  */
 bool intel_bios_is_port_edp(struct drm_i915_private *dev_priv, enum port port)
 {
+	const struct display_device_data *devdata;
 	const struct child_device_config *child;
 	static const short port_mapping[] = {
 		[PORT_B] = DVO_PORT_DPB,
@@ -2070,16 +2068,12 @@ bool intel_bios_is_port_edp(struct drm_i915_private *dev_priv, enum port port)
 		[PORT_E] = DVO_PORT_DPE,
 		[PORT_F] = DVO_PORT_DPF,
 	};
-	int i;
 
 	if (HAS_DDI(dev_priv))
 		return dev_priv->vbt.ddi_port_info[port].supports_edp;
 
-	if (!dev_priv->vbt.child_dev_num)
-		return false;
-
-	for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {
-		child = dev_priv->vbt.child_dev + i;
+	list_for_each_entry(devdata, &dev_priv->vbt.display_devices, node) {
+		child = &devdata->child;
 
 		if (child->dvo_port == port_mapping[port] &&
 		    (child->device_type & DEVICE_TYPE_eDP_BITS) ==
@@ -2128,13 +2122,10 @@ static bool child_dev_is_dp_dual_mode(const struct child_device_config *child,
 bool intel_bios_is_port_dp_dual_mode(struct drm_i915_private *dev_priv,
 				     enum port port)
 {
-	const struct child_device_config *child;
-	int i;
+	const struct display_device_data *devdata;
 
-	for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {
-		child = dev_priv->vbt.child_dev + i;
-
-		if (child_dev_is_dp_dual_mode(child, port))
+	list_for_each_entry(devdata, &dev_priv->vbt.display_devices, node) {
+		if (child_dev_is_dp_dual_mode(&devdata->child, port))
 			return true;
 	}
 
@@ -2151,12 +2142,12 @@ bool intel_bios_is_port_dp_dual_mode(struct drm_i915_private *dev_priv,
 bool intel_bios_is_dsi_present(struct drm_i915_private *dev_priv,
 			       enum port *port)
 {
+	const struct display_device_data *devdata;
 	const struct child_device_config *child;
 	u8 dvo_port;
-	int i;
 
-	for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {
-		child = dev_priv->vbt.child_dev + i;
+	list_for_each_entry(devdata, &dev_priv->vbt.display_devices, node) {
+		child = &devdata->child;
 
 		if (!(child->device_type & DEVICE_TYPE_MIPI_OUTPUT))
 			continue;
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 67bdfe6de3fa..2c0674a86dd8 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -720,8 +720,7 @@ struct intel_vbt_data {
 
 	int crt_ddc_pin;
 
-	int child_dev_num;
-	struct child_device_config *child_dev;
+	struct list_head display_devices;
 
 	struct ddi_vbt_port_info ddi_port_info[I915_MAX_PORTS];
 	struct sdvo_device_mapping sdvo_mappings[2];
-- 
2.20.1

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[Intel-gfx] [PATCH 2/9] drm/i915/bios: store child devices in a list

[Jani Nikula]

Using the array is getting clumsy. Make things a bit more dynamic.

Remove early returns on not having child devices when the end result
after "iterating" the empty list would be the same.

v3:
- use list_add_tail to not reverse the child device list (Ville)

v2:
- stick to previous naming of child devices (Ville)
- use kzalloc, handle failure
- initialize list head earlier to keep intel_bios_driver_remove() safe

Cc: Ville Syrjala <ville.syrjala@linux.intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/i915/display/intel_bios.c | 123 ++++++++++------------
 drivers/gpu/drm/i915/i915_drv.h           |   3 +-
 2 files changed, 58 insertions(+), 68 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_bios.c b/drivers/gpu/drm/i915/display/intel_bios.c
index c19b234bebe6..7c0ca733bef8 100644
--- a/drivers/gpu/drm/i915/display/intel_bios.c
+++ b/drivers/gpu/drm/i915/display/intel_bios.c
@@ -58,6 +58,12 @@
  * that.
  */
 
+/* Wrapper for VBT child device config */
+struct display_device_data {
+	struct child_device_config child;
+	struct list_head node;
+};
+
 #define	SLAVE_ADDR1	0x70
 #define	SLAVE_ADDR2	0x72
 
@@ -449,8 +455,9 @@ static void
 parse_sdvo_device_mapping(struct drm_i915_private *dev_priv, u8 bdb_version)
 {
 	struct sdvo_device_mapping *mapping;
+	const struct display_device_data *devdata;
 	const struct child_device_config *child;
-	int i, count = 0;
+	int count = 0;
 
 	/*
 	 * Only parse SDVO mappings on gens that could have SDVO. This isn't
@@ -461,8 +468,8 @@ parse_sdvo_device_mapping(struct drm_i915_private *dev_priv, u8 bdb_version)
 		return;
 	}
 
-	for (i = 0, count = 0; i < dev_priv->vbt.child_dev_num; i++) {
-		child = dev_priv->vbt.child_dev + i;
+	list_for_each_entry(devdata, &dev_priv->vbt.display_devices, node) {
+		child = &devdata->child;
 
 		if (child->slave_addr != SLAVE_ADDR1 &&
 		    child->slave_addr != SLAVE_ADDR2) {
@@ -1572,8 +1579,7 @@ static void parse_ddi_port(struct drm_i915_private *dev_priv,
 
 static void parse_ddi_ports(struct drm_i915_private *dev_priv, u8 bdb_version)
 {
-	const struct child_device_config *child;
-	int i;
+	const struct display_device_data *devdata;
 
 	if (!HAS_DDI(dev_priv) && !IS_CHERRYVIEW(dev_priv))
 		return;
@@ -1581,11 +1587,8 @@ static void parse_ddi_ports(struct drm_i915_private *dev_priv, u8 bdb_version)
 	if (bdb_version < 155)
 		return;
 
-	for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {
-		child = dev_priv->vbt.child_dev + i;
-
-		parse_ddi_port(dev_priv, child, bdb_version);
-	}
+	list_for_each_entry(devdata, &dev_priv->vbt.display_devices, node)
+		parse_ddi_port(dev_priv, &devdata->child, bdb_version);
 }
 
 static void
@@ -1593,8 +1596,9 @@ parse_general_definitions(struct drm_i915_private *dev_priv,
 			  const struct bdb_header *bdb)
 {
 	const struct bdb_general_definitions *defs;
+	struct display_device_data *devdata;
 	const struct child_device_config *child;
-	int i, child_device_num, count;
+	int i, child_device_num;
 	u8 expected_size;
 	u16 block_size;
 	int bus_pin;
@@ -1650,26 +1654,7 @@ parse_general_definitions(struct drm_i915_private *dev_priv,
 
 	/* get the number of child device */
 	child_device_num = (block_size - sizeof(*defs)) / defs->child_dev_size;
-	count = 0;
-	/* get the number of child device that is present */
-	for (i = 0; i < child_device_num; i++) {
-		child = child_device_ptr(defs, i);
-		if (!child->device_type)
-			continue;
-		count++;
-	}
-	if (!count) {
-		DRM_DEBUG_KMS("no child dev is parsed from VBT\n");
-		return;
-	}
-	dev_priv->vbt.child_dev = kcalloc(count, sizeof(*child), GFP_KERNEL);
-	if (!dev_priv->vbt.child_dev) {
-		DRM_DEBUG_KMS("No memory space for child device\n");
-		return;
-	}
 
-	dev_priv->vbt.child_dev_num = count;
-	count = 0;
 	for (i = 0; i < child_device_num; i++) {
 		child = child_device_ptr(defs, i);
 		if (!child->device_type)
@@ -1678,15 +1663,23 @@ parse_general_definitions(struct drm_i915_private *dev_priv,
 		DRM_DEBUG_KMS("Found VBT child device with type 0x%x\n",
 			      child->device_type);
 
+		devdata = kzalloc(sizeof(*devdata), GFP_KERNEL);
+		if (!devdata)
+			break;
+
 		/*
 		 * Copy as much as we know (sizeof) and is available
-		 * (child_dev_size) of the child device. Accessing the data must
-		 * depend on VBT version.
+		 * (child_dev_size) of the child device config. Accessing the
+		 * data must depend on VBT version.
 		 */
-		memcpy(dev_priv->vbt.child_dev + count, child,
+		memcpy(&devdata->child, child,
 		       min_t(size_t, defs->child_dev_size, sizeof(*child)));
-		count++;
+
+		list_add_tail(&devdata->node, &dev_priv->vbt.display_devices);
 	}
+
+	if (list_empty(&dev_priv->vbt.display_devices))
+		DRM_DEBUG_KMS("no child dev is parsed from VBT\n");
 }
 
 /* Common defaults which may be overridden by VBT. */
@@ -1836,6 +1829,8 @@ void intel_bios_init(struct drm_i915_private *dev_priv)
 	const struct bdb_header *bdb;
 	u8 __iomem *bios = NULL;
 
+	INIT_LIST_HEAD(&dev_priv->vbt.display_devices);
+
 	if (!HAS_DISPLAY(dev_priv) || !INTEL_DISPLAY_ENABLED(dev_priv)) {
 		DRM_DEBUG_KMS("Skipping VBT init due to disabled display.\n");
 		return;
@@ -1895,9 +1890,13 @@ void intel_bios_init(struct drm_i915_private *dev_priv)
  */
 void intel_bios_driver_remove(struct drm_i915_private *dev_priv)
 {
-	kfree(dev_priv->vbt.child_dev);
-	dev_priv->vbt.child_dev = NULL;
-	dev_priv->vbt.child_dev_num = 0;
+	struct display_device_data *devdata, *n;
+
+	list_for_each_entry_safe(devdata, n, &dev_priv->vbt.display_devices, node) {
+		list_del(&devdata->node);
+		kfree(devdata);
+	}
+
 	kfree(dev_priv->vbt.sdvo_lvds_vbt_mode);
 	dev_priv->vbt.sdvo_lvds_vbt_mode = NULL;
 	kfree(dev_priv->vbt.lfp_lvds_vbt_mode);
@@ -1921,17 +1920,18 @@ void intel_bios_driver_remove(struct drm_i915_private *dev_priv)
  */
 bool intel_bios_is_tv_present(struct drm_i915_private *dev_priv)
 {
+	const struct display_device_data *devdata;
 	const struct child_device_config *child;
-	int i;
 
 	if (!dev_priv->vbt.int_tv_support)
 		return false;
 
-	if (!dev_priv->vbt.child_dev_num)
+	if (list_empty(&dev_priv->vbt.display_devices))
 		return true;
 
-	for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {
-		child = dev_priv->vbt.child_dev + i;
+	list_for_each_entry(devdata, &dev_priv->vbt.display_devices, node) {
+		child = &devdata->child;
+
 		/*
 		 * If the device type is not TV, continue.
 		 */
@@ -1963,14 +1963,14 @@ bool intel_bios_is_tv_present(struct drm_i915_private *dev_priv)
  */
 bool intel_bios_is_lvds_present(struct drm_i915_private *dev_priv, u8 *i2c_pin)
 {
+	const struct display_device_data *devdata;
 	const struct child_device_config *child;
-	int i;
 
-	if (!dev_priv->vbt.child_dev_num)
+	if (list_empty(&dev_priv->vbt.display_devices))
 		return true;
 
-	for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {
-		child = dev_priv->vbt.child_dev + i;
+	list_for_each_entry(devdata, &dev_priv->vbt.display_devices, node) {
+		child = &devdata->child;
 
 		/* If the device type is not LFP, continue.
 		 * We have to check both the new identifiers as well as the
@@ -2012,6 +2012,7 @@ bool intel_bios_is_lvds_present(struct drm_i915_private *dev_priv, u8 *i2c_pin)
  */
 bool intel_bios_is_port_present(struct drm_i915_private *dev_priv, enum port port)
 {
+	const struct display_device_data *devdata;
 	const struct child_device_config *child;
 	static const struct {
 		u16 dp, hdmi;
@@ -2022,7 +2023,6 @@ bool intel_bios_is_port_present(struct drm_i915_private *dev_priv, enum port por
 		[PORT_E] = { DVO_PORT_DPE, DVO_PORT_HDMIE, },
 		[PORT_F] = { DVO_PORT_DPF, DVO_PORT_HDMIF, },
 	};
-	int i;
 
 	if (HAS_DDI(dev_priv)) {
 		const struct ddi_vbt_port_info *port_info =
@@ -2037,11 +2037,8 @@ bool intel_bios_is_port_present(struct drm_i915_private *dev_priv, enum port por
 	if (WARN_ON(port == PORT_A) || port >= ARRAY_SIZE(port_mapping))
 		return false;
 
-	if (!dev_priv->vbt.child_dev_num)
-		return false;
-
-	for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {
-		child = dev_priv->vbt.child_dev + i;
+	list_for_each_entry(devdata, &dev_priv->vbt.display_devices, node) {
+		child = &devdata->child;
 
 		if ((child->dvo_port == port_mapping[port].dp ||
 		     child->dvo_port == port_mapping[port].hdmi) &&
@@ -2062,6 +2059,7 @@ bool intel_bios_is_port_present(struct drm_i915_private *dev_priv, enum port por
  */
 bool intel_bios_is_port_edp(struct drm_i915_private *dev_priv, enum port port)
 {
+	const struct display_device_data *devdata;
 	const struct child_device_config *child;
 	static const short port_mapping[] = {
 		[PORT_B] = DVO_PORT_DPB,
@@ -2070,16 +2068,12 @@ bool intel_bios_is_port_edp(struct drm_i915_private *dev_priv, enum port port)
 		[PORT_E] = DVO_PORT_DPE,
 		[PORT_F] = DVO_PORT_DPF,
 	};
-	int i;
 
 	if (HAS_DDI(dev_priv))
 		return dev_priv->vbt.ddi_port_info[port].supports_edp;
 
-	if (!dev_priv->vbt.child_dev_num)
-		return false;
-
-	for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {
-		child = dev_priv->vbt.child_dev + i;
+	list_for_each_entry(devdata, &dev_priv->vbt.display_devices, node) {
+		child = &devdata->child;
 
 		if (child->dvo_port == port_mapping[port] &&
 		    (child->device_type & DEVICE_TYPE_eDP_BITS) ==
@@ -2128,13 +2122,10 @@ static bool child_dev_is_dp_dual_mode(const struct child_device_config *child,
 bool intel_bios_is_port_dp_dual_mode(struct drm_i915_private *dev_priv,
 				     enum port port)
 {
-	const struct child_device_config *child;
-	int i;
+	const struct display_device_data *devdata;
 
-	for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {
-		child = dev_priv->vbt.child_dev + i;
-
-		if (child_dev_is_dp_dual_mode(child, port))
+	list_for_each_entry(devdata, &dev_priv->vbt.display_devices, node) {
+		if (child_dev_is_dp_dual_mode(&devdata->child, port))
 			return true;
 	}
 
@@ -2151,12 +2142,12 @@ bool intel_bios_is_port_dp_dual_mode(struct drm_i915_private *dev_priv,
 bool intel_bios_is_dsi_present(struct drm_i915_private *dev_priv,
 			       enum port *port)
 {
+	const struct display_device_data *devdata;
 	const struct child_device_config *child;
 	u8 dvo_port;
-	int i;
 
-	for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {
-		child = dev_priv->vbt.child_dev + i;
+	list_for_each_entry(devdata, &dev_priv->vbt.display_devices, node) {
+		child = &devdata->child;
 
 		if (!(child->device_type & DEVICE_TYPE_MIPI_OUTPUT))
 			continue;
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 67bdfe6de3fa..2c0674a86dd8 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -720,8 +720,7 @@ struct intel_vbt_data {
 
 	int crt_ddc_pin;
 
-	int child_dev_num;
-	struct child_device_config *child_dev;
+	struct list_head display_devices;
 
 	struct ddi_vbt_port_info ddi_port_info[I915_MAX_PORTS];
 	struct sdvo_device_mapping sdvo_mappings[2];
-- 
2.20.1

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[PATCH 3/9] drm/i915/bios: pass devdata to parse_ddi_port

[Jani Nikula]

Allow accessing the parent structure later on. Drop const for allowing
future modification as well.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/i915/display/intel_bios.c | 7 ++++---
 1 file changed, 4 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_bios.c b/drivers/gpu/drm/i915/display/intel_bios.c
index 7c0ca733bef8..12d2fb0156b4 100644
--- a/drivers/gpu/drm/i915/display/intel_bios.c
+++ b/drivers/gpu/drm/i915/display/intel_bios.c
@@ -1425,9 +1425,10 @@ static enum port dvo_port_to_port(u8 dvo_port)
 }
 
 static void parse_ddi_port(struct drm_i915_private *dev_priv,
-			   const struct child_device_config *child,
+			   struct display_device_data *devdata,
 			   u8 bdb_version)
 {
+	const struct child_device_config *child = &devdata->child;
 	struct ddi_vbt_port_info *info;
 	bool is_dvi, is_hdmi, is_dp, is_edp, is_crt;
 	enum port port;
@@ -1579,7 +1580,7 @@ static void parse_ddi_port(struct drm_i915_private *dev_priv,
 
 static void parse_ddi_ports(struct drm_i915_private *dev_priv, u8 bdb_version)
 {
-	const struct display_device_data *devdata;
+	struct display_device_data *devdata;
 
 	if (!HAS_DDI(dev_priv) && !IS_CHERRYVIEW(dev_priv))
 		return;
@@ -1588,7 +1589,7 @@ static void parse_ddi_ports(struct drm_i915_private *dev_priv, u8 bdb_version)
 		return;
 
 	list_for_each_entry(devdata, &dev_priv->vbt.display_devices, node)
-		parse_ddi_port(dev_priv, &devdata->child, bdb_version);
+		parse_ddi_port(dev_priv, devdata, bdb_version);
 }
 
 static void
-- 
2.20.1

_______________________________________________
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https://lists.freedesktop.org/mailman/listinfo/intel-gfx

[Intel-gfx] [PATCH 3/9] drm/i915/bios: pass devdata to parse_ddi_port

[Jani Nikula]

Allow accessing the parent structure later on. Drop const for allowing
future modification as well.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/i915/display/intel_bios.c | 7 ++++---
 1 file changed, 4 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_bios.c b/drivers/gpu/drm/i915/display/intel_bios.c
index 7c0ca733bef8..12d2fb0156b4 100644
--- a/drivers/gpu/drm/i915/display/intel_bios.c
+++ b/drivers/gpu/drm/i915/display/intel_bios.c
@@ -1425,9 +1425,10 @@ static enum port dvo_port_to_port(u8 dvo_port)
 }
 
 static void parse_ddi_port(struct drm_i915_private *dev_priv,
-			   const struct child_device_config *child,
+			   struct display_device_data *devdata,
 			   u8 bdb_version)
 {
+	const struct child_device_config *child = &devdata->child;
 	struct ddi_vbt_port_info *info;
 	bool is_dvi, is_hdmi, is_dp, is_edp, is_crt;
 	enum port port;
@@ -1579,7 +1580,7 @@ static void parse_ddi_port(struct drm_i915_private *dev_priv,
 
 static void parse_ddi_ports(struct drm_i915_private *dev_priv, u8 bdb_version)
 {
-	const struct display_device_data *devdata;
+	struct display_device_data *devdata;
 
 	if (!HAS_DDI(dev_priv) && !IS_CHERRYVIEW(dev_priv))
 		return;
@@ -1588,7 +1589,7 @@ static void parse_ddi_ports(struct drm_i915_private *dev_priv, u8 bdb_version)
 		return;
 
 	list_for_each_entry(devdata, &dev_priv->vbt.display_devices, node)
-		parse_ddi_port(dev_priv, &devdata->child, bdb_version);
+		parse_ddi_port(dev_priv, devdata, bdb_version);
 }
 
 static void
-- 
2.20.1

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[PATCH 4/9] drm/i915/bios: parse compression parameters block

[Jani Nikula]

Check for child devices that specify compression, and store the device
specific compression parameters in the display device data struct for
later use. Warn if compression is requested but not available.

Use fairly rigid checks for compression data for starters. These can be
made more dynamic later.

Log about DSC presence in DDI port parse, though this is not universal
across platforms.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/i915/display/intel_bios.c     | 61 ++++++++++++++++++-
 drivers/gpu/drm/i915/display/intel_vbt_defs.h |  2 +-
 2 files changed, 60 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_bios.c b/drivers/gpu/drm/i915/display/intel_bios.c
index 12d2fb0156b4..51068a0a1c42 100644
--- a/drivers/gpu/drm/i915/display/intel_bios.c
+++ b/drivers/gpu/drm/i915/display/intel_bios.c
@@ -61,6 +61,7 @@
 /* Wrapper for VBT child device config */
 struct display_device_data {
 	struct child_device_config child;
+	struct dsc_compression_parameters_entry *dsc;
 	struct list_head node;
 };
 
@@ -1237,6 +1238,57 @@ parse_mipi_sequence(struct drm_i915_private *dev_priv,
 	memset(dev_priv->vbt.dsi.sequence, 0, sizeof(dev_priv->vbt.dsi.sequence));
 }
 
+static void
+parse_compression_parameters(struct drm_i915_private *i915,
+			     const struct bdb_header *bdb)
+{
+	const struct bdb_compression_parameters *params;
+	struct display_device_data *devdata;
+	const struct child_device_config *child;
+	u16 block_size;
+	int index;
+
+	if (bdb->version < 198)
+		return;
+
+	params = find_section(bdb, BDB_COMPRESSION_PARAMETERS);
+	if (params) {
+		/* Sanity checks */
+		if (params->entry_size != sizeof(params->data[0])) {
+			DRM_DEBUG_KMS("unsupported compression param entry size\n");
+			return;
+		}
+
+		block_size = get_blocksize(params);
+		if (block_size < sizeof(*params)) {
+			DRM_DEBUG_KMS("expecting 16 compression param entries\n");
+			return;
+		}
+	}
+
+	list_for_each_entry(devdata, &i915->vbt.display_devices, node) {
+		child = &devdata->child;
+
+		if (!child->compression_enable)
+			continue;
+
+		if (!params) {
+			DRM_DEBUG_KMS("child wants compression, unavailable\n");
+			continue;
+		}
+
+		if (child->compression_method_cps) {
+			DRM_DEBUG_KMS("CPS compression not supported\n");
+			continue;
+		}
+
+		index = child->compression_structure_index;
+
+		devdata->dsc = kmemdup(&params->data[index],
+				       sizeof(*devdata->dsc), GFP_KERNEL);
+	}
+}
+
 static u8 translate_iboost(u8 val)
 {
 	static const u8 mapping[] = { 1, 3, 7 }; /* See VBT spec */
@@ -1469,10 +1521,11 @@ static void parse_ddi_port(struct drm_i915_private *dev_priv,
 	if (bdb_version >= 209)
 		info->supports_tbt = child->tbt;
 
-	DRM_DEBUG_KMS("Port %c VBT info: CRT:%d DVI:%d HDMI:%d DP:%d eDP:%d LSPCON:%d USB-Type-C:%d TBT:%d\n",
+	DRM_DEBUG_KMS("Port %c VBT info: CRT:%d DVI:%d HDMI:%d DP:%d eDP:%d LSPCON:%d USB-Type-C:%d TBT:%d DSC:%d\n",
 		      port_name(port), is_crt, is_dvi, is_hdmi, is_dp, is_edp,
 		      HAS_LSPCON(dev_priv) && child->lspcon,
-		      info->supports_typec_usb, info->supports_tbt);
+		      info->supports_typec_usb, info->supports_tbt,
+		      devdata->dsc != NULL);
 
 	if (is_edp && is_dvi)
 		DRM_DEBUG_KMS("Internal DP port %c is TMDS compatible\n",
@@ -1871,6 +1924,9 @@ void intel_bios_init(struct drm_i915_private *dev_priv)
 	parse_mipi_config(dev_priv, bdb);
 	parse_mipi_sequence(dev_priv, bdb);
 
+	/* Depends on child device list */
+	parse_compression_parameters(dev_priv, bdb);
+
 	/* Further processing on pre-parsed data */
 	parse_sdvo_device_mapping(dev_priv, bdb->version);
 	parse_ddi_ports(dev_priv, bdb->version);
@@ -1895,6 +1951,7 @@ void intel_bios_driver_remove(struct drm_i915_private *dev_priv)
 
 	list_for_each_entry_safe(devdata, n, &dev_priv->vbt.display_devices, node) {
 		list_del(&devdata->node);
+		kfree(devdata->dsc);
 		kfree(devdata);
 	}
 
diff --git a/drivers/gpu/drm/i915/display/intel_vbt_defs.h b/drivers/gpu/drm/i915/display/intel_vbt_defs.h
index 69a7cb1fa121..372d8b62ba1a 100644
--- a/drivers/gpu/drm/i915/display/intel_vbt_defs.h
+++ b/drivers/gpu/drm/i915/display/intel_vbt_defs.h
@@ -368,7 +368,7 @@ struct child_device_config {
 			u16 dtd_buf_ptr;			/* 161 */
 			u8 edidless_efp:1;			/* 161 */
 			u8 compression_enable:1;		/* 198 */
-			u8 compression_method:1;		/* 198 */
+			u8 compression_method_cps:1;		/* 198 */
 			u8 ganged_edp:1;			/* 202 */
 			u8 reserved0:4;
 			u8 compression_structure_index:4;	/* 198 */
-- 
2.20.1

_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

[Intel-gfx] [PATCH 4/9] drm/i915/bios: parse compression parameters block

[Jani Nikula]

Check for child devices that specify compression, and store the device
specific compression parameters in the display device data struct for
later use. Warn if compression is requested but not available.

Use fairly rigid checks for compression data for starters. These can be
made more dynamic later.

Log about DSC presence in DDI port parse, though this is not universal
across platforms.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/i915/display/intel_bios.c     | 61 ++++++++++++++++++-
 drivers/gpu/drm/i915/display/intel_vbt_defs.h |  2 +-
 2 files changed, 60 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_bios.c b/drivers/gpu/drm/i915/display/intel_bios.c
index 12d2fb0156b4..51068a0a1c42 100644
--- a/drivers/gpu/drm/i915/display/intel_bios.c
+++ b/drivers/gpu/drm/i915/display/intel_bios.c
@@ -61,6 +61,7 @@
 /* Wrapper for VBT child device config */
 struct display_device_data {
 	struct child_device_config child;
+	struct dsc_compression_parameters_entry *dsc;
 	struct list_head node;
 };
 
@@ -1237,6 +1238,57 @@ parse_mipi_sequence(struct drm_i915_private *dev_priv,
 	memset(dev_priv->vbt.dsi.sequence, 0, sizeof(dev_priv->vbt.dsi.sequence));
 }
 
+static void
+parse_compression_parameters(struct drm_i915_private *i915,
+			     const struct bdb_header *bdb)
+{
+	const struct bdb_compression_parameters *params;
+	struct display_device_data *devdata;
+	const struct child_device_config *child;
+	u16 block_size;
+	int index;
+
+	if (bdb->version < 198)
+		return;
+
+	params = find_section(bdb, BDB_COMPRESSION_PARAMETERS);
+	if (params) {
+		/* Sanity checks */
+		if (params->entry_size != sizeof(params->data[0])) {
+			DRM_DEBUG_KMS("unsupported compression param entry size\n");
+			return;
+		}
+
+		block_size = get_blocksize(params);
+		if (block_size < sizeof(*params)) {
+			DRM_DEBUG_KMS("expecting 16 compression param entries\n");
+			return;
+		}
+	}
+
+	list_for_each_entry(devdata, &i915->vbt.display_devices, node) {
+		child = &devdata->child;
+
+		if (!child->compression_enable)
+			continue;
+
+		if (!params) {
+			DRM_DEBUG_KMS("child wants compression, unavailable\n");
+			continue;
+		}
+
+		if (child->compression_method_cps) {
+			DRM_DEBUG_KMS("CPS compression not supported\n");
+			continue;
+		}
+
+		index = child->compression_structure_index;
+
+		devdata->dsc = kmemdup(&params->data[index],
+				       sizeof(*devdata->dsc), GFP_KERNEL);
+	}
+}
+
 static u8 translate_iboost(u8 val)
 {
 	static const u8 mapping[] = { 1, 3, 7 }; /* See VBT spec */
@@ -1469,10 +1521,11 @@ static void parse_ddi_port(struct drm_i915_private *dev_priv,
 	if (bdb_version >= 209)
 		info->supports_tbt = child->tbt;
 
-	DRM_DEBUG_KMS("Port %c VBT info: CRT:%d DVI:%d HDMI:%d DP:%d eDP:%d LSPCON:%d USB-Type-C:%d TBT:%d\n",
+	DRM_DEBUG_KMS("Port %c VBT info: CRT:%d DVI:%d HDMI:%d DP:%d eDP:%d LSPCON:%d USB-Type-C:%d TBT:%d DSC:%d\n",
 		      port_name(port), is_crt, is_dvi, is_hdmi, is_dp, is_edp,
 		      HAS_LSPCON(dev_priv) && child->lspcon,
-		      info->supports_typec_usb, info->supports_tbt);
+		      info->supports_typec_usb, info->supports_tbt,
+		      devdata->dsc != NULL);
 
 	if (is_edp && is_dvi)
 		DRM_DEBUG_KMS("Internal DP port %c is TMDS compatible\n",
@@ -1871,6 +1924,9 @@ void intel_bios_init(struct drm_i915_private *dev_priv)
 	parse_mipi_config(dev_priv, bdb);
 	parse_mipi_sequence(dev_priv, bdb);
 
+	/* Depends on child device list */
+	parse_compression_parameters(dev_priv, bdb);
+
 	/* Further processing on pre-parsed data */
 	parse_sdvo_device_mapping(dev_priv, bdb->version);
 	parse_ddi_ports(dev_priv, bdb->version);
@@ -1895,6 +1951,7 @@ void intel_bios_driver_remove(struct drm_i915_private *dev_priv)
 
 	list_for_each_entry_safe(devdata, n, &dev_priv->vbt.display_devices, node) {
 		list_del(&devdata->node);
+		kfree(devdata->dsc);
 		kfree(devdata);
 	}
 
diff --git a/drivers/gpu/drm/i915/display/intel_vbt_defs.h b/drivers/gpu/drm/i915/display/intel_vbt_defs.h
index 69a7cb1fa121..372d8b62ba1a 100644
--- a/drivers/gpu/drm/i915/display/intel_vbt_defs.h
+++ b/drivers/gpu/drm/i915/display/intel_vbt_defs.h
@@ -368,7 +368,7 @@ struct child_device_config {
 			u16 dtd_buf_ptr;			/* 161 */
 			u8 edidless_efp:1;			/* 161 */
 			u8 compression_enable:1;		/* 198 */
-			u8 compression_method:1;		/* 198 */
+			u8 compression_method_cps:1;		/* 198 */
 			u8 ganged_edp:1;			/* 202 */
 			u8 reserved0:4;
 			u8 compression_structure_index:4;	/* 198 */
-- 
2.20.1

_______________________________________________
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https://lists.freedesktop.org/mailman/listinfo/intel-gfx

[PATCH 5/9] drm/i915/bios: add support for querying DSC details for encoder

[Jani Nikula]

Add function for retrieving the DSC data for an encoder.

Initially, this is DSI specific, as DP does not use VBT settings for DSC
at all. It's also not very pretty.

In the future we might have a pointer from encoder to the child device,
which would make the child device list query here so much more sensible.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/i915/display/intel_bios.c | 86 +++++++++++++++++++++++
 drivers/gpu/drm/i915/display/intel_bios.h |  5 ++
 2 files changed, 91 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/intel_bios.c b/drivers/gpu/drm/i915/display/intel_bios.c
index 51068a0a1c42..522c399753fe 100644
--- a/drivers/gpu/drm/i915/display/intel_bios.c
+++ b/drivers/gpu/drm/i915/display/intel_bios.c
@@ -29,6 +29,7 @@
 #include <drm/i915_drm.h>
 
 #include "display/intel_display.h"
+#include "display/intel_display_types.h"
 #include "display/intel_gmbus.h"
 
 #include "i915_drv.h"
@@ -2229,6 +2230,91 @@ bool intel_bios_is_dsi_present(struct drm_i915_private *dev_priv,
 	return false;
 }
 
+static void fill_dsc(struct intel_crtc_state *pipe_config,
+		     struct dsc_compression_parameters_entry *dsc,
+		     int dsc_max_bpc)
+{
+	struct drm_dsc_config *vdsc_cfg = &pipe_config->dsc.config;
+	int bpc = 8;
+
+	vdsc_cfg->dsc_version_major = dsc->version_major;
+	vdsc_cfg->dsc_version_minor = dsc->version_minor;
+
+	if (dsc->support_12bpc && dsc_max_bpc >= 12)
+		bpc = 12;
+	else if (dsc->support_10bpc && dsc_max_bpc >= 10)
+		bpc = 10;
+	else if (dsc->support_8bpc && dsc_max_bpc >= 8)
+		bpc = 8;
+	else
+		DRM_DEBUG_KMS("Unsupported BPC for DCS\n"); /* FIXME */
+
+	pipe_config->pipe_bpp = bpc * 3;
+
+	pipe_config->dsc.compressed_bpp = min(pipe_config->pipe_bpp,
+					      VBT_DSC_MAX_BPP(dsc->max_bpp));
+
+	/*
+	 * FIXME: This is ugly, and slice count should take DSC engine
+	 * throughput etc. into account.
+	 *
+	 * Also, per spec DSI supports 1, 2, 3 or 4 horizontal slices.
+	 */
+	if (dsc->slices_per_line & BIT(2) &&
+	    pipe_config->hw.adjusted_mode.crtc_hdisplay % 4 == 0) {
+		pipe_config->dsc.slice_count = 4;
+	} else if (dsc->slices_per_line & BIT(1) &&
+		   pipe_config->hw.adjusted_mode.crtc_hdisplay % 2 == 0) {
+		pipe_config->dsc.slice_count = 2;
+	} else {
+		/* FIXME */
+		if (!(dsc->slices_per_line & BIT(0)))
+			DRM_DEBUG_KMS("Unsupported slice count for DSI DCS\n");
+
+		pipe_config->dsc.slice_count = 1;
+	}
+
+	/* FIXME: rc_buffer_block_size, using defaults in intel_vdsc.c */
+
+	/* FIXME: rc_buffer_size, using defaults in intel_vdsc.c */
+
+	/* FIXME: DSI spec says bpc + 1 for this one */
+	vdsc_cfg->line_buf_depth = VBT_DSC_LINE_BUFFER_DEPTH(dsc->line_buffer_depth);
+
+	vdsc_cfg->block_pred_enable = dsc->block_prediction_enable;
+
+	vdsc_cfg->slice_height = dsc->slice_height;
+}
+
+/* FIXME: initially DSI specific */
+bool intel_bios_get_dsc_params(struct intel_encoder *encoder,
+			       struct intel_crtc_state *pipe_config,
+			       int dsc_max_bpc)
+{
+	struct drm_i915_private *i915 = to_i915(encoder->base.dev);
+	const struct display_device_data *devdata;
+	const struct child_device_config *child;
+
+	list_for_each_entry(devdata, &i915->vbt.display_devices, node) {
+		child = &devdata->child;
+
+		if (!(child->device_type & DEVICE_TYPE_MIPI_OUTPUT))
+			continue;
+
+		if (child->dvo_port - DVO_PORT_MIPIA == encoder->port) {
+			if (!devdata->dsc)
+				return false;
+
+			if (pipe_config)
+				fill_dsc(pipe_config, devdata->dsc, dsc_max_bpc);
+
+			return true;
+		}
+	}
+
+	return true;
+}
+
 /**
  * intel_bios_is_port_hpd_inverted - is HPD inverted for %port
  * @i915:	i915 device instance
diff --git a/drivers/gpu/drm/i915/display/intel_bios.h b/drivers/gpu/drm/i915/display/intel_bios.h
index 98f064828a57..fe1a11d3d6b6 100644
--- a/drivers/gpu/drm/i915/display/intel_bios.h
+++ b/drivers/gpu/drm/i915/display/intel_bios.h
@@ -35,6 +35,8 @@
 #include <drm/i915_drm.h>
 
 struct drm_i915_private;
+struct intel_crtc_state;
+struct intel_encoder;
 enum port;
 
 enum intel_backlight_type {
@@ -242,5 +244,8 @@ bool intel_bios_is_port_hpd_inverted(const struct drm_i915_private *i915,
 bool intel_bios_is_lspcon_present(const struct drm_i915_private *i915,
 				  enum port port);
 enum aux_ch intel_bios_port_aux_ch(struct drm_i915_private *dev_priv, enum port port);
+bool intel_bios_get_dsc_params(struct intel_encoder *encoder,
+			       struct intel_crtc_state *pipe_config,
+			       int dsc_max_bpc);
 
 #endif /* _INTEL_BIOS_H_ */
-- 
2.20.1

_______________________________________________
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https://lists.freedesktop.org/mailman/listinfo/intel-gfx

[Intel-gfx] [PATCH 5/9] drm/i915/bios: add support for querying DSC details for encoder

[Jani Nikula]

Add function for retrieving the DSC data for an encoder.

Initially, this is DSI specific, as DP does not use VBT settings for DSC
at all. It's also not very pretty.

In the future we might have a pointer from encoder to the child device,
which would make the child device list query here so much more sensible.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/i915/display/intel_bios.c | 86 +++++++++++++++++++++++
 drivers/gpu/drm/i915/display/intel_bios.h |  5 ++
 2 files changed, 91 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/intel_bios.c b/drivers/gpu/drm/i915/display/intel_bios.c
index 51068a0a1c42..522c399753fe 100644
--- a/drivers/gpu/drm/i915/display/intel_bios.c
+++ b/drivers/gpu/drm/i915/display/intel_bios.c
@@ -29,6 +29,7 @@
 #include <drm/i915_drm.h>
 
 #include "display/intel_display.h"
+#include "display/intel_display_types.h"
 #include "display/intel_gmbus.h"
 
 #include "i915_drv.h"
@@ -2229,6 +2230,91 @@ bool intel_bios_is_dsi_present(struct drm_i915_private *dev_priv,
 	return false;
 }
 
+static void fill_dsc(struct intel_crtc_state *pipe_config,
+		     struct dsc_compression_parameters_entry *dsc,
+		     int dsc_max_bpc)
+{
+	struct drm_dsc_config *vdsc_cfg = &pipe_config->dsc.config;
+	int bpc = 8;
+
+	vdsc_cfg->dsc_version_major = dsc->version_major;
+	vdsc_cfg->dsc_version_minor = dsc->version_minor;
+
+	if (dsc->support_12bpc && dsc_max_bpc >= 12)
+		bpc = 12;
+	else if (dsc->support_10bpc && dsc_max_bpc >= 10)
+		bpc = 10;
+	else if (dsc->support_8bpc && dsc_max_bpc >= 8)
+		bpc = 8;
+	else
+		DRM_DEBUG_KMS("Unsupported BPC for DCS\n"); /* FIXME */
+
+	pipe_config->pipe_bpp = bpc * 3;
+
+	pipe_config->dsc.compressed_bpp = min(pipe_config->pipe_bpp,
+					      VBT_DSC_MAX_BPP(dsc->max_bpp));
+
+	/*
+	 * FIXME: This is ugly, and slice count should take DSC engine
+	 * throughput etc. into account.
+	 *
+	 * Also, per spec DSI supports 1, 2, 3 or 4 horizontal slices.
+	 */
+	if (dsc->slices_per_line & BIT(2) &&
+	    pipe_config->hw.adjusted_mode.crtc_hdisplay % 4 == 0) {
+		pipe_config->dsc.slice_count = 4;
+	} else if (dsc->slices_per_line & BIT(1) &&
+		   pipe_config->hw.adjusted_mode.crtc_hdisplay % 2 == 0) {
+		pipe_config->dsc.slice_count = 2;
+	} else {
+		/* FIXME */
+		if (!(dsc->slices_per_line & BIT(0)))
+			DRM_DEBUG_KMS("Unsupported slice count for DSI DCS\n");
+
+		pipe_config->dsc.slice_count = 1;
+	}
+
+	/* FIXME: rc_buffer_block_size, using defaults in intel_vdsc.c */
+
+	/* FIXME: rc_buffer_size, using defaults in intel_vdsc.c */
+
+	/* FIXME: DSI spec says bpc + 1 for this one */
+	vdsc_cfg->line_buf_depth = VBT_DSC_LINE_BUFFER_DEPTH(dsc->line_buffer_depth);
+
+	vdsc_cfg->block_pred_enable = dsc->block_prediction_enable;
+
+	vdsc_cfg->slice_height = dsc->slice_height;
+}
+
+/* FIXME: initially DSI specific */
+bool intel_bios_get_dsc_params(struct intel_encoder *encoder,
+			       struct intel_crtc_state *pipe_config,
+			       int dsc_max_bpc)
+{
+	struct drm_i915_private *i915 = to_i915(encoder->base.dev);
+	const struct display_device_data *devdata;
+	const struct child_device_config *child;
+
+	list_for_each_entry(devdata, &i915->vbt.display_devices, node) {
+		child = &devdata->child;
+
+		if (!(child->device_type & DEVICE_TYPE_MIPI_OUTPUT))
+			continue;
+
+		if (child->dvo_port - DVO_PORT_MIPIA == encoder->port) {
+			if (!devdata->dsc)
+				return false;
+
+			if (pipe_config)
+				fill_dsc(pipe_config, devdata->dsc, dsc_max_bpc);
+
+			return true;
+		}
+	}
+
+	return true;
+}
+
 /**
  * intel_bios_is_port_hpd_inverted - is HPD inverted for %port
  * @i915:	i915 device instance
diff --git a/drivers/gpu/drm/i915/display/intel_bios.h b/drivers/gpu/drm/i915/display/intel_bios.h
index 98f064828a57..fe1a11d3d6b6 100644
--- a/drivers/gpu/drm/i915/display/intel_bios.h
+++ b/drivers/gpu/drm/i915/display/intel_bios.h
@@ -35,6 +35,8 @@
 #include <drm/i915_drm.h>
 
 struct drm_i915_private;
+struct intel_crtc_state;
+struct intel_encoder;
 enum port;
 
 enum intel_backlight_type {
@@ -242,5 +244,8 @@ bool intel_bios_is_port_hpd_inverted(const struct drm_i915_private *i915,
 bool intel_bios_is_lspcon_present(const struct drm_i915_private *i915,
 				  enum port port);
 enum aux_ch intel_bios_port_aux_ch(struct drm_i915_private *dev_priv, enum port port);
+bool intel_bios_get_dsc_params(struct intel_encoder *encoder,
+			       struct intel_crtc_state *pipe_config,
+			       int dsc_max_bpc);
 
 #endif /* _INTEL_BIOS_H_ */
-- 
2.20.1

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[PATCH 6/9] drm/i915/dsc: move DP specific compute params to intel_dp.c

[Jani Nikula]

Turns out future DSI specific parameters aren't workable with the
approach of having the encoder specific functions in intel_vdsc.c. Make
intel_dsc_compute_params() a helper that does the encoder independent
parts, and have encoder code call it. Move intel_dsc_dp_compute_params()
to intel_dp.c as intel_dp_dsc_compute_params().

Cc: Manasi Navare <manasi.d.navare@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/i915/display/intel_dp.c   | 47 +++++++++++++++++++++-
 drivers/gpu/drm/i915/display/intel_vdsc.c | 48 +----------------------
 2 files changed, 47 insertions(+), 48 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index 9e9593965a9a..b38a49db80e3 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -2046,6 +2046,51 @@ static int intel_dp_dsc_compute_bpp(struct intel_dp *intel_dp, u8 dsc_max_bpc)
 	return 0;
 }
 
+#define DSC_SUPPORTED_VERSION_MIN		1
+
+static int intel_dp_dsc_compute_params(struct intel_encoder *encoder,
+				       struct intel_crtc_state *pipe_config)
+{
+	struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base);
+	struct drm_dsc_config *vdsc_cfg = &pipe_config->dsc.config;
+	u8 line_buf_depth;
+	int ret;
+
+	ret = intel_dsc_compute_params(encoder, pipe_config);
+	if (ret)
+		return ret;
+
+	vdsc_cfg->dsc_version_major =
+		(intel_dp->dsc_dpcd[DP_DSC_REV - DP_DSC_SUPPORT] &
+		 DP_DSC_MAJOR_MASK) >> DP_DSC_MAJOR_SHIFT;
+	vdsc_cfg->dsc_version_minor =
+		min(DSC_SUPPORTED_VERSION_MIN,
+		    (intel_dp->dsc_dpcd[DP_DSC_REV - DP_DSC_SUPPORT] &
+		     DP_DSC_MINOR_MASK) >> DP_DSC_MINOR_SHIFT);
+
+	vdsc_cfg->convert_rgb = intel_dp->dsc_dpcd[DP_DSC_DEC_COLOR_FORMAT_CAP - DP_DSC_SUPPORT] &
+		DP_DSC_RGB;
+
+	line_buf_depth = drm_dp_dsc_sink_line_buf_depth(intel_dp->dsc_dpcd);
+	if (!line_buf_depth) {
+		DRM_DEBUG_KMS("DSC Sink Line Buffer Depth invalid\n");
+		return -EINVAL;
+	}
+
+	if (vdsc_cfg->dsc_version_minor == 2)
+		vdsc_cfg->line_buf_depth = (line_buf_depth == DSC_1_2_MAX_LINEBUF_DEPTH_BITS) ?
+			DSC_1_2_MAX_LINEBUF_DEPTH_VAL : line_buf_depth;
+	else
+		vdsc_cfg->line_buf_depth = (line_buf_depth > DSC_1_1_MAX_LINEBUF_DEPTH_BITS) ?
+			DSC_1_1_MAX_LINEBUF_DEPTH_BITS : line_buf_depth;
+
+	vdsc_cfg->block_pred_enable =
+			intel_dp->dsc_dpcd[DP_DSC_BLK_PREDICTION_SUPPORT - DP_DSC_SUPPORT] &
+		DP_DSC_BLK_PREDICTION_IS_SUPPORTED;
+
+	return drm_dsc_compute_rc_parameters(vdsc_cfg);
+}
+
 static int intel_dp_dsc_compute_config(struct intel_dp *intel_dp,
 				       struct intel_crtc_state *pipe_config,
 				       struct drm_connector_state *conn_state,
@@ -2132,7 +2177,7 @@ static int intel_dp_dsc_compute_config(struct intel_dp *intel_dp,
 		}
 	}
 
-	ret = intel_dsc_compute_params(&dig_port->base, pipe_config);
+	ret = intel_dp_dsc_compute_params(&dig_port->base, pipe_config);
 	if (ret < 0) {
 		DRM_DEBUG_KMS("Cannot compute valid DSC parameters for Input Bpp = %d "
 			      "Compressed BPP = %d\n",
diff --git a/drivers/gpu/drm/i915/display/intel_vdsc.c b/drivers/gpu/drm/i915/display/intel_vdsc.c
index b23ba8d108db..834d665a47d2 100644
--- a/drivers/gpu/drm/i915/display/intel_vdsc.c
+++ b/drivers/gpu/drm/i915/display/intel_vdsc.c
@@ -30,8 +30,6 @@ enum COLUMN_INDEX_BPC {
 	MAX_COLUMN_INDEX
 };
 
-#define DSC_SUPPORTED_VERSION_MIN		1
-
 /* From DSC_v1.11 spec, rc_parameter_Set syntax element typically constant */
 static const u16 rc_buf_thresh[] = {
 	896, 1792, 2688, 3584, 4480, 5376, 6272, 6720, 7168, 7616,
@@ -335,45 +333,6 @@ static const struct rc_parameters *get_rc_params(u16 compressed_bpp,
 	return &rc_parameters[row_index][column_index];
 }
 
-/* Values filled from DSC Sink DPCD */
-static int intel_dsc_dp_compute_params(struct intel_encoder *encoder,
-				       struct intel_crtc_state *pipe_config)
-{
-	struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base);
-	struct drm_dsc_config *vdsc_cfg = &pipe_config->dsc.config;
-	u8 line_buf_depth;
-
-	vdsc_cfg->dsc_version_major =
-		(intel_dp->dsc_dpcd[DP_DSC_REV - DP_DSC_SUPPORT] &
-		 DP_DSC_MAJOR_MASK) >> DP_DSC_MAJOR_SHIFT;
-	vdsc_cfg->dsc_version_minor =
-		min(DSC_SUPPORTED_VERSION_MIN,
-		    (intel_dp->dsc_dpcd[DP_DSC_REV - DP_DSC_SUPPORT] &
-		     DP_DSC_MINOR_MASK) >> DP_DSC_MINOR_SHIFT);
-
-	vdsc_cfg->convert_rgb = intel_dp->dsc_dpcd[DP_DSC_DEC_COLOR_FORMAT_CAP - DP_DSC_SUPPORT] &
-		DP_DSC_RGB;
-
-	line_buf_depth = drm_dp_dsc_sink_line_buf_depth(intel_dp->dsc_dpcd);
-	if (!line_buf_depth) {
-		DRM_DEBUG_KMS("DSC Sink Line Buffer Depth invalid\n");
-		return -EINVAL;
-	}
-
-	if (vdsc_cfg->dsc_version_minor == 2)
-		vdsc_cfg->line_buf_depth = (line_buf_depth == DSC_1_2_MAX_LINEBUF_DEPTH_BITS) ?
-			DSC_1_2_MAX_LINEBUF_DEPTH_VAL : line_buf_depth;
-	else
-		vdsc_cfg->line_buf_depth = (line_buf_depth > DSC_1_1_MAX_LINEBUF_DEPTH_BITS) ?
-			DSC_1_1_MAX_LINEBUF_DEPTH_BITS : line_buf_depth;
-
-	vdsc_cfg->block_pred_enable =
-			intel_dp->dsc_dpcd[DP_DSC_BLK_PREDICTION_SUPPORT - DP_DSC_SUPPORT] &
-		DP_DSC_BLK_PREDICTION_IS_SUPPORTED;
-
-	return 0;
-}
-
 int intel_dsc_compute_params(struct intel_encoder *encoder,
 			     struct intel_crtc_state *pipe_config)
 {
@@ -381,7 +340,6 @@ int intel_dsc_compute_params(struct intel_encoder *encoder,
 	u16 compressed_bpp = pipe_config->dsc.compressed_bpp;
 	const struct rc_parameters *rc_params;
 	u8 i = 0;
-	int ret;
 
 	vdsc_cfg->pic_width = pipe_config->hw.adjusted_mode.crtc_hdisplay;
 	vdsc_cfg->pic_height = pipe_config->hw.adjusted_mode.crtc_vdisplay;
@@ -470,11 +428,7 @@ int intel_dsc_compute_params(struct intel_encoder *encoder,
 	vdsc_cfg->initial_scale_value = (vdsc_cfg->rc_model_size << 3) /
 		(vdsc_cfg->rc_model_size - vdsc_cfg->initial_offset);
 
-	ret = intel_dsc_dp_compute_params(encoder, pipe_config);
-	if (ret)
-		return ret;
-
-	return drm_dsc_compute_rc_parameters(vdsc_cfg);
+	return 0;
 }
 
 enum intel_display_power_domain
-- 
2.20.1

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[Intel-gfx] [PATCH 6/9] drm/i915/dsc: move DP specific compute params to intel_dp.c

[Jani Nikula]

Turns out future DSI specific parameters aren't workable with the
approach of having the encoder specific functions in intel_vdsc.c. Make
intel_dsc_compute_params() a helper that does the encoder independent
parts, and have encoder code call it. Move intel_dsc_dp_compute_params()
to intel_dp.c as intel_dp_dsc_compute_params().

Cc: Manasi Navare <manasi.d.navare@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/i915/display/intel_dp.c   | 47 +++++++++++++++++++++-
 drivers/gpu/drm/i915/display/intel_vdsc.c | 48 +----------------------
 2 files changed, 47 insertions(+), 48 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index 9e9593965a9a..b38a49db80e3 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -2046,6 +2046,51 @@ static int intel_dp_dsc_compute_bpp(struct intel_dp *intel_dp, u8 dsc_max_bpc)
 	return 0;
 }
 
+#define DSC_SUPPORTED_VERSION_MIN		1
+
+static int intel_dp_dsc_compute_params(struct intel_encoder *encoder,
+				       struct intel_crtc_state *pipe_config)
+{
+	struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base);
+	struct drm_dsc_config *vdsc_cfg = &pipe_config->dsc.config;
+	u8 line_buf_depth;
+	int ret;
+
+	ret = intel_dsc_compute_params(encoder, pipe_config);
+	if (ret)
+		return ret;
+
+	vdsc_cfg->dsc_version_major =
+		(intel_dp->dsc_dpcd[DP_DSC_REV - DP_DSC_SUPPORT] &
+		 DP_DSC_MAJOR_MASK) >> DP_DSC_MAJOR_SHIFT;
+	vdsc_cfg->dsc_version_minor =
+		min(DSC_SUPPORTED_VERSION_MIN,
+		    (intel_dp->dsc_dpcd[DP_DSC_REV - DP_DSC_SUPPORT] &
+		     DP_DSC_MINOR_MASK) >> DP_DSC_MINOR_SHIFT);
+
+	vdsc_cfg->convert_rgb = intel_dp->dsc_dpcd[DP_DSC_DEC_COLOR_FORMAT_CAP - DP_DSC_SUPPORT] &
+		DP_DSC_RGB;
+
+	line_buf_depth = drm_dp_dsc_sink_line_buf_depth(intel_dp->dsc_dpcd);
+	if (!line_buf_depth) {
+		DRM_DEBUG_KMS("DSC Sink Line Buffer Depth invalid\n");
+		return -EINVAL;
+	}
+
+	if (vdsc_cfg->dsc_version_minor == 2)
+		vdsc_cfg->line_buf_depth = (line_buf_depth == DSC_1_2_MAX_LINEBUF_DEPTH_BITS) ?
+			DSC_1_2_MAX_LINEBUF_DEPTH_VAL : line_buf_depth;
+	else
+		vdsc_cfg->line_buf_depth = (line_buf_depth > DSC_1_1_MAX_LINEBUF_DEPTH_BITS) ?
+			DSC_1_1_MAX_LINEBUF_DEPTH_BITS : line_buf_depth;
+
+	vdsc_cfg->block_pred_enable =
+			intel_dp->dsc_dpcd[DP_DSC_BLK_PREDICTION_SUPPORT - DP_DSC_SUPPORT] &
+		DP_DSC_BLK_PREDICTION_IS_SUPPORTED;
+
+	return drm_dsc_compute_rc_parameters(vdsc_cfg);
+}
+
 static int intel_dp_dsc_compute_config(struct intel_dp *intel_dp,
 				       struct intel_crtc_state *pipe_config,
 				       struct drm_connector_state *conn_state,
@@ -2132,7 +2177,7 @@ static int intel_dp_dsc_compute_config(struct intel_dp *intel_dp,
 		}
 	}
 
-	ret = intel_dsc_compute_params(&dig_port->base, pipe_config);
+	ret = intel_dp_dsc_compute_params(&dig_port->base, pipe_config);
 	if (ret < 0) {
 		DRM_DEBUG_KMS("Cannot compute valid DSC parameters for Input Bpp = %d "
 			      "Compressed BPP = %d\n",
diff --git a/drivers/gpu/drm/i915/display/intel_vdsc.c b/drivers/gpu/drm/i915/display/intel_vdsc.c
index b23ba8d108db..834d665a47d2 100644
--- a/drivers/gpu/drm/i915/display/intel_vdsc.c
+++ b/drivers/gpu/drm/i915/display/intel_vdsc.c
@@ -30,8 +30,6 @@ enum COLUMN_INDEX_BPC {
 	MAX_COLUMN_INDEX
 };
 
-#define DSC_SUPPORTED_VERSION_MIN		1
-
 /* From DSC_v1.11 spec, rc_parameter_Set syntax element typically constant */
 static const u16 rc_buf_thresh[] = {
 	896, 1792, 2688, 3584, 4480, 5376, 6272, 6720, 7168, 7616,
@@ -335,45 +333,6 @@ static const struct rc_parameters *get_rc_params(u16 compressed_bpp,
 	return &rc_parameters[row_index][column_index];
 }
 
-/* Values filled from DSC Sink DPCD */
-static int intel_dsc_dp_compute_params(struct intel_encoder *encoder,
-				       struct intel_crtc_state *pipe_config)
-{
-	struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base);
-	struct drm_dsc_config *vdsc_cfg = &pipe_config->dsc.config;
-	u8 line_buf_depth;
-
-	vdsc_cfg->dsc_version_major =
-		(intel_dp->dsc_dpcd[DP_DSC_REV - DP_DSC_SUPPORT] &
-		 DP_DSC_MAJOR_MASK) >> DP_DSC_MAJOR_SHIFT;
-	vdsc_cfg->dsc_version_minor =
-		min(DSC_SUPPORTED_VERSION_MIN,
-		    (intel_dp->dsc_dpcd[DP_DSC_REV - DP_DSC_SUPPORT] &
-		     DP_DSC_MINOR_MASK) >> DP_DSC_MINOR_SHIFT);
-
-	vdsc_cfg->convert_rgb = intel_dp->dsc_dpcd[DP_DSC_DEC_COLOR_FORMAT_CAP - DP_DSC_SUPPORT] &
-		DP_DSC_RGB;
-
-	line_buf_depth = drm_dp_dsc_sink_line_buf_depth(intel_dp->dsc_dpcd);
-	if (!line_buf_depth) {
-		DRM_DEBUG_KMS("DSC Sink Line Buffer Depth invalid\n");
-		return -EINVAL;
-	}
-
-	if (vdsc_cfg->dsc_version_minor == 2)
-		vdsc_cfg->line_buf_depth = (line_buf_depth == DSC_1_2_MAX_LINEBUF_DEPTH_BITS) ?
-			DSC_1_2_MAX_LINEBUF_DEPTH_VAL : line_buf_depth;
-	else
-		vdsc_cfg->line_buf_depth = (line_buf_depth > DSC_1_1_MAX_LINEBUF_DEPTH_BITS) ?
-			DSC_1_1_MAX_LINEBUF_DEPTH_BITS : line_buf_depth;
-
-	vdsc_cfg->block_pred_enable =
-			intel_dp->dsc_dpcd[DP_DSC_BLK_PREDICTION_SUPPORT - DP_DSC_SUPPORT] &
-		DP_DSC_BLK_PREDICTION_IS_SUPPORTED;
-
-	return 0;
-}
-
 int intel_dsc_compute_params(struct intel_encoder *encoder,
 			     struct intel_crtc_state *pipe_config)
 {
@@ -381,7 +340,6 @@ int intel_dsc_compute_params(struct intel_encoder *encoder,
 	u16 compressed_bpp = pipe_config->dsc.compressed_bpp;
 	const struct rc_parameters *rc_params;
 	u8 i = 0;
-	int ret;
 
 	vdsc_cfg->pic_width = pipe_config->hw.adjusted_mode.crtc_hdisplay;
 	vdsc_cfg->pic_height = pipe_config->hw.adjusted_mode.crtc_vdisplay;
@@ -470,11 +428,7 @@ int intel_dsc_compute_params(struct intel_encoder *encoder,
 	vdsc_cfg->initial_scale_value = (vdsc_cfg->rc_model_size << 3) /
 		(vdsc_cfg->rc_model_size - vdsc_cfg->initial_offset);
 
-	ret = intel_dsc_dp_compute_params(encoder, pipe_config);
-	if (ret)
-		return ret;
-
-	return drm_dsc_compute_rc_parameters(vdsc_cfg);
+	return 0;
 }
 
 enum intel_display_power_domain
-- 
2.20.1

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[PATCH 7/9] drm/i915/dsc: move slice height calculation to encoder

[Jani Nikula]

Turns out this isn't compatible with DSI.

Cc: Manasi Navare <manasi.d.navare@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/i915/display/intel_dp.c   | 12 ++++++++++++
 drivers/gpu/drm/i915/display/intel_vdsc.c | 11 -----------
 2 files changed, 12 insertions(+), 11 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index b38a49db80e3..631d6d623e29 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -2060,6 +2060,18 @@ static int intel_dp_dsc_compute_params(struct intel_encoder *encoder,
 	if (ret)
 		return ret;
 
+	/*
+	 * Slice Height of 8 works for all currently available panels. So start
+	 * with that if pic_height is an integral multiple of 8.
+	 * Eventually add logic to try multiple slice heights.
+	 */
+	if (vdsc_cfg->pic_height % 8 == 0)
+		vdsc_cfg->slice_height = 8;
+	else if (vdsc_cfg->pic_height % 4 == 0)
+		vdsc_cfg->slice_height = 4;
+	else
+		vdsc_cfg->slice_height = 2;
+
 	vdsc_cfg->dsc_version_major =
 		(intel_dp->dsc_dpcd[DP_DSC_REV - DP_DSC_SUPPORT] &
 		 DP_DSC_MAJOR_MASK) >> DP_DSC_MAJOR_SHIFT;
diff --git a/drivers/gpu/drm/i915/display/intel_vdsc.c b/drivers/gpu/drm/i915/display/intel_vdsc.c
index 834d665a47d2..c53024dfb1ec 100644
--- a/drivers/gpu/drm/i915/display/intel_vdsc.c
+++ b/drivers/gpu/drm/i915/display/intel_vdsc.c
@@ -345,17 +345,6 @@ int intel_dsc_compute_params(struct intel_encoder *encoder,
 	vdsc_cfg->pic_height = pipe_config->hw.adjusted_mode.crtc_vdisplay;
 	vdsc_cfg->slice_width = DIV_ROUND_UP(vdsc_cfg->pic_width,
 					     pipe_config->dsc.slice_count);
-	/*
-	 * Slice Height of 8 works for all currently available panels. So start
-	 * with that if pic_height is an integral multiple of 8.
-	 * Eventually add logic to try multiple slice heights.
-	 */
-	if (vdsc_cfg->pic_height % 8 == 0)
-		vdsc_cfg->slice_height = 8;
-	else if (vdsc_cfg->pic_height % 4 == 0)
-		vdsc_cfg->slice_height = 4;
-	else
-		vdsc_cfg->slice_height = 2;
 
 	/* Gen 11 does not support YCbCr */
 	vdsc_cfg->simple_422 = false;
-- 
2.20.1

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[Intel-gfx] [PATCH 7/9] drm/i915/dsc: move slice height calculation to encoder

[Jani Nikula]

Turns out this isn't compatible with DSI.

Cc: Manasi Navare <manasi.d.navare@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/i915/display/intel_dp.c   | 12 ++++++++++++
 drivers/gpu/drm/i915/display/intel_vdsc.c | 11 -----------
 2 files changed, 12 insertions(+), 11 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index b38a49db80e3..631d6d623e29 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -2060,6 +2060,18 @@ static int intel_dp_dsc_compute_params(struct intel_encoder *encoder,
 	if (ret)
 		return ret;
 
+	/*
+	 * Slice Height of 8 works for all currently available panels. So start
+	 * with that if pic_height is an integral multiple of 8.
+	 * Eventually add logic to try multiple slice heights.
+	 */
+	if (vdsc_cfg->pic_height % 8 == 0)
+		vdsc_cfg->slice_height = 8;
+	else if (vdsc_cfg->pic_height % 4 == 0)
+		vdsc_cfg->slice_height = 4;
+	else
+		vdsc_cfg->slice_height = 2;
+
 	vdsc_cfg->dsc_version_major =
 		(intel_dp->dsc_dpcd[DP_DSC_REV - DP_DSC_SUPPORT] &
 		 DP_DSC_MAJOR_MASK) >> DP_DSC_MAJOR_SHIFT;
diff --git a/drivers/gpu/drm/i915/display/intel_vdsc.c b/drivers/gpu/drm/i915/display/intel_vdsc.c
index 834d665a47d2..c53024dfb1ec 100644
--- a/drivers/gpu/drm/i915/display/intel_vdsc.c
+++ b/drivers/gpu/drm/i915/display/intel_vdsc.c
@@ -345,17 +345,6 @@ int intel_dsc_compute_params(struct intel_encoder *encoder,
 	vdsc_cfg->pic_height = pipe_config->hw.adjusted_mode.crtc_vdisplay;
 	vdsc_cfg->slice_width = DIV_ROUND_UP(vdsc_cfg->pic_width,
 					     pipe_config->dsc.slice_count);
-	/*
-	 * Slice Height of 8 works for all currently available panels. So start
-	 * with that if pic_height is an integral multiple of 8.
-	 * Eventually add logic to try multiple slice heights.
-	 */
-	if (vdsc_cfg->pic_height % 8 == 0)
-		vdsc_cfg->slice_height = 8;
-	else if (vdsc_cfg->pic_height % 4 == 0)
-		vdsc_cfg->slice_height = 4;
-	else
-		vdsc_cfg->slice_height = 2;
 
 	/* Gen 11 does not support YCbCr */
 	vdsc_cfg->simple_422 = false;
-- 
2.20.1

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[PATCH 8/9] drm/i915/dsc: add support for computing and writing PPS for DSI encoders

[Jani Nikula]

Add DSI specific computation and transmission to display of PPS.

With hopes that this approach will work for both DP and DSI encoders.

Cc: Manasi Navare <manasi.d.navare@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/i915/display/intel_vdsc.c | 26 ++++++++++++++++++++++-
 1 file changed, 25 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/display/intel_vdsc.c b/drivers/gpu/drm/i915/display/intel_vdsc.c
index c53024dfb1ec..76deeb31f32f 100644
--- a/drivers/gpu/drm/i915/display/intel_vdsc.c
+++ b/drivers/gpu/drm/i915/display/intel_vdsc.c
@@ -10,6 +10,7 @@
 
 #include "i915_drv.h"
 #include "intel_display_types.h"
+#include "intel_dsi.h"
 #include "intel_vdsc.h"
 
 enum ROW_INDEX_BPP {
@@ -844,6 +845,26 @@ static void intel_dsc_pps_configure(struct intel_encoder *encoder,
 	}
 }
 
+static void intel_dsc_dsi_pps_write(struct intel_encoder *encoder,
+				    const struct intel_crtc_state *crtc_state)
+{
+	const struct drm_dsc_config *vdsc_cfg = &crtc_state->dsc.config;
+	struct intel_dsi *intel_dsi = enc_to_intel_dsi(&encoder->base);
+	struct mipi_dsi_device *dsi;
+	struct drm_dsc_picture_parameter_set pps;
+	enum port port;
+
+	drm_dsc_pps_payload_pack(&pps, vdsc_cfg);
+
+	for_each_dsi_port(port, intel_dsi->ports) {
+		dsi = intel_dsi->dsi_hosts[port]->device;
+
+		/* FIXME: location and order of these two calls? */
+		mipi_dsi_picture_parameter_set(dsi, &pps);
+		mipi_dsi_compression_mode(dsi, true);
+	}
+}
+
 static void intel_dsc_dp_pps_write(struct intel_encoder *encoder,
 				   const struct intel_crtc_state *crtc_state)
 {
@@ -882,7 +903,10 @@ void intel_dsc_enable(struct intel_encoder *encoder,
 
 	intel_dsc_pps_configure(encoder, crtc_state);
 
-	intel_dsc_dp_pps_write(encoder, crtc_state);
+	if (encoder->type == INTEL_OUTPUT_DSI)
+		intel_dsc_dsi_pps_write(encoder, crtc_state);
+	else
+		intel_dsc_dp_pps_write(encoder, crtc_state);
 
 	if (crtc_state->cpu_transcoder == TRANSCODER_EDP) {
 		dss_ctl1_reg = DSS_CTL1;
-- 
2.20.1

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[Intel-gfx] [PATCH 8/9] drm/i915/dsc: add support for computing and writing PPS for DSI encoders

[Jani Nikula]

Add DSI specific computation and transmission to display of PPS.

With hopes that this approach will work for both DP and DSI encoders.

Cc: Manasi Navare <manasi.d.navare@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/i915/display/intel_vdsc.c | 26 ++++++++++++++++++++++-
 1 file changed, 25 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/display/intel_vdsc.c b/drivers/gpu/drm/i915/display/intel_vdsc.c
index c53024dfb1ec..76deeb31f32f 100644
--- a/drivers/gpu/drm/i915/display/intel_vdsc.c
+++ b/drivers/gpu/drm/i915/display/intel_vdsc.c
@@ -10,6 +10,7 @@
 
 #include "i915_drv.h"
 #include "intel_display_types.h"
+#include "intel_dsi.h"
 #include "intel_vdsc.h"
 
 enum ROW_INDEX_BPP {
@@ -844,6 +845,26 @@ static void intel_dsc_pps_configure(struct intel_encoder *encoder,
 	}
 }
 
+static void intel_dsc_dsi_pps_write(struct intel_encoder *encoder,
+				    const struct intel_crtc_state *crtc_state)
+{
+	const struct drm_dsc_config *vdsc_cfg = &crtc_state->dsc.config;
+	struct intel_dsi *intel_dsi = enc_to_intel_dsi(&encoder->base);
+	struct mipi_dsi_device *dsi;
+	struct drm_dsc_picture_parameter_set pps;
+	enum port port;
+
+	drm_dsc_pps_payload_pack(&pps, vdsc_cfg);
+
+	for_each_dsi_port(port, intel_dsi->ports) {
+		dsi = intel_dsi->dsi_hosts[port]->device;
+
+		/* FIXME: location and order of these two calls? */
+		mipi_dsi_picture_parameter_set(dsi, &pps);
+		mipi_dsi_compression_mode(dsi, true);
+	}
+}
+
 static void intel_dsc_dp_pps_write(struct intel_encoder *encoder,
 				   const struct intel_crtc_state *crtc_state)
 {
@@ -882,7 +903,10 @@ void intel_dsc_enable(struct intel_encoder *encoder,
 
 	intel_dsc_pps_configure(encoder, crtc_state);
 
-	intel_dsc_dp_pps_write(encoder, crtc_state);
+	if (encoder->type == INTEL_OUTPUT_DSI)
+		intel_dsc_dsi_pps_write(encoder, crtc_state);
+	else
+		intel_dsc_dp_pps_write(encoder, crtc_state);
 
 	if (crtc_state->cpu_transcoder == TRANSCODER_EDP) {
 		dss_ctl1_reg = DSS_CTL1;
-- 
2.20.1

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[PATCH 9/9] drm/i915/dsi: add support for DSC

[Jani Nikula]

Enable DSC for DSI, if specified in VBT.

This is now excessively dynamic, being enabled at compute config. I
don't expect us to need to switch between DSC and non-DSC for the same
panel. Cargo culting the DP DSC shows.

Mode valid lacks a sensible implementation, as does get config.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/i915/display/icl_dsi.c | 75 ++++++++++++++++++++++++--
 1 file changed, 72 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/icl_dsi.c b/drivers/gpu/drm/i915/display/icl_dsi.c
index 8eb2d7f29c82..823dbd9d4d06 100644
--- a/drivers/gpu/drm/i915/display/icl_dsi.c
+++ b/drivers/gpu/drm/i915/display/icl_dsi.c
@@ -34,6 +34,7 @@
 #include "intel_ddi.h"
 #include "intel_dsi.h"
 #include "intel_panel.h"
+#include "intel_vdsc.h"
 
 static inline int header_credits_available(struct drm_i915_private *dev_priv,
 					   enum transcoder dsi_trans)
@@ -1050,6 +1051,9 @@ static void gen11_dsi_pre_enable(struct intel_encoder *encoder,
 	/* step5: program and powerup panel */
 	gen11_dsi_powerup_panel(encoder);
 
+	/* FIXME: location? */
+	intel_dsc_enable(encoder, pipe_config);
+
 	/* step6c: configure transcoder timings */
 	gen11_dsi_set_transcoder_timings(encoder, pipe_config);
 
@@ -1211,6 +1215,13 @@ static void gen11_dsi_disable(struct intel_encoder *encoder,
 	gen11_dsi_disable_io_power(encoder);
 }
 
+static enum drm_mode_status gen11_dsi_mode_valid(struct drm_connector *connector,
+						 struct drm_display_mode *mode)
+{
+	/* FIXME: DSC? */
+	return intel_dsi_mode_valid(connector, mode);
+}
+
 static void gen11_dsi_get_timings(struct intel_encoder *encoder,
 				  struct intel_crtc_state *pipe_config)
 {
@@ -1258,6 +1269,56 @@ static void gen11_dsi_get_config(struct intel_encoder *encoder,
 	pipe_config->pipe_bpp = bdw_get_pipemisc_bpp(crtc);
 }
 
+static int gen11_dsi_dsc_compute_config(struct intel_encoder *encoder,
+					struct intel_crtc_state *pipe_config,
+					struct drm_connector_state *conn_state)
+{
+	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
+	struct drm_dsc_config *vdsc_cfg = &pipe_config->dsc.config;
+	struct drm_display_mode *adjusted_mode = &pipe_config->hw.adjusted_mode;
+	int dsc_max_bpc = INTEL_GEN(dev_priv) >= 12 ? 12 : 10;
+	bool use_dsc;
+	int ret;
+
+	dsc_max_bpc = min_t(int, dsc_max_bpc, conn_state->max_requested_bpc);
+
+	use_dsc = intel_bios_get_dsc_params(encoder, pipe_config, dsc_max_bpc);
+	if (!use_dsc)
+		return 0;
+
+	if (pipe_config->pipe_bpp < 8 * 3)
+		return -EINVAL;
+
+	if (adjusted_mode->crtc_clock > dev_priv->max_cdclk_freq) {
+		if (pipe_config->dsc.slice_count > 1) {
+			pipe_config->dsc.dsc_split = true;
+		} else {
+			DRM_DEBUG_KMS("Cannot split stream to use 2 VDSC instances\n");
+			return -EINVAL;
+		}
+	}
+
+	vdsc_cfg->convert_rgb = false;
+
+	ret = intel_dsc_compute_params(encoder, pipe_config);
+	if (ret)
+		return ret;
+
+	/* DSI specific sanity checks on the common code */
+	WARN_ON(vdsc_cfg->vbr_enable);
+	WARN_ON(vdsc_cfg->pic_width % vdsc_cfg->slice_width);
+	WARN_ON(vdsc_cfg->slice_height < 8);
+	WARN_ON(vdsc_cfg->pic_height % vdsc_cfg->slice_height);
+
+	ret = drm_dsc_compute_rc_parameters(vdsc_cfg);
+	if (ret)
+		return ret;
+
+	pipe_config->dsc.compression_enable = true;
+
+	return 0;
+}
+
 static int gen11_dsi_compute_config(struct intel_encoder *encoder,
 				    struct intel_crtc_state *pipe_config,
 				    struct drm_connector_state *conn_state)
@@ -1286,14 +1347,22 @@ static int gen11_dsi_compute_config(struct intel_encoder *encoder,
 	pipe_config->clock_set = true;
 	pipe_config->port_clock = intel_dsi_bitrate(intel_dsi) / 5;
 
+	if (gen11_dsi_dsc_compute_config(encoder, pipe_config, conn_state))
+		DRM_DEBUG_KMS("Attempting to use DSC failed\n");
+
 	return 0;
 }
 
 static void gen11_dsi_get_power_domains(struct intel_encoder *encoder,
 					struct intel_crtc_state *crtc_state)
 {
-	get_dsi_io_power_domains(to_i915(encoder->base.dev),
-				 enc_to_intel_dsi(&encoder->base));
+	struct drm_i915_private *i915 = to_i915(encoder->base.dev);
+
+	get_dsi_io_power_domains(i915, enc_to_intel_dsi(&encoder->base));
+
+	if (crtc_state->dsc.compression_enable)
+		intel_display_power_get(i915,
+					intel_dsc_power_domain(crtc_state));
 }
 
 static bool gen11_dsi_get_hw_state(struct intel_encoder *encoder,
@@ -1360,7 +1429,7 @@ static const struct drm_connector_funcs gen11_dsi_connector_funcs = {
 
 static const struct drm_connector_helper_funcs gen11_dsi_connector_helper_funcs = {
 	.get_modes = intel_dsi_get_modes,
-	.mode_valid = intel_dsi_mode_valid,
+	.mode_valid = gen11_dsi_mode_valid,
 	.atomic_check = intel_digital_connector_atomic_check,
 };
 
-- 
2.20.1

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[Intel-gfx] [PATCH 9/9] drm/i915/dsi: add support for DSC

[Jani Nikula]

Enable DSC for DSI, if specified in VBT.

This is now excessively dynamic, being enabled at compute config. I
don't expect us to need to switch between DSC and non-DSC for the same
panel. Cargo culting the DP DSC shows.

Mode valid lacks a sensible implementation, as does get config.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/i915/display/icl_dsi.c | 75 ++++++++++++++++++++++++--
 1 file changed, 72 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/icl_dsi.c b/drivers/gpu/drm/i915/display/icl_dsi.c
index 8eb2d7f29c82..823dbd9d4d06 100644
--- a/drivers/gpu/drm/i915/display/icl_dsi.c
+++ b/drivers/gpu/drm/i915/display/icl_dsi.c
@@ -34,6 +34,7 @@
 #include "intel_ddi.h"
 #include "intel_dsi.h"
 #include "intel_panel.h"
+#include "intel_vdsc.h"
 
 static inline int header_credits_available(struct drm_i915_private *dev_priv,
 					   enum transcoder dsi_trans)
@@ -1050,6 +1051,9 @@ static void gen11_dsi_pre_enable(struct intel_encoder *encoder,
 	/* step5: program and powerup panel */
 	gen11_dsi_powerup_panel(encoder);
 
+	/* FIXME: location? */
+	intel_dsc_enable(encoder, pipe_config);
+
 	/* step6c: configure transcoder timings */
 	gen11_dsi_set_transcoder_timings(encoder, pipe_config);
 
@@ -1211,6 +1215,13 @@ static void gen11_dsi_disable(struct intel_encoder *encoder,
 	gen11_dsi_disable_io_power(encoder);
 }
 
+static enum drm_mode_status gen11_dsi_mode_valid(struct drm_connector *connector,
+						 struct drm_display_mode *mode)
+{
+	/* FIXME: DSC? */
+	return intel_dsi_mode_valid(connector, mode);
+}
+
 static void gen11_dsi_get_timings(struct intel_encoder *encoder,
 				  struct intel_crtc_state *pipe_config)
 {
@@ -1258,6 +1269,56 @@ static void gen11_dsi_get_config(struct intel_encoder *encoder,
 	pipe_config->pipe_bpp = bdw_get_pipemisc_bpp(crtc);
 }
 
+static int gen11_dsi_dsc_compute_config(struct intel_encoder *encoder,
+					struct intel_crtc_state *pipe_config,
+					struct drm_connector_state *conn_state)
+{
+	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
+	struct drm_dsc_config *vdsc_cfg = &pipe_config->dsc.config;
+	struct drm_display_mode *adjusted_mode = &pipe_config->hw.adjusted_mode;
+	int dsc_max_bpc = INTEL_GEN(dev_priv) >= 12 ? 12 : 10;
+	bool use_dsc;
+	int ret;
+
+	dsc_max_bpc = min_t(int, dsc_max_bpc, conn_state->max_requested_bpc);
+
+	use_dsc = intel_bios_get_dsc_params(encoder, pipe_config, dsc_max_bpc);
+	if (!use_dsc)
+		return 0;
+
+	if (pipe_config->pipe_bpp < 8 * 3)
+		return -EINVAL;
+
+	if (adjusted_mode->crtc_clock > dev_priv->max_cdclk_freq) {
+		if (pipe_config->dsc.slice_count > 1) {
+			pipe_config->dsc.dsc_split = true;
+		} else {
+			DRM_DEBUG_KMS("Cannot split stream to use 2 VDSC instances\n");
+			return -EINVAL;
+		}
+	}
+
+	vdsc_cfg->convert_rgb = false;
+
+	ret = intel_dsc_compute_params(encoder, pipe_config);
+	if (ret)
+		return ret;
+
+	/* DSI specific sanity checks on the common code */
+	WARN_ON(vdsc_cfg->vbr_enable);
+	WARN_ON(vdsc_cfg->pic_width % vdsc_cfg->slice_width);
+	WARN_ON(vdsc_cfg->slice_height < 8);
+	WARN_ON(vdsc_cfg->pic_height % vdsc_cfg->slice_height);
+
+	ret = drm_dsc_compute_rc_parameters(vdsc_cfg);
+	if (ret)
+		return ret;
+
+	pipe_config->dsc.compression_enable = true;
+
+	return 0;
+}
+
 static int gen11_dsi_compute_config(struct intel_encoder *encoder,
 				    struct intel_crtc_state *pipe_config,
 				    struct drm_connector_state *conn_state)
@@ -1286,14 +1347,22 @@ static int gen11_dsi_compute_config(struct intel_encoder *encoder,
 	pipe_config->clock_set = true;
 	pipe_config->port_clock = intel_dsi_bitrate(intel_dsi) / 5;
 
+	if (gen11_dsi_dsc_compute_config(encoder, pipe_config, conn_state))
+		DRM_DEBUG_KMS("Attempting to use DSC failed\n");
+
 	return 0;
 }
 
 static void gen11_dsi_get_power_domains(struct intel_encoder *encoder,
 					struct intel_crtc_state *crtc_state)
 {
-	get_dsi_io_power_domains(to_i915(encoder->base.dev),
-				 enc_to_intel_dsi(&encoder->base));
+	struct drm_i915_private *i915 = to_i915(encoder->base.dev);
+
+	get_dsi_io_power_domains(i915, enc_to_intel_dsi(&encoder->base));
+
+	if (crtc_state->dsc.compression_enable)
+		intel_display_power_get(i915,
+					intel_dsc_power_domain(crtc_state));
 }
 
 static bool gen11_dsi_get_hw_state(struct intel_encoder *encoder,
@@ -1360,7 +1429,7 @@ static const struct drm_connector_funcs gen11_dsi_connector_funcs = {
 
 static const struct drm_connector_helper_funcs gen11_dsi_connector_helper_funcs = {
 	.get_modes = intel_dsi_get_modes,
-	.mode_valid = intel_dsi_mode_valid,
+	.mode_valid = gen11_dsi_mode_valid,
 	.atomic_check = intel_digital_connector_atomic_check,
 };
 
-- 
2.20.1

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✗ Fi.CI.CHECKPATCH: warning for drm/i915/dsi: enable DSC

[Patchwork]

== Series Details ==

Series: drm/i915/dsi: enable DSC
URL   : https://patchwork.freedesktop.org/series/69202/
State : warning

== Summary ==

$ dim checkpatch origin/drm-tip
a5c514d75474 drm/i915/bios: use a flag for vbt hdmi level shift presence
af24a1b0a92c drm/i915/bios: store child devices in a list
d5251f660966 drm/i915/bios: pass devdata to parse_ddi_port
33a264f49a5c drm/i915/bios: parse compression parameters block
-:98: CHECK:COMPARISON_TO_NULL: Comparison to NULL could be written "devdata->dsc"
#98: FILE: drivers/gpu/drm/i915/display/intel_bios.c:1528:
+		      devdata->dsc != NULL);

total: 0 errors, 0 warnings, 1 checks, 101 lines checked
bfda0b2963dd drm/i915/bios: add support for querying DSC details for encoder
d3b5ec793ae8 drm/i915/dsc: move DP specific compute params to intel_dp.c
df30419003c1 drm/i915/dsc: move slice height calculation to encoder
5940f47d1ff4 drm/i915/dsc: add support for computing and writing PPS for DSI encoders
9ac145cbd597 drm/i915/dsi: add support for DSC

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[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/dsi: enable DSC

[Patchwork]

== Series Details ==

Series: drm/i915/dsi: enable DSC
URL   : https://patchwork.freedesktop.org/series/69202/
State : warning

== Summary ==

$ dim checkpatch origin/drm-tip
a5c514d75474 drm/i915/bios: use a flag for vbt hdmi level shift presence
af24a1b0a92c drm/i915/bios: store child devices in a list
d5251f660966 drm/i915/bios: pass devdata to parse_ddi_port
33a264f49a5c drm/i915/bios: parse compression parameters block
-:98: CHECK:COMPARISON_TO_NULL: Comparison to NULL could be written "devdata->dsc"
#98: FILE: drivers/gpu/drm/i915/display/intel_bios.c:1528:
+		      devdata->dsc != NULL);

total: 0 errors, 0 warnings, 1 checks, 101 lines checked
bfda0b2963dd drm/i915/bios: add support for querying DSC details for encoder
d3b5ec793ae8 drm/i915/dsc: move DP specific compute params to intel_dp.c
df30419003c1 drm/i915/dsc: move slice height calculation to encoder
5940f47d1ff4 drm/i915/dsc: add support for computing and writing PPS for DSI encoders
9ac145cbd597 drm/i915/dsi: add support for DSC

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✓ Fi.CI.BAT: success for drm/i915/dsi: enable DSC

[Patchwork]

== Series Details ==

Series: drm/i915/dsi: enable DSC
URL   : https://patchwork.freedesktop.org/series/69202/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_7299 -> Patchwork_15197
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15197/index.html

Known issues
------------

  Here are the changes found in Patchwork_15197 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@gem_exec_suspend@basic-s3:
    - fi-cml-s:           [PASS][1] -> [DMESG-WARN][2] ([fdo#111764])
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7299/fi-cml-s/igt@gem_exec_suspend@basic-s3.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15197/fi-cml-s/igt@gem_exec_suspend@basic-s3.html

  
#### Possible fixes ####

  * igt@gem_exec_gttfill@basic:
    - {fi-tgl-u}:         [INCOMPLETE][3] ([fdo#111593]) -> [PASS][4]
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7299/fi-tgl-u/igt@gem_exec_gttfill@basic.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15197/fi-tgl-u/igt@gem_exec_gttfill@basic.html

  * igt@i915_selftest@live_blt:
    - fi-hsw-peppy:       [DMESG-FAIL][5] ([fdo#112147]) -> [PASS][6]
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7299/fi-hsw-peppy/igt@i915_selftest@live_blt.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15197/fi-hsw-peppy/igt@i915_selftest@live_blt.html

  
#### Warnings ####

  * igt@kms_chamelium@hdmi-hpd-fast:
    - fi-kbl-7500u:       [FAIL][7] ([fdo#111407]) -> [FAIL][8] ([fdo#111045] / [fdo#111096])
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7299/fi-kbl-7500u/igt@kms_chamelium@hdmi-hpd-fast.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15197/fi-kbl-7500u/igt@kms_chamelium@hdmi-hpd-fast.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#111045]: https://bugs.freedesktop.org/show_bug.cgi?id=111045
  [fdo#111096]: https://bugs.freedesktop.org/show_bug.cgi?id=111096
  [fdo#111407]: https://bugs.freedesktop.org/show_bug.cgi?id=111407
  [fdo#111593]: https://bugs.freedesktop.org/show_bug.cgi?id=111593
  [fdo#111764]: https://bugs.freedesktop.org/show_bug.cgi?id=111764
  [fdo#112147]: https://bugs.freedesktop.org/show_bug.cgi?id=112147


Participating hosts (51 -> 45)
------------------------------

  Missing    (6): fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-byt-clapper fi-bdw-samus 


Build changes
-------------

  * CI: CI-20190529 -> None
  * Linux: CI_DRM_7299 -> Patchwork_15197

  CI-20190529: 20190529
  CI_DRM_7299: e7de48a8b1161a99f4b8e4483bc1bb85f5d31039 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_5268: c94958b8f7caefcda72392417ae6f3a98e36a48b @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_15197: 9ac145cbd5972b000deb6586bd4a1cb0e99e8413 @ git://anongit.freedesktop.org/gfx-ci/linux


== Linux commits ==

9ac145cbd597 drm/i915/dsi: add support for DSC
5940f47d1ff4 drm/i915/dsc: add support for computing and writing PPS for DSI encoders
df30419003c1 drm/i915/dsc: move slice height calculation to encoder
d3b5ec793ae8 drm/i915/dsc: move DP specific compute params to intel_dp.c
bfda0b2963dd drm/i915/bios: add support for querying DSC details for encoder
33a264f49a5c drm/i915/bios: parse compression parameters block
d5251f660966 drm/i915/bios: pass devdata to parse_ddi_port
af24a1b0a92c drm/i915/bios: store child devices in a list
a5c514d75474 drm/i915/bios: use a flag for vbt hdmi level shift presence

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15197/index.html
_______________________________________________
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[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/dsi: enable DSC

[Patchwork]

== Series Details ==

Series: drm/i915/dsi: enable DSC
URL   : https://patchwork.freedesktop.org/series/69202/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_7299 -> Patchwork_15197
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15197/index.html

Known issues
------------

  Here are the changes found in Patchwork_15197 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@gem_exec_suspend@basic-s3:
    - fi-cml-s:           [PASS][1] -> [DMESG-WARN][2] ([fdo#111764])
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7299/fi-cml-s/igt@gem_exec_suspend@basic-s3.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15197/fi-cml-s/igt@gem_exec_suspend@basic-s3.html

  
#### Possible fixes ####

  * igt@gem_exec_gttfill@basic:
    - {fi-tgl-u}:         [INCOMPLETE][3] ([fdo#111593]) -> [PASS][4]
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7299/fi-tgl-u/igt@gem_exec_gttfill@basic.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15197/fi-tgl-u/igt@gem_exec_gttfill@basic.html

  * igt@i915_selftest@live_blt:
    - fi-hsw-peppy:       [DMESG-FAIL][5] ([fdo#112147]) -> [PASS][6]
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7299/fi-hsw-peppy/igt@i915_selftest@live_blt.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15197/fi-hsw-peppy/igt@i915_selftest@live_blt.html

  
#### Warnings ####

  * igt@kms_chamelium@hdmi-hpd-fast:
    - fi-kbl-7500u:       [FAIL][7] ([fdo#111407]) -> [FAIL][8] ([fdo#111045] / [fdo#111096])
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7299/fi-kbl-7500u/igt@kms_chamelium@hdmi-hpd-fast.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15197/fi-kbl-7500u/igt@kms_chamelium@hdmi-hpd-fast.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#111045]: https://bugs.freedesktop.org/show_bug.cgi?id=111045
  [fdo#111096]: https://bugs.freedesktop.org/show_bug.cgi?id=111096
  [fdo#111407]: https://bugs.freedesktop.org/show_bug.cgi?id=111407
  [fdo#111593]: https://bugs.freedesktop.org/show_bug.cgi?id=111593
  [fdo#111764]: https://bugs.freedesktop.org/show_bug.cgi?id=111764
  [fdo#112147]: https://bugs.freedesktop.org/show_bug.cgi?id=112147


Participating hosts (51 -> 45)
------------------------------

  Missing    (6): fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-byt-clapper fi-bdw-samus 


Build changes
-------------

  * CI: CI-20190529 -> None
  * Linux: CI_DRM_7299 -> Patchwork_15197

  CI-20190529: 20190529
  CI_DRM_7299: e7de48a8b1161a99f4b8e4483bc1bb85f5d31039 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_5268: c94958b8f7caefcda72392417ae6f3a98e36a48b @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_15197: 9ac145cbd5972b000deb6586bd4a1cb0e99e8413 @ git://anongit.freedesktop.org/gfx-ci/linux


== Linux commits ==

9ac145cbd597 drm/i915/dsi: add support for DSC
5940f47d1ff4 drm/i915/dsc: add support for computing and writing PPS for DSI encoders
df30419003c1 drm/i915/dsc: move slice height calculation to encoder
d3b5ec793ae8 drm/i915/dsc: move DP specific compute params to intel_dp.c
bfda0b2963dd drm/i915/bios: add support for querying DSC details for encoder
33a264f49a5c drm/i915/bios: parse compression parameters block
d5251f660966 drm/i915/bios: pass devdata to parse_ddi_port
af24a1b0a92c drm/i915/bios: store child devices in a list
a5c514d75474 drm/i915/bios: use a flag for vbt hdmi level shift presence

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15197/index.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

✓ Fi.CI.IGT: success for drm/i915/dsi: enable DSC

[Patchwork]

== Series Details ==

Series: drm/i915/dsi: enable DSC
URL   : https://patchwork.freedesktop.org/series/69202/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_7299_full -> Patchwork_15197_full
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  

Known issues
------------

  Here are the changes found in Patchwork_15197_full that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@gem_ctx_exec@basic-invalid-context-vcs1:
    - shard-iclb:         [PASS][1] -> [SKIP][2] ([fdo#112080]) +12 similar issues
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7299/shard-iclb2/igt@gem_ctx_exec@basic-invalid-context-vcs1.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15197/shard-iclb5/igt@gem_ctx_exec@basic-invalid-context-vcs1.html

  * igt@gem_ctx_isolation@vcs1-none:
    - shard-iclb:         [PASS][3] -> [SKIP][4] ([fdo#109276] / [fdo#112080]) +3 similar issues
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7299/shard-iclb1/igt@gem_ctx_isolation@vcs1-none.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15197/shard-iclb7/igt@gem_ctx_isolation@vcs1-none.html

  * igt@gem_ctx_switch@all-light:
    - shard-tglb:         [PASS][5] -> [INCOMPLETE][6] ([fdo#111672])
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7299/shard-tglb8/igt@gem_ctx_switch@all-light.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15197/shard-tglb6/igt@gem_ctx_switch@all-light.html

  * igt@gem_eio@unwedge-stress:
    - shard-snb:          [PASS][7] -> [FAIL][8] ([fdo#109661])
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7299/shard-snb6/igt@gem_eio@unwedge-stress.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15197/shard-snb6/igt@gem_eio@unwedge-stress.html

  * igt@gem_exec_balancer@smoke:
    - shard-iclb:         [PASS][9] -> [SKIP][10] ([fdo#110854])
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7299/shard-iclb4/igt@gem_exec_balancer@smoke.html
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15197/shard-iclb5/igt@gem_exec_balancer@smoke.html
    - shard-tglb:         [PASS][11] -> [INCOMPLETE][12] ([fdo#111593])
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7299/shard-tglb2/igt@gem_exec_balancer@smoke.html
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15197/shard-tglb8/igt@gem_exec_balancer@smoke.html

  * igt@gem_exec_create@forked:
    - shard-tglb:         [PASS][13] -> [INCOMPLETE][14] ([fdo#108838] / [fdo#111747])
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7299/shard-tglb4/igt@gem_exec_create@forked.html
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15197/shard-tglb6/igt@gem_exec_create@forked.html

  * igt@gem_exec_nop@basic-series:
    - shard-tglb:         [PASS][15] -> [INCOMPLETE][16] ([fdo#111747])
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7299/shard-tglb6/igt@gem_exec_nop@basic-series.html
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15197/shard-tglb6/igt@gem_exec_nop@basic-series.html

  * igt@gem_exec_schedule@in-order-bsd:
    - shard-iclb:         [PASS][17] -> [SKIP][18] ([fdo#112146]) +7 similar issues
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7299/shard-iclb3/igt@gem_exec_schedule@in-order-bsd.html
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15197/shard-iclb2/igt@gem_exec_schedule@in-order-bsd.html

  * igt@gem_exec_schedule@out-order-bsd2:
    - shard-iclb:         [PASS][19] -> [SKIP][20] ([fdo#109276]) +13 similar issues
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7299/shard-iclb1/igt@gem_exec_schedule@out-order-bsd2.html
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15197/shard-iclb8/igt@gem_exec_schedule@out-order-bsd2.html

  * igt@gem_exec_schedule@preempt-queue-chain-bsd1:
    - shard-tglb:         [PASS][21] -> [INCOMPLETE][22] ([fdo#111606] / [fdo#111677])
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7299/shard-tglb5/igt@gem_exec_schedule@preempt-queue-chain-bsd1.html
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15197/shard-tglb6/igt@gem_exec_schedule@preempt-queue-chain-bsd1.html

  * igt@gem_exec_schedule@preempt-queue-chain-vebox:
    - shard-tglb:         [PASS][23] -> [INCOMPLETE][24] ([fdo#111677])
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7299/shard-tglb7/igt@gem_exec_schedule@preempt-queue-chain-vebox.html
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15197/shard-tglb6/igt@gem_exec_schedule@preempt-queue-chain-vebox.html

  * igt@gem_exec_suspend@basic-s0:
    - shard-tglb:         [PASS][25] -> [INCOMPLETE][26] ([fdo#111832])
   [25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7299/shard-tglb3/igt@gem_exec_suspend@basic-s0.html
   [26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15197/shard-tglb5/igt@gem_exec_suspend@basic-s0.html

  * igt@gem_exec_suspend@basic-s4-devices:
    - shard-tglb:         [PASS][27] -> [INCOMPLETE][28] ([fdo#111850])
   [27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7299/shard-tglb2/igt@gem_exec_suspend@basic-s4-devices.html
   [28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15197/shard-tglb3/igt@gem_exec_suspend@basic-s4-devices.html

  * igt@gem_workarounds@suspend-resume-fd:
    - shard-tglb:         [PASS][29] -> [INCOMPLETE][30] ([fdo#111832] / [fdo#111850]) +1 similar issue
   [29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7299/shard-tglb8/igt@gem_workarounds@suspend-resume-fd.html
   [30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15197/shard-tglb2/igt@gem_workarounds@suspend-resume-fd.html

  * igt@i915_pm_rps@waitboost:
    - shard-apl:          [PASS][31] -> [FAIL][32] ([fdo#102250])
   [31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7299/shard-apl7/igt@i915_pm_rps@waitboost.html
   [32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15197/shard-apl6/igt@i915_pm_rps@waitboost.html

  * igt@kms_cursor_legacy@flip-vs-cursor-atomic:
    - shard-skl:          [PASS][33] -> [FAIL][34] ([fdo#102670])
   [33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7299/shard-skl8/igt@kms_cursor_legacy@flip-vs-cursor-atomic.html
   [34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15197/shard-skl5/igt@kms_cursor_legacy@flip-vs-cursor-atomic.html

  * igt@kms_flip@flip-vs-expired-vblank-interruptible:
    - shard-skl:          [PASS][35] -> [FAIL][36] ([fdo#105363])
   [35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7299/shard-skl8/igt@kms_flip@flip-vs-expired-vblank-interruptible.html
   [36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15197/shard-skl5/igt@kms_flip@flip-vs-expired-vblank-interruptible.html

  * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-indfb-draw-mmap-wc:
    - shard-tglb:         [PASS][37] -> [FAIL][38] ([fdo#103167])
   [37]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7299/shard-tglb3/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-indfb-draw-mmap-wc.html
   [38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15197/shard-tglb5/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-indfb-draw-mmap-wc.html

  * igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-spr-indfb-move:
    - shard-iclb:         [PASS][39] -> [FAIL][40] ([fdo#103167])
   [39]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7299/shard-iclb5/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-spr-indfb-move.html
   [40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15197/shard-iclb2/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-spr-indfb-move.html

  * igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a:
    - shard-kbl:          [PASS][41] -> [DMESG-WARN][42] ([fdo#108566]) +2 similar issues
   [41]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7299/shard-kbl1/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a.html
   [42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15197/shard-kbl7/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a.html

  * igt@kms_plane_alpha_blend@pipe-b-coverage-7efc:
    - shard-skl:          [PASS][43] -> [FAIL][44] ([fdo#108145] / [fdo#110403])
   [43]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7299/shard-skl10/igt@kms_plane_alpha_blend@pipe-b-coverage-7efc.html
   [44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15197/shard-skl3/igt@kms_plane_alpha_blend@pipe-b-coverage-7efc.html

  * igt@kms_psr2_su@frontbuffer:
    - shard-iclb:         [PASS][45] -> [SKIP][46] ([fdo#109642] / [fdo#111068])
   [45]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7299/shard-iclb2/igt@kms_psr2_su@frontbuffer.html
   [46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15197/shard-iclb5/igt@kms_psr2_su@frontbuffer.html

  * igt@kms_psr@psr2_cursor_plane_move:
    - shard-iclb:         [PASS][47] -> [SKIP][48] ([fdo#109441]) +2 similar issues
   [47]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7299/shard-iclb2/igt@kms_psr@psr2_cursor_plane_move.html
   [48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15197/shard-iclb5/igt@kms_psr@psr2_cursor_plane_move.html

  * igt@kms_setmode@basic:
    - shard-kbl:          [PASS][49] -> [FAIL][50] ([fdo#99912])
   [49]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7299/shard-kbl2/igt@kms_setmode@basic.html
   [50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15197/shard-kbl6/igt@kms_setmode@basic.html

  * igt@kms_vblank@pipe-a-ts-continuation-suspend:
    - shard-apl:          [PASS][51] -> [DMESG-WARN][52] ([fdo#108566]) +2 similar issues
   [51]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7299/shard-apl4/igt@kms_vblank@pipe-a-ts-continuation-suspend.html
   [52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15197/shard-apl1/igt@kms_vblank@pipe-a-ts-continuation-suspend.html

  
#### Possible fixes ####

  * igt@gem_ctx_isolation@rcs0-s3:
    - shard-apl:          [DMESG-WARN][53] ([fdo#108566]) -> [PASS][54] +1 similar issue
   [53]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7299/shard-apl2/igt@gem_ctx_isolation@rcs0-s3.html
   [54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15197/shard-apl3/igt@gem_ctx_isolation@rcs0-s3.html

  * igt@gem_ctx_isolation@vecs0-s3:
    - shard-tglb:         [INCOMPLETE][55] ([fdo#111832]) -> [PASS][56]
   [55]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7299/shard-tglb3/igt@gem_ctx_isolation@vecs0-s3.html
   [56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15197/shard-tglb7/igt@gem_ctx_isolation@vecs0-s3.html

  * igt@gem_ctx_persistence@vcs1-queued:
    - shard-iclb:         [SKIP][57] ([fdo#109276] / [fdo#112080]) -> [PASS][58] +2 similar issues
   [57]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7299/shard-iclb3/igt@gem_ctx_persistence@vcs1-queued.html
   [58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15197/shard-iclb2/igt@gem_ctx_persistence@vcs1-queued.html

  * igt@gem_ctx_shared@exec-single-timeline-bsd:
    - shard-iclb:         [SKIP][59] ([fdo#110841]) -> [PASS][60]
   [59]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7299/shard-iclb4/igt@gem_ctx_shared@exec-single-timeline-bsd.html
   [60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15197/shard-iclb5/igt@gem_ctx_shared@exec-single-timeline-bsd.html

  * igt@gem_exec_parallel@vcs1-fds:
    - shard-iclb:         [SKIP][61] ([fdo#112080]) -> [PASS][62] +12 similar issues
   [61]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7299/shard-iclb3/igt@gem_exec_parallel@vcs1-fds.html
   [62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15197/shard-iclb1/igt@gem_exec_parallel@vcs1-fds.html

  * igt@gem_exec_schedule@preemptive-hang-bsd:
    - shard-iclb:         [SKIP][63] ([fdo#112146]) -> [PASS][64] +3 similar issues
   [63]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7299/shard-iclb1/igt@gem_exec_schedule@preemptive-hang-bsd.html
   [64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15197/shard-iclb8/igt@gem_exec_schedule@preemptive-hang-bsd.html

  * igt@gem_exec_schedule@smoketest-all:
    - shard-tglb:         [INCOMPLETE][65] ([fdo#111855]) -> [PASS][66]
   [65]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7299/shard-tglb6/igt@gem_exec_schedule@smoketest-all.html
   [66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15197/shard-tglb4/igt@gem_exec_schedule@smoketest-all.html

  * igt@gem_userptr_blits@dmabuf-unsync:
    - shard-hsw:          [DMESG-WARN][67] ([fdo#110789] / [fdo#111870]) -> [PASS][68]
   [67]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7299/shard-hsw5/igt@gem_userptr_blits@dmabuf-unsync.html
   [68]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15197/shard-hsw2/igt@gem_userptr_blits@dmabuf-unsync.html

  * igt@gem_workarounds@suspend-resume:
    - shard-tglb:         [INCOMPLETE][69] ([fdo#111832] / [fdo#111850]) -> [PASS][70] +3 similar issues
   [69]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7299/shard-tglb7/igt@gem_workarounds@suspend-resume.html
   [70]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15197/shard-tglb8/igt@gem_workarounds@suspend-resume.html

  * igt@i915_selftest@live_requests:
    - shard-tglb:         [INCOMPLETE][71] ([fdo#112057]) -> [PASS][72]
   [71]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7299/shard-tglb2/igt@i915_selftest@live_requests.html
   [72]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15197/shard-tglb4/igt@i915_selftest@live_requests.html

  * igt@kms_color@pipe-b-ctm-0-5:
    - shard-skl:          [DMESG-WARN][73] ([fdo#106107]) -> [PASS][74]
   [73]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7299/shard-skl4/igt@kms_color@pipe-b-ctm-0-5.html
   [74]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15197/shard-skl10/igt@kms_color@pipe-b-ctm-0-5.html

  * igt@kms_cursor_legacy@cursor-vs-flip-atomic:
    - shard-hsw:          [FAIL][75] ([fdo#103355]) -> [PASS][76]
   [75]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7299/shard-hsw6/igt@kms_cursor_legacy@cursor-vs-flip-atomic.html
   [76]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15197/shard-hsw5/igt@kms_cursor_legacy@cursor-vs-flip-atomic.html

  * igt@kms_cursor_legacy@cursora-vs-flipa-atomic:
    - shard-tglb:         [INCOMPLETE][77] ([fdo#112035 ]) -> [PASS][78]
   [77]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7299/shard-tglb1/igt@kms_cursor_legacy@cursora-vs-flipa-atomic.html
   [78]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15197/shard-tglb3/igt@kms_cursor_legacy@cursora-vs-flipa-atomic.html

  * igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size:
    - shard-skl:          [FAIL][79] ([fdo#102670]) -> [PASS][80]
   [79]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7299/shard-skl7/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size.html
   [80]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15197/shard-skl2/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size.html

  * igt@kms_cursor_legacy@flip-vs-cursor-busy-crc-legacy:
    - shard-apl:          [DMESG-WARN][81] -> [PASS][82]
   [81]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7299/shard-apl6/igt@kms_cursor_legacy@flip-vs-cursor-busy-crc-legacy.html
   [82]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15197/shard-apl2/igt@kms_cursor_legacy@flip-vs-cursor-busy-crc-legacy.html

  * igt@kms_frontbuffer_tracking@fbc-1p-pri-indfb-multidraw:
    - shard-iclb:         [FAIL][83] ([fdo#103167]) -> [PASS][84] +4 similar issues
   [83]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7299/shard-iclb2/igt@kms_frontbuffer_tracking@fbc-1p-pri-indfb-multidraw.html
   [84]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15197/shard-iclb5/igt@kms_frontbuffer_tracking@fbc-1p-pri-indfb-multidraw.html

  * igt@kms_frontbuffer_tracking@fbc-suspend:
    - shard-kbl:          [DMESG-WARN][85] ([fdo#108566]) -> [PASS][86] +9 similar issues
   [85]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7299/shard-kbl7/igt@kms_frontbuffer_tracking@fbc-suspend.html
   [86]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15197/shard-kbl2/igt@kms_frontbuffer_tracking@fbc-suspend.html

  * igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-indfb-plflip-blt:
    - shard-tglb:         [FAIL][87] ([fdo#103167]) -> [PASS][88] +3 similar issues
   [87]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7299/shard-tglb2/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-indfb-plflip-blt.html
   [88]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15197/shard-tglb1/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-indfb-plflip-blt.html

  * igt@kms_pipe_crc_basic@hang-read-crc-pipe-d:
    - shard-tglb:         [TIMEOUT][89] ([fdo#112168]) -> [PASS][90]
   [89]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7299/shard-tglb6/igt@kms_pipe_crc_basic@hang-read-crc-pipe-d.html
   [90]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15197/shard-tglb5/igt@kms_pipe_crc_basic@hang-read-crc-pipe-d.html

  * igt@kms_psr@psr2_sprite_render:
    - shard-iclb:         [SKIP][91] ([fdo#109441]) -> [PASS][92] +2 similar issues
   [91]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7299/shard-iclb5/igt@kms_psr@psr2_sprite_render.html
   [92]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15197/shard-iclb2/igt@kms_psr@psr2_sprite_render.html

  * igt@kms_vblank@pipe-a-ts-continuation-dpms-suspend:
    - shard-hsw:          [INCOMPLETE][93] ([fdo#103540]) -> [PASS][94] +1 similar issue
   [93]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7299/shard-hsw5/igt@kms_vblank@pipe-a-ts-continuation-dpms-suspend.html
   [94]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15197/shard-hsw6/igt@kms_vblank@pipe-a-ts-continuation-dpms-suspend.html

  * igt@prime_busy@hang-bsd2:
    - shard-iclb:         [SKIP][95] ([fdo#109276]) -> [PASS][96] +23 similar issues
   [95]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7299/shard-iclb7/igt@prime_busy@hang-bsd2.html
   [96]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15197/shard-iclb4/igt@prime_busy@hang-bsd2.html

  
#### Warnings ####

  * igt@gem_ctx_isolation@vcs1-nonpriv:
    - shard-iclb:         [FAIL][97] ([fdo#111329]) -> [SKIP][98] ([fdo#109276] / [fdo#112080])
   [97]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7299/shard-iclb2/igt@gem_ctx_isolation@vcs1-nonpriv.html
   [98]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15197/shard-iclb5/igt@gem_ctx_isolation@vcs1-nonpriv.html

  * igt@gem_eio@kms:
    - shard-snb:          [INCOMPLETE][99] ([fdo#105411]) -> [DMESG-FAIL][100] ([fdo#111757])
   [99]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7299/shard-snb1/igt@gem_eio@kms.html
   [100]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15197/shard-snb4/igt@gem_eio@kms.html

  * igt@gem_mocs_settings@mocs-reset-bsd2:
    - shard-iclb:         [FAIL][101] ([fdo#111330]) -> [SKIP][102] ([fdo#109276]) +3 similar issues
   [101]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7299/shard-iclb2/igt@gem_mocs_settings@mocs-reset-bsd2.html
   [102]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15197/shard-iclb6/igt@gem_mocs_settings@mocs-reset-bsd2.html

  * igt@gem_userptr_blits@dmabuf-sync:
    - shard-snb:          [DMESG-WARN][103] ([fdo#111870]) -> [DMESG-WARN][104] ([fdo#110789] / [fdo#111870])
   [103]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7299/shard-snb7/igt@gem_userptr_blits@dmabuf-sync.html
   [104]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15197/shard-snb6/igt@gem_userptr_blits@dmabuf-sync.html

  * igt@gem_userptr_blits@map-fixed-invalidate-busy:
    - shard-hsw:          [DMESG-WARN][105] ([fdo#111870]) -> [DMESG-WARN][106] ([fdo#110789] / [fdo#111870])
   [105]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7299/shard-hsw2/igt@gem_userptr_blits@map-fixed-invalidate-busy.html
   [106]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15197/shard-hsw6/igt@gem_userptr_blits@map-fixed-invalidate-busy.html

  * igt@gem_userptr_blits@sync-unmap-cycles:
    - shard-snb:          [DMESG-WARN][107] ([fdo#110789] / [fdo#111870]) -> [DMESG-WARN][108] ([fdo#111870])
   [107]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7299/shard-snb6/igt@gem_userptr_blits@sync-unmap-cycles.html
   [108]: https://intel

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15197/index.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/dsi: enable DSC

[Patchwork]

== Series Details ==

Series: drm/i915/dsi: enable DSC
URL   : https://patchwork.freedesktop.org/series/69202/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_7299_full -> Patchwork_15197_full
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  

Known issues
------------

  Here are the changes found in Patchwork_15197_full that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@gem_ctx_exec@basic-invalid-context-vcs1:
    - shard-iclb:         [PASS][1] -> [SKIP][2] ([fdo#112080]) +12 similar issues
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7299/shard-iclb2/igt@gem_ctx_exec@basic-invalid-context-vcs1.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15197/shard-iclb5/igt@gem_ctx_exec@basic-invalid-context-vcs1.html

  * igt@gem_ctx_isolation@vcs1-none:
    - shard-iclb:         [PASS][3] -> [SKIP][4] ([fdo#109276] / [fdo#112080]) +3 similar issues
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7299/shard-iclb1/igt@gem_ctx_isolation@vcs1-none.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15197/shard-iclb7/igt@gem_ctx_isolation@vcs1-none.html

  * igt@gem_ctx_switch@all-light:
    - shard-tglb:         [PASS][5] -> [INCOMPLETE][6] ([fdo#111672])
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7299/shard-tglb8/igt@gem_ctx_switch@all-light.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15197/shard-tglb6/igt@gem_ctx_switch@all-light.html

  * igt@gem_eio@unwedge-stress:
    - shard-snb:          [PASS][7] -> [FAIL][8] ([fdo#109661])
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7299/shard-snb6/igt@gem_eio@unwedge-stress.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15197/shard-snb6/igt@gem_eio@unwedge-stress.html

  * igt@gem_exec_balancer@smoke:
    - shard-iclb:         [PASS][9] -> [SKIP][10] ([fdo#110854])
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7299/shard-iclb4/igt@gem_exec_balancer@smoke.html
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15197/shard-iclb5/igt@gem_exec_balancer@smoke.html
    - shard-tglb:         [PASS][11] -> [INCOMPLETE][12] ([fdo#111593])
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7299/shard-tglb2/igt@gem_exec_balancer@smoke.html
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15197/shard-tglb8/igt@gem_exec_balancer@smoke.html

  * igt@gem_exec_create@forked:
    - shard-tglb:         [PASS][13] -> [INCOMPLETE][14] ([fdo#108838] / [fdo#111747])
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7299/shard-tglb4/igt@gem_exec_create@forked.html
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15197/shard-tglb6/igt@gem_exec_create@forked.html

  * igt@gem_exec_nop@basic-series:
    - shard-tglb:         [PASS][15] -> [INCOMPLETE][16] ([fdo#111747])
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7299/shard-tglb6/igt@gem_exec_nop@basic-series.html
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15197/shard-tglb6/igt@gem_exec_nop@basic-series.html

  * igt@gem_exec_schedule@in-order-bsd:
    - shard-iclb:         [PASS][17] -> [SKIP][18] ([fdo#112146]) +7 similar issues
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7299/shard-iclb3/igt@gem_exec_schedule@in-order-bsd.html
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15197/shard-iclb2/igt@gem_exec_schedule@in-order-bsd.html

  * igt@gem_exec_schedule@out-order-bsd2:
    - shard-iclb:         [PASS][19] -> [SKIP][20] ([fdo#109276]) +13 similar issues
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7299/shard-iclb1/igt@gem_exec_schedule@out-order-bsd2.html
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15197/shard-iclb8/igt@gem_exec_schedule@out-order-bsd2.html

  * igt@gem_exec_schedule@preempt-queue-chain-bsd1:
    - shard-tglb:         [PASS][21] -> [INCOMPLETE][22] ([fdo#111606] / [fdo#111677])
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7299/shard-tglb5/igt@gem_exec_schedule@preempt-queue-chain-bsd1.html
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15197/shard-tglb6/igt@gem_exec_schedule@preempt-queue-chain-bsd1.html

  * igt@gem_exec_schedule@preempt-queue-chain-vebox:
    - shard-tglb:         [PASS][23] -> [INCOMPLETE][24] ([fdo#111677])
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7299/shard-tglb7/igt@gem_exec_schedule@preempt-queue-chain-vebox.html
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15197/shard-tglb6/igt@gem_exec_schedule@preempt-queue-chain-vebox.html

  * igt@gem_exec_suspend@basic-s0:
    - shard-tglb:         [PASS][25] -> [INCOMPLETE][26] ([fdo#111832])
   [25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7299/shard-tglb3/igt@gem_exec_suspend@basic-s0.html
   [26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15197/shard-tglb5/igt@gem_exec_suspend@basic-s0.html

  * igt@gem_exec_suspend@basic-s4-devices:
    - shard-tglb:         [PASS][27] -> [INCOMPLETE][28] ([fdo#111850])
   [27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7299/shard-tglb2/igt@gem_exec_suspend@basic-s4-devices.html
   [28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15197/shard-tglb3/igt@gem_exec_suspend@basic-s4-devices.html

  * igt@gem_workarounds@suspend-resume-fd:
    - shard-tglb:         [PASS][29] -> [INCOMPLETE][30] ([fdo#111832] / [fdo#111850]) +1 similar issue
   [29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7299/shard-tglb8/igt@gem_workarounds@suspend-resume-fd.html
   [30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15197/shard-tglb2/igt@gem_workarounds@suspend-resume-fd.html

  * igt@i915_pm_rps@waitboost:
    - shard-apl:          [PASS][31] -> [FAIL][32] ([fdo#102250])
   [31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7299/shard-apl7/igt@i915_pm_rps@waitboost.html
   [32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15197/shard-apl6/igt@i915_pm_rps@waitboost.html

  * igt@kms_cursor_legacy@flip-vs-cursor-atomic:
    - shard-skl:          [PASS][33] -> [FAIL][34] ([fdo#102670])
   [33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7299/shard-skl8/igt@kms_cursor_legacy@flip-vs-cursor-atomic.html
   [34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15197/shard-skl5/igt@kms_cursor_legacy@flip-vs-cursor-atomic.html

  * igt@kms_flip@flip-vs-expired-vblank-interruptible:
    - shard-skl:          [PASS][35] -> [FAIL][36] ([fdo#105363])
   [35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7299/shard-skl8/igt@kms_flip@flip-vs-expired-vblank-interruptible.html
   [36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15197/shard-skl5/igt@kms_flip@flip-vs-expired-vblank-interruptible.html

  * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-indfb-draw-mmap-wc:
    - shard-tglb:         [PASS][37] -> [FAIL][38] ([fdo#103167])
   [37]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7299/shard-tglb3/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-indfb-draw-mmap-wc.html
   [38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15197/shard-tglb5/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-indfb-draw-mmap-wc.html

  * igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-spr-indfb-move:
    - shard-iclb:         [PASS][39] -> [FAIL][40] ([fdo#103167])
   [39]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7299/shard-iclb5/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-spr-indfb-move.html
   [40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15197/shard-iclb2/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-spr-indfb-move.html

  * igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a:
    - shard-kbl:          [PASS][41] -> [DMESG-WARN][42] ([fdo#108566]) +2 similar issues
   [41]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7299/shard-kbl1/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a.html
   [42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15197/shard-kbl7/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a.html

  * igt@kms_plane_alpha_blend@pipe-b-coverage-7efc:
    - shard-skl:          [PASS][43] -> [FAIL][44] ([fdo#108145] / [fdo#110403])
   [43]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7299/shard-skl10/igt@kms_plane_alpha_blend@pipe-b-coverage-7efc.html
   [44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15197/shard-skl3/igt@kms_plane_alpha_blend@pipe-b-coverage-7efc.html

  * igt@kms_psr2_su@frontbuffer:
    - shard-iclb:         [PASS][45] -> [SKIP][46] ([fdo#109642] / [fdo#111068])
   [45]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7299/shard-iclb2/igt@kms_psr2_su@frontbuffer.html
   [46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15197/shard-iclb5/igt@kms_psr2_su@frontbuffer.html

  * igt@kms_psr@psr2_cursor_plane_move:
    - shard-iclb:         [PASS][47] -> [SKIP][48] ([fdo#109441]) +2 similar issues
   [47]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7299/shard-iclb2/igt@kms_psr@psr2_cursor_plane_move.html
   [48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15197/shard-iclb5/igt@kms_psr@psr2_cursor_plane_move.html

  * igt@kms_setmode@basic:
    - shard-kbl:          [PASS][49] -> [FAIL][50] ([fdo#99912])
   [49]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7299/shard-kbl2/igt@kms_setmode@basic.html
   [50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15197/shard-kbl6/igt@kms_setmode@basic.html

  * igt@kms_vblank@pipe-a-ts-continuation-suspend:
    - shard-apl:          [PASS][51] -> [DMESG-WARN][52] ([fdo#108566]) +2 similar issues
   [51]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7299/shard-apl4/igt@kms_vblank@pipe-a-ts-continuation-suspend.html
   [52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15197/shard-apl1/igt@kms_vblank@pipe-a-ts-continuation-suspend.html

  
#### Possible fixes ####

  * igt@gem_ctx_isolation@rcs0-s3:
    - shard-apl:          [DMESG-WARN][53] ([fdo#108566]) -> [PASS][54] +1 similar issue
   [53]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7299/shard-apl2/igt@gem_ctx_isolation@rcs0-s3.html
   [54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15197/shard-apl3/igt@gem_ctx_isolation@rcs0-s3.html

  * igt@gem_ctx_isolation@vecs0-s3:
    - shard-tglb:         [INCOMPLETE][55] ([fdo#111832]) -> [PASS][56]
   [55]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7299/shard-tglb3/igt@gem_ctx_isolation@vecs0-s3.html
   [56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15197/shard-tglb7/igt@gem_ctx_isolation@vecs0-s3.html

  * igt@gem_ctx_persistence@vcs1-queued:
    - shard-iclb:         [SKIP][57] ([fdo#109276] / [fdo#112080]) -> [PASS][58] +2 similar issues
   [57]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7299/shard-iclb3/igt@gem_ctx_persistence@vcs1-queued.html
   [58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15197/shard-iclb2/igt@gem_ctx_persistence@vcs1-queued.html

  * igt@gem_ctx_shared@exec-single-timeline-bsd:
    - shard-iclb:         [SKIP][59] ([fdo#110841]) -> [PASS][60]
   [59]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7299/shard-iclb4/igt@gem_ctx_shared@exec-single-timeline-bsd.html
   [60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15197/shard-iclb5/igt@gem_ctx_shared@exec-single-timeline-bsd.html

  * igt@gem_exec_parallel@vcs1-fds:
    - shard-iclb:         [SKIP][61] ([fdo#112080]) -> [PASS][62] +12 similar issues
   [61]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7299/shard-iclb3/igt@gem_exec_parallel@vcs1-fds.html
   [62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15197/shard-iclb1/igt@gem_exec_parallel@vcs1-fds.html

  * igt@gem_exec_schedule@preemptive-hang-bsd:
    - shard-iclb:         [SKIP][63] ([fdo#112146]) -> [PASS][64] +3 similar issues
   [63]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7299/shard-iclb1/igt@gem_exec_schedule@preemptive-hang-bsd.html
   [64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15197/shard-iclb8/igt@gem_exec_schedule@preemptive-hang-bsd.html

  * igt@gem_exec_schedule@smoketest-all:
    - shard-tglb:         [INCOMPLETE][65] ([fdo#111855]) -> [PASS][66]
   [65]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7299/shard-tglb6/igt@gem_exec_schedule@smoketest-all.html
   [66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15197/shard-tglb4/igt@gem_exec_schedule@smoketest-all.html

  * igt@gem_userptr_blits@dmabuf-unsync:
    - shard-hsw:          [DMESG-WARN][67] ([fdo#110789] / [fdo#111870]) -> [PASS][68]
   [67]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7299/shard-hsw5/igt@gem_userptr_blits@dmabuf-unsync.html
   [68]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15197/shard-hsw2/igt@gem_userptr_blits@dmabuf-unsync.html

  * igt@gem_workarounds@suspend-resume:
    - shard-tglb:         [INCOMPLETE][69] ([fdo#111832] / [fdo#111850]) -> [PASS][70] +3 similar issues
   [69]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7299/shard-tglb7/igt@gem_workarounds@suspend-resume.html
   [70]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15197/shard-tglb8/igt@gem_workarounds@suspend-resume.html

  * igt@i915_selftest@live_requests:
    - shard-tglb:         [INCOMPLETE][71] ([fdo#112057]) -> [PASS][72]
   [71]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7299/shard-tglb2/igt@i915_selftest@live_requests.html
   [72]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15197/shard-tglb4/igt@i915_selftest@live_requests.html

  * igt@kms_color@pipe-b-ctm-0-5:
    - shard-skl:          [DMESG-WARN][73] ([fdo#106107]) -> [PASS][74]
   [73]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7299/shard-skl4/igt@kms_color@pipe-b-ctm-0-5.html
   [74]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15197/shard-skl10/igt@kms_color@pipe-b-ctm-0-5.html

  * igt@kms_cursor_legacy@cursor-vs-flip-atomic:
    - shard-hsw:          [FAIL][75] ([fdo#103355]) -> [PASS][76]
   [75]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7299/shard-hsw6/igt@kms_cursor_legacy@cursor-vs-flip-atomic.html
   [76]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15197/shard-hsw5/igt@kms_cursor_legacy@cursor-vs-flip-atomic.html

  * igt@kms_cursor_legacy@cursora-vs-flipa-atomic:
    - shard-tglb:         [INCOMPLETE][77] ([fdo#112035 ]) -> [PASS][78]
   [77]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7299/shard-tglb1/igt@kms_cursor_legacy@cursora-vs-flipa-atomic.html
   [78]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15197/shard-tglb3/igt@kms_cursor_legacy@cursora-vs-flipa-atomic.html

  * igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size:
    - shard-skl:          [FAIL][79] ([fdo#102670]) -> [PASS][80]
   [79]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7299/shard-skl7/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size.html
   [80]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15197/shard-skl2/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size.html

  * igt@kms_cursor_legacy@flip-vs-cursor-busy-crc-legacy:
    - shard-apl:          [DMESG-WARN][81] -> [PASS][82]
   [81]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7299/shard-apl6/igt@kms_cursor_legacy@flip-vs-cursor-busy-crc-legacy.html
   [82]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15197/shard-apl2/igt@kms_cursor_legacy@flip-vs-cursor-busy-crc-legacy.html

  * igt@kms_frontbuffer_tracking@fbc-1p-pri-indfb-multidraw:
    - shard-iclb:         [FAIL][83] ([fdo#103167]) -> [PASS][84] +4 similar issues
   [83]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7299/shard-iclb2/igt@kms_frontbuffer_tracking@fbc-1p-pri-indfb-multidraw.html
   [84]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15197/shard-iclb5/igt@kms_frontbuffer_tracking@fbc-1p-pri-indfb-multidraw.html

  * igt@kms_frontbuffer_tracking@fbc-suspend:
    - shard-kbl:          [DMESG-WARN][85] ([fdo#108566]) -> [PASS][86] +9 similar issues
   [85]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7299/shard-kbl7/igt@kms_frontbuffer_tracking@fbc-suspend.html
   [86]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15197/shard-kbl2/igt@kms_frontbuffer_tracking@fbc-suspend.html

  * igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-indfb-plflip-blt:
    - shard-tglb:         [FAIL][87] ([fdo#103167]) -> [PASS][88] +3 similar issues
   [87]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7299/shard-tglb2/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-indfb-plflip-blt.html
   [88]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15197/shard-tglb1/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-indfb-plflip-blt.html

  * igt@kms_pipe_crc_basic@hang-read-crc-pipe-d:
    - shard-tglb:         [TIMEOUT][89] ([fdo#112168]) -> [PASS][90]
   [89]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7299/shard-tglb6/igt@kms_pipe_crc_basic@hang-read-crc-pipe-d.html
   [90]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15197/shard-tglb5/igt@kms_pipe_crc_basic@hang-read-crc-pipe-d.html

  * igt@kms_psr@psr2_sprite_render:
    - shard-iclb:         [SKIP][91] ([fdo#109441]) -> [PASS][92] +2 similar issues
   [91]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7299/shard-iclb5/igt@kms_psr@psr2_sprite_render.html
   [92]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15197/shard-iclb2/igt@kms_psr@psr2_sprite_render.html

  * igt@kms_vblank@pipe-a-ts-continuation-dpms-suspend:
    - shard-hsw:          [INCOMPLETE][93] ([fdo#103540]) -> [PASS][94] +1 similar issue
   [93]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7299/shard-hsw5/igt@kms_vblank@pipe-a-ts-continuation-dpms-suspend.html
   [94]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15197/shard-hsw6/igt@kms_vblank@pipe-a-ts-continuation-dpms-suspend.html

  * igt@prime_busy@hang-bsd2:
    - shard-iclb:         [SKIP][95] ([fdo#109276]) -> [PASS][96] +23 similar issues
   [95]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7299/shard-iclb7/igt@prime_busy@hang-bsd2.html
   [96]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15197/shard-iclb4/igt@prime_busy@hang-bsd2.html

  
#### Warnings ####

  * igt@gem_ctx_isolation@vcs1-nonpriv:
    - shard-iclb:         [FAIL][97] ([fdo#111329]) -> [SKIP][98] ([fdo#109276] / [fdo#112080])
   [97]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7299/shard-iclb2/igt@gem_ctx_isolation@vcs1-nonpriv.html
   [98]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15197/shard-iclb5/igt@gem_ctx_isolation@vcs1-nonpriv.html

  * igt@gem_eio@kms:
    - shard-snb:          [INCOMPLETE][99] ([fdo#105411]) -> [DMESG-FAIL][100] ([fdo#111757])
   [99]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7299/shard-snb1/igt@gem_eio@kms.html
   [100]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15197/shard-snb4/igt@gem_eio@kms.html

  * igt@gem_mocs_settings@mocs-reset-bsd2:
    - shard-iclb:         [FAIL][101] ([fdo#111330]) -> [SKIP][102] ([fdo#109276]) +3 similar issues
   [101]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7299/shard-iclb2/igt@gem_mocs_settings@mocs-reset-bsd2.html
   [102]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15197/shard-iclb6/igt@gem_mocs_settings@mocs-reset-bsd2.html

  * igt@gem_userptr_blits@dmabuf-sync:
    - shard-snb:          [DMESG-WARN][103] ([fdo#111870]) -> [DMESG-WARN][104] ([fdo#110789] / [fdo#111870])
   [103]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7299/shard-snb7/igt@gem_userptr_blits@dmabuf-sync.html
   [104]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15197/shard-snb6/igt@gem_userptr_blits@dmabuf-sync.html

  * igt@gem_userptr_blits@map-fixed-invalidate-busy:
    - shard-hsw:          [DMESG-WARN][105] ([fdo#111870]) -> [DMESG-WARN][106] ([fdo#110789] / [fdo#111870])
   [105]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7299/shard-hsw2/igt@gem_userptr_blits@map-fixed-invalidate-busy.html
   [106]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15197/shard-hsw6/igt@gem_userptr_blits@map-fixed-invalidate-busy.html

  * igt@gem_userptr_blits@sync-unmap-cycles:
    - shard-snb:          [DMESG-WARN][107] ([fdo#110789] / [fdo#111870]) -> [DMESG-WARN][108] ([fdo#111870])
   [107]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_7299/shard-snb6/igt@gem_userptr_blits@sync-unmap-cycles.html
   [108]: https://intel

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_15197/index.html
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[PATCH] drm/i915/bios: change slice count check

[Jani Nikula]

FIXME: fixup to original.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/i915/display/intel_bios.c | 12 ++++++++----
 1 file changed, 8 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_bios.c b/drivers/gpu/drm/i915/display/intel_bios.c
index 522c399753fe..cdd30eeda7be 100644
--- a/drivers/gpu/drm/i915/display/intel_bios.c
+++ b/drivers/gpu/drm/i915/display/intel_bios.c
@@ -2260,11 +2260,9 @@ static void fill_dsc(struct intel_crtc_state *pipe_config,
 	 *
 	 * Also, per spec DSI supports 1, 2, 3 or 4 horizontal slices.
 	 */
-	if (dsc->slices_per_line & BIT(2) &&
-	    pipe_config->hw.adjusted_mode.crtc_hdisplay % 4 == 0) {
+	if (dsc->slices_per_line & BIT(2)) {
 		pipe_config->dsc.slice_count = 4;
-	} else if (dsc->slices_per_line & BIT(1) &&
-		   pipe_config->hw.adjusted_mode.crtc_hdisplay % 2 == 0) {
+	} else if (dsc->slices_per_line & BIT(1)) {
 		pipe_config->dsc.slice_count = 2;
 	} else {
 		/* FIXME */
@@ -2274,6 +2272,12 @@ static void fill_dsc(struct intel_crtc_state *pipe_config,
 		pipe_config->dsc.slice_count = 1;
 	}
 
+	if (pipe_config->hw.adjusted_mode.crtc_hdisplay %
+	    pipe_config->dsc.slice_count != 0)
+		DRM_DEBUG_KMS("DSC hdisplay %d not divisible by slice count %d\n",
+			      pipe_config->hw.adjusted_mode.crtc_hdisplay,
+			      pipe_config->dsc.slice_count);
+
 	/* FIXME: rc_buffer_block_size, using defaults in intel_vdsc.c */
 
 	/* FIXME: rc_buffer_size, using defaults in intel_vdsc.c */
-- 
2.20.1

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[Intel-gfx] [PATCH] drm/i915/bios: change slice count check

[Jani Nikula]

FIXME: fixup to original.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/i915/display/intel_bios.c | 12 ++++++++----
 1 file changed, 8 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_bios.c b/drivers/gpu/drm/i915/display/intel_bios.c
index 522c399753fe..cdd30eeda7be 100644
--- a/drivers/gpu/drm/i915/display/intel_bios.c
+++ b/drivers/gpu/drm/i915/display/intel_bios.c
@@ -2260,11 +2260,9 @@ static void fill_dsc(struct intel_crtc_state *pipe_config,
 	 *
 	 * Also, per spec DSI supports 1, 2, 3 or 4 horizontal slices.
 	 */
-	if (dsc->slices_per_line & BIT(2) &&
-	    pipe_config->hw.adjusted_mode.crtc_hdisplay % 4 == 0) {
+	if (dsc->slices_per_line & BIT(2)) {
 		pipe_config->dsc.slice_count = 4;
-	} else if (dsc->slices_per_line & BIT(1) &&
-		   pipe_config->hw.adjusted_mode.crtc_hdisplay % 2 == 0) {
+	} else if (dsc->slices_per_line & BIT(1)) {
 		pipe_config->dsc.slice_count = 2;
 	} else {
 		/* FIXME */
@@ -2274,6 +2272,12 @@ static void fill_dsc(struct intel_crtc_state *pipe_config,
 		pipe_config->dsc.slice_count = 1;
 	}
 
+	if (pipe_config->hw.adjusted_mode.crtc_hdisplay %
+	    pipe_config->dsc.slice_count != 0)
+		DRM_DEBUG_KMS("DSC hdisplay %d not divisible by slice count %d\n",
+			      pipe_config->hw.adjusted_mode.crtc_hdisplay,
+			      pipe_config->dsc.slice_count);
+
 	/* FIXME: rc_buffer_block_size, using defaults in intel_vdsc.c */
 
 	/* FIXME: rc_buffer_size, using defaults in intel_vdsc.c */
-- 
2.20.1

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Re: [PATCH 1/9] drm/i915/bios: use a flag for vbt hdmi level shift presence

[Jani Nikula]

On Fri, 08 Nov 2019, Jani Nikula <jani.nikula@intel.com> wrote:
> The pre-initialized magic value is a bit silly, switch to a flag
> instead.
>
> v2: Reduce paranoia to a single sanity check (Ville)
>
> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>

Pushed this one, thanks for the review (in another thread).

BR,
Jani.

> ---
>  drivers/gpu/drm/i915/display/intel_bios.c | 10 +---------
>  drivers/gpu/drm/i915/display/intel_ddi.c  | 13 +++++++------
>  drivers/gpu/drm/i915/i915_drv.h           |  8 ++------
>  3 files changed, 10 insertions(+), 21 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_bios.c b/drivers/gpu/drm/i915/display/intel_bios.c
> index a03f56b7b4ef..c19b234bebe6 100644
> --- a/drivers/gpu/drm/i915/display/intel_bios.c
> +++ b/drivers/gpu/drm/i915/display/intel_bios.c
> @@ -1509,6 +1509,7 @@ static void parse_ddi_port(struct drm_i915_private *dev_priv,
>  			      port_name(port),
>  			      hdmi_level_shift);
>  		info->hdmi_level_shift = hdmi_level_shift;
> +		info->hdmi_level_shift_set = true;
>  	}
>  
>  	if (bdb_version >= 204) {
> @@ -1692,8 +1693,6 @@ parse_general_definitions(struct drm_i915_private *dev_priv,
>  static void
>  init_vbt_defaults(struct drm_i915_private *dev_priv)
>  {
> -	enum port port;
> -
>  	dev_priv->vbt.crt_ddc_pin = GMBUS_PIN_VGADDC;
>  
>  	/* Default to having backlight */
> @@ -1721,13 +1720,6 @@ init_vbt_defaults(struct drm_i915_private *dev_priv)
>  	dev_priv->vbt.lvds_ssc_freq = intel_bios_ssc_frequency(dev_priv,
>  			!HAS_PCH_SPLIT(dev_priv));
>  	DRM_DEBUG_KMS("Set default to SSC at %d kHz\n", dev_priv->vbt.lvds_ssc_freq);
> -
> -	for_each_port(port) {
> -		struct ddi_vbt_port_info *info =
> -			&dev_priv->vbt.ddi_port_info[port];
> -
> -		info->hdmi_level_shift = HDMI_LEVEL_SHIFT_UNKNOWN;
> -	}
>  }
>  
>  /* Defaults to initialize only if there is no VBT. */
> diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
> index 092f0341d8d4..1441672c5611 100644
> --- a/drivers/gpu/drm/i915/display/intel_ddi.c
> +++ b/drivers/gpu/drm/i915/display/intel_ddi.c
> @@ -888,11 +888,10 @@ icl_get_combo_buf_trans(struct drm_i915_private *dev_priv, int type, int rate,
>  
>  static int intel_ddi_hdmi_level(struct drm_i915_private *dev_priv, enum port port)
>  {
> +	struct ddi_vbt_port_info *port_info = &dev_priv->vbt.ddi_port_info[port];
>  	int n_entries, level, default_entry;
>  	enum phy phy = intel_port_to_phy(dev_priv, port);
>  
> -	level = dev_priv->vbt.ddi_port_info[port].hdmi_level_shift;
> -
>  	if (INTEL_GEN(dev_priv) >= 12) {
>  		if (intel_phy_is_combo(dev_priv, phy))
>  			icl_get_combo_buf_trans(dev_priv, INTEL_OUTPUT_HDMI,
> @@ -927,12 +926,14 @@ static int intel_ddi_hdmi_level(struct drm_i915_private *dev_priv, enum port por
>  		return 0;
>  	}
>  
> -	/* Choose a good default if VBT is badly populated */
> -	if (level == HDMI_LEVEL_SHIFT_UNKNOWN || level >= n_entries)
> -		level = default_entry;
> -
>  	if (WARN_ON_ONCE(n_entries == 0))
>  		return 0;
> +
> +	if (port_info->hdmi_level_shift_set)
> +		level = port_info->hdmi_level_shift;
> +	else
> +		level = default_entry;
> +
>  	if (WARN_ON_ONCE(level >= n_entries))
>  		level = n_entries - 1;
>  
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 7e0f67babe20..67bdfe6de3fa 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -627,13 +627,9 @@ struct ddi_vbt_port_info {
>  
>  	int max_tmds_clock;
>  
> -	/*
> -	 * This is an index in the HDMI/DVI DDI buffer translation table.
> -	 * The special value HDMI_LEVEL_SHIFT_UNKNOWN means the VBT didn't
> -	 * populate this field.
> -	 */
> -#define HDMI_LEVEL_SHIFT_UNKNOWN	0xff
> +	/* This is an index in the HDMI/DVI DDI buffer translation table. */
>  	u8 hdmi_level_shift;
> +	u8 hdmi_level_shift_set:1;
>  
>  	u8 supports_dvi:1;
>  	u8 supports_hdmi:1;

-- 
Jani Nikula, Intel Open Source Graphics Center
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Re: [Intel-gfx] [PATCH 1/9] drm/i915/bios: use a flag for vbt hdmi level shift presence

[Jani Nikula]

On Fri, 08 Nov 2019, Jani Nikula <jani.nikula@intel.com> wrote:
> The pre-initialized magic value is a bit silly, switch to a flag
> instead.
>
> v2: Reduce paranoia to a single sanity check (Ville)
>
> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>

Pushed this one, thanks for the review (in another thread).

BR,
Jani.

> ---
>  drivers/gpu/drm/i915/display/intel_bios.c | 10 +---------
>  drivers/gpu/drm/i915/display/intel_ddi.c  | 13 +++++++------
>  drivers/gpu/drm/i915/i915_drv.h           |  8 ++------
>  3 files changed, 10 insertions(+), 21 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_bios.c b/drivers/gpu/drm/i915/display/intel_bios.c
> index a03f56b7b4ef..c19b234bebe6 100644
> --- a/drivers/gpu/drm/i915/display/intel_bios.c
> +++ b/drivers/gpu/drm/i915/display/intel_bios.c
> @@ -1509,6 +1509,7 @@ static void parse_ddi_port(struct drm_i915_private *dev_priv,
>  			      port_name(port),
>  			      hdmi_level_shift);
>  		info->hdmi_level_shift = hdmi_level_shift;
> +		info->hdmi_level_shift_set = true;
>  	}
>  
>  	if (bdb_version >= 204) {
> @@ -1692,8 +1693,6 @@ parse_general_definitions(struct drm_i915_private *dev_priv,
>  static void
>  init_vbt_defaults(struct drm_i915_private *dev_priv)
>  {
> -	enum port port;
> -
>  	dev_priv->vbt.crt_ddc_pin = GMBUS_PIN_VGADDC;
>  
>  	/* Default to having backlight */
> @@ -1721,13 +1720,6 @@ init_vbt_defaults(struct drm_i915_private *dev_priv)
>  	dev_priv->vbt.lvds_ssc_freq = intel_bios_ssc_frequency(dev_priv,
>  			!HAS_PCH_SPLIT(dev_priv));
>  	DRM_DEBUG_KMS("Set default to SSC at %d kHz\n", dev_priv->vbt.lvds_ssc_freq);
> -
> -	for_each_port(port) {
> -		struct ddi_vbt_port_info *info =
> -			&dev_priv->vbt.ddi_port_info[port];
> -
> -		info->hdmi_level_shift = HDMI_LEVEL_SHIFT_UNKNOWN;
> -	}
>  }
>  
>  /* Defaults to initialize only if there is no VBT. */
> diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
> index 092f0341d8d4..1441672c5611 100644
> --- a/drivers/gpu/drm/i915/display/intel_ddi.c
> +++ b/drivers/gpu/drm/i915/display/intel_ddi.c
> @@ -888,11 +888,10 @@ icl_get_combo_buf_trans(struct drm_i915_private *dev_priv, int type, int rate,
>  
>  static int intel_ddi_hdmi_level(struct drm_i915_private *dev_priv, enum port port)
>  {
> +	struct ddi_vbt_port_info *port_info = &dev_priv->vbt.ddi_port_info[port];
>  	int n_entries, level, default_entry;
>  	enum phy phy = intel_port_to_phy(dev_priv, port);
>  
> -	level = dev_priv->vbt.ddi_port_info[port].hdmi_level_shift;
> -
>  	if (INTEL_GEN(dev_priv) >= 12) {
>  		if (intel_phy_is_combo(dev_priv, phy))
>  			icl_get_combo_buf_trans(dev_priv, INTEL_OUTPUT_HDMI,
> @@ -927,12 +926,14 @@ static int intel_ddi_hdmi_level(struct drm_i915_private *dev_priv, enum port por
>  		return 0;
>  	}
>  
> -	/* Choose a good default if VBT is badly populated */
> -	if (level == HDMI_LEVEL_SHIFT_UNKNOWN || level >= n_entries)
> -		level = default_entry;
> -
>  	if (WARN_ON_ONCE(n_entries == 0))
>  		return 0;
> +
> +	if (port_info->hdmi_level_shift_set)
> +		level = port_info->hdmi_level_shift;
> +	else
> +		level = default_entry;
> +
>  	if (WARN_ON_ONCE(level >= n_entries))
>  		level = n_entries - 1;
>  
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 7e0f67babe20..67bdfe6de3fa 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -627,13 +627,9 @@ struct ddi_vbt_port_info {
>  
>  	int max_tmds_clock;
>  
> -	/*
> -	 * This is an index in the HDMI/DVI DDI buffer translation table.
> -	 * The special value HDMI_LEVEL_SHIFT_UNKNOWN means the VBT didn't
> -	 * populate this field.
> -	 */
> -#define HDMI_LEVEL_SHIFT_UNKNOWN	0xff
> +	/* This is an index in the HDMI/DVI DDI buffer translation table. */
>  	u8 hdmi_level_shift;
> +	u8 hdmi_level_shift_set:1;
>  
>  	u8 supports_dvi:1;
>  	u8 supports_hdmi:1;

-- 
Jani Nikula, Intel Open Source Graphics Center
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

Re: [PATCH 2/9] drm/i915/bios: store child devices in a list

[Jani Nikula]

On Fri, 08 Nov 2019, Jani Nikula <jani.nikula@intel.com> wrote:
> Using the array is getting clumsy. Make things a bit more dynamic.
>
> Remove early returns on not having child devices when the end result
> after "iterating" the empty list would be the same.
>
> v3:
> - use list_add_tail to not reverse the child device list (Ville)
>
> v2:
> - stick to previous naming of child devices (Ville)
> - use kzalloc, handle failure
> - initialize list head earlier to keep intel_bios_driver_remove() safe
>
> Cc: Ville Syrjala <ville.syrjala@linux.intel.com>
> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>

Pushed this one, thanks for the review.

BR,
Jani.

> ---
>  drivers/gpu/drm/i915/display/intel_bios.c | 123 ++++++++++------------
>  drivers/gpu/drm/i915/i915_drv.h           |   3 +-
>  2 files changed, 58 insertions(+), 68 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_bios.c b/drivers/gpu/drm/i915/display/intel_bios.c
> index c19b234bebe6..7c0ca733bef8 100644
> --- a/drivers/gpu/drm/i915/display/intel_bios.c
> +++ b/drivers/gpu/drm/i915/display/intel_bios.c
> @@ -58,6 +58,12 @@
>   * that.
>   */
>  
> +/* Wrapper for VBT child device config */
> +struct display_device_data {
> +	struct child_device_config child;
> +	struct list_head node;
> +};
> +
>  #define	SLAVE_ADDR1	0x70
>  #define	SLAVE_ADDR2	0x72
>  
> @@ -449,8 +455,9 @@ static void
>  parse_sdvo_device_mapping(struct drm_i915_private *dev_priv, u8 bdb_version)
>  {
>  	struct sdvo_device_mapping *mapping;
> +	const struct display_device_data *devdata;
>  	const struct child_device_config *child;
> -	int i, count = 0;
> +	int count = 0;
>  
>  	/*
>  	 * Only parse SDVO mappings on gens that could have SDVO. This isn't
> @@ -461,8 +468,8 @@ parse_sdvo_device_mapping(struct drm_i915_private *dev_priv, u8 bdb_version)
>  		return;
>  	}
>  
> -	for (i = 0, count = 0; i < dev_priv->vbt.child_dev_num; i++) {
> -		child = dev_priv->vbt.child_dev + i;
> +	list_for_each_entry(devdata, &dev_priv->vbt.display_devices, node) {
> +		child = &devdata->child;
>  
>  		if (child->slave_addr != SLAVE_ADDR1 &&
>  		    child->slave_addr != SLAVE_ADDR2) {
> @@ -1572,8 +1579,7 @@ static void parse_ddi_port(struct drm_i915_private *dev_priv,
>  
>  static void parse_ddi_ports(struct drm_i915_private *dev_priv, u8 bdb_version)
>  {
> -	const struct child_device_config *child;
> -	int i;
> +	const struct display_device_data *devdata;
>  
>  	if (!HAS_DDI(dev_priv) && !IS_CHERRYVIEW(dev_priv))
>  		return;
> @@ -1581,11 +1587,8 @@ static void parse_ddi_ports(struct drm_i915_private *dev_priv, u8 bdb_version)
>  	if (bdb_version < 155)
>  		return;
>  
> -	for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {
> -		child = dev_priv->vbt.child_dev + i;
> -
> -		parse_ddi_port(dev_priv, child, bdb_version);
> -	}
> +	list_for_each_entry(devdata, &dev_priv->vbt.display_devices, node)
> +		parse_ddi_port(dev_priv, &devdata->child, bdb_version);
>  }
>  
>  static void
> @@ -1593,8 +1596,9 @@ parse_general_definitions(struct drm_i915_private *dev_priv,
>  			  const struct bdb_header *bdb)
>  {
>  	const struct bdb_general_definitions *defs;
> +	struct display_device_data *devdata;
>  	const struct child_device_config *child;
> -	int i, child_device_num, count;
> +	int i, child_device_num;
>  	u8 expected_size;
>  	u16 block_size;
>  	int bus_pin;
> @@ -1650,26 +1654,7 @@ parse_general_definitions(struct drm_i915_private *dev_priv,
>  
>  	/* get the number of child device */
>  	child_device_num = (block_size - sizeof(*defs)) / defs->child_dev_size;
> -	count = 0;
> -	/* get the number of child device that is present */
> -	for (i = 0; i < child_device_num; i++) {
> -		child = child_device_ptr(defs, i);
> -		if (!child->device_type)
> -			continue;
> -		count++;
> -	}
> -	if (!count) {
> -		DRM_DEBUG_KMS("no child dev is parsed from VBT\n");
> -		return;
> -	}
> -	dev_priv->vbt.child_dev = kcalloc(count, sizeof(*child), GFP_KERNEL);
> -	if (!dev_priv->vbt.child_dev) {
> -		DRM_DEBUG_KMS("No memory space for child device\n");
> -		return;
> -	}
>  
> -	dev_priv->vbt.child_dev_num = count;
> -	count = 0;
>  	for (i = 0; i < child_device_num; i++) {
>  		child = child_device_ptr(defs, i);
>  		if (!child->device_type)
> @@ -1678,15 +1663,23 @@ parse_general_definitions(struct drm_i915_private *dev_priv,
>  		DRM_DEBUG_KMS("Found VBT child device with type 0x%x\n",
>  			      child->device_type);
>  
> +		devdata = kzalloc(sizeof(*devdata), GFP_KERNEL);
> +		if (!devdata)
> +			break;
> +
>  		/*
>  		 * Copy as much as we know (sizeof) and is available
> -		 * (child_dev_size) of the child device. Accessing the data must
> -		 * depend on VBT version.
> +		 * (child_dev_size) of the child device config. Accessing the
> +		 * data must depend on VBT version.
>  		 */
> -		memcpy(dev_priv->vbt.child_dev + count, child,
> +		memcpy(&devdata->child, child,
>  		       min_t(size_t, defs->child_dev_size, sizeof(*child)));
> -		count++;
> +
> +		list_add_tail(&devdata->node, &dev_priv->vbt.display_devices);
>  	}
> +
> +	if (list_empty(&dev_priv->vbt.display_devices))
> +		DRM_DEBUG_KMS("no child dev is parsed from VBT\n");
>  }
>  
>  /* Common defaults which may be overridden by VBT. */
> @@ -1836,6 +1829,8 @@ void intel_bios_init(struct drm_i915_private *dev_priv)
>  	const struct bdb_header *bdb;
>  	u8 __iomem *bios = NULL;
>  
> +	INIT_LIST_HEAD(&dev_priv->vbt.display_devices);
> +
>  	if (!HAS_DISPLAY(dev_priv) || !INTEL_DISPLAY_ENABLED(dev_priv)) {
>  		DRM_DEBUG_KMS("Skipping VBT init due to disabled display.\n");
>  		return;
> @@ -1895,9 +1890,13 @@ void intel_bios_init(struct drm_i915_private *dev_priv)
>   */
>  void intel_bios_driver_remove(struct drm_i915_private *dev_priv)
>  {
> -	kfree(dev_priv->vbt.child_dev);
> -	dev_priv->vbt.child_dev = NULL;
> -	dev_priv->vbt.child_dev_num = 0;
> +	struct display_device_data *devdata, *n;
> +
> +	list_for_each_entry_safe(devdata, n, &dev_priv->vbt.display_devices, node) {
> +		list_del(&devdata->node);
> +		kfree(devdata);
> +	}
> +
>  	kfree(dev_priv->vbt.sdvo_lvds_vbt_mode);
>  	dev_priv->vbt.sdvo_lvds_vbt_mode = NULL;
>  	kfree(dev_priv->vbt.lfp_lvds_vbt_mode);
> @@ -1921,17 +1920,18 @@ void intel_bios_driver_remove(struct drm_i915_private *dev_priv)
>   */
>  bool intel_bios_is_tv_present(struct drm_i915_private *dev_priv)
>  {
> +	const struct display_device_data *devdata;
>  	const struct child_device_config *child;
> -	int i;
>  
>  	if (!dev_priv->vbt.int_tv_support)
>  		return false;
>  
> -	if (!dev_priv->vbt.child_dev_num)
> +	if (list_empty(&dev_priv->vbt.display_devices))
>  		return true;
>  
> -	for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {
> -		child = dev_priv->vbt.child_dev + i;
> +	list_for_each_entry(devdata, &dev_priv->vbt.display_devices, node) {
> +		child = &devdata->child;
> +
>  		/*
>  		 * If the device type is not TV, continue.
>  		 */
> @@ -1963,14 +1963,14 @@ bool intel_bios_is_tv_present(struct drm_i915_private *dev_priv)
>   */
>  bool intel_bios_is_lvds_present(struct drm_i915_private *dev_priv, u8 *i2c_pin)
>  {
> +	const struct display_device_data *devdata;
>  	const struct child_device_config *child;
> -	int i;
>  
> -	if (!dev_priv->vbt.child_dev_num)
> +	if (list_empty(&dev_priv->vbt.display_devices))
>  		return true;
>  
> -	for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {
> -		child = dev_priv->vbt.child_dev + i;
> +	list_for_each_entry(devdata, &dev_priv->vbt.display_devices, node) {
> +		child = &devdata->child;
>  
>  		/* If the device type is not LFP, continue.
>  		 * We have to check both the new identifiers as well as the
> @@ -2012,6 +2012,7 @@ bool intel_bios_is_lvds_present(struct drm_i915_private *dev_priv, u8 *i2c_pin)
>   */
>  bool intel_bios_is_port_present(struct drm_i915_private *dev_priv, enum port port)
>  {
> +	const struct display_device_data *devdata;
>  	const struct child_device_config *child;
>  	static const struct {
>  		u16 dp, hdmi;
> @@ -2022,7 +2023,6 @@ bool intel_bios_is_port_present(struct drm_i915_private *dev_priv, enum port por
>  		[PORT_E] = { DVO_PORT_DPE, DVO_PORT_HDMIE, },
>  		[PORT_F] = { DVO_PORT_DPF, DVO_PORT_HDMIF, },
>  	};
> -	int i;
>  
>  	if (HAS_DDI(dev_priv)) {
>  		const struct ddi_vbt_port_info *port_info =
> @@ -2037,11 +2037,8 @@ bool intel_bios_is_port_present(struct drm_i915_private *dev_priv, enum port por
>  	if (WARN_ON(port == PORT_A) || port >= ARRAY_SIZE(port_mapping))
>  		return false;
>  
> -	if (!dev_priv->vbt.child_dev_num)
> -		return false;
> -
> -	for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {
> -		child = dev_priv->vbt.child_dev + i;
> +	list_for_each_entry(devdata, &dev_priv->vbt.display_devices, node) {
> +		child = &devdata->child;
>  
>  		if ((child->dvo_port == port_mapping[port].dp ||
>  		     child->dvo_port == port_mapping[port].hdmi) &&
> @@ -2062,6 +2059,7 @@ bool intel_bios_is_port_present(struct drm_i915_private *dev_priv, enum port por
>   */
>  bool intel_bios_is_port_edp(struct drm_i915_private *dev_priv, enum port port)
>  {
> +	const struct display_device_data *devdata;
>  	const struct child_device_config *child;
>  	static const short port_mapping[] = {
>  		[PORT_B] = DVO_PORT_DPB,
> @@ -2070,16 +2068,12 @@ bool intel_bios_is_port_edp(struct drm_i915_private *dev_priv, enum port port)
>  		[PORT_E] = DVO_PORT_DPE,
>  		[PORT_F] = DVO_PORT_DPF,
>  	};
> -	int i;
>  
>  	if (HAS_DDI(dev_priv))
>  		return dev_priv->vbt.ddi_port_info[port].supports_edp;
>  
> -	if (!dev_priv->vbt.child_dev_num)
> -		return false;
> -
> -	for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {
> -		child = dev_priv->vbt.child_dev + i;
> +	list_for_each_entry(devdata, &dev_priv->vbt.display_devices, node) {
> +		child = &devdata->child;
>  
>  		if (child->dvo_port == port_mapping[port] &&
>  		    (child->device_type & DEVICE_TYPE_eDP_BITS) ==
> @@ -2128,13 +2122,10 @@ static bool child_dev_is_dp_dual_mode(const struct child_device_config *child,
>  bool intel_bios_is_port_dp_dual_mode(struct drm_i915_private *dev_priv,
>  				     enum port port)
>  {
> -	const struct child_device_config *child;
> -	int i;
> +	const struct display_device_data *devdata;
>  
> -	for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {
> -		child = dev_priv->vbt.child_dev + i;
> -
> -		if (child_dev_is_dp_dual_mode(child, port))
> +	list_for_each_entry(devdata, &dev_priv->vbt.display_devices, node) {
> +		if (child_dev_is_dp_dual_mode(&devdata->child, port))
>  			return true;
>  	}
>  
> @@ -2151,12 +2142,12 @@ bool intel_bios_is_port_dp_dual_mode(struct drm_i915_private *dev_priv,
>  bool intel_bios_is_dsi_present(struct drm_i915_private *dev_priv,
>  			       enum port *port)
>  {
> +	const struct display_device_data *devdata;
>  	const struct child_device_config *child;
>  	u8 dvo_port;
> -	int i;
>  
> -	for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {
> -		child = dev_priv->vbt.child_dev + i;
> +	list_for_each_entry(devdata, &dev_priv->vbt.display_devices, node) {
> +		child = &devdata->child;
>  
>  		if (!(child->device_type & DEVICE_TYPE_MIPI_OUTPUT))
>  			continue;
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 67bdfe6de3fa..2c0674a86dd8 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -720,8 +720,7 @@ struct intel_vbt_data {
>  
>  	int crt_ddc_pin;
>  
> -	int child_dev_num;
> -	struct child_device_config *child_dev;
> +	struct list_head display_devices;
>  
>  	struct ddi_vbt_port_info ddi_port_info[I915_MAX_PORTS];
>  	struct sdvo_device_mapping sdvo_mappings[2];

-- 
Jani Nikula, Intel Open Source Graphics Center
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

Re: [Intel-gfx] [PATCH 2/9] drm/i915/bios: store child devices in a list

[Jani Nikula]

On Fri, 08 Nov 2019, Jani Nikula <jani.nikula@intel.com> wrote:
> Using the array is getting clumsy. Make things a bit more dynamic.
>
> Remove early returns on not having child devices when the end result
> after "iterating" the empty list would be the same.
>
> v3:
> - use list_add_tail to not reverse the child device list (Ville)
>
> v2:
> - stick to previous naming of child devices (Ville)
> - use kzalloc, handle failure
> - initialize list head earlier to keep intel_bios_driver_remove() safe
>
> Cc: Ville Syrjala <ville.syrjala@linux.intel.com>
> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>

Pushed this one, thanks for the review.

BR,
Jani.

> ---
>  drivers/gpu/drm/i915/display/intel_bios.c | 123 ++++++++++------------
>  drivers/gpu/drm/i915/i915_drv.h           |   3 +-
>  2 files changed, 58 insertions(+), 68 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_bios.c b/drivers/gpu/drm/i915/display/intel_bios.c
> index c19b234bebe6..7c0ca733bef8 100644
> --- a/drivers/gpu/drm/i915/display/intel_bios.c
> +++ b/drivers/gpu/drm/i915/display/intel_bios.c
> @@ -58,6 +58,12 @@
>   * that.
>   */
>  
> +/* Wrapper for VBT child device config */
> +struct display_device_data {
> +	struct child_device_config child;
> +	struct list_head node;
> +};
> +
>  #define	SLAVE_ADDR1	0x70
>  #define	SLAVE_ADDR2	0x72
>  
> @@ -449,8 +455,9 @@ static void
>  parse_sdvo_device_mapping(struct drm_i915_private *dev_priv, u8 bdb_version)
>  {
>  	struct sdvo_device_mapping *mapping;
> +	const struct display_device_data *devdata;
>  	const struct child_device_config *child;
> -	int i, count = 0;
> +	int count = 0;
>  
>  	/*
>  	 * Only parse SDVO mappings on gens that could have SDVO. This isn't
> @@ -461,8 +468,8 @@ parse_sdvo_device_mapping(struct drm_i915_private *dev_priv, u8 bdb_version)
>  		return;
>  	}
>  
> -	for (i = 0, count = 0; i < dev_priv->vbt.child_dev_num; i++) {
> -		child = dev_priv->vbt.child_dev + i;
> +	list_for_each_entry(devdata, &dev_priv->vbt.display_devices, node) {
> +		child = &devdata->child;
>  
>  		if (child->slave_addr != SLAVE_ADDR1 &&
>  		    child->slave_addr != SLAVE_ADDR2) {
> @@ -1572,8 +1579,7 @@ static void parse_ddi_port(struct drm_i915_private *dev_priv,
>  
>  static void parse_ddi_ports(struct drm_i915_private *dev_priv, u8 bdb_version)
>  {
> -	const struct child_device_config *child;
> -	int i;
> +	const struct display_device_data *devdata;
>  
>  	if (!HAS_DDI(dev_priv) && !IS_CHERRYVIEW(dev_priv))
>  		return;
> @@ -1581,11 +1587,8 @@ static void parse_ddi_ports(struct drm_i915_private *dev_priv, u8 bdb_version)
>  	if (bdb_version < 155)
>  		return;
>  
> -	for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {
> -		child = dev_priv->vbt.child_dev + i;
> -
> -		parse_ddi_port(dev_priv, child, bdb_version);
> -	}
> +	list_for_each_entry(devdata, &dev_priv->vbt.display_devices, node)
> +		parse_ddi_port(dev_priv, &devdata->child, bdb_version);
>  }
>  
>  static void
> @@ -1593,8 +1596,9 @@ parse_general_definitions(struct drm_i915_private *dev_priv,
>  			  const struct bdb_header *bdb)
>  {
>  	const struct bdb_general_definitions *defs;
> +	struct display_device_data *devdata;
>  	const struct child_device_config *child;
> -	int i, child_device_num, count;
> +	int i, child_device_num;
>  	u8 expected_size;
>  	u16 block_size;
>  	int bus_pin;
> @@ -1650,26 +1654,7 @@ parse_general_definitions(struct drm_i915_private *dev_priv,
>  
>  	/* get the number of child device */
>  	child_device_num = (block_size - sizeof(*defs)) / defs->child_dev_size;
> -	count = 0;
> -	/* get the number of child device that is present */
> -	for (i = 0; i < child_device_num; i++) {
> -		child = child_device_ptr(defs, i);
> -		if (!child->device_type)
> -			continue;
> -		count++;
> -	}
> -	if (!count) {
> -		DRM_DEBUG_KMS("no child dev is parsed from VBT\n");
> -		return;
> -	}
> -	dev_priv->vbt.child_dev = kcalloc(count, sizeof(*child), GFP_KERNEL);
> -	if (!dev_priv->vbt.child_dev) {
> -		DRM_DEBUG_KMS("No memory space for child device\n");
> -		return;
> -	}
>  
> -	dev_priv->vbt.child_dev_num = count;
> -	count = 0;
>  	for (i = 0; i < child_device_num; i++) {
>  		child = child_device_ptr(defs, i);
>  		if (!child->device_type)
> @@ -1678,15 +1663,23 @@ parse_general_definitions(struct drm_i915_private *dev_priv,
>  		DRM_DEBUG_KMS("Found VBT child device with type 0x%x\n",
>  			      child->device_type);
>  
> +		devdata = kzalloc(sizeof(*devdata), GFP_KERNEL);
> +		if (!devdata)
> +			break;
> +
>  		/*
>  		 * Copy as much as we know (sizeof) and is available
> -		 * (child_dev_size) of the child device. Accessing the data must
> -		 * depend on VBT version.
> +		 * (child_dev_size) of the child device config. Accessing the
> +		 * data must depend on VBT version.
>  		 */
> -		memcpy(dev_priv->vbt.child_dev + count, child,
> +		memcpy(&devdata->child, child,
>  		       min_t(size_t, defs->child_dev_size, sizeof(*child)));
> -		count++;
> +
> +		list_add_tail(&devdata->node, &dev_priv->vbt.display_devices);
>  	}
> +
> +	if (list_empty(&dev_priv->vbt.display_devices))
> +		DRM_DEBUG_KMS("no child dev is parsed from VBT\n");
>  }
>  
>  /* Common defaults which may be overridden by VBT. */
> @@ -1836,6 +1829,8 @@ void intel_bios_init(struct drm_i915_private *dev_priv)
>  	const struct bdb_header *bdb;
>  	u8 __iomem *bios = NULL;
>  
> +	INIT_LIST_HEAD(&dev_priv->vbt.display_devices);
> +
>  	if (!HAS_DISPLAY(dev_priv) || !INTEL_DISPLAY_ENABLED(dev_priv)) {
>  		DRM_DEBUG_KMS("Skipping VBT init due to disabled display.\n");
>  		return;
> @@ -1895,9 +1890,13 @@ void intel_bios_init(struct drm_i915_private *dev_priv)
>   */
>  void intel_bios_driver_remove(struct drm_i915_private *dev_priv)
>  {
> -	kfree(dev_priv->vbt.child_dev);
> -	dev_priv->vbt.child_dev = NULL;
> -	dev_priv->vbt.child_dev_num = 0;
> +	struct display_device_data *devdata, *n;
> +
> +	list_for_each_entry_safe(devdata, n, &dev_priv->vbt.display_devices, node) {
> +		list_del(&devdata->node);
> +		kfree(devdata);
> +	}
> +
>  	kfree(dev_priv->vbt.sdvo_lvds_vbt_mode);
>  	dev_priv->vbt.sdvo_lvds_vbt_mode = NULL;
>  	kfree(dev_priv->vbt.lfp_lvds_vbt_mode);
> @@ -1921,17 +1920,18 @@ void intel_bios_driver_remove(struct drm_i915_private *dev_priv)
>   */
>  bool intel_bios_is_tv_present(struct drm_i915_private *dev_priv)
>  {
> +	const struct display_device_data *devdata;
>  	const struct child_device_config *child;
> -	int i;
>  
>  	if (!dev_priv->vbt.int_tv_support)
>  		return false;
>  
> -	if (!dev_priv->vbt.child_dev_num)
> +	if (list_empty(&dev_priv->vbt.display_devices))
>  		return true;
>  
> -	for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {
> -		child = dev_priv->vbt.child_dev + i;
> +	list_for_each_entry(devdata, &dev_priv->vbt.display_devices, node) {
> +		child = &devdata->child;
> +
>  		/*
>  		 * If the device type is not TV, continue.
>  		 */
> @@ -1963,14 +1963,14 @@ bool intel_bios_is_tv_present(struct drm_i915_private *dev_priv)
>   */
>  bool intel_bios_is_lvds_present(struct drm_i915_private *dev_priv, u8 *i2c_pin)
>  {
> +	const struct display_device_data *devdata;
>  	const struct child_device_config *child;
> -	int i;
>  
> -	if (!dev_priv->vbt.child_dev_num)
> +	if (list_empty(&dev_priv->vbt.display_devices))
>  		return true;
>  
> -	for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {
> -		child = dev_priv->vbt.child_dev + i;
> +	list_for_each_entry(devdata, &dev_priv->vbt.display_devices, node) {
> +		child = &devdata->child;
>  
>  		/* If the device type is not LFP, continue.
>  		 * We have to check both the new identifiers as well as the
> @@ -2012,6 +2012,7 @@ bool intel_bios_is_lvds_present(struct drm_i915_private *dev_priv, u8 *i2c_pin)
>   */
>  bool intel_bios_is_port_present(struct drm_i915_private *dev_priv, enum port port)
>  {
> +	const struct display_device_data *devdata;
>  	const struct child_device_config *child;
>  	static const struct {
>  		u16 dp, hdmi;
> @@ -2022,7 +2023,6 @@ bool intel_bios_is_port_present(struct drm_i915_private *dev_priv, enum port por
>  		[PORT_E] = { DVO_PORT_DPE, DVO_PORT_HDMIE, },
>  		[PORT_F] = { DVO_PORT_DPF, DVO_PORT_HDMIF, },
>  	};
> -	int i;
>  
>  	if (HAS_DDI(dev_priv)) {
>  		const struct ddi_vbt_port_info *port_info =
> @@ -2037,11 +2037,8 @@ bool intel_bios_is_port_present(struct drm_i915_private *dev_priv, enum port por
>  	if (WARN_ON(port == PORT_A) || port >= ARRAY_SIZE(port_mapping))
>  		return false;
>  
> -	if (!dev_priv->vbt.child_dev_num)
> -		return false;
> -
> -	for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {
> -		child = dev_priv->vbt.child_dev + i;
> +	list_for_each_entry(devdata, &dev_priv->vbt.display_devices, node) {
> +		child = &devdata->child;
>  
>  		if ((child->dvo_port == port_mapping[port].dp ||
>  		     child->dvo_port == port_mapping[port].hdmi) &&
> @@ -2062,6 +2059,7 @@ bool intel_bios_is_port_present(struct drm_i915_private *dev_priv, enum port por
>   */
>  bool intel_bios_is_port_edp(struct drm_i915_private *dev_priv, enum port port)
>  {
> +	const struct display_device_data *devdata;
>  	const struct child_device_config *child;
>  	static const short port_mapping[] = {
>  		[PORT_B] = DVO_PORT_DPB,
> @@ -2070,16 +2068,12 @@ bool intel_bios_is_port_edp(struct drm_i915_private *dev_priv, enum port port)
>  		[PORT_E] = DVO_PORT_DPE,
>  		[PORT_F] = DVO_PORT_DPF,
>  	};
> -	int i;
>  
>  	if (HAS_DDI(dev_priv))
>  		return dev_priv->vbt.ddi_port_info[port].supports_edp;
>  
> -	if (!dev_priv->vbt.child_dev_num)
> -		return false;
> -
> -	for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {
> -		child = dev_priv->vbt.child_dev + i;
> +	list_for_each_entry(devdata, &dev_priv->vbt.display_devices, node) {
> +		child = &devdata->child;
>  
>  		if (child->dvo_port == port_mapping[port] &&
>  		    (child->device_type & DEVICE_TYPE_eDP_BITS) ==
> @@ -2128,13 +2122,10 @@ static bool child_dev_is_dp_dual_mode(const struct child_device_config *child,
>  bool intel_bios_is_port_dp_dual_mode(struct drm_i915_private *dev_priv,
>  				     enum port port)
>  {
> -	const struct child_device_config *child;
> -	int i;
> +	const struct display_device_data *devdata;
>  
> -	for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {
> -		child = dev_priv->vbt.child_dev + i;
> -
> -		if (child_dev_is_dp_dual_mode(child, port))
> +	list_for_each_entry(devdata, &dev_priv->vbt.display_devices, node) {
> +		if (child_dev_is_dp_dual_mode(&devdata->child, port))
>  			return true;
>  	}
>  
> @@ -2151,12 +2142,12 @@ bool intel_bios_is_port_dp_dual_mode(struct drm_i915_private *dev_priv,
>  bool intel_bios_is_dsi_present(struct drm_i915_private *dev_priv,
>  			       enum port *port)
>  {
> +	const struct display_device_data *devdata;
>  	const struct child_device_config *child;
>  	u8 dvo_port;
> -	int i;
>  
> -	for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {
> -		child = dev_priv->vbt.child_dev + i;
> +	list_for_each_entry(devdata, &dev_priv->vbt.display_devices, node) {
> +		child = &devdata->child;
>  
>  		if (!(child->device_type & DEVICE_TYPE_MIPI_OUTPUT))
>  			continue;
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 67bdfe6de3fa..2c0674a86dd8 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -720,8 +720,7 @@ struct intel_vbt_data {
>  
>  	int crt_ddc_pin;
>  
> -	int child_dev_num;
> -	struct child_device_config *child_dev;
> +	struct list_head display_devices;
>  
>  	struct ddi_vbt_port_info ddi_port_info[I915_MAX_PORTS];
>  	struct sdvo_device_mapping sdvo_mappings[2];

-- 
Jani Nikula, Intel Open Source Graphics Center
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[PATCH] drm/i915/dsi: conn_state->max_requested_bpc is not a thing on DSI

[Jani Nikula]

FIXUP to "drm/i915/dsi: add support for DSC".

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/i915/display/icl_dsi.c | 7 ++-----
 1 file changed, 2 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/icl_dsi.c b/drivers/gpu/drm/i915/display/icl_dsi.c
index 823dbd9d4d06..52bb75feb0be 100644
--- a/drivers/gpu/drm/i915/display/icl_dsi.c
+++ b/drivers/gpu/drm/i915/display/icl_dsi.c
@@ -1270,8 +1270,7 @@ static void gen11_dsi_get_config(struct intel_encoder *encoder,
 }
 
 static int gen11_dsi_dsc_compute_config(struct intel_encoder *encoder,
-					struct intel_crtc_state *pipe_config,
-					struct drm_connector_state *conn_state)
+					struct intel_crtc_state *pipe_config)
 {
 	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
 	struct drm_dsc_config *vdsc_cfg = &pipe_config->dsc.config;
@@ -1280,8 +1279,6 @@ static int gen11_dsi_dsc_compute_config(struct intel_encoder *encoder,
 	bool use_dsc;
 	int ret;
 
-	dsc_max_bpc = min_t(int, dsc_max_bpc, conn_state->max_requested_bpc);
-
 	use_dsc = intel_bios_get_dsc_params(encoder, pipe_config, dsc_max_bpc);
 	if (!use_dsc)
 		return 0;
@@ -1347,7 +1344,7 @@ static int gen11_dsi_compute_config(struct intel_encoder *encoder,
 	pipe_config->clock_set = true;
 	pipe_config->port_clock = intel_dsi_bitrate(intel_dsi) / 5;
 
-	if (gen11_dsi_dsc_compute_config(encoder, pipe_config, conn_state))
+	if (gen11_dsi_dsc_compute_config(encoder, pipe_config))
 		DRM_DEBUG_KMS("Attempting to use DSC failed\n");
 
 	return 0;
-- 
2.20.1

_______________________________________________
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Intel-gfx@lists.freedesktop.org
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[Intel-gfx] [PATCH] drm/i915/dsi: conn_state->max_requested_bpc is not a thing on DSI

[Jani Nikula]

FIXUP to "drm/i915/dsi: add support for DSC".

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/i915/display/icl_dsi.c | 7 ++-----
 1 file changed, 2 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/icl_dsi.c b/drivers/gpu/drm/i915/display/icl_dsi.c
index 823dbd9d4d06..52bb75feb0be 100644
--- a/drivers/gpu/drm/i915/display/icl_dsi.c
+++ b/drivers/gpu/drm/i915/display/icl_dsi.c
@@ -1270,8 +1270,7 @@ static void gen11_dsi_get_config(struct intel_encoder *encoder,
 }
 
 static int gen11_dsi_dsc_compute_config(struct intel_encoder *encoder,
-					struct intel_crtc_state *pipe_config,
-					struct drm_connector_state *conn_state)
+					struct intel_crtc_state *pipe_config)
 {
 	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
 	struct drm_dsc_config *vdsc_cfg = &pipe_config->dsc.config;
@@ -1280,8 +1279,6 @@ static int gen11_dsi_dsc_compute_config(struct intel_encoder *encoder,
 	bool use_dsc;
 	int ret;
 
-	dsc_max_bpc = min_t(int, dsc_max_bpc, conn_state->max_requested_bpc);
-
 	use_dsc = intel_bios_get_dsc_params(encoder, pipe_config, dsc_max_bpc);
 	if (!use_dsc)
 		return 0;
@@ -1347,7 +1344,7 @@ static int gen11_dsi_compute_config(struct intel_encoder *encoder,
 	pipe_config->clock_set = true;
 	pipe_config->port_clock = intel_dsi_bitrate(intel_dsi) / 5;
 
-	if (gen11_dsi_dsc_compute_config(encoder, pipe_config, conn_state))
+	if (gen11_dsi_dsc_compute_config(encoder, pipe_config))
 		DRM_DEBUG_KMS("Attempting to use DSC failed\n");
 
 	return 0;
-- 
2.20.1

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Re: [PATCH 9/9] drm/i915/dsi: add support for DSC

[Kulkarni, Vandita]

> -----Original Message-----
> From: Jani Nikula <jani.nikula@intel.com>
> Sent: Friday, November 8, 2019 9:10 PM
> To: intel-gfx@lists.freedesktop.org
> Cc: Kulkarni, Vandita <vandita.kulkarni@intel.com>; Navare, Manasi D
> <manasi.d.navare@intel.com>; ville.syrjala@linux.intel.com; Nikula, Jani
> <jani.nikula@intel.com>
> Subject: [PATCH 9/9] drm/i915/dsi: add support for DSC
> 
> Enable DSC for DSI, if specified in VBT.
> 
> This is now excessively dynamic, being enabled at compute config. I don't
> expect us to need to switch between DSC and non-DSC for the same panel.
> Cargo culting the DP DSC shows.
> 
> Mode valid lacks a sensible implementation, as does get config.
> 
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
> ---
>  drivers/gpu/drm/i915/display/icl_dsi.c | 75 ++++++++++++++++++++++++--
>  1 file changed, 72 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/icl_dsi.c
> b/drivers/gpu/drm/i915/display/icl_dsi.c
> index 8eb2d7f29c82..823dbd9d4d06 100644
> --- a/drivers/gpu/drm/i915/display/icl_dsi.c
> +++ b/drivers/gpu/drm/i915/display/icl_dsi.c
> @@ -34,6 +34,7 @@
>  #include "intel_ddi.h"
>  #include "intel_dsi.h"
>  #include "intel_panel.h"
> +#include "intel_vdsc.h"
> 
>  static inline int header_credits_available(struct drm_i915_private *dev_priv,
>  					   enum transcoder dsi_trans)
> @@ -1050,6 +1051,9 @@ static void gen11_dsi_pre_enable(struct
> intel_encoder *encoder,
>  	/* step5: program and powerup panel */
>  	gen11_dsi_powerup_panel(encoder);
> 
> +	/* FIXME: location? */
> +	intel_dsc_enable(encoder, pipe_config);
> +
>  	/* step6c: configure transcoder timings */
>  	gen11_dsi_set_transcoder_timings(encoder, pipe_config);
> 
> @@ -1211,6 +1215,13 @@ static void gen11_dsi_disable(struct
> intel_encoder *encoder,
>  	gen11_dsi_disable_io_power(encoder);
>  }
> 
> +static enum drm_mode_status gen11_dsi_mode_valid(struct
> drm_connector *connector,
> +						 struct drm_display_mode
> *mode)
> +{
> +	/* FIXME: DSC? */
> +	return intel_dsi_mode_valid(connector, mode); }
> +
>  static void gen11_dsi_get_timings(struct intel_encoder *encoder,
>  				  struct intel_crtc_state *pipe_config)  { @@ -
> 1258,6 +1269,56 @@ static void gen11_dsi_get_config(struct intel_encoder
> *encoder,
>  	pipe_config->pipe_bpp = bdw_get_pipemisc_bpp(crtc);  }
> 
> +static int gen11_dsi_dsc_compute_config(struct intel_encoder *encoder,
> +					struct intel_crtc_state *pipe_config,
> +					struct drm_connector_state
> *conn_state) {
> +	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
> +	struct drm_dsc_config *vdsc_cfg = &pipe_config->dsc.config;
> +	struct drm_display_mode *adjusted_mode = &pipe_config-
> >hw.adjusted_mode;
> +	int dsc_max_bpc = INTEL_GEN(dev_priv) >= 12 ? 12 : 10;
> +	bool use_dsc;
> +	int ret;
> +
> +	dsc_max_bpc = min_t(int, dsc_max_bpc, conn_state-
> >max_requested_bpc);
> +
> +	use_dsc = intel_bios_get_dsc_params(encoder, pipe_config,
> dsc_max_bpc);
> +	if (!use_dsc)
> +		return 0;
> +
> +	if (pipe_config->pipe_bpp < 8 * 3)
> +		return -EINVAL;
> +
> +	if (adjusted_mode->crtc_clock > dev_priv->max_cdclk_freq) {
> +		if (pipe_config->dsc.slice_count > 1) {
> +			pipe_config->dsc.dsc_split = true;
> +		} else {
> +			DRM_DEBUG_KMS("Cannot split stream to use 2
> VDSC instances\n");
> +			return -EINVAL;
> +		}
> +	}
> +
> +	vdsc_cfg->convert_rgb = false;
> +
> +	ret = intel_dsc_compute_params(encoder, pipe_config);
> +	if (ret)
> +		return ret;
> +
> +	/* DSI specific sanity checks on the common code */
> +	WARN_ON(vdsc_cfg->vbr_enable);
> +	WARN_ON(vdsc_cfg->pic_width % vdsc_cfg->slice_width);
> +	WARN_ON(vdsc_cfg->slice_height < 8);
> +	WARN_ON(vdsc_cfg->pic_height % vdsc_cfg->slice_height);
> +
> +	ret = drm_dsc_compute_rc_parameters(vdsc_cfg);
> +	if (ret)
> +		return ret;
> +
> +	pipe_config->dsc.compression_enable = true;
> +
As per the spec, I see that it asks us to program horizontal timings in video mode and use the compressed frequency ratio like burst mode, but it is a bit ambiguous if it is talking about non-burst mode.

We will have to add htotal, hsync_start and hsync_end calculation, if yes.

Thanks,
Vandita
> +	return 0;
> +}
> +
>  static int gen11_dsi_compute_config(struct intel_encoder *encoder,
>  				    struct intel_crtc_state *pipe_config,
>  				    struct drm_connector_state *conn_state)
> @@ -1286,14 +1347,22 @@ static int gen11_dsi_compute_config(struct
> intel_encoder *encoder,
>  	pipe_config->clock_set = true;
>  	pipe_config->port_clock = intel_dsi_bitrate(intel_dsi) / 5;
> 
> +	if (gen11_dsi_dsc_compute_config(encoder, pipe_config,
> conn_state))
> +		DRM_DEBUG_KMS("Attempting to use DSC failed\n");
> +
>  	return 0;
>  }
> 
>  static void gen11_dsi_get_power_domains(struct intel_encoder *encoder,
>  					struct intel_crtc_state *crtc_state)  {
> -	get_dsi_io_power_domains(to_i915(encoder->base.dev),
> -				 enc_to_intel_dsi(&encoder->base));
> +	struct drm_i915_private *i915 = to_i915(encoder->base.dev);
> +
> +	get_dsi_io_power_domains(i915, enc_to_intel_dsi(&encoder-
> >base));
> +
> +	if (crtc_state->dsc.compression_enable)
> +		intel_display_power_get(i915,
> +
> 	intel_dsc_power_domain(crtc_state));
>  }
> 
>  static bool gen11_dsi_get_hw_state(struct intel_encoder *encoder, @@ -
> 1360,7 +1429,7 @@ static const struct drm_connector_funcs
> gen11_dsi_connector_funcs = {
> 
>  static const struct drm_connector_helper_funcs
> gen11_dsi_connector_helper_funcs = {
>  	.get_modes = intel_dsi_get_modes,
> -	.mode_valid = intel_dsi_mode_valid,
> +	.mode_valid = gen11_dsi_mode_valid,
>  	.atomic_check = intel_digital_connector_atomic_check,
>  };
> 
> --
> 2.20.1

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Re: [Intel-gfx] [PATCH 9/9] drm/i915/dsi: add support for DSC

[Kulkarni, Vandita]

> -----Original Message-----
> From: Jani Nikula <jani.nikula@intel.com>
> Sent: Friday, November 8, 2019 9:10 PM
> To: intel-gfx@lists.freedesktop.org
> Cc: Kulkarni, Vandita <vandita.kulkarni@intel.com>; Navare, Manasi D
> <manasi.d.navare@intel.com>; ville.syrjala@linux.intel.com; Nikula, Jani
> <jani.nikula@intel.com>
> Subject: [PATCH 9/9] drm/i915/dsi: add support for DSC
> 
> Enable DSC for DSI, if specified in VBT.
> 
> This is now excessively dynamic, being enabled at compute config. I don't
> expect us to need to switch between DSC and non-DSC for the same panel.
> Cargo culting the DP DSC shows.
> 
> Mode valid lacks a sensible implementation, as does get config.
> 
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
> ---
>  drivers/gpu/drm/i915/display/icl_dsi.c | 75 ++++++++++++++++++++++++--
>  1 file changed, 72 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/icl_dsi.c
> b/drivers/gpu/drm/i915/display/icl_dsi.c
> index 8eb2d7f29c82..823dbd9d4d06 100644
> --- a/drivers/gpu/drm/i915/display/icl_dsi.c
> +++ b/drivers/gpu/drm/i915/display/icl_dsi.c
> @@ -34,6 +34,7 @@
>  #include "intel_ddi.h"
>  #include "intel_dsi.h"
>  #include "intel_panel.h"
> +#include "intel_vdsc.h"
> 
>  static inline int header_credits_available(struct drm_i915_private *dev_priv,
>  					   enum transcoder dsi_trans)
> @@ -1050,6 +1051,9 @@ static void gen11_dsi_pre_enable(struct
> intel_encoder *encoder,
>  	/* step5: program and powerup panel */
>  	gen11_dsi_powerup_panel(encoder);
> 
> +	/* FIXME: location? */
> +	intel_dsc_enable(encoder, pipe_config);
> +
>  	/* step6c: configure transcoder timings */
>  	gen11_dsi_set_transcoder_timings(encoder, pipe_config);
> 
> @@ -1211,6 +1215,13 @@ static void gen11_dsi_disable(struct
> intel_encoder *encoder,
>  	gen11_dsi_disable_io_power(encoder);
>  }
> 
> +static enum drm_mode_status gen11_dsi_mode_valid(struct
> drm_connector *connector,
> +						 struct drm_display_mode
> *mode)
> +{
> +	/* FIXME: DSC? */
> +	return intel_dsi_mode_valid(connector, mode); }
> +
>  static void gen11_dsi_get_timings(struct intel_encoder *encoder,
>  				  struct intel_crtc_state *pipe_config)  { @@ -
> 1258,6 +1269,56 @@ static void gen11_dsi_get_config(struct intel_encoder
> *encoder,
>  	pipe_config->pipe_bpp = bdw_get_pipemisc_bpp(crtc);  }
> 
> +static int gen11_dsi_dsc_compute_config(struct intel_encoder *encoder,
> +					struct intel_crtc_state *pipe_config,
> +					struct drm_connector_state
> *conn_state) {
> +	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
> +	struct drm_dsc_config *vdsc_cfg = &pipe_config->dsc.config;
> +	struct drm_display_mode *adjusted_mode = &pipe_config-
> >hw.adjusted_mode;
> +	int dsc_max_bpc = INTEL_GEN(dev_priv) >= 12 ? 12 : 10;
> +	bool use_dsc;
> +	int ret;
> +
> +	dsc_max_bpc = min_t(int, dsc_max_bpc, conn_state-
> >max_requested_bpc);
> +
> +	use_dsc = intel_bios_get_dsc_params(encoder, pipe_config,
> dsc_max_bpc);
> +	if (!use_dsc)
> +		return 0;
> +
> +	if (pipe_config->pipe_bpp < 8 * 3)
> +		return -EINVAL;
> +
> +	if (adjusted_mode->crtc_clock > dev_priv->max_cdclk_freq) {
> +		if (pipe_config->dsc.slice_count > 1) {
> +			pipe_config->dsc.dsc_split = true;
> +		} else {
> +			DRM_DEBUG_KMS("Cannot split stream to use 2
> VDSC instances\n");
> +			return -EINVAL;
> +		}
> +	}
> +
> +	vdsc_cfg->convert_rgb = false;
> +
> +	ret = intel_dsc_compute_params(encoder, pipe_config);
> +	if (ret)
> +		return ret;
> +
> +	/* DSI specific sanity checks on the common code */
> +	WARN_ON(vdsc_cfg->vbr_enable);
> +	WARN_ON(vdsc_cfg->pic_width % vdsc_cfg->slice_width);
> +	WARN_ON(vdsc_cfg->slice_height < 8);
> +	WARN_ON(vdsc_cfg->pic_height % vdsc_cfg->slice_height);
> +
> +	ret = drm_dsc_compute_rc_parameters(vdsc_cfg);
> +	if (ret)
> +		return ret;
> +
> +	pipe_config->dsc.compression_enable = true;
> +
As per the spec, I see that it asks us to program horizontal timings in video mode and use the compressed frequency ratio like burst mode, but it is a bit ambiguous if it is talking about non-burst mode.

We will have to add htotal, hsync_start and hsync_end calculation, if yes.

Thanks,
Vandita
> +	return 0;
> +}
> +
>  static int gen11_dsi_compute_config(struct intel_encoder *encoder,
>  				    struct intel_crtc_state *pipe_config,
>  				    struct drm_connector_state *conn_state)
> @@ -1286,14 +1347,22 @@ static int gen11_dsi_compute_config(struct
> intel_encoder *encoder,
>  	pipe_config->clock_set = true;
>  	pipe_config->port_clock = intel_dsi_bitrate(intel_dsi) / 5;
> 
> +	if (gen11_dsi_dsc_compute_config(encoder, pipe_config,
> conn_state))
> +		DRM_DEBUG_KMS("Attempting to use DSC failed\n");
> +
>  	return 0;
>  }
> 
>  static void gen11_dsi_get_power_domains(struct intel_encoder *encoder,
>  					struct intel_crtc_state *crtc_state)  {
> -	get_dsi_io_power_domains(to_i915(encoder->base.dev),
> -				 enc_to_intel_dsi(&encoder->base));
> +	struct drm_i915_private *i915 = to_i915(encoder->base.dev);
> +
> +	get_dsi_io_power_domains(i915, enc_to_intel_dsi(&encoder-
> >base));
> +
> +	if (crtc_state->dsc.compression_enable)
> +		intel_display_power_get(i915,
> +
> 	intel_dsc_power_domain(crtc_state));
>  }
> 
>  static bool gen11_dsi_get_hw_state(struct intel_encoder *encoder, @@ -
> 1360,7 +1429,7 @@ static const struct drm_connector_funcs
> gen11_dsi_connector_funcs = {
> 
>  static const struct drm_connector_helper_funcs
> gen11_dsi_connector_helper_funcs = {
>  	.get_modes = intel_dsi_get_modes,
> -	.mode_valid = intel_dsi_mode_valid,
> +	.mode_valid = gen11_dsi_mode_valid,
>  	.atomic_check = intel_digital_connector_atomic_check,
>  };
> 
> --
> 2.20.1

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