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From: Paul Burton <paulburton@kernel.org>
To: Huacai Chen <chenhc@lemote.com>
Cc: Paul Burton <paul.burton@mips.com>,
	Ralf Baechle <ralf@linux-mips.org>,
	James Hogan <jhogan@kernel.org>,
	linux-mips@linux-mips.org, linux-mips@vger.kernel.org,
	Fuxin Zhang <zhangfx@lemote.com>,
	Zhangjin Wu <wuzhangjin@gmail.com>,
	Jiaxun Yang <jiaxun.yang@flygoat.com>,
	Huacai Chen <chenhuacai@gmail.com>
Subject: Re: [PATCH] MIPS: Make sure ebase address is in KSEG0
Date: Fri, 22 Nov 2019 10:47:31 -0800	[thread overview]
Message-ID: <20191122184731.l7ttfg4evgi4tvcp@lantea.localdomain> (raw)
In-Reply-To: <1574335820-15188-1-git-send-email-chenhc@lemote.com>

Hi Huacai,

On Thu, Nov 21, 2019 at 07:30:20PM +0800, Huacai Chen wrote:
> Dynamically allocated ebase address above 0x20000000 can be triggered
> by some special physical memory layout, or just by a "big kernel + big
> initrd + big swiotlb" configuration.
> 
> For MIPS32, ebase address above 0x20000000 is unusable, for MIPS64 it
> is usable but this case is warned. However, this warning is useless
> because it is unfixable in a specific system configuration. So we just
> use CKSEG0 as a fallback.

I'd prefer that we don't assume there's memory at physical address zero
- that property doesn't hold for all systems.

How about the change I suggested previously over here:

  https://lore.kernel.org/linux-mips/20191108191149.bbq3h4xp4famsh2n@lantea.localdomain/

Would that work for you?

Thanks,
    Paul

> Signed-off-by: Huacai Chen <chenhc@lemote.com>
> ---
>  arch/mips/kernel/traps.c | 9 +++++++--
>  1 file changed, 7 insertions(+), 2 deletions(-)
> 
> diff --git a/arch/mips/kernel/traps.c b/arch/mips/kernel/traps.c
> index 9d9b2a4..7393f33 100644
> --- a/arch/mips/kernel/traps.c
> +++ b/arch/mips/kernel/traps.c
> @@ -2306,10 +2306,15 @@ void __init trap_init(void)
>  		 * EVA is special though as it allows segments to be rearranged
>  		 * and to become uncached during cache error handling.
>  		 */
> -		if (!IS_ENABLED(CONFIG_EVA) && !WARN_ON(ebase_pa >= 0x20000000))
> +		if (ebase_pa < 0x20000000)
>  			ebase = CKSEG0ADDR(ebase_pa);
> -		else
> +		else if (IS_ENABLED(CONFIG_EVA))
>  			ebase = (unsigned long)phys_to_virt(ebase_pa);
> +		else {
> +			memblock_free(ebase_pa, vec_size);
> +			ebase = CKSEG0;
> +			memblock_reserve(virt_to_phys((void *)ebase), vec_size);
> +		}
>  	}
>  
>  	if (cpu_has_mmips) {
> -- 
> 2.7.0
> 

  reply	other threads:[~2019-11-22 18:46 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-11-21 11:30 [PATCH] MIPS: Make sure ebase address is in KSEG0 Huacai Chen
2019-11-22 18:47 ` Paul Burton [this message]
2019-11-23  5:08   ` Jiaxun Yang
2019-11-23  6:11     ` Jiaxun Yang
2019-11-24  4:00       ` Huacai Chen
2019-11-25 23:42         ` Paul Burton
2019-11-26  1:55           ` Huacai Chen

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