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From: "Cédric Le Goater" <clg@kaod.org>
To: David Gibson <david@gibson.dropbear.id.au>
Cc: "Cédric Le Goater" <clg@kaod.org>,
	qemu-ppc@nongnu.org, "Greg Kurz" <groug@kaod.org>,
	qemu-devel@nongnu.org
Subject: [PATCH v6 03/20] ppc/pnv: Instantiate cores separately
Date: Mon, 25 Nov 2019 07:58:03 +0100	[thread overview]
Message-ID: <20191125065820.927-4-clg@kaod.org> (raw)
In-Reply-To: <20191125065820.927-1-clg@kaod.org>

From: Greg Kurz <groug@kaod.org>

Allocating a big void * array to store multiple objects isn't a
recommended practice for various reasons:
 - no compile time type checking
 - potential dangling pointers if a reference on an individual is
  taken and the array is freed later on
 - duplicate boiler plate everywhere the array is browsed through

Allocate an array of pointers and populate it instead.

Signed-off-by: Greg Kurz <groug@kaod.org>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
---
 include/hw/ppc/pnv.h |  2 +-
 hw/ppc/pnv.c         | 30 ++++++++++++------------------
 2 files changed, 13 insertions(+), 19 deletions(-)

diff --git a/include/hw/ppc/pnv.h b/include/hw/ppc/pnv.h
index 90f1343ed07c..03cb429f2131 100644
--- a/include/hw/ppc/pnv.h
+++ b/include/hw/ppc/pnv.h
@@ -56,7 +56,7 @@ typedef struct PnvChip {
 
     uint32_t     nr_cores;
     uint64_t     cores_mask;
-    void         *cores;
+    PnvCore      **cores;
 
     MemoryRegion xscom_mmio;
     MemoryRegion xscom;
diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c
index f0adb06c8d65..d899c83e5255 100644
--- a/hw/ppc/pnv.c
+++ b/hw/ppc/pnv.c
@@ -280,14 +280,12 @@ static void pnv_dt_icp(PnvChip *chip, void *fdt, uint32_t pir,
 
 static void pnv_chip_power8_dt_populate(PnvChip *chip, void *fdt)
 {
-    const char *typename = pnv_chip_core_typename(chip);
-    size_t typesize = object_type_get_instance_size(typename);
     int i;
 
     pnv_dt_xscom(chip, fdt, 0);
 
     for (i = 0; i < chip->nr_cores; i++) {
-        PnvCore *pnv_core = PNV_CORE(chip->cores + i * typesize);
+        PnvCore *pnv_core = chip->cores[i];
 
         pnv_dt_core(chip, pnv_core, fdt);
 
@@ -302,14 +300,12 @@ static void pnv_chip_power8_dt_populate(PnvChip *chip, void *fdt)
 
 static void pnv_chip_power9_dt_populate(PnvChip *chip, void *fdt)
 {
-    const char *typename = pnv_chip_core_typename(chip);
-    size_t typesize = object_type_get_instance_size(typename);
     int i;
 
     pnv_dt_xscom(chip, fdt, 0);
 
     for (i = 0; i < chip->nr_cores; i++) {
-        PnvCore *pnv_core = PNV_CORE(chip->cores + i * typesize);
+        PnvCore *pnv_core = chip->cores[i];
 
         pnv_dt_core(chip, pnv_core, fdt);
     }
@@ -913,8 +909,6 @@ static void pnv_chip_icp_realize(Pnv8Chip *chip8, Error **errp)
  {
     PnvChip *chip = PNV_CHIP(chip8);
     PnvChipClass *pcc = PNV_CHIP_GET_CLASS(chip);
-    const char *typename = pnv_chip_core_typename(chip);
-    size_t typesize = object_type_get_instance_size(typename);
     int i, j;
     char *name;
     XICSFabric *xi = XICS_FABRIC(qdev_get_machine());
@@ -928,7 +922,7 @@ static void pnv_chip_icp_realize(Pnv8Chip *chip8, Error **errp)
 
     /* Map the ICP registers for each thread */
     for (i = 0; i < chip->nr_cores; i++) {
-        PnvCore *pnv_core = PNV_CORE(chip->cores + i * typesize);
+        PnvCore *pnv_core = chip->cores[i];
         int core_hwid = CPU_CORE(pnv_core)->core_id;
 
         for (j = 0; j < CPU_CORE(pnv_core)->nr_threads; j++) {
@@ -1108,8 +1102,6 @@ static void pnv_chip_power9_instance_init(Object *obj)
 static void pnv_chip_quad_realize(Pnv9Chip *chip9, Error **errp)
 {
     PnvChip *chip = PNV_CHIP(chip9);
-    const char *typename = pnv_chip_core_typename(chip);
-    size_t typesize = object_type_get_instance_size(typename);
     int i;
 
     chip9->nr_quads = DIV_ROUND_UP(chip->nr_cores, 4);
@@ -1118,7 +1110,7 @@ static void pnv_chip_quad_realize(Pnv9Chip *chip9, Error **errp)
     for (i = 0; i < chip9->nr_quads; i++) {
         char eq_name[32];
         PnvQuad *eq = &chip9->quads[i];
-        PnvCore *pnv_core = PNV_CORE(chip->cores + (i * 4) * typesize);
+        PnvCore *pnv_core = chip->cores[i * 4];
         int core_id = CPU_CORE(pnv_core)->core_id;
 
         snprintf(eq_name, sizeof(eq_name), "eq[%d]", core_id);
@@ -1290,7 +1282,6 @@ static void pnv_chip_core_realize(PnvChip *chip, Error **errp)
     Error *error = NULL;
     PnvChipClass *pcc = PNV_CHIP_GET_CLASS(chip);
     const char *typename = pnv_chip_core_typename(chip);
-    size_t typesize = object_type_get_instance_size(typename);
     int i, core_hwid;
 
     if (!object_class_by_name(typename)) {
@@ -1305,21 +1296,24 @@ static void pnv_chip_core_realize(PnvChip *chip, Error **errp)
         return;
     }
 
-    chip->cores = g_malloc0(typesize * chip->nr_cores);
+    chip->cores = g_new0(PnvCore *, chip->nr_cores);
 
     for (i = 0, core_hwid = 0; (core_hwid < sizeof(chip->cores_mask) * 8)
              && (i < chip->nr_cores); core_hwid++) {
         char core_name[32];
-        void *pnv_core = chip->cores + i * typesize;
+        PnvCore *pnv_core;
         uint64_t xscom_core_base;
 
         if (!(chip->cores_mask & (1ull << core_hwid))) {
             continue;
         }
 
+        pnv_core = PNV_CORE(object_new(typename));
+
         snprintf(core_name, sizeof(core_name), "core[%d]", core_hwid);
-        object_initialize_child(OBJECT(chip), core_name, pnv_core, typesize,
-                                typename, &error_fatal, NULL);
+        object_property_add_child(OBJECT(chip), core_name, OBJECT(pnv_core),
+                                  &error_abort);
+        chip->cores[i] = pnv_core;
         object_property_set_int(OBJECT(pnv_core), ms->smp.threads, "nr-threads",
                                 &error_fatal);
         object_property_set_int(OBJECT(pnv_core), core_hwid,
@@ -1340,7 +1334,7 @@ static void pnv_chip_core_realize(PnvChip *chip, Error **errp)
         }
 
         pnv_xscom_add_subregion(chip, xscom_core_base,
-                                &PNV_CORE(pnv_core)->xscom_regs);
+                                &pnv_core->xscom_regs);
         i++;
     }
 }
-- 
2.21.0



  parent reply	other threads:[~2019-11-25  7:03 UTC|newest]

Thread overview: 33+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-11-25  6:58 [PATCH v6 00/20] ppc/pnv: add XIVE support for KVM guests Cédric Le Goater
2019-11-25  6:58 ` [PATCH v6 01/20] ppc/xive: Introduce a XivePresenter interface Cédric Le Goater
2019-11-25  6:58 ` [PATCH v6 02/20] ppc/xive: Implement the " Cédric Le Goater
2019-11-25  6:58 ` Cédric Le Goater [this message]
2019-11-25  6:58 ` [PATCH v6 04/20] ppc/pnv: Loop on the threads of the chip to find a matching NVT Cédric Le Goater
2019-11-27  4:57   ` David Gibson
2019-11-25  6:58 ` [PATCH v6 05/20] ppc: Introduce a ppc_cpu_pir() helper Cédric Le Goater
2019-11-25  6:58 ` [PATCH v6 06/20] ppc/pnv: Introduce a pnv_xive_is_cpu_enabled() helper Cédric Le Goater
2019-11-27  5:01   ` David Gibson
2019-11-25  6:58 ` [PATCH v6 07/20] ppc/pnv: Fix TIMA indirect access Cédric Le Goater
2019-11-27  5:03   ` David Gibson
2019-11-25  6:58 ` [PATCH v6 08/20] ppc/xive: Introduce a XiveFabric interface Cédric Le Goater
2019-11-25  6:58 ` [PATCH v6 09/20] ppc/pnv: Implement the " Cédric Le Goater
2019-11-25  6:58 ` [PATCH v6 10/20] ppc/spapr: " Cédric Le Goater
2019-11-25  6:58 ` [PATCH v6 11/20] ppc/xive: Use the XiveFabric and XivePresenter interfaces Cédric Le Goater
2019-11-27  5:07   ` David Gibson
2019-11-25  6:58 ` [PATCH v6 12/20] ppc/xive: Extend the TIMA operation with a XivePresenter parameter Cédric Le Goater
2019-11-27  5:24   ` David Gibson
2019-11-25  6:58 ` [PATCH v6 13/20] ppc/pnv: Clarify how the TIMA is accessed on a multichip system Cédric Le Goater
2019-11-27  5:23   ` David Gibson
2019-11-27  6:57     ` Cédric Le Goater
2019-11-28  1:30       ` David Gibson
2019-11-25  6:58 ` [PATCH v6 14/20] ppc/xive: Move the TIMA operations to the controller model Cédric Le Goater
2019-11-25  6:58 ` [PATCH v6 15/20] ppc/xive: Remove the get_tctx() XiveRouter handler Cédric Le Goater
2019-11-28  1:32   ` David Gibson
2019-11-25  6:58 ` [PATCH v6 16/20] ppc/xive: Introduce a xive_tctx_ipb_update() helper Cédric Le Goater
2019-11-27  8:50   ` Greg Kurz
2019-11-28  1:35     ` David Gibson
2019-11-25  6:58 ` [PATCH v6 17/20] ppc/xive: Synthesize interrupt from the saved IPB in the NVT Cédric Le Goater
2019-11-25  6:58 ` [PATCH v6 18/20] ppc/pnv: Introduce a pnv_xive_block_id() helper Cédric Le Goater
2019-11-25  6:58 ` [PATCH v6 19/20] ppc/pnv: Extend XiveRouter with a get_block_id() handler Cédric Le Goater
2019-11-25  6:58 ` [PATCH v6 20/20] ppc/pnv: Dump the XIVE NVT table Cédric Le Goater
2019-11-28  2:18 ` [PATCH v6 00/20] ppc/pnv: add XIVE support for KVM guests David Gibson

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