* [U-Boot] [PATCH 1/4] ARM: mx6: ddr: Make debug prints work with tiny printf
@ 2019-11-26 8:34 Marek Vasut
2019-11-26 8:34 ` [U-Boot] [PATCH 2/4] ARM: mx6: ddr: Factor out SDQS configuration code Marek Vasut
` (4 more replies)
0 siblings, 5 replies; 12+ messages in thread
From: Marek Vasut @ 2019-11-26 8:34 UTC (permalink / raw)
To: u-boot
The %08X format returns just zeroes with tiny printf, which is
horribly confusing, especially when debugging DRAM calibration
problems. Change the format to %08x (with lowercase x), which
behaves correctly with either implementation of printf in SPL.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Eric Nelson <eric@nelint.com>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
---
arch/arm/mach-imx/mx6/ddr.c | 24 ++++++++++++------------
1 file changed, 12 insertions(+), 12 deletions(-)
diff --git a/arch/arm/mach-imx/mx6/ddr.c b/arch/arm/mach-imx/mx6/ddr.c
index 84b9236249..e6f69e904f 100644
--- a/arch/arm/mach-imx/mx6/ddr.c
+++ b/arch/arm/mach-imx/mx6/ddr.c
@@ -214,14 +214,14 @@ int mmdc_do_write_level_calibration(struct mx6_ddr_sysinfo const *sysinfo)
writel(esdmisc_val, &mmdc0->mdref);
writel(zq_val, &mmdc0->mpzqhwctrl);
- debug("\tMMDC_MPWLDECTRL0 after write level cal: 0x%08X\n",
+ debug("\tMMDC_MPWLDECTRL0 after write level cal: 0x%08x\n",
readl(&mmdc0->mpwldectrl0));
- debug("\tMMDC_MPWLDECTRL1 after write level cal: 0x%08X\n",
+ debug("\tMMDC_MPWLDECTRL1 after write level cal: 0x%08x\n",
readl(&mmdc0->mpwldectrl1));
if (sysinfo->dsize == 2) {
- debug("\tMMDC_MPWLDECTRL0 after write level cal: 0x%08X\n",
+ debug("\tMMDC_MPWLDECTRL0 after write level cal: 0x%08x\n",
readl(&mmdc1->mpwldectrl0));
- debug("\tMMDC_MPWLDECTRL1 after write level cal: 0x%08X\n",
+ debug("\tMMDC_MPWLDECTRL1 after write level cal: 0x%08x\n",
readl(&mmdc1->mpwldectrl1));
}
@@ -557,20 +557,20 @@ int mmdc_do_dqs_calibration(struct mx6_ddr_sysinfo const *sysinfo)
*/
debug("MMDC registers updated from calibration\n");
debug("Read DQS gating calibration:\n");
- debug("\tMPDGCTRL0 PHY0 = 0x%08X\n", readl(&mmdc0->mpdgctrl0));
- debug("\tMPDGCTRL1 PHY0 = 0x%08X\n", readl(&mmdc0->mpdgctrl1));
+ debug("\tMPDGCTRL0 PHY0 = 0x%08x\n", readl(&mmdc0->mpdgctrl0));
+ debug("\tMPDGCTRL1 PHY0 = 0x%08x\n", readl(&mmdc0->mpdgctrl1));
if (sysinfo->dsize == 2) {
- debug("\tMPDGCTRL0 PHY1 = 0x%08X\n", readl(&mmdc1->mpdgctrl0));
- debug("\tMPDGCTRL1 PHY1 = 0x%08X\n", readl(&mmdc1->mpdgctrl1));
+ debug("\tMPDGCTRL0 PHY1 = 0x%08x\n", readl(&mmdc1->mpdgctrl0));
+ debug("\tMPDGCTRL1 PHY1 = 0x%08x\n", readl(&mmdc1->mpdgctrl1));
}
debug("Read calibration:\n");
- debug("\tMPRDDLCTL PHY0 = 0x%08X\n", readl(&mmdc0->mprddlctl));
+ debug("\tMPRDDLCTL PHY0 = 0x%08x\n", readl(&mmdc0->mprddlctl));
if (sysinfo->dsize == 2)
- debug("\tMPRDDLCTL PHY1 = 0x%08X\n", readl(&mmdc1->mprddlctl));
+ debug("\tMPRDDLCTL PHY1 = 0x%08x\n", readl(&mmdc1->mprddlctl));
debug("Write calibration:\n");
- debug("\tMPWRDLCTL PHY0 = 0x%08X\n", readl(&mmdc0->mpwrdlctl));
+ debug("\tMPWRDLCTL PHY0 = 0x%08x\n", readl(&mmdc0->mpwrdlctl));
if (sysinfo->dsize == 2)
- debug("\tMPWRDLCTL PHY1 = 0x%08X\n", readl(&mmdc1->mpwrdlctl));
+ debug("\tMPWRDLCTL PHY1 = 0x%08x\n", readl(&mmdc1->mpwrdlctl));
/*
* Registers below are for debugging purposes. These print out
--
2.24.0
^ permalink raw reply related [flat|nested] 12+ messages in thread
* [U-Boot] [PATCH 2/4] ARM: mx6: ddr: Factor out SDQS configuration code
2019-11-26 8:34 [U-Boot] [PATCH 1/4] ARM: mx6: ddr: Make debug prints work with tiny printf Marek Vasut
@ 2019-11-26 8:34 ` Marek Vasut
2019-11-26 16:26 ` Eric Nelson
2019-12-29 10:27 ` sbabic at denx.de
2019-11-26 8:34 ` [U-Boot] [PATCH 3/4] ARM: mx6: ddr: Configure all SDQS pullups using loop Marek Vasut
` (3 subsequent siblings)
4 siblings, 2 replies; 12+ messages in thread
From: Marek Vasut @ 2019-11-26 8:34 UTC (permalink / raw)
To: u-boot
Pull out the code turning SDQS pullups on and off into a separate
function, since it is replicated in two places in the code and it
is the single place in the entire function which is SoC dependent.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Eric Nelson <eric@nelint.com>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
---
arch/arm/mach-imx/mx6/ddr.c | 46 ++++++++++++++++++++++---------------
1 file changed, 28 insertions(+), 18 deletions(-)
diff --git a/arch/arm/mach-imx/mx6/ddr.c b/arch/arm/mach-imx/mx6/ddr.c
index e6f69e904f..e917b04f3d 100644
--- a/arch/arm/mach-imx/mx6/ddr.c
+++ b/arch/arm/mach-imx/mx6/ddr.c
@@ -245,12 +245,36 @@ int mmdc_do_write_level_calibration(struct mx6_ddr_sysinfo const *sysinfo)
return errors;
}
+static void mmdc_set_sdqs(bool set)
+{
+ struct mx6dq_iomux_ddr_regs *mx6_ddr_iomux =
+ (struct mx6dq_iomux_ddr_regs *)MX6DQ_IOM_DDR_BASE;
+
+ if (set) {
+ setbits_le32(&mx6_ddr_iomux->dram_sdqs0, 0x7000);
+ setbits_le32(&mx6_ddr_iomux->dram_sdqs1, 0x7000);
+ setbits_le32(&mx6_ddr_iomux->dram_sdqs2, 0x7000);
+ setbits_le32(&mx6_ddr_iomux->dram_sdqs3, 0x7000);
+ setbits_le32(&mx6_ddr_iomux->dram_sdqs4, 0x7000);
+ setbits_le32(&mx6_ddr_iomux->dram_sdqs5, 0x7000);
+ setbits_le32(&mx6_ddr_iomux->dram_sdqs6, 0x7000);
+ setbits_le32(&mx6_ddr_iomux->dram_sdqs7, 0x7000);
+ } else {
+ clrbits_le32(&mx6_ddr_iomux->dram_sdqs0, 0x7000);
+ clrbits_le32(&mx6_ddr_iomux->dram_sdqs1, 0x7000);
+ clrbits_le32(&mx6_ddr_iomux->dram_sdqs2, 0x7000);
+ clrbits_le32(&mx6_ddr_iomux->dram_sdqs3, 0x7000);
+ clrbits_le32(&mx6_ddr_iomux->dram_sdqs4, 0x7000);
+ clrbits_le32(&mx6_ddr_iomux->dram_sdqs5, 0x7000);
+ clrbits_le32(&mx6_ddr_iomux->dram_sdqs6, 0x7000);
+ clrbits_le32(&mx6_ddr_iomux->dram_sdqs7, 0x7000);
+ }
+}
+
int mmdc_do_dqs_calibration(struct mx6_ddr_sysinfo const *sysinfo)
{
struct mmdc_p_regs *mmdc0 = (struct mmdc_p_regs *)MMDC_P0_BASE_ADDR;
struct mmdc_p_regs *mmdc1 = (struct mmdc_p_regs *)MMDC_P1_BASE_ADDR;
- struct mx6dq_iomux_ddr_regs *mx6_ddr_iomux =
- (struct mx6dq_iomux_ddr_regs *)MX6DQ_IOM_DDR_BASE;
bool cs0_enable;
bool cs1_enable;
bool cs0_enable_initial;
@@ -272,14 +296,7 @@ int mmdc_do_dqs_calibration(struct mx6_ddr_sysinfo const *sysinfo)
setbits_le32(&mmdc0->mapsr, 0x1);
/* set DQS pull ups */
- setbits_le32(&mx6_ddr_iomux->dram_sdqs0, 0x7000);
- setbits_le32(&mx6_ddr_iomux->dram_sdqs1, 0x7000);
- setbits_le32(&mx6_ddr_iomux->dram_sdqs2, 0x7000);
- setbits_le32(&mx6_ddr_iomux->dram_sdqs3, 0x7000);
- setbits_le32(&mx6_ddr_iomux->dram_sdqs4, 0x7000);
- setbits_le32(&mx6_ddr_iomux->dram_sdqs5, 0x7000);
- setbits_le32(&mx6_ddr_iomux->dram_sdqs6, 0x7000);
- setbits_le32(&mx6_ddr_iomux->dram_sdqs7, 0x7000);
+ mmdc_set_sdqs(true);
/* Save old RALAT and WALAT values */
esdmisc_val = readl(&mmdc0->mdmisc);
@@ -524,14 +541,7 @@ int mmdc_do_dqs_calibration(struct mx6_ddr_sysinfo const *sysinfo)
writel(esdmisc_val, &mmdc0->mdmisc);
/* Clear DQS pull ups */
- clrbits_le32(&mx6_ddr_iomux->dram_sdqs0, 0x7000);
- clrbits_le32(&mx6_ddr_iomux->dram_sdqs1, 0x7000);
- clrbits_le32(&mx6_ddr_iomux->dram_sdqs2, 0x7000);
- clrbits_le32(&mx6_ddr_iomux->dram_sdqs3, 0x7000);
- clrbits_le32(&mx6_ddr_iomux->dram_sdqs4, 0x7000);
- clrbits_le32(&mx6_ddr_iomux->dram_sdqs5, 0x7000);
- clrbits_le32(&mx6_ddr_iomux->dram_sdqs6, 0x7000);
- clrbits_le32(&mx6_ddr_iomux->dram_sdqs7, 0x7000);
+ mmdc_set_sdqs(false);
/* Re-enable SDE (chip selects) if they were set initially */
if (cs1_enable_initial)
--
2.24.0
^ permalink raw reply related [flat|nested] 12+ messages in thread
* [U-Boot] [PATCH 3/4] ARM: mx6: ddr: Configure all SDQS pullups using loop
2019-11-26 8:34 [U-Boot] [PATCH 1/4] ARM: mx6: ddr: Make debug prints work with tiny printf Marek Vasut
2019-11-26 8:34 ` [U-Boot] [PATCH 2/4] ARM: mx6: ddr: Factor out SDQS configuration code Marek Vasut
@ 2019-11-26 8:34 ` Marek Vasut
2019-11-26 16:26 ` Eric Nelson
2019-12-29 10:26 ` sbabic at denx.de
2019-11-26 8:34 ` [U-Boot] [PATCH 4/4] ARM: mx6: ddr: Add support for iMX6SX Marek Vasut
` (2 subsequent siblings)
4 siblings, 2 replies; 12+ messages in thread
From: Marek Vasut @ 2019-11-26 8:34 UTC (permalink / raw)
To: u-boot
Instead of explicitly setting up each SDQS register, use a loop.
No functional change.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Eric Nelson <eric@nelint.com>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
---
arch/arm/mach-imx/mx6/ddr.c | 27 ++++++++-------------------
1 file changed, 8 insertions(+), 19 deletions(-)
diff --git a/arch/arm/mach-imx/mx6/ddr.c b/arch/arm/mach-imx/mx6/ddr.c
index e917b04f3d..b2402f75db 100644
--- a/arch/arm/mach-imx/mx6/ddr.c
+++ b/arch/arm/mach-imx/mx6/ddr.c
@@ -249,25 +249,14 @@ static void mmdc_set_sdqs(bool set)
{
struct mx6dq_iomux_ddr_regs *mx6_ddr_iomux =
(struct mx6dq_iomux_ddr_regs *)MX6DQ_IOM_DDR_BASE;
-
- if (set) {
- setbits_le32(&mx6_ddr_iomux->dram_sdqs0, 0x7000);
- setbits_le32(&mx6_ddr_iomux->dram_sdqs1, 0x7000);
- setbits_le32(&mx6_ddr_iomux->dram_sdqs2, 0x7000);
- setbits_le32(&mx6_ddr_iomux->dram_sdqs3, 0x7000);
- setbits_le32(&mx6_ddr_iomux->dram_sdqs4, 0x7000);
- setbits_le32(&mx6_ddr_iomux->dram_sdqs5, 0x7000);
- setbits_le32(&mx6_ddr_iomux->dram_sdqs6, 0x7000);
- setbits_le32(&mx6_ddr_iomux->dram_sdqs7, 0x7000);
- } else {
- clrbits_le32(&mx6_ddr_iomux->dram_sdqs0, 0x7000);
- clrbits_le32(&mx6_ddr_iomux->dram_sdqs1, 0x7000);
- clrbits_le32(&mx6_ddr_iomux->dram_sdqs2, 0x7000);
- clrbits_le32(&mx6_ddr_iomux->dram_sdqs3, 0x7000);
- clrbits_le32(&mx6_ddr_iomux->dram_sdqs4, 0x7000);
- clrbits_le32(&mx6_ddr_iomux->dram_sdqs5, 0x7000);
- clrbits_le32(&mx6_ddr_iomux->dram_sdqs6, 0x7000);
- clrbits_le32(&mx6_ddr_iomux->dram_sdqs7, 0x7000);
+ u32 sdqs = (u32)(&mx6_ddr_iomux->dram_sdqs0);
+ int i;
+
+ for (i = 0; i < 8; i++) {
+ if (set)
+ setbits_le32(sdqs + (4 * i), 0x7000);
+ else
+ clrbits_le32(sdqs + (4 * i), 0x7000);
}
}
--
2.24.0
^ permalink raw reply related [flat|nested] 12+ messages in thread
* [U-Boot] [PATCH 4/4] ARM: mx6: ddr: Add support for iMX6SX
2019-11-26 8:34 [U-Boot] [PATCH 1/4] ARM: mx6: ddr: Make debug prints work with tiny printf Marek Vasut
2019-11-26 8:34 ` [U-Boot] [PATCH 2/4] ARM: mx6: ddr: Factor out SDQS configuration code Marek Vasut
2019-11-26 8:34 ` [U-Boot] [PATCH 3/4] ARM: mx6: ddr: Configure all SDQS pullups using loop Marek Vasut
@ 2019-11-26 8:34 ` Marek Vasut
2019-11-26 16:26 ` Eric Nelson
2019-12-29 10:24 ` sbabic at denx.de
2019-11-26 16:19 ` [U-Boot] [PATCH 1/4] ARM: mx6: ddr: Make debug prints work with tiny printf Eric Nelson
2019-12-29 10:25 ` sbabic at denx.de
4 siblings, 2 replies; 12+ messages in thread
From: Marek Vasut @ 2019-11-26 8:34 UTC (permalink / raw)
To: u-boot
This patch adds support for iMX6SX MMDC into the DDR calibration
code. The only difference between MX6DQ and MX6SX is that the SX
has 2 SDQS registers, while the DQ has 8.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Eric Nelson <eric@nelint.com>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
---
arch/arm/mach-imx/mx6/ddr.c | 18 ++++++++++++++----
1 file changed, 14 insertions(+), 4 deletions(-)
diff --git a/arch/arm/mach-imx/mx6/ddr.c b/arch/arm/mach-imx/mx6/ddr.c
index b2402f75db..8ed8b79c8b 100644
--- a/arch/arm/mach-imx/mx6/ddr.c
+++ b/arch/arm/mach-imx/mx6/ddr.c
@@ -247,12 +247,22 @@ int mmdc_do_write_level_calibration(struct mx6_ddr_sysinfo const *sysinfo)
static void mmdc_set_sdqs(bool set)
{
- struct mx6dq_iomux_ddr_regs *mx6_ddr_iomux =
+ struct mx6dq_iomux_ddr_regs *mx6dq_ddr_iomux =
(struct mx6dq_iomux_ddr_regs *)MX6DQ_IOM_DDR_BASE;
- u32 sdqs = (u32)(&mx6_ddr_iomux->dram_sdqs0);
- int i;
+ struct mx6sx_iomux_ddr_regs *mx6sx_ddr_iomux =
+ (struct mx6sx_iomux_ddr_regs *)MX6SX_IOM_DDR_BASE;
+ int i, sdqs_cnt;
+ u32 sdqs;
+
+ if (is_mx6sx()) {
+ sdqs = (u32)(&mx6sx_ddr_iomux->dram_sdqs0);
+ sdqs_cnt = 2;
+ } else { /* MX6DQ */
+ sdqs = (u32)(&mx6dq_ddr_iomux->dram_sdqs0);
+ sdqs_cnt = 8;
+ }
- for (i = 0; i < 8; i++) {
+ for (i = 0; i < sdqs_cnt; i++) {
if (set)
setbits_le32(sdqs + (4 * i), 0x7000);
else
--
2.24.0
^ permalink raw reply related [flat|nested] 12+ messages in thread
* [U-Boot] [PATCH 1/4] ARM: mx6: ddr: Make debug prints work with tiny printf
2019-11-26 8:34 [U-Boot] [PATCH 1/4] ARM: mx6: ddr: Make debug prints work with tiny printf Marek Vasut
` (2 preceding siblings ...)
2019-11-26 8:34 ` [U-Boot] [PATCH 4/4] ARM: mx6: ddr: Add support for iMX6SX Marek Vasut
@ 2019-11-26 16:19 ` Eric Nelson
2019-12-29 10:25 ` sbabic at denx.de
4 siblings, 0 replies; 12+ messages in thread
From: Eric Nelson @ 2019-11-26 16:19 UTC (permalink / raw)
To: u-boot
Hi Marek,
On 11/26/19 1:34 AM, Marek Vasut wrote:
> The %08X format returns just zeroes with tiny printf, which is
> horribly confusing, especially when debugging DRAM calibration
> problems. Change the format to %08x (with lowercase x), which
> behaves correctly with either implementation of printf in SPL.
>
> Signed-off-by: Marek Vasut <marex@denx.de>
> Cc: Eric Nelson <eric@nelint.com>
> Cc: Fabio Estevam <fabio.estevam@nxp.com>
> Cc: Stefano Babic <sbabic@denx.de>
> ---
> arch/arm/mach-imx/mx6/ddr.c | 24 ++++++++++++------------
> 1 file changed, 12 insertions(+), 12 deletions(-)
>
> diff --git a/arch/arm/mach-imx/mx6/ddr.c b/arch/arm/mach-imx/mx6/ddr.c
> index 84b9236249..e6f69e904f 100644
> --- a/arch/arm/mach-imx/mx6/ddr.c
> +++ b/arch/arm/mach-imx/mx6/ddr.c
> @@ -214,14 +214,14 @@ int mmdc_do_write_level_calibration(struct mx6_ddr_sysinfo const *sysinfo)
> writel(esdmisc_val, &mmdc0->mdref);
> writel(zq_val, &mmdc0->mpzqhwctrl);
>
> - debug("\tMMDC_MPWLDECTRL0 after write level cal: 0x%08X\n",
> + debug("\tMMDC_MPWLDECTRL0 after write level cal: 0x%08x\n",
> readl(&mmdc0->mpwldectrl0));
> - debug("\tMMDC_MPWLDECTRL1 after write level cal: 0x%08X\n",
> + debug("\tMMDC_MPWLDECTRL1 after write level cal: 0x%08x\n",
> readl(&mmdc0->mpwldectrl1));
> if (sysinfo->dsize == 2) {
> - debug("\tMMDC_MPWLDECTRL0 after write level cal: 0x%08X\n",
> + debug("\tMMDC_MPWLDECTRL0 after write level cal: 0x%08x\n",
> readl(&mmdc1->mpwldectrl0));
> - debug("\tMMDC_MPWLDECTRL1 after write level cal: 0x%08X\n",
> + debug("\tMMDC_MPWLDECTRL1 after write level cal: 0x%08x\n",
> readl(&mmdc1->mpwldectrl1));
> }
>
> @@ -557,20 +557,20 @@ int mmdc_do_dqs_calibration(struct mx6_ddr_sysinfo const *sysinfo)
> */
> debug("MMDC registers updated from calibration\n");
> debug("Read DQS gating calibration:\n");
> - debug("\tMPDGCTRL0 PHY0 = 0x%08X\n", readl(&mmdc0->mpdgctrl0));
> - debug("\tMPDGCTRL1 PHY0 = 0x%08X\n", readl(&mmdc0->mpdgctrl1));
> + debug("\tMPDGCTRL0 PHY0 = 0x%08x\n", readl(&mmdc0->mpdgctrl0));
> + debug("\tMPDGCTRL1 PHY0 = 0x%08x\n", readl(&mmdc0->mpdgctrl1));
> if (sysinfo->dsize == 2) {
> - debug("\tMPDGCTRL0 PHY1 = 0x%08X\n", readl(&mmdc1->mpdgctrl0));
> - debug("\tMPDGCTRL1 PHY1 = 0x%08X\n", readl(&mmdc1->mpdgctrl1));
> + debug("\tMPDGCTRL0 PHY1 = 0x%08x\n", readl(&mmdc1->mpdgctrl0));
> + debug("\tMPDGCTRL1 PHY1 = 0x%08x\n", readl(&mmdc1->mpdgctrl1));
> }
> debug("Read calibration:\n");
> - debug("\tMPRDDLCTL PHY0 = 0x%08X\n", readl(&mmdc0->mprddlctl));
> + debug("\tMPRDDLCTL PHY0 = 0x%08x\n", readl(&mmdc0->mprddlctl));
> if (sysinfo->dsize == 2)
> - debug("\tMPRDDLCTL PHY1 = 0x%08X\n", readl(&mmdc1->mprddlctl));
> + debug("\tMPRDDLCTL PHY1 = 0x%08x\n", readl(&mmdc1->mprddlctl));
> debug("Write calibration:\n");
> - debug("\tMPWRDLCTL PHY0 = 0x%08X\n", readl(&mmdc0->mpwrdlctl));
> + debug("\tMPWRDLCTL PHY0 = 0x%08x\n", readl(&mmdc0->mpwrdlctl));
> if (sysinfo->dsize == 2)
> - debug("\tMPWRDLCTL PHY1 = 0x%08X\n", readl(&mmdc1->mpwrdlctl));
> + debug("\tMPWRDLCTL PHY1 = 0x%08x\n", readl(&mmdc1->mpwrdlctl));
>
> /*
> * Registers below are for debugging purposes. These print out
>
Reviewed-by: Eric Nelson <eric@nelint.com>
^ permalink raw reply [flat|nested] 12+ messages in thread
* [U-Boot] [PATCH 2/4] ARM: mx6: ddr: Factor out SDQS configuration code
2019-11-26 8:34 ` [U-Boot] [PATCH 2/4] ARM: mx6: ddr: Factor out SDQS configuration code Marek Vasut
@ 2019-11-26 16:26 ` Eric Nelson
2019-12-29 10:27 ` sbabic at denx.de
1 sibling, 0 replies; 12+ messages in thread
From: Eric Nelson @ 2019-11-26 16:26 UTC (permalink / raw)
To: u-boot
Hi Marek,
On 11/26/19 1:34 AM, Marek Vasut wrote:
> Pull out the code turning SDQS pullups on and off into a separate
> function, since it is replicated in two places in the code and it
> is the single place in the entire function which is SoC dependent.
>
> Signed-off-by: Marek Vasut <marex@denx.de>
> Cc: Eric Nelson <eric@nelint.com>
> Cc: Fabio Estevam <fabio.estevam@nxp.com>
> Cc: Stefano Babic <sbabic@denx.de>
> ---
> arch/arm/mach-imx/mx6/ddr.c | 46 ++++++++++++++++++++++---------------
> 1 file changed, 28 insertions(+), 18 deletions(-)
>
> diff --git a/arch/arm/mach-imx/mx6/ddr.c b/arch/arm/mach-imx/mx6/ddr.c
> index e6f69e904f..e917b04f3d 100644
> --- a/arch/arm/mach-imx/mx6/ddr.c
> +++ b/arch/arm/mach-imx/mx6/ddr.c
> @@ -245,12 +245,36 @@ int mmdc_do_write_level_calibration(struct mx6_ddr_sysinfo const *sysinfo)
> return errors;
> }
>
> +static void mmdc_set_sdqs(bool set)
> +{
> + struct mx6dq_iomux_ddr_regs *mx6_ddr_iomux =
> + (struct mx6dq_iomux_ddr_regs *)MX6DQ_IOM_DDR_BASE;
> +
> + if (set) {
> + setbits_le32(&mx6_ddr_iomux->dram_sdqs0, 0x7000);
> + setbits_le32(&mx6_ddr_iomux->dram_sdqs1, 0x7000);
> + setbits_le32(&mx6_ddr_iomux->dram_sdqs2, 0x7000);
> + setbits_le32(&mx6_ddr_iomux->dram_sdqs3, 0x7000);
> + setbits_le32(&mx6_ddr_iomux->dram_sdqs4, 0x7000);
> + setbits_le32(&mx6_ddr_iomux->dram_sdqs5, 0x7000);
> + setbits_le32(&mx6_ddr_iomux->dram_sdqs6, 0x7000);
> + setbits_le32(&mx6_ddr_iomux->dram_sdqs7, 0x7000);
> + } else {
> + clrbits_le32(&mx6_ddr_iomux->dram_sdqs0, 0x7000);
> + clrbits_le32(&mx6_ddr_iomux->dram_sdqs1, 0x7000);
> + clrbits_le32(&mx6_ddr_iomux->dram_sdqs2, 0x7000);
> + clrbits_le32(&mx6_ddr_iomux->dram_sdqs3, 0x7000);
> + clrbits_le32(&mx6_ddr_iomux->dram_sdqs4, 0x7000);
> + clrbits_le32(&mx6_ddr_iomux->dram_sdqs5, 0x7000);
> + clrbits_le32(&mx6_ddr_iomux->dram_sdqs6, 0x7000);
> + clrbits_le32(&mx6_ddr_iomux->dram_sdqs7, 0x7000);
> + }
> +}
> +
> int mmdc_do_dqs_calibration(struct mx6_ddr_sysinfo const *sysinfo)
> {
> struct mmdc_p_regs *mmdc0 = (struct mmdc_p_regs *)MMDC_P0_BASE_ADDR;
> struct mmdc_p_regs *mmdc1 = (struct mmdc_p_regs *)MMDC_P1_BASE_ADDR;
> - struct mx6dq_iomux_ddr_regs *mx6_ddr_iomux =
> - (struct mx6dq_iomux_ddr_regs *)MX6DQ_IOM_DDR_BASE;
> bool cs0_enable;
> bool cs1_enable;
> bool cs0_enable_initial;
> @@ -272,14 +296,7 @@ int mmdc_do_dqs_calibration(struct mx6_ddr_sysinfo const *sysinfo)
> setbits_le32(&mmdc0->mapsr, 0x1);
>
> /* set DQS pull ups */
> - setbits_le32(&mx6_ddr_iomux->dram_sdqs0, 0x7000);
> - setbits_le32(&mx6_ddr_iomux->dram_sdqs1, 0x7000);
> - setbits_le32(&mx6_ddr_iomux->dram_sdqs2, 0x7000);
> - setbits_le32(&mx6_ddr_iomux->dram_sdqs3, 0x7000);
> - setbits_le32(&mx6_ddr_iomux->dram_sdqs4, 0x7000);
> - setbits_le32(&mx6_ddr_iomux->dram_sdqs5, 0x7000);
> - setbits_le32(&mx6_ddr_iomux->dram_sdqs6, 0x7000);
> - setbits_le32(&mx6_ddr_iomux->dram_sdqs7, 0x7000);
> + mmdc_set_sdqs(true);
>
> /* Save old RALAT and WALAT values */
> esdmisc_val = readl(&mmdc0->mdmisc);
> @@ -524,14 +541,7 @@ int mmdc_do_dqs_calibration(struct mx6_ddr_sysinfo const *sysinfo)
> writel(esdmisc_val, &mmdc0->mdmisc);
>
> /* Clear DQS pull ups */
> - clrbits_le32(&mx6_ddr_iomux->dram_sdqs0, 0x7000);
> - clrbits_le32(&mx6_ddr_iomux->dram_sdqs1, 0x7000);
> - clrbits_le32(&mx6_ddr_iomux->dram_sdqs2, 0x7000);
> - clrbits_le32(&mx6_ddr_iomux->dram_sdqs3, 0x7000);
> - clrbits_le32(&mx6_ddr_iomux->dram_sdqs4, 0x7000);
> - clrbits_le32(&mx6_ddr_iomux->dram_sdqs5, 0x7000);
> - clrbits_le32(&mx6_ddr_iomux->dram_sdqs6, 0x7000);
> - clrbits_le32(&mx6_ddr_iomux->dram_sdqs7, 0x7000);
> + mmdc_set_sdqs(false);
>
> /* Re-enable SDE (chip selects) if they were set initially */
> if (cs1_enable_initial)
>
Reviewed-by: Eric Nelson <eric@nelint.com>
^ permalink raw reply [flat|nested] 12+ messages in thread
* [U-Boot] [PATCH 3/4] ARM: mx6: ddr: Configure all SDQS pullups using loop
2019-11-26 8:34 ` [U-Boot] [PATCH 3/4] ARM: mx6: ddr: Configure all SDQS pullups using loop Marek Vasut
@ 2019-11-26 16:26 ` Eric Nelson
2019-12-29 10:26 ` sbabic at denx.de
1 sibling, 0 replies; 12+ messages in thread
From: Eric Nelson @ 2019-11-26 16:26 UTC (permalink / raw)
To: u-boot
Hi Marek,
On 11/26/19 1:34 AM, Marek Vasut wrote:
> Instead of explicitly setting up each SDQS register, use a loop.
> No functional change.
>
> Signed-off-by: Marek Vasut <marex@denx.de>
> Cc: Eric Nelson <eric@nelint.com>
> Cc: Fabio Estevam <fabio.estevam@nxp.com>
> Cc: Stefano Babic <sbabic@denx.de>
> ---
> arch/arm/mach-imx/mx6/ddr.c | 27 ++++++++-------------------
> 1 file changed, 8 insertions(+), 19 deletions(-)
>
> diff --git a/arch/arm/mach-imx/mx6/ddr.c b/arch/arm/mach-imx/mx6/ddr.c
> index e917b04f3d..b2402f75db 100644
> --- a/arch/arm/mach-imx/mx6/ddr.c
> +++ b/arch/arm/mach-imx/mx6/ddr.c
> @@ -249,25 +249,14 @@ static void mmdc_set_sdqs(bool set)
> {
> struct mx6dq_iomux_ddr_regs *mx6_ddr_iomux =
> (struct mx6dq_iomux_ddr_regs *)MX6DQ_IOM_DDR_BASE;
> -
> - if (set) {
> - setbits_le32(&mx6_ddr_iomux->dram_sdqs0, 0x7000);
> - setbits_le32(&mx6_ddr_iomux->dram_sdqs1, 0x7000);
> - setbits_le32(&mx6_ddr_iomux->dram_sdqs2, 0x7000);
> - setbits_le32(&mx6_ddr_iomux->dram_sdqs3, 0x7000);
> - setbits_le32(&mx6_ddr_iomux->dram_sdqs4, 0x7000);
> - setbits_le32(&mx6_ddr_iomux->dram_sdqs5, 0x7000);
> - setbits_le32(&mx6_ddr_iomux->dram_sdqs6, 0x7000);
> - setbits_le32(&mx6_ddr_iomux->dram_sdqs7, 0x7000);
> - } else {
> - clrbits_le32(&mx6_ddr_iomux->dram_sdqs0, 0x7000);
> - clrbits_le32(&mx6_ddr_iomux->dram_sdqs1, 0x7000);
> - clrbits_le32(&mx6_ddr_iomux->dram_sdqs2, 0x7000);
> - clrbits_le32(&mx6_ddr_iomux->dram_sdqs3, 0x7000);
> - clrbits_le32(&mx6_ddr_iomux->dram_sdqs4, 0x7000);
> - clrbits_le32(&mx6_ddr_iomux->dram_sdqs5, 0x7000);
> - clrbits_le32(&mx6_ddr_iomux->dram_sdqs6, 0x7000);
> - clrbits_le32(&mx6_ddr_iomux->dram_sdqs7, 0x7000);
> + u32 sdqs = (u32)(&mx6_ddr_iomux->dram_sdqs0);
> + int i;
> +
> + for (i = 0; i < 8; i++) {
> + if (set)
> + setbits_le32(sdqs + (4 * i), 0x7000);
> + else
> + clrbits_le32(sdqs + (4 * i), 0x7000);
> }
> }
>
>
Reviewed-by: Eric Nelson <eric@nelint.com>
^ permalink raw reply [flat|nested] 12+ messages in thread
* [U-Boot] [PATCH 4/4] ARM: mx6: ddr: Add support for iMX6SX
2019-11-26 8:34 ` [U-Boot] [PATCH 4/4] ARM: mx6: ddr: Add support for iMX6SX Marek Vasut
@ 2019-11-26 16:26 ` Eric Nelson
2019-12-29 10:24 ` sbabic at denx.de
1 sibling, 0 replies; 12+ messages in thread
From: Eric Nelson @ 2019-11-26 16:26 UTC (permalink / raw)
To: u-boot
Hi Marek,
On 11/26/19 1:34 AM, Marek Vasut wrote:
> This patch adds support for iMX6SX MMDC into the DDR calibration
> code. The only difference between MX6DQ and MX6SX is that the SX
> has 2 SDQS registers, while the DQ has 8.
>
> Signed-off-by: Marek Vasut <marex@denx.de>
> Cc: Eric Nelson <eric@nelint.com>
> Cc: Fabio Estevam <fabio.estevam@nxp.com>
> Cc: Stefano Babic <sbabic@denx.de>
> ---
> arch/arm/mach-imx/mx6/ddr.c | 18 ++++++++++++++----
> 1 file changed, 14 insertions(+), 4 deletions(-)
>
> diff --git a/arch/arm/mach-imx/mx6/ddr.c b/arch/arm/mach-imx/mx6/ddr.c
> index b2402f75db..8ed8b79c8b 100644
> --- a/arch/arm/mach-imx/mx6/ddr.c
> +++ b/arch/arm/mach-imx/mx6/ddr.c
> @@ -247,12 +247,22 @@ int mmdc_do_write_level_calibration(struct mx6_ddr_sysinfo const *sysinfo)
>
> static void mmdc_set_sdqs(bool set)
> {
> - struct mx6dq_iomux_ddr_regs *mx6_ddr_iomux =
> + struct mx6dq_iomux_ddr_regs *mx6dq_ddr_iomux =
> (struct mx6dq_iomux_ddr_regs *)MX6DQ_IOM_DDR_BASE;
> - u32 sdqs = (u32)(&mx6_ddr_iomux->dram_sdqs0);
> - int i;
> + struct mx6sx_iomux_ddr_regs *mx6sx_ddr_iomux =
> + (struct mx6sx_iomux_ddr_regs *)MX6SX_IOM_DDR_BASE;
> + int i, sdqs_cnt;
> + u32 sdqs;
> +
> + if (is_mx6sx()) {
> + sdqs = (u32)(&mx6sx_ddr_iomux->dram_sdqs0);
> + sdqs_cnt = 2;
> + } else { /* MX6DQ */
> + sdqs = (u32)(&mx6dq_ddr_iomux->dram_sdqs0);
> + sdqs_cnt = 8;
> + }
>
> - for (i = 0; i < 8; i++) {
> + for (i = 0; i < sdqs_cnt; i++) {
> if (set)
> setbits_le32(sdqs + (4 * i), 0x7000);
> else
>
Reviewed-by: Eric Nelson <eric@nelint.com>
^ permalink raw reply [flat|nested] 12+ messages in thread
* [U-Boot] [PATCH 4/4] ARM: mx6: ddr: Add support for iMX6SX
2019-11-26 8:34 ` [U-Boot] [PATCH 4/4] ARM: mx6: ddr: Add support for iMX6SX Marek Vasut
2019-11-26 16:26 ` Eric Nelson
@ 2019-12-29 10:24 ` sbabic at denx.de
1 sibling, 0 replies; 12+ messages in thread
From: sbabic at denx.de @ 2019-12-29 10:24 UTC (permalink / raw)
To: u-boot
> This patch adds support for iMX6SX MMDC into the DDR calibration
> code. The only difference between MX6DQ and MX6SX is that the SX
> has 2 SDQS registers, while the DQ has 8.
> Signed-off-by: Marek Vasut <marex@denx.de>
> Cc: Eric Nelson <eric@nelint.com>
> Cc: Fabio Estevam <fabio.estevam@nxp.com>
> Cc: Stefano Babic <sbabic@denx.de>
> Reviewed-by: Eric Nelson <eric@nelint.com>
Applied to u-boot-imx, -next, thanks !
Best regards,
Stefano Babic
--
=====================================================================
DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de
=====================================================================
^ permalink raw reply [flat|nested] 12+ messages in thread
* [U-Boot] [PATCH 1/4] ARM: mx6: ddr: Make debug prints work with tiny printf
2019-11-26 8:34 [U-Boot] [PATCH 1/4] ARM: mx6: ddr: Make debug prints work with tiny printf Marek Vasut
` (3 preceding siblings ...)
2019-11-26 16:19 ` [U-Boot] [PATCH 1/4] ARM: mx6: ddr: Make debug prints work with tiny printf Eric Nelson
@ 2019-12-29 10:25 ` sbabic at denx.de
4 siblings, 0 replies; 12+ messages in thread
From: sbabic at denx.de @ 2019-12-29 10:25 UTC (permalink / raw)
To: u-boot
> The %08X format returns just zeroes with tiny printf, which is
> horribly confusing, especially when debugging DRAM calibration
> problems. Change the format to %08x (with lowercase x), which
> behaves correctly with either implementation of printf in SPL.
> Signed-off-by: Marek Vasut <marex@denx.de>
> Cc: Eric Nelson <eric@nelint.com>
> Cc: Fabio Estevam <fabio.estevam@nxp.com>
> Cc: Stefano Babic <sbabic@denx.de>
> Reviewed-by: Eric Nelson <eric@nelint.com>
Applied to u-boot-imx, -next, thanks !
Best regards,
Stefano Babic
--
=====================================================================
DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de
=====================================================================
^ permalink raw reply [flat|nested] 12+ messages in thread
* [U-Boot] [PATCH 3/4] ARM: mx6: ddr: Configure all SDQS pullups using loop
2019-11-26 8:34 ` [U-Boot] [PATCH 3/4] ARM: mx6: ddr: Configure all SDQS pullups using loop Marek Vasut
2019-11-26 16:26 ` Eric Nelson
@ 2019-12-29 10:26 ` sbabic at denx.de
1 sibling, 0 replies; 12+ messages in thread
From: sbabic at denx.de @ 2019-12-29 10:26 UTC (permalink / raw)
To: u-boot
> Instead of explicitly setting up each SDQS register, use a loop.
> No functional change.
> Signed-off-by: Marek Vasut <marex@denx.de>
> Cc: Eric Nelson <eric@nelint.com>
> Cc: Fabio Estevam <fabio.estevam@nxp.com>
> Cc: Stefano Babic <sbabic@denx.de>
> Reviewed-by: Eric Nelson <eric@nelint.com>
Applied to u-boot-imx, -next, thanks !
Best regards,
Stefano Babic
--
=====================================================================
DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de
=====================================================================
^ permalink raw reply [flat|nested] 12+ messages in thread
* [U-Boot] [PATCH 2/4] ARM: mx6: ddr: Factor out SDQS configuration code
2019-11-26 8:34 ` [U-Boot] [PATCH 2/4] ARM: mx6: ddr: Factor out SDQS configuration code Marek Vasut
2019-11-26 16:26 ` Eric Nelson
@ 2019-12-29 10:27 ` sbabic at denx.de
1 sibling, 0 replies; 12+ messages in thread
From: sbabic at denx.de @ 2019-12-29 10:27 UTC (permalink / raw)
To: u-boot
> Pull out the code turning SDQS pullups on and off into a separate
> function, since it is replicated in two places in the code and it
> is the single place in the entire function which is SoC dependent.
> Signed-off-by: Marek Vasut <marex@denx.de>
> Cc: Eric Nelson <eric@nelint.com>
> Cc: Fabio Estevam <fabio.estevam@nxp.com>
> Cc: Stefano Babic <sbabic@denx.de>
> Reviewed-by: Eric Nelson <eric@nelint.com>
Applied to u-boot-imx, -next, thanks !
Best regards,
Stefano Babic
--
=====================================================================
DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de
=====================================================================
^ permalink raw reply [flat|nested] 12+ messages in thread
end of thread, other threads:[~2019-12-29 10:27 UTC | newest]
Thread overview: 12+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2019-11-26 8:34 [U-Boot] [PATCH 1/4] ARM: mx6: ddr: Make debug prints work with tiny printf Marek Vasut
2019-11-26 8:34 ` [U-Boot] [PATCH 2/4] ARM: mx6: ddr: Factor out SDQS configuration code Marek Vasut
2019-11-26 16:26 ` Eric Nelson
2019-12-29 10:27 ` sbabic at denx.de
2019-11-26 8:34 ` [U-Boot] [PATCH 3/4] ARM: mx6: ddr: Configure all SDQS pullups using loop Marek Vasut
2019-11-26 16:26 ` Eric Nelson
2019-12-29 10:26 ` sbabic at denx.de
2019-11-26 8:34 ` [U-Boot] [PATCH 4/4] ARM: mx6: ddr: Add support for iMX6SX Marek Vasut
2019-11-26 16:26 ` Eric Nelson
2019-12-29 10:24 ` sbabic at denx.de
2019-11-26 16:19 ` [U-Boot] [PATCH 1/4] ARM: mx6: ddr: Make debug prints work with tiny printf Eric Nelson
2019-12-29 10:25 ` sbabic at denx.de
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