* [U-Boot] [PATCH v2 0/2] Add Broadcom XHCI driver for iproc platforms
@ 2019-11-26 18:39 Vladimir Olovyannikov
2019-11-26 18:39 ` [U-Boot] [PATCH v3 1/2] dt-bindings: Documentation on BRCM xHCI controller Vladimir Olovyannikov
2019-11-26 18:39 ` [U-Boot] [PATCH v3 2/2] drivers: usb: host: Add BRCM xHCI driver Vladimir Olovyannikov
0 siblings, 2 replies; 5+ messages in thread
From: Vladimir Olovyannikov @ 2019-11-26 18:39 UTC (permalink / raw)
To: u-boot
This patchset adds Broadcom XHCI driver for iproc platforms.
This USB controller is based on the Broadcom USB3 IP Core.
Supports USB2/3 functionality.
Bharat Kumar Reddy Gooty (2):
dt-bindings: Documentation on BRCM xHCI controller
drivers: usb: host: Add BRCM xHCI driver
.../bindings/usb/brcm,generic-xhci.txt | 12 ++
drivers/usb/host/Kconfig | 8 ++
drivers/usb/host/Makefile | 1 +
drivers/usb/host/xhci-brcm.c | 105 ++++++++++++++++++
4 files changed, 126 insertions(+)
create mode 100644 Documentation/devicetree/bindings/usb/brcm,generic-xhci.txt
create mode 100644 drivers/usb/host/xhci-brcm.c
--
2.17.1
^ permalink raw reply [flat|nested] 5+ messages in thread
* [U-Boot] [PATCH v3 1/2] dt-bindings: Documentation on BRCM xHCI controller
2019-11-26 18:39 [U-Boot] [PATCH v2 0/2] Add Broadcom XHCI driver for iproc platforms Vladimir Olovyannikov
@ 2019-11-26 18:39 ` Vladimir Olovyannikov
2019-11-26 18:39 ` [U-Boot] [PATCH v3 2/2] drivers: usb: host: Add BRCM xHCI driver Vladimir Olovyannikov
1 sibling, 0 replies; 5+ messages in thread
From: Vladimir Olovyannikov @ 2019-11-26 18:39 UTC (permalink / raw)
To: u-boot
From: Bharat Kumar Reddy Gooty <bharat.gooty@broadcom.com>
DT bindings document for Broadcom xHCI controller.
Signed-off-by: Bharat Kumar Reddy Gooty <bharat.gooty@broadcom.com>
Signed-off-by: Vladimir Olovyannikov <vladimir.olovyannikov@broadcom.com>
---
.../devicetree/bindings/usb/brcm,generic-xhci.txt | 12 ++++++++++++
1 file changed, 12 insertions(+)
create mode 100644 Documentation/devicetree/bindings/usb/brcm,generic-xhci.txt
diff --git a/Documentation/devicetree/bindings/usb/brcm,generic-xhci.txt b/Documentation/devicetree/bindings/usb/brcm,generic-xhci.txt
new file mode 100644
index 0000000000..621b99c9f3
--- /dev/null
+++ b/Documentation/devicetree/bindings/usb/brcm,generic-xhci.txt
@@ -0,0 +1,12 @@
+Broadcom USB xHCI Controller
+
+Required properties:
+ - compatible: "brcm,generic-xhci"
+ - reg: Base address and length of the standard xHCI register set
+
+Example:
+
+ xhci0: usb at 68501000 {
+ compatible = "brcm,generic-xhci";
+ reg = <0x68501000 0x1000>;
+ };
--
2.17.1
^ permalink raw reply related [flat|nested] 5+ messages in thread
* [U-Boot] [PATCH v3 2/2] drivers: usb: host: Add BRCM xHCI driver
2019-11-26 18:39 [U-Boot] [PATCH v2 0/2] Add Broadcom XHCI driver for iproc platforms Vladimir Olovyannikov
2019-11-26 18:39 ` [U-Boot] [PATCH v3 1/2] dt-bindings: Documentation on BRCM xHCI controller Vladimir Olovyannikov
@ 2019-11-26 18:39 ` Vladimir Olovyannikov
1 sibling, 0 replies; 5+ messages in thread
From: Vladimir Olovyannikov @ 2019-11-26 18:39 UTC (permalink / raw)
To: u-boot
From: Bharat Kumar Reddy Gooty <bharat.gooty@broadcom.com>
Base driver for Broadcom xHCI controllers
Signed-off-by: Bharat Kumar Reddy Gooty <bharat.gooty@broadcom.com>
Signed-off-by: Vladimir Olovyannikov <vladimir.olovyannikov@broadcom.com>
---
drivers/usb/host/Kconfig | 8 +++
drivers/usb/host/Makefile | 1 +
drivers/usb/host/xhci-brcm.c | 105 +++++++++++++++++++++++++++++++++++
3 files changed, 114 insertions(+)
create mode 100644 drivers/usb/host/xhci-brcm.c
diff --git a/drivers/usb/host/Kconfig b/drivers/usb/host/Kconfig
index 0987ff25b1..94ac969058 100644
--- a/drivers/usb/host/Kconfig
+++ b/drivers/usb/host/Kconfig
@@ -88,6 +88,14 @@ config USB_XHCI_FSL
depends on !SPL_NO_USB
help
Enables support for the on-chip xHCI controller on NXP Layerscape SoCs.
+
+config USB_XHCI_BRCM
+ bool "Broadcom USB3 Host XHCI controller"
+ depends on DM_USB
+ help
+ USB controller based on the Broadcom USB3 IP Core.
+ Supports USB2/3 functionality.
+
endif # USB_XHCI_HCD
config USB_EHCI_HCD
diff --git a/drivers/usb/host/Makefile b/drivers/usb/host/Makefile
index 7feeff679c..b62f346094 100644
--- a/drivers/usb/host/Makefile
+++ b/drivers/usb/host/Makefile
@@ -44,6 +44,7 @@ obj-$(CONFIG_USB_EHCI_RMOBILE) += ehci-rmobile.o
obj-$(CONFIG_USB_EHCI_ZYNQ) += ehci-zynq.o
# xhci
+obj-$(CONFIG_USB_XHCI_BRCM) += xhci-brcm.o
obj-$(CONFIG_USB_XHCI_HCD) += xhci.o xhci-mem.o xhci-ring.o
obj-$(CONFIG_USB_XHCI_DWC3) += xhci-dwc3.o
obj-$(CONFIG_USB_XHCI_DWC3_OF_SIMPLE) += dwc3-of-simple.o
diff --git a/drivers/usb/host/xhci-brcm.c b/drivers/usb/host/xhci-brcm.c
new file mode 100644
index 0000000000..c53c93209e
--- /dev/null
+++ b/drivers/usb/host/xhci-brcm.c
@@ -0,0 +1,105 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2019 Broadcom.
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <fdtdec.h>
+#include <usb.h>
+#include <asm/io.h>
+#include "xhci.h"
+
+#define DRD2U3H_XHC_REGS_AXIWRA 0xC08
+#define DRD2U3H_XHC_REGS_AXIRDA 0xC0C
+
+#define USBAXI_AWCACHE 0xF
+#define USBAXI_ARCACHE 0xF
+#define USBAXI_AWPROT 0x8
+#define USBAXI_ARPROT 0x8
+#define USBAXIWR_SA_VAL ((USBAXI_AWCACHE << 4) | USBAXI_AWPROT)
+#define USBAXIWR_SA_MASK 0xFF
+#define USBAXIWR_UA_VAL (((USBAXI_AWCACHE << 4) | USBAXI_AWPROT) << 16)
+#define USBAXIWR_UA_MASK (0xFF << 16)
+#define USBAXIRD_SA_VAL ((USBAXI_ARCACHE << 4) | USBAXI_ARPROT)
+#define USBAXIRD_SA_MASK 0xFF
+#define USBAXIRD_UA_VAL (((USBAXI_ARCACHE << 4) | USBAXI_ARPROT) << 16)
+#define USBAXIRD_UA_MASK (0xFF << 16)
+
+struct brcm_xhci_platdata {
+ unsigned int arcache;
+ unsigned int awcache;
+};
+
+static int xhci_brcm_probe(struct udevice *dev)
+{
+ struct xhci_hccr *hcd;
+ struct xhci_hcor *hcor;
+ struct brcm_xhci_platdata *plat = dev_get_platdata(dev);
+ uintptr_t hc_base;
+ int len, ret = 0;
+
+ if (!plat) {
+ dev_err(dev, "Can't get xHCI Plat data\n");
+ return -ENOMEM;
+ }
+
+ hcd = dev_read_addr_ptr(dev);
+ if (!hcd) {
+ dev_err(dev, "Can't get the xHCI register base address\n");
+ return -ENXIO;
+ }
+
+ hc_base = (uintptr_t)hcd;
+ len = HC_LENGTH(xhci_readl(&hcd->cr_capbase));
+ hcor = (struct xhci_hcor *)(hc_base + len);
+
+ /* Save the default values of AXI read and write attributes */
+ plat->awcache = readl(hc_base + DRD2U3H_XHC_REGS_AXIWRA);
+ plat->arcache = readl(hc_base + DRD2U3H_XHC_REGS_AXIRDA);
+
+ /* Enable AXI read and write attributes. */
+ clrsetbits_le32((hc_base + DRD2U3H_XHC_REGS_AXIWRA),
+ (USBAXIWR_UA_MASK | USBAXIWR_SA_MASK),
+ (USBAXIWR_UA_VAL | USBAXIWR_SA_VAL));
+ clrsetbits_le32((hc_base + DRD2U3H_XHC_REGS_AXIRDA),
+ (USBAXIRD_UA_MASK | USBAXIRD_SA_MASK),
+ (USBAXIRD_UA_VAL | USBAXIRD_SA_VAL));
+
+ ret = xhci_register(dev, hcd, hcor);
+ if (ret)
+ dev_err(dev, "Failed to register xHCI\n");
+
+ return ret;
+}
+
+static int xhci_brcm_deregister(struct udevice *dev)
+{
+ struct brcm_xhci_platdata *plat = dev_get_platdata(dev);
+ uintptr_t hc_base;
+
+ hc_base = (uintptr_t)dev_read_addr(dev);
+
+ /* Restore the default values for AXI read and write attributes */
+ writel(plat->awcache, hc_base + DRD2U3H_XHC_REGS_AXIWRA);
+ writel(plat->arcache, hc_base + DRD2U3H_XHC_REGS_AXIRDA);
+
+ return xhci_deregister(dev);
+}
+
+static const struct udevice_id xhci_brcm_ids[] = {
+ { .compatible = "brcm,generic-xhci" },
+ { }
+};
+
+U_BOOT_DRIVER(usb_xhci) = {
+ .name = "xhci_brcm",
+ .id = UCLASS_USB,
+ .probe = xhci_brcm_probe,
+ .remove = xhci_brcm_deregister,
+ .ops = &xhci_usb_ops,
+ .of_match = xhci_brcm_ids,
+ .platdata_auto_alloc_size = sizeof(struct brcm_xhci_platdata),
+ .priv_auto_alloc_size = sizeof(struct xhci_ctrl),
+ .flags = DM_FLAG_ALLOC_PRIV_DMA,
+};
--
2.17.1
^ permalink raw reply related [flat|nested] 5+ messages in thread
* [U-Boot] [PATCH v3 2/2] drivers: usb: host: Add BRCM xHCI driver
2019-11-26 18:41 ` [U-Boot] [PATCH v3 2/2] drivers: usb: host: Add BRCM xHCI driver Vladimir Olovyannikov
@ 2019-11-27 8:42 ` Marek Vasut
0 siblings, 0 replies; 5+ messages in thread
From: Marek Vasut @ 2019-11-27 8:42 UTC (permalink / raw)
To: u-boot
On 11/26/19 7:41 PM, Vladimir Olovyannikov wrote:
Hi,
[...]
> +#define USBAXI_AWCACHE 0xF
> +#define USBAXI_ARCACHE 0xF
> +#define USBAXI_AWPROT 0x8
> +#define USBAXI_ARPROT 0x8
> +#define USBAXIWR_SA_VAL ((USBAXI_AWCACHE << 4) | USBAXI_AWPROT)
> +#define USBAXIWR_SA_MASK 0xFF
> +#define USBAXIWR_UA_VAL (((USBAXI_AWCACHE << 4) | USBAXI_AWPROT) << 16)
Maybe you can do "#define USBAXIWR_UA_VAL (USBAXIWR_SA_VAL << 16)" here?
> +#define USBAXIWR_UA_MASK (0xFF << 16)
> +#define USBAXIRD_SA_VAL ((USBAXI_ARCACHE << 4) | USBAXI_ARPROT)
> +#define USBAXIRD_SA_MASK 0xFF
> +#define USBAXIRD_UA_VAL (((USBAXI_ARCACHE << 4) | USBAXI_ARPROT) << 16)
And here too ?
> +#define USBAXIRD_UA_MASK (0xFF << 16)
The masks are the same for RD and WR, maybe it makes sense to unify them
into one set of masks ?
> +struct brcm_xhci_platdata {
> + unsigned int arcache;
> + unsigned int awcache;
> +};
> +
> +static int xhci_brcm_probe(struct udevice *dev)
> +{
> + struct xhci_hccr *hcd;
> + struct xhci_hcor *hcor;
> + struct brcm_xhci_platdata *plat = dev_get_platdata(dev);
> + uintptr_t hc_base;
> + int len, ret = 0;
> +
> + if (!plat) {
> + dev_err(dev, "Can't get xHCI Plat data\n");
> + return -ENOMEM;
> + }
> +
> + hcd = dev_read_addr_ptr(dev);
> + if (!hcd) {
> + dev_err(dev, "Can't get the xHCI register base address\n");
> + return -ENXIO;
> + }
> +
> + hc_base = (uintptr_t)hcd;
> + len = HC_LENGTH(xhci_readl(&hcd->cr_capbase));
> + hcor = (struct xhci_hcor *)(hc_base + len);
> +
> + /* Save the default values of AXI read and write attributes */
> + plat->awcache = readl(hc_base + DRD2U3H_XHC_REGS_AXIWRA);
> + plat->arcache = readl(hc_base + DRD2U3H_XHC_REGS_AXIRDA);
> +
> + /* Enable AXI read and write attributes. */
> + clrsetbits_le32((hc_base + DRD2U3H_XHC_REGS_AXIWRA), ^
This one is unnecessary too. Please fix them globally.
> + (USBAXIWR_UA_MASK | USBAXIWR_SA_MASK),
Here
> + (USBAXIWR_UA_VAL | USBAXIWR_SA_VAL));
Here
> + clrsetbits_le32((hc_base + DRD2U3H_XHC_REGS_AXIRDA),
Here
> + (USBAXIRD_UA_MASK | USBAXIRD_SA_MASK),
Here
> + (USBAXIRD_UA_VAL | USBAXIRD_SA_VAL));
And here
[...]
^ permalink raw reply [flat|nested] 5+ messages in thread
* [U-Boot] [PATCH v3 2/2] drivers: usb: host: Add BRCM xHCI driver
2019-11-26 18:41 [U-Boot] [PATCH v3 0/2] Add Broadcom XHCI driver for iproc platforms Vladimir Olovyannikov
@ 2019-11-26 18:41 ` Vladimir Olovyannikov
2019-11-27 8:42 ` Marek Vasut
0 siblings, 1 reply; 5+ messages in thread
From: Vladimir Olovyannikov @ 2019-11-26 18:41 UTC (permalink / raw)
To: u-boot
From: Bharat Kumar Reddy Gooty <bharat.gooty@broadcom.com>
Base driver for Broadcom xHCI controllers
Signed-off-by: Bharat Kumar Reddy Gooty <bharat.gooty@broadcom.com>
Signed-off-by: Vladimir Olovyannikov <vladimir.olovyannikov@broadcom.com>
---
drivers/usb/host/Kconfig | 8 +++
drivers/usb/host/Makefile | 1 +
drivers/usb/host/xhci-brcm.c | 105 +++++++++++++++++++++++++++++++++++
3 files changed, 114 insertions(+)
create mode 100644 drivers/usb/host/xhci-brcm.c
diff --git a/drivers/usb/host/Kconfig b/drivers/usb/host/Kconfig
index 0987ff25b1..94ac969058 100644
--- a/drivers/usb/host/Kconfig
+++ b/drivers/usb/host/Kconfig
@@ -88,6 +88,14 @@ config USB_XHCI_FSL
depends on !SPL_NO_USB
help
Enables support for the on-chip xHCI controller on NXP Layerscape SoCs.
+
+config USB_XHCI_BRCM
+ bool "Broadcom USB3 Host XHCI controller"
+ depends on DM_USB
+ help
+ USB controller based on the Broadcom USB3 IP Core.
+ Supports USB2/3 functionality.
+
endif # USB_XHCI_HCD
config USB_EHCI_HCD
diff --git a/drivers/usb/host/Makefile b/drivers/usb/host/Makefile
index 7feeff679c..b62f346094 100644
--- a/drivers/usb/host/Makefile
+++ b/drivers/usb/host/Makefile
@@ -44,6 +44,7 @@ obj-$(CONFIG_USB_EHCI_RMOBILE) += ehci-rmobile.o
obj-$(CONFIG_USB_EHCI_ZYNQ) += ehci-zynq.o
# xhci
+obj-$(CONFIG_USB_XHCI_BRCM) += xhci-brcm.o
obj-$(CONFIG_USB_XHCI_HCD) += xhci.o xhci-mem.o xhci-ring.o
obj-$(CONFIG_USB_XHCI_DWC3) += xhci-dwc3.o
obj-$(CONFIG_USB_XHCI_DWC3_OF_SIMPLE) += dwc3-of-simple.o
diff --git a/drivers/usb/host/xhci-brcm.c b/drivers/usb/host/xhci-brcm.c
new file mode 100644
index 0000000000..c53c93209e
--- /dev/null
+++ b/drivers/usb/host/xhci-brcm.c
@@ -0,0 +1,105 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2019 Broadcom.
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <fdtdec.h>
+#include <usb.h>
+#include <asm/io.h>
+#include "xhci.h"
+
+#define DRD2U3H_XHC_REGS_AXIWRA 0xC08
+#define DRD2U3H_XHC_REGS_AXIRDA 0xC0C
+
+#define USBAXI_AWCACHE 0xF
+#define USBAXI_ARCACHE 0xF
+#define USBAXI_AWPROT 0x8
+#define USBAXI_ARPROT 0x8
+#define USBAXIWR_SA_VAL ((USBAXI_AWCACHE << 4) | USBAXI_AWPROT)
+#define USBAXIWR_SA_MASK 0xFF
+#define USBAXIWR_UA_VAL (((USBAXI_AWCACHE << 4) | USBAXI_AWPROT) << 16)
+#define USBAXIWR_UA_MASK (0xFF << 16)
+#define USBAXIRD_SA_VAL ((USBAXI_ARCACHE << 4) | USBAXI_ARPROT)
+#define USBAXIRD_SA_MASK 0xFF
+#define USBAXIRD_UA_VAL (((USBAXI_ARCACHE << 4) | USBAXI_ARPROT) << 16)
+#define USBAXIRD_UA_MASK (0xFF << 16)
+
+struct brcm_xhci_platdata {
+ unsigned int arcache;
+ unsigned int awcache;
+};
+
+static int xhci_brcm_probe(struct udevice *dev)
+{
+ struct xhci_hccr *hcd;
+ struct xhci_hcor *hcor;
+ struct brcm_xhci_platdata *plat = dev_get_platdata(dev);
+ uintptr_t hc_base;
+ int len, ret = 0;
+
+ if (!plat) {
+ dev_err(dev, "Can't get xHCI Plat data\n");
+ return -ENOMEM;
+ }
+
+ hcd = dev_read_addr_ptr(dev);
+ if (!hcd) {
+ dev_err(dev, "Can't get the xHCI register base address\n");
+ return -ENXIO;
+ }
+
+ hc_base = (uintptr_t)hcd;
+ len = HC_LENGTH(xhci_readl(&hcd->cr_capbase));
+ hcor = (struct xhci_hcor *)(hc_base + len);
+
+ /* Save the default values of AXI read and write attributes */
+ plat->awcache = readl(hc_base + DRD2U3H_XHC_REGS_AXIWRA);
+ plat->arcache = readl(hc_base + DRD2U3H_XHC_REGS_AXIRDA);
+
+ /* Enable AXI read and write attributes. */
+ clrsetbits_le32((hc_base + DRD2U3H_XHC_REGS_AXIWRA),
+ (USBAXIWR_UA_MASK | USBAXIWR_SA_MASK),
+ (USBAXIWR_UA_VAL | USBAXIWR_SA_VAL));
+ clrsetbits_le32((hc_base + DRD2U3H_XHC_REGS_AXIRDA),
+ (USBAXIRD_UA_MASK | USBAXIRD_SA_MASK),
+ (USBAXIRD_UA_VAL | USBAXIRD_SA_VAL));
+
+ ret = xhci_register(dev, hcd, hcor);
+ if (ret)
+ dev_err(dev, "Failed to register xHCI\n");
+
+ return ret;
+}
+
+static int xhci_brcm_deregister(struct udevice *dev)
+{
+ struct brcm_xhci_platdata *plat = dev_get_platdata(dev);
+ uintptr_t hc_base;
+
+ hc_base = (uintptr_t)dev_read_addr(dev);
+
+ /* Restore the default values for AXI read and write attributes */
+ writel(plat->awcache, hc_base + DRD2U3H_XHC_REGS_AXIWRA);
+ writel(plat->arcache, hc_base + DRD2U3H_XHC_REGS_AXIRDA);
+
+ return xhci_deregister(dev);
+}
+
+static const struct udevice_id xhci_brcm_ids[] = {
+ { .compatible = "brcm,generic-xhci" },
+ { }
+};
+
+U_BOOT_DRIVER(usb_xhci) = {
+ .name = "xhci_brcm",
+ .id = UCLASS_USB,
+ .probe = xhci_brcm_probe,
+ .remove = xhci_brcm_deregister,
+ .ops = &xhci_usb_ops,
+ .of_match = xhci_brcm_ids,
+ .platdata_auto_alloc_size = sizeof(struct brcm_xhci_platdata),
+ .priv_auto_alloc_size = sizeof(struct xhci_ctrl),
+ .flags = DM_FLAG_ALLOC_PRIV_DMA,
+};
--
2.17.1
^ permalink raw reply related [flat|nested] 5+ messages in thread
end of thread, other threads:[~2019-11-27 8:42 UTC | newest]
Thread overview: 5+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2019-11-26 18:39 [U-Boot] [PATCH v2 0/2] Add Broadcom XHCI driver for iproc platforms Vladimir Olovyannikov
2019-11-26 18:39 ` [U-Boot] [PATCH v3 1/2] dt-bindings: Documentation on BRCM xHCI controller Vladimir Olovyannikov
2019-11-26 18:39 ` [U-Boot] [PATCH v3 2/2] drivers: usb: host: Add BRCM xHCI driver Vladimir Olovyannikov
2019-11-26 18:41 [U-Boot] [PATCH v3 0/2] Add Broadcom XHCI driver for iproc platforms Vladimir Olovyannikov
2019-11-26 18:41 ` [U-Boot] [PATCH v3 2/2] drivers: usb: host: Add BRCM xHCI driver Vladimir Olovyannikov
2019-11-27 8:42 ` Marek Vasut
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